Circuit Note
High Accuracy anyCAP® 100 mA Low
Dropout Linear Regulator
Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices
engineers. Standard engineering practices have been employed in the design and construction of
room temperature. However, you are solely responsible for testing the circuit and determining its
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or direct, indirect, special, incidental, consequential or punitive damages due to any cause
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Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved.
33Ω
+5.0V
+5.0V
R2 11.3kΩ
R3 1kΩ
R4 1kΩ
R1 11.3kΩ
RG
60.4Ω
C2 3.3µF
C1 3.3µF
100pF
REFIN(+)
VDD
DIN
DOUT/RDY
SCLK
CS
REFIN(–)
AIN(+)
AIN(–)
GND
1µF
0.1µF 10µF
1µF
1µF
10µF
100pF
C3
C4
C5
+5.0V
ADA4528-1
AD7791
SDP BOARD
AND
SUPPORT CIRCUITS
ADA4528-1
ADP3301-5.0
SENSE+
SENSE–
OUT–
10µF
IN
IN
SD
OUT
OUT
NR
ERR
GND
0.1µF
0.1µF 4.7µF
5.0V
OUT+
LOAD CELL:
TEDEA HUNTLEIGH
505H-0002-F070
33Ω
33Ω
33Ω
+5.0V
V
IN
10164-001
Devices Connected/Referenced
Circuits from the Lab™ reference circuits are engineered and
AD7791
tested for quick and easy system integration to help solve today’s
analog, mixed-signal, and RF design challenges. For more
information and/or support, visit www.analog.com/CN0216.
ADA4528-1
ADP3301
Precision Weigh Scale Design Using the AD7791 24-Bit Sigma-Delta ADC
Low Power, Buffered, 24-Bit Sigma-Delta
ADC
Precision, Ultralow Noise, Rail-to-Rail
Input/Output, Zero-Drift Op Amp
with External ADA4528-1 Zero-Drift Amplifiers
EVALUATION AND DESIGN SUPPORT
Circuit Evaluation Boards
CN-0216 Circuit Evaluation Board (EVAL-CN0216-SDPZ)
System Demonstration Platform (EVAL-SDP-CB1Z)
Design and Integration Files
Schematics, Layout Files, Bill of Materials
CIRCUIT FUNCTION AND BENEFITS
The circuit in Figure 1 is a precision weigh scale signal
conditioning system. It uses the AD7791, a low power buffered
24-bit sigma-delta ADC along with two external ADA4528-1
zero-drift amplifiers. This solution allows for high dc gain with
a single supply.
Ultralow noise, low offset voltage, and low drift amplifiers are
used at the front end for amplification of the low-level signal
from the load cell. The circuit yields 15.3 bit noise-free code
resolution for a load cell with a full-scale output of 10 mV.
This circuit allows great flexibility in designing a custom lowlevel signal conditioning front end that gives the user the ability
to easily optimize the overall transfer function of the combined
sensor-amplifier-converter circuit. The AD7791 maintains good
performance over the complete output data range, from 9.5 Hz
to 120 Hz, which allows it to be used in weigh scale applications
that operate at various low speeds.
Rev. 0
each circuit, and their function and performance have been tested and verified in a lab environment at
be liable f
Figure 1. Weigh Scale System Using the AD7791 (Simplified Schematic, All Connections and Decoupling Not Shown)
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
CN-0216 Circuit Note
CIRCUIT DESCRIPTION
Figure 2 shows the actual test setup. For testing purposes, a
6-wire Tedea-Huntleigh 505H-0002-F070 load cell is used.
Current flowing through a PCB trace produces an IR voltage
drop, and with longer traces, this voltage drop can be several
millivolts or more, introducing a considerable error. A 1 inch
long, 0.005 inch wide trace of 1 oz copper has a resistance of
approximately 100 mΩ at room temperature. With a load
current of 10 mA, this can introduce a 1 mV error.
A 6-wire load cell has two sense pins, in addition to the
excitation, ground, and two output connections. The sense pins
are connected to the high side (excitation pin) and low side
(ground pin) of the Wheatstone bridge. The voltage developed
across the bridge can be accurately measured regardless of the
voltage drop due to wire resistance. In addition, the AD7791
accepts differential analog inputs and a differential reference as
well. These two sense pins are connected to the AD7791
reference inputs to create a ratiometric configuration that is
immune to low frequency changes in the power supply
excitation voltage. The ratiometric connection eliminates the
need for a precision voltage reference.
Unlike a 6-wire load cell, a 4-wire load cell does not have sense
pins, and the ADC differential reference pins are connected
directly to the excitation voltage and ground. With this
connection, there exists a voltage difference between the
excitation pin and the reference pin on the ADC due to wire
resistance. There will also be a voltage difference on the low side
(ground) due to wire resistance. The system will not be
completely ratiometric.
The Tedea-Huntleigh 2 kg load cell has a sensitivity of 2 mV/V
and a full-scale output of 10 mV when the excitation voltage is
5 V. A load cell also has an offset, or TARE, associated with it.
In addition, the load cell also has a gain error. Some customers
use a DAC to remove or null the TARE. When the AD7791 uses
a 5 V reference, its differential analog input range is equal to
±5 V, or 10 V p-p. The circuit in Figure 1 amplifies the load cell
output by a factor of 375 (1 + 2R1/RG), so the full-scale input
range referred to the load cell output is 10 V/375 = 27 mV p-p.
This extra range relative to the 10 mV p-p load cell full-scale
signal is beneficial as it ensures that the offset and gain error of
the load cell do not overload the ADC’s front end.
The low-level amplitude signal from the load cell is amplified by
two ADA4528-1 zero-drift amplifiers. A zero-drift amplifier, as
the name suggests, has a close to zero offset voltage drift. The
amplifier continuously self-corrects for any dc errors, making it
as accurate as possible. Besides having low offset voltage and
drift, a zero-drift amplfier also exhibits no 1/f noise. This
important feature allows precision weigh scale measurement at
dc or low frequency.
The two ADA4528-1 op amps are configured as the first stage of
a three op amp instrumentation amplifier. A third op amp
connected as a difference amplifier would normally be used for
the second stage, but in the circuit of Figure 1, the differential
input of the AD7791 performs this function.
The gain is equal to 1 + 2R1/RG. Capacitors C1 and C2 are
placed in the feedback loops of the op amps and form 4.3 Hz
cutoff frequency low-pass filters with R1 and R2. This limits the
amount of noise entering the sigma-delta ADC. C5 in
conjunction with R3 and R4 form a differential filter with a
cutoff frequency of 8 Hz, which further limits the noise. C3 and
C4 in conjunction with R3 and R4 form common-mode filters
with a cutoff frequency of 159 Hz.
The ADP3301 low noise regulator powers the AD7791,
ADA4528-1, and the load cell. In addition to decoupling
capacitors, a noise reduction capacitor is placed on the regulator
output as recommended in the ADP3301 data sheet. It is
essential that the regulator is low noise, because any noise on
the power supply or ground plane introduces noise into the
system and degrades the circuit performance.
Figure 2. Weigh Scale System Setup Using the AD7791
The 24-bit sigma-delta ADC AD7791 converts the amplified
signal from the load cell. The AD7791 is configured to operate
in the buffered mode to accommodate the impedance of the
R-C filter network on the analog input pins.
Figure 3 shows the AD7791’s rms noise for different output data
rates. This plot shows that the rms noise increases as the output
data rate increases. However, the device maintains good noise
performance over the complete range of output data rates.
10164-002
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