Analog Devices CMP402, CMP401 Datasheet
23 ns and 65 ns
a
FEATURES
23 ns or 65 ns Propagation Delay
Single-Supply Operation
Compatible with +3 V and +5 V Logic
Separate Input and Output Sections
Low Power
Wide Input Range: –5 V to +3.9 V
APPLICATIONS
Battery Operated Instrumentation
Line Receivers
Level Translators
Read Channel Detection
GENERAL DESCRIPTION
The CMP401 and CMP402 are 23 ns and 65 ns quad comparators with separate input and output supplies. Separate supplies
enable the input stage to be operated from +3 volts to as high as
±6 volts. The output can be supplied with either +3volts or
+5 volts as determined by the interface logic or available supplies.
Independent input and output supplies combined with fast propagation make the CMP401 and CMP402 excellent choices for
interfacing to portable instrumentation.
The CMP401 and CMP402 are specified over the extended
industrial (–40°C to +125°C) temperature range. Both are
available in 16-pin plastic DIP or narrow SO-16 surface mount
packages. Consult factory for 16-lead TSSOP availability.
Low Voltage Comparators
CMP401/CMP402
FUNCTIONAL BLOCK DIAGRAM
V
=
DIGITAL
+3V OR +5V
ANALOG–
10nS
OUTPUT
) ≥ 3V
100
90
10
0%
IN+
IN–
NOTE: (V
50mV
V
ANALOG+
+0V TO +5V
V
ANALOG–
+0V TO –5V
ANALOG+
2v
=
=
) – (V
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
CMP401: 20 MHz Noninverting Switching. VIN = ±100 mV
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
CMP401/CMP402–SPECIFICA TIONS
ELECTRICAL SPECIFICATIONS
(@ V+
ANA
= V+
= +5.0 V, VCM = 0.1 V, –408C ≤ TA ≤ +1258C unless otherwise noted)
DIG
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage
1
1
V
OS
V
OS
TA = +25°C3mV
4mV
Hysteresis 2mV
Input Bias Current I
Input Offset Current I
Input Common-Mode Voltage Range V
B
I
B
OS
CM
TA = +25°C3µA
4µA
±3 µA
0 +4.0 V
Common-Mode Rejection CMRR 0.1 V ≤ VCM ≤ 3.9 V 60 dB
Large Signal Voltage Gain A
VO
RL = 10 kΩ 10 V/mV
Offset Voltage Drift ∆VOS/∆T1µV/°C
OUTPUT CHARACTERISTICS
Output High Voltage V
Output Low Voltage V
OH
OL
IOH = –3.2 mA 4.6 V
IOL = 3.2 mA 0.2 V
POWER SUPPLY
Power Supply Rejection Ratio PSRR V+
Analog Supply Current – CMP401 I
Digital Supply Current – CMP401 I
Analog Supply Current – CMP401 I
Digital Supply Current – CMP401 I
Analog Supply Current – CMP402 I
Digital Supply Current – CMP402 I
Analog Supply Current – CMP402 I
Digital Supply Current – CMP402 I
ANA
DIG
ANA
DIG
ANA
DIG
ANA
DIG
ANA
and V+
+2.7 V to +6 V 60 dB
DIG
TA = +25°C 6.5 mA
VO = 0 V, RL = ∞, TA = +25°C 2.0 mA
8.0 mA
VO = 0 V, RL = ∞ 2.25 mA
TA = +25°C 1.4 mA
VO = 0 V, RL = ∞, TA = +25°C 2.0 mA
1.75 mA
VO = 0 V, RL = ∞ 2.25 mA
DYNAMIC PERFORMANCE
Propagation Delay – CMP401 t
Propagation Delay – CMP401 t
Propagation Delay – CMP401 t
Propagation Delay – CMP402 t
P
P
P
P
100 mV Step with 20 mV OD,
T
= +25°C1723ns
A
100 mV Step with 5 mV OD,
T
= +25°C33ns
A
100 mV Step with 20 mV OD 30 ns
100 mV Step with 20 mV OD,
TA = +25°C5465ns
Propagation Delay – CMP402 t
P
100 mV Step with 5 mV OD,
TA = +25°C60ns
Propagation Delay – CMP402 t
P
100 mV Step with 20 mV OD 75 ns
ELECTRICAL SPECIFICATIONS
(@ V
ANA
= V
= +3.0 V, VCM = 0.1 V, TA = +258C unless otherwise noted)
DIG
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage
Input Common-Mode Voltage Range V
Input Differential Voltage Range V
Common-Mode Rejection CMRR 0.1 V ≤ V
1
V
OS
CM
DIFF
4.5 mV
0 +2.0 V
±2.0 V
≤ 1.9 V 60 dB
CM
OUTPUT CHARACTERISTICS
Output High Voltage V
Output Low Voltage V
OH
OL
IOH = –3.2 mA 2.6 V
IOL = 3.2 mA 0.25 V
POWER SUPPLY
Power Supply Rejection Ratio PSRR V+
Analog Supply Current – CMP401 I
Digital Supply Current – CMP401 I
Analog Supply Current – CMP402 I
Digital Supply Current – CMP402 I
ANA
DIG
ANA
DIG
ANA
and V+
+2.7 V to +6 V 60 dB
DIG
6mA
VO = 0 V, RL = ∞ 1mA
1.2 mA
VO = 0 V, RL = ∞ 1mA
DYNAMIC PERFORMANCE
Propagation Delay – CMP401 t
Propagation Delay – CMP402 t
P
P
100 mV Step with 20 mV OD 32 ns
100 mV Step with 20 mV OD 70 ns
–2–
REV. 0
CMP401/CMP402
ELECTRICAL SPECIFICATIONS
(@ V±
= ±5 V, V
ANA
= +5.0 V, TA = +258C unless otherwise noted)
DIG
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage
Input Common-Mode Voltage Range V
Input Differential Voltage Range V
1
V
OS
CM
DIFF
VCM = 0 V 3 mV
–5.0 +4.0 V
±8.0 V
Common-Mode Rejection CMRR –4.9 V ≤ VCM ≤ 3.9 V 60 dB
Offset Voltage Drift ∆VOS/∆T15µV/°C
POWER SUPPLY
Power Supply Rejection Ratio PSRR V±
Analog Supply Current – CMP401 I
Digital Supply Current – CMP401 I
Analog Supply Current – CMP402 I
Digital Supply Current – CMP402 I
ANA
DIG
ANA
DIG
±3 V to ±6 V 60 dB
ANA
6.5 mA
VO = 0 V, RL = ∞ 2.0 mA
2.0 mA
VO = 0 V, RL = ∞ 2.0 mA
DYNAMIC PERFORMANCE
Propagation Delay – CMP401 t
Propagation Delay – CMP402 t
NOTES
1
Offset voltage is defined as (V
Specifications subject to change without notice.
OS+
+ V
OS–
)/2.
P
P
100 mV Step with 20 mV OD 23 ns
100 mV Step with 20 mV OD 65 ns
REV. 0
–3–
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