ANALOG DEVICES AN-1127 Service Manual

AN-1127

APPLICATION NOTE

One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

Differences Between the ADE7880 and the ADE7878

by Petre Minciunescu

INTRODUCTION

This application note describes the differences between the

ADE7878 and the ADE7880. It discusses the hardware and

software differences and provides a header file for the

ADE7880.

HARDWARE DIFFERENCES

The ADE7880 is pin-for-pin compatible with the ADE7878.

New Antialiasing Filters

However, because the ADC bandwidth has been increased from 2 kHz (−3 dB point) to 3.3 kHz (−3 dB point), the antialiasing filters used in the input datapath of the ADCs has to be changed. Previously, on the ADE7878 evaluation board, a 1 kΩ/22 nF (7.2 kHz corner) antialiasing filter was used. A 1 kΩ/10 nF (15.9 kHz corner) antialiasing filter is used on the ADE7880 evaluation board.

NEUTRAL CURRENT MAY USE DIFFERENT SENSOR THAN PHASE CURRENTS

The neutral current may be sensed using a different sensor type than the phase currents. For example, the phase currents may be sensed with Rogowski coils and the neutral current may be sensed with current transformers (CTs), or vice versa.

Use Bit 0 (INTEN) in the CONFIG register of the ADE7880 to enable/disable the integrators in the phase current channels.

Use Bit 3 (ININTEN) in the CONFIG3 register of the ADE7880 to enable/disable the integrator in the neutral current channel.

The definition of the gain register at Address 0xE60F in the

ADE7880 has remained the same.

Rev. A | Page 1 of 8

AN-1127 Application Note

TABLE OF CONTENTS

Hardware Differences ...................................................................... 1

Neutral Current May Use Different Sensor than Phase Currents .... 1

Revision History ............................................................................... 2

REVISION HISTORY

3/12—Rev. 0 to Rev. A

Changes to Table 2 ............................................................................ 4

11/11—Revision 0: Initial Version

Software Differences .........................................................................3

Appendix: ADE7880.H Header File................................................5

Rev. A | Page 2 of 8

Application Note AN-1127

FSFS

fPMAX

VATHRVARTHRWTHR

×××

===

103600

103600×××××

===

FSFS

fPMAX

VATHRVARTHRWTHR

SOFTWARE DIFFERENCES

Register Addresses

The register map has changed. Many of the ADE7878 registers now have new addresses. The ADE7880 has additional registers because of the new harmonic calculations. The register information is found in the Appendix: ADE7880.H Header File section.

ADE7880 Does Not Compute the Total Reactive Power and the Total Reactive Energy

The ADE7878 computes the total and fundamental reactive powers/energies. The ADE7880 computes only the fundamental reactive power/energy.

The ADE7878 stores the instantaneous values of the phase total reactive powers into AVAR, BVAR, and CVAR registers. These registers have been eliminated.

The ADE7878 HSDC port transmits the phase total reactive powers when Bits[4:3] (HXFER) in the HSDC_CFG register have been set to 10. Instead, the ADE7880 transmits the fundamental reactive powers when the HXFER bits have been set to 10. The ADE7880 phase fundamental reactive power registers, AFVAR, BFVAR and CFVAR, are not mapped with an address in the register space and can be accessed only through the HSDC port.

xPGAIN Registers Replaced the xWGAIN, xVARGAIN, xVAGAIN Registers (x = A, B, C)

In the ADE7878, the gain registers in the active, reactive, and apparent powers datapaths were AWGAIN, BWGAIN, CWGAIN, AVARGAIN, BVARGAIN, CVARGAIN, AVAGAIN, BVAGAIN, and CVAGAIN. The recommendation was to use the same values to initialize them on each phase.

In the ADE7880, the APGAIN, BPGAIN, and CPGAIN registers replace the xWGAIN, xVARGAIN, and xVAGAIN on each phase. APGAIN manages all the power gains on Phase A, BPGAIN manages all the power gains on Phase B, and CPGAIN manages all the power gains on Phase C.

The WTHR, VARTHR, and VATHR Register Definitions Changed

In the ADE7878, the WTHR, VARTHR, and VATHR, 48-bit registers are defined as

where: PMAX = 33,516,139 = 0x1FF6A6B as the instantaneous power computed when the ADC inputs are at full scale.

= 8 kHz, the frequency with which the DSP computes the

instantaneous power. n is an integer that determines what derivative of wh [10 desired as one LSB of the xWATTHR/xVARHR/xVAHR registers.

and IFS are the rms values of phase voltages and currents

when the ADC inputs are at full scale.

wh] is

Rev. A | Page 3 of 8

In the ADE7880, the WTHR, VARTHR, and VATHR are now 8-bit unsigned registers and are defined as

where: PMAX = 27,059,678 = 0x19CE5DE as the instantaneous power computed when the ADC inputs are at full scale.

= 1.024 MHz, the frequency at which every instantaneous

power computed by the DSP at 8 kHz is accumulated. n is an integer that determines what derivative of wh [10

wh] is

desired as one LSB of the xWATTHR/xVARHR/xVAHR registers.

and IFS are the rms values of phase voltages and currents

when the ADC inputs are at full scale.

No Load Management Changed for the Total Active/ Reactive and the Fundamental Active/Reactive Powers

In the ADE7880, the no load condition for the total active/reactive powers and the fundamental active/reactive powers has changed. See the ADE7880 data sheet for more information.

HPF Managed by Bit 0 (HPFEN) in the CONFIG3 Register (ADE7880)

In the ADE7878, the high-pass filters (HPFs) used in the current and voltage channels datapaths are managed by the HPFDIS 24-bit register. If the register is 0, its default value, the HPFs are enabled. If the register is initialized with a nonzero value, the HPFs are disabled.

In the ADE7880, the HPFs are managed by Bit 0 (HPFEN) in the CONFIG3 register. If HPFEN is 0, the HPFs are disabled. If HPFEN is 1, its default value, the HPFs are enabled.

ADE7880 Computes RMS Value of the Sum of the Phase Currents

The ADE7878 and the ADE7880 compute the instantaneous value of the sum of the phase currents and store it into the ISUM register. The ADE7878 does not compute the rms of ISUM.

The ADE7880 computes the rms of ISUM and stores it into the NIRMS register if Bit 2 (INSEL) of the CONFIG3 register (see the ADE7880 data sheet) is set to 1. If INSEL is 0, its default value, the NIRMS register contains the rms of the neutral current sensed at the INP and INN pins.

ADE7880 Computes RMS of Third Voltage in 3P3W Configurations

In 3P3W configurations (when the CONSEL bits in the ACCMODE register are set to 01), only Phase A and Phase C are sensed using Phase B as reference. Both the ADE7878 and the ADE7880 compute the rms values of the line voltages between Phase A and Phase B and between Phase C and Phase B and store them into the AVRMS and CVRMS registers. The ADE7880 computes the rms values of the line voltage between Phase A and Phase C and stores them into the BVRMS register.

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