ANALOG DEVICES ADA4091-4 Service Manual

Precision Micropower, OVP, RRIO

+

D

FEATURES

Single-supply operation: 3.0 V to 30 V
Wide input voltage range
Rail-to-rail output swing
Low supply current: 200 μA/amplifier
Wide bandwidth: 1.2 MHz
Slew rate: 0.46 V/μs
Low offset voltage: 250 μV maximum
No phase reversal
Overvoltage protection (OVP)

25 V above/below supply rails at ±5 V
12 V above/below supply rails at ±15 V

APPLICATIONS

Industrial process control
Battery-powered instrumentation
Power supply control and protection
Telecommunications
Remote sensors
Low voltage strain gage amplifiers
DAC output amplifiers

GENERAL DESCRIPTION

The ADA4091-2 dual and ADA4091-4 quad are micropower,
single-supply, 1.2 MHz bandwidth amplifiers featuring rail-to­rail inputs and outputs. They are guaranteed to operate from a
+3.0 V to +30 V single supply as well as from ±1.5 V to ±15 V
dual supplies.

The ADA4091 family features a unique input stage that allows
the input voltage to exceed either supply safely without any phase
reversal or latch-up; this is called overvoltage protection, or OVP.

Applications for these amplifiers include portable telecom­munications equipment, power supply control and protection,
and interface for transducers with wide output ranges. Sensors
requiring a rail-to-rail input amplifier include Hall effect, piezo­electric, and resistive transducers.

The ability to swing rail-to-rail at both the input and output enables
designers, for example, to build multistage filters in single-supply
systems and to maintain high signal-to-noise ratios (SNR).

The ADA4091 family is specified over the extended industrial
temperature range of −40°C to +125°C. The ADA4091 family is
part of the growing selection of 36 V, low power op amps from
Analog Devices, Inc., (see Table 1).

Operational Amplifier

ADA4091-2/ADA4091-4

PIN CONFIGURATIONS

OUTA

1

2

–INA

ADA4091-2

3

+INA

–V

TOP VIEW

(Not to Scale)

4

Figure 1. 8-Lead, Narrow-Body SOIC (R-8)

1OUTA

2–INA

ADA4091-2

3+INA

TOP VIEW

(Not to Scale)

4–V

NOTES

1. IT I S RECOMMENDED T O CONNECT T HE

EXPOSED PAD TO V–.

Figure 2. 8-Lead LFCSP (CP-8-9)

1

OUTA

2

–INA

3

+INA

ADA4091-4

4

+V

TOP VIEW

(Not to Scale)

5

+INB

6

–INB

7

OUTB

Figure 3. 14-Lead TSSOP (RU-14)

NC

OUTA

OUT

16

15

14

1

–INA

2

+INA

INB

NOTES

1. NC = NO CONNECT.

2. IT IS RECOMMENDED T O CONNECT T HE

ADA4091-4

5

–INB

TOP

VIEW

6

OUTB

3

V+

4

EXPOSED PAD TO V–.

7

OUTC

Figure 4. 16-Lead LFCSP (CP-16-17)

The ADA4091-2 is available in 8-lead, plastic SOIC and 8-lead
LFCSP packages. The ADA4091-4 is available in 14–lead TSSOP
and 16-lead LFCSP surface-mount packages.

Table 1. Low Power, 36 V Operational Amplifiers

Family Rail-to-Rail I/O PJFET Low Noise

Single OP1177
Dual ADA4091-2 AD8682 OP2177
Quad ADA4091-4 AD8684 OP4177

NC

13

8

–INC

+V

8

7

OUTB

6

–INB

5

+INB

8+V

7OUTB

6–INB

5+INB

14

OUTD

13

–IND

12

+IND

11

–V

10

+INC

9

–INC

8

OUTC

12

–IND

11

+IND

10

V–

9

+INC

07671-001

07571-102

07671-101

07671-103

Rev. F

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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Tel: [phone] www.analog.com
Fax: [phone] ©2008–2010 Analog Devices, Inc. All rights reserved.

ADA4091-2/ADA4091-4

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Pin Configurations ........................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Specifications ............................................................... 3

Absolute Maximum Ratings ............................................................ 6

Thermal Resistance ...................................................................... 6

REVISION HISTORY

10/10—Rev. E. to Rev. F

Changes to Features Section and General Description Section . 1

Changes to Outline Dimensions ................................................... 17

5/10—Rev. D. to Rev. E

Changes to Data Sheet Title ............................................................ 1

Changes to Table 2, Input Characteristics, Offset Voltage .......... 3

Changes to Table 3, Input Characteristics, Offset Voltage .......... 4

Changes to Table 4, Input Characteristics, Offset Voltage .......... 5

4/10—Rev. C to Rev. D

Changes to Table 2, Added LFCSP to Input Characteristics ...... 3

Changes to Table 3, Added LFCSP to Input Characteristics ...... 4

Changes to Table 4, Added LFCSP to Input Characteristics ...... 5

10/09—Rev. B to Rev. C

Added 8-Lead LFCSP and 16-Lead LFCSP ..................... Universal

Change to Features Section ............................................................. 1

Updated Outline Dimensions ....................................................... 16

Changes to Ordering Guide .......................................................... 18

ESD Caution...................................................................................6

Typical Performance Characteristics ..............................................7

Theory of Operation ...................................................................... 14

Input Stage ................................................................................... 14

Output Stage ................................................................................ 14

Input Overvoltage Protection ................................................... 15

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 18

7/09—Rev. A to Rev. B

Added New Part ADA4091-4 ........................................... Universal

Changes to Features Section, General Description Section, and

Figure 4 ............................................................................................... 1

Added Figure 2, Renumbered Sequentially ................................... 1

Changes to Table 1 ............................................................................. 1

Changes to Table 2 ............................................................................. 3

Changes to Table 3 ............................................................................. 4

Changes to Table 4 ............................................................................. 5

Changes to Table 5 ............................................................................. 6

Changes to Table 6 ............................................................................. 6

Updated Outline Dimensions ....................................................... 16

Changes to Ordering Guide .......................................................... 16

7/09—Rev. 0 to Rev. A

Changes to Data Sheet Title ............................................................. 1

Changes to Features .......................................................................... 1

Changes to Table 2 ............................................................................. 3

Changes to Table 3 ............................................................................. 4

Changes to Table 4 ............................................................................. 5

Added Input Current Parameter, Table 5 ....................................... 6

Added New Figure 12 and Figure 13, Renumbered

Sequentially ........................................................................................ 8

Added New Figure 24 and Figure 25 ........................................... 10

Added New Figure 36 and Figure 37 ........................................... 12

Added New Figure 43 .................................................................... 13

Changes to Input Overvoltage Protection Section ..................... 15

Changes to Ordering Guide .......................................................... 16

10/08—Revision 0: Initial Version

Rev. F | Page 2 of 20

ADA4091-2/ADA4091-4

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

VSY = ±1.5 V, VCM = 0.0 V, TA = 25°C, unless otherwise noted.

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS −250 −40 +250 μV
ADA4091-4 LFCSP package −400 −40 +400 μV

−40°C ≤ TA ≤ +125°C −600 +600 μV
Offset Voltage Drift ∆VOS/∆T 2.5 μV/°C
Input Bias Current IB −55 −44 nA

−40°C ≤ TA ≤ +85°C −55 +55 nA

−40°C ≤ TA ≤ +125°C −275 +275 nA
Input Offset Current IOS −3 0.5 +3 nA

−40°C ≤ TA ≤ +85°C −5 +5 nA

−40°C ≤ TA ≤ +125°C −75 +75 nA
Input Voltage Range −1.5 +1.5 V
Common-Mode Rejection Ratio CMRR VCM = −1.35 V to +1.35 V 84 100 dB

−40°C ≤ TA ≤ +125°C 78 dB
Large Signal Voltage Gain AVO RL = 100 kΩ, VO = −1.2 V to +1.2 V 106 113 dB

−40°C ≤ TA ≤ +125°C 101 dB

R

−40°C ≤ TA ≤ +125°C 85 dB

OUTPUT CHARACTERISTICS

Output Voltage High VOH RL = 100 kΩ to GND 1.490 1.495 V

−40°C ≤ TA ≤ +125°C 1.490 V

R

−40°C to +125°C 1.455 V
Output Voltage Low VOL RL = 100 kΩ to GND −1.499 −1.495 V

−40°C ≤ TA ≤ +125°C −1.495 V

R

−40°C ≤ TA ≤ +125°C −1.490 V
Short-Circuit Limit ISC Source/sink ±31 mA
Open-Loop Impedance Z

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = 2.7 V to 36 V 108 126 dB

−40°C ≤ TA ≤ +125°C 100 dB
Supply Current per Amplifier ISY IO = 0 mA 165 200 μA

−40°C ≤ TA ≤ +125°C 300 μA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 100 kΩ, CL = 30 pF 0.46 V/μs
Settling Time tS To 0.01% 22 μs
Gain Bandwidth Product GBP 1.22 MHz
Phase Margin ΦM 69 Degrees

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.8 μV p-p
Voltage Noise Density en f = 1 kHz 24 nV/√Hz

f = 1 MHz, AV = 1 102 Ω

OUT

= 10 kΩ, VO = −1.2 V to +1.2 V 92 94 dB

L

= 10 kΩ to GND 1.475 1.485 V

L

= 10 kΩ to GND −1.495 −1.490 V

L

Rev. F | Page 3 of 20

ADA4091-2/ADA4091-4

VSY = ±5.0 V, VCM = 0.0 V, TA = 25°C, unless otherwise noted.

Table 3.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS −250 −45 +250 μV
ADA4091-4 LFCSP package −400 −40 +400 μV

−40°C ≤ TA ≤ +125°C −600 +600 μV
Offset Voltage Drift ∆VOS/∆T 2.5 μV/°C
Input Bias Current IB −60 −50 nA

−40°C ≤ TA ≤ +85°C −80 +80 nA

−40°C ≤ TA ≤ +125°C −350 +350 nA
Input Offset Current IOS −3 0.5 +3 nA

−40°C ≤ TA ≤ +85°C −7 +7 nA

−40°C ≤ TA ≤ +125°C −100 +100 nA
Input Voltage Range −5 +5 V
Common-Mode Rejection Ratio CMRR VCM = −4.85 V to +4.85 V 95 113 dB

−40°C ≤ TA ≤ +125°C 88 dB
Large Signal Voltage Gain AVO RL = 100 kΩ, VO = ±4.7 V 113 117 dB

−40°C ≤ TA ≤ +125°C 106 dB
R

−40°C ≤ TA ≤ +125°C 90 dB

OUTPUT CHARACTERISTICS

Output Voltage High VOH RL = 100 kΩ to GND 4.980 4.990 V

−40°C ≤ TA ≤ +125°C 4.980 V
R

−40°C ≤ TA ≤ +125°C 4.900 V
Output Voltage Low VOL RL = 100 kΩ to GND −4.998 −4.990 V

−40°C ≤ TA ≤ +125°C −4.980 V
R

−40°C ≤ TA ≤ +125°C −4.975 V
Short-Circuit Limit ISC Source/sink ±20 mA
Open-Loop Impedance Z

f = 1 MHz, AV = 1 77 Ω

OUT

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = 2.7 V to 36 V 108 126 dB

−40°C ≤ TA ≤ +125°C 100 dB
Supply Current per Amplifier ISY IO = 0 mA 180 225 μA

−40°C ≤ TA ≤ +125°C 300 μA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 100 kΩ, CL = 30 pF 0.46 V/μs
Settling Time tS To 0.01% 22 μs
Gain Bandwidth Product GBP 1.22 MHz
Phase Margin ΦM 70 Degrees

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.8 μV p-p
Voltage Noise Density en f = 1 kHz 24 nV/√Hz

= 10 kΩ, VO = ±4.7 V 98 100 dB

L

= 10 kΩ to GND 4.950 4.960 V

L

= 10 kΩ to GND −4.990 −4.980 V

L

Rev. F | Page 4 of 20

ADA4091-2/ADA4091-4

VSY = ±15.0 V, VCM = 0.0 V, VO = 0.0 V, TA = 25°C, unless otherwise noted.

Table 4.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS −250 −35 +250 μV
ADA4091-4 LFCSP package −400 −40 +400 μV

−40°C ≤ TA ≤ +125°C −600 +600 μV
Offset Voltage Drift ∆VOS/∆T 3.0 μV/°C
Input Bias Current IB −60 −50 nA

−40°C ≤ TA ≤ +85°C −80 +80 nA

−40°C ≤ TA ≤ +125°C −510 +510 nA
Input Offset Current IOS −3 0.5 +3 nA

−40°C ≤ TA ≤ +85°C −10 +10 nA

−40°C ≤ TA ≤ +125°C −140 +140 nA
Input Voltage Range −15 +15 V
Common-Mode Rejection Ratio CMRR VCM = −14.85 V to +14.85 V 104 121 dB

−40°C ≤ TA ≤ +125°C 95 dB
Large Signal Voltage Gain AVO RL = 100 kΩ, VO = ±14.7 V 116 119 dB

−40°C ≤ TA ≤ +125°C 108 dB
R

−40°C ≤ TA ≤ +125°C 93 dB
OUTPUT CHARACTERISTICS
Output Voltage High VOH R

−40°C ≤ TA ≤ +125°C 14.950 V
R

−40°C ≤ TA ≤ +125°C 14.800 V
Output Voltage Low VOL RL = 100 kΩ to GND −14.996 −14.990 V

−40°C ≤ TA ≤ +125°C −14.985 V
R

−40°C ≤ TA ≤ +125°C −14.940 V
Short-Circuit Limit ISC Source/sink ±20 mA
Open-Loop Impedance Z

f = 1 MHz, AV = 1 71 Ω

OUT

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = 2.7 V to 36 V 108 126 dB

−40°C ≤ TA ≤ +125°C 100 dB
Supply Current per Amplifier ISY IO = 0 mA 200 250 μA

−40°C ≤ TA ≤ +125°C 350 μA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 100 kΩ, CL = 30 pF 0.46 V/μs
Settling Time tS To 0.01% 22 μs
Gain Bandwidth Product GBP 1.27 MHz
Phase Margin ΦM 72 Degrees
Channel Separation CS f = 1 kHz 100 dB

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.8 μV p-p
Voltage Noise Density en f = 1 kHz 25 nV/√Hz

= 10 kΩ, VO = ±14.7 V 102 104 dB

L

= 100 kΩ to GND 14.975 14.980 V

L

= 10 kΩ to GND 14.900 14.920 V

L

= 10 kΩ to GND −14.975 −14.950 V

L

Rev. F | Page 5 of 20

ADA4091-2/ADA4091-4

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter Rating

Supply Voltage 36 V
Input Voltage

Differential Input Voltage1 ±VSY
Input Current ±5 mA
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C

1

Input current should be limited to ±5 mA.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Refer to the Input
Overvoltage Protection
section

THERMAL RESISTANCE

θJA is specified for the device soldered on a 4-layer JEDEC standard
PCB with zero airflow. The exposed pad is soldered to the
application board.

Table 6. Thermal Resistance

Package Type θJA θJC Unit

8-Lead SOIC (R-8) 155 45 °C/W
14-Lead TSSOP (RU-14) 112 35 °C/W
8-Lead LFCSP (CP-8-9) 75 12 °C/W
16-Lead LFCSP (CP-16-17) 55 14 °C/W

ESD CAUTION

Rev. F | Page 6 of 20