ANALOG DEVICES ADA4091-2 Service Manual

Micropower, Single-Supply, Rail-to-Rail

O

www.BDTIC.com/ADI

FEATURES

Single-supply operation: 3 V to 36 V
Wide input voltage range
Rail-to-rail output swing
Low supply current: 250 μA/amp
Wide bandwidth: 1.2 MHz
Slew rate: 0.46 V/μs
Low offset voltage: 500 μV maximum
No phase reversal

APPLICATIONS

Industrial process control
Battery-powered instrumentation
Power supply control and protection
Telecommunications
Remote sensors
Low voltage strain gage amplifiers
DAC output amplifiers

GENERAL DESCRIPTION

The ADA4091-2 is a dual, micropower, single-supply, 1.2 MHz
bandwidth amplifier featuring rail-to-rail inputs and outputs.
It is guaranteed to operate from a +3 V single supply as well as
from ±15 V dual supplies.

The ADA4091 family of op amps features a unique input stage
that allows the input voltage to safely exceed either supply
without any phase inversion or latch-up. The output voltage
swings to within 10 mV of the supplies.

Applications for these amplifiers include portable telecom­munications equipment, power supply control and protection,
and interface for transducers with wide output ranges. Sensors
requiring a rail-to-rail input amplifier include Hall effect, piezo­electric, and resistive transducers.

Input/Output Operational Amplifier

ADA4091-2

PIN CONFIGURATION

1

UTA

–INA

2

ADA4091-2

+INA

3

TOP VIEW

(Not to Scale)

–V

4

Figure 1. 8-Lead, Narrow Body SOIC

The ability to swing rail-to-rail at both the input and output
enables designers to build multistage filters in single-supply
systems and to maintain high signal-to-noise ratios.

The ADA4091 family of op amps is specified over the extended
industrial temperature range of −40°C to +125°C. The ADA4091-2
is part of a growing family of 36 V, low power op amps from
Analog Devices, Inc. (see Tabl e 1).

The ADA4091-2 is available in an 8-lead plastic SOIC surface­mount package.

Table 1. Low Power, 36 V Operational Amplifiers

Family Rail-to-Rail I/O PJFET Low Noise

Single OP1177
Dual ADA4091-2 AD8682 OP2177
Quad AD8684 OP4177

8

7

6

5

+V

OUTB

–INB

+INB

07671-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2008 Analog Devices, Inc. All rights reserved.

ADA4091-2

www.BDTIC.com/ADI

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1 

Pin Configuration ............................................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Specifications ............................................................... 3

Absolute Maximum Ratings ............................................................ 6

REVISION HISTORY

10/08—Revision 0: Initial Version



Thermal Resistance .......................................................................6

ESD Caution...................................................................................6

Typical Performance Characteristics ..............................................7

Theory of Operation ...................................................................... 13

Input Overvoltage Protection ................................................... 14

Outline Dimensions ....................................................................... 15

Ordering Guide .......................................................................... 15

Rev. 0 | Page 2 of 16

ADA4091-2

www.BDTIC.com/ADI

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

VSY = ±1.5 V, VCM = 0.15 V, VO = 1.4 V, TA = 25°C, unless otherwise noted.

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS −500 +45 +500 μV

−40°C ≤ TA ≤ +125°C −1.0 +1.0 mV
Input Bias Current IB −50 +50 nA

−40°C ≤ TA ≤ +85°C −55 +55 nA

−40°C ≤ TA ≤ +125°C −275 +275 nA
Input Offset Current IOS −5 +5 nA

−40°C ≤ TA ≤ +85°C −5 +5 nA

−40°C ≤ TA ≤ +125°C −75 +75 nA
Input Voltage Range −1.5 +1.5 V
Common-Mode Rejection Ratio CMRR ±1.5 V < VSY ± 18 V 76 dB

−40°C ≤ TA ≤ +125°C 70 dB
Large Signal Voltage Gain AVO RL = 100 kΩ, VO = 0.3 V to 2.7 V 106 dB

−40°C ≤ TA ≤ +125°C 100 dB
R

−40°C ≤ TA ≤ +125°C 85 dB
Offset Voltage Drift ∆VOS/∆T 2.5 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage High VOH RL = 100 kΩ to GND 1.495 V

−40°C to +125°C 1.490 V
R

−40°C to +125°C 1.455 V
Output Voltage Low VOL RL = 100 kΩ to GND −1.498 V

−40°C to +125°C −1.498 V
R

−40°C to +125°C −1.491 V
Short-Circuit Limit ISC Sink/source = −40°C to +125°C ±31 mA
Open-Loop Impedance Z

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = 2.7 V to 36 V 100 dB

−40°C ≤ TA ≤ +125°C 100 dB
Supply Current per Amplifier ISY IO = 0 mA 200 μA

−40°C ≤ TA ≤ +125°C 300 μA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 100 kΩ, CL = 30 pF 0.46 V/μs
Settling Time tS To 0.01% 22 μs
Gain Bandwidth Product GBP 1.22 MHz
Phase Margin ΦM 69 Degrees

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 2 μV p-p
Voltage Noise Density en f = 1 kHz 24 nV/√Hz

f = 1 MHz, AV = 1 102 Ω

OUT

= 10 kΩ, VO = 0.3 V to 2.7 V 93 dB

L

= 10 kΩ to GND 1.475 V

L

= 10 kΩ to GND −1.495 V

L

Rev. 0 | Page 3 of 16

ADA4091-2

www.BDTIC.com/ADI

VO = ±5.0 V, −4.9 V ≤ VCM ≤ +4.9 V, TA = 25°C, unless otherwise noted.

Table 3.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS −500 +141 +500 μV

−40°C ≤ TA ≤ +125°C −1.0 +1.00 mV
Input Bias Current IB 30 60 nA

−40°C ≤ TA ≤ +125°C 150 nA
Input Offset Current IOS 2 nA

−40°C ≤ TA ≤ +125°C 30 nA
Input Voltage Range −5 +5 V
Common-Mode Rejection Ratio CMRR ±1.5 V < VSY ±18 V 88 dB

−40°C ≤ TA ≤ +125°C 82 dB
Large Signal Voltage Gain AVO RL = 100 kΩ, VO = ±4.7 V 113 dB

−40°C ≤ TA ≤ +125°C 103 dB
R

−40°C ≤ TA ≤ +125°C 87 dB

OUTPUT CHARACTERISTICS

Output Voltage High VOH RL = 100 kΩ to GND 4.980 4.990 V

−40°C to +125°C 4.980 V
R
–40°C ≤ TA ≤ +125°C 4.900 V
Output Voltage Low VOL RL = 100 kΩ to GND −4.990 V

−40°C to +125°C −4.980 V
R
–40°C ≤ TA ≤ +125°C −4.975 V
Short-Circuit Limit ISC Sink/source = −40°C to +125°C ±20 mA
Open-Loop Impedance Z

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = 2.7 V to 36 V 100 dB

−40°C ≤ TA ≤ +125°C 100 dB
Supply Current per Amplifier ISY VO = 0 V 180 225 μA

−40°C ≤ TA ≤ +125°C 300 μA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 100 kΩ, CL = 30 pF 0.46 V/μs
Gain Bandwidth Product GBP 1.22 MHz
Phase Margin ΦM 70 Degrees

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.8 μV p-p
Voltage Noise Density en f = 1 kHz 24 nV/√Hz

f = 1 MHz, AV = 1 77 Ω

OUT

= 10 kΩ, VO = ±4.7 V 98 dB

L

=10 kΩ to GND 4.950 4.970 V

L

=10 kΩ to GND −4.980 V

L

Rev. 0 | Page 4 of 16

ADA4091-2

www.BDTIC.com/ADI

VSY = ±15.0 V, −14.9 V ≤ VCM ≤ +14.9 V, TA = 25°C, unless otherwise noted.

Table 4.

Parameter Symbol Conditions Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS −500 +500 μV

−40°C ≤ TA ≤ +125°C −1.2 +1.20 mV
Input Bias Current IB −55 +55 nA

−40°C ≤ TA ≤ +85°C −80 +80 nA

−40°C ≤ TA ≤ +125°C −510 +510 nA
Input Offset Current IOS −2 +2 nA

−40°C ≤ TA ≤ +85°C −10 +10 nA

−40°C ≤ TA ≤ +125°C −140 +140 nA
Input Voltage Range −5 +5 V
Common-Mode Rejection Ratio CMRR ±1.5 V < VSY < ±18 V 95 dB

−40°C ≤ TA ≤ +125°C 90 dB
Large Signal Voltage Gain AVO RL = 100 kΩ, VO = ±14.7 V 116 dB

−40°C ≤ TA ≤ +125°C 106 dB
R

−40°C ≤ TA ≤ +125°C 92 dB

OUTPUT CHARACTERISTICS

Output Voltage High VOH R

−40°C to +125°C 14.950 V
R
–40°C ≤ TA ≤ +125°C 14.800 V
Output Voltage Low VOL RL = 100 kΩ to GND −14.990 V

−40°C to +125°C −1.4990 V
R

−40°C to +125°C −14.940 V
Short-Circuit Limit ISC Sink/source = −40°C to 125°C ±20 mA
Open-Loop Impedance Z

POWER SUPPLY

Power Supply Rejection Ratio PSRR VSY = 2.7 V to 36 V 100 dB

−40°C ≤ TA ≤ +125°C 100 dB
Supply Current per Amplifier ISY IO = 0 mA 250 μA

−40°C ≤ TA ≤ +125°C 350 μA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 100 kΩ, CL = 30 pF 0.46 V/μs
Gain Bandwidth Product GBP 1.27 MHz
Phase Margin ΦM 72 Degrees
Channel Separation CS f = 1 kHz 100 dB

NOISE PERFORMANCE

Voltage Noise en p-p 0.1 Hz to 10 Hz 0.8 μV p-p
Voltage Noise Density en f = 1 kHz 25 nV/√Hz

f = 1 MHz, AV = 1 71 Ω

OUT

= 10 kΩ, VO = ±14.7 V 102 dB

L

= 100 kΩ to GND 14.975 V

L

= 10 kΩ to GND 14.900 V

L

= 10 kΩ to GND −14.950 V

L

Rev. 0 | Page 5 of 16

ADA4091-2

www.BDTIC.com/ADI

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter Rating

Supply Voltage 36 V
Input Voltage

Differential Input Voltage1 ±VSY
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range –65°C to +150°C
Operating Temperature Range –40°C to +125°C
Junction Temperature Range –65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C

1

Input current should be limited to ±5 mA.

Refer to the Input
Overvoltage Protection
section

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the device soldered on a 4-layer JEDEC
standard PCB with zero air flow.

Table 6. Thermal Resistance

Package Type θJA θJC Unit

8-Lead SOIC (R-8) 155 45 °C/W

ESD CAUTION

Rev. 0 | Page 6 of 16

ADA4091-2

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

200

180

160

140

120

100

80

FREQUENCY

60

40

20

0

–250 –200 –150 –100 –50 0 50 100 150 200 250

VOS (µV)

Figure 2. Input Offset Voltage Distribution

300

250

ADA4091-2
–40°C  T

= ±1.5V

V

SY

ADA4091-2
T

= 25°C

A

V

= ±1.5V

SY

 +125°C

A

1-034
0767

10,000

1000

100

VDD – V

TO RAIL ( mV)

10

OUT

V

1

0.1

0.001 0.01 0.1 1 10 100

OH

VOL – V

SS

LOAD CURRENT (mA)

ADA4091-2
V

Figure 5. Dropout Voltage vs. Load Current

100

PHASE

80

= ±1.5V

SY

07671-017

100

80

200

150

FREQUENCY

100

50

0

–1012345678

TCVOS (µV/°C)

Figure 3. Input Offset Voltage vs. Temperature

350

ADA4091-2
V

= ±1.5V

SY

300

250

200

150

100

(nA)

B

I

50

0

–50

–100

–150

–1.5 –1.0 –0.5 0 0.5 1.0 1.5

+85°C

–40°C

+125°C

+25°C

VCM (V)

Figure 4. Input Bias Current vs. Input Common-Mode Voltage

60

40

20

OPEN-LOOP GAIN (dB)

ADA4091-2

0

V

= ±1.5V

SY

R

= 1M

L

C

= 35pF

L

–20

671-035
07

1k 10k 100k 1M 10M

GAIN

FREQUENCY (Hz)

60

40

20

0

–20

PHASE (Degrees)

07671-007

Figure 6. Open-Loop Gain and Phase vs. Frequency

50

AV = 100

40

30

AV = 10

20

10

AV = 1

0

CLOSED-LOOP GAIN (dB)

ADA4091-2

–10

V

= ±1.5V

SY

R

= 1M

L

C

= 35pF

L

–20

10 100 1k 10k 100 k 1M 10M

07671-033

FREQUENCY (Hz)

07671-010

Figure 7. Closed-Loop Gain vs. Frequency

Rev. 0 | Page 7 of 16

ADA4091-2

www.BDTIC.com/ADI

1k

100

AV = 100

()

10

OUT

Z

0.1

AV = 10

1

10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

AV = 1

ADA4091-2
T
V

Figure 8. Output Impedance vs. Frequency

2.0

1.5

1.0

0.5

(V)

0

OUT

V

–0.5

–1.0

–1.5

–2.0

0 5 10 15 20 25 30 35 40 45 50

ADA4091-2
V

= ±1.5V

SY

T

= 25°C

A

R

= 100k

L

C

= 100pF

L

A

= +1

V

TIME (µs)

Figure 9. Large Signal Transient Response

= 25°C

A

= ±1.5V

SY

3

07671-01

025

07671-

3.0

2.5

2.0

1.5

SWING (V)

OUT

V

1.0

ADA4091-2

0.5
V

= ±1.5V

SUPP

V

= 2.8V p-p

IN

R

= 100k

L

0

100 1k 10k 100k 1M

FREQUENCY (Hz)

Figure 11. Output Swing vs. Frequency

225

200

175

150

125

100

FREQUENCY

75

50

25

0

–250 –200 –150 –100 –50 0 50 100 150 200 250

VOS (µV)

ADA4091-2
T

A

V

SY

Figure 12. Input Offset Voltage Distribution

= 25°C

= ±5V

07671-036

07671-037

0.06

0.04

0.02

0

(V)

OUT

–0.02

V

–0.04

–0.06

–0.08

01234567891011121314151617181920

ADA4091-2
V

= ±1.5V

SY

T

= 25°C

A

R

= 100k

L

C

= 100pF

L

A

= +1

V

TIME (µs)

Figure 10. Small Signal Transient Response

07671-028

Rev. 0 | Page 8 of 16

400

350

300

250

200

FREQUENCY

150

100

50

0

–1012345678

TCVOS (µV/°C)

ADA4091-2
–40°C  T
V

= ±5V

SY

Figure 13. Input Offset Voltage vs. Temperature

 +125°C

A

07671-038

ADA4091-2

www.BDTIC.com/ADI

= 25°C

A

= ±5V

SY

100

80

60

40

20

0

–20

07671-012

07671-015

PHASE (Degrees)

07671-005

6

4

2

(V)

0

OUT

V

–2

–4

–6

0 5 10 15 20 25 30 35 40 45 50

ADA4091-2
V

= ±5V

SY

T

= 25°C

A

R

= 100k

L

C

= 100pF

L

A

= +1

V

TIME (µs)

Figure 14. Large Signal Transient Response

0.06

0.04

0.02

0

(V)

OUT

–0.02

V

–0.04

–0.06

–0.08

01234567891011121314151617181920

ADA4091-2
V

= ±5V

SY

T

= 25°C

A

R

= 100k

L

C

= 100pF

L

A

= +1

V

TIME (µs)

Figure 15. Small Signal Transient Response

500

ADA4091-2
V

= ±5V

SY

400

300

200

(nA)

B

I

100

0

–100

–200

–5 –4 –3 –2 –1 0 32145

+125°C

+85°C

–40°C

VCM (V)

+25°C

Figure 16. Input Bias Current vs. Common-Mode Voltage

100

PHASE

80

60

40

20

OPEN-LOOP GAIN (dB)

ADA4091-2

0

V

= ±5V

SY

R

= 1M

L

C

= 35pF

L

–20

1k 10k 100k 1M 10M

07671-026

GAIN

FREQUENCY (Hz)

Figure 17. Open-Loop Gain and Phase vs. Frequency

1k

100

()

OUT

Z

07671-029

AV = 100

10

AV = 10

1

AV = 1

0.1
10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

ADA4091-2
T
V

Figure 18. Output Impedance vs. Frequency

10

9

8

7

6

5

SWING (V)

4

OUT

V

3

2

ADA4091-2
V

= ±5V

SY

1

V

= 9.8V p-p

IN

R

= 100k

L

0

100 1k 10k 100k 1M

07671-032

FREQUENCY (Hz)

Figure 19. Output Voltage Swing vs. Frequency

Rev. 0 | Page 9 of 16

ADA4091-2

www.BDTIC.com/ADI

10,000

1000

100

TO RAIL (mV)

10

OUT

V

1

0.1

0.001 0.01 0.1 1 10 100

Figure 20. Dropout Voltage vs. Load Current

50

AV = 100

40

30

AV = 10

20

10

A

= 1

V

0

CLOSED-LOOP GAIN (dB)

ADA4091-2

–10

V

= ±5V

SY

R

= 1M

L

C

= 35pF

L

–20

10 100 1k 10k 100k 1M 10M

Figure 21. Closed-Loop Gain vs. Frequency

250

200

VDD – V

OH

LOAD CURRENT (mA)

FREQUENCY (Hz)

VOL – V

SS

ADA4091-2

= ±5V

V

SY

ADA4091-2
T

= 25°C

A

V

= ±15V

SY

350

300

250

200

150

FREQUENCY

100

50

0

–1012345678

07671-018

TCVOS (µV/°C)

ADA4091-2
T

= –40°C AND +12 5°C

A

V

= ±15V

SY

07671-042

Figure 23. Offset Voltage TC

700

ADA4091-2
V

= ±15V

SY

600

500

400

300

200

(nA)

B

I

100

0

–100

–200

09

07671-0

–300

–15 –10 –5 0 5 10 15

+85°C

VCM (V)

+125°C

+25°C

–40°C

07671-031

Figure 24. Input Bias Current vs. Common-Mode Voltage

100

PHASE

80

100

80

150

100

FREQUENCY

50

0

–250 –200 –150 –100 –50 0 50 100 150 200 250

VOS (µV)

07671-041

Figure 22. Input Offset Voltage Distribution

Rev. 0 | Page 10 of 16

60

40

20

OPEN-LOOP GAIN (dB)

ADA4091-2

0

V

= ±15V

SY

R

= 1M

L

C

= 35pF

L

–20

1k 10k 100k 1M 10M

GAIN

FREQUENCY (Hz)

Figure 25. Open-Loop Gain and Phase vs. Frequency

60

40

20

0

–20

PHASE (Degrees)

07671-006

ADA4091-2

www.BDTIC.com/ADI

20

15

10

5

(V)

0

OUT

V

–5

–10

–15

–20

–25 0 25 50 75 100 125 150 175 200

ADA4091-2
V

= ±15V

SY

T

= 25°C

A

R

= 100k

L

C

= 100pF

L

A

= +1

V

TIME (µs)

Figure 26.Large Signal Transient Response

0.06

0.04

0.02

0

(V)

OUT

–0.02

V

–0.04

–0.06

–0.08

01234567891011121314151617181920

ADA4091-2
V

= ±15V

SY

T

= 25°C

A

R

= 100k

L

C

= 100pF

L

A

= +1

V

TIME (µs)

Figure 27. Small Signal Transient Response

35

30

25

20

SWING (V)

15

OUT

V

10

ADA4091-2

5

V

= ±15V

SY

V

= 29.8V p-p

IN

R

= 100k

L

0

100 1k 10k 100k 1M

FREQUENCY (Hz)

Figure 28. Output Voltage Swing vs. Frequency

07671-027

07671-030

07671-016

10,000

1000

VDD – V

100

TO RAIL ( mV)

10

OUT

V

1

0.1

0.001 0.01 0.1 1 10 100

LOAD CURRENT (mA)

OH

VOL – V

SS

ADA4091-2
V

Figure 29. Dropout Voltage vs. Load Current

1k

100

AV = 100

()

10

OUT

Z

AV = 10

1

AV = 1

0.1

10 100 1k 10 k 100k 1M 10M

FREQUENCY (Hz)

ADA4091-2
T
V

Figure 30. Output Impedance vs. Frequency

50

AV = 100

40

30

AV = 10

20

10

AV = 1

0

CLOSED-LOOP GAIN (dB)

–10

ADA4091-2
V

= ±15V

SY

–20

R

= 1M

L

C

= 35pF

L

–30

10 100 1k 1 0k 100k 1M 10M

FREQUENCY (Hz)

Figure 31. Closed-Loop Gain vs. Frequency

= ±15V

SY

= 25°C

A

= ±15V

SY

07671-019

07671-011

07671-008

Rev. 0 | Page 11 of 16

ADA4091-2

–

www.BDTIC.com/ADI

0.5

0.4

0.3

0.2

0.1

0

–0.1

NOISE (µV)

–0.2

–0.3

–0.4

ADA4091-2

= ±15V

V

SY

–0.5

012345678910

TIME (S econds)

Figure 32. Voltage Noise, V p-p

60

ADA4091-2

= ±15V

V

SY

–70

–80

–90

–100

–110

CHANNEL SEPARATIO N (dB)

–120

–130

10 1k 10k 100k

100

FREQUENCY (Hz)

Figure 33. Channel Separation vs. Frequency

110

100

90

80

70

60

50

CMRR (dB)

40

30

20

10

0

100 1k 10k 10 0k 1M 10M

VSY = ±5V, ±15V

VSY = ±1.5V

FREQUENCY (Hz)

ADA4091-2

07671-043

07671-044

07671-002

100

V

80

60

40

PSRR (dB)

20

0

–20

100 1k 10k 100k 1M 10M

PSRR–

FREQUENCY (Hz)

PSRR+

ADA4091-2

= ±1.5V, ±5V, ±15V

SY

07671-003

Figure 35. PSRR vs. Frequency

500

ADA4091-2

= 25°C

T

A

450

400

350

300

250

(µA)

SY

I

200

150

100

50

0

0 5 10 15 20 25 30 35

VSY (V)

07671-004

Figure 36. Supply Current vs. Supply Voltage

Figure 34. CMRR vs. Frequency

Rev. 0 | Page 12 of 16

ADA4091-2

www.BDTIC.com/ADI

THEORY OF OPERATION

The ADA4091-2 is a single-supply, micropower amplifier
featuring rail-to-rail inputs and outputs. To achieve wide input
and output ranges, this amplifier employs unique input and
output stages. In Figure 37, the input stage comprises two
differential pairs, a PNP pair and an NPN pair. These two
stages do not work in parallel. Instead, only one stage is on
for any given input signal level. The PNP stage (Transistor Q1
and Transistor Q2) is required to ensure that the amplifier
remains in the linear region when the input voltage approaches
and reaches the negative rail. Alternatively, the NPN stage
(Transistor Q5 and Transistor Q6) is needed for input voltages
up to and including the positive rail.

For the majority of the input common-mode range, the PNP
stage is active, as shown in Figure 4. Notice that the bias current
switches direction at approximately 1.5 V below the positive
rail. At voltages below this level, the bias current flows out of
the ADA4091-2, from the PNP input stage. Above this voltage,
however, the bias current enters the device, due to the NPN
stage. The actual mechanism within the amplifier for switching
between the input stages comprises Transistor Q3, Transistor Q4,
and Transistor Q7. As the input common-mode voltage
increases, the emitters of Q1 and Q2 follow that voltage plus
a diode drop. Eventually, the emitters of Q1 and Q2 are high
enough to turn on Q3, which diverts the tail current away from
the PNP input stage, turning it off. Instead, the current is
mirrored through Q4 and Q7 to activate the NPN input stage.

A common practice in bipolar amplifiers to protect the input
transistors from large differential voltages is to include series
resistors and differential diodes. (See Figure 39 for the full input
protection circuitry.) These diodes turn on whenever the diffe­rential voltage exceeds approximately 0.6 V. In this condition,
current flows between the input pins, limited only by the two
5 kΩ resistors. Evaluate each circuit carefully to make sure that
the increase in current does not affect performance.

The output stage in the ADA4091-2 device uses a PNP and
an NPN transistor, as do most output stages. However, Q32
and Q33, the output transistors, are actually connected with
their collectors to the output pin to achieve the rail-to-rail
output swing.

As the output voltage approaches either the positive or negative
rail, these transistors begin to saturate. Thus, the final limit
on output voltage is the saturation voltage of these transistors,
which is about 50 mV. The output stage does have inherent gain
arising from the collectors and any external load impedance.
Because of this, the open-loop gain of the op amp is dependent
on the load resistance.

+IN

Q1

Q2

Q4

–IN

Q3

Q5 Q6

Q7

Figure 37. Simplified Schematic without Input Protection (see Figure 39)

Q9

Q10Q8

Q11

Q13 Q15

Q14Q12

Q16

Q17

Q18 Q19

Q32

Q33

07671-024

Rev. 0 | Page 13 of 16

ADA4091-2

www.BDTIC.com/ADI

INPUT OVERVOLTAGE PROTECTION

The ADA4091-2 has two different ESD circuits for enhanced
protection as shown in Figure 39. One circuit is a series resistor
of 5 k to the internal inputs and diodes (D1 and D2 or D5
and D6) from the internal inputs to the supply rails. The other
protection circuit is a circuit with two DIACs (D3 and D4 or D7
and D8) to the supply rails. A DIAC can be considered a bidi­rectional Zener diode with a transfer characteristic as shown
in Figure 39.

5

4

3

2

1

0

CURRENT (mA)

–1

Additional resistance can be added externally in series with
each input to protect against higher peak voltages, however the
additional thermal noise of the resistors must be considered.

The flatband voltage noise of the ADA4091-2 is approximately
24 nV/√Hz, and a 5 k resistor has a noise of 9 nV/√Hz. Add­ing an additional 5 k resistor increases the total noise by less
than 15% root-sum-square (RSS). Therefore, resistor values
should be kept below this value if overall noise performance is
critical.

Note that this is input protection under abnormal conditions
only. The correct amplifier operation is only specified with an
input voltage range as shown in the Specifications section of
this data sheet.

–2

–3

–40–50 –20 0 20 30–30 10–10 40 50

VOLTAGE (V)

Figure 38. DIAC Transfer Characteristic

For a worst-case design analysis, consider two cases. The
ADA4091-2 has the normal ESD structure from the internal op
amp inputs to the supply rails. In addition, it has 42 V DIACs
from the external inputs to the rails as shown in Figure 37.

Therefore, two conditions have to be considered to determine
which one is the limiting factor.

• Condition 1. Consider, for example, that when operating

on ±15 V, the inputs can go +42 V above the negative
supply rail. With the –V pin equal to −15 V, +42 V above
this supply (the negative supply) is +27 V,

• Condition 2. There is also a restriction on the input current

of 5 mA through a 5 k resistor to the ESD structure to
the positive rail. In Condition 1, +27 V through the 5 k
resistor to +15 V gives a current of 2.4 mA. Thus, the
DIAC is the limiting factor. If the ADA4091-2 supply
voltages are changed to ±5 V, then −5 V + 42 V = 37 V.
However, +5 V + (5 k × 5 mA) = 30 V. Thus, the normal
resistor-diode structure is the limitation when running on
lower supply voltages.

V+

100

07671-

D7

R2

D8

Figure 39. Complete Input Protection Network

D3 D1

D5

D6

R1

D2

D4

V–

07671-023

Rev. 0 | Page 14 of 16

ADA4091-2

www.BDTIC.com/ADI

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DESIGN.

85

1

1.27 (0.0500)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-A A

BSC

6.20 (0.2441)

5.80 (0.2284)

4

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

8°
0°

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

0.40 (0.0157)

45°

012407-A

Figure 40. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADA4091-2ARZ-R2
ADA4091-2ARZ-R7
ADA4091-2ARZ-RL

1

Z = RoHS Compliant Part.

1

−40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8

1

−40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8

1

−40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8

Rev. 0 | Page 15 of 16

ADA4091-2

www.BDTIC.com/ADI

NOTES

©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07671-0-10/08(0)

Rev. 0 | Page 16 of 16