ANALOG DEVICES ADA4075-2 Service Manual

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Ultralow Noise Amplifier at Lower Power

FEATURES

Ultralow noise: 2.8 nV/√Hz at 1 kHz typical Ultralow distortion: 0.0002% typical Low supply current: 1.8 mA per amplifier typical Offset voltage: 1 mV maximum Bandwidth: 6.5 MHz typical Slew rate: 12 V/μs typical Unity-gain stable Extended industrial temperature range SOIC package

APPLICATIONS

Precision instrumentation Professional audio Active filters Low noise amplifier front end Integrators

GENERAL DESCRIPTION

The ADA4075-2 is a dual, high performance, low noise operational amplifier combining excellent dc and ac characteristics on the Analog Devices, Inc., iPolar® process. The iPolar process is an advanced bipolar technology implementing vertical junction isolation with lateral trench isolation. This allows for low noise performance amplifiers in smaller die size at faster speed and lower power. Its high slew rate, low distortion, and ultralow noise make the ADA4075-2 ideal for high fidelity audio and high performance instrumentation applications. It is also especially useful for lower power demands, small enclosures, and high density applications. The ADA4075-2 is specified for the temperature range of −40°C to +125°C and is available in a standard SOIC package.
ADA4075-2

PIN CONFIGURATION

OUTA
1
ADA4075-2
–INA
2
+INA
TOP VIEW
3
(Not to Scale)
4
V–
Figure 1. 8-Lead SOIC
Table 1. Low Noise Precision Op Amps
Supply 44 V 36 V 12 V to 16 V 5 V
Single OP27 AD8671 AD8665 AD8605 AD8675 OP162 AD8655 AD797 AD8691 Dual OP275 AD8672 AD8666 AD8606 AD8676 OP262 AD8656 AD8599 AD8692 Quad ADA4004-4 AD8668 AD8608 AD8674 OP462 AD8694
8
7
6
5
V+
OUTB
–INB
+INB
7642-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.
ADA4075-2
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TABLE OF CONTENTS

Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
Power Sequencing ........................................................................ 4
ESD Caution .................................................................................. 4
Typical Performance Characteristics ............................................. 5

REVISION HISTORY

10/08—Revision 0: Initial Version
Applications Information .............................................................. 15
Input Protection ......................................................................... 15
Total Harmonic Distortion ....................................................... 15
Phase Reversal ............................................................................ 15
DAC Output Filter...................................................................... 16
Balanced Line Driver ................................................................. 17
Balanced Line Receiver .............................................................. 18
Low Noise Parametric Equalizer .............................................. 19
Schematic ......................................................................................... 20
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 21
Rev. 0 | Page 2 of 24
ADA4075-2
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SPECIFICATIONS

VSY = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 0.2 1 mV
−40°C TA ≤ +125°C 1.2 mV Input Bias Current IB 30 100 nA
−40°C TA ≤ +125°C 150 nA Input Offset Current IOS 5 50 nA
−40°C TA ≤ +125°C 75 nA Input Voltage Range −40°C ≤ TA ≤ +125°C −12.5 +12.5 V Common-Mode Rejection Ratio CMRR VCM = −12.5 V to +12.5 V 110 118 dB
−40°C TA ≤ +125°C 106 dB Large-Signal Voltage Gain AVO R
−40°C TA ≤ +125°C 108 dB R
−40°C TA ≤ +125°C 106 dB Offset Voltage Drift ∆VOS/∆T −40°C TA ≤ +125°C 0.3 μV/°C Input Resistance RIN 40 MΩ Input Capacitance, Differential Mode C Input Capacitance, Common Mode C
2.4 pF
INDM
2.1 pF
INCM
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
−40°C TA ≤ +125°C 12.5 V R
−40°C TA ≤ +125°C 12 V V
−40°C TA ≤ +125°C 15 V Output Voltage Low VOL R
−40°C TA ≤ +125°C −13 V R
−40°C TA ≤ +125°C −12.5 V V
−40°C TA ≤ +125°C −15.5 V Short-Circuit Current ISC 40 mA Closed-Loop Output Impedance Z
f = 100 kHz, AV = 1 0.3 Ω
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR VSY = ±4.5 V to ±18 V 106 110 dB
−40°C TA ≤ +125°C 100 dB Supply Current per Amplifier ISY V
−40°C TA ≤ +125°C 3.35 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ, AV = 1 12 V/μs Settling Time tS To 0.01%, VIN = 10 V step, RL = 1 kΩ 3 μs Gain Bandwidth Product GBP RL = 1 MΩ, CL = 35 pF, AV = 1 6.5 MHz Phase Margin ΦM R
THD + NOISE
Total Harmonic Distortion and Noise THD + N RL = 2 kΩ, AV = 1, VIN = 3 V rms, f = 20 Hz to 20 kHz 0.0002 %
NOISE PERFORMANCE
Voltage Noise en p-p f = 0.1 Hz to 10 Hz 60 nV p-p Voltage Noise Density en f = 1 kHz 2.8 nV/√Hz Current Noise Density in f = 1 kHz 1.2 pA/√Hz
= 2 kΩ, VO = −11 V to +11 V 114 117 dB
L
= 600 Ω, VO = −10 V to +10 V 112 117 dB
L
= 2 kΩ to GND 12.8 13 V
L
= 600 Ω to GND 12.4 12.8 V
L
= ±18 V, RL = 600 Ω to GND 15.4 15.8 V
SY
= 2 kΩ to GND −14 −13.6 V
L
= 600 Ω to GND −13.6 −13 V
L
= ±18 V, RL = 600 Ω to GND −16.6 −16 V
SY
= ±4.5 V to ±18 V, IO = 0 mA 1.8 2.25 mA
SY
= 1 MΩ, CL = 35 pF, AV = 1 60 Degrees
L
Rev. 0 | Page 3 of 24
ADA4075-2
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ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating
Supply Voltage ±20 V Input Voltage ±VSY Input Current1 ±10 mA Differential Input Voltage ±1 V Output Short-Circuit Duration to GND Indefinite Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C
1
The input pins have clamp diodes to the power supply pins.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. This was measured using a standard 2-layer board.
Table 3. Thermal Resistance
Package Type θJA θ
8-Lead SOIC 158 43 °C/W
Unit
JC

POWER SEQUENCING

The op amp supplies must be established simultaneously with, or before, any input signals are applied. If this is not possible, the input current must be limited to 10 mA.

ESD CAUTION

Rev. 0 | Page 4 of 24
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TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, unless otherwise noted.
250
200
VSY = ±15V V
= 0V
CM
250
200
VSY = ±5V V
= 0V
CM
150
100
NUMBER OF AMPLIFIERS
50
0
–1.0 –0. 5 0 0. 5 1. 0
VOS (mV)
Figure 2. Input Offset Voltage Distribution
70
60
50
40
30
20
NUMBER OF AMPLIFIERS
10
VSY = ±15V –40°C T
A
+125°C
150
100
NUMBER OF AMPL IFIERS
50
0
–1.0 –0. 5 0 0. 5 1.0
07642-003
VOS (mV)
07642-006
Figure 5. Input Offset Voltage Distribution
80
70
60
50
40
30
NUMBER OF AMPLIFIERS
20
10
VSY = ±5V –40°C T
+125°C
A
0
–2.0 –1. 6 –1.2 –0.8 –0.4 0 0.4 0. 8 1.2 1.6 2.0
TCVOS (V/°C)
Figure 3. Input Offset Voltage Drift Distribution
300
200
100
(V)
0
OS
V
–100
–200
–300
–15 –10 –5 0 5 10 15
VCM (V)
VSY = ±15V
Figure 4. Input Offset Voltage vs. Common-Mode Voltage
07642-004
07642-005
Rev. 0 | Page 5 of 24
0
–2.0 –1. 6 –1.2 –0.8 –0.4 0 0.4 0. 8 1.2 1.6 2.0
TCVOS (V/°C)
Figure 6. Input Offset Voltage Drift Distribution
300
200
100
(V)
0
OS
V
–100
–200
–300
–5 –4 –3 –2 –1 0 1 2 3 4 5
VCM (V)
VSY = ±5V
Figure 7. Input Offset Voltage vs. Common-Mode Voltage
07642-007
07642-008
ADA4075-2
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80
VSY = ±15V
100
VSY = ±5V
60
40
(nA)
B
I
20
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (° C)
Figure 8. Input Bias Current vs. Temperature
60
VSY = ±15V
50
40
30
(nA)
B
I
20
80
60
(nA)
B
I
40
20
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
07642-009
TEMPERATURE (° C)
07642-012
Figure 11. Input Bias Current vs. Temperature
60
VSY = ±5V
50
40
30
(nA)
B
I
20
10
0
–15 –10 –5 0 5 10 15
VCM (V)
Figure 9. Input Bias Current vs. Input Common-Mode Voltage
10
VCC – V
OH
1
VOL – V
EE
OUTPUT VOLTAGE TO SUPPLY RAIL (V)
0.1
0.001 0.01 0.1 1 10 100
LOAD CURRENT (mA)
VSY = ±15V
Figure 10. Output Voltage to Supply Rail vs. Load Current
10
0
4–3–2–101234
07642-047
VCM (V)
07642-049
Figure 12. Input Bias Current vs. Input Common-Mode Voltage
10
VCC – V
OH
1
OUTPUT VOLTAGE TO SUPPLY RAIL (V)
0.1
0.001 0.01 0.1 1 10 100
07642-010
VOL – V
EE
LOAD CURRENT (mA)
VSY = ±5V
07642-013
Figure 13. Output Voltage to Supply Rail vs. Load Current
Rev. 0 | Page 6 of 24
ADA4075-2
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2.5
2.0
1.5
1.0
VCC – V
V
– V
OL
VSY = ±15V R
= 2k
L
OH
EE
2.0
1.5
1.0
VCC – V
VOL – V
OH
EE
VSY = ±5V R
= 2k
L
0.5
OUTPUT VOLTAGE TO SUPPLY RAIL (V)
0 –40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (° C)
Figure 14. Output Voltage to Supply Rail vs. Temperature
140
120
100
80
60
40
20
0
GAIN (dB)
–20
–40
–60
–80
–100
1k 10k 100k 1M 10M 100M
PHASE
GAIN
FREQUENCY (Hz)
VSY = ±15V
Figure 15. Open-Loop Gain and Phase vs. Frequency
140
120
100
80
60
40
20
0
–20
–40
–60
–80
–100
07642-011
PHASE (Degrees)
07642-015
0.5
OUTPUT VOLTAGE TO SUPPLY RAIL (V)
0 –40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (° C)
Figure 17. Output Voltage to Supply Rail vs. Temperature
140
120
100
80
60
40
20
0
GAIN (dB)
–20
–40
–60
–80
1k 10k 100k 1M 10M 100M
GAIN
PHASE
FREQUENCY (Hz)
Figure 18. Open-Loop Gain and Phase vs. Frequency
VSY = ±5V
140
120
100
80
60
40
20
0
–20
–40
–60
–80
–100–100
07642-014
PHASE (Degrees)
07642-018
50
AV = +100
40
30
AV = +10
20
10
AV = +1
GAIN (dB)
0
–10
–20
–30
1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
VSY = ±15V
±15V
07642-016
Figure 16. Closed-Loop Gain vs. Frequency
Rev. 0 | Page 7 of 24
50
AV = +100
40
30
AV = +10
20
10
AV = +1
GAIN (dB)
0
–10
–20
–30
1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
VSY = ±5V
Figure 19. Closed-Loop Gain vs. Frequency
±15V
07642-019
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1k
100
VSY = ±15V
AV = +10
100
1k
VSY = ±5V
AV = +10
10
()
1
OUT
Z
0.1
0.01
0.001 10 100 1k 10k 100k 1M 10M
AV = +100
AV = +1
FREQUENCY (Hz)
Figure 20. Output Impedance vs. Frequency
140
120
100
80
60
CMRR (dB)
40
VSY = ±15V
10
()
1
OUT
Z
0.1
0.01
0.001 10 100 1k 10k 100k 1M 10M
07642-017
AV = +100
FREQUENCY (Hz)
AV = +1
07642-020
Figure 23. Output Impedance vs. Frequency
140
120
100
80
60
CMRR (dB)
40
VSY = ±5V
20
0
100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
Figure 21. CMRR vs. Frequency
120
100
80
60
40
PSRR (dB)
20
0
–20
10 100 1k 10k 100k 1M 10M 100M
PSRR+
FREQUENCY (Hz)
PSRR–
VSY = ±15V
Figure 22. PSRR vs. Frequency
20
0
100 1k 10k 100k 1M 10M
07642-021
FREQUENCY (Hz)
07642-024
Figure 24. CMRR vs. Frequency
120
100
80
60
40
PSRR (dB)
20
0
–20
10 100 1k 10k 100k 1M 10M 100M
7642-022
PSRR+
FREQUENCY (Hz)
PSRR–
VSY = ±5V
07642-025
Figure 25. PSRR vs. Frequency
Rev. 0 | Page 8 of 24
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