ANALOG DEVICES ADA4001-2 Service Manual

Output, JFET Dual Operational Amplifier
Data Sheet
ADA4001-2
10375-002
OUT A
1
–IN A
2
+IN A
3
V–
4
V+
8
OUT B
7
–IN B
6
+IN B
5
ADA4001-2
TOP VIEW
(Not to S cale)

FEATURES

Low TCVOS: ±5 µV/°C typical Low input bias current: 20 pA typical at V Low noise
7.7 nV/√Hz typical at f = 1 kHz
1.2 µV rms at 20 Hz to 20 kHz Low distortion: 0.00006% No phase reversal Rail-to-rail output Unity-gain stable

APPLICATIONS

Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio
Low Noise, Low Input Bias Current, Rail-to-Rail

PIN CONFIGURATION

= ±15 V
SY
Figure 1. 8-Lead SOIC_N (R Suffix)

GENERAL DESCRIPTION

The ADA4001-2 is a dual channel JFET amplifier that features low input voltage noise and current noise, input bias current, and rail-to-rail output.
The combination of low noise and low input bias current makes this amplifier especially suitable for high impedance sensor amplification. With low noise and fast settling times, the
ADA4001-2 provides good accuracy for medical instruments,
electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4001-2 maintains fast settling performance even with substantial capacitive loads, and, unlike many older JFET amplifiers, the ADA4001-2 does not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range.
With fast slew rate and great stability under capacitive loads, the
ADA4001-2 is a good fit for filter applications. With low input
bias currents and noise, it offers a wide dynamic range for photodi­ode amplifier circuits. Low noise and distortion, along with high output current and excellent speed, make the ADA4001-2 a great choice for audio applications.
The ADA4001-2 is specified over the −40°C to +125°C extended industrial temperature range.
The ADA4001-2 is available in an 8-lead narrow SOIC package.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700
www.analog.com
ADA4001-2 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4

REVISION HISTORY

5/12—Rev. A to Rev B
Changes to General Description Section ...................................... 1
Changed Input Impedance to Input Capacitance Throughout .. 3
Added Input Resistance Parameter, Table 1 .................................. 3
Change to Figure 5 Caption ............................................................ 5
2/12—Rev. 0 to Rev. A
Changes to Figure 27 ........................................................................ 9
2/12—Revision 0: Initial Version
Typical Performance Characteristics ..............................................5
Applications Information .............................................................. 10
Total Noise Including Source Resistors ................................... 10
I-V Conversion Applications .................................................... 10
Input Bias Current ...................................................................... 11
Noise Considerations ................................................................. 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
Rev. B | Page 2 of 12
Data Sheet ADA4001-2
RL = 600 Ω, VO = −13.0 V to +13.0 V
90
93 dB
SY
M
Total Harmonic Distortion (THD) + Noise
THD + N
1 kHz, G = +1, RL = 2 kΩ
0.00006
%

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VSY = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS ±0.5 ±1.5 mV
−40°C < TA < +125°C ±2.5 mV Offset Voltage Drift ΔVOS/ΔT ±5 µV/°C Input Bias Current IB 20 30 pA
−40°C < TA < +125°C 4 nA Input Offset Current IOS 20 pA
−40°C < TA < +125°C 2 nA Input Voltage Range −12.5 +12.5 V Common-Mode Rejection Ratio CMRR VCM = −12.5 V to +12.5 V 96 105 dB
−40°C < TA < +125°C 90 dB Large Signal Voltage Gain AVO RL = 10 kΩ, VO = −13.5 V to +13.5 V 104 112 dB
RL = 2 kΩ, VO = −13.5 V to +13.5 V 104 112 dB
−40°C < TA < +125°C 90 dB
Input Capacitance, Differential CDM VCM = 0 V 3.1 pF Input Capacitance, Common-Mode CCM VCM = 0 V 4.8 pF Input Resistance VCM = 0 V >1 × 1013
OUTPUT CHARACTERISTICS
Output Voltage High VOH RL = 10 kΩ 14.8 V RL = 2 kΩ 14.5 V RL = 600 Ω 13.5 V Output Voltage Low VOL RL = 10 kΩ −14.8 V RL = 2 kΩ −14.5 V RL = 600 Ω −13.5 V Short-Circuit Current ISC ±50 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±4.5 V to ±18 V 96 110 dB
−40°C < TA < +125°C 93 dB Operating Voltage Range ±5 ±18 V Supply Current/Amplifier I
4 mA
DYNAMIC PERFORMANCE
Slew Rate SR RL = 2 kΩ ±151 ±25 V/µs Gain Bandwidth Product GBP VIN = 5 mV p-p, RL = 10 kΩ, AV = 100 16.7 MHz Unity-Gain Crossover UGC VIN = 5 mV p-p, RL = 10 kΩ, AV = 1 10.2 MHz Phase Margin φ
−3 dB Closed-Loop Bandwidth −3 dB AV = 1, VIN = 5 mV p-p 10.3 MHz Settling Time tS To 0.01%, 10 V step, G = +1 1.2 µs
VO = 0 V 2 3 mA
76 Degrees
NOISE PERFORMANCE
Voltage Noise en rms 20 Hz to 20 kHz 1.2 μV rms Voltage Noise Density en f = 100 Hz 8.8 nV/√Hz
f = 1 kHz 7.7 nV/√Hz
Current Noise Density in f = 1 kHz 3 fA/√Hz
1
Guaranteed by design and characterization.
Rev. B | Page 3 of 12
ADA4001-2 Data Sheet
Electrostatic Discharge
3000 V
JA
JC

ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating
Supply Voltage ±18 V Input Voltage ±VSY Output Short-Circuit Duration to GND Observe derating curves Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 sec) 300°C
(Human Body Model)
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE

Table 3.
Package Type θ
8-Lead SOIC_N (R-8) 130 45 °C/W
1
θJA is specified for worst-case conditions, that is, θJA is specified for a device
soldered in a circuit board for surface-mount packages.
1
θ
Unit

ESD CAUTION

Rev. B | Page 4 of 12
Data Sheet ADA4001-2
140
160
180
200
120 100
80
60 40
20
0
–800
–700
–600
–500
–400
–300
–200
–100
0
100
200
300
400
500
600
700
800
OFFSET VOLTAGE (µV)
NUMBER OF CHANNELS
10375-003
ADA4001-2 SOIC V
SY
= ±15V
T
A
= 25°C
140
120
100
80
60
40
20
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
TCVOS (µV/°C)
ADA4001-2 V
SY
= ±15V
T
A
= –40°C TO + 125°C
NUMBER OF AMP LIFIERS
10375-004
300
200
100
0
–100
–200
–300
–15 –10 –5 0 5 10 15
COMMON-MODE INPUT VOLTAGE (V)
INPUT OFFSET VOLTAGE (µV)
10375-005
ADA4001-2 V
SY
= ±15V
T
A
= –40°C TO + 125°C
UNIT 3
UNIT 2
UNIT 1
15
10
5
0
–5
–10
–15
–15 –10 –5 0 5 10 15
COMMON-MODE INPUT VOLTAGE (V)
INPUT BIAS CURRE NT (pA)
10375-006
ADA4001-2 SOIC
V
SY
= ±15V
T
A
= 25°C
R
L
=
THREE UNIT S
100
75
50
25
0
–25
–50
–15 –10 –5
+85°C
+125°C
–40°C
0 5 10 15
COMMON-MODE INPUT VOLTAGE (V)
INPUT BIAS CURRE NT (pA)
10375-007
ADA4001-2 SOIC
V
SY
= ±15V
R
L
=
+25°C
10
1
0.1
0.01
0.1 1 10 100 I
OUT
SOURCE (mA)
V
DD
– V
OUT
(V)
10375-008
ADA4001-2 V
SY
= ±15V
T
A
= 25°C

TYPICAL PERFORMANCE CHARACTERISTICS

TA = 25°C, unless otherwise noted.
Figure 2. Input Offset Voltage Distribution
Figure 3. TCVOS Distribution
Figure 5. Input Bias Current vs. Common-Mode Voltage
Figure 6. Input Bias Current vs. VCM and Temperature
Figure 4. Input Offset Voltage vs. Common-Mode Voltage
Figure 7. Dropout Voltage vs. Source Current
Rev. B | Page 5 of 12
ADA4001-2 Data Sheet
10
1
0.1
0.01
0.10.01 1 10 100 I
OUT
SINK (mA)
V
OUT
– V
SS
(V)
10375-009
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
120 270
225
180
135
90
45
0
–45
–90
100
80
60
40
20
0
–20
–40
0.01 0.1 1 10 100 1k 10k 100k
FREQUENCY ( kHz )
GAIN (dB)
PHASE (Degrees)
10375-012
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
50
30
10
–10
–30
1 10 100 1k 10k 100k
FREQUENCY ( kHz )
GAIN (dB)
10375-013
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
AV = +100
AV = +10
AV = +1
1k
100
10
1
0.1
0.01
10.1 10 100 1k 10k 100k FREQUENCY ( kHz )
Z
OUT
(Ω)
10375-014
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
A
V
= +100
A
V
= +10
A
V
= +1
120
100
80
60
40
20
0
–20
10.1 10 100 1k 10k FREQUENCY ( kHz )
PSRR (dB)
10375-015
PSRR–
PSRR+
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
120
140
100
80
60
40
20
0
10.1
10 100 1k 10k
FREQUENCY ( kHz )
CMRR (dB)
10375-016
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
Figure 8. Dropout Voltage vs. Sink Current
Figure 9. Open-Loop Gain and Phase vs. Frequency
Figure 11. Closed-Loop Output Impedance vs. Frequency
Figure 12. PSRR vs. Frequency
Figure 10. Closed-Loop Gain vs. Frequency
Figure 13. CMRR vs. Frequency
Rev. B | Page 6 of 12
Data Sheet ADA4001-2
12
0.1%
0.01%
10
8
6
4
2
0
0 0.2 0.4 0.6 0.8 1.0 1.2
SETTLING TIME (µs)
STEP SIZE (V)
10375-029
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
12
8
10
4
6
0
2
–4
–2
–8
–6
–12
–10
0 2 4 6 81 3 5 7 9 10
TIME (µs)
VOLTS (V)
10375-030
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
75
50
25
0
–25
–50
–75
0 2 4 6 8 10
TIME (µs)
VOLTAGE (mV)
10375-017
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
12
0.1%
0.01%
10
8
6
4
2
0
0 0.2 0.4 0.6 0.8 1.0 1.2
SETTLING TIME (µs)
STEP SIZE (V)
10375-018
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
100
10
1
0.001
0.01
0.1 1 10 100
FREQUENCY ( kHz )
VOLTAGE NOISE DENSITY (nV/ Hz)
10375-021
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
40
45
50
35
30
0
25
20 15
10
5
0.01 0.1 1 CAPACITANCE (nF)
OVERSHOOT (%)
10375-022
OS–
OS+
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
A
V
= +1
Figure 14. Settling Time Positive Step
Figure 15. Large Signal Transient Response
Figure 17. Settling Time Negative Step
Figure 18. Voltage Noise Density
Figure 16. Small Signal Transient Response
Figure 19. Overshoot vs. Load Capacitance
Rev. B | Page 7 of 12
ADA4001-2 Data Sheet
–40
–60
–100
–80
–120
–140
–160
0.01 0.1 1 10 100 FREQUENCY ( kHz )
CHANNEL SEPARAT ION (dB)
10375-031
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
1
0.1
0.01
0.001
0.0001
0.00001
0.10.010.001 1 10
AMPLIT UDE ( V rms)
THD + N (%)
10375-024
ADA4001-2 V
SY
= ±15V
F
IN
= 1kHz
T
A
= 25°C
R
L
= 2kΩ
0.01
0.001
0.0001
0.00001
10.10.01 10 100
FREQUENCY ( kHz )
THD + N (%)
10375-025
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
R
L
= 2kΩ
500kHz FILTER
80kHz FILTER
20
15
10
5
0
–5
–10
–15
–20
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
TIME (ms)
VOLTS (V)
10375-026
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
OUTPUT INPUT
12
8
10
4
6
0
2
–4
–2
–8
–6
–12
–10
0 0.4 0.8 1.2 1.60.2 0.6 1.0 1.4 1.8 2.0
TIME (µs)
VOLTS (V)
10375-032
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
12
8
10
4
6
0
2
–4
–2
–8
–6
–12
–10
0 0.4 0.8 1.2 1.60.2 0.6 1.0 1.4 1.8 2.0
TIME (µs)
VOLTS (V)
10375-033
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
A
V
= +1
R
L
= 2kΩ
C
L
= 100pF
Figure 20. Channel Separation
Figure 21. THD + N vs. Amplitude
Figure 23. No Phase Reversal
Figure 24. Positive Slew Rate
Figure 22. THD + N vs. Frequency
Figure 25. Negative Slew Rate
Rev. B | Page 8 of 12
Data Sheet ADA4001-2
300
200
100
0
–100
–200
–300
0 1 2 3 4 5 6 7 8 9 10
TIME (sec)
VOLTAGE (nV)
10375-027
ADA4001-2 V
SY
= ±15V
T
A
= 25°C
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0 ±2 ±4 ±6 ±8 ±10 ±12 ±14 ±16 ±18
V
SY
(V)
I
SY
FOR BOTH AMPLIFIERS (mA)
10375-028
ADA4001-2 NO LOAD A
V
= +1
V
CM
= 0V
+125°C +85°C +25°C –40°C
Figure 26. Peak-to-Peak Voltage Noise
Figure 27. Supply Current vs. Supply Voltage and Temperature
Rev. B | Page 9 of 12
ADA4001-2 Data Sheet

APPLICATIONS INFORMATION

TOTAL NOISE INCLUDING SOURCE RESISTORS

The low input current noise and input bias current of the
ADA4001-2 makes it the ideal amplifier for circuits with
substantial input source resistance. Input offset voltage increases by less than 15 nV per 500 Ω of source resistance at room temperature. The total noise density of the circuit is
nTOTAL
2
where:
e
is the input voltage noise density of the part.
n
i
is the input current noise density of the part.
n
R
is the source resistance at the noninverting terminal.
S
k is Boltzmann’s constant (1.38 × 10 T is the ambient temperature in Kelvin (T = 273 + °C).
< 4 kΩ, en dominates and e
For R
S
noise of the ADA4001-2 is so low that its total density does not become a significant term unless R 100 MΩ, an impractical value for most applications.
The total equivalent rms noise over a specific bandwidth is expressed as
nTOTALnTOTAL
where
BW is the bandwidth in hertz.
Note that the previous analysis is valid for frequencies larger than 150 Hz and assumes flat noise above 10 kHz. For lower frequencies, flicker noise (1/f) must be considered.

I-V CONVERSION APPLICATIONS

Photodiode Circuits

Common applications for I-V conversion include photodiode circuits where the amplifier is used to convert a current emitted by a diode placed at the positive input terminal into an output voltage.
The ADA4001-2 low input bias current, wide bandwidth, and low noise makes it an excellent choice for various photodiode applications, including fax machines, fiber optic controls, motion sensors, and bar code readers.
The circuit shown in Figure 28 uses a silicon diode with zero bias voltage. This is known as a photovoltaic mode; this configuration limits the overall noise and is suitable for instrumentation applications.
2

nn
kTRRiee 4
nTO TAL
BWee
SS
–23
J/K).
≈ e
. The current
n
is greater than
S
Cf
R2
V
EE
4
2
ADA4001-2
Rd Ct
Figure 28. Equivalent Preamplifier Photodiode Circuit
3
1
8
V
CC
10375-034
A larger signal bandwidth can be attained at the expense of additional output noise. The total input capacitance (Ct) consists of the sum of the diode capacitance and the amplifier’s input capacitance (8 pF), which includes external parasitic capacitance. Ct creates a pole in the frequency response that can lead to an unstable system. To ensure stability and optimize the bandwidth of the signal, a capacitor is placed in the feedback loop of the circuit shown in Figure 28. It creates a zero and yields a bandwidth whose corner frequency is 1/(2π(R2Cf)).
The value of R2 can be determined by the ratio
V/I
D
where:
V is the desired output voltage of the op amp. I
is the diode current.
D
For example, if I
is 100 μA and a 10 V output voltage is desired,
D
R2 should be 100 kΩ. Rd (see Figure 28) is a junction resistance that drops typically by a factor of 2 for every 10°C increase in temperature.
A typical value for Rd is 1000 MΩ. Because Rd >> R2, the circuit behavior is not impacted by the effect of the junction resistance. The maximum signal bandwidth is
MAX
CtR
22
ft
f
where ft is the unity gain frequency of the amplifier. Cf can be calculated by
Cf
Ct
ftR
22
where ft is the unity gain frequency of the op amp, and it achieves a phase margin, φ
, of approximately 45°.
M
A higher phase margin can be obtained by increasing the value of Cf. Setting Cf to twice the previous value yields approximately
= 65° and a maximal flat frequency response, but it reduces the
φ
M
maximum signal bandwidth by 50%.
Rev. B | Page 10 of 12
Data Sheet ADA4001-2

INPUT BIAS CURRENT

Because the ADA4001-2 has a JFET input stage, the input bias current, due to the reverse-biased junction, has a leakage current that approximately doubles every 10°C. The power dissipation of the part, combined with the thermal resistance of the package, results in the junction temperature increasing 30°C above ambient. This parameter is tested with high speed ATE equipment, which does not result in the die temperature reaching equilibrium. This is correlated with bench measurements to match the guaranteed maximum at room temperature in Table 1.
The input current can be reduced by keeping the temperature as low as possible and using a light load on the output.

NOISE CONSIDERATIONS

The JFET input stage offers very low input voltage noise and input current noise. The thermal noise of a 1 kΩ resistor at room temperature is 4 nV/√Hz, thus low values of resistance should be used for dc-coupled inverting and noninverting amplifier configurations. In the case of transimpedance amplifiers (TIAs), current noise is more important.
The ADA4001-2 is an excellent choice for both of these applications. Analog Devices, Inc., offers a wide variety of low voltage noise and low current noise op amps in a variety of processes optimized for different supply voltage ranges. Refer to the AN-940 Application Note for a complete discussion of noise, calculations, and selection tables for more than three dozen low noise, op amp families.
Rev. B | Page 11 of 12
ADA4001-2 Data Sheet
CONTROL
LING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSI
ONS
(IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER E
QUIVALENTS FOR
REFERENCE ONLYAND ARE NOT APPROPRI
ATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARD
S MS-012-AA
012407-A
0.25 (0.0098)
0.1
7 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45°
8° 0°
1
.75 (0.0688)
1.35 (0.0532)
SEATING
P
LANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00(0.1968) 4
.80(0.1890)
4.00 (0.1574)
3.80
(0.1497)
1.27 (0.0500) BSC
6.20 (0.2441)
5.80
(0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLA
NARITY
0.10
©2012 Analog Devices, Inc. All rights reserved. Trademarks and

OUTLINE DIMENSIONS

Figure 29. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model1 Temperature Range Package Description Package Option
ADA4001-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8 ADA4001-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 ADA4001-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8
1
Z = RoHS Compliant Part.
registered trademarks are the property of their respective owners. D10375-0-5/12(B)
Rev. B | Page 12 of 12
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