Analog Devices AD9059BRS, AD9059-PCB Datasheet

a

14

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12

11

10

17
16
15

19
18

20

28
27
26
25
24
23
22
21

9

8

1
2
3
4

7

6

5

TOP VIEW

(Not to Scale)

AD9059

AINA

V

D

ENCODE

GND

AINB

VREF

PWRDN

V

D

D7B (MSB)

V

DD

GND

GND

V

DD

D7A (MSB)

D6A
D5A
D4A

D4B

D5B

D6B

D3A
D2A
D1A

D0A (LSB)

D3B

D0B (LSB)

D1B

D2B

Dual 8-Bit, 60 MSPS A/D Converter

AD9059

FEATURES
Dual 8-Bit ADCs on a Single Chip
Low Power: 400 mW Typical
On-Chip +2.5 V Reference and T/Hs
1 V p-p Analog Input Range
Single +5 V Supply Operation
+5 V or +3 V Logic Interface
120 MHz Analog Bandwidth
Power-Down Mode: < 12 mW

APPLICATIONS
Digital Communications (QAM Demodulators)
RGB & YC/Composite Video Processing
Digital Data Storage Read Channels
Medical Imaging
Digital Instrumentation

PRODUCT DESCRIPTION

The AD9059 is a dual 8-bit monolithic analog-to-digital con­verter optimized for low cost, low power, small size, and ease of
use. With a 60 MSPS encode rate capability and full-power
analog bandwidth of 120 MHz typical, the component is ideal
for applications requiring multiple ADCs with excellent dy­namic performance.

To minimize system cost and power dissipation, the AD9059
includes an internal +2.5 V reference and dual track-and-hold
circuits. The ADC requires only a +5 V power supply and an
encode clock. No external reference or driver components are
required for many applications.

The AD9059’s single encode input is TTL/CMOS compatible
and simultaneously controls both internal ADC channels. The
parallel 8-bit digital outputs can be operated from +5 V or +3 V
supplies. A power-down function may be exercised to bring to­tal consumption to < 12 mW when ADC data is not required
for lengthy periods of time. In power-down mode the digital
outputs are driven to a high impedance state.

Fabricated on an advanced BiCMOS process, the AD9059
is available in a space saving 28-lead surface mount plastic
package (28 SSOP) and is specified over the industrial
(–40°C to +85°C) temperature range.

Customers desiring single channel digitization may consider the
AD9057, a single 8-bit, 60 MSPS monolithic based on the
AD9059 ADC core. The AD9057 is available in a 20-lead sur­face mount plastic package (20 SSOP) and is specified over the
industrial temperature range.

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

FUNCTIONAL BLOCK DIAGRAM

AINA

VREF

AINB

V

D

T/H

T/H

PWRDN

AD9059

+2.5V

GND

ADC

ADC

V

DD

8

ENCODE

8

D7A–D0A

D7B–D0B

A

B

PIN CONFIGURATION

© Analog Devices, Inc., 1996

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] Fax: [phone]

AD9059–SPECIFICA TIONS

ELECTRICAL CHARACTERISTICS

(VD = +5 V, VDD = +3 V; external reference; ENCODE = 60 MSPS unless otherwise noted)

AD9059BRS

Parameter Temp Test Level Min Typ Max Units

RESOLUTION 8 Bits
DC ACCURACY

Differential Nonlinearity +25°C I 0.75 2.0 LSB

Full VI 2.5 LSB

Integral Nonlinearity +25°C I 0.75 2.0 LSB

Full VI 2.5 LSB
No Missing Codes Full VI GUARANTEED
Gain Error

Gain Tempco

1

1

+25°C I –6 –2.5 +6 % FS

Full VI –8 +8 % FS

Full V ±70 ppm/°C

ANALOG INPUT

Input Voltage Range (Centered at +2.5 V) +25°C V 1.0 V p-p
Input Offset Voltage +25°C I –15 0 +15 mV

Full VI –25 +25 mV
Input Resistance +25°C V 150 kΩ
Input Capacitance +25°CV 2 pF
Input Bias Current +25°CI 616µA
Analog Bandwidth +25°C V 120 MHz

CHANNEL MATCHING (A to B)

Gain Delta +25°CV ±1% FS
Input Offset Voltage Delta +25°CV ±4mV

BANDGAP REFERENCE

Output Voltage Full VI 2.4 2.5 2.6 V
Temperature Coefficient Full V ±10 ppm/°C

SWITCHING PERFORMANCE

Maximum Conversion Rate Full VI 60 MSPS
Minimum Conversion Rate Full IV 5 MSPS
Aperture Delay (t
Aperture Uncertainty (Jitter) +25°C V 5 ps, rms
Output Valid Time (t
Output Propagation Delay (tPD)

DYNAMIC PERFORMANCE

) +25°C V 2.7 ns

A

2

)

V

2

3

Full IV 4.0 6.6 ns

Full IV 9.5 14.2 ns

Transient Response +25°CV 9 ns
Overvoltage Recovery Time +25°CV 9 ns
Signal-to-Noise Ratio (SINAD) (with Harmonics)

f

= 10.3 MHz +25°C I 40 44.5 dB

IN

f

= 76 MHz +25°C V 43.5 dB

IN

Effective Number of Bits

f

= 10.3 MHz +25°C I 6.35 7.1 Bits

IN

f

= 76 MHz +25°C V 6.9 Bits

IN

Signal-to-Noise Ratio (SNR) (Without Harmonics)

f

= 10.3 MHz +25°C I 42 46 dB

IN

f

= 76 MHz +25°CV 45 dB

IN

2nd Harmonic Distortion

f

= 10.3 MHz +25°C I –50 –62 dBc

IN

f

= 76 MHz +25°C V –54 dBc

IN

3rd Harmonic Distortion

f

= 10.3 MHz +25°C I –46 –60 dBc

IN

f

= 76 MHz +25°C V –54 dBc

IN

Two-Tone Intermodulation Distortion (IMD) +25°C V –52 dBc
Channel Crosstalk Rejection +25°C V –50 dBc
Differential Phase +25°C V 0.8 Degrees
Differential Gain +25°C V 1.0 %

–2–

REV. 0

AD9059

WARNING!

ESD SENSITIVE DEVICE

AD9059BRS

Parameter Temp Test Level Min Typ Max Units

DIGITAL INPUTS

Logic “1” Voltage Full VI 2.0 V
Logic “0” Voltage Full VI 0.8 V
Logic “1” Current Full VI ±1 µA
Logic “0” Current Full VI ±1 µA
Input Capacitance +25°C V 4.5 pF
Encode Pulse Width High (t
Encode Pulse Width Low (tEL) +25°C IV 6.7 166 ns

DIGITAL OUTPUTS

Logic “1” Voltage (V
Logic “1” Voltage (V
Logic “0” Voltage (V

DD
DD
DD

Output Coding Offset Binary Code

POWER SUPPLY

V

Supply Current (VD = +5 V) Full VI 72 92 mA

D

V

Supply Current (VDD = +3 V)

DD

Power Dissipation

5, 6

Power-Down Dissipation Full VI 6 12 mW
Power Supply Rejection Ratio (PSRR) +25°C I 15 mV/V

NOTES

1

Gain error and gain temperature coefficient are based on the ADC only (with a fixed +2.5 V external reference).

2

tV and tPD are measured from the 1.5 V level of the ENCODE to the 10%/90% levels of the digital output swing. The digital output load during test is not to exceed
an ac load of 10 pF or a dc current of ±40 µA.

3

SNR/harmonics based on an analog input voltage of –0.5 dBFS referenced to a 1.0 V full-scale input range.

4

Digital supply current based on VDD = +3 V output drive with <10 pF loading under dynamic test conditions.

5

Power dissipation is based on 60 MSPS encode and 10.3 MHz analog input dynamic test conditions (VD = +5 V ± 5%, VDD = +3 V ± 5%).

6

Typical thermal impedance for the RS style (SSOP) 28-pin package: θJC = 39°C/W, θCA = 70°C/W, θJA = 109°C/W.

Specifications subject to change without notice.

) +25°C IV 6.7 166 ns

EH

= +3 V) Full VI 2.95 V
= +5 V) Full IV 4.95 V
= +3 V or +5 V) Full VI 0.05 V

4

Full VI 13 15 mA

Full VI 400 505 mW

EXPLANATION OF TEST LEVELS

Test Level

I – 100% production tested.
II – 100% production tested at +25°C and sample tested at

specified temperatures.
III – Sample tested only.
IV – Parameter is guaranteed by design and characteriza-

tion testing.
V – Parameter is a typical value only.

VI – 100% production tested at +25°C; guaranteed by

design and characterization testing for industrial tem-

perature range.

ABSOLUTE MAXIMUM RATINGS*

VD, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7 V

Analog Inputs . . . . . . . . . . . . . . . . . . . . . –0.5 V to V

Digital Inputs . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V

V

Input . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VD + 0.5 V

REF

Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

Operating Temperature . . . . . . . . . . . . . . . . .–55°C to +125°C

Storage Temperature . . . . . . . . . . . . . . . . . . .–65°C to +150°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.

ORDERING GUIDE

Model Temperature Range Package Option

AD9059BRS –40°C to +85°C RS-28
AD9059/PCB +25°C Evaluation Board

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9059 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

+ 0.5 V

D

+ 0.5 V

D

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–3–

AD9059

AIN

ENCODE

DIGITAL

OUTPUTS

N N + 3 N + 5

N + 1

t

A

tEHt

EL

t

V

N – 3 N – 2 N – 1 N N + 1 N + 2

t

PD

t

APERTURE DELAY

A

t

PULSE WIDTH HIGH

EH

t

PULSE WIDTH LOW

EL

t

OUTPUT VALID TIME

V

t

OUTPUT PROP DELAY

PD

N + 2

N + 4

MIN TYP

2.7ns

6.7ns

6.7ns

4.0ns

6.6ns

9.5ns

MAX

166ns
166ns

14.2ns

Figure 1. Timing Diagram

PIN CONFIGURATION

AINA

VREF

PWRDN

GND

V

D7A (MSB)

D6A
D5A
D4A
D3A
D2A
D1A

D0A (LSB)

V

D

DD

1
2
3
4
5

AD9059

6

TOP VIEW

(Not to Scale)

7
8

9
10
11
12
13
14

28

AINB

27

GND

26

ENCODE

25

V

24

GND

23

V

22

D7B (MSB)

21

D6B
D5B

20
19

D4B

18

D3B

17

D2B

16

D1B

15

D0B (LSB)

D

DD

PIN DESCRIPTIONS

Pin No. Name Function

1, 28 AINA, AINB Analog Inputs for ADC A and B.
2 VREF Internal Voltage Reference (+2.5 V

Typical); Bypass with 0.1 µF to
Ground or Overdrive with External
Voltage Reference.

3 PWRDN Power-Down Function Select;

Logic HIGH for Power-Down
Mode (Digital Outputs Go to High­Impedance State).

4, 25 V

D

Analog +5 V Power Supply.
5, 24, 27 GND Ground.
6, 23 V

DD

Digital Output Power Supply.

Nominally +3 V to +5 V.
7–14 D7A–D0A Digital Outputs of ADCA.
22–15 D7B–D0B Digital Outputs of ADCB.
26 ENCODE Encode Clock for ADCs A and B

(ADCs Sample Simultaneously On

the Rising Edge of ENCODE).

Table I. Digital Coding (VREF = +2.5 V)

Analog Input Voltage Level Digital Output

3.0 V Positive Full Scale 1111 1111

2.502 V Midscale + 1/2 LSB 1000 0000

2.498 V Midscale – 1/2 LSB 0111 1111

2.0 V Negative Full Scale 0000 0000

–4–

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