FEATURES
8-Bit, Low Power ADC: 200 mW Typical
120 MHz Analog Bandwidth
On-Chip 2.5 V Reference and T/H
1 V p-p Analog Input Range
Single 5 V Supply Operation
5 V or 3 V Logic Interface
Power-Down Mode: < 10 mW
Three Performance Grades (40 MSPS, 60 MSPS, 80 MSPS)
APPLICATIONS
Digital Communications (QAM Demodulators)
RGB and YC/Composite Video Processing
Digital Data Storage Read Channels
Medical Imaging
Digital Instrumentation
PRODUCT DESCRIPTION
The AD9057 is an 8-bit monolithic analog-to-digital converter
optimized for low cost, low power, small size, and ease of use.
With a 40 MSPS, 60 MSPS, or 80 MSPS encode rates capability and full-power analog bandwidth of 120 MHz, the component
is ideal for applications requiring excellent dynamic performance.
To minimize system cost and power dissipation, the AD9057
includes an internal 2.5 V reference and a track-and-hold
circuit. The user must provide only a 5 V power supply and an
encode clock. No external reference or driver components are
required for many applications.
The AD9057’s encode input is TTL/CMOS compatible and the
8-bit digital outputs can be operated from 5 V or 3 V supplies. A
power-down function may be exercised to bring total consumption to < 10 mW. In power-down mode the digital outputs are
driven to a high impedance state.
Fabricated on an advanced BiCMOS process, the AD9057 is
available in a space saving 20-lead surface mount plastic package (20 SSOP) and is specified over the industrial (–40°C to
+85°C) temperature range.
AD9057
FUNCTIONAL BLOCK DIAGRAM
D
T/H
+2.5V
GND
V
AIN
V
GND
GND
D
D
1k⍀
1
2
3
4
5
6
7
8
9
10
AD9057
(Not to Scale)
PWRDNV
ADC
ENCODE
20
19
18
AD9057
TOP VIEW
17
16
15
14
13
12
11
DD
D0 (LSB)
D1
D2
D3
GND
V
DD
D4
D5
D6
D7 (MSB)
8
D7–D0
V
AIN
BIAS OUT
VREF IN
VREF OUT
Customers desiring multichannel digitization may consider the
AD9059, a dual 8-bit, 60 MSPS monolithic based on the
AD9057 ADC core. The AD9059 is available in a 28-lead surface mount plastic package (28 SSOP) and is specified over the
industrial temperature range.
PIN CONFIGURATION
PWRDN
VREF OUT
VREF IN
BIAS OUT
ENCODE
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
VDD Supply Current (VDD = 3 V)4FullVI4.06.55.56.57.48.8mA
Power Dissipation
5, 6
FullVI192260205260220281mW
Power-Down DissipationFullVI610610610mW
Power Supply Rejection Ratio
(PSRR)25°CI151515mV/V
NOTES
1
Gain error and gain temperature coefficient are based on the ADC only (with a fixed 2.5 V external reference).
2
tV and tPD are measured from the 1.5 V level of the ENCODE to the 10%/90% levels of the digital output swing. The digital output load during test is not to exceed
an ac load of 10 pF or a dc current of ± 40 µA.
3
SNR/harmonics based on an analog input voltage of –0.5 dBFS referenced to a 1.0 V full-scale input range.
4
Digital supply current based on VDD = 3 V output drive with <10 pF loading under dynamic test conditions.
5
Power dissipation is based on specified encode and 10.3 MHz analog input dynamic test conditions (VD = 5 V ± 5%, VDD = 3 V ± 5%).
6
Typical thermal impedance for the RS style (SSOP) 20-lead package: θJC = 46°C/W, θCA = 80°C/W, θJA = 126°C/W.
Specifications subject to change without notice.
EXPLANATION OF TEST LEVELS
Test LevelDescription
I100% Production Tested
II100% Production Tested at 25°C and Sample
Tested at Specified Temperatures
IIISample Tested Only
IVParameter is Guaranteed by Design and Char-
acterization Testing
VParameter is a Typical Value Only
VI100% Production Tested at 25°C; Guaran-
Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C
Maximum Case Temperature . . . . . . . . . . . . . . . . . . . 150°C
ORDERING GUIDE
Temperature
ModelRangePackage Option*
AD9057BRS–40, –60, –80–40°C to +85°C RS-20
AD9057/PCB25°CEvaluation Board
*RS = Shrink Small Outline (SSOP).
Table I. Digital Coding (VREF = 2.5 V)
Analog InputVoltage LevelDigital Output
3.0 VPositive Full Scale1111 1111
2.502 VMidscale +1/2 LSB1000 0000
2.498 VMidscale –1/2 LSB0111 1111
2.0 VNegative Full Scale0000 0000
PIN FUNCTION DESCRIPTIONS
Pin No.MnemonicFunction
1PWRDNPower-Down Function Select;
Logic HIGH for Power-Down
Mode (Digital Outputs Go to
High Impedance State).
2VREF OUTInternal Reference Output
(2.5 V typ); Bypass with 0.1 µF
to Ground.
3VREF INReference Input for ADC (2.5 V
typ, ± 10%)
4, 9, 16GNDGround (Analog/Digital)
5, 8V
D
Analog 5 V Power Supply
6BIAS OUTBias Pin for AC Coupling
(1 kΩ to REF IN)
7AINAnalog Input for ADC
10ENCODEEncode Clock for ADC (ADC
Samples on Rising Edge of
ENCODE)
11–14, 17–20D7–D4, D3–D0Digital Outputs of ADC
15V
DD
Digital Output Power Supply;
Nominally 3 V to 5
V.
PIN CONFIGURATION
1
PWRDN
VREF IN
GND
AIN
GND
V
D
V
D
2
3
4
AD9057
5
TOP VIEW
(Not to Scale)
6
7
8
9
10
VREF OUT
BIAS OUT
ENCODE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9057 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
20
D0 (LSB)
D1
19
D2
18
D3
17
GND
16
15
V
DD
14
D4
13
D5
12
D6
D7 (MSB)
11
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. C
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