Analog Devices AD8561 Datasheet

Ultrafast 7 ns

ⴙIN
ⴚIN

Vⴚ

OUT
GND

LATCH

OUT

1

45

8

AD8561

Vⴙ

a

FEATURES
7 ns Propagation Delay at 5 V
Single Supply Operation: 3 V to 10 V
Low Power
Latch Function
TSSOP Packages

APPLICATIONS
High Speed Timing
Clock Recovery and Clock Distribution
Line Receivers
Digital Communications
Phase Detectors
High Speed Sampling
Read Channel Detection
PCMCIA Cards
Upgrade for LT1016 Designs

GENERAL DESCRIPTION

The AD8561 is a single 7 ns comparator with separate input and
output sections. Separate supplies enable the input stage to be

operated from ±5 V dual supplies and +5 V single supplies.

Fast 7 ns propagation delay makes the AD8561 a good choice
for timing circuits and line receivers. Propagation delays for
rising and falling signals are closely matched and track over
temperature. This matched delay makes the AD8561 a good
choice for clock recovery, since the duty cycle of the output will
match the duty cycle of the input.

The AD8561 has the same pinout as the LT1016, with lower
supply current and a wider common-mode input range, which
includes the negative supply rail.

The AD8561 is specified over the industrial (–40°C to +85°C)

temperature range. The AD8561 is available in both the 8-lead
plastic DIP, 8-lead TSSOP or narrow SO-8 surface mount
packages.

Single Supply Comparator

PIN CONFIGURATIONS

8-Lead Narrow Body SO

(SO-8)

ⴙIN
ⴚIN

Vⴙ

Vⴚ

AD8561

OUT

OUT
GND

LATCH

8-Lead TSSOP

(RU-8)

AD8561

8-Lead Plastic DIP

(N-8)

8

7

6

5

ⴙIN
ⴚIN

Vⴙ

1

2

3

4

AD8561

OUT

OUT
GND
LATCHVⴚ

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

AD8561–SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

(@ V+ = +5.0 V, V– = V

= 0 V, TA = +25ⴗC unless otherwise noted)

GND

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage V

OS

–40°C ≤ T

Offset Voltage Drift ∆V

Input Bias Current I

Input Offset Current I
Input Common-Mode Voltage Range V

/∆T4µV/°C

OS

B

I

B

OS

CM

V

= 0 V –6 –3 µA

CM

–40°C ≤ TA ≤ +85°C –7 –3.5 µA

V

= 0 V ±4 µA

CM

Common-Mode Rejection Ratio CMRR 0 V ≤ V

R

Large Signal Voltage Gain A
Input Capacitance C

VO

IN

= 10 kΩ 3000 V/V

L

≤ +85°C8mV

A

0.0 +3.0 V

≤ +3.0 V 65 85 dB

CM

2.3 7 mV

3.0 pF

LATCH ENABLE INPUT

Logic “1” Voltage Threshold V
Logic “0” Voltage Threshold V
Logic “1” Current I
Logic “0” Current I

IH

IL

IH

IL

V

= 3.0 V –1.0 –0.3 µA

LH

V

= 0.3 V –4 –2 µA

LL

2.0 1.65 V

1.60 0.8 V

Latch Enable

Pulsewidth t
Setup Time t
Hold Time t

PW(E)

S

H

6ns
1ns

1.2 ns

DIGITAL OUTPUTS

Logic “1” Voltage V
Logic “1” Voltage V
Logic “0” Voltage V

OH

OH

OL

I

= –50 µA, ∆V

OH

I

= –3.2 mA, ∆V

OH

I

= 3.2 mA, ∆V

OL

> 250 mV 3.5 V

IN

> 250 mV 2.4 3.5 V

IN

> 250 mV 0.25 0.4 V

IN

DYNAMIC PERFORMANCE␣

Propagation Delay t

Propagation Delay t

P

P

200 mV Step with 100 mV Overdrive 6.75 9.8 ns

–40°C ≤ T

≤ +85°C813ns

A

100 mV Step with 5 mV Overdrive 8 ns

Differential Propagation Delay

(Rising Propagation Delay vs.

Falling Propagation Delay) ∆t

P

100 mV Step with 100 mV Overdrive

1

0.5 2.0 ns

Rise Time 20% to 80% 3.8 ns

Fall Time 80% to 20% 1.5 ns

POWER SUPPLY␣

Power Supply Rejection Ratio PSRR +4.5 V ≤ V+ ≤ +5.5 V 50 65 dB

Positive Supply Current I+ 4.5 6.0 mA

Ground Supply Current I

GND

–40°C ≤ T

VO = 0 V, RL =

–40°C ≤ T

≤ +85°C 7.5 mA

A

∞

≤ +85°C 3.8 mA

A

2.2 3.3 mA

Analog Supply Current I– 2.3 4.5 mA

–40°C ≤ TA ≤ +85°C 5.5 mA

NOTES

1

Guaranteed by design.

Specifications subject to change without notice.

–2– REV. 0

AD8561

ELECTRICAL SPECIFICATIONS

(@ V+ = +5.0 V, V– = V

= 0 V, V– = –5 V, TA = +25ⴗC unless otherwise noted)

GND

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS

Offset Voltage V

OS

–40°C ≤ T

Offset Voltage Drift ∆V

Input Bias Current I

Input Offset Current I
Input Common-Mode Voltage Range V

/∆T4µV/°C

OS

B

I

B

OS

CM

V

= 0 V –6 –3 µA

CM

–40°C ≤ TA ≤ +85°C –7 –2.5 µA

V

= 0 V ±4 µA

CM

Common-Mode Rejection Ratio CMRR –5.0 V ≤ V

R

Large Signal Voltage Gain A
Input Capacitance C

VO

IN

= 10 kΩ 3000 V/V

L

≤ +85°C8mV

A

–5.0 +3.0 V

≤ +3.0 V 65 85 dB

CM

17 mV

3.0 pF

LATCH ENABLE INPUT

Logic “1” Voltage Threshold V
Logic “0” Voltage Threshold V
Logic “1” Current I
Logic “0” Current I

IH

IL

IH

IL

V

= 3.0 V –1 –0.5 20 µA

LH

V

= 0.3 V –4 –2 20 µA

LL

2.0 1.65 V

1.60 0.8 V

Latch Enable

Pulsewidth t
Setup Time t
Hold Time t

PW(E)

S

H

6ns

1.0 ns

1.2 ns

DIGITAL OUTPUTS

Logic “1” Voltage V
Logic “0” Voltage V

OH

OL

IOH = –3.2 mA 2.6 3.5 V
IOL = 3.2 mA 0.2 0.3 V

DYNAMIC PERFORMANCE␣

Propagation Delay t

Propagation Delay t

P

P

200 mV Step with 100 mV Overdrive 6.5 9.8 ns

–40°C ≤ T

≤ +85°C813ns

A

100 mV Step with 5 mV Overdrive 7 ns

Differential Propagation Delay

(Rising Propagation Delay vs.

Falling Propagation Delay) ∆t

P

100 mV Step with 100 mV Overdrive

1

0.5 2 ns

Rise Time 20% to 80% 3.8 ns

Fall Time 80% to 20% 1.5 ns

Dispersion 1ns

POWER SUPPLY

Power Supply Rejection Ratio PSRR ±4.5 V ≤ V

Supply Current V

= 0 V, RL =

O

and V

CC

≤ ±5.5 V 55 70 dB

EE

∞

Positive Supply Current I+ 4.7 6.5 mA

≤ +85°C 7.5 mA

A

∞

≤ +85°C 3.8 mA

A

2.2 3.3 mA

Ground Supply Current I

GND

–40°C ≤ T

VO = 0 V, RL =

–40°C ≤ T

Negative Supply Current I– 2.4 4.5 mA

–40°C ≤ TA ≤ +85°C 5.5 mA

NOTES

1

Guaranteed by design.

Specifications subject to change without notice.

–3–REV. 0

AD8561–SPECIFICATIONS

WARNING!

ESD SENSITIVE DEVICE

ELECTRICAL SPECIFICATIONS

(@ V+ = +3.0 V, V– = V

= 0 V, TA = +25ⴗC unless otherwise noted)

GND

Parameter Symbol Conditions Min Typ Max Units

INPUT CHARACTERISTICS␣

Offset Voltage V
Input Bias Current I

Input Common-Mode Voltage Range V

OS

B

I

B

CM

V

= 0 V –6 –3.0 µA

CM

–40°C ≤ TA ≤ +85°C–7–4µA

0 +1.5 V

7mV

Common-Mode Rejection Ratio CMRR 0.1 V ≤ VCM ≤ 1.5 V 60 dB

OUTPUT CHARACTERISTICS␣

Output High Voltage V
Output Low Voltage V

OH

OL

IOH = –3.2 mA, VIN > 250 mV 1.2
IOL = +3.2 mA, VIN > 250 mV 0.3 V

1

V

POWER SUPPLY␣

Power Supply Rejection Ratio PSRR +2.7 V ≤ V

Supply Currents V

= 0 V, RL =

O

, V

≤ +6 V 40 dB

CC

EE

∞

V+ Supply Current I+ 4.0 4.5 mA

≤ +85°C 5.5 mA

A

1.6 2.5 mA

≤ +85°C 3.0 mA

A

Ground Supply Current I

–40°C ≤ T

GND

–40°C ≤ T

V– Supply Current I– 2.4 3.3 mA

–40°C ≤ TA ≤ +85°C 3.8 mA

DYNAMIC PERFORMANCE␣

Propagation Delay t

NOTES

1

Output high voltage without pull-up resistor. It may be useful to have a pull-up resistor to V+ for 3 V operation.

2

Guaranteed by design.

Specifications subject to change without notice.

P

100 mV Step with 20 mV Overdrive

2

8.5 9.8 ns

ABSOLUTE MAXIMUM RATINGS

Total Analog Supply Voltage . . . . . . . . . . . . . . . . . . . . . +14 V

Digital Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . +14 V

Analog Positive Supply–Digital Positive Supply . . . . . –600 mV

Input Voltage

1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±7 V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±8 V

Output Short-Circuit Duration to GND . . . . . . . . . Indefinite

Storage Temperature Range

N, R, RU Package . . . . . . . . . . . . . . . . . . –65°C to +150°C

Operating Temperature Range . . . . . . . . . . . –40°C to +85°C

Package Type ␪

8-Lead Plastic DIP (N) 103 43 °C/W
8-Lead SO (R) 158 43 °C/W
8-Lead TSSOP 240 43 °C/W

NOTES

1

The analog input voltage is equal to ±7 V or the analog supply voltage, whichever

is less.

2

θJA is specified for the worst case conditions, i.e., θ

for P-DIP and θ

TSSOP packages.

is specified for device soldered in circuit board for SOIC and

JA

Junction Temperature Range

N, R, RU Package . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering, 10 sec) . . . . . . . +300°C

ORDERING GUIDE

Temperature Package Package

Model Range Description Options

AD8561AN –40°C to +85°C 8-Lead Plastic DIP N-8
AD8561ARU –40°C to +85°C 8-Lead Thin Shrink Small Outline RU-8
AD8561AR –40°C to +85°C 8-Lead Small Outline IC SO-8

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8561 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

–4– REV. 0

2

JA

␪

JC

is specified for device in socket

JA

Units