ANALOG DEVICES AD8342 Service Manual
Active Receive Mixer
V
FEATURES
Broadband RF, LO, and IF ports
Conversion gain: 3.7 dB
Noise figure: 12.2 dB
Input IP3: 22.7 dBm
Input P1dB: 8.3 dBm
LO drive: 0 dBm
Differential high impedance RF input port
Single-ended, 50 Ω LO input port
Open-collector IF output port
Single-supply operation: 5 V @ 98 mA
Power-down mode
Exposed paddle LFCSP: 3 mm × 3 mm
APPLICATIONS
Cellular base station receivers
ISM receivers
Radio links
RF instrumentation
LF to 3 GHz
AD8342
FUNCTIONAL BLOCK DIAGRAM
PDC PWDN EXRB COMM
9
11
BIAS
2
Figure 1.
10
COMM
8
IFOP
7
6
IFOM
5
COMM
4
3
05352-001
12
COMM
13
RFCM
14
AD8342
RFIN
15
VPMX
16
1
VPLO LOCM LOIN COMM
GENERAL DESCRIPTION
The AD8342 is a high performance, broadband active mixer.
It is well suited for demanding receive-channel applications
that require wide bandwidth on all ports and very low
intermodulation distortion and noise figure.
The AD8342 provides a typical conversion gain of 3.7 dB with
an RF frequency of 238 MHz. The integrated LO driver presents
a 50 Ω input impedance with a low LO drive level, helping to
minimize the external component count.
The differential high impedance broadband RF port allows for
easy interfacing to both active devices and passive filters. The
RF input accepts input signals as large as 1.6 V p-p or 8 dBm
(relative to 50 Ω) at P1dB.
The open-collector differential outputs provide excellent balance
and can be used with a differential filter or IF amplifier, such as
the AD8370, AD8375, AD8351, AD8352, or ADL5561. These
outputs can also be converted to a single-ended signal using a
matching network or a balun transformer. The outputs are
capable of swinging 2 V p-p when biased to the VPOS supply
rail.
The AD8342 is fabricated on an Analog Devices, Inc.,
proprietary, high performance SiGe IC process. The AD8342 is
available in a 16-lead LFCSP. It operates over a −40°C to +85°C
temperature range. An evaluation board is also available.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007–2009 Analog Devices, Inc. All rights reserved.
AD8342
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
AC Performance ........................................................................... 4
Spur Table .......................................................................................... 5
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
REVISION HISTORY
7/09—Rev. A to Rev. B
Changed RF and LO Frequency Range from 2.4 GHz to
3 GHz Throughout ........................................................................... 1
Changes to General Description Section ...................................... 1
Added Endnote 2 .............................................................................. 4
Added Low Frequency Applications Section .............................. 19
Added Figure 56 and Figure 57..................................................... 20
Changes to the Evaluation Board Section ................................... 21
Added Figure 59 to Figure 62 ........................................................ 22
Updated Outline Dimensions ....................................................... 24
Changes to Ordering Guide .......................................................... 24
1/07—Rev. 0 to Rev. A
Changes to Features .......................................................................... 1
Changes to General Description .................................................... 1
Changes to Table 2 ............................................................................ 4
Replaced the High Frequency Applications Section .................. 18
4/05—Revision 0: Initial Version
Typical Performance Characteristics ..............................................8
Circuit Description......................................................................... 14
AC Interfaces ................................................................................... 15
IF Port .......................................................................................... 16
LO Considerations ..................................................................... 17
High Frequency Applications ................................................... 18
Low Frequency Applications .................................................... 19
Evaluation Board ............................................................................ 21
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
Rev. B | Page 2 of 24
AD8342
SPECIFICATIONS
VS = 5 V, TA = 25°C, fRF = 238 MHz, fLO = 286 MHz, LO power = 0 dBm, ZO = 50 Ω, R
terminated into 100 Ω through a 2:1 ratio balun, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
RF INPUT INTERFACE
Return Loss High-Z input terminated with 100 Ω off-chip resistor 10 dB
Input Impedance
DC Bias Level Internally generated; port must be ac-coupled 2.4 V
OUTPUT INTERFACE
Output Impedance Differential impedance, frequency = 48 MHz 10||0.5 kΩ||pF
DC Bias Voltage Supplied externally 4.75 VS 5.25 V
Power Range Via a 2:1 impedance ratio transformer 13 dBm
LO INTERFACE
Return Loss 10 dB
DC Bias Voltage Internally generated; port must be ac-coupled VS − 1.6 V
POWER-DOWN INTERFACE
PWDN Threshold 3.5 V
PWDN Response Time Device enabled, IF output to 90% of its final level 0.4 μs
Device disabled, supply current <5 mA 4 μs
PWDN Input Bias Current Device enabled −80 μA
Device disabled +100 μA
POWER SUPPLY
Positive Supply Voltage 4.75 5 5.25 V
Quiescent Current
VPDC Supply current for bias cells 5 mA
VPMX, IFOP, IFOM Supply current for mixer, R
VPLO Supply current for LO limiting amplifier 35 mA
Total Quiescent Current VS = 5 V 85 98 113 mA
Power-Down Current Device disabled 500 μA
Frequency = 238 MHz (measured at RFIN with RFCM
ac-grounded)
= 1.82 kΩ 58 mA
BIAS
= 1.82 kΩ, RF termination = 100 Ω, IF
BIAS
1||0.4 kΩ||pF
Rev. B | Page 3 of 24
AD8342
AC PERFORMANCE
VS = 5 V, TA = 25°C, LO power = 0 dBm, ZO = 50 Ω, R
unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
1, 2
1
1
3.0 GHz
3.0 GHz
2.4 GHz
RF Frequency Range
LO Frequency Range
IF Frequency Range
Conversion Gain fRF = 460 MHz, fLO = 550 MHz, fIF = 90 MHz 3.2 dB
f
= 238 MHz, fLO = 286 MHz, fIF = 48 MHz 3.7 dB
RF
SSB Noise Figure fRF = 460 MHz, fLO = 550 MHz, fIF = 90 MHz 12.5 dB
f
Input Third-Order Intercept
Input Second-Order Intercept
= 238 MHz, fLO = 286 MHz, fIF = 48 MHz 12.2 dB
RF
= 460 MHz, f
f
RF1
= 90 MHz, f
f
IF1
= 238 MHz, f
f
RF1
f
= 48 MHz, f
IF1
= 460 MHz, f
f
RF1
= 140 MHz
f
IF2
= 238 MHz, f
f
RF1
f
= 98 MHz
IF2
Input 1 dB Compression Point fRF = 460 MHz, fLO = 550 MHz, fIF = 90 MHz 8.5 dBm
f
= 238 MHz, fLO = 286 MHz, fIF = 48 MHz 8.3 dBm
RF
LO to IF Output Leakage LO power = 0 dBm, fLO = 286 MHz −27 dBc
LO to RF Input Leakage LO power = 0 dBm, fLO = 286 MHz −55 dBc
2× LO to IF Output Leakage
LO power = 0 dBm, f
IF terminated into 100 Ω and measured with a differential probe
RF to IF Output Leakage RF power = −10 dBm, fRF = 238 MHz, fLO = 286 MHz −32 dBc
IF/2 Spurious RF power = −10 dBm, fRF = 238 MHz, fLO = 286 MHz −62 dBc
1
See the section for details. High Frequency Applications
2
See the Low Frequency Applications section for details.
= 1.82 kΩ, RF termination 100 Ω, IF terminated into 100 Ω via a 2:1 ratio balun,
BIAS
= 461 MHz, fLO = 550 MHz,
RF2
= 89 MHz, each RF tone −10 dBm
IF2
= 239 MHz, fLO = 286 MHz,
RF2
= 47 MHz, each RF tone −10 dBm
IF2
= 410 MHz, fLO = 550 MHz, f
RF2
= 188 MHz, fLO = 286 MHz, f
RF2
= 238 MHz, fLO = 286 MHz
RF
= 90 MHz,
IF1
= 48 MHz,
IF1
22.2 dBm
22.7 dBm
50 dBm
44 dBm
−47 dBm
Rev. B | Page 4 of 24
AD8342
SPUR TABLE
VS = 5 V, TA = 25°C, RF and LO power = 0 dBm, fRF = 238 MHz, fLO = 286MHz, ZO = 50 Ω, R
IF terminated into 100 Ω via a 2:1 ratio balun.
Note: Measured using standard test board. Typical noise floor of measurement system = −100 dBm.
Table 3.
m
nf
− mf
RF
0 <−100 −25 −54 −28 −45 −35 −39 −36 −42 −57 −44 −42 −41 −46 −59
1 −32 3.5 −42 −6 −48 −16 −50 −28 −57 −37 −68 −45 −54 −37 −61
2 −52 −47 −51 −49 −54 −56 −56 −62 −62 −66 −71 −80 −80 −67 −79
3 −81 −57 −79 −61 −82 −61 −74 −69 −94 −85 −89 −86 −86 −90 −81
4 −78 −70 −80 −79 −80 −85 −87 −92 −93 −96 −95 <−100 −97 <−100 −95
5 −98 −79 −95 −87 −96 −94 −95 −88 −98 −94 <−100 <−100 <−100 <−100 <−100
6 <−100 <−100 <−100 −99 <−100 −96 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100
n
7 <−100 <−100 <−100 <−100 −96 <−100 −98 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100
8 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −97 <−100 <−100 <−100 <−100 <−100 <−100
9 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −99 <−100 <−100 <−100
10 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −99 <−100 <−100 <−100 <−100
11 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −96 <−100 −97 <−100 −96 <−100 <−100 <−100
12 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −99 <−100 −98 <−100 <−100 <−100 <−100
13 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −97 <−100 −97 −99 <−100 <−100
14 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 −98 −98 <−100 <−100 <−100
15 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100 <−100
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
LO
= 1.82 kΩ, RF termination 100 Ω,
BIAS
Rev. B | Page 5 of 24
AD8342
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage, VS 5.5 V
RF Input Level 12 dBm
LO Input Level 12 dBm
PWDN Pin VS + 0.5 V
IFOP, IFOM Bias Voltage 5.5 V
Minimum Resistor from EXRB to COMM 1.8 kΩ
Internal Power Dissipation 650 mW
θJA 77°C/W
Maximum Junction Temperature 135°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. B | Page 6 of 24
AD8342
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
M
RFIN
VPMX
RFC
COMM
14
13
15
16
PIN 1
INDICATOR
1VPLO
2LOCM
AD8342
3LOIN
TOP VIEW
(Not to Scale)
4COMM
5
6
OMM
IFOM
C
Figure 2. 16-Lead LFCSP
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 VPLO Positive Supply Voltage for the LO Buffer: 4.75 V to 5.25 V.
2 LOCM AC Ground for Limiting LO Amplifier. Internally biased to VS − 1.6 V. AC-couple to ground.
3 LOIN
LO Input. Nominal input level: 0 dBm. Input level range: −10 dBm to +4 dBm (relative to 50 Ω). Internally
biased to V
− 1.6 V. Must be ac-coupled.
S
4, 5, 8, 9, 13 COMM Device Common (DC Ground).
6, 7 IFOM, IFOP Differential IF Outputs (Open Collectors). Each requires dc bias of 5.00 V (nominal).
10 EXRB
Mixer Bias Voltage. Connect resistor from EXRB to ground. Typical value of 1.82 kΩ sets mixer current to
nominal value. Minimum resistor value from EXRB to ground = 1.8 kΩ. Internally biased to 1.17 V.
11 PWDN Connect to Ground for Normal Operation. Connect pin to VS for disable mode.
12 VPDC Positive Supply Voltage for the DC Bias Cell: 4.75 V to 5.25 V.
14 RFCM AC Ground for RF Input. Internally biased to 2.4 V. AC-couple to ground.
15 RFIN RF Input. Internally biased to 2.4 V. Must be ac-coupled.
16 VPMX Positive Supply Voltage for the Mixer: 4.75 V to 5.25 V.
12 VPDC
11 PWDN
10 EXRB
9COMM
8
7
IFOP
COMM
5352-002
Rev. B | Page 7 of 24
AD8342
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25°C, RF power = −10 dBm, LO power = 0 dBm, ZO = 50 Ω, R
100 Ω via a 2:1 ratio balun, unless otherwise noted.
6
= 1.82 kΩ, RF termination 100 Ω, IF terminated into
BIAS
6
5
IF = 48MHz
4
GAIN (dB)
3
IF = 10MHz
2
1
50 550100 150 200 250 300 350 400 450 500
IF = 140MHz
IF = 90MHz
RF FREQ UENCY (MHz)
Figure 3. Conversion Gain vs. RF Frequency
5
IF = 48MHz
4
3
IF = 140MHz
GAIN (dB)
2
1
0
–15 –10 –5 0 5
LO LEVEL (dBm)
IF = 90MHz
IF = 10MHz
Figure 4. Gain vs. LO Level, RF Frequency = 238 MHz
5
RF = 238MHz
4
GAIN (dB)
3
2
05352-004
1
5010 100 150 200 250 300 350
IF FREQUENCY (MHz)
RF = 460MHz
05352-005
Figure 6. Conversion Gain vs. IF Frequency
5.0
4.5
4.0
3.5
3.0
2.5
GAIN (dB)
2.0
1.5
1.0
0.5
05352-025
0
4.75 5.254.85 4.95 5.05 5.15
VPOS (V)
05352-026
Figure 7. Gain vs. VPOS, fRF = 238 MHz, fLO = 286 MHz
5.0
4.5
4.0
3.5
3.0
2.5
GAIN (dB)
2.0
1.5
1.0
0.5
0
–40
–200 20406080
TEMPERATURE (°C)
Figure 5. Gain vs. Temperature, fRF = 238 MHz, fLO = 286 MHz
05352-039
Rev. B | Page 8 of 24
50
NORMAL MEAN = 3. 7
STD. DEV. = 0.06
45
40
35
30
25
20
PERCENTAGE
15
10
5
0
3.40
3.45 3. 50 3.55 3.60 3. 65 3.70 3.75 3.80 3. 85
CONVERSIO N GAIN (238MHz)
3.90
Figure 8. Conversion Gain Distribution, fRF = 238 MHz, fLO = 286 MHz
05352-054
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