Low Power, FET-Input Op Amp
Data Sheet
AD824
1
2
14
13
5
6
7
10
9
8
3
4
12
11
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
AD824
TOP VIEW
(Not to S cale)
00875-001
FEATURES
Single supply operation: 3 V to 30 V
Very low input bias current: 2 pA
Wide input voltage range
Rail-to-rail output swing
Low supply current per amplifier: 500 µA
Wide bandwidth: 2 MHz
Slew rate: 2 V/µs
No phase reversal
APPLICATIONS
Photo diode preamplifier
Battery powered instrumentation
Power supply control and protection
Medical instrumentation
Remote sensors
Low voltage strain gage amplifiers
DAC output amplifier
Single Supply, Rail-to-Rail
PIN CONFIGURATION
Figure 1. 14-Lead SOIC (R Suffix)
GENERAL DESCRIPTION
The AD824 is a quad, FET input, single supply amplifier,
featuring rail-to-rail outputs. The combination of FET inputs
and rail-to-rail outputs makes the AD824 useful in a wide
variety of low voltage applications where low input current is
a primary consideration.
The AD824 is guaranteed to operate from a 3 V single supply
up to ±15 V dual supplies. AD824AR-3V parametric
performance at 3 V is fully guaranteed.
Fabricated on Analog Devices, Inc., complementary bipolar
process, the AD824 has a unique input stage that allows the
input voltage to safely extend beyond the negative supply and
to the positive supply without any phase inversion or latch-up.
The output voltage swings to within 15 mV of the supplies.
Capacitive loads to 350 pF can be handled without oscillation.
The FET input combined with laser trimming provides an input
that has extremely low bias currents with guaranteed offsets
below 1 mV. This enables high accuracy designs even with high
source impedances. Precision is combined with low noise,
making the AD824 ideal for use in battery powered medical
equipment.
Applications for the AD824 include portable medical
equipment, photo diode preamplifiers, and high impedance
transducer amplifiers.
The ability of the output to swing rail-to-rail enables designers
to build multistage filters in single supply systems and maintain
high signal-to-noise ratios.
The AD824 is specified over the extended industrial (−40°C to
+85°C) temperature range and is available in narrow 14-lead
SOIC package.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsi bility is as sumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Anal og Devices.
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AD824 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Specifications ............................................................... 3
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution .................................................................................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 12
REVISION HISTORY
4/15—Rev. D to Rev. E
Change to Figure 1 Caption ............................................................ 1
5/14—Rev. C to Rev. D
Updated Format .................................................................. Universal
Removed 16-Lead SOIC Package (Throughout) .......................... 1
Deleted Wafer Test Limits Section ................................................. 5
Deleted AD824 SPICE Macro-model Section ............................ 15
Changes to Ordering Guide .......................................................... 16
2/03—Rev. B to Rev. C
Deleted N Package .............................................................. Universal
Edits to General Description ........................................................... 1
Edits to Absolute Maximum Ratings ............................................. 5
Edits to Ordering Guide .................................................................. 5
Edits to Figure 4 .............................................................................. 12
Edits to Figure 8 .............................................................................. 13
Updated Outline Dimensions ....................................................... 16
1/02—Rev. A to Rev. B
Edits to Electrical Specifications ................................................. 2, 3
Edits to Absolute Maximum Ratings ............................................. 5
Edits to Ordering Guide .................................................................. 5
Deleted Dice Characteristics ........................................................... 5
Input Characteristics .................................................................. 12
Output Characteristics............................................................... 12
Applications Information .............................................................. 13
Single Supply Voltage-to-Frequency Converter ..................... 13
Single Supply Programmable Gain Instrumentation
Amplifier ..................................................................................... 13
3 V, Single Supply Stereo Headphone Driver ......................... 14
Low Dropout Bipolar Bridge Driver ........................................ 14
A 3.3 V/5 V Precision Sample-and-Hold Amplifier .............. 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
Rev. E | Page 2 of 16
Data Sheet AD824
RL = 10 kΩ
50
100 V/mV
T
to T
±10 mA
Phase Margin
φo
No load
50 Degrees
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
At VS = 5.0 V, VCM = 0 V, V
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (AD824A) VOS 0.1 1.0 mV
T
Input Bias Current IB 2 12 pA
T
Input Offset Current IOS 2 10 pA
T
Input Voltage Range −0.2 +3.0 V
Common-Mode Rejection Ratio CMRR VCM = 0 V to 2 V 66 80 dB
VCM = 0 V to 3 V 60 74 dB
T
Input Impedance 1013||3.3 Ω||pF
Large Signal Voltage Gain AVO VO = 0.2 V to 4.0 V
RL = 2 kΩ 20 40 V/mV
= 0.2 V, TA = 25°C; unless otherwise noted.
OUT
MIN
MIN
MIN
MIN
to T
1.5 mV
MAX
to T
300 4000 pA
MAX
to T
300 pA
MAX
to T
60 dB
MAX
RL = 100 kΩ 250 1000 V/mV
T
MIN
to T
, RL = 100 kΩ 180 400 V/mV
MAX
Offset Voltage Drift ΔVOS/ΔT 2 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH I
T
I
T
Output Voltage Low VOL I
T
I
T
= 20 µA 4.975 4.988 V
SOURCE
to T
MIN
SOURCE
MIN
SINK
MIN
SINK
MIN
4.97 4.985 V
MAX
= 2.5 mA 4.80 4.85 V
to T
4.75 4.82 V
MAX
= 20 µA 15 25 mV
to T
20 30 mV
MAX
= 2.5 mA 120 150 mV
to T
140 200 mV
MAX
Short Circuit Limit ISC Sink/source ±12 mA
MIN
MAX
Open-Loop Impedance Z
f = 1 MHz, AV = 1 100 Ω
OUT
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 12 V 70 80 dB
T
Supply Current/Amplifier ISY T
MIN
MIN
to T
66 dB
MAX
to T
500 600 µA
MAX
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 kΩ, AV = 1 2 V/µs
Full-Power Bandwidth BWP 1% distortion, VO = 4 V p-p 150 kHz
Settling Time tS V
= 0.2 V to 4.5 V, to 0.01% 2.5 µs
OUT
Gain Bandwidth Product GBP 2 MHz
Channel Separation CS f = 1 kHz, RL = 2 kΩ –123 dB
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 2 µV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
Current Noise Density in f = 1 kHz 0.8 fA/√Hz
Total Harmonic Distortion THD f = 10 kHz, RL = ∞, AV = +1 0.005 %
Rev. E | Page 3 of 16
AD824 Data Sheet
Input Bias Current
IB
VCM = 0 V
4 35
pA
Input Voltage Range
−15 +13
V
T
to T
–14.98
–14.97
V
Slew Rate
SR
RL = 10 kΩ, AV = 1
2
V/µs
At VS = ±15.0 V, V
Table 2.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (AD824A) VOS 0.5 2.5 mV
T
= 0 V, TA = 25°C; unless otherwise noted.
OUT
to T
MIN
0.6 4.0 mV
MAX
T
MIN
to T
500 4000 pA
MAX
IB VCM = −10 V 25 pA
Input Offset Current IOS 3 20 pA
T
MIN
to T
500 pA
MAX
Common-Mode Rejection Ratio CMRR VCM = −15 V to 13 V 70 80 dB
T
MIN
to T
66 dB
MAX
Input Impedance 1013||3.3 Ω||pF
Large Signal Voltage Gain AVO VO = −10 V to +10 V;
RL = 2 kΩ 12 50 V/mV
RL = 10 kΩ 50 200 V/mV
RL = 100 kΩ 300 2000 V/mV
T
MIN
to T
, RL = 100 kΩ 200 1000 V/mV
MAX
Offset Voltage Drift ΔVOS/ΔT 2 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH I
T
I
T
Output Voltage Low VOL I
I
T
Short Circuit Limit ISC Sink/source, T
Open-Loop Impedance Z
f = 1 MHz, AV = 1 100 Ω
OUT
= 20 µA 14.975 14.988 V
SOURCE
to T
MIN
SOURCE
MIN
SINK
MIN
SINK
MIN
14.970 14.985 V
MAX
= 2.5 mA 14.80 14.85 V
to T
14.75 14.82 V
MAX
= 20 µA –14.985 –14.975 V
MAX
= 2.5 mA –14.88 –14.85 V
to T
–14.86 –14.8 V
MAX
to T
MIN
±8 ±20 mA
MAX
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 15 V 70 80 dB
T
MIN
to T
68 dB
MAX
Supply Current/Amplifier ISY VO = 0 V 560 625 µA
T
MIN
to T
675 µA
MAX
DYNAMIC PERFORMANCE
Full-Power Bandwidth BWP 1% distortion, VO = 20 V p-p 33 kHz
Settling Time tS V
Gain Bandwidth Product GBP 2 MHz
Phase Margin φo 50 Degrees
Channel Separation CS f = 1 kHz, RL = 2 kΩ –123 dB
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 2 µV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
Current Noise Density in f = 1 kHz 1.1 fA/√Hz
Total Harmonic Distortion THD f =10 kHz, VO = 3 V rms, RL = 10 kΩ 0.005 %
= 0 V to 10 V, to 0.01% 6 µs
OUT
Rev. E | Page 4 of 16
Data Sheet AD824
Input Bias Current
IB 2 12
pA
Common-Mode Rejection Ratio
CMRR
VCM = 0 V to 1 V
58
74 dB
Short Circuit Limit
I
Sink/source
±8 mA
At VS = 3.0 V, VCM = 0 V, V
Table 3.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage (AD824A−3 V ) VOS 0.2 1.0 mV
T
= 0.2 V, TA = 25°C; unless otherwise noted.
OUT
to T
MIN
1.5 mV
MAX
T
MIN
to T
250 4000 pA
MAX
Input Offset Current IOS 2 10 pA
T
MIN
to T
250 pA
MAX
Input Voltage Range 0 1 V
T
MIN
to T
56 dB
MAX
Input Impedance 1013||3.3 Ω||pF
Large Signal Voltage Gain AVO VO = 0.2 V to 2.0 V;
RL = 2 kΩ 10 20 V/mV
RL = 10 kΩ 30 65 V/mV
RL = 100 kΩ 180 500 V/mV
T
MIN
to T
, RL = 100 kΩ 90 250 V/mV
MAX
Offset Voltage Drift ΔVOS/ΔT 2 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH I
T
I
T
Output Voltage Low VOL I
T
I
T
SC
ISC Sink/source, T
Open-Loop Impedance Z
f = 1 MHz, AV = 1 100 Ω
OUT
= 20 µA 2.975 2.988 V
SOURCE
to T
MIN
SOURCE
MIN
SINK
MIN
SINK
MIN
2.97 2.985 V
MAX
= 2.5 mA 2.8 2.85 V
to T
2.75 2.82 V
MAX
= 20 µA 15 25 mV
to T
20 30 mV
MAX
= 2.5 mA 120 150 mV
to T
140 200 mV
MAX
to T
MIN
±6 mA
MAX
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 2.7 V to 12 V, 70 dB
T
Supply Current/Amplifier ISY VO = 0.2 V, T
MIN
to T
66 dB
MAX
to T
MIN
500 600 µA
MAX
DYNAMIC PERFORMANCE
Slew Rate SR RL =10 kΩ, AV = 1 2 V/µs
Full-Power Bandwidth BWP 1% distortion, VO = 2 V p-p 300 kHz
Settling Time tS V
= 0.2 V to 2.5 V, to 0.01% 2 µs
OUT
Gain Bandwidth Product GBP 2 MHz
Phase Margin φo 50 Degrees
Channel Separation CS f = 1 kHz, RL = 2 kΩ –123 dB
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 2 µV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
Current Noise Density in 0.8 fA/√Hz
Total Harmonic Distortion THD f = 10 kHz, RL = ∞, AV = +1 0.01 %
Rev. E | Page 5 of 16
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