Analog Devices AD8174AR-REEL, AD8174AR, AD8174AN, AD8170AR-REEL, AD8170AR, AD8170AN, AD8170-EB Datasheet
a
1
2
3
4
8
7
6
5
AD8170
+1+1
LOGIC
V
OUT
–V
IN
+V
S
IN1
SELECT
GND
–V
S
IN0
10
9
8
+1
AD8174
+1
+1
+1
2
2
14
13
12
11
1
2
3
4
5
6
7
LOGIC
+V
S
V
OUT
–V
IN
SD
ENABLE
A1
A0
IN0
GND
IN1
GND
IN2
–V
S
IN3
250 MHz, 10 ns Switching
Multiplexers w/Amplifier
AD8170/AD8174
FEATURES
Fully Buffered Inputs and Outputs
Fast Channel Switching: 10 ns
Internal Current Feedback Output Amplifier
High Output Drive: 50 mA
Flexible Gain Setting via External Resistor(s)
High Speed
250 MHz Bandwidth, G = +2
1000 V/ms Slew Rate
Fast Settling Time of 15 ns to 0.1%
Low Power: < 10 mA
Excellent Video Specifications (R
= 150 V, G = +2)
L
Gain Flatness of 0.1 dB Beyond 80 MHz
0.02% Differential Gain Error
0.058 Differential Phase Error
Low Crosstalk of –78 dB @ 5 MHz
High Disable Isolation of –88 dB @ 5 MHz
High Shutdown Isolation of –92 dB @ 5 MHz
Low Cost
Fast Output Disable Feature for Connecting Multiple
Devices (AD8174 Only)
Shutdown Feature Reduces Power to 1.5 mA (AD8174 Only)
APPLICATIONS
Pixel Switching for “Picture-In-Picture”
LCD and Plasma Displays
Video Routers
PRODUCT DESCRIPTION
The AD8170(2:1) and AD8174(4:1) are very high speed
buffered multiplexers. These multiplexers offer an internal
current feedback output amplifier whose gain can be programmed via external resistors and is capable of delivering 50
mA of output current. They offer –3 dB signal bandwidth of
250 MHz and slew rate of greater than 1000 V/µs. Additionally,
the AD8170 and AD8174 have excellent video specifications
with low differential gain and differential phase error of 0.02%
and 0.05° and 0.1 dB flatness out to 80 MHz. With a low 78
dB of crosstalk and better than 88 dB isolation, these devices are
useful in many high speed applications. These are low power
devices consuming only 9.7 mA from a ± 5 V supply.
FUNCTIONAL BLOCK DIAGRAM
The AD8174 offers a high speed disable feature allowing the
output to be put into a high impedance state for cascading
stages so that the off channels do not load the output bus.
Additionally, the AD8174 can be shut down (SD) when not in
use to minimize power consumption (I
= 1.5 mA). These
S
products will be offered in 8-lead and 14-lead PDIP and SOIC
packages.
VIN = 50mV rms
G = +2
= 499Ω (AD8170R)
R
F
= 549Ω (AD8174R)
R
F
0.1
= 100Ω
R
L
0
–0.1
–0.2
–0.3
–0.4
NORMALIZED FLATNESS – dB
–0.5
1M10M100M1G
FREQUENCY – Hz
0
–1
–2
–3
–4
–5
–6
–7
NORMALIZED OUTPUT – dB
–8
–9
Figure 1. Small Signal Frequency Response
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Input Voltage Noiseƒ = 10 kHz to 30 MHz10nV/√
+Input Current Noiseƒ = 10 kHz to 30 MHz1.6pA/√
–Input Current Noiseƒ = 10 kHz to 30 MHz8.5pA/√
Total Harmonic Distortionƒ
DC/TRANSFER CHARACTERISTICS
Transresistance400600kΩ
Open-Loop Voltage Gain20006000V/V
Gain Accuracy
9
Gain MatchingChannel-to-Channel0.05%
Input Offset Voltage59mV
Input Offset Voltage MatchingChannel-to-Channel1.55mV
Input Offset Voltage Drift11µV/°C
Input Bias Current(+) Switch Input715µA
Input Bias Current Drift(+) Switch and (–) Buffer Input20nA/°C
AD8170A/AD8174A
Channel-to-Channel
All Inputs Grounded138 /104mV p-p
ENABLE, SD Inputs, T
ENABLE, SD Inputs, T
VO = 50 mV rms, RL = 100 Ω250MHz
VO = 1 V rms, RL = 100 Ω100MHz
VO = 50 mV rms, RF = 499 Ω (AD8170R), RL = 100 Ω
(AD8170R), RF = 549 V (AD8174R) unless otherwise noted)
ENABLE, SD Inputs, T
ENABLE, SD Inputs, T
MIN–TMAX
MIN–TMAX
MIN–TMAX
MIN–TMAX
MIN–TMAX
MIN–TMAX
2.0V
50300nA
15µA
35µA
30300nA
0.8V
Degrees
Hz
Hz
Hz
12mV
15µA
14µA
–2–
REV. 0
AD8170/AD8174
AD8170A/AD8174A
ParameterConditionsMinTypMaxUnits
INPUT CHARACTERISTICS
Input Resistance(+) Switch Input1.7MΩ
Input CapacitanceChannel Enabled (R Package)1.1pF
Input Voltage Range±3.3V
Input Common-Mode Rejection Ratio+CMRR, ∆V
OUTPUT CHARACTERISTICS
Output Voltage SwingR
Output CurrentR
Short Circuit Current180mA
Output ResistanceEnabled10mΩ
Output CapacitanceDisabled (AD8174)7.5pF
POWER SUPPLY
Operating Range±4±6V
Power Supply Rejection Ratio+PSRR+V
Power Supply Rejection Ratio–PSRR–V
Quiescent CurrentAll Channels “ON”, T
OPERATING TEMPERATURE RANGE–40+85°C
NOTES
1
Shutdown (SD) and ENABLE pins are grounded (AD8174). IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc. SELECT (A0 or A1 for AD8174) input is
driven with 0 V to +5 V pulse. Measure transition time from 50% of SELECT (A0 or A1) input value (+2.5 V) and 10% (or 90%) of the total output voltage transition from IN0 (or IN2) channel voltage (+0.5 V) to IN1 (or IN3 = –0.5 V) or vice versa.
2
AD8174 only. Shutdown (SD) pin is grounded. ENABLE pin is driven with 0 V to +5 V pulse (5 ns rise and fall times). State of A0 and A1 logic inputs determines
which channel is activated (i.e., if A0 = Logic 0 and A1 = Logic 1, then IN2 input is selected). Set IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc, and measure transition time from 50% of ENABLE pulse (+2.5 V) to 90% of the total output voltage change. In Figure 5, ∆t
3
AD8174 only. ENABLE pin is grounded. Shutdown (SD) pin is driven with 0 V to +5 V pulse (5 ns rise and fall times). State of A0 and A1 logic inputs determines
which channel is activated (i.e., if A0 = Logic 1 and A1 = Logic O, then IN1 input is selected). Set IN0 (or IN2) = +0.5 V dc, IN1 (or IN3) = –0.5 V dc, and measure transition time from 50% of SD pulse (+2.5 V) to 90% of the total output voltage change. In Figure 6, ∆ t
release time.
4
All inputs are grounded. SELECT (A0 or A1 for AD8174) input is driven with 0 V to +5 V pulse. The outputs are monitored. Speeding the edges of the SELECT
(A0 or A1) pulse increases the glitch magnitude due to coupling via the ground plane.
5
Bandwidth of the multiplexer is dependent upon the resistor feedback network. Refer to Table III for recommended feedback component values, which give the best
compromise between a wide and a flat frequency response.
6
Select input(s) that is (are) not being driven (i.e., if SELECT is Logic 1, activated input is IN1; in AD8174, if A0 = Logic 0, A1 = Logic 1, activated input is IN2).
Drive all other inputs with VIN = 0.707 V rms, and monitor output at f = 5 MHz and 30 MHz; RL = 100 Ω (see Figure 13).
7
AD8174 only. Shutdown (SD) pin is grounded. Mux is disabled, (i.e., ENABLE = Logic 1) and all inputs are driven simultaneously with VIN = 0.354 V rms. Output is monitored at f = 5 MHz and 30 MHz; RL = 100 Ω. In this mode, the output impedance of the disabled mux is very high (typ 10 MΩ), and the signal couples
across the package; the load impedance and the feedback network determine the crosstalk. For instance, in a closed-loop gain of +1, r
(RF = RG = 549 Ω), r
8
AD8174 only. ENABLE pin is grounded. Mux is shutdown (i.e., SD = Logic 1), and all inputs are driven simultaneously with VIN = 0.354 V rms. Output is monitored at f = 5 MHz and 30 MHz; RL = 100 Ω. (see Figure 14). The mux output impedance in shutdown mode is the same as the disabled mux output impedance.
9
For Gain Accuracy expression, refer to Equation 4.
Output Short Circuit Duration . . Observe Power Derating Curves
Storage Temperature Range
N & R Packages . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . .+300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device in free air: 8-Pin Plastic Package: θJA = 90°C/Watt;
AD8170AN–40°C to +85°C8-Pin Plastic DIPN-8
AD8170AR–40°C to +85°C8-Pin SOICSO-8
AD8170AR-REEL –40°C to +85°CReel 8-Pin SOICSO-8
AD8174AN–40°C to +85°C14-Pin Plastic DIPN-14
AD8174AR–40°C to +85°C14-Pin Narrow SOIC R-14
AD8174AR-REEL –40°C to +85°CReel 14-Pin SOICR-14
AD8170-EBEvaluation Board For AD8170R
AD8174-EBEvaluation Board For AD8174R
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
AD8170 and AD8174 is limited by the associated rise in
junction temperature. The maximum safe junction temperature
for plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately +150°C.
Exceeding this limit temporarily may cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of +175°C
for an extended period can result in device failure.
While the AD8170 and AD8174 are internally short circuit
protected, this may not be sufficient to guarantee that the maximum junction temperature (+150°C) is not exceeded under all
conditions. To ensure proper operation, it is necessary to observe
the maximum power derating curves shown in Figures 2 and 3.
Figure 2. AD8170 Maximum Power Dissipation vs.
Temperature
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8170/AD8174 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
Figure 3. AD8174 Maximum Power Dissipation vs.
Temperature
precautions are recommended to avoid performance degradation or loss of functionality.