The AD8038 (single) and AD8039 (dual) amplifiers are high speed
(350 MHz) voltage feedback amplifiers with an exceptionally low
quiescent current of 1.0 mA/amplifier typical (1.5 mA maximum).
The AD8038 single amplifier in the 8-lead SOIC package has a
disable feature. Despite being low power and low cost, the amplifier
provides excellent overall performance. Additionally, it offers a
high slew rate of 425 V/µs and a low input offset voltage of 3 mV
maximum.
The Analog Devices, Inc., proprietary XFCB process allows low
noise operation (8 nV/√Hz and 600 fA/√Hz) at extremely low
quiescent currents. Given a wide supply voltage range (3 V to 12 V),
wide bandwidth, and small packaging, the AD8038 and AD8039
amplifiers are designed to work in a variety of applications
where power and space are at a premium.
The AD8038 and AD8039 amplifiers have a wide input commonmode range of 1 V from either rail and swing to within 1 V of each
rail on the output. These amplifiers are optimized for driving
capacitive loads up to 15 pF. If driving larger capacitive loads, a small
series resistor is needed to avoid excessive peaking or overshoot.
The AD8039 amplifier is available in a 8-lead SOT-23 package,
and the single AD8038 is available in both an 8-lead SOIC and a
5-lead SC70 package. These amplifiers are rated to work over
the industrial temperature range of −40°C to +85°C.
24
G = +10
21
18
15
G = +5
12
9
G = +2
GAIN (dB)
6
3
G = +1
0
–3
–6
FREQUENCY (MHz)
Figu re 4. Small Signal Frequency Response for Various Gains,
V
= 500 mV p-p, VS = ±5 V
OUT
10000.1110100
2951-004
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Edits to TPC 19 .................................................................................. 7
Rev. G | Page 2 of 16
AD8038/AD8039
SPECIFICATIONS
TA = 25°C, VS = ±5 V, RL = 2 kΩ, Gain = +1, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VO = 0.5 V p-p 300 350 MHz
G = +2, VO = 0.5 V p-p 175 MHz
G = +1, VO = 2 V p-p 100 MHz
Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p 45 MHz
Slew Rate G = +1, VO = 2 V step, RL = 2 kΩ 400 425 V/µs
Overdrive Recovery Time G = +2, 1 V overdrive 50 ns
Settling Time to 0.1% G = +2, VO = 2 V step 18 ns
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −90 dBc
Third Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −92 dBc
Second Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −65 dBc
Third Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −70 dBc
Crosstalk, Output-to-Output (AD8039) f = 5 MHz, G = +2 −70 dB
Input Voltage Noise f = 100 kHz 8 nV/√Hz
Input Current Noise f = 100 kHz 600 fA/√Hz
DC PERFORMANCE
Input Offset Voltage 0.5 3 mV
Input Offset Voltage Drift 4.5 µV/°C
Input Bias Current 400 750 nA
Input Bias Current Drift 3 nA/°C
Input Offset Current ±25 nA
Open-Loop Gain VO = ±2.5 V 70 dB
INPUT CHARACTERISTICS
Input Resistance 10 MΩ
Input Capacitance 2 pF
Input Common-Mode Voltage Range RL = 1 kΩ ±4 V
Common-Mode Rejection Ratio VCM = ±2.5 V 61 67 dB
OUTPUT CHARACTERISTICS
DC Output Voltage Swing RL = 2 kΩ, saturated output ±4 V
Capacitive Load Drive 30% overshoot, G = +2 20 pF
POWER SUPPLY
Operating Range 3.0 12 V
Quiescent Current per Amplifier 1.0 1.5 mA
Power Supply Rejection Ratio −Supply −71 −77 dB
+Supply −64 −70 dB
POWER-DOWN DISABLE1
Turn-On Time 180 ns
Turn-Off Time 700 ns
Disable Voltage—Part is Off +VS − 4.5 V
Disable Voltage—Part is On +VS − 2.5 V
Disabled Quiescent Current 0.2 mA
Disabled In/Out Isolation f = 1 MHz −60 dB
1
Only available in AD8038 8-lead SOIC package.
Rev. G | Page 3 of 16
AD8038/AD8039
TA = 25°C, VS = 5 V, RL = 2 kΩ to VS/2, Gain = +1, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VO = 0.2 V p-p 275 300 MHz
G = +2, VO = 0.2 V p-p 150 MHz
G = +1, VO = 2 V p-p 30 MHz
Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p 45 MHz
Slew Rate G = +1, VO = 2 V step, RL = 2 kΩ 340 365 V/µs
Overdrive Recovery Time G = +2, 1 V overdrive 50 ns
Settling Time to 0.1% G = +2, VO = 2 V step 18 ns
NOISE/HARMONIC PERFORMANCE
SFDR
Second Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −82 dBc
Third Harmonic fC = 1 MHz, VO = 2 V p-p, RL = 2 kΩ −79 dBc
Second Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −60 dBc
Third Harmonic fC = 5 MHz, VO = 2 V p-p, RL = 2 kΩ −67 dBc
Crosstalk, Output-to-Output f = 5 MHz, G = +2 −70 dB
Input Voltage Noise f = 100 kHz 8 nV/√Hz
Input Current Noise f = 100 kHz 600 fA/√Hz
DC PERFORMANCE
Input Offset Voltage 0.8 3 mV
Input Offset Voltage Drift 3 V/°C
Input Bias Current 400 750 nA
Input Bias Current Drift 3 nA/°C
Input Offset Current ±30 nA
Open-Loop Gain VO = ±2.5 V 70 dB
INPUT CHARACTERISTICS
Input Resistance 10 MΩ
Input Capacitance 2 pF
Input Common-Mode Voltage Range RL = 1 kΩ 1.0 − 4.0 V
Common-Mode Rejection Ratio VCM = ±1 V 59 65 dB
OUTPUT CHARACTERISTICS
DC Output Voltage Swing RL = 2 kΩ, saturated output 0.9 − 4.1 V
Capacitive Load Drive 30% overshoot 20 pF
POWER SUPPLY
Operating Range 3 12 V
Quiescent Current per Amplifier 0.9 1.5 mA
Power Supply Rejection Ratio −65 −71 dB
POWER-DOWN DISABLE1
Turn-On Time 210 ns
Turn-Off Time 700 ns
Disable Voltage—Part is Off +VS − 4.5 V
Disable Voltage—Part is On +VS − 2.5 V
Disabled Quiescent Current 0.2 mA
Disabled In/Out Isolation f = 1 MHz −60 dB
1
Only available in AD8038 8-lead SOIC package.
Rev. G | Page 4 of 16
AD8038/AD8039
ABSOLUTE MAXIMUM RATINGS
2.0
Table 3.
Parameter Rating
Supply Voltage 12.6 V
Power Dissipation See Figure 5
Common-Mode Input Voltage ±VS
Differential Input Voltage ±4 V
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8038/AD8039
package is limited by the associated rise in junction temperature
(T
) on the die. The plastic encapsulating the die locally reaches
J
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8038/AD8039.
Exceeding a junction temperature of 175°C for an extended
time can result in changes in the silicon devices, potentially
causing failure.
The still-air thermal properties of the package and PCB (θ
ambient temperature (T
package (P
) determine the junction temperature of the die.
D
), and total power dissipated in the
A
The junction temperature can be calculated as
T
= TA + (PD × θJA)
J
The power dissipated in the package (P
) is the sum of the
D
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent power
is the voltage between the supply pins (V
quiescent current (I
). Assuming the load (RL) is referenced to
S
midsupply, then the total drive power is V
) multiplied by the
S
/2 × I
S
, some of which
OUT
is dissipated in the package and some in the load (V
The difference between the total drive power and the load
power is the drive power dissipated in the package.
P
= quiescent power + (total drive power − load power)
D
P
= [VS × IS] + [(VS/2) × (V
D
OUT/RL
)] − [V
OUT
2
/RL]
OUT
× I
JA
OUT
),
).
1.5
1.0
0.5
MAXIMUM POWER DISSIPATION (W)
0
–55
Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
RMS output voltages should be considered. If RL is referenced to
V
, as in single-supply operation, then the total drive power is
S−
V
× I
. If the rms signal levels are indeterminate, consider the
S
OUT
worst case, when V
= (VS × IS) + (VS/4)2/RL
P
D
In single-supply operation with R
is V
= VS /2.
OUT
Airflow increases heat dissipation, effectively reducing θ
addition, more metal directly in contact with the package leads
from metal traces, throughholes, ground, and power planes reduce
the θ
. Care must be taken to minimize parasitic capacitances at
JA
the input leads of high speed op amps as discussed in the
Layout, Grounding, and Bypassing Considerations section.
Figure 5 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 8-lead SOIC
(125°C/W), 5-lead SC70 (210°C/W), and 8-lead SOT-23
(160°C/W) packages on a JEDEC standard 4-layer board.
θ
values are approximations.
JA
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current
from the AD8038/AD8039 will likely cause a catastrophic failure.
ESD CAUTION
SOIC-8
SOT-23-8
SC70-5
–255356595125
AMBIENT TEMPERATURE (°C)
= VS /4 for RL to midsupply
OUT
referenced to VS−, worst case
L
JA
. In
02951-005
Rev. G | Page 5 of 16
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