1.5 ns Overdrive Recovery
Minimized Nonlinear Clamping Region
240 MHz Clamp Input Bandwidth
ⴞ3.9 V Clamp Input Range
Wide BandwidthAD8036AD8037
Small Signal240 MHz270 MHz
Large Signal (4 V p-p) 195 MHz190 MHz
Good DC Characteristics
2 mV Offset
10 V/ⴗC Drift
Ultralow Distortion, Low Noise
–72 dBc typ @ 20 MHz
4.5 nV/√Hz Input Voltage Noise
High Speed
Slew Rate 1500 V/s
Settling 10 ns to 0.1%, 16 ns to 0.01%
ⴞ3 V to ⴞ5 V Supply Operation
APPLICATIONS
ADC Buffer
IF/RF Signal Processing
High Quality Imaging
Broadcast Video Systems
Video Amplifier
Full Wave Rectifier
and large-signal bandwidths and ultralow distortion. The
AD8036 achieves –66 dBc at 20 MHz, and 240 MHz smallsignal and 195 MHz large-signal bandwidths. The AD8036 and
AD8037’s recover from 2× clamp overdrive within 1.5 ns.
These characteristics position the AD8036/AD8037 ideally for
driving as well as buffering flash and high resolution ADCs.
In addition to traditional output clamp amplifier applications,
the input clamp architecture supports the clamp levels as additional inputs to the amplifier. As such, in addition to static dc
clamp levels, signals with speeds up to 240 MHz can be applied
to the clamp pins. The clamp values can also be set to any
value within the output voltage range provided that V
that V
AD8037 can be used in nontraditional applications such as a
full-wave rectifier, a pulse generator, or an amplitude modula-
PRODUCT DESCRIPTION
The AD8036 and AD8037 are wide bandwidth, low distortion
clamping amplifiers. The AD8036 is unity gain stable. The
AD8037 is stable at a gain of two or greater. These devices allow the designer to specify a high (V
) and low (VCL) output
CH
clamp voltage. The output signal will clamp at these specified
tor. These novel applications are only examples of some of the
diverse applications which can be designed with input clamps.
The AD8036 is offered in chips, industrial (–40°C to +85°C)
and military (–55°C to +125°C) package temperature ranges
and the AD8037 in industrial. Industrial versions are available
in plastic DIP and SOIC; MIL versions are packaged in cerdip.
levels. Utilizing a unique patent pending CLAMPIN™ input
clamp architecture, the AD8036 and AD8037 offer a 10× im-
provement in clamp performance compared to traditional output clamping devices. In particular, clamp error is typically
3 mV or less and distortion in the clamp region is minimized.
This product can be used as a classical op amp or a clamp amplifier where a high and low output voltage are specified.
The AD8036 and AD8037, which utilize a voltage feedback architecture, meet the requirements of many applications which
previously depended on current feedback amplifiers. The
AD8036 and AD8037 exhibit an exceptionally fast and accurate
pulse response (16 ns to 0.01%), extremely wide small-signal
CLAMPIN is a trademark of Analog Devices, Inc.
FUNCTIONAL BLOCK DIAGRAM
8-Lead Plastic DIP (N), Cerdip (Q),
and SO Packages
is greater
. Due to these clamp characteristics, the AD8036 and
L
H
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Storage Temperature Range N, R . . . . . . . . . –65°C to +125°C
Operating Temperature Range (A Grade) . . . –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Lead Plastic DIP: θJA = 90°C/W
8-Lead SOIC: θJA = 155°C/W
8-Lead Cerdip: θJA = 110°C/W.
METALIZATION PHOTO
Dimensions shown in inches and (mm).
Connect Substrate to –V
–IN
2
V
.
S
+V
H
8
S
7
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by these devices is limited by the associated rise in junction temperature.
The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature
of the plastic, approximately +150°C. Exceeding this limit tem-
porarily may cause a shift in parametric performance due to a
change in the stresses exerted on the die by the package. Exceed-
ing a junction temperature of +175°C for an extended period can
result in device failure.
While the AD8036 and AD8037 are internally short circuit protected, this may not be sufficient to guarantee that the maxi-
mum junction temperature (+150°C) is not exceeded under all
conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves.
2.0
1.5
1.0
0.5
MAXIMUM POWER DISSIPATION – Watts
0
–5080
–40
8-LEAD PLASTIC DIP
PACKAGE
8-LEAD SOIC
PACKAGE
010–10–20–3020 30 40 50 60 7090
AMBIENT TEMPERATURE – 8C
TJ = +1508C
0.046
(1.17)
OUT
6
Figure 2. Plot of Maximum Power Dissipation vs.
Temperature
ORDERING GUIDE
45
3
+IN–V
S
0.050 (1.27)
–IN
2
8036
AD8036
V
L
V
H
87
+V
S
Model RangeDescriptionOption
AD8036AN–40°C to +85°CPlastic DIPN-8
AD8036AR–40°C to +85°CSOICSO-8
AD8036AR-REEL–40°C to +85°C13" Tape and ReelSO-8
AD8036AR-REEL7 –40°C to +85°C7" Tape and ReelSO-8
AD8036ACHIPS–40°C to +85°CDie
TemperaturePackagePackage
AD8036-EBEvaluation Board
5962-9559701MPA –55°C to +125°C CerdipQ-8
0.046
(1.17)
OUT
6
AD8037AN–40°C to +85°CPlastic DIPN-8
AD8037AR–40°C to +85°CSOICSO-8
AD8037AR-REEL–40°C to +85°C13" Tape and ReelSO-8
AD8037AR-REEL7 –40°C to +85°C7" Tape and ReelSO-8
AD8037ACHIPS–40°C to +85°CDie
AD8037-EBEvaluation Board
3
45
+IN–V
S
0.050 (1.27)
8037
AD8037
V
L
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although these devices feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. A–3–
AD8036/AD8037
+V
S
RL = 100V
–V
S
49.9V
V
IN
R
F
130V
V
OUT
0.1mF
10mF
AD8036
0.1mF
10mF
PULSE
GENERATOR
TR/T
F
= 350ps
+V
H
V
L
0.1mF
0.1mF
AD8036–Typical Characteristics
R
F
10mF
S
0.1mF
0.1mF
10mF
S
PULSE
GENERATOR
TR/T
= 350ps
F
V
IN
49.9V
130V
+V
AD8036
–V
V
RL = 100V
OUT
Figure 3. Noninverting Configuration, G = +1
Figure 4. Large Signal Transient Response; VO = 4 V p-p,
G = +1, R
= 140
F
Ω
Figure 6. Noninverting Clamp Configuration, G = +1
Figure 7. Clamped Large Signal Transient Response (2
Overdrive); VO = 2 V p-p, G = +1, RF = 140 Ω, VH = +1 V,
V
= –1 V
L
×
Figure 5. Small Signal Transient Response; VO = 400 mV
p-p, G = +1, R
F
= 140
Ω
Figure 8. Clamped Small Signal Transient Response
(2
×
Overdrive); VO = 400 mV p-p, G = +1, RF = 140 Ω,
V
= +0.2 V, VL = –0.2 V
H
REV. A–4–
AD8037–Typical Characteristics
R
IN
+V
S
RL = 100V
–V
S
49.9V
V
IN
R
F
100V
V
OUT
0.1mF
10mF
AD8037
0.1mF
10mF
PULSE
GENERATOR
TR/T
F
= 350ps
+V
H
V
L
0.1mF
0.1mF
R
F
PULSE
GENERATOR
TR/T
= 350ps
F
+V
R
IN
10mF
S
0.1mF
AD8036/AD8037
V
IN
100V
49.9V
AD8037
–V
S
0.1mF
10mF
V
RL = 100V
OUT
Figure 9. Noninverting Configuration, G = +2
Figure 10. Large Signal Transient Response; VO = 4 V p-p,
G = +2, R
= RIN = 274
F
Ω
Figure 12. Noninverting Clamp Configuration, G = +2
Figure 13. Clamped Large Signal Transient Response
(2
×
Overdrive); VO = 2 V p-p, G = +2, RF = RIN = 274 Ω,
V
= +0.5 V, VL = –0.5 V
H
Figure 11. Small Signal Transient Response;
V
REV. A–5–
= 400 mV p-p, G = +2, RF = RIN = 274
O
Ω
Figure 14. Clamped Small Signal Transient Response
(2
×
Overdrive); VO = 400 mV p-p, G = +2, RF = R
V
= +0.1 V, VL = –0.1 V
H
= 274 Ω,
IN
AD8036/AD8037
VALUE OF FEEDBACK RESISTOR (RF) – V
–3dB BANDWIDTH – MHz
2024040200 2201801601401201008060
R PACKAGE
R
F
130V
AD8036
VS = 65V
R
L
= 100V
GAIN = +1
R
L
49.9V
N PACKAGE
400
350
300
250
200
OUTPUT – dB
1M
FREQUENCY – Hz
10M
100M1G
250V
RF = 50V
TO
250V
BY
50V
50V
VS = 65V
V
O
= 2.5V
p-p
R
L
= 100V
–8
–7
–6
–5
–4
–3
–2
–1
0
1
2
FREQUENCY – Hz
GAIN – dB
1M10M
100M1G
100k
VS = 65V
V
O
= 300mV
p-p
RL = 100V
–8
–7
–6
–5
–4
–3
–2
–1
0
1
2
140V
V
H
100V
VL (VIN)
(VO)
1V
AD8036
AD8036–Typical Characteristics
2
1
0
–1
–2
–3
GAIN – dB
–4
–5
–6
–7
–8
1M
VO = 300mV p-p
V
= 65V
S
= 100V
R
L
10M
102V
49.9V
FREQUENCY – Hz
100M1G
200V
140V
Figure 15. AD8036 Small Signal Frequency Response,
G = +1
0.2
0.1
–0.1
–0.2
–0.3
GAIN – dB
–0.4
–0.5
–0.6
–0.7
–0.8
Figure 16. AD8036 0.1 dB Flatness, N Package (for R
Package Add 20
90
80
70
60
50
40
30
Figure 17. AD8036 Open-Loop Gain and Phase Margin vs.
Frequency, R
20
OPEN -LOOP GAIN – dB
10
–10
–20
0
VO = 300mV p-p
V
= 65V
S
= 100V
R
L
1M
0
10k100k10M1M
= 100
L
10M
Ω
to RF)
GAIN
Ω
140V
130V
FREQUENCY – Hz
FREQUENCY – Hz
158V
150V
100M1G
PHASE
100M1G
100
80
60
40
20
0
–20
–40
–60
PHASE MARGIN – Degrees
–80
–100
–120
Figure 18. AD8036 Small Signal –3 dB Bandwidth vs. R
Figure 19. AD8036 Large Signal Frequency Response,
G = +1
Figure 20. AD8036 Clamp Input Bandwidth, VH, V
L
REV. A–6–
F
–30
DIFF GAIN – %
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
DIFF PHASE – Degrees
1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th
0.04
0.02
0.00
–0.02
–0.04
0.04
0.02
0.00
–0.02
–0.04
0.06
–0.06
SETTLING TIME – ns
0 5 10 15 20 25 30 35 40 45
ERROR – %
–0.05
–0.04
–0.03
–0.02
–0.01
0
0.01
0.02
0.03
0.04
0.05
SETTLING TIME - ms
0 2 4 6 8 10 12 14 16 18
ERROR – %
–0.6
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
–50
–70
VO = 2V p-p
= 65V
V
S
= 500V
R
L
G = +1
AD8036/AD8037
–90
–110
HARMONIC DISTORTION – dBc
–130
100k100M10M1M10k
2ND HARMONIC
3RD HARMONIC
FREQUENCY – Hz
Figure 21. AD8036 Harmonic Distortion vs. Frequency,
R
= 500
L
Ω
–30
VO = 2V p-p
V
= 65V
S
RL = 100V
–50
G = +1
–70
–90
HARMONIC DISTORTION – dBc
–110
–130
100k100M10M1M10k
FREQUENCY – Hz
2ND HARMONIC
3RD HARMONIC
Figure 24. AD8036 Differential Gain and Phase Error,
G = +1, R
= 150 Ω, F = 3.58 MHz
L
Figure 22. AD8036 Harmonic Distortion vs. Frequency,
R
= 100
L
Figure 23. AD8036 Third Order Intercept vs. Frequency
REV. A–7–
Ω
60
50
40
INTERCEPT – +dBm
30
20
10
20408060
FREQUENCY – MHz
100
Figure 25. AD8036 Short-Term Settling Time to 0.01%, 2 V
Step, G = +1, R
= 100
L
Ω
Figure 26. AD8036 Long-Term Settling Time, 2 V Step,
G = +1, R
= 100
L
Ω
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