ANALOG DEVICES AD7946 Service Manual
14-Bit, 500 kSPS
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FEATURES
14-bit resolution with no missing codes
Throughput: 500 kSPS
INL: ±0.4 LSB typical, ±1 LSB maximum (±0.0061% of FSR)
SINAD: 85 dB @ 20 kHz
THD: −100 dB @ 20 kHz
Pseudo differential analog input range
0 V to REF with REF up to VDD
No pipeline delay
Single-supply 5 V operation with
1.8 V/2.5 V/3 V/5 V logic interface
Serial interface, SPI/QSPI/MICROWIRE™/DSP compatible
Daisy-chain multiple ADCs and BUSY indicator
Power dissipation
3.3 mW @ 5 V/100 kSPS
3.3 μW @ 5 V/100 SPS
Standby current: 1 nA
10-lead MSOP (MSOP-8 size) and
3 mm × 3 mm QFN (LFCSP) (SOT-23 size)
Pin-for-pin compatible with the 16-bit
APPLICATIONS
Battery-powered equipment
Data acquisition
Instrumentation
Medical instruments
Process control
AD7686
PulSAR ADC in MSOP
AD7946
APPLICATION DIAGRAM
0.5VTO 5V 5
0V TO REF
IN+
IN–
REF
AD7946
GND
VDD
Figure 1.
VIO
SDI
SCK
SDO
CNV
GENERAL DESCRIPTION
The AD7946 is a 14-bit, charge redistribution, successive
approximation, analog-to-digital converter (ADC) that operates
from a single 5 V power supply, VDD. It contains a low power,
high speed, 14-bit sampling ADC with no missing codes, an
internal conversion clock, and a versatile serial interface port.
The part also contains a low noise, wide bandwidth, short
aperture delay track-and-hold circuit. On the CNV rising edge,
it samples an analog input IN+ between 0 V to REF with respect
to a ground sense IN−. The reference voltage, REF, is applied
externally and can be set up to the supply voltage.
Its power scales linearly with throughput.
The SPI-compatible serial interface also features the ability,
usin
g the SDI input, to daisy-chain several ADCs on a single,
3-wire bus, or it provides an optional BUSY indicator. It is
compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic, using the separate
supply VIO.
The AD7946 is housed in a 10-lead MSOP or a 10-lead QFN
(LFCS
P) with operation specified from −40°C to +85°C.
1.8V TO VDD
3- OR 4-WIRE INTERFACE
(SPI, DAISY CHAIN, CS)
04656-001
Table 1. MSOP, QFN (LFCSP) 14-/16-/18-Bit PulSAR® ADC
Type 100 kSPS 250 kSPS 400 kSPS to 500 kSPS ≥1000 kSPS ADC Driver
14-Bit AD7940 AD7942
16-Bit AD7680 AD7685
AD7683 AD7687
1
1
1
AD7684 AD7694 AD7693
18-Bit AD7691
1
AD7946
AD7686
AD7688
AD7690
1
1
1
1
1
AD7980
AD7983
AD7982
AD7984
1
Pin-for-pin compatible.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2005–2007 Analog Devices, Inc. All rights reserved.
1
1
1
1
ADA4941
ADA4841
ADA4941
ADA4841
AD7946
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TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Application Diagram........................................................................ 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Specifications .................................................................. 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configurations and Function Descriptions ........................... 7
Typical Performance Characteristics ............................................. 8
Te r mi n ol o g y .................................................................................... 11
Theory of Operation ...................................................................... 12
Circuit Information.................................................................... 12
Converter Operation.................................................................. 12
Typical C o n ne ction D i a g ram ................................................... 13
Analog Input ............................................................................... 13
Driver Amplifier Choice............................................................ 14
Voltage Reference Input ............................................................ 14
Power Supply............................................................................... 15
Supplying the ADC from the Reference.................................. 15
Single-Supply Application......................................................... 15
Digital Interface.......................................................................... 16
CS
MODE 3-Wire, No BUSY Indicator .................................. 17
CS
Mode 3-Wire with BUSY Indicator ................................... 18
CS
Mode 4-Wire, No BUSY Indicator..................................... 19
CS
Mode 4-Wire with BUSY Indicator ................................... 20
Chain Mode, No BUSY Indicator ............................................ 21
Chain Mode with BUSY Indicator........................................... 22
Application Guidelines .................................................................. 23
Layout .......................................................................................... 23
Evaluating the AD7946’s Performance.................................... 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
REVISION HISTORY
12/07—Rev. 0 to Rev. A
QFN Package Available......................................................Universal
Changes to Table 1............................................................................ 1
Changes to Table 5............................................................................ 6
Changes to Ordering Guide.......................................................... 24
7/05—Revision 0: Initial Version
Rev. A | Page 2 of 24
AD7946
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SPECIFICATIONS
VDD = 4.5 V to 5.5 V, VIO = 2.3 V to VDD, REF = VDD, TA = −40°C to +85°C, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
RESOLUTION 14 Bits
ANALOG INPUT
Voltage Range IN+ − IN− 0 REF V
Absolute Input Voltage IN+ −0.1 VDD + 0.1 V
IN− −0.1 0.1 V
Analog Input CMRR fIN = 200 kHz 65 dB
Leakage Current at 25°C Acquisition phase 1 nA
Input Impedance See the Analog Input section
ACCURACY
No Missing Codes 14 Bits
Differential Linearity Error −0.7 ±0.3 +0.7 LSB
Integral Linearity Error −1 ±0.4 +1 LSB
Transition Noise REF = VDD = 5 V 0.33 LSB
Gain Error2, T
MIN
to T
MAX
±0.3 ±6 LSB
Gain Error Temperature Drift ±1 ppm/°C
Offset Error2, T
MIN
to T
MAX
±0.3 ±6 LSB
Offset Temperature Drift ±1 ppm/°C
Power Supply Sensitivity VDD = 5 V ± 5% ±0.1 LSB
THROUGHPUT
Conversion Rate 0 500 kSPS
Transient Response Full-scale step 400 ns
AC ACCURACY
Signal-to-Noise fIN = 20 kHz, REF = 5 V 84.5 85 dB
f
= 20 kHz, REF = 2.5 V 84 dB
IN
Spurious-Free Dynamic Range fIN = 20 kHz −100 dB
Total Harmonic Distortion fIN = 20 kHz −100 dB
Signal-to-(Noise + Distortion) fIN = 20 kHz, REF = 5 V 84.5 85 dB
f
Intermodulation Distortion
1
LSB means least significant bit. With the 5 V input range, one LSB is 305.2 μV.
2
See the Terminology section. These specifications do include full temperature range variation but do not include the error contribution from the external reference.
3
All specifications in dB are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
4
f
= 21.4 kHz, f
IN1
= 18.9 kHz, each tone at −7 dB below full scale.
IN2
4
= 20 kHz, REF = 5 V, −60 dB input 25 dB
IN
100 dB
1
3
Rev. A | Page 3 of 24
AD7946
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VDD = 4.5 V to 5.5 V, VIO = 2.3 V to VDD, REF = VDD, TA = −40°C to +85°C, unless otherwise noted.
Table 3.
Parameter Conditions Min Typ Max Unit
REFERENCE
Voltage Range 0.5 VDD + 0.3 V
Load Current 500 kSPS, REF = 5 V 100 μA
SAMPLING DYNAMICS
−3 dB Input Bandwidth 9 MHz
Aperture Delay VDD = 5 V 2.5 ns
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format Serial 14-bits straight binary
Pipeline Delay
V
OL
V
OH
POWER SUPPLIES
VDD Specified performance 4.5 5.5 V
VIO Specified performance 2.3 VDD + 0.3 V
VIO Range 1.8 VDD + 0.3 V
Standby Current
1, 2
Power Dissipation VDD = 5 V, 100 SPS throughput 3.3 μW
VDD = 5 V, 100 kSPS throughput 3.3 3.8 mW
VDD = 5 V, 500 kSPS throughput 19 mW
TEMPERATURE RANGE
3
Specified Performance T
1
With all digital inputs forced to VIO or GND as required.
2
During acquisition phase.
3
Contact sales for extended the temperature range.
−0.3 0.3 × VIO V
0.7 × VIO VIO + 0.3 V
−1 +1 μA
−1 +1 μA
Conversion results available immediately
ter completed conversion
af
I
= +500 μA 0.4 V
SINK
I
= −500 μA VIO − 0.3 V
SOURCE
VDD and VIO = 5 V, 25°C 1 50 nA
MIN
to T
MAX
−40 +85 °C
Rev. A | Page 4 of 24
AD7946
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TIMING SPECIFICATIONS
TA = −40°C to +85°C, VDD = 4.5 V to 5.5 V, VIO = 2.3 V to 5.5 V or VDD + 0.3 V, whichever is the lowest, unless otherwise stated.
See Figure 2 and Figure 3 for load conditions.
Table 4.
Parameter Symbol Min Typ Max Unit
Conversion Time: CNV Rising Edge to Data Available t
Acquisition Time t
Time Between Conversions t
CNV Pulse Width (CS Mode)
SCK Period (CS Mode)
SCK Period (Chain Mode) t
t
t
CONV
ACQ
CYC
CNVH
SCK
SCK
VIO Above 4.5 V 17 ns
VIO Above 3 V 18 ns
VIO Above 2.7 V 19 ns
VIO Above 2.3 V 20 ns
SCK Low Time t
SCK High Time t
SCK Falling Edge to Data Remains Valid t
SCK Falling Edge to Data Valid Delay t
SCKL
SCKH
HSDO
DSDO
VIO Above 4.5 V 14 ns
VIO Above 3 V 15 ns
VIO Above 2.7 V 16 ns
VIO Above 2.3 V 17 ns
CNV or SDI Low to SDO D15 MSB Valid (CS Mode)
t
EN
VIO Above 4.5 V 15 ns
VIO Above 2.7 V 18 ns
VIO Above 2.3 V 22 ns
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SCK Valid Setup Time from CNV Rising Edge (Chain Mode) t
SCK Valid Hold Time from CNV Rising Edge (Chain Mode) t
SDI Valid Setup Time from SCK Falling Edge (Chain Mode) t
SDI Valid Hold Time from SCK Falling Edge (Chain Mode) t
SDI High to SDO High (Chain Mode with Busy Indicator) t
t
DIS
t
SSDICNV
t
HSDICNV
SSCKCNV
HSCKCNV
SSDISCK
HSDISCK
DSDOSDI
VIO Above 4.5 V 15 ns
VIO Above 2.3 V 26 ns
0.5 1.6 μs
400 ns
2 μs
10 ns
15 ns
7 ns
7 ns
5 ns
25 ns
15 ns
0 ns
5 ns
5 ns
3 ns
4 ns
Rev. A | Page 5 of 24
AD7946
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ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter Rating
Analog Inputs
IN+1, IN−
1
GND − 0.3 V to VDD + 0.3 V or
±130 mA
REF GND − 0.3 V to VDD + 0.3 V
Supply Voltages
VDD, VIO to GND −0.3 V to +7 V
VDD to VIO ±7 V
Digital Inputs to GND −0.3 V to VIO + 0.3 V
Digital Outputs to GND −0.3 V to VIO + 0.3 V
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
θJA Thermal Impedance
10-Lead MSOP 200°C/W
10-Lead QFN 48.7°C/W
θJC Thermal Impedance
10-Lead MSOP 44°C/W
10-Lead QFN 2.96°C/W
Lead Temperature
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
1
See the Analog Input section.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
500µA I
TO
SDO
C
L
50pF
500µA I
Figure 2. Load Circuit for Di
OL
1.4
OH
gital Interface Timing
04656-002
30% VIO
t
DELAY
2V or OVDD – 0.5V
0.8V or 0.5V
NOTES
1
2V IF VIO ABOVE 2.5V, VIO – 0.5V IF VIO BELOW 2.5V.
2
0.8V IF VIO ABOVE 2.5V, 0.5V IF VIO BELOW 2.5V.
Figure 3. Voltage Levels for Timing
70% OVDD
t
DELAY
1
2
2V or VIO – 0.5V
0.8V or 0.5V
1
2
04656-003
Rev. A | Page 6 of 24
AD7946
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
REF
VDD
IN+
IN–
GND
1
2
AD7946
3
TOP VIEW
(Not to Scale)
4
5
VIO
10
SDI
9
SCK
8
SDO
7
CNV
6
04656-004
Figure 4. 10-Lead MSOP Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic Type1Description
1 REF AI
Reference Input Voltage. The REF range is from 0.5 V to
should be decoupled closely to the pin with a 10 μF capacitor.
2 VDD P Power Supply.
3 IN+ AI
Analog Input. It is referred to IN−. The voltage range, that is, the difference between IN+ and IN−,
is 0 V to REF.
4 IN− AI
5 GND P
6 CNV DI
Analog Input Ground Sense. Connect to the analog ground plane or to a remote sense ground.
Power Supply Ground.
Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions and
selects the interface mode, chain, or CS
the data should be read when CNV is high.
7 SDO DO
8 SCK DI
9 SDI DI
Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this clock.
Serial Data Input. This input provides multiple f
ADC as follows:
Chain mode is selected if SDI is low during the CNV r
input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital
data level on SDI is output on SDO with a delay of 14 SCK cycles.
CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can
enable the serial output signals when low, and if SDI or CNV is low when the conversion is complete,
the BUSY indicator feature is enabled.
10 VIO P
Input/Output Interface Digital Power. Nominally at the same sup
3 V, or 5 V).
1
AI = analog input, DI = digital input, DO = digital output, and P = power.
REF
VDD
IN+
IN–
GND
1
2
3
4
5
AD7946
TOP VIEW
(Not to Scale)
VIO
10
SDI
9
8
SCK
7
SDO
6
CNV
04656-005
Figure 5. 10-Lead QFN (LFCSP) Pin Configuration
VDD, and is referred to the GND pin. This pin
. In CS mode, it enables the SDO pin when low. In chain mode,
eatures. It selects the interface mode of the
ising edge. In this mode, SDI is used as a data
ply as the host interface (1.8 V, 2.5 V,
Rev. A | Page 7 of 24
AD7946
0
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TYPICAL PERFORMANCE CHARACTERISTICS
1.0
0.8
0.6
0.4
0.2
0
INL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0 4096 8192 12288 16384
POSITIVE INL = +0.17LSB
NEGATIVE INL = –0.26LSB
CODE
Figure 6. Integral Nonlinearity vs. Code
04656-006
1.0
0.8
0.6
0.4
0.2
0
DNL (LSB)
–0.2
–0.4
–0.6
–0.8
–1.0
0 4096 8192 12288 16384
POSITIVE DNL = +0.20LSB
NEGATIVE DNL = –0.13LSB
CODE
Figure 9. Differential Nonlinearity vs. Code
04656-009
300000
250000
200000
150000
COUNTS
100000
50000
AMPLITUDE (dB of Fu ll Scale)
261120
000 0
0
2009 200A 200B 200C 200D 200E 200F
CODE IN HEX
VDD = REF = 5 V
Figure 7. Histogram of a DC Input at the Code Center
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
0 20 40 60 80 100 120 140 160 180 200 220 240
8192 POINT FFT
VDD = REF = 5V
f
= 500kSPS
S
f
= 20.14kHz
IN
SNR = 85.3dB
THD = –105.2dB
SECOND HARMONIC = –106dB
THIRD HARMONI C = –110dB
FREQUENCY (kHz)
Figure 8. FFT Plot
150000
131592
125000
100000
75000
COUNTS
50000
25000
00
04656-046
0
2059 205A 205B 205C 205D 205E
0
129528
CODE IN HEX
VDD = REF = 5V
00
04656-047
Figure 10. Histogram of a DC Input at the Code Transition
90
88
86
84
82
SNR REFERENCE TO FULL SCALE (dB)
04656-008
80
–10–8–6–4–2
INPUT LEVEL (dB)
04656-011
Figure 11. SNR vs. Input Level
Rev. A | Page 8 of 24
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