Analog Devices AD7893BR-2, AD7893BR-10, AD7893BN-5, AD7893BN-2, AD7893AR-5 Datasheet

LC2MOS 12-Bit, Serial 6 ms

a

FEATURES
Fast 12-Bit ADC with 6 ms Conversion Time
8-Pin Mini-DlP and SOIC
Single Supply Operation
High Speed, Easy-to-Use, Serial Interface
On-Chip Track/Hold Amplifier
Selection of Input Ranges

610 V for AD7893-10

62.5 V for AD7893-3

0 V to +2.5 V for AD7893-2
0 V to +5 V for AD7893-5

Low Power: 25 mW typ

GENERAL DESCRIPTION

The AD7893 is a fast, 12-bit ADC that operates from a single
+5 V supply and is housed in a small 8-pin mini-DIP and 8-pin
SOIC. The part contains a 6 µs successive approximation A/D
converter, an on-chip track/hold amplifier, an on-chip clock and
a high speed serial interface.

Output data from the AD7893 is provided via a high speed,
serial interface port. This two-wire serial interface has a serial
clock input and a serial data output with the external serial clock
accessing the serial data from the part.

In addition to traditional dc accuracy specifications such as lin­earity, full-scale and offset errors, the AD7893 is also specified
for dynamic performance parameters, including harmonic dis­tortion and signal-to-noise ratio.

The part accepts an analog input range of ± 10 V (AD7893-10),
±2.5 V (AD7893-3), 0 V to +5 V (AD7893-5) or 0 V to +2.5 V
(AD7893-2) and operates from a single +5 V supply, consuming
only 25 mW typical.

The AD7893 is fabricated in Analog Devices’ Linear Compat­ible CMOS (LC
that combines precision bipolar circuits with low power CMOS
logic. The part is available in a small, 8-pin, 0.3" wide, plastic or
hermetic dual-in-line package (mini-DIP) and in an 8-pin, small
outline IC (SOIC).

2

MOS) process, a mixed technology process

ADC in 8-Pin Package

AD7893

FUNCTIONAL BLOCK DIAGRAM

REF IN

AD7893

TRACK/

V

CONVST

*AD7893-5, AD7893-10, AD7893-3

PRODUCT HIGHLIGHTS

SIGNAL

IN

SCALING*

AGND

HOLD

REGISTER

DGND SCLK

1. Fast, 12-Bit ADC in 8-Pin Package

The AD7893 contains a 6 µs ADC, a track/hold amplifier,
control logic and a high speed serial interface, all in an 8-pin
package. This offers considerable space saving over alterna­tive solutions.

2. Low Power, Single Supply Operation
The AD7893 operates from a single +5 V supply and con­sumes only 25 mW. This low power, single supply operation
makes it ideal for battery powered or portable applications.

3. High Speed Serial Interface
The part provides high speed serial data and serial clock lines,
allowing for an easy, two-wire serial interface arrangement.

12-BIT

ADC

OUTPUT

SDATA

V

DD

REV. E

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1997

AD7893–SPECIFICATIONS

(VDD = +5 V, AGND = DGND = 0 V, REF IN = +2.5 V. All specifications T
otherwise noted.)

MIN

to T

MAX

unless

Parameter VersionslVersions Version Units Test Conditions/Comments

ABS

DYNAMIC PERFORMANCE

Signal to (Noise + Distortion) Ratio

@ +25°C 70 70 70 dB min fIN = 10 kHz Sine Wave, f

Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)

2

2

–80 –80 –80 dB max fIN = 10 kHz Sine Wave, f

2

–80 –80 –80 dB max fIN = 10 kHz Sine Wave, f

2

fa = 9 kHz, fb = 9.5 kHz, f

SAMPLE
SAMPLE
SAMPLE

SAMPLE

2nd Order Terms –80 –80 –80 dB max
3rd Order Terms –80 –80 –80 dB max

DC ACCURACY

Resolution 12 12 12 Bits
Minimum Resolution for which
No Missing Codes are Guaranteed 12 12 12 Bits
Relative Accuracy
Differential Nonlinearity
Positive Full-Scale Error

2

2
2

±1 ±1/2 ±1 LSB max
±1 ±1 ±1 LSB max
±3 ±1.5 ±3 LSB max

AD7893-2, AD7893-5

Unipolar Offset Error ±4 ±3 ±4 LSB max

AD7893-10, AD7893-3

Negative Full-Scale Error

2

±3 ±1.5 ±3 LSB max

Bipolar Zero Error ±4 ±2 ±4 LSB max

ANALOG INPUT

AD7893-10

Input Voltage Range ±10 ±10 ±10 Volts
Input Resistance 16 16 16 kΩ min

AD7893-3

Input Voltage Range ±2.5 ±2.5 ±2.5 Volts
Input Resistance 4 4 4 kΩ min

AD7893-5

Input Voltage Range 0 to +5 0 to +5 0 to +5 Volts
Input Resistance 9 9 9 kΩ min

AD7893-2

Input Voltage Range 0 to +2.5 0 to +2.5 0 to +2.5 Volts
Input Current 500 500 500 nA max

= 117 kHz
= 117 kHz
= 117 kHz

= 117 kHz

REFERENCE INPUT

REF IN Input Voltage Range 2.375/2.625 2.375/2.625 2.375/2.625 V min/V max 2.5 V ± 5%
Input Current 2 2 10 µA max
Input Capacitance

3

10 10 10 pF max

LOGIC INPUTS

Input High Voltage, V
Input Low Voltage, V
Input Current, I

IN

Input Capacitance, C

INH

INL

IN

3

2.4 2.4 2.4 V min VDD = 5 V ± 5%

0.8 0.8 0.8 V max V

= 5 V ± 5%

DD

±10 ±10 ±10 µA max VIN = 0 V to V
10 10 10 pF max

LOGIC OUTPUTS

Output High Voltage, V
Output Low Voltage, V

OL

OH

4.0 4.0 4.0 V min I

0.4 0.4 0.4 V max I

SOURCE

= 1.6 mA

SINK

= 200 µA

Output Coding
AD7893-10, AD7893-3 2s Complement
AD7893-2, AD7893-5 Straight (Natural) Binary

CONVERSION RATE

Conversion Time 6 6 6 µs max
Track/Hold Acquisition Time

2

1.5 1.5 1.5 µs max

POWER REQUIREMENTS

V

DD

I

DD

+5 +5 +5 V nom ±5% for Specified Performance
9 9 9 mA max

Power Dissipation 45 45 45 mW max Typically 25 mW

NOTES

1

Temperature Ranges are as follows: A, B Versions: –40°C to +85°C, S Version: –55°C to +125°C.

2

See Terminology.

3

Sample tested @ +25°C to ensure compliance.

Specifications subject to change without notice.

DD

–2–

REV. E

1, 2

WARNING!

ESD SENSITIVE DEVICE

TIMING CHARACTERISTICS

(VDD = +5 V, AGND = DGND = 0 V, REF IN = +2.5 V)

A, B S

Parameter Versions Version Units Test Conditions/Comments

AD7893

t

1

t

2

t

3

3

t

4

4

t

5

50 50 ns min CONVST Pulse Width
60 70 ns min SCLK High Pulse Width
30 40 ns min SCLK Low Pulse Width
50 60 ns max SCLK Rising Edge to Data Valid Delay
10 10 ns min Bus Relinquish Time after Falling Edge of SCLK
100 100 ns max

NOTES

1

Sample tested at +25°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.6 V.

2

See Figure 5.

3

Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.

4

Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t5, quoted in the timing characteristics is the true bus relinquish time
of the part and, as such, is independent of external bus loading capacitances.

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)

VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

V

to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

DD

1.6mA

Analog Input Voltage to AGND

AD7893-10, AD7893-5 . . . . . . . . . . . . . . . . . . . . . . . ±17 V

AD7893-2, AD7893-3 . . . . . . . . . . . . . . . . . . . –5 V, +10 V

Reference Input Voltage to AGND . . . –0.3 V to V

Digital Input Voltage to DGND . . . . . –0.3 V to V

Digital Output Voltage to DGND . . . . –0.3 V to V

+ 0.3 V

DD

+ 0.3 V

DD

+ 0.3 V

DD

Operating Temperature Range

TO

OUTPUT

PIN

+2.1V

50pF

200µA

Commercial (A, B Versions) . . . . . . . . . . . –40°C to +85°C

Extended (S Version) . . . . . . . . . . . . . . . . –55°C to +125°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C

Figure 1. Load Circuit for Access Time and Bus
Relinquish Time

Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 130°C/W

JA

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +260°C

Cerdip Package, Power Dissipation . . . . . . . . . . . . . . 450 mW

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 125°C/W

JA

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +300°C

SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 170°C/W

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7893 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

REV. E

–3–

AD7893

PIN FUNCTION DESCRIPTION

Pin Pin
No. Mnemonic Description

1 REF IN Voltage Reference Input. An external reference source should be connected to this pin to provide the refer-

ence voltage for the AD7893’s conversion process. The REF IN input is buffered on-chip. The nominal ref­erence voltage for correct operation of the AD7893 is +2.5 V.

2V

IN

Analog Input Channel. The analog input range is ± 10 V (AD7893-10), ±2.5 V (AD7893-3), 0 V to +5 V

(AD7893-5) and 0 V to +2.5 V (AD7893-2).
3 AGND Analog Ground. Ground reference for track/hold, comparator and DAC.
4 SCLK Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7893. A

new serial data bit is clocked out on the rising edge of this serial clock, and data is valid on the falling edge.

The serial clock input should be taken low at the end of the serial data transmission.
5 SDATA Serial Data Output. Serial data from the AD7893 is provided at this output. The serial data is clocked out by

the rising edge of SCLK and is valid on the falling edge of SCLK. Sixteen bits of serial data are provided

with four leading zeros followed by the 12 bits of conversion data. On the sixteenth falling edge of SCLK, the

SDATA line is disabled (three-stated). Output data coding is twos complement for the AD7893-10 and

AD7893-3, straight binary for the AD7893-2 and AD7893-5.
6 DGND Digital Ground. Ground reference for digital circuitry.
7

CONVST Convert Start. Edge-triggered logic input. On the falling edge of this input, the serial clock counter is reset to

zero. On the rising edge of this input, the track/hold goes into its hold mode and conversion is initiated.
8V

DD

Positive supply voltage, +5 V ± 5%.

PIN CONFIGURATION

DIP and SOIC

REF IN

V

AGND

SCLK

1

2

IN

3
4

AD7893

TOP VIEW

(NOT TO SCALE)

8

7

6

5

V

DD

CONVST

DGND
SDATA

ORDERING GUIDE

Temperature Linearity Package

Model Range Error SNR Options*

AD7893AN-2 –40°C to +85°C ±1 LSB 70 dB N-8
AD7893BN-2 –40°C to +85°C ±1/2 LSB 72 dB N-8
AD7893AR-2 –40°C to +85°C ±1 LSB 70 dB SO-8
AD7893BR-2 –40°C to +85°C ±1/2 LSB 72 dB SO-8
AD7893SQ-2 –55°C to +125°C ±1 LSB 70 dB Q-8

AD7893AN-5 –40°C to +85°C ±1 LSB 70 dB N-8
AD7893BN-5 –40°C to +85°C ±1/2 LSB 72 dB N-8
AD7893AR-5 –40°C to +85°C ±1 LSB 70 dB SO-8
AD7893BR-5 –40°C to +85°C ±1/2 LSB 72 dB SO-8
AD7893SQ-5 –55°C to +125°C ±1 LSB 70 dB Q-8

AD7893AN-10 –40°C to +85°C ±1 LSB 70 dB N-8
AD7893BN-10 –40°C to +85°C ±1/2 LSB 72 dB N-8
AD7893AR-10 –40°C to +85°C ±1 LSB 70 dB SO-8
AD7893BR-10 –40°C to +85°C ±1/2 LSB 72 dB SO-8
AD7893SQ-10 –55°C to +125°C ±1 LSB 70 dB Q-8

AD7893AR-3 –40°C to +85°C ±1 LSB 70 dB SO-8

*N = Plastic DIP, Q = Cerdip, SO = SOIC.

–4–

REV. E