Analog Devices AD7873 d Datasheet

V

V

Touch Screen Digitizer

FEATURES

4-wire touch screen interface
On-chip temperature sensor: −40°C to +85°C
On-chip 2.5 V reference
Direct battery measurement (0 V to 6 V)
Touch-pressure measurement
Specified throughput rate of 125 kSPS
Single supply, V
Ratiometric conversion
High speed serial interface
Programmable 8-bit or 12-bit resolution
One auxiliary analog input
Shutdown mode: 1 µA max
16-lead QSOP, TSSOP, and LFCSP packages

APPLICATIONS

Personal digital assistants
Smart hand-held devices
Touch screen monitors
Point-of-sale terminals
Pagers

GENERAL DESCRIPTION

of 2.2 V to 5.25 V

CC

AUX

BAT

REF

AD7873

FUNCTIONAL BLOCK DIAGRAM

+V

CC

X+
X–

Y+
Y–

BATTERY
MONITOR

2.5V
BUF

REF

TEMP

SENSOR

6-TO-1

I/P

MUX

REDISTRIBUTION

CONTROL LOGIC

T/H

CHARGE

DAC

SAR + ADC

PENIRQ

PEN

INTERRUPT

AD7873

COMP

GND

+V

CC

The AD7873 is a 12-bit successive approximation ADC with a
synchronous serial interface and low on resistance switches for
driving touch screens. The AD7873 operates from a single 2.2 V
to 5.25 V power supply and features throughput rates greater
than 125 kSPS.

The AD7873 features direct battery measurement, temperature
measurement, and touch-pressure measurement. The AD7873
also has an on-board reference of 2.5 V that can be used for the
auxiliary input, battery monitor, and temperature measurement
modes. When not in use, the internal reference can be shut
down to conserve power. An external reference can also be
applied and can be varied from 1 V to V
input range is from 0 V to V

. The device includes a shutdown

REF

, while the analog

CC

mode that reduces the current consumption to less than 1 µA.

The AD7873 features on-board switches. This, coupled with low
power and high speed operation, makes the device ideal for
battery-powered systems such as personal digital assistants with
resistive touch screens and other portable equipment. The part
is available in a 16-lead 0.15" quarter size outline package
(QSOP), a 16-lead thin shrink small outline package (TSSOP),
and a 16-lead lead frame chip scale package (LFCSP).

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

SPORT

DIN CS DOUT DCLK BUSY

Figure 1.

PRODUCT HIGHLIGHTS

1. Ratiometric conversion mode available, eliminating errors

due to on-board switch resistances.

2. On-board temperature sensor: −40°C to +85°C.

3. Battery monitor input.

4. Touch-pressure measurement capability.

5. Low power consumption of 1.37 mW max with the

reference off, or 2.41 mW typ with the reference on, at
125 kSPS and V

6. Package options include 4 mm × 4 mm LFCSP.

7. Analog input range from 0 V to V

8. Vers ati l e s e ri a l I / O p o rt s .

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

at 3.6 V.

CC

.

REF

www.analog.com

02164-D-001

AD7873

TABLE OF CONTENTS

Specifications..................................................................................... 3

Analog Input............................................................................... 14

Timing Specifications .................................................................. 5

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Pin Configurations and Function Descriptions ........................... 7

Te r m in o l o g y ...................................................................................... 8

Typical Performance Characteristics ............................................. 9

Circuit Information........................................................................ 13

ADC Transfer Function............................................................. 13

Typical C o n necti on D i a g ram ................................................... 13

REVISION HISTORY

6/04—Changed from Rev. C to Rev. D

Updated Format..................................................................Universal

Changes to Absolute Maximum Ratings ....................................... 6

Additions to PD0 and PD1 Description...................................... 21

PBC Guidelines for Chip Scale Package Added ......................... 23

Additions to Ordering Guide........................................................ 25

4/03—Changed from Rev. B to Rev. C

Changes to Formatting ......................................................Universal

Updated Outline Dimensions....................................................... 19

Measurements............................................................................. 16

Pen Interrupt Request ................................................................ 18

Control Register ......................................................................... 19

Power vs. Throughput Rate ....................................................... 20

Serial Interface............................................................................ 21

Grounding and Layout .................................................................. 23

PCB Design Guidelines for Chip Scale Package .................... 23

Outline Dimensions....................................................................... 24

Ordering Guide .......................................................................... 25

1/02—Changed from Rev. A to Rev. B
Addition of 16-Lead Lead Frame Chip Scale Package ..Universal

Edits to Features.................................................................................1

Edits to General Description ...........................................................1

Addition of LFCSP Pin Configuration...........................................4

Edit to Absolute Maximum Ratings................................................4

Addition to Ordering Guide ............................................................4

Addition of CP-16 Outline Dimensions ..................................... 19

2/01—Changed from Rev. 0 to Rev A
Edits to Notes in the Ordering Guide

Rev. D | Page 2 of 28

AD7873

SPECIFICATIONS

VCC = 2.7 V to 3.6 V, V

Table 1.

Parameter AD7873A1AD7873B1 Unit Test Conditions/Comments

DC ACCURACY

Resolution 12 12 Bits
No Missing Codes 11 12 Bits min
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error

2

2

Noise 70 70 µV rms typ
Power Supply Rejection 70 70 dB typ

SWITCH DRIVERS

On Resistance

2

Y+, X+ 5 5 Ω typ
Y–, X– 6 6 Ω typ

ANALOG INPUT

Input Voltage Ranges 0 to V
DC Leakage Current ±0.1 ±0.1 µA typ
Input Capacitance 37 37 pF typ

REFERENCE INPUT/OUTPUT

Internal Reference Voltage 2.45/2.55 2.45/2.55 V min/max
Internal Reference Tempco ± 15 ± 15 ppm/°C typ
V

Input Voltage Range 1/VCC 1/VCC V min/max

REF

DC Leakage Current ±1 ± 1 µA max
V

Input Impedance 1 1 GΩ typ

REF

TEMPERATURE MEASUREMENT

Temperature Range –40/+85 –40/+85 °C min/max
Resolution
Differential Method
Single Conversion Method
Accuracy
Differential Method
Single Conversion Method

BATTERY MONITOR

Input Voltage Range 0/6 0/6 V min/max
Input Impedance 10 10 kΩ typ Sampling; 1 GΩ when battery monitor off

Accuracy ± 2.5 ± 2 % max External reference
± 3 ± 3 % max Internal reference
LOGIC INPUTS

Input High Voltage, V

Input Low Voltage, V

Input Current, IIN ±1 ±1 µA max Typically 10 nA, VIN = 0 V or +V

Input Capacitance, C

Footnotes on next page.

= 2.5 V internal or external, f

REF

2

2

±2 ± 1 LSB max
–0.9/+1.5 LSB max

= 2 MHz; TA = −40°C to +85°C, unless otherwise noted.

DCLK

±6 ±6 LSB max +VCC = 2.7 V
±4 ±4 LSB max External reference

0 to V

REF

3

4

3

4

2.4 2.4 V min

INH

0.4 0.4 V max

INL

5

IN

1.6 1.6 °C typ

0.3 0.3 °C typ

±2 ±2 °C typ
±2 ±2 °C typ

10 10 pF max

Volts

REF

CS = GND or +VCC; typically 260 Ω when on­board reference enabled

CC

Rev. D | Page 3 of 28

AD7873

Parameter AD7873A1AD7873B1 Unit Test Conditions/Comments

LOGIC OUTPUTS

Output High Voltage, VOH VCC – 0.2 VCC – 0.2 V min I
Output Low Voltage, V

OL

PENIRQ Output Low Voltage, VOL

0.4 0.4 V max I

0.4 0.4 V max 100 kΩ pull-up; I
Floating-State Leakage Current ±10 ±10 µA max
Floating-State Output Capacitance510 10 pF max
Output Coding Straight (Natural) Binary

CONVERSION RATE

Conversion Time 12 12 DCLK cycles max
Track-and-Hold Acquisition Time 3 3 DCLK cycles min
Throughput Rate 125 125 kSPS max

POWER REQUIREMENTS

+VCC (Specified Performance) 2.7/3.6 2.7/3.6 V min/max Functional from 2.2 V to 5.25 V

6

I

CC

Normal Mode (f

= 125 kSPS) 380 380 µA max Internal reference off. VCC = 3.6 V,

SAMPLE

Digital I/Ps = 0 V or VCC

240 µA typ
670 670 µA typ Internal reference on. VCC = 3.6 V
Normal Mode (f

= 12.5 kSPS) 170 170 µA typ Internal reference off. VCC = 2.7 V,

SAMPLE

f
Normal Mode (Static) 150 150 µA typ Internal reference off. VCC = 3.6 V
580 580 µA typ Internal reference on. VCC = 3.6 V
Shutdown Mode (Static) 1 1 µA max 200 nA typ
Power Dissipation
Normal Mode (f

6

= 125 kSPS) 1.368 1.368 mW max VCC = 3.6 V. Internal reference disabled

SAMPLE

2.412 2.412 mW typ VCC = 3.6 V. Internal reference enabled
Shutdown 3.6 3.6 µW max VCC = 3.6 V

1

Temperature range as follows: A, B Versions: –40°C to +85°C.

2

See the section. Terminology

3

Difference between Temp0 and Temp1 measurement. No calibration necessary.

4

Temperature Drift is –2.1 mV/°C.

5

Sample tested @ 25°C to ensure compliance.

6

See the Power vs. Throughput Rate section.

= 250 µA; V

SOURCE

= 250 µA

SINK

= 200 kHz

DCLK

= 2.2 V to 5.25 V

CC

= 250 µA

SINK

Rev. D | Page 4 of 28

AD7873

TIMING SPECIFICATIONS

TA = T

Table 2. Timing Specifications

Parameter Limit at T

f

DCLK

2 MHz max
t

ACQ

t1 10 ns min
t2 60 ns max

3

t

3

t4 200 ns min DCLK high pulse width
t5 200 ns min DCLK low pulse width
t6 60 ns max DCLK falling edge to BUSY rising edge
t7 10 ns min Data setup time prior to DCLK rising edge
t8 10 ns min Data valid to DCLK hold time

3

t

200 ns max Data access time after DCLK falling edge

9

t10 0 ns min
t11 100 ns max
t

12

1

Sample tested at 25°C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of VCC) and timed from a voltage level of 1.6 V.

2

Mark/Space ratio for the DCLK input is 40/60 to 60/40.

3

Measured with the load circuit of and defined as the time required for the output to cross 0.4 V or 2.0 V. Figure 2

4

t12 is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of . The measured number is then extrapolated

back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
time of the part and is independent of the bus loading.

to T

MIN

2

, unless other wise noted; VCC = 2.7 V to 5.25 V, V

MAX

1

, T

MIN

Unit Description

MAX

10 kHz min

= 2.5 V.

REF

1.5 µs min Acquisition time
CS falling edge to first DCLK rising edge
CS falling edge to busy three-state disabled

60 ns max

CS falling edge to DOUT three-state disabled

CS rising edge to DCLK ignored
CS rising edge to BUSY high impedance

4

100 ns max

CS rising edge to DOUT high impedance

, quoted in the timing characteristics is the true bus relinquish

12

Figure 2

I

OL

1.6V

I

OH

02164-D-002

TO

OUTPUT

PIN

50pF

200µA

C

L

200µA

Figure 2. Load Circuit for Digital Output Timing Specifications

Rev. D | Page 5 of 28

AD7873

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 3.

Parameter Rating

+VCC to GND –0.3 V to +7 V
Analog Input Voltage to GND –0.3 V to VCC + 0.3 V
Digital Input Voltage to GND –0.3 V to VCC + 0.3 V
Digital Output Voltage to GND –0.3 V to VCC + 0.3 V
V

to GND –0.3 V to VCC + 0.3 V

REF

Input Current to Any Pin Except Supplies1 ±10 mA
Operating Temperature Range

Commercial (A, B Versions) –40°C to +85°C

Storage Temperature Range –65°C to +150°C
Junction Temperature 150°C
QSOP, TSSOP, LFCSP Packages, Power

Dissipation

θJA Thermal Impedance 149.97°C/W (QSOP)

150.4°C/W (TSSOP)

135.7°C/W (LFCSP)

θJC Thermal Impedance 38.8°C/W (QSOP)

27.6°C/W (TSSOP)
IR Reflow Soldering

Peak Temperature

Time-to-Peak Temperature

Ramp-Down Rate
Pb-free Parts Only:

Peak Temperture 250°C

Time-to-Peak Temperature

Ramp-Up Rate

Ramp-Down Rate

450 mW

220°C (±5°C)
10 sec to 30 sec
6°C/sec max

20 sec to 40 sec
3°C/sec max
6°C/sec max

___________________________

1

Transient currents of up to 100 mA do not cause SCR latch-up.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. D | Page 6 of 28

AD7873

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

BAT

V

GNDY–X–

16 15 14 13

1
2
3
4

(Not to Scale)

PIN 1
INDICATOR

AD7873

TOP VIEW

5678

DIN

BUSY

DOUT

CS

AUX

V

REF

+V

PENIRQ

CC

Figure 3. LFCSP Pin Configuration

1

+V

CC

2

X+

3

GND

V

AUX

Y+
X–
Y–

BAT

AD7873

4

TOP VIEW

5

(Not to Scale)

6

7

8

12

Y+

11

X+
+V

10

CC

9

DCLK

02164-D-003

Figure 4.QSOP/TSSOP Pin Configuration

16

15

14

13
12

11
10

9

DCLK
CS
DIN
BUSY
DOUT
PENIRQ
+V

CC

V

REF

02164-D-004

Table 4. Pin Function Descriptions

Mnemonic Function

+VCC

Power Supply Input. The +V

range for the AD7873 is from 2.2 V to 5.25 V. Both +VCC pins should be connected directly

CC

together.
X+ X+ Position Input. ADC Input Channel 1.
Y+ Y+ Position Input. ADC Input Channel 2.
X– X– Position Input.
Y– Y– Position Input. ADC Input Channel 3.
GND

Analog Ground. Ground reference point for all circuitry on the AD7873. All analog input signals and any external reference

signals should be referred to this GND voltage.
V

BAT

Battery Monitor Input. ADC Input Channel 4.
AUX Auxiliary Input. ADC Input Channel 5.
V

REF

Reference Output for the AD7873. Alternatively an external reference can be applied to this input. The voltage range for the

external reference is 1.0 V to +V

. For specified performance, it is 2.5 V on the AD7873. The internal 2.5 V reference is

CC

available on this pin for use external to the device. The reference output must be buffered before it is applied elsewhere in a

system. A 0.1 µF capacitor is recommended between this pin and GND to reduce system noise effects.
PENIRQ
DOUT

BUSY
DIN

Pen Interrupt. CMOS logic open drain output (requires 10 kΩ to 100 kΩ pull-up resistor externally).

Data Out. Logic Output. The conversion result from the AD7873 is provided on this output as a serial data stream. The bits are

clocked out on the falling edge of the DCLK input. This output is high impedance when

BUSY Output. Logic Output. This output is high impedance when

CS is high.

CS is high.

Data In. Logic Input. Data to be written to the AD7873 control register is provided on this input and is clocked into the

register on the rising edge of DCLK (see the Control Register section).
CS Chip Select Input. Active Low Logic Input. This input provides the dual function of initiating conversions on the AD7873 and

enabling the serial input/output register.
DCLK

External Clock Input. Logic Input. DCLK provides the serial clock for accessing data from the part. This clock input is also used

as the clock source for the AD7873 conversion process.

Rev. D | Page 7 of 28

AD7873

TERMINOLOGY

Integral Nonlinearity

This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale, a point 1 LSB
below the first code transition, and full scale, a point 1 LSB
above the last code transition.

Differential Nonlinearity

This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.

Offset Error

This is the deviation of the first code transition (00 . . . 000) to
(00 . . . 001) f rom the ideal, that is, AGND + 1 LSB.

Gain Error

This is the deviation of the last code transition (111 . . . 110) to
(111 . . . 111) from the ideal (that is, V
error is adjusted out.

Track-and-Hold Acquisition Time

The track-and-hold amplifier enters the acquisition phase on
the fifth falling edge of DCLK after the START bit has been
detected. Three DCLK cycles are allowed for the track-and-hold
acquisition time. The input signal is fully acquired to the 12-bit
level within this time even with the maximum specified DCLK
frequency. See the Analog Input section for more details.

On-Resistance

This is a measure of the ohmic resistance between the drain and
source of the switch drivers.

– 1 LSB) after the offset

REF

Rev. D | Page 8 of 28

AD7873

TYPICAL PERFORMANCE CHARACTERISTICS

207

206

205

204

203

202

201

SUPPLY CURRENT (µA)

200

199

198

–40 –20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 5. Supply Current vs. Temperature

230

f

220

210

SAMPLE

V

REF

= 12.5kHz

= +V

CC

02164-D-005

141

140

139

138

137

136

SUPPLY CURRENT (nA)

135

134

–40 –20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 8. Power-Down Supply Current vs. Temperature

1000

02164-D-008

200

190

180

SUPPLY CURRENT (µA)

170

160

150

2.2 2.6 3.0 3.4 3.8 4.2 4.6 5.0
+V

(V)

CC

Figure 6. Supply Current vs. +V

CC

0.20

0.15

0.10

0.05

0

–0.05

DELTA FROM 25°C (LSB)

–0.10

–0.15

02164-D-006

SAMPLE RATE (kSPS)

100

0.6

0.4

0.2

0

–0.2

DELTA FROM 25°C (LSB)

–0.4

V

REF

3.2 3.72.2 2.7 4.2 4.7 5.2
+V

(V)

CC

Figure 9. Maximum Sample Rate vs. +V

= +V

CC

CC

02164-D-009

–0.20

–40 –20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 7. Change in Gain vs. Temperature

02164-D-007

Rev. D | Page 9 of 28

–0.6

–40 –20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 10. Change in Offset vs. Temperature

02164-D-010