Analog Devices AD7776, AD7778, AD7777 Datasheet

LC2MOS, High Speed

a

FEATURES
AD7776: Single Channel
AD7777: 4-Channel
AD7778: 8-Channel
Fast 10-Bit ADC: 2.5 ms Worst Case
+5 V Only
Half-Scale Conversion Option
Fast Interface Port
Power-Down Mode

APPLICATIONS
HDD Servos
Instrumentation

GENERAL DESCRIPTION

The AD7776, AD7777 and AD7778 are a family of high speed,
multichannel, 10-bit ADCs primarily intended for use in R/W
head positioning servos found in high density hard disk drives.
They have unique input signal conditioning features that make
them ideal for use in such single supply applications.

By setting a bit in a control register within both the four-channel
version, AD7777, and the eight-channel version, AD7778, the
input channels can either be independently sampled or any two
channels of choice can be simultaneously sampled. For all ver­sions the specified input signal range is of the form V
V

. However, if the RTN pin is biased at, say, 2 V the

SWING

analog input signal range becomes 0 V to +2 V for all input
channels. This is covered in more detail under the section
Changing the Analog Input Voltage Range. The voltage V
is the offset of the ADC’s midpoint code from ground and is
supplied either by an onboard reference available to the user
(REFOUT) or by an external voltage reference applied to
REFIN. The full-scale range (FSR) of the ADC is equal to
2 V

SWING

where V

is nominally equal to REFIN/2. Addi-

SWING

tionally, when placed in the half-scale conversion mode, the
value of REFIN is converted. This allows the channel offset(s)
to be measured.

Control register loading and ADC register reading, channel se­lect and conversion start are under the control of the µP. The
twos complemented coded ADCs are easily interfaced to a stan­dard 16-bit MPU bus via their 10-bit data port and standard
microprocessor control lines.

The AD7776/AD7777/AD7778 are fabricated in linear compat­ible CMOS (LC

2

MOS), an advanced, mixed technology process
that combines precision bipolar circuits with low power CMOS
logic. The AD7776 is available in a 24-pin SOIC package; the
AD7777 is available in both 28-pin DIP and 28-pin SOIC pack­ages; the AD7778 is available in a 44-pin PQFP package.

*Protected by U.S. Patent No. 4,990,916.

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Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

BIAS

±

BIAS

1-, 4- & 8-Channel 10-Bit ADCs

AD7776/AD7777/AD7778*

FUNCTIONAL BLOCK DIAGRAMS

V

10

REF

AD7776

AGND

REF

AD7777

DGND

REF

AD7778

DGND

CC

V

CC

10

AGND

V

CC

10

AGND

10

10

10

DB0–DB9

C

REFIN

REFIN

REFOUT

DB0–DB9

C

REFIN

REFIN

REFOUT

DB0–DB9

C

REFIN

REFIN

REFOUT

CLKIN

CONTROL
REGISTER

CLKIN

10-BIT

SWING

CLKIN

10-BIT

SWING

V

BIAS

AGND

ADC

V

AGND

ADC

V

AGND

BUSY/INT

ADCREG1

DGND

CONTROL
REGISTER

ADCREG2
ADCREG1

BIAS

CONTROL
REGISTER

ADCREG2
ADCREG1

BIAS

AIN1

RTN

AIN1

AIN2

AIN3

AIN4

RTN

AIN1
A

IN

A

IN

A

IN

A

IN

A

IN

A

IN

A

IN

RTN

2
3
4
5
6
7
8

MUX

REFIN

CONTROL LOGIC

CS RD WR

REFIN

REFIN

BUSY/INT

MUX

1

MUX

2

MUX

1

MUX

2

10-BIT

T/H

ADC

V

SWING

T/H

1

T/H

V

2

CONTROL LOGIC

T/H

1

T/H

V

2

CONTROL LOGIC

CSRDWR

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1997

AD7776/AD7777/AD7778–SPECIFICATIONS

CLKIN = 8 MHz; RTN = O V; C

Parameter A Versions

= 10 nF; all specifications T

REFIN

to T

MIN

1

Units Conditions/Comments

unless otherwise noted.)

MAX

(VCC = +5 V 6 5%; AGND = DGND = O V;

DC ACCURACY

Resolution

2

10 Bits
Relative Accuracy ±1 LSB max See Terminology
Differential Nonlinearity ±1 LSB max No Missing Codes; See Terminology
Bias Offset Error ±12 LSB max See Terminology
Bias Offset Error Match 10 LSB max Between Channels, AD7777/AD7778 Only; See Terminology
Plus or Minus Full-Scale Error ±12 LSB max See Terminology
Plus or Minus Full-Scale Error Match 10 LSB max Between Channels, AD7777/AD7778 Only; See Terminology

ANALOG INPUTS

Input Voltage Range

All Inputs V

BIAS

± V

SWING

Input Current +200 µA max VIN = V

V min/V max

BIAS

± V

; Any Channel

SWING

REFERENCE INPUT

REFIN 1.9/2.1 V min/V max For Specified Performance
REFIN Input Current +200 µA max

REFERENCE OUTPUT

REFOUT 1.9/2.1 V min/V max Nominal REFOUT = 2.0 V
DC Output Impedance 5 Ω typ
Reference Load Change ±2 mV max For Reference Load Current Change of 0 to ±500 µA

±5 mV max For Reference Load Current Change of 0 to ±1 mA
Short Circuit Current

3

20 mA max See Terminology

Reference Load Should Not Change During Conversion

LOGIC OUTPUTS

DB0–DB9, BUSY/INT

, Output Low Voltage 0.4 V max I

V

OL

, Output High Voltage 4.0 V min I

V

OH

Floating State Leakage Current ±10 µA max
Floating State Capacitance

3

10 pF max

= 1.6 mA

SINK
SOURCE

= 200 µA

ADC Output Coding Twos Complement

LOGIC INPUTS

DB0–DB9,

Input Low Voltage, V
Input High Voltage, V
Input Leakage Current 10 µA max
Input Capacitance

CS, WR, RD, CLKIN

INL

INH

3

0.8 V max

2.4 V min

10 pF max

CONVERSION TIMING

Acquisition Time 4.5 t
Single Conversion 14 t

Double Conversion 28 t
t

CLKIN

High 50 ns min Minimum High Time for CLKIN

t

CLKIN

t

Low 40 ns min Minimum Low Time for CLKIN

CLKIN

CLKIN

5.5 t

+ 70 ns max

CLKIN
CLKIN
CLKIN

125/500 ns min/ns max Period of Input Clock CLKIN

ns min See Terminology
ns max

ns max

POWER REQUIREMENTS

Range +4.75/+5.25 V min/V max For Specified Performance

V

CC

, Normal Mode 15 mA max CS = RD = +5 V, CR8 = 0

I

CC

, Power-Down Mode 1.5 mA max CR8 = 1. All Linear Circuitry OFF

I

CC

Power-Up Time to Operational

Specifications 500 µs max From Power-Down Mode

DYNAMIC PERFORMANCE See Terminology

Signal to Noise and Distortion

S/(N+D) Ratio –57 dB min V
Total Harmonic Distortion (THD) –60 dB min V
Intermodulation Distortion (IMD) –75 dB typ fa = 103.2 kHz, fb = 96.5 kHz with f

= 99.88 kHz Full-Scale Sine Wave with f

IN

= 99.88 kHz Full-Scale Sine Wave with f

IN

SAMPLING

SAMPLING
SAMPLING

= 380.95 kHz
= 380.95 kHz

= 380.95 kHz. Both

Signals Are Sine Waves at Half-Scale Amplitude

Channel-to-Channel Isolation –90 dB typ VIN = 100 kHz Full-Scale Sine Wave with f

NOTES

1

Temperature range as follows: A = –40°C to +85°C.

2

1 LSB = (2 × V

3

Guaranteed by design, not production tested.

Specifications subject to change without notice.

)/1024 = 1.95 mV for V

SWING

SWING

= 1.0 V.

SAMPLING

= 380.95 kHz

–2–

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AD7776/AD7777/AD7778

TIMING SPECIFICATIONS

Parameter Label Limit at T

1, 2

(VCC = +5 V 6 5%; AGND = DGND = 0 V; all specifications T

MIN

to T

Units Test Conditions/Comments

MAX

MIN

to T

unless otherwise noted.)

MAX

INTERFACE TIMING

CS Falling Edge to WR or RD Falling Edge t
WR or RD Rising Edge to CS Rising Edge t
WR Pulse Width t

CS or RD Active to Valid Data
Bus Relinquish Time after

RD

3

4

1
2
3

t

4

t

5

0 ns min
0 ns min
53 ns min

60 ns max Timed from Whichever Occurs Last
10 ns min
45 ns max

Data Valid to WR Rising Edge t
Data Valid after

WR Rising Edge t

WR Rising Edge to BUSY Falling Edge t

6
7
8

55 ns min
10 ns min

1.5 t

2.5 t

CLKIN

+ 70 ns max

CLKIN

ns min CR9 = 0

WR Rising Edge to BUSY Rising Edge or
INT Falling Edge t

WR or RD Falling Edge to INT Rising Edge t

NOTES

1

See Figures 1 to 3.

2

Timing specifications in bold print are 100% production tested. All other times are guaranteed by design, not production tested. All input signals are specified with
tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.

3

t4 is measured with the load circuit of Figure 4 and defined as the time required for an output to cross 0.8 V or 2.4 V.

4

t5 is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 4. The measured time is then extrapolated back

9

t

10
11

to remove the effects of charging or discharging the 100 pF capacitor. This means that the time t5 quoted above is the true bus relinquish time of the device and, as
such, is independent of the external bus loading capacitance.

Specifications subject to change without notice.

19.5 t

33.5 t

+ 70 ns max Single Conversion, CR6 = 0

CLKIN

+ 70 ns max Double Conversion, CR6 = 1

CLKIN

60 ns max CR9 = 1

CS

RD

DB0–DB9

CS

WR

DB0–DB9

t

1

t

4

Figure 1. Read Cycle Timing

t

1

t

3

t

6

Figure 2. Write Cycle Timing

FIRST

CONVERSION

FINISHED

t

3

t

2

t

5

WR, RD

BUSY

(CR8 = 0)

INT

(CR8 = 1)

t

8

t

11

Figure 3.

t

2

DB n

t

7

C

OUT

100pF

(CR6 = 0)

t

9

t

10

t

9

t

10

BUSY/INT

Timing

I

OL

1.6mA

I

OH

200µA

SECOND
CONVERSION
FINISHED (CR6 = 1)
AD7777/AD7778 ONLY

+2.1V

Figure 4. Load Circuit for Bus Timing Characteristics

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–3–

AD7776/AD7777/AD7778

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)

VCC to AGND or DGND . . . . . . . . . . . . . . . . . .–0.3 V, +7 V

AGND, RTN to DGND . . . . . . . . . . . . . –0.3 V, V

+ 0.3 V

CC

CS, RD, WR, CLKIN, DB0–DB9,

BUSY/INT to DGND . . . . . . . . . . . . . –0.3 V, VCC + 0.3 V

Analog Input Voltage to AGND . . . . . . . –0.3 V, V

REFOUT to AGND . . . . . . . . . . . . . . . . –0.3 V, V

REFIN to AGND . . . . . . . . . . . . . . . . . . –0.3 V, V

+ 0.3 V

CC

+ 0.3 V

CC

+ 0.3 V

CC

Operating Temperature Range

All Versions . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C

DIP Package, Power Dissipation . . . . . . . . . . . . . . . . 875 mW

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W

JA

SOIC Packages, Power Dissipation . . . . . . . . . . . . . . 875 mW

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75°C/W

θ

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

PQFP Package, Power Dissipation . . . . . . . . . . . . . . 500 mW

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 95°C/W

JA

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

*Stresses above those listed under “Absolute Maximum Ratings” may cause

permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

Lead Temperature, Soldering (10 sec) . . . . . . . . . . +260°C

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7776/AD7777/AD7778 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

PIN CONFIGURATIONS

24-Pin SOIC

44-Pin PQFP

WARNING!

ESD SENSITIVE DEVICE

1

DB0

2

DB1
DB2

3
4

DB3

5

DGND

DB4
DB5
DB6
DB7
DB8

(MSB) DB9

BUSY/INT

AD7776

6

TOP VIEW

7

(Not to Scale)

8
9

10

11

12

28-Pin DIP & SOIC

DB0

1

DB1

2

NC

3

DB2

4

DB3

5

DGND

6

DB4

7

AD7777

DB5
DB6
DB7
DB8

(MSB) DB9

BUSY/INT

TOP VIEW

8

(Not to Scale)

9
10
11

12

13

RD

14

NC = NO CONNECT

24
23
22

21
20
19
18
17
16
15
14
13

28
27
26
25
24
23
22
21
20
19
18
17
16
15

C

REFIN

AGND
RTN
REFIN
A

IN

AGND
REFOUT
V

CC

CLKIN
WR
CS
RD

C

REFIN

AGND
RTN
REFIN
AIN4

3

A

IN

AIN2

1

A

IN

AGND
REFOUT
V

CC

CLKIN
WR
CS

REFIN

AGND

DB1

DB0

NC

NC

NC

1 33

NC

2

NC

3

DB2

4

DB3

5

DGND

6

DB4

7

DB5

8

DB6

9

DB7

10

NC

11

NC

12

NC

NC

DB8

NC

39 38 37 36 35 3444 43 42 41 40

AD7778

TOP VIEW

(Not to Scale)

18 19 20 21 221716151413

NC

BUSY/INT

(MSB) DB9

RTN

C

CS

RD

WR

NC = NO CONNECT

REFIN

CLKIN

NC

NC

32

31
30
29

28

27

26
25
24
23

AIN8
AIN7
AIN6
AIN5
AIN4
AIN3
AIN2
AIN1
AGND
REFOUT

V

CC

ORDERING GUIDE

Temperature No. of Package

Model Range Channels Option

AD7776AR
AD7777AN –40°C to +85°C 4 N-28
AD7777AR
AD7778AS

NOTES

1

R = SOIC, N = Plastic DIP, S = PQFP.

2

Analog Devices reserves the right to ship devices branded with a J in place of
the A, e.g., AD7776JR instead of AD7776AR. Temperature range remains
–40°C to +85°C.

2

–40°C to +85°C 1 R-24

2

–40°C to +85°C 4 R-28

2

–40°C to +85°C 8 S-44

1

–4–

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