Analog Devices AD7392 3 b Datasheet
3 V, Parallel Input
FEATURES
Micropower: 100 µA
0.1 µA typical power shutdown
Single-supply 2.7 V to 5.5 V operation
AD7392: 12-bit resolution
AD7393: 10-bit resolution
0.9 LSB differential nonlinearity error
APPLICATIONS
Automotive 0.5 V to 4.5 V output span voltage
Portable communications
Digitally controlled calibration
PC peripherals
GENERAL DESCRIPTION
The AD7392/AD7393 family of 10- and 12-bit voltage output
digital-to-analog converters is designed to operate from a single
3 V supply. Built using a CBCMOS process, these monolithic
DACs offer low cost and ease of use in single-supply 3 V systems.
Operation is guaranteed over the supply voltage range of 2.7 V
to 5.5 V, making this device ideal for battery-operated
applications.
The full-scale voltage output is determined by the external
reference input voltage applied. The rail-to-rail REF
DAC
V
allows a full-scale voltage equal to the positive supply
OUT
or any value in between. The voltage outputs are capable of
DD
sourcing 5 mA.
to
IN
Micropower 10- and 12-Bit DACs
AD7392/AD7393
FUNCTIONAL BLOCK DIAGRAM
AD7392
V
REF
12-BIT
DAC
12
DAC REGISTER
12
Figure 1.
RSD0–D11CSDGND
Both parts are offered with similar pinouts, which allows users
to select the amount of resolution appropriate for their applications without changing the circuit card.
The AD7392/AD7393 are specified for operation over the
extended industrial temperature range (−40°C to +85°C). The
AD7393AR is specified for the automotive temperature range
(−40°C to +125°C). The AD7392/AD7393 are available in
20-lead PDIP and SOIC packages.
For serial data input, 8-lead packaged versions, see the AD7390
and AD7391.
V
DD
V
OUT
SHDN
AGND
01121-001
A 12-bit-wide data latch loads with a 45 ns write time,
eliminating wait states when interfacing to the fastest
process ors. Additionally, an asynchronous
input sets the
RS
output to zero scale at power-on or upon user demand.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
AD7392/AD7393
TABLE OF CONTENTS
Specifications..................................................................................... 3
Reference Input........................................................................... 12
AD7392 Electrical Characteristics ............................................. 3
AD7393 Electrical Characteristics ............................................. 4
Timing Diagram ........................................................................... 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics............................................. 8
Operation......................................................................................... 12
D/A Converter Section .............................................................. 12
Amplifier Section ....................................................................... 12
REVISION HISTORY
6/04—Changed from Rev. A to Rev. B
Removed TSSOP.................................................................Universal
Changes to Ordering Guide.......................................................... 16
3/99—Changed from Rev. 0 to Rev. A
Power Supply............................................................................... 12
Input Logic Levels ...................................................................... 13
Digital Interface.......................................................................... 13
Reset (
Power Shutdown (
) Pin ............................................................................. 13
RS
)......................................................... 14
SHDN
Unipolar Output Operation...................................................... 14
Bipolar Output Operation......................................................... 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 16
11/96—Revision 0: Initial Version
Rev. B | Page 2 of 16
AD7392/AD7393
SPECIFICATIONS
AD7392 ELECTRICAL CHARACTERISTICS
At VRE = 2.5 V, 240°C < TA < 185°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions 3 V ± 10% 5 V ± 6 10% Unit
STATIC PERFORMANCE
Resolution1 N 12 12 Bits
Relative Accuracy2 INL TA = +25°C ±1.8 ±1.8 LSB max
T
Differential Nonlinearity2 DNL TA = +25°C, Monotonic ±0.9 ±0.9 LSB max
Monotonic ±1 ±1 LSB max
Zero-Scale Error V
Data = 0x000, TA = +25°C, +85°C 4.0 4.0 mV max
ZSE
Data = 0x000, TA = −40°C 8.0 8.0 mV max
Full-Scale Voltage Error V
TA = +25°C, +85°C, Data = 0xFFF ±8 ±8 mV max
FSE
T
Full-Scale Tempco3 TCVFS 28 28 ppm/°C typ
REFERENCE INPUT
V
Range V
REF
Input Resistance R
Input Capacitance3 C
0/VDD 0/VDD V min/max
REF
2.5 2.5 MΩ typ4
REF
5 5 pF typ
REF
ANALOG OUTPUT
Current (Source) I
Output Current (Sink) I
Data = 0x800, V
OUT
Data = 0x800, VOU = 5 LSB 3 3 mA typ
OUT
Capacitive Load3 CL No Oscillation 100 100 pF typ
LOGIC INPUTS
Logic Input Low Voltage VIL 0.5 0.8 V max
Logic Input High Voltage VIH VDD − 0.6 VDD − 0.6 V min
Input Leakage Current IIL 10 10 µA max
Input Capacitance3 CIL 10 10 pF max
INTERFACE TIMING
3, 5
Chip Select Write Width tCS 45 45 ns min
Data Setup tDS 30 15 ns min
Data Hold tDH 20 5 ns min
Reset Pulse Width tRS 40 30 ns min
AC CHARACTERISTICS
Output Slew Rate SR Data = 0x000 to 0xFFF to 0x000 0.05 0.05 V/µs typ
Settling Time6 tS To ±0.1% of Full Scale 70 60 µs typ
Shutdown Recovery Time t
80 µs typ
SDR
DAC Glitch Q Code 0x7FF to 0x800 to 0x7FF 65 65 nV/s typ
Digital Feedthrough Q 15 15 nV/s typ
Feedthrough V
OUT/VREF
V
Data = 0x000, f = 100 kHz −63 −63 dB typ
SUPPLY CHARACTERISTICS
Power Supply Range VDD
DNL < ±1 LSB 2.7/5.5 2.7/5.5 V min/max
RANGE
Positive Supply Current IDD VIL = 0 V, No Load 55/100 55/100 µA typ/max
Shutdown Supply Current I
Power Dissipation P
DD−SD
VIL = 0 V, No Load 300 500 µW max
DISS
Power Supply Sensitivity PSS ∆ VDD = ±5% 0.006 0.006 %/% max
1
One LSB = V
2
The first two codes (0x000, 0x001) are excluded from the linearity error measurement.
3
These parameters are guaranteed by design and not subject to production testing.
4
Typicals represent average readings measured at 25°C.
5
All input control signals are specified with tR = tF = 2 ns (10% to 90% of 13 V) and timed from a voltage level of 1.6 V.
6
The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
/4096 V for the 12-bit AD7392.
REF
= −40°C°, 185°C ±3 ±3 LSB max
A
= −40°C, Data = 0xFFF ±20 ±20 mV max
A
= 5 LSB 1 1 mA typ
OUT
= 1.5 V dc + 1 V p-p,
REF
SHDN = 0, VIL = 0 V, No Load
0.1/1.5 0.1/1.5 µA typ/max
Rev. B | Page 3 of 16
AD7392/AD7393
AD7393 ELECTRICAL CHARACTERISTICS
At V
Table 2.
Parameter Symbol Conditions 3 V ± 10% 5 V ± 10% Unit
STATIC PERFORMANCE
REFERENCE INPUT
ANALOG OUTPUT
INTERFACE TIMING
AC CHARACTERISTICS
Data = 0x000, f = 100 kHz −63 −63 dB typ
SUPPLY CHARACTERISTICS
1
One LSB = V
2
The first two codes (0x000, 0x001) are excluded from the linearity error measurement.
3
These parameters are guaranteed by design and not subject to production testing.
4
Typicals represent average readings measured at 25° C.
5
All input control signals are specified with tR = tF = 2 ns (10% to 90% of 13 V) and timed from a voltage level of 1.6 V.
6
The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
= 2.5 V, −40°C < TA < 185°C, unless otherwise noted.
REF IN
Resolution1 N 10 10 Bits
Relative Accuracy2 INL TA = +25°C ±1.75 ±1.75 LSB max
T
= −40°C, +85°C, +125°C ±2.0 ±2.0 LSB max
A
Differential Nonlinearity2 DNL Monotonic ±0.8 ±0.8 LSB max
Zero-Scale Error V
Full-Scale Voltage Error V
Data = 0x000 9.0 9.0 mV max
ZSE
TA = +25°C, +85°C, +125°C, Data = 0x3FF ±32 ±32 mV max
FSE
T
= −40°C, Data = 0x3FF ±42 ±42 mV max
A
Full-Scale Tempco3 TCVFS 28 28 ppm/°C typ
V
Range V
REF IN
Input Resistance R
Input Capacitance3 C
Output Current (Source) I
Output Current (Sink) I
0/VDD 0/VDD V min/max
REF
2.5 2.5 MΩ typ
REF
5 5 pF typ
REF
Data = 0x200, ∆ V
OUT
Data = 0x200, ∆ V
OUT
= 5 LSB 1 1 mA typ
OUT
= 5 LSB 3 3 mA typ
OUT
4
Capacitive Load3 CL No Oscillation 100 100 pF typ
LOGIC INPUTS
Logic Input Low Voltage VIL 0.5 0.8 V max
Logic Input High Voltage VIH VDD − 0.6 VDD − 0.6 V min
Input Leakage Current IIL 10 10 µA max
Input Capacitance3 CIL 10 10 pF max
3, 5
Chip Select Write Width tCS 45 45 ns
Data Setup tDS 30 15 ns
Data Hold tDH 20 5 ns
Reset Pulse Width tRS 40 30 ns
Output Slew Rate SR Data = 0x000 to 0x3FF to 0x000 0.05 0.05 V/µs typ
Settling Time6 tS To ±0.1% of Full Scale 70 60 µs typ
Shutdown Recovery Time t
80 µs typ
SDR
DAC Glitch Q Code 0x7FF to 0x800 to 0x7FF 65 65 nV/s typ
Digital Feedthrough Q 15 15 nV/s typ
Feedthrough V
Power Supply Range VDD
V
OUT/VREF
DNL < ± 1 LSB 2.7/5.5 2.7/5.5 V min/max
RANGE
= 1.5 V dc 11 V p-p,
REF
Positive Supply Current IDD VIL = 0 V, No Load, TA= +25°C 55 55 µA typ
V
Shutdown Supply Current I
Power Dissipation P
SHDN = 0, VIL= 0 V, No Load 0.1/1.5 0.1/1.5 µA typ/max
DD−SD
VIL = 0 V, No Load 300 500 µW max
DISS
= 0 V, No Load 100 100 µA max
IL
Power Supply Sensitivity PSS ∆ VDD = ±5% 0.006 0.006 %/% max
/1024 V for the 10-bit AD7393.
REF
Rev. B | Page 4 of 16
AD7392/AD7393
TIMING DIAGRAM
1
CS
0
1
D11–D0
0
1
RS
0
t
CS
t
DS
DATA VALID
t
DH
t
RS
FS
V
OUT
ZS
t
S
±
0.1%FS
ERROR BAND
t
S
01121-004
Figure 2. Timing Diagram
Rev. B | Page 5 of 16
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