ANALOG DEVICES AD1835A Service Manual

2 ADC, 8 DAC,

www.BDTIC.com/ADI

96 kHz, 24-Bit - Codecs

AD1835A

FEATURES
5 V Stereo Audio System with 3.3 V Tolerant Digital

Interface
Supports up to 96 kHz Sample Rates
192 kHz Sample Rate Available on 1 DAC
Supports 16-/20-/24-Bit Word Lengths
Multibit - Modulators with

Perfect Differential Linearity Restoration for

Reduced Idle Tones and Noise Floor
Data Directed Scrambling DACs—Least

Sensitive to Jitter
Differential Output for Optimum Performance

ADCs: –95 dB THD + N, 105 dB SNR, and

Dynamic Range

DACs: –95 dB THD + N, 108 dB SNR, and

Dynamic Range

On-Chip Volume Controls per Channel with

1024-Step Linear Scale
DAC and ADC Software Controllable Clickless Mutes
Digital De-emphasis Processing

FUNCTIONAL BLOCK DIAGRAM

Supports 256  fS, 512  fS, and 768  fS Master

Mode Clocks
Power-Down Mode Plus Soft Power-Down Mode
Flexible Serial Data Port with Right-Justified, Left-

Justified, I
TDM Interface Mode Supports 8-In/8-Out Using a
Single SHARC

2

S Compatible, and DSP Serial Port Modes

®

SPORT

52-Lead MQFP Plastic Package

APPLICATIONS
DVD Video and Audio Players
Home Theater Systems
Automotive Audio Systems
Audio/Visual Receivers
Digital Audio Effects Processors

PRODUCT OVERVIEW

The AD1835A is a high performance, single-chip codec fea­turing four stereo DACs and one stereo ADC. Each DAC
comprises a high performance digital interpolation filter, a
multibit ⌺-⌬ modulator featuring Analog Devices’ patented
technology, and a continuous-time voltage out analog section.

(continued on page 11)

DVD D

ODVDDDVD D

DLRCLK

DBCLK

DSDATA1

DSDATA2

DSDATA3

DSDATA4

ADCLP

ADCLN

ADCRP

ADCRN

-

ADC

-

ADC

DIGITAL

FILTER

DIGITAL

FILTER

SERIAL DATA

I/O PORT

AD1835A

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

CINCLATCHCCLK COUT

CONTROL PORT

VOL UME

VOL UME

VOL UME

VOL UME

VOL UME

VOL UME

VOL UME

VOL UME

AGND AGNDAGNDAGNDDGNDDGND

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

MCLKASDATAABCLKALRCLK

CLOCK

DIGITAL

FILTER

DIGITAL

FILTER

DIGITAL

FILTER

DIGITAL

FILTER

PD/RST M/S

V

-

DAC

-

DAC

-

DAC

-

DAC

REF

AV DD

AV DD

OUTLP1
OUTLN1
OUTRP1
OUTRN1

OUTLP2
OUTLN2
OUTRP2
OUTRN2

OUTLP3
OUTLN3
OUTRP3
OUTRN3

OUTLP4
OUTLN4
OUTRP4
OUTRN4

FILTD
FILTR

AD1835A–SPECIFICATIONS

www.BDTIC.com/ADI

TEST CONDITIONS

Supply Voltages (AVDD, DVDD) 5.0 V
Ambient Temperature 25°C
Input Clock 12.288 MHz (256 ⫻ f
ADC Input Signal 1.0078125 kHz, –1 dBFS (Full Scale)
DAC Input Signal 1.0078125 kHz, 0 dBFS (Full Scale)
Input Sample Rate (f
Measurement Bandwidth 20 Hz to 20 kHz
Word Width 24 Bits
Load Capacitance 100 pF
Load Impedance 47 k⍀

Performance of all channels is identical (exclusive of the Interchannel Gain Mismatch and Interchannel Phase Deviation
specifications).

Parameter Min Typ Max Unit

ANALOG-TO-DIGITAL CONVERTERS

ADC Resolution 24 Bits
Dynamic Range (20 Hz to 20 kHz, –60 dB Input)

No Filter 100 103 dB
A-Weighted (48 kHz and 96 kHz) 105 dB

Total Harmonic Distortion + Noise (THD + N)

48 kHz –95 –88.5 dB

96 kHz –95 –87.5 dB
Interchannel Isolation 100 dB
Interchannel Gain Mismatch 0.025 dB
Analog Inputs

Differential Input Range (⫾ Full Scale) –2.828 +2.828 V

Common-Mode Input Voltage 2.25 V

Input Impedance 4 k⍀

Input Capacitance 15 pF
V

REF

DC Accuracy

Gain Error ± 5%

Gain Drift 35 ppm/°C

) 48 kHz

S

Mode)

S

2.25 V

DIGITAL-TO-ANALOG CONVERTERS

DAC Resolution 24 Bits
Dynamic Range (20 Hz to 20 kHz, –60 dBFS Input)

No Filter 103 105 dB

With A-Weighted Filter (48 kHz and 96 kHz) 105 108 dB

Total Harmonic Distortion + Noise (48 kHz and 96 kHz) –95 –90 dB
Interchannel Isolation 110 dB
DC Accuracy

Gain Error ⫾4.0 %

Interchannel Gain Mismatch 0.025 dB

Gain Drift 200 ppm/°C
Interchannel Crosstalk (EIAJ Method) –120 dB
Interchannel Phase Deviation ⫾0.1 Degrees
Volume Control Step Size (1023 Linear Steps) 0.098 %
Volume Control Range (Maximum Attenuation) 60 dB
Mute Attenuation –100 dB
De-emphasis Gain Error ⫾0.1 dB
Full-Scale Output Voltage at Each Pin (Single-Ended) 1.0 (2.8) V rms (V p-p)
Output Resistance at Each Pin 180 ⍀
Common-Mode Output Voltage 2.25 V

ADC DECIMATION FILTER, 48 kHz*

Pass Band 21.77 kHz
Pass-Band Ripple ⫾0.01 dB
Stop Band 26.23 kHz
Stop-Band Attenuation 120 dB
Group Delay 910 ␮s

REV. A–2–

AD1835A

www.BDTIC.com/ADI

Parameter Min Typ Max Unit

ADC DECIMATION FILTER, 96 kHz*

Pass Band 43.54 kHz
Pass-Band Ripple ⫾0.01 dB
Stop Band 52.46 kHz
Stop-Band Attenuation 120 dB
Group Delay 460 ␮s

DAC INTERPOLATION FILTER, 48 kHz*

Pass Band 21.77 kHz
Pass-Band Ripple ⫾0.06 dB
Stop Band 28 kHz
Stop-Band Attenuation 55 dB
Group Delay 340 ␮s

DAC INTERPOLATION FILTER, 96 kHz*

Pass Band 43.54 kHz
Pass-Band Ripple ± 0.06 dB
Stop Band 52 kHz
Stop-Band Attenuation 55 dB
Group Delay 160 ␮s

DAC INTERPOLATION FILTER, 192 kHz*

Pass Band 81.2 kHz
Pass-Band Ripple ⫾0.06 dB
Stop Band 97 kHz
Stop-Band Attenuation 80 dB
Group Delay 110 ␮s

DIGITAL I/O

Input Voltage High 2.4 V
Input Voltage Low 0.8 V
Output Voltage High ODVDD – 0.4 V
Output Voltage Low 0.4 V
Leakage Current ⫾10 ␮A

POWER SUPPLIES

Supply Voltage (AVDD and DVDD) 4.5 5.0 5.5 V
Supply Voltage (ODVDD) 3.0 DVDD V
Supply Current I
Supply Current I
Supply Current I
Supply Current I
Dissipation

Operation, Both Supplies 740 mW
Operation, Analog Supply 420 mW
Operation, Digital Supply 320 mW
Power-Down, Both Supplies 280 mW

Power Supply Rejection Ratio

1 kHz, 300 mV p-p Signal at Analog Supply Pins –70 dB
20 kHz, 300 mV p-p Signal at Analog Supply Pins –75 dB

*Guaranteed by design.

ANALOG

ANALOG,

DIGITAL

DIGITAL,

Power-Down 55 67 mA

Power-Down 1 4.5 mA

84 95 mA

64 74 mA

Specifications subject to change without notice.

REV. A

–3–

AD1835A

www.BDTIC.com/ADI

TIMING SPECIFICATIONS

Parameter Min Max Unit Comments

MASTER CLOCK AND RESET

t

MH

t

ML

t

PDR

®

PORT

SPI

t

CCH

t

CCL

t

CCP

t

CDS

t

CDH

t

CLS

t

CLH

t

COE

t

COD

t

COTS

DAC SERIAL PORT (48 kHz and 96 kHz)

Normal Mode (Slave)

t

DBH

t

DBL

f

DB

t

DLS

t

DLH

t

DDS

t

DDH

Packed 128/256 Modes (Slave)

t

DBH

t

DBL

f

DB

t

DLS

t

DLH

t

DDS

t

DDH

ADC SERIAL PORT (48 kHz and 96 kHz)

Normal Mode (Master)

t

ABD

t

ALD

t

ABDD

Normal Mode (Slave)

t

ABH

t

ABL

f

AB

t

ALS

t

ALH

t

ABDD

Packed 128/256 Mode (Master)

t

PABD

t

PALD

t

PABDD

MCLK High 15 ns
MCLK Low 15 ns
PD/RST Low 20 ns

CCLK High 40 ns
CCLK Low 40 ns
CCLK Period 80 ns
CDATA Setup 10 ns To CCLK Rising
CDATA Hold 10 ns From CCLK Rising
CLATCH Setup 10 ns To CCLK Rising
CLATCH Hold 10 ns From CCLK Rising
COUT Enable 15 ns From CLATCH Falling
COUT Delay 20 ns From CCLK Falling
COUT Three-State 25 ns From CLATCH Rising

DBCLK High 60 ns
DBCLK Low 60 ns
DBCLK Frequency 64 ⫻ f

S

DLRCLK Setup 10 ns To DBCLK Rising
DLRCLK Hold 10 ns From DBCLK Rising
DSDATA Setup 10 ns To DBCLK Rising
DSDATA Hold 10 ns From DBCLK Rising

DBCLK High 15 ns
DBCLK Low 15 ns
DBCLK Frequency 256 ⫻ f

S

DLRCLK Setup 10 ns To DBCLK Rising
DLRCLK Hold 10 ns From DBCLK Rising
DSDATA Setup 10 ns To DBCLK Rising
DSDATA Delay 10 ns From DBCLK Rising

ABCLK Delay 25 ns From MCLK Rising Edge
ALRCLK Delay Low 5 ns From ABCLK Falling Edge
ASDATA Delay 10 ns From ABCLK Falling Edge

ABCLK High 60 ns
ABCLK Low 60 ns
ABCLK Frequency 64 ⫻ f

S

ALRCLK Setup 5 ns To ABCLK Rising
ALRCLK Hold 15 ns From ABCLK Rising
ASDATA Delay 15 ns From ABCLK Falling Edge

ABCLK Delay 40 ns From MCLK Rising Edge
LRCLK Delay 5 ns From ABCLK Falling Edge
ASDATA Delay 10 ns From ABCLK Falling Edge

REV. A–4–

Parameter Min Max Unit Comments

P

www.BDTIC.com/ADI

TDM256 MODE (Master, 48 kHz and 96 kHz)

t

TBD

t

FSD

t

TABDD

t

TDDS

t

TDDH

BCLK Delay 40 ns From MCLK Rising
FSTDM Delay 5 ns From BCLK Rising
ASDATA Delay 10 ns From BCLK Rising
DSDATA1 Setup 15 ns To BCLK Falling
DSDATA1 Hold 15 ns From BCLK Falling

TDM256 MODE (Slave, 48 kHz and 96 kHz)

f

AB

t

TBCH

t

TBCL

t

TFS

t

TFH

t

TBDD

t

TDDS

t

TDDH

BCLK Frequency 256 ⫻ f

S

BCLK High 17 ns
BCLK Low 17 ns
FSTDM Setup 10 ns To BCLK Falling
FSTDM Hold 10 ns From BCLK Falling
ASDATA Delay 15 ns From BCLK Rising
DSDATA1 Setup 15 ns To BCLK Falling
DSDATA1 Hold 15 ns From BCLK Falling

TDM512 MODE (Master, 48 kHz)

t

TBD

t

FSD

t

TABDD

t

TDDS

t

TDDH

BCLK Delay 40 ns From MCLK Rising
FSTDM Delay 5 ns From BCLK Rising
ASDATA Delay 10 ns From BCLK Rising
DSDATA1 Setup 15 ns To BCLK Falling
DSDATA1 Hold 15 ns From BCLK Falling

TDM512 MODE (Slave, 48 kHz )

f

AB

t

TBCH

t

TBCL

t

TFS

t

TFH

t

TBDD

t

TDDS

t

TDDH

BCLK Frequency 512 ⫻ f

S

BCLK High 17 ns
BCLK Low 17 ns
FSTDM Setup 10 ns To BCLK Falling
FSTDM Hold 10 ns From BCLK Falling
ASDATA Delay 15 ns From BCLK Rising
DSDATA1 Setup 15 ns To BCLK Falling
DSDATA1 Hold 15 ns From BCLK Falling

AUXILIARY INTERFACE (48 kHz and 96 kHz)

t

AXDS

t

AXDH

f

ABP

AAUXDATA Setup 10 ns To AUXBCLK Rising
AAUXDATA Hold 10 ns From AUXBCLK Rising
AUXBCLK Frequency 64 ⫻ f

S

Slave Mode

t

AXBH

t

AXBL

t

AXLS

t

AXLH

AUXBCLK High 15 ns
AUXBCLK Low 15 ns
AUXLRCLK Setup 10 ns To AUXBCLK Rising
AUXLRCLK Hold 10 ns From AUXBCLK Rising

Master Mode

t

AUXLRCLK

t

AUXBCLK

Specifications subject to change without notice.

AUXLRCLK Delay 15 ns From AUXBCLK Falling
AUXBCLK Delay 20 ns From MCLK Rising

AD1835A

t

MCLK

t

MH

MCLK

t

ML

D/RST

t

PDR

Figure 1. MCLK and PD/

REV. A

–5–

RST

Timing

AD1835A

www.BDTIC.com/ADI

ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C, unless otherwise noted.)

AVDD, DVDD, ODVDD to AGND, DGND . . –0.3 V to +6.0 V

AGND to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V

Digital I/O Voltage to DGND . . . . –0.3 V to ODVDD + 0.3 V

Analog I/O Voltage to AGND . . . . . . –0.3 V to AVDD + 0.3 V

Operating Temperature Range

Industrial (A Version) . . . . . . . . . . . . . . . . . –40°C to +85°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

ORDERING GUIDE

Model Temperature Range Package Description Package Option

AD1835AAS –40°C to +85°C 52-Lead MQFP S-52-1
AD1835AAS-REEL –40°C to +85°C 52-Lead MQFP S-52-1
AD1835AASZ* –40°C to +85°C 52-Lead MQFP S-52-1
AD1835AASZ-REEL* –40°C to +85°C 52-Lead MQFP S-52-1
EVAL-AD1835AEB Evaluation Board

*Z = Pb-free part.

TEMPERATURE RANGE

Parameter Min Typ Max Unit

Specifications Guaranteed 25 °C
Functionality Guaranteed –40 +85 °C
Storage –65 +150 °C

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD1835A features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.

REV. A–6–

PIN CONFIGURATION

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AD1835A

DSDATA2

DSDATA1

AGND

OUTLN3

DGND

39

38

37

36

35

34

33

32

31

30

29

28

27

OUTLP3

DVDD

DBCLK

DLRCLK

M/S

AGND

OUTRP4

OUTRN4

OUTLP4

OUTLN4

AGND

AVDD

OUTRP3

OUTRN3

DVDD

CLATCH

CIN

PD/RST

AGND

OUTLN1

OUTLP1

OUTRN1

OUTRP1

AGND

AVDD

OUTLN2

OUTLP2

DGND

CCLK

COUT

ASDATA

ODVDD

MCLK

ALRCLK

ABCLK

ADCLP

ADCLN

DSDATA4

ADCRN

50 494847 46 45 44 43 42 41 40

51

52

1

2

3

4

5

6

7

8

9

10

11

12

13

14 15 16 17 18 19 20 21 22 23 24 25 26

OUTRP2

OUTRN2

AGND

AD1835A

(Not to Scale)

FILTD

FILTR

TOP VIEW

AVDD

DSDATA3

ADCRP

PIN FUNCTION DESCRIPTIONS

Input/

Pin Number Mnemonic Output Description

1, 39 DVDD Digital Power Supply. Connect to digital 5 V supply.
2CLATCH I Latch Input for Control Data.
3 CIN I Serial Control Input.
4 PD/RST I Power-Down/Reset.
5, 10, 16, 24, 30, 35 AGND Analog Ground.
6, 12, 25, 31 OUTLNx O DACx Left Channel Negative Output.
7, 13, 26, 32 OUTLPx O DACx Left Channel Positive Output.
8, 14, 27, 33 OUTRNx O DACx Right Channel Negative Output.
9, 15, 28, 34 OUTRPx O DACx Right Channel Positive Output.
11, 19, 29 AVDD Analog Power Supply. Connect to analog 5 V supply.
17 FILTD Filter Capacitor Connection. Recommended 10 µF/100 nF.
18 FILTR Reference Filter Capacitor Connection. Recommended 10 µF/100 nF.
20 ADCLN I ADC Left Channel Negative Input.
21 ADCLP I ADC Left Channel Positive Input.
22 ADCRN I ADC Right Channel Negative Input.
23 ADCRP I ADC Right Channel Positive Input.
36 M/S I ADC Master/Slave Select.
37 DLRCLK I/O DAC LR Clock.
38 DBCLK I/O DAC Bit Clock.
40, 52 DGND Digital Ground.
41 to 44 DSDATAx I DACx Input Data (Left and Right Channels).
45 ABCLK I/O ADC Bit Clock.
46 ALRCLK I/O ADC LR Clock.
47 MCLK I Master Clock Input.
48 ODVDD Digital Output Driver Power Supply.
49 ASDATA O ADC Serial Data Output.
50 COUT O Output for Control Data.
51 CCLK I Control Clock Input for Control Data.

REV. A

–7–

AD1835A–Typical Performance Characteristics

www.BDTIC.com/ADI

0

–50

–100

MAGNITUDE – dB

–150

05

FREQUENCY – Normalized to f

10

TPC 1. ADC Composite Filter Response

5

0

–5

–10

–15

MAGNITUDE – dB

–20

5

0

–5

–10

–15

MAGNITUDE – dB

–20

–25

15

S

–30

0205

10 15

FREQUENCY – Hz

TPC 4. ADC High-Pass Filter Response, fS = 96 kHz

0

–50

MAGNITUDE – dB

–100

–25

–30

0205

10 15

FREQUENCY – Hz

TPC 2. ADC High-Pass Filter Response, fS = 48 kHz

0

–50

MAGNITUDE – dB

–100

–150

0 2.00.5

FREQUENCY – Normalized to f

1.0 1.5

S

TPC 3. ADC Composite Filter Response
(Pass-Band Section)

–150

0 20050 100 150

FREQUENCY – kHz

TPC 5. DAC Composite Filter Response, fS = 48 kHz

0

–50

MAGNITUDE – dB

–100

–150

0 20050 100 150

FREQUENCY – kHz

TPC 6. DAC Composite Filter Response, fS = 96 kHz

REV. A–8–