No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or
translated into any language or computer language, in any form or by any means, electronic, mechanical,
magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Ampro
Computers, Incorporated.
DISCLAIMER
Ampro Computers, Incorporated makes no representations or warranties with respect to the contents of
this manual or of the associated Ampro products, and specifically disclaims any implied warranties of
merchantability or fitness for any particular purpose. Ampro shall under no circumstances be liable for
incidental or consequential damages or related expenses resulting from the use of this product, even if it
has been notified of the possibility of such damages. Ampro reserves the right to revise this publication
from time to time without obligation to notify any person of such revisions. If errors are found, please
contact Ampro at the address listed below on the Notice page of this document.
TRADEMARKS
Ampro and the Ampro logo are registered trademarks, and CoreModule, EnCore, Little Board,
LittleBoard, MightyBoard, MiniModule, ReadyBoard, ReadyBox, ReadyPanel, and ReadySystem are
trademarks of Ampro Computers, Inc. All other marks are the property of their respective companies.
REVISION HISTORY
RevisionReason for ChangeDate
A, AInitial ReleaseMar/06
A, BBIOS Update/ChangesSept/06
Ampro Computers, Incorporated
5215 Hellyer Avenue
San Jose, CA 95138-1007
Tel. 408 360-0200
Fax 408 360-0222
www.ampro.com
This reference manual is for the person who designs computer related equipment, including but not
limited to hardware and software design and implementation of the same. Ampro Computers, Inc.
assumes you are qualified in designing and implementing your hardware designs and its related software
into your prototype computer equipment.
iiReference ManualXTX 820
Contents
Chapter 1About This Manual......................................................................................................... 1
Purpose of this Manual ...................................................................................................................... 1
Table 4-2. Exiting and Loading Default Keys..................................................................................63
Table 4-3. Local Flat Panel Type List..............................................................................................66
XTX 820Reference Manualv
Contents
Table A-1. Technical Support Contact Information..........................................................................91
Table C-1. Connector and Manufacture’s Part Numbers ................................................................97
viReference ManualXTX 820
Chapter 1About This Manual
Purpose of this Manual
This manual is for designers of systems based on the XTX 820 Computer on Module (COM). This
manual contains information that permits designers to create an embedded system based on specific
design requirements.
Information provided in this reference manual includes:
• XTX 820 Specifications
• Environmental requirements
• Major integrated circuits (chips) and features implemented
• All connectors with pin numbers and definitions
• BIOS Setup Utility information
Information not provided in this reference manual includes:
• Detailed chip specifications
• Internal component operation
• Internal registers or signal operations
• Bus or signal timing for industry standard busses and signals
Reference Material
The following list of reference materials may be helpful for you to complete your design successfully.
Most of this reference material is also available on the Ampro web site in the Embedded Design
Resource Center. The Embedded Design Resource Center was created for embedded system developers
to share Ampro’s knowledge, insight, and expertise gained from years of experience.
For latest revision of the ETX specifications, contact the Working Group, at:
Web site: http://www.etx-ig.org
• XTX Interface Specification, Revision 1.0, July 13, 2005
• XTX Design Guide, Revision 1.0, February 22, 2006
For latest revision of the XTX specifications or design guide, contact the XTX Consortium, at:
Web site: http://www.xtx-standard.org
• PCI 2.1 Compliant Specifications
For latest revision of the PCI specifications, contact the PCI Special Interest Group Office at:
Web site: http://www.pcisig.com
XTX 820Reference Manual1
Chapter 1About This Manual
Major Integrated Circuit (ICs or Chips) Specifications used on the XTX 820 COM:
• Intel Corporation and the Pentium® M 745, Pentium® M 738, or Celeron® M 373 processors
Web site: http://www.intel.com/design/mobile/datashts/302189.htm = Pentium M
Web site: http://www.intel.com/design/mobile/datashts/303110.htm = Celeron M
• Intel Corporation and the 82915GM and 82801FBM chips used for the Memory Hub/Video
controller and I/O Hub respectively.
Web site: http://www.intel.com/design/mobile/datashts/305264.htm = Memory Hub
Web site: http://www.intel.com/design/chipsets/specupdt/301474.htm = I/O Hub
• W inbond Electronics, Corp. and the W83627HG chip used for the Super I/O controller
Web site: http://www.winbond-
• Intel Corporation and the U82562GZ chip used for th e Physical Ethernet controller
Web site: http://www.intel.com/design/network/products/lan/docs/82562_docs.htm
• Realtek Semiconductor, Corp's chip ALC655, used for the AC'97 Audio CODEC.
Web site: ftp://202.65.194.18/pc/ac97/alc655/ALC655_DataSheet_1.3.pdf
NOTEIf you are unable to locate the datasheets using the links provided, go
to the manufacturer's web site where you can perform a search using
the chip datasheet number or name listed, including the extension,
(htm for web page, pdf for files name, etc.
Related Ampro Products
The following items are directly related to successfully using the Ampro product you have just
purchased or plan to purchase. Ampro highly recommends that you purchase and utilize a XTX 820
QuickStart Kit or Development System.
XTX 820 Support Products
• XTX 820 QuickStart Kit (QSK)
The QuickStart Kit includes the XTX 820 module, RAM, a baseboard, and the XTX 820
Documentation and Software (Doc & SW) CD-ROM.
• XTX 820 Documentation and Software CD-ROM
The XTX 820 Documentation and Software (XTX 820 Doc & SW) CD-ROM is provided with
the XTX 820. The CD-ROM includes all of the XTX 820 documentation, including this
reference manual and the XTX 820 QuickStart Guide in PDF format, software utilities, board
support packages, and drivers for the unique dev ices used with Ampro supported operating
systems.
Intel 1.8 GHz Pentium M 745, 1.4 GHz Pentium M 738, or 1.0 GHz Celeron M 373 with an Intel
852GM chipset. This XTX module comes standard with enhanced peripherals, including PCI
bus, two Serial ATA ports and one Ultra/DMA 33/66/100 EIDE controller for two EIDE dri v es,
six USB 2.0 ports, one shared EPP/ECP parallel/ floppy port, two serial ports with TTL levels,
one Infrared (IrDA) port, PS/2 keyboard and mouse interfaces, and an AC’97/HDA (High
Definition Audio) CODEC on the module. The XTX 800 also supports ACPI 2.0 Power
Management, 10/100BaseT Ethernet interface, up to 1 GB of DDR RAM in a single 200-pin
SODIMM slot, a 128-bit graphics controller for CRTs and LVDS flat panels, and a SDVO (Serial
Digital Video Output) interface.
Ampro ETX Products
• ETX 700 – This high-performance, compact, rugged Computer-On-Module (COM) solution uses
Intel® 650 MHz Low Voltage Celeron® or 400 MHz Ultra Low Voltage Celeron CPUs with up
to 512 kB Level 2 Cache on board. This ETX module comes with the standard peripherals,
including dual Ultra/DMA 33/66/100 IDE, floppy drive interface, PCI bus, ISA bus, serial,
parallel, PS/2 keyboard and mouse interfaces, 10/100BaseT Ethernet, USB ports, AGP 4X
equivalent video interface with up to 32 MB UMA Frame Buffer that supports built-in LVDS at
1600x1200 resolution, and AC’97 audio. It also supports up to 512 MB of SODIMM DRAM on
a 50% thicker PCB to meet your custom baseboard needs.
• ETX 802 – This high-performance, compact, rugged Computer-On-Module (COM) solution uses
Intel 1.4 GHz LV Pentium® M 738,1.0 GHz Celeron M 373, or 800 MHz ULV Celeron M CPUs
with an Intel 852GME chipset. This ETX module comes with the standard peripherals, including
dual Ultra/DMA 33/66/100 IDE, floppy drive interface, PCI bus, ISA bus, serial, parallel, PS/2
keyboard and mouse interfaces, 10/100BaseT Ethe rnet, USB 2.0 ports, 128-bit graphics
controller interface with up to 64 MB UMA Frame Buffer that supports CRT and LVDS at
1600x1200 resolution, and AC’97 audio. It also supports up to 1 GB of SODIMM DDR RAM
on a 50% thicker PCB to meet your custom baseboard needs.
Other Ampro Products
• CoreModule™
Family – These complete embedded-PC subsystems on single PC/104 or PC/104Plus form-factor (3.6"x3.8") modules feature 486, Celeron, or Celeron M CPUs. Each
CoreModule includes a full complement of PC core logic functions, plus disk controllers, and
serial and parallel ports. Most modules also include CRT and flat panel graphics controllers
and/or an Ethernet interface. The CoreModules also come with built-in extras to meet the critical
reliability requirements of embedded applications. These include onboard solid state disk
compatibility, watchdog timer, and smart power monitor.
• LittleBoard™ Family – These high-performance, highly integrated single-board computers use
the EBX form factor (5.75"x8.00"), and are available with the Intel Pentium M, Celeron M,
Pentium III, or Celeron processors. The EBX-compliant LittleBoard single-board computers
offer functions equivalent to a complete laptop or desktop PC system, plus several expansion
cards. Built-in extras to meet the critical requirements of embedded applications include onboard
solid state disk capability, watchdog timer, and smart power monitor.
• MightyBoard™ Family – These low-cost, high-performance single-board computers (SBC) use
the Mini-ITX form factor (6.75"x 6.75") and are available with Intel Celeron M or Pentium M
processors. MightyBoard products offer the equivalent functions of a complete laptop or desktop
PC system, including DDR memory, high performance graphics, USB 2.0, Gigabit Ethernet, plus
standard PCI expansion capability in one card slot.
XTX 820Reference Manual3
Chapter 1About This Manual
• MiniModule™ Family – This line of peripheral interface modules compliant with
PC/104,PC/104-Plus, and/or PCI-104 form factor (3.6"x3.8") standards can be used with Ampro's
CoreModule, LittleBoard, and ReadyBoard single-board computers (SBCs) to expand the I/O
configuration of embedded systems. Ampro's highly reliable MiniModule products add value to
existing designs by adding I/O ports, such as IEEE 1394 (Firewire), or by adding support for
legacy boards, such as a PCI-to-ISA bridge adapter board.
• ReadyBoard™ Family – These low-cost, high-performance single-board computers (SBC) use the
EPIC form factor (4.5"x6.5") and are available with the Intel Pentium M, Celeron M, and Celeron
processors. ReadyBoard products offer functions equivalent to a complete laptop or desktop PC
system with standard PC-style connections, and features such as DDR or DDR2 memory, high
performance graphics, USB 2.0, Ethernet and Gigabit Ethernet ports, AC'97 Audio, plus several
expansion cards. Ampro also includes such features as watchdog timer, battery-free boot, a
customizable splash screen, Oops! jumper (BIOS recovery), and serial console
4Reference ManualXTX 820
Chapter 2Product Overview
This introduction presents general information about the XTX Architecture and the XTX 820 ComputerOn-Module (COM). After reading this chapter you should understand:
• XTX Computer-On-Module concept
• XTX 820 architecture and features
• Major components
• Connectors
• Specifications
ETX® Concept and XTX™ Extension
The Embedded Technology eXtended (ETX) module concept is an off the shelf, multi vendor, singleboard-computer that integrates all the core components of a common PC and is mounted onto an
application specific baseboard. ETX modules have a standardized form factor of just 95 mm x 114 mm
and use an identical pin compatible connector on the four system connectors. The ETX module provides
most of the PC functional requirements for any application. These functions include, but are not limited
to, graphics, sound, keyboard/mouse, IDE, Ethernet, parallel, serial and USB ports. Four ruggedized
connectors provide the baseboard interface and carry all the I/O signals to and from the ETX module.
Baseboard designers can utilize as little or as many of the I/O interfaces as deemed necessary. The
baseboard can therefore provide all the interface connectors required to attach the system to the
application specific peripherals. This versatility allows the designer to create a dense and optimized
package, which results in a more reliable product while simplifying system integration. Most
importantly ETX applications are scalable, which means once a product has been created there is the
ability to diversify the product range through the use of different performance class ETX modules.
Simply unplug one module and replace it with another, no redesign is necessary.
XTX™ is an expansion and continuation of the well-established and highly successful ETX standard.
XTX offers the newest I/O technologies on this proven form factor. Currently, the ISA bus is found less
often in modern embedded applications that offer a greater array of features. Consequently, the X2
connector for XTX replaces ISA with features that are currently not found on the ETX platform. These
features include new serial high speed buses such as PCI Express™, ExpressCard, AC'97 HD audio, and
Serial ATA®. XTX also provides the AC'97 High Definition Audio (HDA) and two additional USB 2.0
ports, bringing the USB total to six USB ports. The USB 2.0 and PCI Express interfaces can also
support the next generation PCMCIA card in the ExpressCard. All the other signals found on the X1,
X3, and X4 connectors remain the same in accordance with the ETX standard (Rev. 2.7) and therefore
will be completely compatible. If the embedded application still requires the ISA bus, then a PCI-ISA
bridge can be implemented on the application specific baseboard. If this solution is too co stly then the
readily available XTX LPC bus located the Ampro XTX module can be used.
ETX or XTX modules work like a high-integration chip, plugging into your custom circuit board design
to provide specific control for your logic application. See Figure 2-1.
M2.5 Screws (4)
M2.5 PEM Nuts
Spacing 3mm (4)
XTX 820 Module
Stack Connectors
Custom Baseboard Design
Figure 2-1. XTX 820 and Custom Baseboard
(4 pairs)
XTX820stack
XTX 820Reference Manual5
Chapter 2Product Overview
A
The XTX flexibility enables designers to take an accelerated, low risk path with proven XTX module
designs. Your design flow might look similar to the one shown in Figure 2-2. This diagram gives a
Typical Design Flow of hardware and software functions.
Hardware
Design Path
Design applicationspecific baseboard
CPU and S o ftware
Design Path
Select CPU
Fabricate baseboard
Debug baseboard
Revise baseboard
if necessa r y
Integrate application code
Figure 2-2. Typical Design Flow
Select OS & Tools
Write and Test
pplication Code
Write drivers for
custom Logic
Product Description
The XTX 820 is an exceptionally high integration, high performance, rugged, and high quality
Computer-On-Module (COM), which contains all the component subsystems of a PC/AT motherboard
plus the equivalent of up to 5 expansion boards. The XTX 820 is based on the ultra high performance,
high-integration Intel Pentium M and Celeron M processors giving designers the choice of a complete,
high performance, rugged, embedded processor based on the XTX form factor that conforms to the ETX
V2.7 specification. The module plugs into a custom baseboard which has connectors and additional
circuitry to meet your application requirements.
XTX820designflw
Each XTX 820 incorporates an Intel® 915GM chipset (82915GM + 82801FBM). This includes the
Intel 82915GM Memory & Graphics Hub (Northbridge), which controls the memory and graphics
interface and the Intel 82801FBM I/O Hub (Southbridge) controller for some of the important I/O
functions. A Super I/O chip (83627HG) by Winbond Electronics, Corp controls most of I/O
functions. Together these three chips provide four x1 PCI Express Lanes, PCI bus, two Serial ATA
portsand one Ultra/DMA 33/66/100 EIDE controller for two EIDE drives, six USB 2.0 ports, one
shared EPP/ECP parallel/ floppy port, two serial ports with TTL levels, one Infrared (IrDA) port,
PS/2 keyboard and mouse interfaces, and an AC’97/HDA (High Definition Audio) CODEC on the
module. The XTX 820 also supports ACPI 2.0 Power Management, 10/100BaseT Ethernet interface,
up to 1 GB of DDR2 RAM in a single 200-pin SODIMM socket, and a 128-bit graphics controller,
which provides CRT (VGA), a dedicated LVDS port, TV Out, and two SDVO port interfaces.
The XTX 820 is particularly well suited to either embedded or portable applications and meets the size,
power consumption, temperature range, quality, and reliability demands of embedded system
applications. The XTX 820 requires only a single +5V power supply.
6Reference ManualXTX 820
Chapter 2Product Overview
Board Features
• CPU features
♦ Intel Celeron M 373 1.0 GHz with 512 kbytes L2 cache
♦ Intel Pentium M 738 1.4 GHz with 2 Mbytes L2 cache
♦ Intel Pentium M 745 1.8 GHz with 2 Mbytes L2 cache
♦ All three CPUs use 400 MHz front side bus (FSB)
• Memory
♦ Single standard 200-pin DDR2 SODIMM socket
♦ Supports +1.8V RAM up to 1 GB
♦ Supports PC2 3200 DDR2 400 (400 Mbps, 200 MHz)
♦ Provides low-bandwidth support through low pin count (LPC) bus
♦ Provides substitute for ISA bus with Super I/O chip on baseboard
• IDE/ATA Interfaces
♦ Supports two Serial ATA interfaces
♦ Supports one EIDE channel (UDMA 66/100)
♦ Supports ATAPI and DVD peripherals
♦ Supports IDE native and ATA compatibility modes
• Floppy Disk Interface
♦ Shares output connector with Parallel port
♦ Supports one standard (34-pin) floppy drive
♦ Supports all standard PC/AT formats: 360KB, 1.2MB, 720KB, 1.44MB
• Serial Ports
♦ Provides two buffered TTL serial ports with full handshaking (transceiver on baseboard)
♦ Provides 16550-equivalent controllers, each with a built-in 16-byte FIFO buffer
♦ Supports full modem capability
♦ Supports programmable word length, stop bits, and parity
♦ Supports 16-bit programmable baud-rate generator and a interrupt generator.
XTX 820Reference Manual7
Chapter 2Product Overview
• Infrared Interface
♦ Supports a single IrDA 1.1 port
♦ Supports HPSIR and ASKIR infrared modes
• Parallel Port
♦ Shares output connector with Floppy controller
♦ Supports standard printer port
♦ Supports IEEE standard 1284 protocols of EPP and ECP outputs
♦ Bi-directional data lines
♦ Supports 16 byte FIFO for ECP mode.
• USB Ports
♦ Supports three root USB hubs
♦ Supports six USB ports
♦ Supports USB v2.0 (EHCI) and legacy v1.1
♦ Supports over-current fuses on board
• Keyboard/Mouse Interface
♦ Supports PS/2 keyboard
♦ Supports PS/2 mouse
• Audio interface
♦ Supports AC’97 standard
♦ AC’97 HDA (High Definition A u di o ) CO DEC on board
♦ Supports audio amplifier on baseboard
• Ethernet Interface
♦ Supports one Ethernet port
♦ I/O Hub (Southbridge) provides MAC Et her net Co nt r ol l er
♦ Intel 82562GZ provides the PHY Ethernet interface
♦ Requires magnetics and RJ45 connector on baseboard
♦ Supports IEEE 802.3 10BaseT/100BaseTX compatible physical layer
♦ Supports Auto-negotiation for speed, duplex mode, and flow control
♦ Supports full duplex or half-duplex mode
•Full-duplex mode supports transmit and receive frames simultaneously
•Supports IEEE 802.3x Flow control in full duplex mode
♦ Support CRT resolutions up to 2048x1536 @ 75 Hz (QXGA)
♦ ♦ Supports 8-bits for each RGB DAC or 24-bit RAMDACSupports up to 128 MB of
system memory
♦ System memory is allocated using Dynamic Video Memory Technology (DVMT) v3.0
♦ Supports Dual independent display
8Reference ManualXTX 820
Chapter 2Product Overview
♦ Supports 25 to 112 MHz single/dual channel LVDS with Spread Spectrum Clocking (SSC)
♦ Supports TFT format of 1x18 bpp per channel and 2x18 bpp for 2 channels
♦ Supports LVDS panel size up to UXGA (1600 x 1200)
♦ Provides TV Out to the basebo a rd
♦ Supports Composite and S-Video up to 1024 x 768 resolution for NTSC/PAL
♦ Supports Component Video in 480p/720p/1080i/1080p modes
♦ Provides two Intel compliant SDVO (Serial Digital Video Output) ports
♦ Supports SDVO pixel rates up to 200 MP/s (600 MB/s) transfer speed on each port
Figure 2-3 shows the functional components of the board.
Intel
Pentium M
or Celeron M
CPU
Clock
J3(X3)
SDVO
J1(X1)
J4(X4)
J3(X3)
CRT,
LVDS,
TV Out
SDVO
Ethernet
PHY
82562
IrDA 1.1
Floppy/
Parallel
Keyboard,
Mouse
COM1
COM2
Audio
CODEC
PCI Bus
Memory &
Graphics Hub
82915GM
(Northbridge)
DMI Interfa c e
LPC Bus
Super I/O
W83627HG
SPI
DDR2
SODIMM
Memory Bus
I/O Hub
82801FBM
(Southbridge)
Socket
SMBus
Power Ctrl &
Management
RTC
TA
USB
FWH
BIOS
4 X1 PCI Express Lanes
Board
Controller
A
C’97/HDA Digital Audio
WDT
XTX 820 Connectors
J1 J2 J3 J4
X1 X2 X3 X4
Baseboard Connectors
1x IDE Primary
2
IC
USB Port 0
USB Port 1
USB Port 2
USB Port 3
USB Ports 4, 5
2 SA TA
WTD Trig
Fan Ctrl
J4(X4)
J1(X1)
J2(X2)
XTX820BlkDiagm_a
Figure 2-3. Functional Block Diagram
10Reference ManualXTX 820
Chapter 2Product Overview
Major Integrated Circuits (ICs)
Table 2-1 lists the major integrated circuits (ICs or chips), including a brief description, on the XTX 820
module and Figure 2-4 shows the location of the major chips.
Table 2-1. Major Integrated Circuit Description and Function
Provides most standard I/O
Southbridge functions plus
Ethernet MAC functions
Provides reminder of I/O
functions
provide Ethernet Controller
Embedded
CPU
Memory and
Video
I/O Functions
Plus Ethernet
I/O Functions
Physical
Ethernet
I/O Hub (U4)
(Southbridge)
Ethernet (U3)
CPU (U6)
U2
U2
U3
U3
U4
U4
U6
U6
U8
U8
U10
U10
U11
U11
U16
U16
J5
J5
Clock (U10)
DDR SODIMM
Socket (J5)
Memory Hub (U8)
(Northbridge)
Super I/O (U 11)
XTX820_01a
Figure 2-4. XTX 820 (Top view)
XTX 820Reference Manual11
Chapter 2Product Overview
Connector Definitions
Table 2-2 describes the connectors shown in Figures 2-4 and 2-5.
Table 2-2. Board Connector Descriptions
No.SignalsDescription
J1PCI, USB, Audio100-pin connector for 32-bit PCI, USB (4 ports), and Audio
J2PCI Express, SATA100-pin connector for PCI Express, 2x SATA, USB (2 ports), LPC,
ExpressCards (2), AC'97/HDA Audio, extended system management
J3Video, I/O100-pin connector for Video (VGA, LVDS) and I/O (Flo ppy / Parallel,
Serial Ports 1 & 2, and Infrared) signals
J4IDE, Ethernet
100-pin connector for IDE (Primary & Secondary IDE), I
Power Management, and the Ethernet port
J5DDR2 Memory200-pin socket for a DDR2 SODIMM RAM
J6SDVO port45-pin Serial Digital Video Output ports (2)
PCI, USB, Audio (J1)PCI Express, SATA (J2)
2
C bus,
Flash
(U30)
U30
J1J2
U21
U25
U28
Audio
CODEC
(U21)
SDVO
U17
(J6)
J6
J3
Video, I/O (J3)IDE, Etherne t (J4)
Figure 2-5. Connector Locations (Bottom view)
J4
XTX820_02a
12Reference ManualXTX 820
Chapter 2Product Overview
Specifications
Physical Specifications
Table 2-3 gives the physical dimensions of the board and Figure 2-6 gives the mounting dimensions.
Table 2-3. Weight and Footprint Dimensions
ItemDimension
Weight
0.11 kg. (0.249 lbs.)
(no SODIMM)
Height (overall)12 cm (0.4")
Width95 mm (3.74")
Length114 mm (4.5")
Thickness1.6 mm (0.062")
Mechanical Specifications
Figure 2-6 provides a through the board view of the XTX 820 with the mechanical mounting
dimensions.
NOTEOverall height is measured from the upper
board surface to the highest permanent
component (SODIMM socket, J5) on the
upper board surface. This measurement
does not include any heatsinks available
for this board. The heatsink will increase
this dimension.
92.5
(+0/-0.2)
90.0
0.0
-2.5
0.0
-0.6
2
J4
1
2
J3
1
Mounting Hole O 2.5
J2
J1
108.6
1
2
50.8
1
43.4
39.2
XTX820_02b
2
9.2
5.0
0.0
0.0
-3.0
1
2
:Location peg O 0.7 +/-0.5mm:Location peg O 1.0 +/-0.5mm
111.0
108.0
Figure 2-6. XTX 820 Dimensions (Top, Through Board View)
NOTEAll dimensions are given in millimeters and all
dimensions without tolerance are +/-0.2 mm.
XTX 820Reference Manual13
Chapter 2Product Overview
Power Specifications
Table 2-4 lists the power requirements for each XTX 820 CPU model as described below.
Table 2-4. Power Supply Requirements
Parameter
Input TypeRegulated DC voltagesRegulated DC voltagesRegulated DC voltages
In-rush Current*14.20A16.20A14.16A
Typical BIT**
Current (W)
Notes: *The In-rush current represents video, 256 MB RAM, and power only connected through the
Ampro baseboard. Typically, in-rush current reflects the short duration current spike associated with
charging large on-board bulk capacitance during pow er supply start up. However, the listed in-rush
current value is the result of placing a switch on the DC output of a fully 'ramped' power supply to
give a worst-case current value, which is much higher than the standard method. This in-rush value
should be regarded as a maximum design guideline, not a requisite value.
**The Burn-In-Test (BIT) current setup has CRT video, 256 MB RAM, floppy drive (1), IDE hard
disk drive (1), USB hard disk drive (1), USB CD-ROM (1), serial ports with loopbacks (3), keyboard,
mouse, USB compact flash card reader with compact flash card (64 MB) installed (1), USB Jumpdrive (1), and the Ethernet port (1) operating under Microsoft® Windows®™ XP (SP2). All current
measurements include the Ampro baseboard in the QuickStart Kit.
1.0 GHz ULV Celeron
M Characteristics
3.34A (16.71W)3.89A (19.46W)5.31A (26.57W)
1.4 GHz LV Pentium M
Characteristics
1.8 GHz LV Pentium M
Characteristics
Environmental Specifications
Table 2-5 provides the most efficient operating and storage condition ranges required for this board.
Table 2-5. Environmental Requirements
Parameter
Operating
Storage –20° to +75°C
Temperature
Operating
Storage
Humidity
1.0 GHz ULV Celeron
M Conditions
+0° to +60°C
(32° to +158°F)
(–4° to +185°F)
5% to 95%
relative humidity,
non-condensing
5% to 95%
relative humidity,
non-condensing
1.4 GHz LV Pentium
M Conditions
+0° to +60°C
(32° to +158°F)
–20° to +75°C
(–4 °to +185°F)
5% to 95%
relative humidity,
non-condensing
5% to 95%
relative humidity,
non-condensing
1.8 GHz LV Pentium
M Conditions
+0° to +60°C
(32° to +140°F)
–20° to +75°C
(–4° to +185°F)
5% to 95%
relative humidity,
non-condensing
5% to 95%
relative humidity,
non-condensing
Thermal/Cooling Solutions
The Pentium/Celeron M processors used on the XTX 820 make use of the thermal monitor feature to
help control the processor temperature. Refer to the Thermal Monitoring topic in Chapter 3, Hardware
for more information. The maximum core operating temperature for Pentium M and Celeron M
processors is 100°C. Both Pentium M and Celeron M processors and the Memory & Graphics Hub
(Northbridge) require individual heatsi nks, but no fan. Ampro provides an optional heatspreader pl at e.
CAUTIONTo prevent processor overheating, you must provide an additional form of
cooling when using the heatspreader provided. The heatspreader plate is
not a complete thermal solution for any of the processors listed.
14Reference ManualXTX 820
Chapter 3Hardware
Overview
This chapter discusses the chips and features of the connectors in the following order:
• CPU (U1)
• Memory
• PCI Bus Interface (J1)
♦ USB Interface
♦ Audio Interface
• PCI Express (J2)
♦ Serial ATA (SATA)
♦ ExpressCards
♦ AC'97/HDA
♦ LPC bus
• Primary I/O Interface (J3)
♦ Floppy/Parallel Interface
♦ Serial Port Interfaces
♦ PS/2 Keyboard and Mouse
♦ Infrared (IrDA)
♦ Video Interfaces (CRT & LVDS)
• IDE and Auxiliary Interface (J4)
♦ Primary IDE Interface
♦ Ethernet Interface
♦ Time of Day (RTC)/Battery and Speaker
♦ Power Control and Management
♦ SMBus
• Miscellaneous
♦ Serial Console (Remote Access)
♦ Temperature Monitoring
♦ Watchdog timer
♦ Power
NOTEAmpro Computers, Inc. only supports the features/options tested and listed in this
manual. The main integrated circuits (chips) used in the XTX 820 may provide
more features or options than are listed for the XTX 820, but some of these chip
features/options are not supported on the board and will not function as specified
in the chip documentation.
XTX 820Reference Manual15
Chapter 3 Hardware
CPU (U1)
The XTX 820 offers three Intel processor choices; high performance 1.0 GHz Ultra Low Voltage
(ULV) Celeron M CPU, 1.4 GHz Low Voltage (LV) Pentium M CPU, or 1.8 GHz Pentium M CPU.
Celeron M Processor
The Celeron M processor (Dothan core) at 1.0 GHz has 512 kB L2 Cache with a 400 MHz FSB
(front side bus). The 1.0 GHz Celeron M 373 processor use 90 nm architecture and requires a
heatsink, but no fan.
Pentium M Processors
The Pentium M 738 processor (Dothan core) at 1.4 GHz has 2 MB L2 Cache with a 400 MHz FSB
(front side bus). The 1.4 GHz Pentium M 738 processor uses 90 nm architecture and requires a
heatsink, but no fan.
The Pentium M 745 processor (Dothan core) at 1.8 GHz has 2 MB L2 Cache with a 400 MHz FSB
(front side bus). The 1.8 GHz Pentium M 745 processor uses 90 nm architecture and requires a
heatsink, but no fan below 60°C.
CAUTIONIf you choose to use a heat-spreader plate instead of an individual
heatsink for the processor, then you must provide an additional form
of cooling. The heat-spreader plate is not a complete thermal
solution for any of the processors listed.
Memory
The XTX 820 memory consists of the following elements:
• DDR2 SODIMM socket
• Flash memory
DDR2 SODIMM Socket (J5)
The XTX 820 supports a single 200-pin DDR2 SODIMM socket.
• SODI MM socket (J5) can support up to 1 GB of DDR2 memory
• Suppo rts PC2 3200 DDR 400 operating at 400 Mbps (200 MHz, 5 ns) or faster
+1.8V, 5 ns, 200-pin, SDRAM SODIMM, or fast er. PC2 3 20 0 pr o vides
the best performance for these Intel processors.
Flash Memory (U17)
There is an 8-bit wide, 512 kB flash device used for system BIOS and is connected to the I/O Hub
(Southbridge), through an LPC bus transceiver. The flash memory is used to store system parameters for
battery-free boot capability when there is no battery present. The BIOS is re-programmable and the
features supported are detailed in Chapter 4, BIOS Setup Utility.
Interrupt Channel Assignments (IRQs)
The channel interrupt assignments are listed in Table 3-1.
16Reference ManualXTX 820
Chapter 3 Hardware
Table 3-1. Interrupt Channel Assignments (IRQs)
IRQ#AvailableTypical Interrupt SourceConnected to Pin
0NoCounter 0NA
1NoKeyboardNA
2NoCascade Interrupt from Slave PICNA
3Note 1Serial Port 2 (COM2) / Generi cIRQ3 via SERIRQ
4Note 1Serial Port 1 (COM1) / Generi cIRQ4 via SERIRQ
5Note 2Parallel Port 2 (LPT2) / GenericIRQ5 via SERIRQ
6Note 1Floppy Drive Controlle r / Ge neri cIRQ6 via SERIRQ
7Note 1Parallel Port 1 (LPT1) / GenericIRQ7 via SERIRQ
8NoReal-time ClockNA
9Note 4SCI / GenericIRQ9 via SERIRQ
10Note 2, 1Serial Port 3 (COM3) / GenericIRQ10 via SERIRQ
11Note 2, 1Serial Port 4 (COM4) / GenericIRQ11 via SERIRQ
12Note 1PS/2 Mouse / GenericIRQ12 via SERIRQ
13NoMath processorNA
14Note 1, 3IDE Controller 0 (IDE0) / GenericIRQ14
15Note 1, 3IDE Controller 1 (IDE1) / GenericIRQ15
Notes: In PIC mode, the PCI bus interrupt lines can be routed to any free IRQ.
1. Default, but can be changed to another interrupt. If disabled in BIOS Setup, the interrupt can
be used for another purpose.
2. Function described is available if the baseboard is equipped with the Super I/O controller
Winbond (W83627HG). This I/O controller is supported by the XTX 820 Embedded BIOS.
3. If the ATA/IDE configuration is set to enhanced mode in BIOS setup (serial ATA and
parallel ATA native mode operation), IRQ14 and 15 are free for PCI/LPC bus.
4. In ACPI mode, IRQ9 is used for the SCI (System Control Interrupt). The SCI can be shared
with a PCI interrupt line.
Memory Map
The following table provides the common PC/AT memory allocations. Memory below 000500h is used
by the BIOS.
Table 3-2. Memory Map
Address Range
(decimal)
(TOM-192kB) to TOMNA192 kBACPI reclaim, MPS and NVS area **
(TOM-8MB-192kB) to
(TOM-192kB)
1024 k to (TOM- 8MB
-192kB)
869 k - 1024 kE0000 - FFFFF128 kBRuntime BIOS
800 k - 869 kCC000 - DFFFF96 kBUpper memory
640 k - 800 kA0000 - CBFFF160 kBVideo memory and Video BIOS
Address Range
SizeDescription
(hex)
NA1 or 8 MBVGA frame buffer *
100000 - N.ANAExtended memory
XTX 820Reference Manual17
Chapter 3 Hardware
Address Range
(decimal)
Address Range
(hex)
639 k - 640 k9FC00 - 9FFFF1 kBExtended BIOS data
0 - 639k00000 - 9FC00512 kBConventional memory
Notes:T.O.M. = Top of memory = max. DRAM ins talled
* VGA frame buffer can be reduced to 1MB in setup.
** Only if ACPI Aware OS is set to YES in setup.
I/O Address Map
Table 3-3 list the I/O address map.
Table 3-3. I/O Address Map
I/O Address (hex)SizeAvailableDescription
0000 – 00FF256 bytesNoBaseboard resources
0100 – 011016 bytesNoSystem Control
0170 – 01778 bytesNoSecondary IDE channel
01F0 – 01F78 bytesNoPrimary IDE channels
0278 – 027F8 bytesNote 2Parallel Port 2 (LPT2)
02E8 – 02EF8 bytesNote 2Seri al P ort 4 (C OM4)
02F8 – 02FF8 byt e sNote 1Serial Port 2 (COM2)
03761 byteNoSecondary IDE channel command port
03771 byteNoSecondary IDE channel status port
0378 – 037F8 bytesNote 1Parallel Port 1 (LPT1)
03B0 – 03DF16 bytesNoVideo system
03E8 – 03EF8 bytesNote 2Seri al P ort 3 (C OM3)
03F0 – 03F56 bytesNoFloppy channe l 1
03F61 byteNoPrimary IDE channel command port
03F71 byteNoPrimary IDE channel status port
03F8 – 03FF8 byt e sNote 1Serial Port 1 (COM1)
0480 – 04BF64 bytesNoBaseboard resources
04D0 – 04D12 bytesNoBaseboard resources
0800 – 087F128 bytesNoBaseboard resources
0A00 – 0A0F16 bytesNoBaseboard resources
0CF8 – 0CFB4 bytesNoPCI configuration address register
0CFC – 0CFF4 bytesNoPCI configuration data register
0D00 – FFFFNote 3PCI / PCI Express bus
SizeDescription
Notes: 1. Default, but can be changed to another address range.
2. When baseboard external Super I/O controller is present.
3. The BIOS assigns PCI and PCI Express I/O resources from FFF0h downwards. Non
PnP/PCI/PCI Express compliant devices must not consume I/O resources in that area.
18Reference ManualXTX 820
Chapter 3 Hardware
PCI Bus Interface Connector (J1)
The J1 connector has 100 pins and is used for the PCI bus, USB ports, IRQ lines, and Audio (AC’97)
interface connections.
Tables 3-4 to 3-7 provide the signals and descriptions in a simplified form and Table 3-8 provides the
complete pin-outs for the X1 connector.
PCI Bus
The Memory & Graphics Hub (Northbridge) chip (82915GM) integrates a PCI arbiter that supports up to
four external PCI masters.
• This interface carries all of the appropriate PCI signals
NC+12V2 (A2)+12 Volt Power
NCTMS3 (A3)Test Mode Select – This signal is used to control the state of the
NCTDI4 (A4)Test Data Input is used to serially shift test data and test instructions
NC+5V5 (A5)+5 Volt Power
97INTA*6 (A6)Interrupt A – This signal is used to request an interrupt.
95INTC*7 (A7)Interrupt C – This signal is used to request an inte r ru pt.
NC+5V8 (A8)+5 Volt Power
Test Reset – This signal provides an asynchronous initialization of
the TAP controller. One of five pins used for the optional
JTAG/Boundary Scan and TAP function.
TAP controller in the device. One of five pins used for the optio nal
JTAG/Boundary Scan and TAP function.
into the device during TAP operation. One of five pins used for the
optional JTAG/Boundary Scan and TAP function.
NCKey (3.3V) 13 (A13)+3.3V Key
3.3Vaux14 (A14)
93PCIRST*15 (A15)(PCI Bus) Reset – This signal is used to bring PCI-specific registers,
+3.3V(I/O) 16 (A16)+3.3V I/O
XTX 820Reference Manual19
3.3 Volt Auxiliary – This voltage is an optional power source that
delivers power to the PCI add-in card for generation of power
management events when the main power to the card has been turned
off by software. A system or add-in card that does not support PCI
bus power management must treat the 3.3Vaux pin as reserved.
sequencers, and signals to a consistent state. Anytime Reset is
asserted, all PCI output signals must be driven to the benign state.
Chapter 3 Hardware
J1
Pin #
SignalPCI
Pin #
GNT*17 (A17)
Description
Grant – This is a point-to-point signal and indicates to the agent that
access to the bus has been granted. Every master has its own GNT,
which must be ignored while RST is asserted.
Ground18 (A18)Ground
57PME*19 (A19)Power Management Event – This signal is an optional signal that can
be used by a device to request a change in the device or system
power state.
91AD3020 (A20)Address/Data bus 30 – These signals (AD31 – AD0) are multiplexed
on the same PCI connector pins. During the address phase of a PCI
cycle, AD31–AD0 contain a 32-bit address or other destination
information. During the data phase, AD31 – AD0 contain data.
+3.3V21 (A21)+3.3 Volt Power
87AD2822 (A22)Address/Data bus 28 – Refer to Pin-20 (A20) for more information
86AD2623 (A23)Address/Data bus 26 – Refer to Pin-20 (A20) for more information
Ground24 (A24)Ground
81AD2425 (A25)Address/Data bus 24 – Refer to Pin-20 (A20) for more information)
60DEVSEL26 (A26)Initialization Device Select – This signal is used as a chip select
during configuration read and write transactions.
+3.3V27 (A27)+3.3 Volt Power
77AD2228 (A28)Address/Data bus 22 – Refer to Pin-20 (A20) for more information
75AD2029 (A29)Address/Data bus 20 – Refer to Pin-20 (A20) for more information
Ground30 (A30)Ground
74AD1831 (A31)Address/Data bus 18 – Refer to Pin-20 (A20) for more information
69AD1632 (A32)Address/Data bus 16 – Refer to Pin-20 (A20) for more information
+3.3V33 (A33)+3.3 Volt Power
65FRAME*34 (A34)
PCI bus Frame access – This signal is driven by the current master to
indicate the start of a transaction and will remain active until the
final data cycle.
Ground35 (A35)Ground
61TRDY*36 (A36)Target Ready – This signal indicates the selected device’s ability to
complete the current cycle of transaction. Both IRDY* and TRDY*
must be asserted to terminate a data cycle.
Ground37 (A37)Ground
64STOP*38 (A38)
Stop – This signal is driven by the current PCI target to request the
master to stop the current transaction.
+3.3V39 (A39)+3.3 Volt Power
Reserved*40 (A40)Reserved
Reserved*41 (A41)Reserved
Ground42 (A42)Ground
53PAR43 (A43)
PCI bus Parity bit – This signal is the even parity bit on AD[31:0]
and CBE[3:0]*.
47AD1544 (A44)Address/Data bus 15 – Refer to Pin-20 (A20) for more information
+3.3V45 (A45)+3.3 Volt Power
20Reference ManualXTX 820
Chapter 3 Hardware
J1
Pin #
SignalPCI
Pin #
Description
43AD1346 (A46)Address/Data bus 13 – Refer to Pin-20 (A20) for more information
39AD1147 (A47)Address/Data bus 11 – Refer to Pin-20 (A20) for more information
GND48 (A48)Ground
34AD949 (A49)Address/Data bus 9 – Refer to Pin-20 (A20) for more information
NCKey50 (A50)+5 Volt Key
NCKey51 (A51)+5 Volt Key
31CBE0*52 (A52)
PCI Bus Command/Byte Enable 0 – This signal line is one of four
signal lines multiplexed on the same pins, so that during the address
cycle, the command is defined and during the data cycle, the byte
enable is defined.
+3.3V53 (A53)+3.3 Volt Power
29AD654 (A54)Address/Data bus 06 – Refer to Pin-20 (A20) for more information
27AD455 (A55)Address/Data bus 04 – Refer to Pin-20 (A20) for more information
Ground56 (A56)Ground
26AD257 (A57)Address/Data bus 02 – Refer to Pin-20 (A20) for more information
23AD058 (A58)Address/Data bus 00 – Refer to Pin-20 (A20) for more information
+3.3V(I/O) 59 (A59)+3.3V I/O
NCREQ64*60 (A60)
Request 64-bit Transfer – This signal, when asserted by the current
bus master, indicates it desires to transfer data using 64 bits. Not
used in 32-bit system.
NC+5V61 (A61)+5 Volt Power
NC+5V62 (A62)+5 Volt Power
NC-12V63 (B1)-12 Volt Power
NCTCK64 (B2)Test Clock – This signal is used to clock state information and test
data into and out of the device during operation of the TAP. One of
five pins used for the optional JTAG/Boundary Scan and TAP
function.
Ground65 (B3)Ground
NCTDO66 (B4)Test Output – This signal is used to serially shift test data and test
instructions out of the device during TAP operation. One of five
pins used for the optional JTAG/Boundary Scan and TAP function.
NC+5V67 (B5)+5 Volt Power
NC+5V68 (B6)+5 Volt Power
98INTB*69 (B7)
Interrupt B – This signal is used to request an interrupt and only has
meaning on a multi-function device.
96INTD*70 (B8)Interrupt D – This signal is used to request an interrupt and only has
meaning on a multi-function device.
NCPRSNT1*71 (B9)Present 1 – These signals (Present 1::2) indicate to the motherboard
if an add-in board is physically present in the slot and, if one is
present, the total power requirements of the board. These signals are
required for add-in boards but are optional for motherboards.
Reserved72 (B10)Reserved
NCPRSNT2*73 (B11)Present 2 – See pin-71 (B9) for more information.
XTX 820Reference Manual21
Chapter 3 Hardware
J1
Pin #
SignalPCI
Pin #
Description
Ground74 (B12)Ground
Ground75 (B13)Ground
Reserved76 (B14)Reserved
Ground77 (B15)Ground
CLK78 (B16)Clock – This signal provides timing for all transactions on the PCI
bus and is an input to every PCI device.
Ground79 (B17)Ground
REQ*80 (B18)Request – This is a point-to-point signal and indicates to the arbiter
that this agent desires use of the bus. Every master has its own
Request which must be tri-stated while Reset is asserted.
+3.3V(I/O) 81 (B19)+3.3V I/O
94AD3182 (B20)Address/Data bus 31 – Refer to Pin-20 (A20) for more information
90AD2983 (B21)Address/Data bus 29 – Refer to Pin-20 (A20) for more information
Ground84 (B22)Ground
89AD2785 (B23)Address/Data bus 27 – Refer to Pin-20 (A20) for more information
85AD2586 (B24)Address/Data bus 25 – Refer to Pin-20 (A20) for more information
+3.3V87 (B25)+3.3 Volt Power
82CBE3*88 (B26)Bus Command and Byte Enable 3 – Refer to Pin-52 (A52) for more
information.
79AD2389 (B27)Address/Data bus 23 – Refer to Pin-20 (A20) for more information
Ground90 (B28)Ground
78AD2191 (B29)Address/Data bus 21 – Refer to Pin-20 (A20) for more information
73AD1992 (B30)Address/Data bus 19 – Refer to Pin-20 (A20) for more information
+3.3V93 (B31)+3.3 Volt Power
71AD1794 (B32)Address/Data bus 17 – Refer to Pin-20 (A20) for more information
70CBE2*95 (B33)Bus Command and Byte Enable 2 – Refer to Pin-52 (A52) for more
information.
Ground96 (B34)Ground
63IRDY*97 (B35)In itiator Ready – This signal indicates the master’s ability to
complete the current data cycle of the transaction.
+3.3V98 (B36)+3.3 Volt Power
60DEVSEL*99 (B37)Device Select – This signal is driven by the target device when its
address is decoded.
Ground100 (B38) Ground
59LOCK*101 (B39) Lock – This signal indicates an operation that may require multiple
transactions to complete.
55PERR*102 (B40)
Parity Error – This signal is driven by the PCI target during a write
to indicate a data parity error has been detected.
+3.3V103 (B41) +3.3 Volt Power
54SERR*104 (B42) System Error – This signal is for reporting address parity errors.
+3.3V105 (B43) +3.3 Volt Power
22Reference ManualXTX 820
Chapter 3 Hardware
J1
Pin #
49CBE1*106 (B44)
SignalPCI
Pin #
Description
Bus Command and Byte Enable 1 – Refer to pin-52 (A52) for more
information.
45AD14107 (B45) Address/Data bus 14 – Refer to Pin-20 (A20) for more information
GND108 (B46) Ground
41AD12109 (B47) Address/Data bus 12 – Refer to Pin-20 (A20) for more information
37AD10110 (B48) Address/Data bus 10 – Refer to Pin-20 (A20) for more information
NC
66 MHz/
Ground
111 (B49)
66 MHz Enable – This signal indicates to a device if the bus segment
is operating at 66 or 33 MHz.
Ground – If this pin is not used for 66 MHz operation, it is at ground
potential.
GND112 (B50) Ground for +3.3V boards
GND113 (B51) Ground for +3.3V boards
33AD08114 (B52) Address/Data bus 08 – Refer to Pin-20 (A20) for more information
32AD07115 (B53) Address/Data bus 07 – Refer to Pin-20 (A20) for more information
+3.3V116 (B54) +3.3 Volt Power
30AD05117 (B55) Address/Data bus 05 – Refer to Pin-20 (A20) for more information
28AD03118 (B56) Address/Data bus 03 – Refer to Pin-20 (A20) for more information
Ground119 (B57) Ground
25AD01120 (B58) Address/Data bus 01 – Refer to Pin-20 (A20) for more information
+3.3V(I/O) 121 (B59) +3.3V I/O
NCACK64*122 (B60) Acknowledge 64-bit Transfer – This signal indicates the target is
willing to transfer data using 64 bits. Not used in 32-bit system.
NC+5V123 (B61) +5 Volt Power
NC+5V124 (B62) +5 Volt Power
Notes: The shaded area denotes power or ground. The signals marked with * = Negative true logic.
XTX 820Reference Manual23
Chapter 3 Hardware
Universal Serial Bus (USB)
The XTX 820 COM supports up to six USB ports on the baseboard and the supported features are listed
below.
• USB v2.0 backward compatible to legacy v.1.1
• Two root hubs and 4 ports on J1
• Two por t s and 1 root hub on J2
• Supports USB boot of floppy disk drives, hard disk drives, CD-ROMs, or ot her USB boot devices
• Integrated physical layer transceivers
• Ov er-current detection status on USB ports 1 and 2
Table 3-5. Simplified USB Interface Pin/Signal Descriptions (J1)
J1
Pin #
76USB0-Universal Serial Bus Port 0 Data Negative Polarity
88USB0+Universal Serial Bus Port 0 Data Positive Polarity
80USB1-Universal Serial Bus Port 1 Data Negative Polarity
92USB1+Universal Serial Bus Port 1 Data Positive Polarity
58USB2-Universal Serial Bus Port 2 Data Negative Polarity
66USB2+Universal Serial Bus Port 2 Data Positive Polarity
62USB3-Universal Serial Bus Port 3 Data Negative Polarity
72USB3+Universal Serial Bus Port 3 Data Positive Polarity
Note: The shaded area denotes power or ground.
SignalDescription
USBPUSB Power –
GNDUSB Port ground
Serial Interrupt Request
This SERIRQ signal is connected to serial request input on the I/O Hub (Southbridge) chip (82801FBM)
for the alternative LPC/PCI interrupts. If this feature is supported, then DMA2 (DAck2 and DRQ2)
shall not be supported by XTX 820 module.
Table 3-6. Simplified Serial Interrupt Request (J1)
J1 Pin # SignalDescription
21SERIRQ Serial Interrup t Request – This pin is used to support the serial interrupt protocol.
AC’97 Sound
The XTX 820 module supports the AC’97 audio standard and the supported features are listed below.