AMD CS5536 User Manual
AMD Geode™ LX Processor/
CS5536 Companion Device
GeodeROM Porting Guide
April 2006
Publication ID: 40680B
AMD Geode™ LX Processor/CS5536 Companion Device GeodeROM Porting Guide 1
© 2006 Advanced Micro Devices, Inc. All rights reserved.
The contents of this document are provided in connection with Advanced Micro
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respect to the accuracy or completeness of the contents of this publication and
reserves the right to make changes to specifications and product descriptions at
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companies.
2 AMD Geode™ LX Processor/CS5536 Companion Device GeodeROM Porting Guide
Contents 40680B
Contents
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.0 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2 Assumptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.0 Model Specific Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1 Example MSR Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.0 GeodeLink™ Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1 GeodeLink™ MSR Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.2 Descriptors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.0 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1 Processor Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 AMD Geode™ CS5536 Companion Device Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.3 Virtual System Architecture™ Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.4 PCI Bus Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.5 Miscellaneous Initializations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.0 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.0 Setup Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.0 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Appendix A Support Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
A.1 Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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4 AMD Geode™ LX Processor/CS5536 Companion Device GeodeROM Porting Guide
List of Figures 40680B
List of Figures
Figure 3-1. GeodeLink™ Architecture Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 4-1. Clock Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7-1. GLIU Descriptor Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 7-2. CPU Core Cache Descriptors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 7-3. CPU Core Cache Region Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 7-4. GeodeROM Flow - LX Processor/CS5536 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
AMD Geode™ LX Processor/CS5536 Companion Device GeodeROM Porting Guide 5
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List of Figures
6 AMD Geode™ LX Processor/CS5536 Companion Device GeodeROM Porting Guide
List of Tables 40680B
List of Tables
Table 4-1. Default Region Configuration Properties Bit Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4-2. Diverse Device I/O Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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List of Tables
8 AMD Geode™ LX Processor/CS5536 Companion Device GeodeROM Porting Guide
Overview 40680B
1.0Overview
1
1.1 Introduction
This document describes the changes needed for GeodeROM and other BIOSs to support the AMD Geode™ LX processor
and the AMD Geode™ CS5536 companion device. GeodeROM requires modifications for hardware initialization and specific implementations.
Each section targets the GeodeROM changes needed to support the Geode LX processor/CS5536 device system. Where
appropriate, the changes list the “Entry Conditions” that briefly describe the machine state required to execute that function,
as well as some pseudo code for implementing the changes.
For more information on GeodeROM, see the AMD Geode™ GeodeROM Functional Specification (publication ID 32087).
1.2 Assumptions
The following assumptions must be made clear during the design phase.
GeodeROM expects all memory has a serial presence detect (SPD) to determine characteristics for memory controller initialization. If a SPD is not present, GeodeROM outputs a POST code and halts, unless customizations have been made for
the platform.
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Overview
10 AMD Geode™ LX Processor/CS5536 Companion Device GeodeROM Porting Guide
Model Specific Registers 40680B
2.0Model Specific Registers
2
There are two ways to read or write Model Specific Registers (MSRs) in an AMD Geode™ LX processor-based system.
Software running on the processor can use the RDMSR and WRMSR instructions, and modules within the processor can
use the GeodeLink™ MSR transactions. The second method allows debug modules, such as the System Navigator from
2
(First Silicon Solutions), to program MSRs.
FS
All MSRs are 64 bits wide. The MSR addresses are 32 bits, where each unique address refers to a 64-bit data quantity.
To communicate with modules on GeodeLink interface, the address of that module must be known. Addresses are obtained
by either scanning the GeodeLink interface or having prior knowledge of the chip topology. This is discussed in detail in
Section 3.0 "GeodeLink™ Architecture" on page 13.
RDMSR
Input
ECX - Address to read.
Output
EDX:EAX - 64 bits data returned.
WRMSR
Input
ECX - Address to write.
EDX:EAX - 64 bits data written.
Output
None.
2.1 Example MSR Transaction
Read and write extended CPUID registers.
This example will change the CPUID.
RDMSR:
Load MSR specified by ECX into EDX:EAX.
WRMSR:
Write the value in EDX:EAX to MSR specified by ECX.
MSR_CPUID0 EQU 00003000h
MSR_CPUID1 EQU 00003001h
mov ecx, MSR_CPUID0
RDMSR ; get values
mov edx, ‘cdeR’ ; write edx:eax to MSR in ecx. No change to eax.
WRMSR
mov ecx, MSR_CPUID1
RDMSR
mov edx, ‘doeG’ + ‘XL-e’ ; No change to eax
WRMSR
; Done
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