Altera RTE for OpenCL User Manual

Altera RTE for OpenCL

Getting Started Guide

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TOC-2

Introduction to the Altera RTE for OpenCL

Altera RTE for OpenCL Getting Started Guide................................................. 1-1

Getting Started with the Altera RTE for OpenCL for 64-Bit Windows.............2-1

Prerequisites for the Altera RTE for OpenCL..........................................................................................1-2

Contents of the Altera RTE for OpenCL..................................................................................................1-2

RTE Utility....................................................................................................................................................1-4

Displaying the Software Version....................................................................................................1-5

Listing the RTE Utility Command Options.................................................................................1-5

Managing an FPGA Board..............................................................................................................1-5

Managing Host Application...........................................................................................................1-5

Downloading the Altera RTE for OpenCL...............................................................................................2-1

Installing the Altera RTE for OpenCL......................................................................................................2-2

Setting the Environment Variables for Windows................................................................................... 2-2

Verifying the RTE Installation...................................................................................................................2-3

Licensing the Software.................................................................................................................................2-4

Installing an FPGA Board...........................................................................................................................2-5

Updating the Hardware Image on the FPGA.......................................................................................... 2-6

Querying the Device Name of Your FPGA Board...................................................................... 2-6

Programming the Flash Memory of an FPGA on Windows.....................................................2-7

Executing an OpenCL Kernel on an FPGA..............................................................................................2-8

Building the Host Application....................................................................................................... 2-8

Running the Host Application.......................................................................................................2-8

Output from Successful Kernel Execution................................................................................... 2-8

Uninstalling the Software............................................................................................................................2-9

Uninstalling the FPGA Board..................................................................................................................2-10

Getting Started with the Altera RTE for OpenCL for x86_64 Linux and 64-

Altera Corporation

Bit Linux Big-Endian System..........................................................................3-1

Downloading the Altera RTE for OpenCL...............................................................................................3-1

Installing the Altera RTE for OpenCL......................................................................................................3-2

Setting the Environment Variables for Linux..............................................................................3-2

Installing the RTE on Big-Endian Systems.............................................................................................. 3-3

Setting the Environment Variables on Big-Endian Systems......................................................3-4

Verifying the RTE Installation...................................................................................................................3-4

Licensing the Software.................................................................................................................................3-5

Installing an FPGA Board...........................................................................................................................3-6

Updating the Hardware Image on the FPGA.......................................................................................... 3-7

Querying the Device Name of Your FPGA Board...................................................................... 3-7

Programming the Flash Memory of an FPGA on Linux............................................................3-7

Executing an OpenCL Kernel on an FPGA..............................................................................................3-8

Building the Host Application....................................................................................................... 3-9

Introduction to the Altera RTE for OpenCL

Running the Host Application.......................................................................................................3-9

Output from Successful Kernel Execution................................................................................... 3-9

Uninstalling the Software......................................................................................................................... 3-10

Uninstalling the FPGA Board..................................................................................................................3-10

Getting Started with the Altera RTE for OpenCL for Altera ARMv7-A SoC...

4-1

Getting Started with the Altera RTE for OpenCL for SoC on Windows.............................................4-1

Downloading the Altera SDK for OpenCL and the SoC EDS...................................................4-2

Installing the Altera SDK for OpenCL..........................................................................................4-2

Installing the SoC EDS ................................................................................................................... 4-3

Licensing the Software.....................................................................................................................4-3

Recompiling the Linux Kernel Driver...........................................................................................4-4

Installing the RTE onto the SoC Board.........................................................................................4-4

Installing the Cyclone V SoC Development Kit.......................................................................... 4-5

Executing an OpenCL Kernel on an SoC................................................................................... 4-10

Getting Started with the Altera RTE for OpenCL for SoC on Linux..................................................4-12

Downloading the Altera SDK for OpenCL and the SoC EDS.................................................4-12

Installing the Altera SDK for OpenCL........................................................................................4-13

Installing the SoC EDS..................................................................................................................4-14

Licensing the Software...................................................................................................................4-14

Recompiling the Linux Kernel Driver.........................................................................................4-15

Installing the RTE onto the SoC Board.......................................................................................4-15

Installing the Cyclone V SoC Development Kit........................................................................4-16

Executing an OpenCL Kernel on an SoC................................................................................... 4-21

Uninstalling the Altera RTE for OpenCL...............................................................................................4-23

TOC-3

Document Revision History...............................................................................A-1

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Altera RTE for OpenCL Getting Started Guide

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The Altera RTE for OpenCL Getting Started Guide describes the procedures you follow to install the Altera® Runtime Environment (RTE) for OpenCL™. This document also contains instructions on how to deploy an OpenCL

The RTE is a subset of the Altera Software Development Kit (SDK) for OpenCL

(1)

application with the RTE.

(2)

(AOCL). Unlike the AOCL, which provides an environment that enables the development and deployment of OpenCL kernel programs, the RTE provides tools and runtime components that enable you to build and execute a host program, and execute precompiled OpenCL kernel programs on target accelerator boards.

OpenCL is a C-based open standard for the programming of heterogeneous parallel devices. For more information on the OpenCL Specification version 1.0, refer to the OpenCL Reference Pages. For detailed information on the OpenCL application programming interface (API) and programming language, refer to the OpenCL Specification version 1.0.

Attention:

If you require OpenCL kernel development and deployment functionalities, download the AOCL. Refer to the Altera SDK for OpenCL Getting Started Guide for more information.

Do not install the RTE and the AOCL on the same host system.

Attention: If you require OpenCL kernel development and deployment functionalities that target the

Cyclone® V SoC Development Kit, refer to the Altera SDK for OpenCL Cyclone V SoC Getting Started Guide for more information.

Related Information

• OpenCL Reference Pages

• OpenCL Specification version 1.0

• Altera SDK for OpenCL Getting Started Guide

• Altera SDK for OpenCL Cyclone V SoC Getting Started Guide

(1)

OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission of the Khronos Group™.

(2)

The Altera SDK for OpenCL is based on a published Khronos Specification, and has passed the Khronos Conformance Testing Process. Current conformance status can be found at www.khronos.org/conform‐

ance.

2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

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Prerequisites for the Altera RTE for OpenCL

To install the RTE and deploy an OpenCL application on an Altera preferred accelerator board, your system must meet certain hardware, target platform, and software requirements.

Hardware Requirements

1. Accelerator boards requirements:

• Acquire a Reference Platform from Altera, or a Custom Platform from an Altera preferred board vendor.

For more information, refer to the OpenCL Reference Platforms page on the Altera website.

2. The host system must be running one of the following supported target platforms:

• Microsoft 64-bit Windows 7 on the x86-64 architecture.

• Red Hat Enterprise 64-bit Linux (RHEL) version 6 on the x86-64 architecture.

• RHEL 6 on big-endian system

• Linux versions as supported on Altera SoCs on the ARM® ARMv7-A architecture

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Important:

For x86_64 Linux systems, install the Linux OS kernel source and headers (for example,

kernel-devel.x86_64 and kernel-headers.x86_64), and the GNU Compiler Collection (GCC)

(gcc.x86_64). To install the Linux kernel source or header package, invoke the yum install

<kernel_package_name> command. You must have administrator privileges on the host system to install the necessary

packages and drivers.

Software Prerequisites

1. Develop your host application using one of the following RTE-compatible C compiler or software

development environment:

• For Windows systems, use Microsoft Visual Studio version 2010 Professional.

• For Linux systems, use the C compiler included with the GCC.

2. Linux systems require the Perl command version 5 or later. Ensure that your PATH environment

variable setting includes the path to the Perl command.

Related Information

OpenCL Platforms page on the Altera website

Contents of the Altera RTE for OpenCL

The Altera RTE for OpenCL provides utilities, host runtime libraries, drivers, and RTE-specific libraries and files.

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Contents of the Altera RTE for OpenCL

Utilities and Host Runtime Libraries

• The RTE Utility includes commands you can invoke to perform high-level tasks. The RTE utilities are a subset of of the Altera SDK for OpenCL (AOCL) utilities.

• The host runtime provides the OpenCL host platform application program interface (API) and runtime API for your OpenCL host application.

The host runtime consists of the following libraries:

• Statically-linked libraries provide OpenCL host APIs, hardware abstractions and helper libraries.

• Dynamically-linked libraries (DLLs) provide hardware abstractions and helper libraries.

Drivers, Libraries and Files

The RTE installation process installs the RTE into a directory that you own. The path to the software installation directory is referenced by the ALTERAOCLSDKROOT environment variable. The following table highlights the contents of this directory:

1-3

Windows

Folder

bin bin bin bin High-level utilities. Include this directory in your PATH

Linux

Directory

Big-Endian

System

Directory

ARM

Directory

Description

environment variable setting.

board board — board The Reference Platform available with the RTE.

Important: The Reference Platform for the RTE does

not include the hardware subdirectory.

host host host host Files necessary for compiling your host program.

host\ include

host/ include

host/include

OpenCL Specification version 1.0 header files and software interface files necessary for compiling and linking your host application.

The host/include/CL subdirectory also includes the C++ header file cl.hpp. The file contains an OpenCL version 1.1 C++ wrapper API. These C++ bindings enable a C++ host program to access the OpenCL runtime APIs using native C++ classes and methods.

Important: The OpenCL version 1.1 C++ bindings

are compatible with OpenCL Specifica‐ tion versions 1.0 and 1.1.

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Add this path to the

include file search path in your

development environment.

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RTE Utility

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Windows

Folder

host\ window s64\lib

host\ window s64\bin

share\ lib\perl

Linux

Directory

host/ linux64/lib

host/ linux64/bin

share/lib/ perl

Big-Endian

System

Directory

host/ppc64/ lib

host/ppc64/ bin

share/lib/ perl

ARM

Directory

host/arm32/ lib

host/arm32/ bin

share/lib/ perl

Description

OpenCL host runtime libraries for the given target platform that provide the OpenCL platform and runtime APIs. These libraries are necessary for linking and running your host application.

Prior to running your host application, include this directory in the library search path.

• For Linux and ARM, add the path to the LD_ LIBRARY_PATH environment variable setting.

• For Windows, add the path to the PATH environment variable setting.

Platform-specific binary for the RTE Utility, runtime commands, and DLLs (for Windows) necessary for running your host application, wherever applicable. Include this directory in your PATH environment variable setting.

Perl scripts and support libraries for the RTE Utility.

Example OpenCL Applications

You can download example OpenCL applications from the OpenCL Design Examples page on the Altera website.

Related Information

OpenCL Design Examples page on the Altera website

RTE Utility

The Altera RTE for OpenCL utility is a subset of the Altera SDK for OpenCL utility. It provides you with tools and information to perform high-level tasks such as configuring the host application development flow.

Displaying the Software Version on page 1-5

To display the version of the Altera RTE for OpenCL , invoke the version utility command.

Listing the RTE Utility Command Options on page 1-5

To display information on the Altera RTE for OpenCL utility command options, invoke the help utility command.

Managing an FPGA Board on page 1-5

The Altera RTE for OpenCL includes utility commands you can invoke to install, uninstall, diagnose, and program your FPGA board.

Managing Host Application on page 1-5

The Altera RTE for OpenCL includes utility commands you can invoke to obtain information on flags and libraries necessary for compiling and linking your host application.

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Displaying the Software Version

To display the version of the Altera RTE for OpenCL , invoke the version utility command. Note: The ARM processor on the Cyclone V SoC Development Kit does not support this utility.

•

At the command prompt, invoke the aocl version command. Example output:

aocl <version>.<build> (Altera Runtime Environment for OpenCL, Version <version> Build <build>, Copyright (C) <year> Altera Corporation)

Listing the RTE Utility Command Options

To display information on the Altera RTE for OpenCL utility command options, invoke the help utility command.

Displaying the Software Version

1-5

Attention:

•

At a command prompt, invoke the aocl help command.

The ARM processor on the Cyclone V SoC Development Kit does not support this utility.

The RTE categorizes the utility command options based on their functions. It also provides a descrip‐ tion for each option.

Managing an FPGA Board

The Altera RTE for OpenCL includes utility commands you can invoke to install, uninstall, diagnose, and program your FPGA board.

For more information on the install, uninstall, diagnose, program and flash utility commands, refer to the Managing an FPGA Board section of the Altera SDK for OpenCL Programming Guide.

Related Information

Managing an FPGA Board

Managing Host Application

The Altera RTE for OpenCL includes utility commands you can invoke to obtain information on flags and libraries necessary for compiling and linking your host application.

Attention:

To cross-compile your host application to an SoC board, include the --arm option in your utility command.

Caution: For Linux systems, if you debug your host application using the GNU Project Debugger (GDB),

invoke the following command prior to running the host application:

handle SIG44 nostop

Without this command, the GDB debugging process terminates with the following error message:

Program received signal SIG44, Real-time event 44.

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Managing Host Application

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For information on the following utility command options, refer to the Managing Host Application section of the Altera SDK for OpenCL Programming Guide:

•

example-makefile or makefile

•

compile-config

•

ldflags

•

ldlibs

•

link-config or linkflags

Related Information

Managing Host Application

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1. Downloading the Altera RTE for OpenCL on page 2-1

Download the RTE for Windows from the Download Center on the Altera website.

2. Installing the Altera RTE for OpenCL on page 2-2

Install the RTE in a folder that you own.

3. Setting the Environment Variables for Windows on page 2-2

You have the option to set the RTE environment variables permanently or transiently.

4. Verifying the RTE Installation on page 2-3

Invoke the version utility command and verify that the correct version of the AOCL is installed.

5. Licensing the Software on page 2-4

Obtain the AOCL license from the Altera Self Service Licensing Center.

6. Installing an FPGA Board on page 2-5

To install your board into the host system, invoke the install utility command.

7. Updating the Hardware Image on the FPGA on page 2-6

If applicable, before you execute an OpenCL kernel program on the FPGA, ensure that the flash memory of the FPGA contains a hardware image created using a current version of the OpenCL software.

8. Executing an OpenCL Kernel on an FPGA on page 2-8

Build your OpenCL host application in Microsoft Visual Studio version 2010 Professional, and run the application by invoking the hello_world.exe executable.

9. Uninstalling the Software on page 2-9

To uninstall the RTE on Windows, delete the RTE folder and restore all modified environment variables to their previous settings.

10.Uninstalling the FPGA Board on page 2-10

To uninstall an FPGA board for Windows, invoke the uninstall utility command, uninstall the Custom Platform, and unset the relevant environment variables.

for 64-Bit Windows

Downloading the Altera RTE for OpenCL

Download the RTE for Windows from the Download Center on the Altera website.

1. In the main page of the Altera website, click MYALTERA and log into your account.

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2-2

Installing the Altera RTE for OpenCL

If you do not have a myAltera account, register for a new account.

2. Click DOWNLOADS to enter the Download Center.

3. Click Altera SDK for OpenCL to enter the download page for the subscription edition of the AOCL.

4. Select the software version. The default selection is the current version.

5. Select Direct Download as the download method.

6. Click the RTE tab and select Altera Runtime Environment for OpenCL Windows x86-64. Click More beside Download and install instructions to view the download and installation procedure.

7. Perform the steps outlined in the download and installation instructions on the download page.

Related Information

Altera website

Installing the Altera RTE for OpenCL

Install the RTE in a folder that you own.

Before you begin

You must have administrator privileges.

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• To install the Altera Runtime Environment (RTE) for OpenCL as a stand-alone software, perform the following tasks:

1. Run the AOCLRTESetup-<version>-win64.exe installer. Direct the installer to extract the software to an

empty folder that you own (that is, not a system folder). The installation path must not contain any spaces (for example, <home_directory>\altera\<version>\

aclrt-windows64).

2. The installer sets the environment variable ALTERAOCLSDKROOT. Ensure that

ALTERAOCLSDKROOT points to the current version of the software.

Setting the Environment Variables for Windows

You have the option to set the RTE environment variables permanently or transiently. The environment variable settings describe the FPGA board and the host runtime to the software.

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Verifying the RTE Installation

Attention: If you set the environment variables permanently, you apply the settings once during installa‐

tion. If you set the environment variables transiently, you must apply the settings during installation and during every subsequent session you run.

• To apply permanent environment variable settings, perform the following tasks:

1. In the Windows Start menu, click Control Panel > System and Security > System.

2. In the System window, click Advanced system settings. In the Advanced tab of the System

Properties dialog box, click Environment Variables.

3. In the Environment Variables dialog box, include the following paths in the corresponding

environment variable settings:

Environment Variable Path to Include

2-3

PATH

1. %ALTERAOCLSDKROOT%\bin

2. %ALTERAOCLSDKROOT%\host\windows64\bin

where ALTERAOCLSDKROOT points to the path of the software installa‐ tion

• To apply transient environment variable settings, open a command window and run the

%ALTERAOCLSDKROOT%\init_opencl.bat script.

Example script output:

AOCL_BOARD_PACKAGE_ROOT path is not set in environment Setting to default s5_ref board. If you want to target another board, do set AOCL_BOARD_PACKAGE_ROOT=board_pkg_dir and re-run this script Adding %ALTERAOCLSDKROOT%\bin to PATH Adding %ALTERAOCLSDKROOT%\host\windows64\bin to PATH Adding %AOCL_BOARD_PACKAGE_ROOT%\windows64\bin to PATH

where AOCL_BOARD_PACKAGE_ROOT points to the path of the Custom or Reference Platform. Running the init_opencl.bat script only affects the current command window. The script performs the

following tasks:

• Finds the Microsoft Visual Studio installation

• Imports the Microsoft Visual Studio environment to properly set the LIB environment variable

• Ensures that the PATH environment variable includes the path to the Microsoft LINK.EXE file

Verifying the RTE Installation

Invoke the version utility command and verify that the correct version of the AOCL is installed.

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Licensing the Software

Attention: The ARM processor on the Cyclone V SoC Development Kit does not support the AOCL

version utility.

•

At a command prompt, invoke the aocl version utility command. An output similar to the one below notifies you of a successful installation:

aocl <version>.<build> (Altera Runtime Environment for OpenCL, Version <version> Build <build>, Copyright (C) <year> Altera Corporation)

• If installation was unsuccessful, reinstall the software. You can also refer to the Altera Software Installation and Licensing manual and the Knowledge Center on the Altera website for more informa‐

tion.

Related Information

• Altera Software Installation and Licensing

• Altera Knowledge Base

Licensing the Software

The RTE shares the same license as the AOCL. Obtain the AOCL license from the Altera Self Service Licensing Center.

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Before you begin

For information on the licensing options and requirements, refer to the Licensing Altera Software section of the Altera Software Installation and Licensing manual, the LICENSE.txt file that accompanies each software, and the Altera Licensing page on the Altera website.

1. In the main page on the Altera website, click MYALTERA and log into your account.

2. Click the link to the Self-Service Licensing Center.

3. Perform the steps outlined in the Using the Self-Service Licensing Center section of the Altera Software

Installation and Licensing manual to obtain and activate the license.

4. If you have a fixed license, append the <path_to_license_file>/<license_filename> file to the

LM_LICENSE_FILE environment variable in the following manner:

a. Create a backup copy of the provided license file. b. Save the new license file on your local hard drive. c. Append the <path_to_license_file>/<license_filename> file to the LM_LICENSE_FILE environment

variable.

5. If you have a floating licence, append the <path_to_license_file>/<license_filename> file to the LM_LICENSE_FILE environment variable in the following manner:

a. Obtain the port number and host name from the network or system administrator. Alternatively,

the information is in the license file line SERVER <hostname> <8 to 12 character host or NIC

ID> <port>.

The license location for the user is <port>@<hostname>. If a port is not listed in the license file, specify @<hostname>.

b. Modify the license file to update the port number and host name. c. Append the <path_to_license_file>/<license_filename> file to the LM_LICENSE_FILE environment

variable setting.

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Related Information

• Altera Licensing page on the Altera website

• Altera Software Installation and Licensing

• Altera website

Installing an FPGA Board

Before creating an OpenCL application for an FPGA boards, you must first download and install the Custom Platform from your board vendor. Most Custom Platform installers require administrator privileges. To install your board into the host system, invoke the install utility command.

The steps below outline the board installation procedure. Some Custom Platforms require additional installation tasks. Consult your board vendor's documentation for further information on board installation.

Installing an FPGA Board

2-5

Attention:

If you are installing the Cyclone V SoC Development Kit for use with the Cyclone V SoC Development Kit Reference Platform, refer to Installing the Cyclone V SoC Development Kit in the Altera SDK for OpenCL Cyclone V SoC Getting Started Guide for more information.

1. Follow your board vendor's instructions to connect the FPGA board to your system.

2. Download the Custom Platform for your FPGA board from your board vendor's website.

For more information, refer to the OpenCL Reference Platforms page on the Altera website.

3. Install the Custom Platform in a folder that you own (that is, not a system folder).

4. Set the environment variable AOCL_BOARD_PACKAGE_ROOT to point to the location of the

Custom Platform subfolder containing the board_env.xml file. For example, for the Stratix® V Network Reference Platform (s5_net), set

AOCL_BOARD_PACKAGE_ROOT to point to the <path_to_s5_net>\s5_net folder.

5. Add the Custom Platform library paths to the PATH environment variable setting. You may apply permanent settings manually by adding the path to the memory-mapped (MMD) library within the Custom Platform. Alternatively, you may apply transient settings to the current session by running the

%ALTERAOCLSDKROOT%\init_opencl.bat script.

For example, if you use s5_net, the Windows PATH environment variable setting is

%AOCL_BOARD_PACKAGE_ROOT%\windows64\bin.

For information on init_opencl.bat, refer to the Setting the Environment Variables for Windows section.

Invoke the command aocl install at a command prompt. Invoking aocl install also installs a board driver that allows communication between host

applications and hardware kernel programs.

To query a list of FPGA devices installed in your machine, invoke the aocl diagnose command. The software generates an output that includes the <device_name>, which is an acl number that ranges from acl0 to acl15.

For more information on querying the <device_name> of your accelerator board, refer to the Querying the Device Name of Your FPGA Board section.

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Updating the Hardware Image on the FPGA

To verify the successful installation of the FPGA board, invoke the command aocl diagnose <device_name> to run any board vendor-recommended diagnostic test.

Related Information

• Setting the Environment Variables for Windows on page 2-2

• Querying the Device Name of Your FPGA Board on page 2-6

• Installing the Cyclone V SoC Development Kit on page 4-5

Updating the Hardware Image on the FPGA

If applicable, before you execute an OpenCL kernel program on the FPGA, ensure that the flash memory of the FPGA contains a hardware image created using a current version of the OpenCL software.

Remember: If your Custom Platform requires that you preload a valid OpenCL image into the flash

memory, for every major release of the Altera Complete Design Suite, program the flash memory of the FPGA with a hardware image compatible with the current version of the software.

Querying the Device Name of Your FPGA Board

Some AOCL utility commands require you to specify the device name (<device_name>). The <device_name> refers to the acl number (e.g. acl0 to acl15) that corresponds to the FPGA device. When

you query a list of accelerator boards, the RTE produces a list of installed devices on your machine in the order of their device names.

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•

To query a list of installed devices on your machine, type aocl diagnose at a command prompt. The software generates an output that resembles the example shown below:

aocl diagnose: Running diagnostic from ALTERAOCLSDKROOT/board/<board_name>/ <platform>/libexec

Verified that the kernel mode driver is installed on the host machine.

Using board package from vendor: <board_vendor_name> Querying information for all supported devices that are installed on the host machine ...

device_name Status Information

acl0 Passed <descriptive_board_name> PCIe dev_id = <device_ID>, bus:slot.func = 02:00.00, at Gen 2 with 8 lanes. FPGA temperature=43.0 degrees C.

acl1 Passed <descriptive_board_name> PCIe dev_id = <device_ID>, bus:slot.func = 03:00.00, at Gen 2 with 8 lanes. FPGA temperature = 35.0 degrees C.

Found 2 active device(s) installed on the host machine, to perform a full diagnostic on a specific device, please run aocl diagnose <device_name>

DIAGNOSTIC_PASSED

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Programming the Flash Memory of an FPGA on Windows

By default, you configure an FPGA using the hardware image stored in the flash memory of the device. When there is no power, the FPGA retains the hardware configuration file in the flash memory. When you power up the system, it configures the FPGA circuitry based on this hardware image in the flash memory. Therefore, it is imperative that an OpenCL-compatible hardware configuration file is loaded into the flash memory of your FPGA.

Preloading an OpenCL image into the flash memory is necessary for the proper functioning of many Custom Platforms. For example, most PCI Express® (PCIe®)-based boards require a valid OpenCL image in flash memory so that hardware on the board can use the image to configure the FPGA device when the host system powers up for the first time. If the FPGA is not configured with a valid OpenCL image, the system will fail to enumerate the PCIe endpoint, or the driver will not function.

Before running any designs, ensure that the flash memory of your board has an valid OpenCL image that is compatible with the current OpenCL software version. Consult your board vendor's documentation for board-specific requirements.

2-7

Caution:

When you load the hardware configuration file into the flash memory of the FPGA, maintain system power for the entire loading process, which might take a few minutes. Also, do not launch any host code that calls OpenCL kernels or might otherwise communicate with the FPGA board.

To load your hardware configuration file into the flash memory of your FPGA board, perform the following tasks:

1. Install any drivers or utilities that your Custom Platform requires. For example, some Custom Platforms require you to install the USB-Blaster™ driver to load your

hardware configuration file into the flash memory. For installation instructions, refer to the ®USBBlaster II Download Cable User Guide.

2. Ensure that you set the AOCL_BOARD_PACKAGE_ROOT environment variable to point to the subfolder in your Custom Platform that contains the board_env.xml file.

3. Download an example design for your Custom Platform. Remember:

You can download example designs from the OpenCL Design Examples page, and extract the example to a location to which you have write access.

To load the hardware configuration file into the flash memory, invoke the aocl flash <device_name> <example_design_filename>.aocx command, where <device_name> refers to the acl number (e.g. acl0 to acl15) that corresponds to your FPGA device, and

<example_design_filename>.aocx is the precompiled hardware configuration file you can find in the

example design package.

5. Power down your device or computer and then power it up again. Power cycling ensures that the FPGA configuration device retrieves the hardware configuration file

from the flash memory and configures it into the FPGA.

Warning:

Some Custom Platforms require you to power cycle the entire host system after program‐ ming the flash memory. For example, PCIe-based Custom Platforms might require a host system reboot to reenumerate the PCIe endpoint. Altera recommends that you power cycle the complete host system after programming the flash memory.

Related Information

• USB-Blaster II Download Cable User Guide

Getting Started with the Altera RTE for OpenCL for 64-Bit Windows

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Altera RTE for OpenCL User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

Contents

Altera RTE for OpenCL Getting Started Guide

Prerequisites for the Altera RTE for OpenCL

Contents of the Altera RTE for OpenCL

RTE Utility

Displaying the Software Version

Listing the RTE Utility Command Options

Managing an FPGA Board

Managing Host Application

Downloading the Altera RTE for OpenCL

Installing the Altera RTE for OpenCL

Setting the Environment Variables for Windows

Verifying the RTE Installation

Licensing the Software

Installing an FPGA Board

Updating the Hardware Image on the FPGA

Querying the Device Name of Your FPGA Board

Programming the Flash Memory of an FPGA on Windows