Agilent 86130A BitAlyzer
Error Performance
Analyzer
Technical Specifications
General Features
Internal Hard Disk
For local storage of user patterns and data
Removable Storage
MS-DOS
®
compatible 3.5” Superdrive (accepts 1.4 Mbyte
HD disks & 120 Mbyte SuperDisks
™
)
Data Entry
Touch-sensitive display, numeric keypad with up/ down
arrows, analogue feel position controls, or provided
USB keyboard and mouse if desired.
Display
Internal 8” (diagonal) backlit LCD touch-screen
Interfaces
GPIB (IEEE 488), LAN (“10 Base T” Ethernet) for
printing and file transfer, Parallel/Centronics printer
port, external VGA output.
On-line Help
Context-sensitive On-Line help is included. Operation,
programming and quick-start guides are also included
and supplied on MS-Windows
®
compatible CD-ROM.
Accessories Supplied
USB compatible keyboard; mouse; stylus; Quick Start
Manual on paper; Quick Start Card.
MS-Windows
®
compatible CD-ROM containing “PDF”
files of Operating, Quick-Start, and Programming guides.
Power Cord; 6x APC-3.5 connector savers (female to
female); 6x 50Ω APC-3.5 (male) terminations, 3x 1 metre
SMA (male to male) cables.
®
2
Pattern Generator
Pattern Generator Parameters
Operating Frequency
Operating Frequency
50 MHz to 3.6 GHz with external clock
50 MHz to 3.0 GHz with internal clock source
Internal Clock Source
Frequency Range
50 MHz to 3.0 GHz
Frequency Accuracy
±20 ppm
Test Patterns
2N-1 PRBS
2
31
-1, 223-1, 215-1, 210-1, 27-1
2
N
PRBS
2
23
, 215, 210, 2
7
Variable Mark Density
1/8, 1/4, 1/2, 3/4, 7/8
User Defined Patterns
Variable length patterns from 1 to 8 Mbits
Alternating Patterns
Change between two equal length user patterns, each up
to 4 Mbits long. Changeover is synchronous with the end
of a pattern, under the control of the front panel or the
Auxiliary Input.
Error Add
Single, continuously variable between 1x10
-2
and 1x10-9,
and user specified bursts of errors.
Pattern Editor
Fully flexible pattern editor included with “cut”, “copy” and
“paste” functions.
3
Pattern Generator
Input/Output Specifications
Data and Data Outputs
Data and Data outputs are independently settable
Format: NRZ
Polarity: Normal or Inverted
Amplitude: 0.5 to 2 V in 10 mV steps
Offset: See figure below. 10mV resolution.
Data Outputs On/Off: ‘Off’ goes to high impedance state
Supported Terminations:
0 V (LVTTL, SCFL, etc.), –2 V (ECL), +1.3 V (3.3 V PECL),
AC-coupled
Jitter (pk-pk): <20 ps, <12 ps typical
Transition Time (10–90%): <45 ps typical
Variable Crossover: Supported
Clock/ Data Delay Range: 0–1 bit period or 10 ns,
whichever is less. 1 ps resolution.
Interface: DC-coupled
50Ω reverse terminated,
APC-3.5 connector
Clock and Clock Outputs
Clock and Clock outputs are independently settable
Amplitude: 0.5 to 2 V in 10 mV steps
Offset: See figure below.
10mV resolution.
Clock Outputs On/Off: ‘Off’ goes to high impedance
state
Supported Terminations:
0 V (LVTTL, SCFL, etc.), –2 V (ECL), +1.3 V (3.3 V PECL),
AC-coupled
Transition Time (10–90%): <45 ps typical
Interface: DC-coupled 50Ω reverse terminated, APC-3.5
connector
Intrinsic Clock to data delay is constant at all frequencies.
Auxiliary Input
This has two functions.
1. Blanks the data outputs to allow the user to
create bursts of data
2. If in Alternating Pattern mode, used to
change between ‘A’ and ‘B’ patterns
Minimum pulse width: 64 clock periods
Interface: TTL compatible, 50Ω BNC female
connector
Clock Input
Allows connection of an external clock source
in order to extend the operating range of the
instrument. Recommended clock sources
Agilent 8648D and 83752A.
Frequency Range: 50 MHz to 3.6 GHz
Amplitude Range: +3 dBm to –3 dBm
Interface: SMA female 50Ω, DC coupled to 0 V
Error Add Input
This allows injection of single errors by an external pulse
generator into the transmitted test pattern synchronous
with the rising edge of the pulse
Minimum pulse width: 64 clock periods
Interface: TTL compatible, 50Ω BNC female connector
Trigger Output
Provides a pulse to trigger a communication analyzer
etc. It has two modes:
1. Divided Clock mode: pulses at 1/8th of the clock rate.
2. Pattern mode: pulse at a settable bit position within
the pattern.
Min.pulse width: (Pattern mode) 64 bits
Output levels: High –0.2 V, Low –0.9 V
Interface: 50Ω SMA female
Data/Data/Clock/Clock Amplitudes and Offsets
0.5 min
to
2V max
Termination:
Maximum High Level:
or
Minimum Low Level:
–2 V
0 V
–3 V
0 V
2.5 V
–3 V
+1.3 V
2.5 V
–3 V
Loading...