ADLINK Technology, Incorporated makes no representations or warranties with respect to the contents of
this manual or of the associated ADLINK products, and specifically disclaims any implied warranties of
merchantability or fitness for any particular purpose. ADLINK shall under no circumstances be liable for
incidental or consequential damages or related expenses resulting from the use of this product, even if it has
been notified of the possibility of such damages. ADLINK reserves the right to revise this publication from
time to time without obligation to notify any person of such revisions. If errors are found, please contact
ADLINK at the address shown at the bottom of this notice.
TRADEMARKS
CoreModule and the Ampro logo are registered trademarks, and ADLINK, Little Board, LittleBoard,
MightyBoard, MightySystem, MilSystem, MiniModule, ReadyBoard, ReadyBox, ReadyPanel,
ReadySystem, and RuffSystem are trademarks of ADLINK Technology, Inc. All other marks are the
property of their respective companies.
REVISION HISTORY
RevisionReason for ChangeDate
00Initial ReleaseApril/09
2.0Revised PCI-to-ISA section in ch 4; revised +5V to be default
JP5 setting in Tab le 2- 3; revised environmental specifications in
Tab le 2- 5; added Ta ble 2 -7 for cooling solutions; revised
Appendix A
1010Replaced EOL Ethernet chip; revised locations of components
and connectors; added active heatsink
1020Added J47 and J48 LAN LED headers (replaced fast
RJ-45 with Gigabit RJ-45 in rev 1010); re-defined pins 1 and 3
in Tab le 3-1 3; changed Serial Console to Remote Access in
Ch 3 & 4; revised function definitions in Tab le 2-1; changed
description of J3 in Tab le 2- 2; added fan voltage caution to
This manual provides reference only for computer design engineers, including but not limited to hardware
and software designers and applications engineers. ADLINK Technology, Inc. assumes you are qualified to
design and implement prototype computer equipment.
iiReference ManualLittleBoard 735
Contents
Chapter 1About This Manual ....................................................................................................1
Purpose of this Manual ....................................................................................................................1
Appendix ATechnical Support ..................................................................................................61
Index .................................................................................................................................................. 63
List of Figures
Figure 2-1.Stacking PC/104 Modules with the LittleBoard 735 ................................................ 4
Table A-1.Technical Support Contact Information..................................................................61
Contents
LittleBoard 735Reference Manualv
Contents
viReference ManualLittleBoard 735
Chapter 1About This Manual
Purpose of this Manual
This manual is for designers of systems based on the LittleBoard™ 735 single board computer (SBC). This
manual contains information that permits designers to create an embedded system based on specific design
requirements.
Information provided in this reference manual includes:
•LittleBoard 735 specifications
•Environmental requirements
•Major integrated circuits (chips) and features implemented
•LittleBoard 735 connector/pin numbers and definitions
•BIOS Setup information
Information not provided in this reference manual includes:
•Detailed chip specifications
•Internal component operation
•Standard connector pin-out tables
•Internal registers or signal operations
•Bus or signal timing for industry standard busses and signals
References
The following list of references may be helpful for you to complete your design successfully.
Specifications:
•EBX Spec Revision 2.0, March 1, 2005
For the latest version of the EBX specifications, contact the PC/104 Consortium, at:
Web site: h
•PCI Express Mini Card Spec Revision 1.0
For latest revision of the PCI Express Mini Card specifications, contact the PCI Special Interest
Group Office, at:
Web site: http://www.pcisig.com/specifications/pciexpress/mini
•PC/104 Spec Revision 2.5, November 2003
•PC/104-Plus Spec Revision 2, November 2003
For latest revision of the PC/104 specifications, contact the PC/104 Consortium, at:
Web site: http://www.pc104.org
•PCI 2.2 Compliant Specifications
ttp://www.pc104.org
For latest revision of the PCI specifications, contact the PCI Special Interest Group Office at:
Web site: http://www.pcisig.com
LittleBoard 735Reference Manual1
Chapter 1About This Manual
•AMI BIOS Core 8 User’s Guide
Web site: http://www.ami.com/support/doc/MAN-EZP-80.pdf
Chip specifications used on the LittleBoard 735:
•Intel Corporation and the Atom N270 processor used for the embedded CPU.
Web site: http://download.intel.com/design/processor/datashts/320032.pdf
•Intel Corporation and the 82945GSE and 82801GBM chips, used for the Memory Hub/Video controller
and I/O Hub, respectively.
Web site: http://download.intel.com/design/processor/datashts/309219.pdf
Web site: http://www.intel.com/Assets/PDF/datasheet/307013.pdf
= I/O Hub
= Memory Hub
•Intel Corporation and the 82574IT chips (2), used for the Gigabit Ethernet controllers, respectively.
Web site: http://download.intel.com/design/network/datashts/82574.pdf
= Gigabit Ethernet
•Standard Microsystems Corp and the SCH3114I-NU chip, used for the Super I/O controller.
Web site: http://www.smsc.com/main/catalog/sch311x.html
•Realtek and the ALC203 chip, used for the Audio CODEC.
Web site: http://www.realtek.com.tw/search/default.aspx?keyword=ALC203
•ITE Tech. Inc. and the IT8888F chip, used for the PCI-to-ISA bridge conversion.
Web site: http://www.ite.com.tw/EN/products_more.aspx?CategoryID=3&ID=5,76
NOTEIf you are unable to locate the datasheets using the links provided, go to the
manufacturer’s web site where you should be able to perform a search using the
chip datasheet number or name listed, including the extension, htm, pdf, etc.
2Reference ManualLittleBoard 735
Chapter 2Product Overview
This introduction presents general information about the EBX architecture and the LittleBoard 735 single
board computer (SBC). After reading this chapter you should understand:
The “Embedded Board, eXpandable” (EBX) standard is the result of a collaboration between industry
leaders Motorola and Ampro to unify the embedded computing industry through a full featured embedded
single-board computer (SBC) standard. The EBX standard principally defines physical size, mounting hole
pattern, and power connector locations. It does not specify processor type or electrical characteristics. There
are recommended connector placements for serial/parallel, Ethernet, graphics, and memory expansion.
Derived from the Ampro LittleBoard form-factor originated in 1984, EBX combines a standard footprint
with open interfaces. The EBX form-factor is small enough for deeply embedded applications, yet large
enough to contain the functions of a fully embedded SBC (Single Board Computer) including CPU,
memory, mass storage interfaces, display controller, serial and parallel ports, today’s advanced operating
systems, and other system functions. This embedded SBC standard ensures that embedded system OEMs
can standardize their designs and that embedded computing solutions can be designed into space constrained
environments with off-the-shelf components.
The EBX standard boasts highly flexible and adaptable system expansion, allowing easy and modular
additions of functions such as USB 2.0 ports and Firewire or wireless networking not usually contained in
standard product offerings. The EBX system expansion is based on popular existing industry standards, PC/
104™ and PC/104-Plus™. PC/104 places the ISA bus on compact 3.6" x 3.8" modules with self-stacking
capability. PC/104-Plus adds the power of a PCI bus to PC/104 while retaining the basic form-factor. Using
PC/104 expansion cards, the PC/104 standard offers access to PC cards from the mobile and handheld
computing markets.
The EBX standard integrates all these off-the-shelf standards into a highly embeddable SBC form-factor.
EBX supports the legacy of PC/104, hosting the wide variety of embedded system oriented expansion
modules from hundreds of companies worldwide. PC/104 brings the advantages of the latest portable and
mobile system expansion technologies to embedded applications. See Figure 2-1 on page 4.
The EBX standard also brings stability to the embedded board market and offers OEMs assurance that a
wide range of products will be available from multiple sources – now and in the future. The EBX standard is
open to continuing technology advancements since it is processor independent. It creates opportunity for
economies of scale in chassis, power supply, and peripheral devices.
The EBX specification is freely available to all interested. For further technical information on the EBX
standard, go to the PC/104 Consortium web site at www.pc104.org.
LittleBoard 735Reference Manual3
Chapter 2Product Overview
)
4-40 screws (4)
PC/104 Module
0.6 inch spacers (4)
PCI Stack
0.6 inch spacers (4)
through
Headers
4-40 nuts(4
Figure 2-1. Stacking PC/104 Modules with the LittleBoard 735
PC/104 Plus Module
ISA Bus
Stackthrough
Expansion
Headers
Little Board735
Product Description
The LittleBoard 735 is an exceptionally high integration, high performance, rugged, and high quality singleboard system, which contains all the component subsystems of a PC motherboard plus the equivalent of up
to 3 expansion boards. Based on the Intel Atom N270 low power, high-integration processor, the
LittleBoard 735 gives designers a complete, high performance, embedded processor based on the EBX form
factor and conforms to the EBX V2.0 specifications.
Each LittleBoard 735 incorporates an Intel 945GSE chipset for the Graphics and Memory Hub
(Northbridge) and the I/O Hub (Southbridge) controllers. This set includes the 82945GSE, Graphics and
Memory Controller Hub, (also GMCH), which controls the graphics and memory interface. The other chip
in this set is the 82801GBM, I/O Controller Hub 7 Mobile (ICH7-M), which controls some of the I/O
functions on the board. One additional chip provides the remainder of the I/O functions: the Standard
Microsystems, SCH3114I-NU, Super I/O controller. Together the Intel and SMSC chips provide four serial
ports, an EPP/ECP parallel port, six USB 2.0 ports, PS/2 keyboard and mouse interfaces, floppy, one Ultra/
DMA 33/66/100 IDE controller supporting Compact Flash, two independent 10/100/1000BaseT Ethernet
interfaces, an audio AC’97 CODEC, PCIe Mini Card, GPIO, SMBus, and two SATA ports on the board. To
provide the ISA bus on the board through the PC/104 connector, an ITE IT8888G-L, PCI-to-ISA Bridge is
included. The LittleBoard 735 also supports up to 2GB of DDR2 RAM in a single 200-pin SODIMM slot,
and a Graphics Media Accelerator (GMA), which provides VGA, TV Out, and LVDS flat panel video
interfaces for most LCD panels and CRT monitors.
The LittleBoard 735 can be expanded through the PC/104 and PC/104-Plus expansion for additional system
functions, as these buses offer compact, self-stacking, modular expandability. The PC/104 and PC/104-Plus
buses are the embedded system versions of the signal set provided on a desktop PC’s ISA and PCI buses at
8MHz and 33MHz clock speeds, respectively.
LB735stackthru
Among the many embedded-PC enhancements on the LittleBoard 735 that ensure embedded system
operation and application versatility are a Watchdog Timer, serial console support, battery-free boot, onboard, high-density Compact Flash socket, and BIOS extensions for OEM boot customization.
The LittleBoard 735 is particularly well suited to either embedded or portable applications and meets the
size, power consumption, temperature range, quality, and reliability demands of embedded system
applications. It can be stacked with ADLINK MiniModules™ or other PC/104-compliant expansion boards,
or it can be used as a powerful computing engine.
4Reference ManualLittleBoard 735
Chapter 2Product Overview
Board Features
•CPU features
♦
Intel 1.6GHz LV, Atom N270 Processor
♦
512KB L2 cache
♦
533MHz FSB
•Memory
♦
Single standard 200-pin DDR2 SODIMM socket
♦
Supports non-ECC, unbuffered memory
♦
Supports +2.5V DDR2, 533MHz RAM up to 2GB
•PC/104-Plus Bus Interfaces
♦
PCI Bus up to 33MHz
♦
PCI 2.2 compliant signals
♦
PC/104 (ISA) Bus up to 8MHz
•IDE Interfaces
♦
Provides one enhanced IDE controller (Compact Flash)
♦
Supports Ultra DMA 33/66/100 modes
♦
Supports ATAPI and DVD peripherals
♦
Supports IDE native and ATA compatibility modes
•Floppy Disk Interface
♦
Supports one standard floppy disk drive interface
♦
Supports all standard PC/AT formats: 360KB, 1.2MB, 720KB, 1.44MB, 2.88MB
•Parallel Port
♦
Provides a standard printer interface
♦
Supports IEEE standard 1284 protocols of EPP and ECP outputs
♦
Supports Bi-directional data lines
♦
Supports 16 byte FIFO for ECP mode
•Serial Ports
♦
Four buffered serial ports with full handshaking
♦
Provides 16550-equivalent controllers, each with a built-in 16-byte FIFO buffer
♦
Supports full modem capability on three of the four ports
♦
Supports RS232, RS485, or RS422 operation on each port
♦
Supports programmable word length, stop bits, and parity
♦
Supports 16-bit programmable baud-rate generator and an interrupt generator
•USB Ports
♦
Provides three root USB hubs
♦
Provides up to six USB ports
♦
Supports USB boot devices
♦
Supports USB v2.0 EHCI and UHCI v1.1
♦
Supports over-current detection status
LittleBoard 735Reference Manual5
Chapter 2Product Overview
•Keyboard/Mouse Interface
♦
Provides PS/2 keyboard interface
♦
Provides PS/2 mouse interface
•Audio Interface
♦
Provides AC’97 CODEC on board
♦
Supports AC’97 standard
•Ethernet Interface
♦
Provides two fully independent Gigabit Ethernet ports
♦
Provides integrated LEDs on each port (Link/Activity and Speed)
♦
Provides two Intel 82574IT controller chips
♦
Supports IEEE 802.3 10/100BaseT and 10/100/1000BaseT compatible physical layers
♦
Provides headers for two external Gigabit Ethernet LEDs
♦
Supports Auto-negotiation for speed, duplex mode, and flow control
♦
Supports full duplex or half-duplex mode
•Full-duplex mode supports transmit and receive frames simultaneously
•Supports IEEE 802.3x Flow control in full duplex mode
Key:
U15 - Super IO Controller
J37 - PCI Express Mini Card Socket
J38 - PCI Express Mini Card Latch
J37
J38
Figure 2-4. Component Locations (Bottom Side)
U15
LB735_Back_b
LittleBoard 735Reference Manual11
Chapter 2Product Overview
Headers and Connectors
Table 2 -2 describes the headers and connectors shown in Figure 2-6 on page 14. All I/O headers use 0.100"
(2.54mm) pitch unless otherwise indicated.
Table 2-2. Header and Connector Descriptions
Jack #NameDescription
BAT1Battery SocketBattery socket for 3 volt Lithium battery
J1A,B,
C,D
J2A,B,
C,D
J3 Video (VGA)12-pin, 0.079" (2mm), header for output to a VGA compatible display
J6IDE40-pin standard header for the primary IDE interface
J8Compact Flash50-pin, 0.050" (1.27mm), socket accepts Type I or Type II Compact Flash
J9Audio In/Out26-pin, 0.079" (2mm), header for all of the audio signals (input/output)
J10GLAN18-pin, RJ45 connector for 10/100/1000BaseT Gigabit Ethernet port 1 with
J11Serial A20-pin header for serial ports 1 and 2 (COM 1 & COM 2)
J12Serial B20-pin header for serial ports 3 and 4 (COM 3 & COM 4)
J13Utility 224-pin header for mouse, SMBus, and power button
J14USB 2 & 3 10-pin, 0.079" (2mm) header for USB2 and USB3 ports
J15Utility 116-pin header for keyboard, external battery, reset switch, and speaker
J16Parallel26-pin header for parallel port
J17Floppy34-pin header for floppy disk drive interface
J18GLAN28-pin, RJ45 connector for 10/100/1000BaseT Gigabit Ethernet port 2 with
J19Power In7-pin, 0.156" (3.96mm), header for input power
J26Video (LVDS)30-pin, 0.079" (2mm), header for LVDS compatible video displays
J30Power On3-pin header for ATX power-on functions
J31Memory200-pin, 0.024" (0.60mm) socket for DDR2 SDRAM SODIMM
J32SATA17-pin, 0.050" (1.27mm) standard connector for serial ATA
J33SATA27-pin, 0.050" (1.27mm) standard connector for serial ATA
J34Optional Fan3-pin header provides +5V or +12V, tach, and ground to optional CPU fan
J35Battery Input2-pin, 0.049" (1.24mm) header for power from external battery
J36TV Out
J37PCI Express
PC/104 bus104-pin standard connector for PC/104
PC/104-Plus120-pin, 0.079" (2mm), standard connector for PCI bus
cards
magnetics
magnetics
6-pin header for TV Out signals
52-pin, 0.012" (0.30mm) standard socket for PCI Express Mini Card
Mini Card (on
back of the
board; see
Figure 2-4 on
page 11)
functions
12Reference ManualLittleBoard 735
Chapter 2Product Overview
Table 2-2. Header and Connector Descriptions (Continued)
J38Latch (on back
Latch for the PCI Express Mini Card connector
of the board;
see Figure 2-4
on page 11)
J39USB 4 & 510-pin, 0.079" (2mm) header for USB4 and USB5 ports
J40GPIO
J41DNP
J42DNP
J43DNP
10-pin, 0.079" (2mm) header for General Purpose IO signals
Do not populate
Do not populate
Do not populate
J44USB 0 & 110-pin, 0.079" (2mm) header for USB0 and USB1 ports
J45SMBus
J46Power On
5-pin, 0.049" (1.25mm) header for external device connection
5-pin header for power-on button and reset switch
Button and
Reset Switch
J47LED - GLAN1
J48LED - GLAN2
5-pin, 0.049" (1.25mm) header for Gigabit Ethernet1 external LED
5-pin, 0.049" (1.25mm) header for Gigabit Ethernet2 external LED
NOTEThe pinout tables in Chapter 3 of this manual identify pin sequence using the
following methods: A 20-pin header with two rows of pins, using odd/even
numbering, where pin 2 is directly across from pin 1, is noted as 20-pin, 2 rows,
odd/even (1, 2). Alternately, a 20-pin connector using consecutive numbering,
where pin 11 is directly across from pin 1, is noted in this way: 20-pin, 2 rows,
consecutive (1, 11). The second number in the parenthesis is always directly
across from pin 1. See Figure 2-5.
CAUTIONThe two Ethernet ports share a common ground (transformer center tap),
that is floating until you determine how the common ground is
connected. The grounding holes (8) of the LittleBoard 735 are connected
to ground potential (return) of the DC power supply connected to the
board through J19.
NOTEPin 1 is shown as a black pin (square or round) on all headers in all illustrations.
14Reference ManualLittleBoard 735
Chapter 2Product Overview
Jumper Header Definitions
Table 2 -3 describes the jumper headers shown in Figure 2-7.
Table 2-3. Jumper Settings
Jumper #InstalledRemoved/Installed
JP1 – RTC (Real Time
Clock) Reset
JP2 – Power ManagementPower Up by S3 (pins 1-2)
JP3 – Serial Port 2
RS485 Termination
JP4 – Serial Port 1
RS485 Termination
JP5 – Fan Voltage SelectionEnable +5V (pins 1-2) DefaultEnable +12V (pins 2-3)
Note: Only the jumper headers listed above are populated on the board. Jumpers or shunts use .079"
(2mm) pitch.
LittleBoard 735Reference Manual15
Chapter 2Product Overview
Key:
JP1 - RTC Reset
JP2 - Power Management
JP3 - Serial2 RS485
JP4 - Serial1 RS485
JP5 - Fan Voltage
JP6 - Compact Flash Master/Slave
JP7 - Compact Flash Voltage
JP8 - LVDS Voltage
JP9 - Serial4 RS485
JP10 - Serial3 RS485
JP1
JP8
LB735_Jmpr_a
JP5
JP9
JP2
JP7
JP10
JP6
JP4
JP3
Figure 2-7. Jumper Header Locations (Top Side)
16Reference ManualLittleBoard 735
Chapter 2Product Overview
Specifications
Physical Specifications
Table 2 -4 lists the physical dimensions of the board.
Table 2-4. Weight and Footprint Dimensions
ItemDimension
Weight0.280kg. (0.60lbs.)
Height (overall)16.26mm (0.64")
Width146mm (5.75")
Length203mm (8.0")
Thickness2.36mm (0.093")
Mechanical Specifications
Figure 2-8 shows the top side view of the LittleBoard 735 with mechanical mounting dimensions.
NOTEOverall height is measured from the
upper board surface to the highest
permanent component (J10, RJ45
connector) on the upper board surface.
This measurement does not include the
various heatsinks on the board. The
heatsinks increase this dimension. See
Table 2 -7.
0.20
2.65
5.80
0.20
00
2.80
LB735_Dimen_Top_d
5.70
7.22
7.60
NOTEAll dimensions are given in inches.
LittleBoard 735Reference Manual17
0
0.20
Figure 2-8. LittleBoard 735 Dimensions
5.35
5.55
7.80
Chapter 2Product Overview
Environmental Specifications
Table 2 -5 provides the most efficient operating and storage condition ranges required for this board.
Table 2-5. Environmental Requirements
Parameter1.6GHz Atom N270
Conditions
Operating-20° to +70°C
(-4° to +158°F)
Extended
(Optional)
Storage –55° to +85°C
Temperature
Operating5% to 95%
Non-operating 5% to 95%
Humidity
–40° to +80°C
(–40° to +176°F)
(–67° to +185°F)
relative humidity,
non-condensing
relative humidity,
non-condensing
Power Specifications
Table 2 -6 provides the power requirements for the LittleBoard 735.
Table 2-6. Power Supply Requirements
Parameter1.6GHz Atom N270
Characteristics
Input TypeRegulated DC voltagesRegulated DC voltagesRegulated DC voltages
Idle Current 1.58A (7.91W)1.50A (7.48W)1.64A (8.22W)
BIT Current3.17A (15.83W)2.90A (14.52W)3.25A (16.25W)
Operating configurations:
800MHz Atom N270
Characteristics w/clockdown speed from 1.6GHz
1.6GHz Atom N270
Characteristics w/fan
•In-rush operating configuration includes video, 1GB DDR2 RAM, and power.
•Idle operating configuration includes the in-rush configuration as well as one SATA hard drive, I/O
board, floppy drive, and PS/2 keyboard and mouse.
•BIT = Burn-In-Test. Operating configuration includes idle configuration as well as a second SATA hard
drive, four serial loop-backs, two Ethernet connections, four USB loop-backs, one USB flash drive, and
one USB Compact Flash reader with 64MB Compact Flash.
18Reference ManualLittleBoard 735
Chapter 2Product Overview
Thermal/Cooling Requirements
The LittleBoard 735 is designed to operate at its maximum CPU speed of 1.6GHz and requires a cooling
solution to cool the CPU, Memory Hub, I/O Hub and voltage regulators on the board. ADLINK offers two
cooling solutions. (See Table 2-7.)
Table 2-7. ADLINK Optional Cooling Solutions
Cooling SolutionDescriptionHeight of Cooling Solution
(without LittleBoard 735)
Passive Heatsink
(without fan)
Active Heatsink
(with fan)
NOTEThese two cooling solutions exceed the standard height limitation described in
the EBX specification.
Qualified to maintain optimal
performance up to +70°C.
Qualified to maintain optimal
performance up to +80°C.
0.67" (17.06mm)
2.61" (66.42mm)
LittleBoard 735Reference Manual19
Chapter 2Product Overview
20Reference ManualLittleBoard 735
Chapter 3Hardware
Overview
This chapter discusses the features of the LittleBoard 735 I/O interfaces in the following order:
•Interrupt Channel Assignments
•Memory Map
•I/O Address Map
•Floppy Interface
•Parallel Interface
•Serial Interfaces
•Utility Interfaces
♦
Keyboard
♦
Mouse
♦
Battery
♦
Power Button
♦
Reset Switch
♦
Speaker
♦
SMBus
•USB Interfaces
•Audio Interface
•Video Interfaces
♦
CRT
♦
LV DS
♦
TV Out
•Power Interfaces
♦
Power In
♦
ATX P o w e r O n
♦
Power Button
•Miscellaneous
♦
Time of Day/RTC
♦
Temperature Monitoring
♦
User GPIO Interface
♦
SMBus Interface
♦
Oops! Jumper (BIOS recovery)
♦
Remote Access
♦
Watchdog Timer
♦
Optional CPU fan
LittleBoard 735Reference Manual21
Chapter 3Hardware
♦
External Battery Input
♦
Dual LED interfaces for Gigabit Ethernet
NOTEADLINK Technology, Inc. only supports the features and options described in
this manual. The main integrated circuits (ICs) on the LittleBoard 735 may
provide more features or options than are listed in this manual, and those
features and options may not function as specified in the IC documentation.
This chapter does not include pinout tables for standard headers and connectors
such as PC/104, Ethernet RJ45, 40-pin IDE, Floppy, and Compact Flash.
Interrupt Channel Assignments
The interrupt channel assignments are shown in Table 3 -1.
Table 3-1. Interrupt Channel Assignments
Device vs IRQ No.0123456789101112131415
Timer X
KeyboardX
Secondary CascadeX
COM1ODOO
COM2DOOO
COM3OOOD
COM4OODO
FloppyX
ParallelODOO
RTCX
IDE D
Math CoprocessorX
PS/2 MouseX
PCI INTA Automatically Assigned
PCI INTB Automatically Assigned
PCI INTC Automatically Assigned
PCI INTD Automatically Assigned
PCI INTE Automatically Assigned
PCI INTF Automatically Assigned
PCI INTG Automatically Assigned
PCI INTH Automatically Assigned
Legend: D = Default, O = Optional, X = Fixed
NOTEThe PCI IRQs for the Ethernet, Video, and Internal Local Bus are automatically
assigned by the BIOS Plug and Play logic. Local ISA IRQs assigned during
initialization can not be used by external devices.
22Reference ManualLittleBoard 735
Chapter 3Hardware
Memory Map
The following table provides the common PC/AT memory allocations. Memory below 000500h is used by
the BIOS.
Table 3-2. Memory Map
Base AddressFunction
00000000h -0009FFFFhConventional Memory
000A0000h -000AFFFFhGraphics Memory
000B0000h -000B7FFFhMono Text Memory
000B8000h -000BFFFFhColor Text Memory
000C0000h -000CFFFFhStandard Video BIOS
000D0000h -000DFFFFhReserved for Extended BIOS*
000E0000h -000EFFFFhExtended System BIOS Area
000F0000h -000FFFFFhSystem BIOS Area (Storage and RAM Shadowing)
Top 0, 1, or 8MB of DRAMIntegrated Graphics Memory
FFE00000h -FFFFFFFFhSystem Flash
* The BIOS contains a setting to forward memory to the ISA bus.
I/O Address Map
Table 3 -3 provides the list of I/O addresses on the LittleBoard 735.
0778-077FParallel Port (ECP Extensions) (Port 378+400)
0A79hMapped to ISA
0CF8-0CFFPCI Configuration Registers
0CF9Reset Control Register
Floppy Drive Interface
The SCH3114I-NU (U15) chip provides the floppy controller and supports one floppy drive. The floppy
signals are provided through a standard 34-pin header (J17). The floppy controller will support a 360k,
720k, 1.2M, 1.44M, or 2.88M drive.
The floppy drive header provides 34 pins, 2 rows, odd/even sequence (1, 2) with 0.100" (2.54mm) pitch.
24Reference ManualLittleBoard 735
Chapter 3Hardware
Parallel Port Interface
The parallel port supports standard parallel, Bi-directional, ECP, and EPP protocols. The SCH3114I-NU
chip (U15) provides the parallel port interface signals.
The parallel header provides 26 pins, 2 rows, odd/even sequence (1, 2), with 0.100" (2.54mm) pitch.
Table 3-4. Parallel Interface Pin Signals (J16)
Pin #Signal In/Out Description
1Strobe*OutStrobe* – This is an output signal used to strobe data into the printer.
I/O pin in ECP/EPP mode.
2AFD*OutAuto Feed* – This is a request signal into the printer to automatically
feed one line after each line is printed.
3PD0I/OParallel Port Data 0 – These pins (PD0 to PD7) provide parallel port
data.
4ERR*OutError* – This is a status output signal from the printer. A Low State
indicates an error condition on the printer.
5PD1I/OParallel Port Data 1 – Refer to pin 3 for more information.
6INIT*OutInitialize* – This signal used to Initialize printer. Output in standard
Mode, I/O in ECP/EPP mode.
7PD2I/OParallel Port Data 2 – Refer to pin 3 for more information.
8SLINOutSelect In – This output signal is used to select the printer. I/O pin in
ECP/EPP mode.
9PD3I/OParallel Port Data 3 – Refer to pin 3 for more information.
10,
12
11PD4I/OParallel Port Data 4 – Refer to pin 3 for more information.
13PD5I/OParallel Port Data 5 – Refer to pin 3 for more information.
14,
16
15PD6I/OParallel Port Data 6 – Refer to pin 3 for more information.
17PD7I/OParallel Port Data 7 – Refer to pin 3 for more information.
18,
20
19ACK*InAcknowledge* – This printer output status indicates it has received
21BUSYInBusy – This printer output status indicates the printer is not ready to
22,
24
23PEInPaper End – The printer output status indicates the printer is out of
25SLCTInSelect – This printer output status indicates the printer is selected and
26Key/NCKey - Not connected
GNDGround
GNDGround
GNDGround
the data and is ready to accept new data if the signal state is Low.
accept data if the signal state is High.
GNDGround
paper if the signal state is High.
powered on if the signal state is High.
Note: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
LittleBoard 735Reference Manual25
Chapter 3Hardware
Serial Interfaces
Two MAX213ECAI+ chips and two LTC1334CG#PBF chips provide the circuitry for the four serial ports.
The two MAX213ECAI+ chips provide the RS232 mode, and the two LTC1334CG#PBF chips provide the
RS485/RS422 modes. The four serial ports support the following features:
•Four individual 16550-compatible UARTs
•Programmable word length, stop bits and parity
•16-bit programmable baud rate generator
•Interrupt generator
•Loop-back mode
•Four individual 16-bit FIFOs
•Serial A Interface (J11)
♦
Serial Port 1 (COM1) supports RS232/RS485/RS422 and full modem support
♦
Serial Port 2 (COM2) supports RS232/RS485/RS422 and full modem support
•Serial B Interface (J12)
♦
Serial Port 3 (COM3) supports RS232/RS485/RS422 and full modem support
♦
Serial Port 4 (COM4) supports RS232/RS485/RS422
NOTEThe RS232 and RS485/RS422 modes can be selected for any serial port in BIOS
Setup under the Advanced menu. However, the RS232 mode is the default
selection (Standard) for any serial port.
To implement the two-wire RS485 mode on any serial port, you must tie the equivalent pins together for
each port.
For example, on Serial Port 1, tie pin 3 to pin 5 and pin 4 to pin 6 at the Serial A interface header (J11) as
shown in Figure 3-1. As an alternate, tie pin 2 to pin 3 and pin 7 to pin 8 at the DB9 serial connector for
Serial Port 1 as shown in Figure 3-1. Refer also to the following tables for the specific pin signals on each
connector.
NOTEThe RS422 mode uses a four-wire interface and does not require any pins tied
together, but you must select RS485 in BIOS Setup and make sure the
termination jumper is removed.
5
32
4
9
7
8
Serial A Interface (J11)
for Serial Port 1
(or COM1 Port)
Top View
5
19
20
Figure 3-1. RS485 Serial Port Implementation
1
Standard DB9 Serial
Or
Port Connector (Male)
678910
234
Front View
1
6
Table 3 -5 defines the pins and corresponding signals for the Serial A interface header (Serial Ports 1 and 2)
and Tab le 3 -6 defines the pins and corresponding signals for the Serial B interface header (Serial Ports 3 and
4).
Both Serial A and B headers use 20 pins, 2 rows, odd/even sequence (1, 2) with 0.100" (2.54mm) pitch.
LB735RS485conn_b
26Reference ManualLittleBoard 735
Chapter 3Hardware
Table 3-5. Serial A Interface Pin Signals (J11)
Pin # Pin #
SignalDescription
DB9
11
(COM1)
DCD1*Data Carrier Detect 1 – Indicates external serial communications device
is detecting a carrier signal (i.e., a communication channel is currently
open). In direct connect environments, this input will be driven by DTR1
as part of the DTR/DSR handshake.
26DSR1*Data Set Ready 1 – Indicates external serial communications device is
powered, initialized, and ready. Used as hardware handshake with DTR1
for overall readiness to communicate.
32RXD1
RX1-
47RTS1*
Receive Data 1 – Serial port 1 receive data in.
RX1- – If in RS485 or RS422 mode, this pin is Receive Data 1 -.
Request To Send 1 – Indicates Serial port 1 is ready to transmit data.
Used as hardware handshake with CTS1 for low level flow control.
TX1+
53TXD1
TX1-
68CTS1*
TX1+ – If in RS485 or RS422 mode, this pin is Transmit Data 1 +.
Transmit Data 1 – Serial port 1 transmit data out.
TX1- – If in RS485 or RS422 mode, this pin is Transmit Data 1 -.
Clear to Send 1 – Indicates external serial communications device is
ready to receive data. Used as hardware handshake with RTS1 for low
level flow control.
RX1+
RX1+ – If in RS485 or RS422 mode, this pin is Receive Data 1 -.
74DTR1*Data Terminal Ready 1 – Indicates this Serial port is powered, initialized,
and ready. Used as hardware handshake with DSR1 for overall readiness
to communicate.
89RI1*Ring Indicator 1 – Indicates external serial communications device is
detecting a ring condition. Used by software to initiate operations to
answer and open the communications channel.
95
10NCKEY
GNDGround
Key
111
(COM2)
NC
DCD2*Data Carrier Detect 2 – Indicates external serial communications device
Not connected
is detecting a carrier signal (i.e., a communication channel is currently
open). In direct connect environments, this input will be driven by DTR2
as part of the DTR/DSR handshake.
126DSR2*Data Set Ready 2 – Indicates external serial communications device is
powered, initialized, and ready. Used as hardware handshake with DTR2
for overall readiness to communicate.
132RXD2
RX2-
147RTS2*
Receive Data 2 – Serial port 2 receive data in.
RX1- – If in RS485 or RS422 mode, this pin is Receive Data 1 -.
Request To Send 2 – Indicates Serial port 2 is ready to transmit data.
Used as hardware handshake with CTS2 for low level flow control.
TX2+
153TXD2
TX2-
TX2+ – If in RS485 or RS422 mode, this pin is Transmit Data 2 +.
Transmit Data 2 – Serial port 2 transmit data out
TX2- – If in RS485 or RS422 mode, this pin is Transmit Data 2 -.
LittleBoard 735Reference Manual27
Chapter 3Hardware
Table 3-5. Serial A Interface Pin Signals (J11) (Continued)
168CTS2*
Clear To Send 2 – Indicates external serial communications device is
ready to receive data. Used as hardware handshake with RTS2 for low
level flow control.
RX2+
RX2+ – If in RS485 or RS422 mode, this pin is Receive Data 2 -.
174DTR2*Data Terminal Ready 2 – Indicates Serial port 1 is powered, initialized,
and ready. Used as hardware handshake with DSR2 for overall readiness
to communicate.
189RI2*Ring Indicator 2 – Indicates external serial communications device is
detecting a ring condition. Used by software to initiate operations to
answer and open the communications channel.
195
GNDGround
20NCNCNot connected
Note: The shaded table cells denote ground. Signals are listed in the table with RS232 first, followed by
RS422/RS485. The * symbol indicates the signal is Active Low.
Table 3-6. Serial B Interface Pin Signals (J12)
Pin #Pin #
SignalDescription
DB9
11
(COM3)
DCD3*Data Carrier Detect 3 – Indicates external serial communications
device is detecting a carrier signal (i.e., a communication channel is
currently open). In direct connect environments, this input will be
driven by DTR3 as part of the DTR/DSR handshake.
26DSR3* Data Set Ready 3 – Indicates external serial communications device is
powered, initialized, and ready. Used as hardware handshake with
DTR3 for overall readiness to communicate.
32RXD3
Receive Data 3 – Serial port 3 receive data in
RX3-
47RTS3*
RX3- – If in RS485 or RS422 mode, this pin is Receive Data 3 -.
Request To Send 3 – Indicates Serial port 3 is ready to transmit data.
Used as hardware handshake with CTS3 for low level flow control.
TX3+
53TXD3
TX3-
68CTS3*
TX3+ – If in RS485 or RS422 mode, this pin is Transmit Data 3 +.
Transmit Data 3 – Serial port 3 transmit data out
TX3- – If in RS485 or RS422 mode, this pin is Transmit Data 3 -.
Clear To Send 3 – Indicates external serial communications device is
ready to receive data. Used as hardware handshake with RTS3 for low
level flow control.
RX3+
RX3+ – If in RS485 or RS422 mode, this pin is Receive Data 3 -.
74DTR3*Data Terminal Ready 3 – Indicates this Serial port is powered,
initialized, and ready. Used as hardware handshake with DSR3 for
overall readiness to communicate.
89RI3*Ring Indicator 3 – Indicates external serial communications device is
detecting a ring condition. Used by software to initiate operations to
answer and open the communications channel.
95
GNDGround
10NCKEYNot Connected
28Reference ManualLittleBoard 735
Chapter 3Hardware
Table 3-6. Serial B Interface Pin Signals (J12) (Continued)
111
(COM4)
DCD4*Data Carrier Detect 4 – Indicates external serial communications
device is detecting a carrier signal (i.e., a communication channel is
currently open). In direct connect environments, this input will be
driven by DTR4 as part of the DTR/DSR handshake.
126DSR4* Data Set Ready 4 – Indicates external serial communications device is
powered, initialized, and ready. Used as hardware handshake with
DTR4 for overall readiness to communicate.
132RXD4
Receive Data 4 – Serial port 4 receive data in
RX4-
147RTS4*
RX4- – If in RS485 or RS422 mode, this pin is Receive Data 4 -.
Request To Send 4 – Indicator to serial output port 4 is ready to
transmit data. Used as hardware handshake with CTS4 for low level
TX4+
flow control.
TX4+ – If in RS485 or RS422 mode, this pin is Transmit Data 4 +.
153TXD4
TX4-
168CTS4*
Transmit Data 4 – Serial port 4 transmit data out
TX4- – If in RS485 or RS422 mode, this pin is Transmit Data 4 -.
Clear To Send 4 – Indicator to serial port 4 that external serial
communications device is ready to receive data. Used as hardware
handshake with RTS4 for low level flow control.
RX4+
RX4+ – If in RS485 or RS422 mode, this pin is Receive Data 4 +.
174DTR4*Data Terminal Ready 4 – Indicates this Serial port is powered,
initialized, and ready. Used as hardware handshake with DSR4 for
overall readiness to communicate.
189RI4*Ring Indicator 4 – Indicates external serial communications device is
detecting a ring condition. Used by software to initiate operations to
answer and open the communications channel.
195
GNDGround
20NCNCNot connected
Note: The shaded table cells denote ground. Signals are listed in the table with RS232 first, followed by
RS485/RS422. The * symbol indicates the signal is Active Low.
Utility Interfaces
The Utility interfaces consist of two headers that provide the standard interface signals for the following
devices:
•Utility 1 (J15)
♦
PS/2 Keyboard
♦
External battery
♦
Reset Switch
♦
Power-On LED
♦
Speaker
•Utility 2 (J13)
♦
PS/2 Mouse
♦
SMBus
♦
Power button
LittleBoard 735Reference Manual29
Chapter 3Hardware
Utility 1 Interface
The Utility 1 (J15) interface routes various signals to devices such as keyboard, speaker, battery, power-on
LED, and reset switch. Table 3-7 defines the pin signals for the J15, Utility 1 header, which consists of 16
pins, 2 rows, odd/even (1, 2) sequence with 0.100" (2.54mm) pitch and provides the following functions.
Keyboard
The signal lines for a PS/2 keyboard are provided through the Utility 1 interface, which is also fully PC/AT
compatible.
External Battery
An external battery input connection is provided through the Utility 1 interface as well as the J35 header to
support the Real Time Clock in the event the on-board battery is not used.
Power-On LED
The power-on LED signal provides +3.3 volts power for an external LED that indicates the system is
powered on.
Reset Switch
The signal lines for a reset switch are provided through the Utility 1 interface as well as through the J46
Power Button header.
NOTETo perform the equivalent of a power-on reset, the reset button must be pressed
and held for a minimum of four seconds.
Speaker
The signal lines for a speaker port with 0.1-watt drive are provided through the Utility 1 interface.
Table 3-7. Utility 1 Interface Pin Signals (J15)
Pin #SignalI/ODescription
1
2
3
4
NC-Not connected (-12V Power)
GND-Ground
NC-Not connected (-5V Power)
GND-Ground
5LEDOPower-On LED – This on-board +3.3 volts is provided through 330 ohm
resistor to an external Power-On LED.
6NC-Not connected (Power Good)
7SPKR+O+ Speaker Output – This signal drives external PC "Beep" speaker.
8
GND-Ground
9RSTSW*I/OReset Switch – This signal is provided for an external reset switch.
10NC-Not connected (Keyboard Switch)
11KBDATAI/OKeyboard Data – Data signal provided to external keyboard connector.
12KBCLKI/OKeyboard Clock – Clock signal provided to external keyboard connector.
13
14
GND-Keyboard Ground
KBDPWR-Keyboard Power – This +5 volts is provided to external keyboard
connector. Requires external fuse for keyboard/mouse protection.
BATV+-Backup Battery – This connection provides an additional backup battery
from an external source. It can also be used in place of the on-board
backup battery, B1, shipped with all LittleBoard 735s. Each RTS battery
input is protected with a zener diode.
16
BATV--Battery - Return (Grounded)
Note: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
Utility 2 Interface
The Utility 2 (J13) interface routes various signals to devices such as a mouse or power button. Ta b le 3 -9
defines the pin signals of the J13, Utility 2 interface header, which consists of 24 pins, 2 rows, odd/even (1,
2) pin sequence with 0.100" (2.54mm) pitch and provides the following functions.
System Management Bus (SMBus)
The ICH7-M, I/O Hub, 82801GBM (Southbridge), contains both a host and slave SMBus port, but the host
cannot access the slave internally. The slave port allows an external master access to the I/O Hub through the
Utility 2 header (J13) as well as the J45 SMBus header. The master contained in the 82801GBM is used to
communicate with the DDR2 SODIMM and the clock generator. Table 3-8 lists the corresponding binary
addresses of these devices on the SMBus.
The signal lines for a PS/2 mouse are provided through the Utility 2 interface (J13).
Power Button
A power button can be connected to the board through the Utility 2 interface as well as through the J46
Power Button header. Press and hold the green button on the power button cable for at least four seconds to
power off the system. To power on the system, press and release the green button and wait for the system to
boot.
Table 3-9. Utility 2 Interface Pin Signals (J13)
Pin # SignalI/ODescription
1NC-Not connected (Lid Switch)
2PWRBT*IPower Button – This signal allows the user to turn off and on the power
supply from an external switch.
3BATLOW*IBattery Low – This signal from an external battery indicates to the I/O
Hub there is insufficient power to boot the system.
4NC-Not connected (IR Mode select)
5NC-Not connected (IR Transmit Data)
6NC-Not connected (IR Receive Data)
7
8
GND-Ground
VCC-+5 Volts
9MDATAI/OMouse Data – Data signal provided to external mouse connector.
10MCLKI/OMouse Clock– Clock signal provided to external mouse connector
11
12
13SMBCLKI/OSMBus Clock – Clock signal provided to external devices.
14SMBDATAI/OSMBus Data – Data signal provided to external devices.
15
16
17NC-Not connected (USB 0 Negative Data Signal)
18NC-Not connected (USB 1 Negative Data Signal)
19NC-Not connected (USB 0 Positive Data Signal)
20NC-Not connected (USB 1 Positive Data Signal)
21
22
23NC-Not connected [USB Port shield (Cable Shield)]
24NC-Not connected [USB Port shield (Cable Shield)]
Note: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
GND-Ground
VCC-+5 Volts
NC-Not connected (+5V USB Port Power)
NC-Not connected (+5V USB Port Power)
NC-Not connected (USB Port ground)
NC-Not connected (USB Port ground)
USB Interfaces
The I/O Hub (82801GBM) provides the USB solution for both legacy UHCI controller (USB 1.1) and EHCI
controller (USB 2.0) support. The I/O Hub (Southbridge) contains port-routing logic that determines which
controller (UHCI or EHCI) handles the USB data signals. The J44 header provides two of the six USB ports:
USB0 and USB1. The J14 header provides USB2 and USB3, and the J39 header provides USB4 and USB5.
USB 2.0 Support
The I/O Hub (Southbridge) contains an Enhanced Host Controller Interface (EHCI) compliant host
controller, which supports up to six high-speed USB 2.0 Specification compliant root ports. The higher
speed USB 2.0 specification allows data transfers up to 480 Mbps using the same pins as the six full-speed/
low-speed USB UHCI ports. The I/O Hub (Southbridge) port-routing logic determines which of the
controllers (UHCI or the EHCI) processes the USB signals.The USB 2.0 features implemented in the USB
ports include the following:
•One EHCI host controller for all six USB ports
•Supports USB V2.0 Specification
Legacy USB Support
The I/O Hub (Southbridge) supports three USB Universal Host Controller Interfaces (UHCI) and each Host
Controller includes a root hub with two separate USB ports each, for a total of six USB ports. The USB
Legacy features implemented in the USB ports include the following:
•Three root hubs for six USB ports
•Support for USB v1.1 and UHCI v1.1 with integrated physical layer transceivers
•Improved arbitration latency for UHCI controllers
•UHCI controllers support Analog Front End (AFE) embedded cell instead of USB I/O buffers to allow
for USB high-speed signaling rates
•Three shared over-current fuses, located on the board, are used on all six USB ports
32Reference ManualLittleBoard 735
Chapter 3Hardware
CAUTIONADLINK does not recommend connecting a USB boot device to the
LittleBoard 735 through an external hub. Instead, connect the USB boot
device directly to the LittleBoard 735.
USB0 and USB1
Table 3-10 lists the USB0 and USB1 pin signals which use 10 pins, 2 rows, odd/even sequence (1, 2) with
0.079" (2mm) pitch.
Table 3-10. USB 0 & 1 Interface Pin Signals (J44)
Pin #SignalDescription
1
2
3USB0-USB 0 Data Negative
4USB1-USB 1 Data Negative
5USB0+USB 0 Data Positive
6USB1+USB 1 Data Positive
7
8
9
10
USBPWR0+5 volts power, USB 0
USBPWR1+5 volts power, USB 1
USB GND0USB 0 Ground
USB GND1USB 1 Ground
USB GND0USB 0 Ground
USB GND1USB 1 Ground
Note: The shaded table cells denote power or ground.
USB2 and USB3
Table 3-11 lists the USB2 and USB3 pin signals which use 10 pins, 2 rows, odd/even sequence (1, 2) with
0.079" (2mm) pitch.
Table 3-11. USB 2 & 3 Interface Pin Signals (J14)
Pin #SignalDescription
1
2
3USB2-USB 2 Data Negative
4USB3-USB 3 Data Negative
5USB2+USB 2 Data Positive
6USB3+USB 3 Data Positive
7
8
9
10
Note: The shaded table cells denote power or ground.
USBPWR2+5 volts power, USB 2
USBPWR3+5 volts power, USB 3
USB GND2USB 2 Ground
USB GND3USB 3 Ground
USB GND2USB 2 Ground
USB GND3USB 3 Ground
LittleBoard 735Reference Manual33
Chapter 3Hardware
USB4 and USB5
Table 3-12 lists the USB4 and USB5 pin signals which use 10 pins, 2 rows, odd/even sequence (1, 2) with
0.079" (2mm) pitch.
Table 3-12. USB 4 & 5 Interface Pin Signals (J39)
Pin #SignalDescription
1
2
3USB4-USB 4 Data Negative
4USB5-USB 5 Data Negative
5USB4+USB 4 Data Positive
6USB5+USB 5 Data Negative
7
8
9
10
Note: The shaded table cells denote power or ground.
USBPWR4+5 volts power, USB 4
USBPWR5+5 volts power, USB 5
USB GND4USB 4 Ground
USB GND5USB 5 Ground
USB GND4USB 4 Ground
USB GND5USB 5 Ground
Audio Interface
The audio solution on the LittleBoard 735 is provided by the Realtek ALC203-LF audio CODEC. The chip
is defined by AC97 and is revision 2.2 compliant. The audio interface signals are supplied to the 26-pin
2mm connector (J9). Refer to the following list for the Audio CODEC (ALC203-LF) features.
•Analog Mixer Dynamic Range 97dB (typ)
•D/A Dynamic Range 89dB (typ) and A/D Dynamic Range 90dB (typ)
•AC’97 Rev 2.1 compliant
•High quality Sample Rate Conversion (SRC) from 4kHz to 48kHz
•3D Sound circuitry and PC-Beep passthrough to Line Out while reset is held active low
•True Line Level Output with volume control independent of Line Out
Table 3-13 describes the pin signals of the audio interface which uses 26 pins, 2 rows, odd/even sequence (1,
Note: The shaded table cells denote power or ground.
Video Interfaces
The 82945GSE chip provides the graphics control and video signals for traditional glass CRT monitors and
LCD flat panel displays. The chip features are listed below:
VGA features:
•Support for an integrated 400-MHz, 24-bit RAMDAC to drive a progressive scan analog monitor and
outputs to three, 8-bit DACs that provide the R, G, and B signals to the monitor
•Support for resolutions up to QXGA (2048x1536)
•Support for a maximum allowable video frame buffer size of 224MB UMA (Unified Memory
Architecture)
LVDS Flat Panel features:
•Support for an integrated dual channel LFP Transmitter interface
•Support for LVDS LCD panel resolutions up to UXGA(1600X1200)
•Support for a maximum pixel format of 18 bpp with SSC supported frequency range from 25 MHz to
112 MHz (single channel/dual channel)
TV Out features:
•Support for three integrated 10-bit DACS
•Support for overscaling
•Provide NTSC/PAL
•Provide component, s-video, and composite output interfaces
•Support HDTV: 480p/720p/1080i/1080p
LittleBoard 735Reference Manual35
Chapter 3Hardware
VGA Interface
Table 3-14 describes the pin signals of the VGA interface, which uses 12 pins, 2 rows, odd/even sequence
(1, 2) with 0.079" (2mm) pitch.
Table 3-14. VGA Interface Pin Signals (J3)
Pin #SignalDescription
1REDRed – This is the Red analog output signal to the CRT.
2
3GREENGreen – This is the Green analog output signal to the CRT.
4
5BLUEBlue – This is the Blue analog output signal to the CRT.
6
7HSYNCHorizontal Sync – This signal is used for the digital horizontal sync output
8
9VSYNCVertical Sync – This signal is used for the digital vertical sync output to
10
11SDADDC (Display Data Channel) Data
12SCLDDC (Display Data Channel) Clock
GNDGround (Red Return)
GNDGround (Green Return)
GNDGround (Blue Return)
to the CRT.
GNDGround
the CRT.
PWRPower – Provided through fuse (F1) to +5 volts +/- 5%. F1 is next to J3
connector on board.
Note: The shaded table cells denote power or ground.
LVDS Interface
Table 3-15 describes the pin signals of the LVDS interface, which provides a 30-pin header with 2 rows,
Note: The shaded table cells denote power or ground.
NOTEPins 5-14 constitute 2
st
1
channel interface of two channels, or a single channel interface.
nd
channel interface of two channels. Pins 15-26 constitute
TV-Out Interface
Table 3-16 describes the pin signals of the TV-Out interface, which provides a 6-pin header with 2 rows,
odd/even sequence (1, 2), and 0.100" (2.54mm) pitch.
Table 3-16. TV-Out Pin Signals (J36)
Pin #SignalDescription
1TVDAC A
2
TV_GND
3TVDAC B
4
TV_GND
5TVDAC C
TVDAC Channel A Output:
TVDAC_A supports the following:
Composite: CVBS signal
Component: Chrominance (Pb) analog signal
Ground
TVDAC Channel B Output:
TVDAC_B supports the following:
S-Video: Luminance analog signal
Component: Luminance (Y) analog signal
Ground
TVDAC Channel C Output:
TVDAC_C supports the following:
S-Video: Chrominance analog signal
Component: Chrominance (Pr) analog signal
6
TV_GNDGround
Note: The shaded table cells denote ground.
LittleBoard 735Reference Manual37
Chapter 3Hardware
Power Interfaces
Power-In Interface
The LittleBoard 735 derives all of its onboard voltages from an external DC power supply through the J10
Power-In header and requires only +5 volts for operation.
Table 3-17 lists the pin signals for the J19 power-in interface, which provides a 7-pin, single-row header
with 0.156" (3.96mm) pitch.
Table 3-17. Power-In Interface Pin Signals (J19)
Pin #SignalDescription
1
2
3
4
5
6
7
Note: The shaded table cells denote power or ground.
+5V+5.0 Volts – This +5.0 volts DC +/- 5% is the only voltage required for operation.
GNDGround
GNDGround
+12V+12 Volts – This +12 volts is for the PC/104, PC/104-Plus, and LVDS power only.
+3.3V+3.3 Volts – This +3.3 volts is for PC/104-Plus Bus power only (optional).
GNDGround
+5V+5.0 Volts – This +5.0 volts DC +/- 5% is the only voltage required for operation.
ATX Power-On Interface
This 3-pin header (J30) provides ATX control of the power supply.
Table 3 -18 lists the pin signals for the ATX Power-On interface, which provides a 3-pin, single-row header
with 0.100" (2.54mm) pitch.
1PS_ON*Power Supply On – This signal provides the LittleBoard 735 ATX
control of the power supply.
2
3
Note: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
GNDGround
VCC5_ATX_STBY+5V Standby (+5V, 500mA) – This voltage is supplied from the ATX
power supply and is required for ATX operation.
Power Button and Reset Switch Interface
A power button signal is provided by connecting ground to pin-1 on this header (J46). A hardware reset
switch signal is provided by connecting ground to pin 3 on this header. Press and hold the green button on
the power button cable for at least four seconds to power off the system. To power on the system, press and
release the green button and wait for the system to boot. To perform a hardware reset, press and release the
red button on the power button cable.
Table 3-19 lists the pin signals for the J46 Power Button and Reset Switch interface, which provides a 5-pin,
single-row header with 0.100" (2.54mm) pitch.
Table 3-19. Power Button Interface Pin Signals (J46)
Pin #SignalDescription
1PWRBTN*Power Button input (connect between pins 1 & 2)
2
38Reference ManualLittleBoard 735
GNDGround
Chapter 3Hardware
Table 3-19. Power Button Interface Pin Signals (J46) (Continued)
3RST_SW*Reset Switch input or output (connect between pins 3 & 2)
4NCNot Connected
5NCNot Connected
Note: The shaded table cell denotes power or ground. The * symbol indicates the signal is Active Low.
Miscellaneous
Real Time Clock (RTC)
The ICH7-M Southbridge contains a Real Time Clock (RTC) with 256 bytes of battery-backed memory. If
the battery is not present, the BIOS provides a battery-free boot option to complete the boot process. Under
these conditions all setup information is restored from flash memory during POST along with the default
date and time information.
NOTESome operating systems require a valid default date and time to function.
Temperature Monitoring
The Intel Atom processor supports the THERMTRIP# signal for catastrophic thermal protection. The
THERMTRIP# is an open drain signal from the processor which is used to shut down the processor core
voltage. This signal is connected to the THERMTRIP# input signal and indicates that a thermal trip from the
processor occurred and the ICH7-M will immediately transition to the S5 state.
NOTEThe LittleBoard 735 requires a heatsink for the Atom N270 processor.
User GPIO Signals
The LittleBoard 735 provides GPIO pins for custom use. The signals are routed to the J40 header, and the
Enable and Initialize values are set in the BIOS. An example of how to use the GPIO pins resides in the
Miscellaneous Source Code Examples on the LittleBoard 735 Support Software QuickDrive
The example program can be built by using the make.bat file. This produces a 16-bit DOS executable
application, gpio.exe, which can be run on the LittleBoard 735 to demonstrate the use of GPIO pins. For
more information about the GPIO pin operation, refer to the Programming Manuals for the Southbridge
(82801GBM) and Super I/O (SCH3114I-NU) controllers at:
Table 3-20 lists the pin signals for the J40 GPIO interface, which provides a 10-pin header with two rows,
odd/even sequence, and 0.079" (2mm) pitch.
Table 3-20. User GPIO Pin Signals (J40)
Pin #SignalDescription
1
2
3GPI0User defined
4GPO0User defined
5GPI1User defined
6GPO1User defined
7GPI2User defined
VCC+3.3 Volts DC +/ 5%
GNDGround
TM
.
LittleBoard 735Reference Manual39
Chapter 3Hardware
Table 3-20. User GPIO Pin Signals (J40) (Continued)
8GPO2User defined
9GPI3User defined
10GPO3User defined
Note: The shaded table cells denote power or ground.
SMBus Interface
Compatible with most I2C devices, this interface allows the processor to communicate with SMBus slave
peripherals through the Host SMBus controller on the ICH7-M.
Table 3-21 lists the pin signals for the SMBus interface (J45), which provides a 5-pin, single-row header
with 0.49" pitch.
Table 3-21. SMBus Pin Signals (J45)
Pin #SignalDescription
1SCLSMBus Clock Reset
2
3SDASMBus Data Reset
4
5ALERTSMBus Alert
GNDGround
VCC+3.3 Volts DC +/ 5%
Note: The shaded table cells denote power or ground.
Oops! Jumper (BIOS Recovery)
The Oops! jumper is provided in the event the BIOS settings you have selected prevent you from booting the
system. By using the Oops! jumper you can prevent the current BIOS settings in the EEPROM from being
loaded, forcing the use of the default settings. Connect the DTR pin to the RI pin on serial port 1 (COM 1)
prior to boot up to prevent the present BIOS settings from loading. After booting with the Oops! jumper in
place, remove the Oops! jumper and go into BIOS Setup. Change the desired BIOS settings, or select the
default settings, and save changes before rebooting the system.
To convert the Serial A interface to an Oops! jumper, short together the DTR (7) and RI (8) pins on the
Serial A (J11) header for Serial Port 1. As an alternate, short the equivalent pins, 4 and 9, on the Serial Port
1 DB9 connector as shown in Figure 3-2.
32
1
6
7
8
Serial A Interface (J11)
for Serial Port 1
(or COM1 Port)
Top View
5
19
20
Figure 3-2. Oops! Jumper Connection
1
Standard DB9 Serial
Or
Port Connector (Male)
678910
234
Front View
Remote Access
The LittleBoard 735 supports the remote access (or console redirection) feature. This I/O function is
provided by an ANSI-compatible serial terminal, or the equivalent terminal emulation software running on
another system. This can be very useful when setting up the BIOS on a production line for systems that are
not connected to a keyboard and display.
5
4
9
LB735Oopsjumper_b
40Reference ManualLittleBoard 735
Chapter 3Hardware
Remote Access Setup
The remote access feature is implemented by connecting a standard null modem cable or modified serial
cable (or “Hot Cable”) between one of the serial ports, such as Serial 1 (J11A) and the serial terminal, or a
PC with communications software. The BIOS Setup Utility controls the remote access settings on the
LittleBoard 735. Refer to Chapter 4, BIOS Setup for the settings of the remote access option, the serial
terminal, or PC with communications software and the connection procedure.
Hot (Serial) Cable
To convert a standard serial cable to a Hot Cable, specific pins must be shorted together at the Serial port
connector or at the DB9 cable connector. For example, short the RTS (7) and RI (9) at the rear of the
respective DB9 cable connector as shown in Figure 3-3.
5
tandard DB9 Cable
Connector (Female)
Rear View
Figure 3-3. Hot Cable Jumper
4
9
8
32
7
1
LB735Hotcable
6
Watchdog Timer
The Watchdog Timer (WDT) restarts the system if a mishap occurs, ensuring proper start-up after the
interruption. Possible problems include failure to boot properly, the application software’s loss of control,
failure of an interface device, unexpected conditions on the bus, or other hardware or software malfunctions.
The WDT (Watchdog Timer) can be used both during the boot process and during normal system operation.
•During the Boot process – If the operating system fails to boot in the time interval set in the BIOS, the
system will reset.
Enable the WDT in Boot Settings Configuration of BIOS Setup. Set the WDT for a time-out interval in
seconds, between 1 and 255, in one-second increments in the Boot Setting Configuration screen. Ensure
you allow enough time for the boot process to complete and for the OS to boot. The OS or application
must tickle the WDT as soon as it comes up. This can be done by accessing the hardware directly or
through a BIOS call.
•During System Operation – An application can set up the WDT hardware through a BIOS call, or by
accessing the hardware directly. Some ADLINK Board Support Packages provide an API interface to
the WDT. The application must tickle the WDT in the time set when the WDT is initialized or the
system will be reset. You can use a BIOS call to tickle the WDT or access the hardware directly.
The BIOS implements interrupt 15 function 0C3h to manipulate the WDT.
•Watchdog Code examples – ADLINK has provided source code examples on the LittleBoard 735
Support Software QuickDrive illustrating how to control the WDT. The code examples can be easily
copied to your development environment to compile and test the examples, or make any desired
changes before compiling. Refer to the WDT Readme file on the LittleBoard 735 Support Software
QuickDrive.
LittleBoard 735Reference Manual41
Chapter 3Hardware
Optional CPU Fan
Table 3-22 lists the pin signals of the optional CPU Fan interface, which provides a 3-pin, single-row header
with 0.100" (2.54mm) pitch.
CAUTIONThe voltage to the fan should not exceed 130mA on the LB-735-R-18
model and 250mA on the LB-735-P-18 and LB-735-F-18 models or
significant damage to the board may occur. See the LittleBoard 735
Hardware Release Notes for more details.
Table 3-22. Optional CPU Fan (J34)
Pin #SignalDescription
1Fan_TachFan Tachometer – This signal monitors the fan speed
2
3
Note: The shaded table cells denote power or ground.
VCC+5.0 volts DC +/- 5%
GND Ground and Modulation – This signal controls the fan speed
GLAN1 LED
Table 3-23 lists the pin signals of the J47, external GLAN1 LED interface, which provides a
5-pin, single-row header with 0.049" (1.24mm) pitch.
Table 3-23. Ethernet External LED Pin Signal Descriptions (J47)
Pin #SignalDescription
1
2ACT_LED1*Ethernet Activity
3SPEED_LED1*Ethernet Speed
4LINK1000_LED1*Ethernet Connection
5
Note: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
+V3.3_S5+3.3 Volts Ethernet Power
GNDEthernet Ground
GLAN2 LED
Table 3-23 lists the pin signals of the J48, external GLAN2 LED interface, which provides a
5-pin, single-row header with 0.049" (1.24mm) pitch. .
Table 3-24. Ethernet External LED Pin Signal Descriptions (J48)
Pin #SignalDescription
1
2ACT_LED2*Ethernet Activity
3SPEED_LED2*Ethernet Speed
4LINK1000_LED2*Ethernet Connection
5
Note: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
+V3.3_S5+3.3 Volts Ethernet Power
GNDEthernet Ground
42Reference ManualLittleBoard 735
Chapter 3Hardware
Battery Input
Table 3-25 lists the pin signals of the External Battery Input interface, which provides a 2-pin, single-row
header with 0.049" (1.24mm) pitch.
Table 3-25. External Battery Input Header (J35)
Pin #SignalDescription
1
2
Note: The shaded table cells denote power or ground.
VCC+5.0 volts DC +/- 5%
GND Ground
LittleBoard 735Reference Manual43
Chapter 3Hardware
44Reference ManualLittleBoard 735
Chapter 4BIOS Setup
Introduction
This chapter assumes the user is familiar with general BIOS Setup and does not attempt to describe the
BIOS functions. Refer to “BIOS Setup Menus” on page 47 in this chapter for a map of the BIOS Setup
settings. If ADLINK has added to or modified any of the standard BIOS functions, these functions will be
described.
Entering BIOS Setup (Local Video Display)
To enter BIOS Setup using a local video display for the LittleBoard 735:
1.Turn on the display and the power supply to the LittleBoard 735.
2.Start Setup by pressing the [Del] key when the following message appears on the AMI boot screen.
Press DEL to run Setup
NOTEIf the setting for Quick Boot is [Enabled], you may not see this prompt appear on
screen. If this happens, press the [Del] key earlier in the boot sequence to enter
BIOS Setup.
3.Follow the instructions on the right side of the screen to navigate through the selections and modify any
settings.
Entering BIOS Setup (Remote Access)
This section describes how to enable the Remote Access in VGA mode and enter the BIOS setup through a
serial terminal or PC.
1.Turn on the power supply to the LittleBoard 735 and enter the BIOS Setup Utility in VGA mode.
2.Set the BIOS feature Remote Access to [Enabled] under the Advanced menu.
3.Accept the default options or make your own selections for the balance of the Remote Access fields and
record your settings.
4.Ensure you select the type of remote serial terminal you will be using and record your selection.
5.Select Save Changes and Exit and then shut down the LittleBoard 735.
6.Connect the remote serial terminal (or the PC with communications software) to the COM port you
selected and recorded earlier in the BIOS Setup Utility.
7.Turn on the remote serial terminal or PC and set it to the settings you selected in the BIOS Setup Utility.
The default settings for the LittleBoard 735 are:
♦
[COM2] for Serial Port Number
♦
[115200 8, n, 1] for Serial Port Mode
♦
[None] for Flow Control
♦
[Always] for Redirection After BIOS POST
♦
[ANSI] for Terminal Type
♦
[Enabled] for VT-UTF8 Combo Key Support
♦
[No Delay] for Srdir Mem Display Delay
8.Restore power to the LittleBoard 735 and look for the screen prompt.
9.Press the Del key to enter Setup (early in the boot sequence if Quick Boot is set to [Enabled].)
LittleBoard 735Reference Manual45
Chapter 4BIOS Setup
If Quick Boot is set to [Enabled], you may never see the screen prompt.
10. Use the <Enter> key to select the screen menus listed in the Opening BIOS screen.
NOTEThe serial console port is not hardware protected. Diagnostic software that
probes hardware addresses may cause a loss or failure of the serial console
functions.
PCI-to-ISA Bridge Mapping
The LittleBoard 735 supports ISA bus based modules with an on-board PCI-to-ISA bridge. The PCI-to-ISA
bridge optionally maps the following resources to ISA based modules:
•IRQs
•DMA Channels
The LittleBoard 735 system BIOS, maps the above resources based on information provided in the BIOS
Setup screens. By default, IRQs or DMA channels to be mapped to ISA modules must be explicitly specified
by the user in the BIOS Setup screens.
The IRQs and DMA channels are mapped with the “PCIPnP/IRQx” fields in BIOS setup (where x specifies
the IRQ number.) The IRQs 3, 4, 5, 7, 9, 10, 11, 14, and 15 can be mapped to ISA based modules by
changing the default setting for these IRQs from “Available” to “Reserved”.
Any of the DMA channels 0, 1, 3, 5, 6, 7 can be mapped to ISA modules by changing the default setting of
“Available” to “Reserved”.
Logo Screen Utility (Splash Screen)
The LittleBoard 735 BIOS supports a graphical logo utility, which can be customized by the user and
displayed when enabled through the BIOS Setup Utility. The graphical image can be a company logo or any
custom image the user wants to display during the boot process. The custom image can be displayed as the
first image displayed on screen during the boot process and remain there, depending on the options selected
in BIOS Setup, while the OS boots.
Logo Screen Image Requirements
The user’s image may be customized with any standard image editing tool.
The LittleBoard 735 logo screen utility supports the following image formats:
•Bitmap image
•Exactly 640 x 480 pixels
•Exactly 16 colors
•Bitmap image
♦
16-Color, 640x480 pixels
♦
256-Color, 640x480 pixels
•JPG image
♦
16-Color, 640x480 pixels
•PCX image
♦
256-Color, 640x480 pixels
•A file size no larger than the sample image
46Reference ManualLittleBoard 735
Chapter 4BIOS Setup
BIOS Setup Menus
This section provides illustrations of the seven main setup screens in the LittleBoard 735 BIOS Setup
Utility. Below each illustration is a bullet list of the screen’s submenus and setting selections. The setting
selections are presented in brackets after each submenu or menu item and the optimal default settings are
presented in bold. For more detailed definitions of the BIOS settings, refer to the AMIBIOS8 manual:
http://www.ami.com/support/doc/MAN-EZP-80.pdf
Table 4-1. BIOS Setup Menus
BIOS Setup Utility MenuItem/Topic
Main SettingsDate and Time
Advanced SettingsCPU settings, IDE Drive Configurations, Floppy, Super I/O,
Hardware Health, ACPI, APM, MPS, PCI Express, Smbios, Remote
Access (Serial Console), USB Configuration, and PCI to ISA Bridge
PCIPnP (PCI, Plug n' Play)PCI settings, Plug & Play settings, Interrupt settings, DMA channel
settings, and Reserved memory size
BootBoot-up Settings
Security Setting or changing Passwords
ChipsetNorthbridge and Southbridge settings
ExitExiting with or without changing settings, Loading Optimal or Failsafe
conditions
BIOS Main Setup Screen
BIOS Setup Utility
Main Advanced PCIPnP Boot Security Chipset Exit
System Overview
AMIBIOS
Version : 08.XX.XX
Build Date: XX/XX/XX
ID: LB735XXX.X
Processor
Genuine Intel (R) CPU N270 @ 1.60GHz
Speed : 1600MHz
Count : X
System Memory
Size : XXXXXMB
System Time [XX:XX:XX]
System Date [Xxx XX/XX/20XX]
v02.XX (C) Copyright 1985-20XX, American Megatrends, Inc.
Use [ENTER], [TAB]
or [SHIFT-TAB] to
select a field.
Use [+] or [-] to
configure system Time.
Select Screen
Select Item
+ - Change
Tab Select Field
F1 General Help
F10 Save and Exit
ESC Exit
Field
LB735_BIOS_MainScreen_a
Figure 4-1. BIOS Main Setup Screen
•Date & Time
♦
System Time (hh:mm:ss) – This is a 24-hour clock setting in hours, minutes, and seconds.
LittleBoard 735Reference Manual47
Chapter 4BIOS Setup
♦
System Date (day of week, mm:dd:yyyy) – This field requires the alpha-numeric entry of the day of
week, day of the month, calendar month, and all 4 digits of the year, indicating the century plus
year (Fri 10/21/2011).
BIOS Advanced Setup Screen
BIOS Setup Utility
Main Advanced PCIPnP Boot Security Chipset Exit
Advanced Settings
WARNING: Setting wrong values in below sections
may cause system to malfunction.
CPU Configuration
IDE Configuration
Floppy Configuration
SuperIO Configuration
Hardware Health Configuration
ACPI Configuration
APM Configuration
MPS Configuration
PCI Express Configuration
Smbios Configuration
Remote Access Configuration
USB Configuration
PCI-ISA Bridge Configuration
v02.XX (C) Copyright 1985-20XX, American Megatrends, Inc.
Figure 4-2. BIOS Advanced Setup Screen
Configure CPU.
Select Screen
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
LB735_BIOS_AdvancedScreen_a
•CPU Configuration
♦
Manufacture: Intel
♦
Genuine Intel® CPU N270 @ 1.60GHz
♦
Frequency: 1.60GHz
♦
FSB Speed: 532MHz
♦
Cache L1: 24KB
♦
Cache L2: 512KB
♦
Ratio Actual Value: 12
♦
Max CPUID Limit [Disabled; Enabled]
♦
Execute - Disable Bit Capability [Disabled; Enabled]
Hard Disk Drives
Removable Drives
CD/DVD Drives
USB Drives
Network Drives
v02.xx (C) Copyright 1985-20xx, American Megatrends, Inc.
Figure 4-4. BIOS Boot Setup Screen
Configure Settings
during System Boot.
Select Screen
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
LB735_BIOS_BootScreen_a
•Boot Settings Configuration
♦
Quick Boot – [Disabled; Enabled]
♦
Quiet Boot – [Disabled; Enabled]
♦
Add On ROM Display Mode – [Force BIOS; Keep Current]
♦
Bootup Num-Lock – [Off; On]
♦
PS/2 Mouse Support – [Disabled; Enabled; Auto]
LittleBoard 735Reference Manual55
Chapter 4BIOS Setup
♦
Wait for 'F1' If Error – [Disabled; Enabled]
♦
Hit 'DEL' Message Display – [Disabled; Enabled]
♦
Interrupt 19 Capture – [Disabled; Enabled]
♦
Watchdog Timeout in Seconds – [Disabled]
♦
GPIO Port Configuration – [Disabled; Enabled]
♦
GPIO Port Mask – [11110000]
♦
GPIO Port Init Value – [00000000]
♦
OnBoard Gbit Ethernet Boot ROM – [Enabled; Disabled]
♦
OnBoard Gbit Ethernet2 Boot ROM – [Enabled; Disabled]
♦
1st Boot Device – [1st FLOPPY DRIVE; CD/DVD; Hard Drive; USB: USB Hotplug FDD;
Network: IBA GE Slot 0200 v1327; Disabled]
♦
2nd Boot Device – [1st FLOPPY DRIVE; CD/DVD; Hard Drive; USB: USB Hotplug FDD;
Network: IBA GE Slot 0200 v1327; Disabled]
♦
3rd Boot Device – [1st FLOPPY DRIVE; CD/DVD; Hard Drive; USB: USB Hotplug FDD;
Network: IBA GE Slot 0200 v1327; Disabled]
♦
4th Boot Device – [1st FLOPPY DRIVE; CD/DVD; Hard Drive; USB: USB Hotplug FDD;
Network: IBA GE Slot 0200 v1327; Disabled]
♦
5th Boot Device – [1st FLOPPY DRIVE; CD/DVD; Hard Drive; USB: USB Hotplug FDD;
Network: IBA GE Slot 0200 v1327; Disabled]
♦
Hard Disk Drives
•1st Drive – [Not Installed]
♦
Removable Drives
•1st Drive – [1st FLOPPY DRIVE; Disabled]
♦
CD/DVD Drives
•1st Drive – [Not Installed]
♦
USB Drives
•1st Drive – [USB:USB Hotplug FDD; Disabled]
♦
Network drives
•1st Drive – [Network:IBA GE Slot 0200 v1327; Network:IBA GE Slot 0100 v1327;
Disabled]
•2nd Drive – [Network:IBA GE Slot 0200 v1327; Network:IBA GE Slot 0100 v1327;
Disabled]
56Reference ManualLittleBoard 735
Chapter 4BIOS Setup
BIOS Security Setup Screen
BIOS Setup Utility
Main Advanced PCIPnP Boot Security Chipset Exit
Security Settings
Supervisor Password :Not installed
User Password :Not installed
Change Supervisor Password
Change User Password
v02.xx (C) Copyright 1985-20xx, American Megatrends, Inc.
Figure 4-5. BIOS Security Setup Screen
•Security Settings
♦
Supervisor Password – [Not Installed]
♦
User Password – [Not Installed]
♦
Change Supervisor Password
Install or Change the
password.
Select Screen
Select Item
Enter Change
F1 General Help
F10 Save and Exit
ESC Exit
LB735_BIOS_SecurityScreen_a
a. Select Change Supervisor Password from the Security Setup menu.
b.Press <Enter> to access the pop-up entry field, Enter New Password.
c.Type the password and press <Enter> again.
d.The screen will not display the password as you type.
e.Re-type the password when prompted by the pop-up entry field and press <Enter> again.
If the password is not confirmed when you re-type it, an error message will appear. The
password is stored in NVRAM if you have successfully entered the password.
♦
Change User Password
a.Select Change User Password from the Security Setup menu.
b.Press <Enter> to access the pop-up entry field, Enter New Password.
c.Type the password and press <Enter> again.
d.The screen will not display the password as you type.
e.Re-type the password when prompted by the pop-up entry field and press <Enter> again.
If the password is not confirmed when you re-type it, an error message will appear. The
password is stored in NVRAM if you have successfully entered the password.
LittleBoard 735Reference Manual57
Chapter 4BIOS Setup
BIOS Chipset Setup Screen
BIOS Setup Utility
Main Advanced PCIPnP Boot Security Chipset Exit
Advanced Chipset Settings
WARNING: Setting wrong values in below sections
may cause system to malfunction.
NorthBridge Configuration
SouthBridge Configuration
v02.xx (C) Copyright 1985-20xx, American Megatrends, Inc.
Figure 4-6. BIOS Chipset Setup Screen
•NorthBridge Configuration
♦
DRAM Frequency – [Auto; 400 MHz; 533 MHz]
Configure North Bridge
features.
Select Screen
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
LB735_BIOS_ChipsetScreen_a
♦
Configure DRAM Timing by SPD – [Disabled; Enabled]
Address: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA
Tel: +1-408-360-0200
Toll Free: +1-800-966-5200 (USA only)
Fax: +1-408-360-0222
Email: info@adlinktech.com
ADLINK Technology (China) Co., Ltd.
Address: Ϟ⍋Ꮦ⌺ϰᮄᓴ∳催⾥ᡔು㢇䏃 300 ো(201203) 300 Fang Chun Rd., Zhangjiang Hi-Tech Park,
Pudong New Area, Shanghai, 201203 China
Tel: +86-21-5132-8988
Fax: +86-21-5132-3588
Email: market@adlinktech.com
ADLINK Technology, Inc. provides a number of methods for contacting Technical Support listed in the
Table A -1 below. Requests for support through the Ask an Expert web page are given the highest priority,
and usually will be addressed within one working day.
•ADLINK Ask an Expert – This is a comprehensive support center designed to meet all your technical
needs. This service is free and available 24 hours a day through the Ampro by ADLINK web page at
http://www.adlinktech.com/AAE/
which will help you with the common information requested by most customers. This is a good source
of information to look at first for your technical solutions. However, you must register online if you
wish to use the Ask a Question feature.
ADLINK strongly suggests that you register with the web site. By creating a profile on the ADLINK
web site, you will have a portal page called “My ADLINK” unique to you with access to exclusive
services and account information.
•Personal Assistance – You may also request personal assistance by creating an Ask an Expert account
and then going to the Ask a Question feature. Requests can be submitted 24 hours a day, 7 days a week.
You will receive immediate confirmation that your request has been entered followed by an e-mail
response. Once you have submitted your request, you must log in to My Stuff where you can check
status, update your request, and access other features.
•Download Service – This service is also free and available 24 hours a day at
http://www.adlinktech.com
register online before you can log in to this service.
. This includes a searchable database of Frequently Asked Questions,
. For certain downloads such as technical documents and software, you must
Table A-1. Technical Support Contact Information
MethodContact Information
Ask an Experthttp://www.adlinktech.com/AAE/
Web Sitehttp://www.adlinktech.com
Standard Mail
LittleBoard 735Reference Manual61
Appendix ATechnical Support
Table A-1. Technical Support Contact Information
ADLINK Technology Beijing
Address: ࣫ҀᏖ⍋⎔Ϟഄϰ䏃 1 োⲜ߯ࡼ E ᑻ 801 ᅸ(100085)
Rm. 801, Power Creative E, No. 1, B/D
Shang Di East Rd., Beijing, 100085 China
Tel: +86-10-5885-8666
Fax: +86-10-5885-8625
Email: market@adlinktech.com
ADLINK Technology Shenzhen
Address: ⏅ഇᏖቅ⾥ᡔು催ᮄϗ䘧᭄ᄫᡔᴃು
A1 2 ὐ C (518057)
2F, C Block, Bldg. A1, Cyber-Tech Zone, Gao Xin Ave. Sec. 7,
High-Tech Industrial Park S., Shenzhen, 518054 China
Tel: +86-755-2643-4858
Fax: +86-755-2664-6353
Email: market@adlinktech.com