ADLINK LEC-BTS User Manual
LEC‐BTS
(Computer‐on‐Module)
Technical Reference
P/N50‐1Z173‐1000
Rev1.0
Advance Technologies. Automate the World.
Disclaimer
Information in this document is provided in connection with ADLINK products. No license,
express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document. Except as provided in ADLINK´s Terms and Conditions of Sale for such products,
ADLINK assumes no liability whatsoever, and ADLINK disclaims any express or implied warranty, relating to sale and/or use of ADLINK products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other
intellectual property right. If you intend to use ADLINK products in or as medical devices, you
are solely responsible for all required regulatory compliance, including, without limitation, Title
21 of the CFR (US), Directive 2007/47/EC (EU), and ISO 13485 & 14971, if any. ADLINK may
make changes to specifications and product descriptions at any time, without notice.
Trademarks
MS-DOS, Windows, Windows 95, Windows 98, Windows NT and Windows XP are trademarks of Microsoft Corporation. PS/2 is a trademark of International Business Machines, Inc.
Intel and Solid State Drive are trademarks of Intel Corporation. PC/104 is a registered trademark of the PC/104 Consortium. All other trademarks appearing in this document are the
property of their respective owners. CoreModule is a registered trademark, and ADLINK, Little Board, LittleBoard, MightyBoard, MightySystem, MilSystem, MiniModule, ReadyBoard,
ReadyBox, ReadyPanel, RuffSystem, and ReadySystem are trademarks of ADLINK Technology, Inc. All other marks are the property of their respective companies.
Revision History
Revision Reason for Change Date
1.0 Initial Release Dec/14
ADLINK Technology, Incorporated
www.adlinktech.com
© Copyright 2014 ADLINK Technology, Incorporated
Audience
This manual provides reference only for computer design engineers, including but not limited
to hardware and software designers and applications engineers. ADLINK Technology, Inc.
assumes you are qualified to design and implement prototype computer equipment.
ii
LEC-BTS
Table of Contents
1 Overview ........................................................................................................................... 1
1.1 Block Diagram........................................................................................................................ 1
1.2 Major Components (ICs)........................................................................................................ 2
1.3 Connectors, Switches, and LEDs .......................................................................................... 3
1.4 Specifications......................................................................................................................... 5
2 Hardware ........................................................................................................................... 7
2.1 CPU ....................................................................................................................................... 7
2.2 Memory ................................................................................................................................. 7
3 Interfaces .......................................................................................................................... 7
3.1 18/24 Bit LVDS LCD ............................................................................................................. 8
3.2 HDMI (High-Definition Multimedia Interface) ......................................................................... 8
3.3 Camera CSI ........................................................................................................................... 8
3.4 Audio (HDA)........................................................................................................................... 8
3.5 PCI Express (PCIe)................................................................................................................ 8
3.6 Gigabit Ethernet .................................................................................................................... 8
3.7 USB Ports .............................................................................................................................. 8
3.8 SATA...................................................................................................................................... 8
3.9 I2C Bus .................................................................................................................................. 8
3.10 SPI ......................................................................................................................................... 9
3.11 Serial (UART)......................................................................................................................... 9
3.12 I2S.......................................................................................................................................... 9
3.13 SD/SDIO Interface ................................................................................................................. 9
3.14 eMMC Interface ..................................................................................................................... 9
3.15 GPIO ...................................................................................................................................... 9
3.16 LPC Debug ............................................................................................................................ 9
3.17 SMARC Interface Signals .................................................................................................... 10
3.18 Debug (DB40) ...................................................................................................................... 13
Appendix A Technical Support ......................................................................................... 15
iii
iv
1 Overview
314-pin SMARC Connector
Intel®
E3800 Series
SoC
(System on Chip)
LVDS 18/24-bit
Single Channel
LVDS
Converter
RTD2136
DDI0
LPC
SPI
2x I2C
(GP/LVDS)
2x I2C (PM/CAM)
BOOT Select
Power Management
SDIO
DDI1 (HDMI)
LAN
Controller
i210IT
SATA0
Camera Support (CSI 4L/1L)
Audio (HDA and I2S)
USB 3.0 on AFB
USB 2.0, ports 0,1,2
PCIe x1, PCIe ports 1,2,3
PCIe x1
2x Serial (including RTS/CTS) +
PCU-UART (only RX/TX)
12x GPIO
(Five reserved for CSI)
SMB
MMC
GPIO
Expander
SMBus
INT
Gb
Ethernet
BMC
HWM
SPI
BIOS
Debug
DB40
Connector
DDR3L
1066/1333MHz
DDR3L
On-Board
2/4 GB
Memory
Power
Management
IC
IDTP9145
LEC_BTS_blk_diag_b
This initial manual version presents a general overview of the LEC-BTS. After reviewing this
document you should understand the following features of the LEC-BTS.
Functional Block Diagram
Major Component (IC) Locations and Descriptions
Connector, Switch, and LED Locations and Descriptions
Specifications
SMARC Interface Signal Definitions and Debug Interface Signal Definitions
LEC-BTS
NOTE: Refer to http://www.sget.org/standards/smarc.html
for SMARC specifications. Please
refer to BSP readme documents in the Quick Drive for BSP installation instructions.
1.1 Block Diagram
Figure 1-1 represents the component functions of the module.
Figure 1-1: Functional Block Diagram
Overview 1
1.2 Major Components (ICs)
LEC_BTS_Top_Comp_a
U1
U26
U25
Key:
U1 - CPU
U25 - DDR3L SDRAM
U26 - DDR3L SDRAM
P156P74
Table 1-1 lists the major integrated circuits on the LEC-BTS, including a brief description of each
IC. Figures 1-2 and 1-3 show the locations of the major ICs.
Table 1-1: Major Integrated Circuit Descriptions and Functions
Chip Type Mfg. Model Description Function
CPU (U1) Intel E3815 (single core,
5W, 1.46GHz)
E3826 (dual core,
7W, 1.46GHz)
E3845 (quad core,
10W, 1.91GHz)
Ethernet
Intel WGI210IT SLIXT Single-port Gigabit
Controller
(U9 [bottom])
DDR3L
Micron MT41K256M16HA-125 On-board DDR3L,
SDRAM (U24
[bottom],
U25, U26
[top], U27
[bottom])
Atom, 22nm SoC
(System on Chip) with
Intel 64 architecture
Ethernet controller
1.35V, 4Gb,
32Mx16x8, non-ECC,
un-buffered System
Memory
Integrates
Processor Core,
Graphics and
Memory
Controller Hub,
and I/O Hub
Integrates GbE
MAC, PHY, and
SGMII/SerDes to
enable 10T/
100TX/1000T
Ethernet signals
using the PCIe x1
bus
Provides
high-speed data
transfer
Figure 1-2: Component Locations (Top Side)
2 Overview
Figure 1-3: Component Locations (Bottom Side)
LEC_BTS_Bot_Comp_a
Key:
U9 - GbE Controller
U24 - DDR3L SDRAM
U27 - DDR3L SDRAM
U9
U24
U27
S75S158
ON
1 2
(1 2)
LEC-BT_SW1_c
(4 3)
Switch Default Setting
ON
1 2
(1 2)
LEC-BT_SW2_b
(4 3)
Switch Default Setting
ON
1 2
(1 2)
LEC-BT_SW3_b
(4 3)
Switch Default Setting
1.3 Connectors, Switches, and LEDs
Table 1-2 describes the connectors, switches, and LEDs shown in Figure 1-4.
Table 1-2: Module Connector Description
LEC-BTS
Reference
GF1 – SMARC P-S Top/
Board
Access
Bottom
Description
314-pin, MXM edge connector for Memory, Video, and I/O
functions.
CN1 Top 40-pin, DB40 connector for debug card
SW1 Top 4-pin dip switch for selecting CSI1 camera, 4L, Data1
configuration [default=off]
SW2 Top 4-pin dip switch for selecting CSI1 camera, 4L, Data2
configuration [default=on]
SW3 Top 4-pin dip switch for selecting CSI1 camera, 4L, Data3
configuration [default=on]
SW1, SW2, SW3 Configurations:
• Camera with 1 MIPI-CSI lane = SW1-SW3 switches all set to ON
• Camera with 2 MIPI-CSI lanes = SW1 (both OFF); SW2 (both ON); SW3 (both ON)
• Camera with 3 MIPI-CSI lanes = SW1 (both OFF); SW2 (both OFF); SW3 (both ON)
• Camera with 4 MIPI-CSI lanes = SW1-SW3 switches all set to OFF
Overview 3
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