ACT ARX4418D Datasheet

CIRCUIT TECHNOLOGY

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eroflex Circuit T

echnology

– Data Bus Modules For The Future © SCD4418D REV A 9/24/97

Features

• ACT4418 Dual Transceivers meets
MIL-STD-1553A&B, Macair A3818,
A4905, A5232 and A5690 Specs

• ±12 Volt Power Supply Operation

• Voltage source output for higher bus
drive power

• Molded Plug-in package

• Monolithic construction using linear
ASICs

• Variable TX Amplitude

• Processed and Screened to Mil-STD-883
Specs for Industrial temperature range

General Description

The Aeroflex Circuit Technology
ACT4418D is a new generation
monolithic transceivers which provide
full compliance with Macair and MIL­STD-1553 data bus requirements
while providing variable amplitude
control.

The ACT4418D performs the front­end analog function of inputting and
outputting data through a transformer
to a MIL-STD-1553 or Macair data
bus. The ACT4418D can be consid­ered a "Universal" Transceiver in that
it is compatible with MIL-STD-1553A,
B, Macair A-3818, A-4905, A-5232
and A-5690.

Design of these transceivers
reflects particular attention to active
filter performance.This results in low
bit and word error rate with superior
waveform purity and minimal zero
crossover distortion. The ACT4418D
active filter design has additional high
frequency roll-off to provide the
required Macair low harmonic
distortion waveform without
increasing the pulse delay
characteristics significantly.

Efficient transmitter electrical and
thermal design provides low internal
power dissipation and heat rise at
high and well as low duty cycles.

Variable amplitude is adjusted with
0–10 Vdc on the control pin.

Transmitter:

The Transmitter section accepts bi­phase TTL data at the input and
when coupled to the data bus with a
1:1 transformer, isolated on the data
bus side with two 52.5 Ohm fault iso­lation resistors, and loaded by two 70

Block Diagram (without Transformer)

SHAPING

OUTPUT
STAGE

COMP.

COMP.

ACTIVE
FILTER

INPUT
AMP

DRIVER

TX DATA IN
TX DATA IN

TX INHIBIT

+5V

RX DATA IN
RX DATA IN

STROBE

TX DATA OUT
TX DATA OUT

RX DATA OUT

RX DATA OUT

-12V

+12V

V+

V-

AMP CONTROL

One Channel

GROUND

ACT4418 Molded Dual Variable Amplitude Transceivers

& MIL-STD-1553

for MACAIR A3818, A5690, A5232, A4905

Aeroflex Circuit Technology SCD4418D Rev A 9/24/97 Plainview NY [phone]

2

Ohm terminations plus additional
receivers, the data bus signal pro­duced is 7.5 volts typical P -P at A­A’. (See Figure 5.) When both DATA
and DATA

inputs are held low or
high, the transmitter output
becomes a high impedance and is
“removed” from the line. In addition,
an overriding “INHIBIT" input pro­vides for the removal of the trans­mitter output from the line. A logic
“1” applied to the “INHIBIT” takes
priority over the condition of the data
inputs and disables the transmitter.
(See Transmitter Logic Wave­forms,Figure 1.)

The transmitter utilizes an active

filter to suppress harmonics above

1 MHz to meet Macair specifications
A-3818, A-4905, A-5232 and A-

5690. The transmitter may be safely
operated for an indefinite period at
100% duty cycle into a data bus
short circuit.

Receiver:

The Receiver section accepts bi­phase differential data at the input
and produces two TTL signals at the
output. The outputs are DATA and
DATA

, and represent positive and
negative excursions of the input
beyond a pre-determined threshold.

(See Receiver Logic Waveforms,

Figure 2.)

The internal threshold is nominally

set to detect data bus signals
exceeding 1.05 Volts P-P and reject
signals less than 0.6 volts P-P when
used with a 1:1 turns ratio trans­former (See Figure 5 for transformer
data and typical connection).

A low level at the Strobe input

inhibits the DATA and DATA

out­puts. If unused, a 2K pull-up to +5
Volts is recommended

DATA IN

DATA IN

INHIBIT

LINE TO LINE

OUTPUT

NOTES:

2. DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them.

3. DATA and DATA must be in the same state during off time (both high or low).

Figure 1 Transmitter Logic Waveforms

Figure 2 Receiver Logic Waveforms

Note overlap

NOTE: Waveforms shown are for normally low devices. For normally high receiver output

devices, the receiver outputs are swapped as shown by the dashed lines

level

LINE TO LINE
INPUT

DATA OUT

DATA OUT

1. Line to line waveforms illustrate Macair signals, MIL-STD-1553 signals are trapezoidal

Aeroflex Circuit Technology SCD4418D Rev A 9/24/97 Plainview NY [phone]

3

Absolute Maximum Ratings

Operating case temperature

-40°C to +85°C

Storage case temperature

-65°C to +150 °C

Power supply Voltages

±12 V P.S. to ±15V MAX +5 V P.S. to +7V MAX

Logic input Voltage -0.3 V to +5.5 V
Receiver differential input

±40 V
Receiver input voltage (common mode) ±10V
Transmitter peak output current

110 mA

Total package power dissipation over the full operating
case temperature range (100% duty cycle)

1.65 mW

T

J Maximum 150°C

Maximum junction to air temperature rise
(100 % duty cycle)

60°C

Maximum

Junction-Air thermal resistance for free air

36°C/W

Electrical Characteristics, Transmitter Section

Input Characteristics, TX DATA in or TX DATA in

Parameter Condition Symbol Min Typ Max Unit

"0" Input Current VIN = 0.4 V I

ILD

-0.2

-0.4 mA

"1" Input Current V

IN

= 2.7 V I

IHD

1.0 40

µA

"0" Input Voltage V

IHD

0.7

V

"1" Input Voltage V

IHD

2.0

V

Inhibit Characteristics

"0" Input Current

V

IN

= 0.4V

I

ILI

-0.2

-0.4 mA

"1" Input Current V

IN

= 2.7V I

IHI

1.0 40

µA

"0" Input Voltage

V

ILI

0.7

V

"1" Input Voltage V

IHI

2

V

Delay from TX inhibit(0→1) to inhibited output

Note 1

t

DXOFF

400 500

nS

Delay from TX inhibit, (1→0) to active output Note 1

t

DXON

400 500

nS

Differential output noise, inhibit mode V

NOI

0.8 10 mV p-p

Differential output impedance (inhibited)

Note 2

Z

OI

2K Ω

Output Characteristics

Differential output level at point B–B’ Fig 5,
Vcont = 10 Vdc, See Fig 3 for control volt-

age versus output level

R

L

= 140 Ω

V

O

28 30 36 V p-p

Rise and fall times
(10% to 90% of p-p output)

t

r

200 250 300

nS

Output offset at point A-A’on Fig 5, 2.5 µS
after midpoint crossing of the parity bit of
the last word of a 660 µS message

R

L

= 35 Ω

V

OS

±90 mV peak

Delay from 50% point of TX DATA or TX
DATA input to zero crossing of differential
signal. (note 1.)

t

DTX

330 450

nS