5
4
3
2
1
Commercial DT / M4.1 Chassis System
Project name: vHulk
SCH Ver: -1
D D
C C
B B
A A
PCB Number: 14065-1
PAGE
TITLE
01
COVER PAGE
02
BLOCK DIAGRAM
03 CPU (PCIE/DMI)
CPU (CFG/CLOCK/PM)
04
CPU (DDR_CHA)
05
06
CPU (DDR_CHB)
CPU (DDI/EDP)
07
08
CPU (CPU Power)
09
CPU (VSS)
10
CPU (Power CAP)
DDR DIMM_2
11
12
DDR DIMM_1
13
DDR DIMM_4
DDR DIMM_3
14
15
PCH (SPI/UART/I2C)
16
PCH (DMI/PCI-E/USB)DDI GP
17
PCH (PCI-E/SATA)
18
PCH (CLOCK/CL)
19
PCH (USB/ESPI)
20
PCH(GPIO/CPU/SMBUS/IHDA/JTAG)
21
PCH (POWER1)
22
PCH (POWER2)_PCH Strap
PCH Power CAP
23
SIO_ITE8733
24
25
Flash&RTC
Thermal&FAN
26
27
Audio Codec_ALC662
28
AMP_(R)
29
Audio IO_Front
Audio IO_Rear
30
LAN_RTL8111EPV
31
RJ45&Transformer
32
Card Reader_(R)
3
3
34
USB Charger_(R)
35
USB_Redrive_(R)
SB20_REAR PORT
36
U
37
USB20_FRONT HEADER
USB30_REAR PORT
38
USB30_FRONT HEADER
39
Power Plane EN Sequence
40
Dual Power
41
Switch power
42
43
ATX(BATT Conn)
Power Sequence(DDR4)
44
45
DCDC-3D3V&5V
VCORE & V_GT IC(NCP81203)
46
VCORE OUTPUT (NCP81151)
47
V_GT OUTPUT(NCP81151)
48
5V &3.3V(RT8243A) 49
DDR_PWR (RT8207M)
50
PCH_1P0V(RT8237C) 105
51
52
VCC_SA(NCP5230M)
53
VCC_IO(RT8237C)
54 LDO_1P5V_1P8V_2P5V
5
PAGE
55
56 DP2
57
5
59
60
61
62
63
64
65
66
67
68
69
7
71
72
7
74
75
76
77
78
79
80
81
82
8
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
1
106
107
TITLE
DVI-D
DP1
DVI/CRT
8
P
CI bridge
HDD/ODD
Mini card-WLAN
Mini card-SSD_(R)
Mini card-NGFF
Front board
Others
IO Board_(R)
COM
Debug
LPT
G sensor_(R)
0
Thunderbolt_(R)
Thunderbolt_(R)
3
Thunderbolt_(R)
Thunderbolt_(R)
Thunderbolt_(R)
GPU_(R)
GPU_(R)
GPU_(R)
GPU_(R)
GPU_(R)
GPU VRAM 1&2_(R)
PU VRAM 3&4_(R)
G
PU VRAM 5&6_(R)
3
G
GPU VRAM 7&8_(R)
GPU CORE_(R)
GPU discrete power_(R)
GPU Switch_(R)
GPU Switch_(R)
GPU others_(R)
NFC_(R)
TPM
S2
P
Express Card
Smart Card
Scalar_(R)
MCU_(R)
Inter LAN
LAN Switch_(R)
XDP&ITP
Table of Content
GPIO table
POWER SEQUENCE
Power Block Diagram
04
SMBUS table
CLOCK MAP
RESET Flow CHART
Change History
4
Jomper SETTING
CMOS1
WP1
1-2 Short
1-2 Short
OBR1 1-2 Open
MECLR1 1-2 Short With Jumper to enable ME
With Jumper to Clear CMOS
With Jumper to enable WP
Without Jumper to recovery
BOM Configuration
(R_) : unmount
(E_) : SATA Express
(Q_) : Q170
(B_) : B150
(D_) : VGA
(W_) : For WST/FXC MB
(T_) : TPM on board
(S_) : For ECS MB
(H_) : TPM header
Key IC
CPU1
PCH1
U7901
U2701
U3
TPM1
U72
U54
U6506
Header
SPK1
AUDF1
FANC1
FANS1
CMOS1
OBR1
WP1
PCHDR1
LPT1
COM1
TPMH1
CSOPN1
MECLR1
Intel CPU Skylake S 65W
Intel PCH Q170/B150
ITE SIO IT8733F-DX
RealTek Audio Codec ALC662-VD
Realtek LAN RTL8111EPV-CG
NuvoTon TPM NPCT650AAAWX
INTEL LAN I219LM I219
ITE PCI Bridge IC IT8893E
Realtek converter RTD2168-CG
21.63415.204
21.62895.205
21.60626.104
21.60626.104
21.61445.103
21.60909.102
21.61445.103
021.60235.0204
021.60217.0213
21.62884.205
21.62900.210
21.62874.102
21.61445.103
3
PCB BOARD SIZE
4 Layer / 244 mm x 244 mm
Power sates
+12V
-12V
3.3V
3.0V
2.5V
1.2V
DIMM
PCH
CPU
2
12V_S0
12V_CPU_S0
-12V_S0
ATX_5VSB
+5V_AUX1
+5V_AUX2
5V
5V_USB20_RJUSB2
5V_USB30P1
5V_USB30P2
5V_USB30H1
5V_USB20P1
5V_USB20_RJUSB1
5V_USB20H2
5V_USB20H1
5V_USB30H2
5V_S0
5V_DVI
ATX_3.3VSB
3P3V_LAN
3P3V_S5
3D3V_VCCPGPPA_Sx
3D3V_1D8V_PCHSPI_Sx
3D3V_DVDDIO_AUDIO
DVDD_IO
3D3V_S0
3D3V_RTD2168
3V_VBAT1_G3
3V_VRTC_G3
3D3V_VCCPRTC
2D5V_VPP
VDDQ
DDR_VTT
1D0V_S5
1V_VCCF24_Sx
1V_VCCAMPHYPLL_Sx
1V_VCCAPLL_Sx
VCC_CORE
GFX_CORE
VCC_SA
VCC_IO
1V_VCCST_VCCPLL_S3
G3 EUP S4 S3 S0 Name
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
COVER PAGE
COVER PAGE
COVER PAGE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
S5
O O O O
O O O
O
O
O O O O
O
O
1
O
O
O
O
O O
O
O O O O
O
O O O O O O
O O
O O
O O
O O O O
O
O
O
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
1 107 Wednesday, September 23, 2015
1 107 Wednesday, September 23, 2015
1 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
PROJECT NAME: vHULK
MB VERSION: -1
PCB BOARD SIZE:
D D
Internal Slot/Header
Front/Rear IO
Chipset
PCIEx16 slot
PCIE 3.0
CPU
Intel
Skylake-S
DDR4 CHA
DDR4 CHB
DDR4 DIMM *2
DDR4 DIMM *2
Display Port
DVI Port
DDI2
DDI3
DDI1
eDP
Display Port
DP to VGA
RGB
VGA PORT
DMI
Front USB 3.0 *2
Front USB 3.0 *2
C C
Front USB 2.0 *2
Front USB 2.0 *1
Rear USB 2.0 *2
(RJ45 USB conn)
Rear USB 3.0 *4
SATA PORT0
SATA Express
SATA PORT1
SATA PORT3
B B
SATA PORT4
SATA PORT5
USB 3.0
USB 3.0
USB 2.0
USB 2.0
USB 2.0
USB 3.0
SATA 3.0
SATA 3.0
SATA 3.0
SATA 3.0
SATA 3.0
PCH
SKL PCH-H
PCIE3.0
PCIE3.0
PCIE3.0
PCIE2.0/USB2.0
PCIE 2.0
PCIE3.0
SATA 3.0
SPI
LAN RTL8111EPV
RJ45 CONN/
USB2.0 x2 stack
Intel LAN I219LM
PCIE x1 Slot
PCIE x1 Slot
NGFF KEY E
TI PCI Bridge PCI Slot
NGFF KEY A
FLASH
TPM Header
Rear JACK
HP/MIC/LINE IN
Front header
HP/MIC
internal SPK
A A
5
Audio
ALC662
COM port Header
COM Port
4
HDA
COM
SIO
IT8732
3
LPC
FAN CTRL
TPM on board
CPU FAN
SYS FAN
<Core Design>
<Core Design>
PS2 KB/MS Print Port
2
<Core Design>
Title
Title
Title
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
2 107 Wednesday, September 23, 2015
2 107 Wednesday, September 23, 2015
2 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
D D
PEG
4
PEG_RX_CPU_P0
PEG_RX_CPU_N0
PEG_RX_CPU_P1
PEG_RX_CPU_N1
PEG_RX_CPU_P2
PEG_RX_CPU_N2
PEG_RX_CPU_P3
PEG_RX_CPU_N3
PEG_RX_CPU_P4
PEG_RX_CPU_N4
PEG_RX_CPU_P5
PEG_RX_CPU_N5
PEG_RX_CPU_P6
PEG_RX_CPU_N6
PEG_RX_CPU_P7
PEG_RX_CPU_N7
PEG_RX_CPU_P8
PEG_RX_CPU_N8
PEG_RX_CPU_P9
PEG_RX_CPU_N9
PEG_RX_CPU_P10
PEG_RX_CPU_N10
PEG_RX_CPU_P11
PEG_RX_CPU_N11
PEG_RX_CPU_P12
PEG_RX_CPU_N12
PEG_RX_CPU_P13
PEG_RX_CPU_N13
PEG_RX_CPU_P14
PEG_RX_CPU_N14
PEG_RX_CPU_P15
PEG_RX_CPU_N15
1 2
R302
R302
24D9R2F-L-GP
24D9R2F-L-GP
DMI_RX_CPU_P0
DMI_RX_CPU_N0
DMI_RX_CPU_P1
DMI_RX_CPU_N1
DMI_RX_CPU_P2
DMI_RX_CPU_N2
DMI_RX_CPU_P3
DMI_RX_CPU_N3
PEG_RCOMP_CPU
PEG_TX_CPU_P[0..15] 93
PEG_TX_CPU_N[0..15] 93
PEG_RX_CPU_P[0..15] 93
PEG_RX_CPU_N[0..15] 93
C C
DMI
DMI_RX_CPU_P[0..3] 16
DMI_RX_CPU_N[0..3] 16
DMI_TX_CPU_P[0..3] 16
B B
A A
DMI_TX_CPU_N[0..3] 16
VCC_IO
5
CPU1C
CPU1C
SKYLAKE
SKYLAKE
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
PEG_RCOMP
DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1
DMI_RXP2
DMI_RXN2
DMI_RXP3
DMI_RXN3
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
3
AA4
AA5
AB4
AB3
AC4
AC5
B8
B7
C7
C6
D6
D5
E5
E4
F6
F5
G5
G4
H6
H5
J5
J4
K6
K5
L5
L4
M6
M5
N5
N4
P6
P5
R5
R4
T6
T5
U5
U4
L7
Y3
Y4
LGA1151
LGA1151
3 OF 12
3 OF 12
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
DMI_TXP2
DMI_TXN2
DMI_TXP3
DMI_TXN3
A5
A6
B4
B5
C3
C4
D2
D3
E1
E2
F2
F3
G1
G2
H2
H3
J1
J2
K2
K3
L1
L2
M2
M3
N1
N2
P2
P3
R2
R1
T2
T3
AC2
AC1
AD3
AD2
AE2
AE1
AF2
AF3
PEG_TX_CPU_P0
PEG_TX_CPU_N0
PEG_TX_CPU_P1
PEG_TX_CPU_N1
PEG_TX_CPU_P2
PEG_TX_CPU_N2
PEG_TX_CPU_P3
PEG_TX_CPU_N3
PEG_TX_CPU_P4
PEG_TX_CPU_N4
PEG_TX_CPU_P5
PEG_TX_CPU_N5
PEG_TX_CPU_P6
PEG_TX_CPU_N6
PEG_TX_CPU_P7
PEG_TX_CPU_N7
PEG_TX_CPU_P8
PEG_TX_CPU_N8
PEG_TX_CPU_P9
PEG_TX_CPU_N9
PEG_TX_CPU_P10
PEG_TX_CPU_N10
PEG_TX_CPU_P11
PEG_TX_CPU_N11
PEG_TX_CPU_P12
PEG_TX_CPU_N12
PEG_TX_CPU_P13
PEG_TX_CPU_N13
PEG_TX_CPU_P14
PEG_TX_CPU_N14
PEG_TX_CPU_P15
PEG_TX_CPU_N15
DMI_TX_CPU_P0
DMI_TX_CPU_N0
DMI_TX_CPU_P1
DMI_TX_CPU_N1
DMI_TX_CPU_P2
DMI_TX_CPU_N2
DMI_TX_CPU_P3
DMI_TX_CPU_N3
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Title
Title
Title
CPU(PCIE/DMI)
CPU(PCIE/DMI)
CPU(PCIE/DMI)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Hsichih, Taipei Hsien
1
-1
-1
3 107 Wednesday, September 23, 2015
3 107 Wednesday, September 23, 2015
3 107 Wednesday, September 23, 2015
-1
5
4
3
2
1
CPU XDP
XDP_PCUDEBUG<3>
CFG[0..15]
D D
SKL_PCUSTB_0_DP
SKL_PCUSTB_0_DN
SKL_PCUSTB_1_DP
SKL_PCUSTB_1_DN
BPM_CPU_N0
BPM_CPU_N1
H_TDO
H_TDI
H_TMS
H_TCK
H_TRST_N
H_PREQ_N
H_PRDY_N
SVID
C C
B B
A A
VIDSCK_VR1 46
VIDSOUT_VR1 46
VIDALERT#_VR1 46
CLOCK
CPU_BCLK_PCH 18
CPU_BCLK_PCH# 18
CPU_PCIBCLK_PCH 18
CPU_PCIBCLK_PCH# 18
CPU_CLK24M_PCH 18
CPU_CLK24M_PCH# 18
CONTROL
PROCHOT#_R 46
DDR_VTT_CNTL 44
CPU_VCCST_PWRGD 40
H_PWRGD 20
PLTRST_CPU_N 17
PM_SYNC_CPU 17
PM_DOWN_PCH 17
PECI_CPU 17,24
THERMTRIP#_CPU_R 17
H_SKTOCC_N 16
VIDALERT#_VR1 VIDALERT#_CPU
PROCHOT#_R PROCHOT#_CPU
CPU_VCCST_PWRGD
PM_DOWN_PCH
THERMTRIP#_CPU_R
5
1 2
R469 220R2J-L2-GP R469 220R2J-L2-GP
1 2
R467 100R2J-2-GP R467 100R2J-2-GP
R433
R433
1 2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
R422 20R2J-3-GP R422 20R2J-3-GP
1 2
CPU_BCLK_PCH
CPU_BCLK_PCH#
CPU_PCIBCLK_PCH
CPU_PCIBCLK_PCH#
CPU_CLK24M_PCH
CPU_CLK24M_PCH#
VIDSCK_VR1
VIDSOUT_VR1
DDR_VTT_CNTL
TP_CPU_ZVM#
TP_CPU_AC37
CPU_VCCST_PWRGD_R
H_PWRGD
PLTRST_CPU_N
PM_SYNC_CPU
PM_DOWN_CPU
PECI_CPU
H_SKTOCC_N
SKL_CNL_N
CATERR#_CPU
4
CPU1E
CPU1E
W5
W4
W1
W2
K9
J9
E39
E38
E40
C39
AC36
AC38
AC37
U2
F8
E7
E8
D8
G7
D11
AB35
AB36
D13
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
CFG3 XDP_PCUDEBUG<3>
SKYLAKE
SKYLAKE
BCLKP
BCLKN
PCI_BCLKP
PCI_BCLKN
CLK24P
CLK24N
VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#
DDR_VTT_CNTL
ZVM#
RSVD_AC37
VCCST_PWRGD
PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#
SKTOCC#
PROC_SELECT#
CATERR#
LGA1151
LGA1151
5 OF 12
5 OF 12
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
BPM#0
BPM#1
BPM#2
BPM#3
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
R414
R414
1 2
1KR2J-1-GP
1KR2J-1-GP
H15
F15
F16
H16
F19
H18
G21
H20
G16
E16
F17
H17
G20
F20
F21
H19
E14
F14
G18
F18
D16
D17
G14
H14
H13
G12
F13
F11
F12
B9
B10
M11
3
TP_CPU_G14
TP_CPU_H14
CFG_RCOMP
CFG0
R416 1KR2J-1-GP(R_)R416 1KR2J-1-GP(R_)
CFG1
R418 1KR2J-1-GP(R_)R418 1KR2J-1-GP(R_)
CFG2
R419 1KR2J-1-GP(R_)R419 1KR2J-1-GP(R_)
CFG3
R420 1KR2J-1-GP(R_)R420 1KR2J-1-GP(R_)
CFG4
R431 1KR2J-1-GP R431 1KR2J-1-GP
CFG5
R429 1KR2J-1-GP(R_)R429 1KR2J-1-GP(R_)
CFG6
R430 1KR2J-1-GP(R_)R430 1KR2J-1-GP(R_)
CFG7
R417 1KR2J-1-GP(R_)R417 1KR2J-1-GP(R_)
CFG8
R426 1KR2J-1-GP(R_)R426 1KR2J-1-GP(R_)
CFG9
R432 1KR2J-1-GP(R_)R432 1KR2J-1-GP(R_)
CFG10
R423 1KR2J-1-GP(R_)R423 1KR2J-1-GP(R_)
CFG11
R428 1KR2J-1-GP(R_)R428 1KR2J-1-GP(R_)
CFG12
R424 1KR2J-1-GP(R_)R424 1KR2J-1-GP(R_)
CFG13
R425 1KR2J-1-GP(R_)R425 1KR2J-1-GP(R_)
CFG14
R427 1KR2J-1-GP(R_)R427 1KR2J-1-GP(R_)
CFG15
R458 1KR2J-1-GP(R_)R458 1KR2J-1-GP(R_)
SKL_PCUSTB_0_DN
SKL_PCUSTB_0_DP
SKL_PCUSTB_1_DN
SKL_PCUSTB_1_DP
BPM_CPU_N0
BPM_CPU_N1
H_TDO
H_TDI
H_TMS
H_TCK
H_TRST_N
H_PREQ_N
H_PRDY_N
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R415
R415
49D9R2F-GP
49D9R2F-GP
For CPU XDP
2
SKL_CNL_N
VIDALERT#_VR1
VIDSOUT_VR1
PROCHOT#_R
H_SKTOCC_N
H_TCK
H_TRST_N
R21 10KR2J-3-GP(R_)R21 10KR2J-3-GP(R_)
R470 56R2F-1-GP R470 56R2F-1-GP
R471 100R2J-2-GP R471 100R2J-2-GP
R421 75R2F-2-GP R421 75R2F-2-GP
R477 10KR2J-3-GP R477 10KR2J-3-GP
H_TCK TERMINATION
PLACE NEAR CPU WITHIN 1.1 INCH
R403 51R2J-2-GP R403 51R2J-2-GP
PLace Any where
R407 51R2J-2-GP(R_)R407 51R2J-2-GP(R_)
1 2
1 2
1 2
1 2
1 2
1 2
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CPU_(THERMAL/CLOCK/PM/CFG)
CPU_(THERMAL/CLOCK/PM/CFG)
CPU_(THERMAL/CLOCK/PM/CFG)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
VCC_IO
1V_VCCST_VCCPLL_S3
3D3V_S5
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
1
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
4 107 Wednesday, September 23, 2015
4 107 Wednesday, September 23, 2015
4 107 Wednesday, September 23, 2015
-1
-1
-1
5
M_DATA_A[0..63] 12,14
M_A_A[0..16] 12,14
M_A_DQS_DN[0..7] 12,14
D D
C C
B B
M_A_DQS_DP[0..7] 12,14
M_A_CLK0 14
M_A_CLK#0 14
M_A_CLK1 14
M_A_CLK#1 14
M_A_CLK2 12
M_A_CLK#2 12
M_A_CLK3 12
M_A_CLK#3 12
M_A_CKE0 14
M_A_CKE1 14
M_A_CKE2 12
M_A_CKE3 12
M_A_CS#0 14
M_A_CS#1 14
M_A_CS#2 12
M_A_CS#3 12
M_A_ODT0 14
M_A_ODT1 14
M_A_ODT2 12
M_A_ODT3 12
M_BA_A_1 12,14
M_BA_A_0 12,14
M_BG_A_1 12,14
M_BG_A_0 12,14
M_PARITY_A 12,14
M_ALERT_A_N 12,14
M_ACT_A_N 12,14
4
CPU1A
CPU1A
M_DATA_A5
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A0
M_DATA_A6
M_DATA_A7
M_DATA_A13
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A8
M_DATA_A12
M_DATA_A14
M_DATA_A15
M_DATA_A21
M_DATA_A16
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A17
M_DATA_A22
M_DATA_A23
M_DATA_A25
M_DATA_A28
M_DATA_A27
M_DATA_A31
M_DATA_A29
M_DATA_A24
M_DATA_A30
M_DATA_A26
M_DATA_A32
M_DATA_A36
M_DATA_A34
M_DATA_A35
M_DATA_A33
M_DATA_A37
M_DATA_A39
M_DATA_A38
M_DATA_A44
M_DATA_A40
M_DATA_A47
M_DATA_A43
M_DATA_A41
M_DATA_A45
M_DATA_A46
M_DATA_A42
M_DATA_A49
M_DATA_A54
M_DATA_A53
M_DATA_A50
M_DATA_A52
M_DATA_A51
M_DATA_A48
M_DATA_A55
M_DATA_A61
M_DATA_A63
M_DATA_A60
M_DATA_A59
M_DATA_A62
M_DATA_A57
M_DATA_A58
M_DATA_A56
AE38
DDR0_DQ0
AE37
DDR0_DQ1
AG38
DDR0_DQ2
AG37
DDR0_DQ3
AE39
DDR0_DQ4
AE40
DDR0_DQ5
AG39
DDR0_DQ6
AG40
DDR0_DQ7
AJ38
DDR0_DQ8
AJ37
DDR0_DQ9
AL38
DDR0_DQ10
AL37
DDR0_DQ11
AJ40
DDR0_DQ12
AJ39
DDR0_DQ13
AL39
DDR0_DQ14
AL40
DDR0_DQ15
AN38
DDR0_DQ16/DDR0_DQ32
AN40
DDR0_DQ17/DDR0_DQ33
AR38
DDR0_DQ18/DDR0_DQ34
AR37
DDR0_DQ19/DDR0_DQ35
AN39
DDR0_DQ20/DDR0_DQ36
AN37
DDR0_DQ21/DDR0_DQ37
AR39
DDR0_DQ22/DDR0_DQ38
AR40
DDR0_DQ23/DDR0_DQ39
AW37
DDR0_DQ24/DDR0_DQ40
AU38
DDR0_DQ25/DDR0_DQ41
AV35
DDR0_DQ26/DDR0_DQ42
AW35
DDR0_DQ27/DDR0_DQ43
AU37
DDR0_DQ28/DDR0_DQ44
AV37
DDR0_DQ29/DDR0_DQ45
AT35
DDR0_DQ30/DDR0_DQ46
AU35
DDR0_DQ31/DDR0_DQ47
AY8
DDR0_DQ32/DDR1_DQ0
AW8
DDR0_DQ33/DDR1_DQ1
AV6
DDR0_DQ34/DDR1_DQ2
AU6
DDR0_DQ35/DDR1_DQ3
AU8
DDR0_DQ36/DDR1_DQ4
AV8
DDR0_DQ37/DDR1_DQ5
AW6
DDR0_DQ38/DDR1_DQ6
AY6
DDR0_DQ39/DDR1_DQ7
AY4
DDR0_DQ40/DDR1_DQ8
AV4
DDR0_DQ41/DDR1_DQ9
AT1
DDR0_DQ42/DDR1_DQ10
AT2
DDR0_DQ43/DDR1_DQ11
AV3
DDR0_DQ44/DDR1_DQ12
AW4
DDR0_DQ45/DDR1_DQ13
AT4
DDR0_DQ46/DDR1_DQ14
AT3
DDR0_DQ47/DDR1_DQ15
AP2
DDR0_DQ48/DDR1_DQ32
AM4
DDR0_DQ49/DDR1_DQ33
AP3
DDR0_DQ50/DDR1_DQ34
AM3
DDR0_DQ51/DDR1_DQ35
AP4
DDR0_DQ52/DDR1_DQ36
AM2
DDR0_DQ53/DDR1_DQ37
AP1
DDR0_DQ54/DDR1_DQ38
AM1
DDR0_DQ55/DDR1_DQ39
AK3
DDR0_DQ56/DDR1_DQ40
AH1
DDR0_DQ57/DDR1_DQ41
AK4
DDR0_DQ58/DDR1_DQ42
AH2
DDR0_DQ59/DDR1_DQ43
AH4
DDR0_DQ60/DDR1_DQ44
AK2
DDR0_DQ61/DDR1_DQ45
AH3
DDR0_DQ62/DDR1_DQ46
AK1
DDR0_DQ63/DDR1_DQ47
AU33
DDR0_ECC0
AT33
DDR0_ECC1
AW33
DDR0_ECC2
AV31
DDR0_ECC3
AU31
DDR0_ECC4
AV33
DDR0_ECC5
AW31
DDR0_ECC6
AY31
DDR0_ECC7
3
SKYLAKE
SKYLAKE
LGA1151
LGA1151
DDR0_BA0/DDR0_CAB4/DDR0_BA0
DDR0_BA1/DDR0_CAB6/DDR0_BA1
DDR0_BA2/DDR0_CAA5/DDR0_BG0
DDR0_RAS#/DDR0_CAB3/DDR0_MA16
DDR0_WE#/DDR0_CAB2/DDR0_MA14
DDR0_CAS#/DDR0_CAB1/DDR0_MA15
DDR0_MA0/DDR0_CAB9/DDR0_MA0
DDR0_MA1/DDR0_CAB8/DDR0_MA1
DDR0_MA2/DDR0_CAB5/DDR0_MA2
DDR0_MA5/DDR0_CAA0/DDR0_MA5
DDR0_MA6/DDR0_CAA2/DDR0_MA6
DDR0_MA7/DDR0_CAA4/DDR0_MA7
DDR0_MA8/DDR0_CAA3/DDR0_MA8
DDR0_MA9/DDR0_CAA1/DDR0_MA9
DDR0_MA10/DDR0_CAB7/DDR0_MA10
DDR0_MA11/DDR0_CAA7/DDR0_MA11
DDR0_MA12/DDR0_CAA6/DDR0_MA12
DDR0_MA13/DDR0_CAB0/DDR0_MA13
DDR0_MA14/DDR0_CAA9/DDR0_BG1
DDR0_MA15/DDR0_CAA8/DDR0_ACT#
DDR0_DQSN2/DDR0_DQSN4
DDR0_DQSN3/DDR0_DQSN5
DDR0_DQSN4/DDR1_DQSN0
DDR0_DQSN5/DDR1_DQSN1
DDR0_DQSN6/DDR1_DQSN4
DDR0_DQSN7/DDR1_DQSN5
DDR0_DQSP2/DDR0_DQSP4
DDR0_DQSP3/DDR0_DQSP5
DDR0_DQSP4/DDR1_DQSP0
DDR0_DQSP5/DDR1_DQSP1
DDR0_DQSP6/DDR1_DQSP4
DDR0_DQSP7/DDR1_DQSP5
1 OF 12
1 OF 12
DDR0_CKP0
DDR0_CKN0
DDR0_CKP1
DDR0_CKN1
DDR0_CKP2
DDR0_CKN2
DDR0_CKP3
DDR0_CKN3
DDR0_CKE0
DDR0_CKE1
DDR0_CKE2
DDR0_CKE3
DDR0_CS#0
DDR0_CS#1
DDR0_CS#2
DDR0_CS#3
DDR0_ODT0
DDR0_ODT1
DDR0_ODT2
DDR0_ODT3
DDR0_MA3
DDR0_MA4
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN0
DDR0_DQSN1
DDR0_DQSP0
DDR0_DQSP1
DDR0_DQSP8
DDR0_DQSN8
AW18
AV18
AW17
AY17
AW16
AV16
AT16
AU16
AY24
AW24
AV24
AV25
AW12
AU11
AV13
AV10
AW11
AU14
AU12
AY10
AY13
AV15
AW23
AW13
AV14
AY11
AW15
AU18
AU17
AV19
AT19
AU20
AV20
AU21
AT20
AT22
AY14
AU22
AV22
AV12
AV23
AU24
AY15
AT23
AF39
AK39
AP39
AU36
AW7
AU3
AN3
AJ3
AF38
AK38
AP38
AV36
AV7
AU2
AN2
AJ2
AV32
AU32
M_A_CLK0
M_A_CLK#0
M_A_CLK1
M_A_CLK#1
M_A_CLK2
M_A_CLK#2
M_A_CLK3
M_A_CLK#3
M_A_CKE0
M_A_CKE1
M_A_CKE2
M_A_CKE3
M_A_CS#0
M_A_CS#1
M_A_CS#2
M_A_CS#3
M_A_ODT0
M_A_ODT1
M_A_ODT2
M_A_ODT3
M_BA_A_0
M_BA_A_1
M_BG_A_0
M_A_A16
M_A_A14
M_A_A15
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_BG_A_1
M_ACT_A_N
M_PARITY_A
M_ALERT_A_N
M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7
M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7
2
1
DDR CHANNEL A
DDR CHANNEL A
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
A A
5
4
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Title
Title
Title
CPU_(DDR_CHA)
CPU_(DDR_CHA)
CPU_(DDR_CHA)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Hsichih, Taipei Hsien
1
-1
-1
5 107 Wednesday, September 23, 2015
5 107 Wednesday, September 23, 2015
5 107 Wednesday, September 23, 2015
-1
5
4
3
2
1
D D
C C
B B
M_B_A[0..16] 11,13
M_DATA_B[0..63] 11,13
M_B_DQS_DN[0..7] 11,13
M_B_DQS_DP[0..7] 11,13
M_B_CLK0 13
M_B_CLK#0 13
M_B_CLK1 13
M_B_CLK#1 13
M_B_CLK2 11
M_B_CLK#2 11
M_B_CLK3 11
M_B_CLK#3 11
M_B_CKE0 13
M_B_CKE1 13
M_B_CKE2 11
M_B_CKE3 11
M_B_CS#0 13
M_B_CS#1 13
M_B_CS#2 11
M_B_CS#3 11
M_B_ODT0 13
M_B_ODT1 13
M_B_ODT2 11
M_B_ODT3 11
M_BA_B_0 11,13
M_BA_B_1 11,13
M_BG_B_0 11,13
M_BG_B_1 11,13
M_ACT_B_N 11,13
M_PARITY_B 11,13
M_ALERT_B_N 11,13
DIMM_CA_CPU_VREF_A 12
M_VREF_DQ_DIM1 11
M_DATA_B4
M_DATA_B5
M_DATA_B7
M_DATA_B3
M_DATA_B1
M_DATA_B0
M_DATA_B6
M_DATA_B2
M_DATA_B13
M_DATA_B9
M_DATA_B14
M_DATA_B15
M_DATA_B12
M_DATA_B8
M_DATA_B10
M_DATA_B11
M_DATA_B16
M_DATA_B20
M_DATA_B22
M_DATA_B23
M_DATA_B17
M_DATA_B21
M_DATA_B18
M_DATA_B19
M_DATA_B28
M_DATA_B24
M_DATA_B30
M_DATA_B26
M_DATA_B25
M_DATA_B29
M_DATA_B27
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B38
M_DATA_B34
M_DATA_B36
M_DATA_B37
M_DATA_B39
M_DATA_B35
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B42
M_DATA_B41
M_DATA_B40
M_DATA_B47
M_DATA_B43
M_DATA_B52
M_DATA_B53
M_DATA_B55
M_DATA_B51
M_DATA_B48
M_DATA_B49
M_DATA_B54
M_DATA_B50
M_DATA_B61
M_DATA_B56
M_DATA_B63
M_DATA_B58
M_DATA_B60
M_DATA_B57
M_DATA_B59
M_DATA_B62
CPU1B
CPU1B
AD34
DDR1_DQ0/DDR0_DQ16
AD35
DDR1_DQ1/DDR0_DQ17
AG35
DDR1_DQ2/DDR0_DQ18
AH35
DDR1_DQ3/DDR0_DQ19
AE35
DDR1_DQ4/DDR0_DQ20
AE34
DDR1_DQ5/DDR0_DQ21
AG34
DDR1_DQ6/DDR0_DQ22
AH34
DDR1_DQ7/DDR0_DQ23
AK35
DDR1_DQ8/DDR0_DQ24
AL35
DDR1_DQ9/DDR0_DQ25
AK32
DDR1_DQ10/DDR0_DQ26
AL32
DDR1_DQ11/DDR0_DQ27
AK34
DDR1_DQ12/DDR0_DQ28
AL34
DDR1_DQ13/DDR0_DQ29
AK31
DDR1_DQ14/DDR0_DQ30
AL31
DDR1_DQ15/DDR0_DQ31
AP35
DDR1_DQ16/DDR0_DQ48
AN35
DDR1_DQ17/DDR0_DQ49
AN32
DDR1_DQ18/DDR0_DQ50
AP32
DDR1_DQ19/DDR0_DQ51
AN34
DDR1_DQ20/DDR0_DQ52
AP34
DDR1_DQ21/DDR0_DQ53
AN31
DDR1_DQ22/DDR0_DQ54
AP31
DDR1_DQ23/DDR0_DQ55
AL29
DDR1_DQ24/DDR0_DQ56
AM29
DDR1_DQ25/DDR0_DQ57
AP29
DDR1_DQ26/DDR0_DQ58
AR29
DDR1_DQ27/DDR0_DQ59
AM28
DDR1_DQ28/DDR0_DQ60
AL28
DDR1_DQ29/DDR0_DQ61
AR28
DDR1_DQ30/DDR0_DQ62
AP28
DDR1_DQ31/DDR0_DQ63
AR12
DDR1_DQ32/DDR1_DQ16
AP12
DDR1_DQ33/DDR1_DQ17
AM13
DDR1_DQ34/DDR1_DQ18
AL13
DDR1_DQ35/DDR1_DQ19
AR13
DDR1_DQ36/DDR1_DQ20
AP13
DDR1_DQ37/DDR1_DQ21
AM12
DDR1_DQ38/DDR1_DQ22
AL12
DDR1_DQ39/DDR1_DQ23
AP10
DDR1_DQ40/DDR1_DQ24
AR10
DDR1_DQ41/DDR1_DQ25
AR7
DDR1_DQ42/DDR1_DQ26
AP7
DDR1_DQ43/DDR1_DQ27
AR9
DDR1_DQ44/DDR1_DQ28
AP9
DDR1_DQ45/DDR1_DQ29
AR6
DDR1_DQ46/DDR1_DQ30
AP6
DDR1_DQ47/DDR1_DQ31
AM10
DDR1_DQ48
AL10
DDR1_DQ49
AM7
DDR1_DQ50
AL7
DDR1_DQ51
AM9
DDR1_DQ52
AL9
DDR1_DQ53
AM6
DDR1_DQ54
AL6
DDR1_DQ55
AJ6
DDR1_DQ56
AJ7
DDR1_DQ57
AE6
DDR1_DQ58
AF7
DDR1_DQ59
AH7
DDR1_DQ60
AH6
DDR1_DQ61
AE7
DDR1_DQ62
AF6
DDR1_DQ63
AR25
DDR1_ECC0
AR26
DDR1_ECC1
AM26
DDR1_ECC2
AM25
DDR1_ECC3
AP26
DDR1_ECC4
AP25
DDR1_ECC5
AL25
DDR1_ECC6
AL26
DDR1_ECC7
DDR CHANNEL B
DDR CHANNEL B
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
SKYLAKE
SKYLAKE
LGA1151
LGA1151
DDR1_RAS#/DDR1_CAB3/DDR1_MA16
DDR1_WE#/DDR1_CAB2/DDR1_MA14
DDR1_CAS#/DDR1_CAB1/DDR1_MA15
DDR1_BA0/DDR1_CAB4/DDR1_BA0
DDR1_BA1/DDR1_CAB6/DDR1_BA1
DDR1_BA2/DDR1_CAA5/DDR1_BG0
DDR1_MA0/DDR1_CAB9/DDR1_MA0
DDR1_MA1/DDR1_CAB8/DDR1_MA1
DDR1_MA2/DDR1_CAB5/DDR1_MA2
DDR1_MA5/DDR1_CAA0/DDR1_MA5
DDR1_MA6/DDR1_CAA2/DDR1_MA6
DDR1_MA7/DDR1_CAA4/DDR1_MA7
DDR1_MA8/DDR1_CAA3/DDR1_MA8
DDR1_MA9/DDR1_CAA1/DDR1_MA9
DDR1_MA10/DDR1_CAB7/DDR1_MA10
DDR1_MA11/DDR1_CAA7/DDR1_MA11
DDR1_MA12/DDR1_CAA6/DDR1_MA12
DDR1_MA13/DDR1_CAB0/DDR1_MA13
DDR1_MA14/DDR1_CAA9/DDR1_BG1
DDR1_MA15/DDR1_CAA8/DDR1_ACT#
DDR1_DQSN0/DDR0_DQSN2
DDR1_DQSN1/DDR0_DQSN3
DDR1_DQSN2/DDR0_DQSN6
DDR1_DQSN3/DDR0_DQSN7
DDR1_DQSN4/DDR1_DQSN2
DDR1_DQSN5/DDR1_DQSN3
DDR1_DQSP0/DDR0_DQSP2
DDR1_DQSP1/DDR0_DQSP3
DDR1_DQSP2/DDR0_DQSP6
DDR1_DQSP3/DDR0_DQSP7
DDR1_DQSP4/DDR1_DQSP2
DDR1_DQSP5/DDR1_DQSP3
2 OF 12
2 OF 12
DDR1_CKP0
DDR1_CKN0
DDR1_CKP1
DDR1_CKN1
DDR1_CKP2
DDR1_CKN2
DDR1_CKP3
DDR1_CKN3
DDR1_CKE0
DDR1_CKE1
DDR1_CKE2
DDR1_CKE3
DDR1_CS#0
DDR1_CS#1
DDR1_CS#2
DDR1_CS#3
DDR1_ODT0
DDR1_ODT1
DDR1_ODT2
DDR1_ODT3
DDR1_MA3
DDR1_MA4
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN6
DDR1_DQSN7
DDR1_DQSP6
DDR1_DQSP7
DDR1_DQSP8
DDR1_DQSN8
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
AM20
AM21
AP22
AP21
AN20
AN21
AP19
AP20
AY29
AV29
AW29
AU29
AP17
AN15
AN17
AM15
AM16
AL16
AP15
AL15
AN18
AL17
AP16
AL18
AM18
AW28
AL19
AL22
AM22
AM23
AP23
AL23
AW26
AY26
AU26
AW27
AP18
AU27
AV27
AR15
AY28
AU28
AL20
AY25
AF34
AK33
AN33
AN29
AN13
AR8
AM8
AG6
AF35
AL33
AP33
AN28
AN12
AP8
AL8
AG7
AN25
AN26
AB40
AC40
AC39
M_B_CLK0
M_B_CLK#0
M_B_CLK1
M_B_CLK#1
M_B_CLK2
M_B_CLK#2
M_B_CLK3
M_B_CLK#3
M_B_CKE0
M_B_CKE1
M_B_CKE2
M_B_CKE3
M_B_CS#0
M_B_CS#1
M_B_CS#2
M_B_CS#3
M_B_ODT0
M_B_ODT1
M_B_ODT2
M_B_ODT3
M_B_A16
M_B_A14
M_B_A15
M_BA_B_0
M_BA_B_1
M_BG_B_0
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_BG_B_1
M_ACT_B_N
M_PARITY_B
M_ALERT_B_N
M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7
M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7
DIMM_CA_CPU_VREF_A
TP_DIMM_DQ0
M_VREF_DQ_DIM1
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CPU (DDR_CHB)
CPU (DDR_CHB)
CPU (DDR_CHB)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
6 107 Wednesday, September 23, 2015
6 107 Wednesday, September 23, 2015
6 107 Wednesday, September 23, 2015
1
-1
-1
-1
5
4
3
2
1
D D
DP_DATA_CPU_P0 57
DP_DATA_CPU_N0 57
DP_DATA_CPU_P1 57
DP_DATA_CPU_N1 57
DP_DATA_CPU_P2 57
DP_DATA_CPU_N2 57
DP_DATA_CPU_P3 57
DP_DATA_CPU_N3 57
DP_AUX_CPU_P 57
DP_AUX_CPU_N 57
DP2_DATA_CPU_P0 56
DP2_DATA_CPU_N0 56
DP2_DATA_CPU_P1 56
DP2_DATA_CPU_N1 56
DP2_DATA_CPU_P2 56
DP2_DATA_CPU_N2 56
DP2_DATA_CPU_P3 56
DP2_DATA_CPU_N3 56
C C
B B
DP2_AUX_CPU_P 56
DP2_AUX_CPU_N 56
DVI_DATA_CPU_P0 55
DVI_DATA_CPU_N0 55
DVI_DATA_CPU_P1 55
DVI_DATA_CPU_N1 55
DVI_DATA_CPU_P2 55
DVI_DATA_CPU_N2 55
DVI_DATA_CPU_P3 55
DVI_DATA_CPU_N3 55
DDI_VGA_DATA_CPU_N0 58
DDI_VGA_DATA_CPU_P0 58
DDI_VGA_DATA_CPU_N1 58
DDI_VGA_DATA_CPU_P1 58
DDI_VGA_AUX_CPU_P 58
DDI_VGA_AUX_CPU_N 58
AUD_AZACPU_SCLK 20
AUD_AZACPU_SDO_R 20
AUD_AZACPU_CPU_SDI 20
FOR DP1
FOR DP2
FOR DVI-D
DP_DATA_CPU_P0
DP_DATA_CPU_N0
DP_DATA_CPU_P1
DP_DATA_CPU_N1
DP_DATA_CPU_P2
DP_DATA_CPU_N2
DP_DATA_CPU_P3
DP_DATA_CPU_N3
DP_AUX_CPU_P
DP_AUX_CPU_N
DP2_DATA_CPU_P0
DP2_DATA_CPU_N0
DP2_DATA_CPU_P1
DP2_DATA_CPU_N1
DP2_DATA_CPU_P2
DP2_DATA_CPU_N2
DP2_DATA_CPU_P3
DP2_DATA_CPU_N3
DP2_AUX_CPU_P
DP2_AUX_CPU_N
DVI_DATA_CPU_P0
DVI_DATA_CPU_N0
DVI_DATA_CPU_P1
DVI_DATA_CPU_N1
DVI_DATA_CPU_P2
DVI_DATA_CPU_N2
DVI_DATA_CPU_P3
DVI_DATA_CPU_N3
CPU1D
CPU1D
C21
DDI1_TXP0
D21
DDI1_TXN0
D22
DDI1_TXP1
E22
DDI1_TXN1
B23
DDI1_TXP2
A23
DDI1_TXN2
C23
DDI1_TXP3
D23
DDI1_TXN3
B13
DDI1_AUXP
C13
DDI1_AUXN
B18
DDI2_TXP0
A18
DDI2_TXN0
D18
DDI2_TXP1
E18
DDI2_TXN1
C19
DDI2_TXP2
D19
DDI2_TXN2
D20
DDI2_TXP3
E20
DDI2_TXN3
A12
DDI2_AUXP
B12
DDI2_AUXN
B14
DDI3_TXP0
A14
DDI3_TXN0
C15
DDI3_TXP1
B15
DDI3_TXN1
B16
DDI3_TXP2
A16
DDI3_TXN2
C17
DDI3_TXP3
B17
DDI3_TXN3
B11
DDI3_AUXP
C11
DDI3_AUXN
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
SKYLAKE
SKYLAKE
LGA1151
LGA1151
4 OF 12
4 OF 12
EDP_TXP0
EDP_TXN0
EDP_TXP1
EDP_TXN1
EDP_TXN2
EDP_TXP2
EDP_TXN3
EDP_TXP3
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
VBIOS set as DP
E10
D10
D9
C9
H10
G10
G9
F9
D12
E12
D14
M9
V3
V2
U1
DDI_VGA_DATA_CPU_N0
DDI_VGA_DATA_CPU_P0
DDI_VGA_DATA_CPU_N1
DDI_VGA_DATA_CPU_P1
DDI_VGA_AUX_CPU_P
DDI_VGA_AUX_CPU_N
eDP_RCOMP_CPU
AUD_AZACPU_SCLK
AUD_AZACPU_SDO_R
AUD_AZACPU_CPU_SDI
R703
R703
1 2
24D9R2F-L-GP
24D9R2F-L-GP
CAD NOTE:
PLACE RA INSIDE CPU CAVITY
FOR DP TO VGA
VCC_IO
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Title
Title
Title
CPU (DDI/EDP)
CPU (DDI/EDP)
CPU (DDI/EDP)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
Hsichih, Taipei Hsien
1
7 107 Wednesday, September 23, 2015
7 107 Wednesday, September 23, 2015
7 107 Wednesday, September 23, 2015
-1
-1
-1
5
VCCGT_SENSE 46
VSSGT_SENSE 46
VCCCORE_SENSE 46
VSSCORE_SENSE 46
VCCSA_SENSE 52
VCCIO_SENSE 53
VSS_VCCSA_SSENSE 52
D D
C C
B B
VSS_VCCIO_SSENSE 53
SLP_S4_N 20,24,42,44
VCC_CORE
CPU1G
CPU1G
A25
VCC_A25
A26
VCC_A26
A27
VCC_A27
A28
VCC_A28
A29
VCC_A29
A30
VCC_A30
B25
VCC_B25
B27
VCC_B27
B29
VCC_B29
B31
VCC_B31
B32
VCC_B32
B33
VCC_B33
B34
VCC_B34
B35
VCC_B35
B36
VCC_B36
B37
VCC_B37
C25
VCC_C25
C26
VCC_C26
C27
VCC_C27
C28
VCC_C28
C29
VCC_C29
C30
VCC_C30
C32
VCC_C32
C34
VCC_C34
C36
VCC_C36
D25
VCC_D25
D27
VCC_D27
D29
VCC_D29
D31
VCC_D31
D32
VCC_D32
D33
VCC_D33
D34
VCC_D34
D35
VCC_D35
D36
VCC_D36
E24
VCC_E24
E25
VCC_E25
E26
VCC_E26
E27
VCC_E27
E28
VCC_E28
E29
VCC_E29
E30
VCC_E30
E32
VCC_E32
E34
VCC_E34
E36
VCC_E36
F23
VCC_F23
F24
VCC_F24
F25
VCC_F25
F27
VCC_F27
F29
VCC_F29
F31
VCC_F31
G30
VCC_G30
G32
VCC_G32
H22
VCC_H22
H23
VCC_H23
H25
VCC_H25
H27
VCC_H27
H29
VCC_H29
H31
VCC_H31
AJ11
VCC_AJ11
AJ13
VCC_AJ13
AJ15
VCC_AJ15
AJ17
VCC_AJ17
AJ19
VCC_AJ19
AJ21
VCC_AJ21
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
SKYLAKE
SKYLAKE
LGA1151
LGA1151
VCC_H32
VCC_J21
VCC_F32
VCC_F33
VCC_F34
VCC_G23
VCC_G24
VCC_G25
VCC_G26
VCC_G27
VCC_G28
VCC_G29
VCC_J22
VCC_J23
VCC_J24
VCC_J25
VCC_J26
VCC_J27
VCC_J28
VCC_J29
VCC_J30
VCC_J31
VCC_K16
VCC_K18
VCC_K20
VCC_K21
VCC_K23
VCC_K25
VCC_K27
VCC_K29
VCC_K31
VCC_L14
VCC_L15
VCC_L16
VCC_L17
VCC_L18
VCC_L19
VCC_L20
VCC_L21
VCC_L22
VCC_L23
VCC_L24
VCC_L25
VCC_L26
VCC_L27
VCC_L28
VCC_L29
VCC_L30
VCC_M13
VCC_M14
VCC_M16
VCC_M18
VCC_M20
VCC_M22
VCC_M24
VCC_M26
VCC_M28
VCC_M30
VCC_AJ12
VCC_AJ14
VCC_AJ16
VCC_AJ18
VCC_AJ20
VCC_AJ22
VCC_SENSE
VSS_SENSE
7 OF 12
7 OF 12
H32
J21
F32
F33
F34
G23
G24
G25
G26
G27
G28
G29
J22
J23
J24
J25
J26
J27
J28
J29
J30
J31
K16
K18
K20
K21
K23
K25
K27
K29
K31
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
M13
M14
M16
M18
M20
M22
M24
M26
M28
M30
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
C38
D38
4
VCC_CORE GFX_CORE
VCCCORE_SENSE
VSSCORE_SENSE
CPU1H
CPU1H
SKYLAKE
SKYLAKE
AA34
VCCGT
AA35
VCCGT
AA36
VCCGT
AA37
VCCGT
AA38
VCCGT
AB33
VCCGT
AB34
VCCGT
G36
VCCGT
G37
VCCGT
G38
VCCGT
G39
VCCGT
G40
VCCGT
H36
VCCGT
H38
VCCGT
H40
VCCGT
J36
VCCGT
J37
VCCGT
J38
VCCGT
J39
VCCGT
J40
VCCGT
K36
VCCGT
K38
VCCGT
K40
VCCGT
L34
VCCGT
L35
VCCGT
L36
VCCGT
L37
VCCGT
L38
VCCGT
L39
VCCGT
L40
VCCGT
M33
VCCGT
M34
VCCGT
M36
VCCGT
M38
VCCGT
M40
VCCGT
N34
VCCGT
N35
VCCGT
N36
VCCGT
N37
VCCGT
N38
VCCGT
N39
VCCGT
N40
VCCGT
P33
VCCGT
P34
VCCGT
P36
VCCGT
P38
VCCGT
P40
VCCGT
R34
VCCGT
R35
VCCGT
R36
VCCGT
R37
VCCGT
R38
VCCGT
R39
VCCGT
R40
VCCGT
T33
VCCGT
T34
VCCGT
T36
VCCGT
T38
VCCGT
T40
VCCGT
U34
VCCGT
U35
VCCGT
U36
VCCGT
U37
VCCGT
U38
VCCGT
U39
VCCGT
U40
VCCGT
V33
VCCGT
V34
VCCGT
V36
VCCGT
V38
VCCGT
V40
VCCGT
W34
VCCGT
W35
VCCGT
W36
VCCGT
W37
VCCGT
W38
VCCGT
Y33
VCCGT
Y34
VCCGT
Y36
VCCGT
Y38
VCCGT
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
LGA1151
LGA1151
VCCGTX_SENSE
VSSGTX_SENSE
VCCGTX_F35
VCCGTX_G34
VCCGTX_G35
VCCGTX_H33
VCCGTX_H34
VCCGTX_J33
VCCGTX_J35
VCCGTX_K32
VCCGTX_K34
VCCGTX_L31
VCCGTX_L33
VCCGTX_M32
VCCGT_SENSE
VSSGT_SENSE
8 OF 12
8 OF 12
FOR 4+4E CPU
F35
G34
G35
H33
H34
J33
J35
K32
K34
L31
L33
M32
F39
VCCGT_SENSE
F38
VSSGT_SENSE
F37
VCCGTX_SENSE
F36
VSSGTX_SENSE
3
VCC_GTX
R705 0R3J-0-U-GP(R_)R705 0R3J-0-U-GP(R_)
2
1 2
+VCCFUSEPRG
1V_VCCST_VCCPLL_S3
VCC_SA
VCC_IO
INTEL RECOMMAND
CPU1I
CPU1I
AA7
VCCSA
AB6
VCCSA
AB7
VCCSA
AB8
VCCSA
AC7
VCCSA
AC8
VCCSA
N7
VCCSA
P7
VCCSA
R7
VCCSA
T7
VCCSA
U7
VCCSA
Y6
VCCSA
Y7
VCCSA
Y8
VCCSA
W7
VCCSA
V7
VCCSA
AA6
VCCSA
AK11
VCCIO
AK14
VCCIO
AK24
VCCIO
AJ23
VCCIO
M8
VCCIO
P8
VCCIO
T8
VCCIO
U8
VCCIO
W8
VCCIO
V5
VCCST_V5
V6
VCCST_V6
V4
VCCPLL
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
SKYLAKE
SKYLAKE
LGA1151
LGA1151
VCC_OPC_1P8_AB37
VCC_OPC_1P8_AB38
VSS_SAIO_SENSE
VCCEOPIO_SENSE
VSSOPC_EOPIO_SENSE
VDDQ_AT18
VDDQ_AT21
VDDQ_AU13
VDDQ_AU15
VDDQ_AU19
VDDQ_AU23
VDDQ_AV11
VDDQ_AV17
VDDQ_AV21
VDDQ_AW10
VDDQ_AW14
VDDQ_AW25
VDDQ_AY12
VDDQ_AY16
VDDQ_AY18
VDDQ_AY23
VCCPLL_OC
VCCOPC_AJ30
VCCOPC_AJ27
VCCOPC_AJ28
VCCOPC_AJ29
VCCOPC_AK27
VCCEOPIO
VCCEOPIO
VCCSA_SENSE
VCCIO_SENSE
VCCOPC_SENSE
9 OF 12
9 OF 12
AT18
AT21
AU13
AU15
AU19
AU23
AV11
AV17
AV21
AW10
AW14
AW25
AY12
AY16
AY18
AY23
AJ9
AJ30
AJ27
AJ28
AJ29
AK27
AJ25
AJ26
AB37
AB38
AD5
AF4
AE4
AK21
AJ24
AK22
VCCPLL_OC
FOR 4+4E CPU
VCC_OPC
VCC_EOPIO
VCC_OPC_1P8_AB37
VCC_OPC_1P8_AB38
VCCSA_SENSE
VCCIO_SENSE
VSS_SENSE
TP_VCCOPC_SENSE
TP_VCCEOPIO_SENSE
TP_VSSOPC_EOPIO_SENSE
FOR 4+4E CPU
VDDQ
R701 0R0603-PAD R701 0R0603-PAD
R706 0R3J-0-U-GP(R_)R706 0R3J-0-U-GP(R_)
R707 0R3J-0-U-GP(R_)R707 0R3J-0-U-GP(R_)
VDDQ
1 2
1 2
1 2
1 2
R5213 0R0402-PAD-2-GP R5213 0R0402-PAD-2-GP
1 2
R5214 0R0402-PAD-2-GP R5214 0R0402-PAD-2-GP
1
VSS_VCCSA_SSENSE
VSS_VCCIO_SSENSE
+5V_AUX1 +5V_AUX1
1 2
R77
R77
100KR2J-1-GP
100KR2J-1-GP
Q1
Q1
23 45
1
SLP_S4_N_SFR_1
SLP_S4_N SLP_S4_N_SFR
A A
5
4
1 2
R85 0R0402-PAD-2-GP R85 0R0402-PAD-2-GP
6
2N7002EDW-2-GP
2N7002EDW-2-GP
(75.27002.F7C)
(75.27002.F7C)
12
C803
SCD1U25V3KX-GP
SCD1U25V3KX-GP
3
1 2
R78
R78
47KR2J-2-GP
47KR2J-2-GP
R84
R84
1 2
SLP_S4_N_SFR_G SLP_S4_N_SFR_2
10KR2J-3-GP
10KR2J-3-GP
12
12
C802
C802
SCD1U25V2KX-GP
SCD1U25V2KX-GP
VCC_CORE
R73
0R2J-2-GP
(R_)C803
(R_)
1V_VCCST_VCCPLL_S3
0R2J-2-GP
R76 0R0402-PAD-2-GP R76 0R0402-PAD-2-GP
C801
(R_)C801
(R_)
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1 2
(R_)R73
(R_)
1 2
1D0V_S5
D S
G
V_CPU_ST_PLL_R
2
Q2
Q2
AO3418L-GP
AO3418L-GP
(84.03418.A31)
(84.03418.A31)
1 2
R83
4K7R2J-2-GP
4K7R2J-2-GP
(R_)R83
(R_)
R704 0R3J-0-U-GP(R_)R704 0R3J-0-U-GP(R_)
1 2
+VCCFUSEPRG
1V_VCCST_VCCPLL_S3
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CPU (CPU Power)
CPU (CPU Power)
CPU (CPU Power)
S
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
8 107 Wednesday, September 23, 2015
8 107 Wednesday, September 23, 2015
8 107 Wednesday, September 23, 2015
-1
-1
-1
5
PROC_TRIGIN_CPU 21
PROC_TRIGOUT_PCH 21
D D
A11
A13
A15
A17
A24
A7
AA3
AA33
AA8
AB39
AB5
AC3
AC33
AC34
AC35
AC6
AD1
AD33
AD36
AD37
AD38
AD39
AD4
AD40
AD6
AD7
AD8
AE3
AE33
AE36
AE5
AE8
AF1
C C
B B
AF33
AF36
AF37
AF40
AG33
AG36
AH33
AH36
AH37
AH38
AH39
AH40
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK10
AK12
AK13
AK15
AK16
AK17
AK18
AK19
AK20
AK23
AK25
AK26
AK28
AF5
AF8
AG1
AG2
AG3
AG4
AG5
AG8
AH5
AH8
AJ1
AJ4
AJ5
AJ8
6 OF 12
6 OF 12
CPU1F
CPU1F
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
SKYLAKE
SKYLAKE
LGA1151
LGA1151
AK29
VSS
AK30
VSS
AK36
VSS
AK37
VSS
AK40
VSS
AK5
VSS
AK6
VSS
AK7
VSS
AK8
VSS
AK9
VSS
AL1
VSS
AL11
VSS
AL14
VSS
AL2
VSS
AL21
VSS
AL24
VSS
AL27
VSS
AL3
VSS
AL30
VSS
AL36
VSS
AL4
VSS
AL5
VSS
AM11
VSS
AM14
VSS
AM17
VSS
AM19
VSS
AM24
VSS
AM27
VSS
AM30
VSS
AM31
VSS
AM32
VSS
AM33
VSS
AM34
VSS
AM35
VSS
AM36
VSS
AM37
VSS
AM38
VSS
AM39
VSS
AM40
VSS
AM5
VSS
AN1
VSS
AN10
VSS
AN11
VSS
AN14
VSS
AN16
VSS
AN19
VSS
AN22
VSS
AN23
VSS
AN24
VSS
AN27
VSS
AN30
VSS
AN36
VSS
AN4
VSS
AN5
VSS
AN6
VSS
AN7
VSS
AN8
VSS
AN9
VSS
AP11
VSS
AP14
VSS
AP24
VSS
AP27
VSS
AP30
VSS
AP36
VSS
AP37
VSS
AP40
VSS
AP5
VSS
AR1
VSS
AR11
VSS
AR14
VSS
AR16
VSS
AR17
VSS
AR18
VSS
AR19
VSS
AR2
VSS
AR20
VSS
AR21
VSS
4
CPU1K
CPU1K
AR24
VSS
AR27
VSS
AR3
VSS
AR30
VSS
AR31
VSS
AR32
VSS
AR33
VSS
AR34
VSS
AR35
VSS
AR36
VSS
AR4
VSS
AR5
VSS
AT10
VSS
AT11
VSS
AT12
VSS
AT13
VSS
AT14
VSS
AT17
VSS
AT24
VSS
AT25
VSS
AT26
VSS
AT27
VSS
AT28
VSS
AT29
VSS
AT30
VSS
AT31
VSS
AT32
VSS
AT34
VSS
AT36
VSS
AT37
VSS
AT38
VSS
AT39
VSS
AT40
VSS
AT5
VSS
AT6
VSS
AT7
VSS
AT8
VSS
AT9
VSS
AU1
VSS
AU25
VSS
AU30
VSS
AU34
VSS
AU4
VSS
AU5
VSS
AU7
VSS
AV2
VSS
AV26
VSS
AV28
VSS
AV30
VSS
AV34
VSS
AV38
VSS
AV5
VSS
AV9
VSS
AW3
VSS
AW30
VSS
AW32
VSS
AW34
VSS
AW36
VSS
AW5
VSS
AW9
VSS
AY27
VSS
AY30
VSS
AY5
VSS
AY7
VSS
AY9
VSS
B24
VSS
B26
VSS
B28
VSS
B30
VSS
B6
VSS
C12
VSS
C14
VSS
C16
VSS
C18
VSS
C20
VSS
C22
VSS
C24
VSS
C31
VSS
C33
VSS
C35
VSS
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
SKYLAKE
SKYLAKE
LGA1151
LGA1151
11 OF 12
11 OF 12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3
12 OF 12
12 OF 12
CPU1L
C37
C5
C8
C10
D24
D26
D28
D30
D37
D39
D4
D7
E11
E13
E15
E17
E19
E21
E23
E3
E31
E33
E35
E37
E6
E9
F1
F10
F22
F26
F28
F30
F4
F40
F7
G11
G13
G15
G17
G19
G22
G3
G31
G33
G6
H1
H21
H24
H26
H28
H30
H35
H37
H39
H4
H7
H9
J10
J12
L11
J16
J18
J20
J3
J32
J34
J6
K1
K14
K15
K17
K19
K22
K24
K26
K28
K30
K33
K35
K37
CPU1L
SKYLAKE
SKYLAKE
K39
VSS
K4
VSS
K7
VSS
L13
VSS
L3
VSS
L32
VSS
L6
VSS
L9
VSS
M1
VSS
M10
VSS
M12
VSS
M15
VSS
LGA1151
LGA1151
M17
VSS
M19
VSS
M21
VSS
M23
VSS
M25
VSS
M27
VSS
M29
VSS
M35
VSS
M37
VSS
M39
VSS
M4
VSS
M7
VSS
N3
VSS
N33
VSS
N6
VSS
N8
VSS
P1
VSS
P35
VSS
P37
VSS
P39
VSS
P4
VSS
R3
VSS
R33
VSS
R6
VSS
R8
VSS
T1
VSS
T35
VSS
T37
VSS
T39
VSS
T4
VSS
U3
VSS
U33
VSS
U6
VSS
V1
VSS
V35
VSS
V37
VSS
V39
VSS
V8
VSS
W3
VSS
W33
VSS
W6
VSS
Y35
VSS
Y37
VSS
Y5
VSS
A4
VSS_NCTF
B38
VSS_NCTF
C2
VSS_NCTF
D40
VSS_NCTF
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
PROC_TRIGOUT_PCH
R902
R902
20R2J-3-GP
20R2J-3-GP
1 2
2
TP_CPU_J8
TP_CPU_J7
TP_CPU_L8
TP_CPU_K8
TP_CPU_AV1
TP_CPU_AW2
PROC_TRIGIN_CPU
PROC_TRIGOUT_CPU
TP_CPU_L12
TP_CPU_K12
CPU1J
CPU1J
J8
RSVD_TP_J8
J7
RSVD_TP_J7
L8
RSVD_TP_L8
K8
RSVD_TP_K8
AV1
RSVD_TP_AV1
AW2
RSVD_TP_AW2
H8
RSVD_H8
K10
RSVD_K10
L10
RSVD_L10
J17
RSVD_J17
B39
RSVD_B39
J19
RSVD_J19
C40
RSVD_C40
G8
RSVD_G8
AY3
RSVD_AY3
D1
PROC_TRIGIN
B3
PROC_TRIGOUT
L12
RSVD_L12
K12
RSVD_K12
SKYLAKE-1
SKYLAKE-1
FOXCONN: 062.10015.0081
LOTES: 062.10015.0111
SKYLAKE
SKYLAKE
LGA1151
LGA1151
10 OF 12
10 OF 12
RSVD_TP_H11
RSVD_TP_H12
RSVD_TP_AW38
RSVD_TP_AV39
RSVD_AU39
RSVD_AU40
VSS_AT15
VSS_AR23
VSS_AR22
RSVD_J15
RSVD_J14
RSVD_AU9
RSVD_AU10
RSVD_J13
RSVD_K13
RSVD_J11
RSVD_D15
RSVD_K11
H11
H12
AW38
AV39
AU39
AU40
AT15
AR23
AR22
J15
J14
AU9
AU10
J13
K13
J11
D15
K11
1
TP_CPU_H11
TP_CPU_H12
TP_CPU_AW38
TP_CPU_AV39
TP_CPU_AU39
TP_CPU_AU40
TP_CPU_K13
1 2
R901
R901
560_5%
560_5%
0402
0402
(R_)
(R_)
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CPU (VSS)
CPU (VSS)
CPU (VSS)
S
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
9 107 Wednesday, September 23, 2015
9 107 Wednesday, September 23, 2015
9 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
VCC_CORE
1 2
D D
1 2
PLACE ALL CAPS INSIDE CPU SOCKET CAVITY ON TOPSIDE
VCC_SA
1 2
C1091
C1091
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
C C
VDDQ
1 2
C1093
C1093
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
C1092
C1092
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
VDDQ
CAPS FOR DIMM
1 2
C1050
C1050
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PLACE ALL CAPS SOCKET EDGE TOP
1 2
C1094
C1094
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
C1051
C1051
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1095
C1095
VCC_SA
1 2
C1097
C1097
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
1 2
C1099
C1099
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
C1052
C1052
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C1096
C1096
(R_)
(R_)
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1098
C1098
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
C1053
C1053
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VCC_CORE
1 2
C1037
C1037
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
CAD NOTE:
PLACE ALL ABOVE CAPS
ON TOP SIDE OF CPU CAVITY
GFX_CORE
1 2
1 2
C1020
C1020
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1030
C1030
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
CAD NOTE:
PLACE ALL BELLOW CAPS
ON BOTTOM SIDE NEAR CPU SOCKET
1 2
C1038
C1038
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PLACE CAPS AT
SOCKET EDGE 6 ON TOP & 6 ON BOTTOM
C1075
C1075
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
1 2
C1025
C1025
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1031
C1031
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1039
C1039
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
1 2
C1070
C1070
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
1 2
C1026
C1026
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1032
C1032
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1040
C1040
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
C1027
C1027
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
C1033
C1033
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1041
C1041
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
1 2
C1028
C1028
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1034
C1034
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
(R_)
(R_)
1 2
C1042
C1042
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
VCC_CORE
GFX_CORE
1 2
C1064
C1064
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
(R_)
(R_)
1 2
1 2
VCC_CORE
1 2
C1004
C1004
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1014
C1014
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
CAD NOTE:
PLACE ALL ABOVE CAPS
ON TOP SIDE OF CPU CAVITY
1 2
C1043
C1043
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
CAD NOTE:
PLACE CAPS AT
TOP SOCKET EDGE
1 2
C1005
C1005
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1015
C1015
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1044
C1044
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1006
C1006
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1016
C1016
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1045
C1045
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C1007
C1007
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C1017
C1017
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1046
C1046
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PLACE CAPS ON BACKSIDE UNDER SOCKET CAVITY
1 2
C1065
C1065
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
(R_)
(R_)
1 2
C1067
C1067
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
(R_)
(R_)
1 2
C1059
C1059
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
(R_)
(R_)
1 2
C1008
C1008
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1018
C1018
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1047
C1047
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1062
C1062
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
(R_)
(R_)
1 2
C1009
C1009
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1019
C1019
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1063
C1063
SC47U6D3V5MX-1-GP
SC47U6D3V5MX-1-GP
(R_)
(R_)
B B
PLACE ALL CAPS INSIDE CPU SOCKET CAVITY ON TOPSIDE
VCC_IO
C1129
C1129
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
C1124
C1124
1 2
C1125
C1125
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
C1126
C1126
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
C1127
C1127
1 2
C1128
C1128
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
GFX_CORE
1 2
PLACE CAPS ON TOP SIDE
SOCKET CAVITY
C1077
C1077
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1081
C1081
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
GFX_CORE
1 2
C1088
C1088
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
1 2
C1089
C1089
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(R_)
(R_)
GFX_CORE
PLACE CAPS ON TOP SIDE
SOCKET CAVITY
1 2
C1056
C1056
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1054
C1054
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1058
C1058
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C1068
C1068
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PLACE ALL CAPS OUTSIDE CPU SOCKET CAVITY ON TOPSIDE
1V_VCCST_VCCPLL_S 3
C1048
C1048
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
5
1 2
C1049
C1049
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(78.1052 3.5FL)
(78.1052 3.5FL)
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CPU Power CAP
CPU Power CAP
CPU Power CAP
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
10 107 Wednesday, S eptember 23 , 2015
10 107 Wednesday, S eptember 23 , 2015
10 107 Wednesday, S eptember 23 , 2015
-1
-1
-1
1 2
A A
CAD NOTE:
PLACE CAPS AT
TOP SOCKET EDGE
5
4
3
2
1
CHANNEL B -- DIMM1
1 OF 4
1 OF 4
DIMM1A
DIMM1A
DIMM288_DDR4
DIMM288_DDR4
1/4
D D
C C
M_B_A[0..1 6] 6,13
M_DATA_ B[0..63] 6,13
M_B_DQS _DN[0..7] 6,13
M_B_DQS _DP[0..7] 6,13
M_BA_B_ 1 6,13
M_BA_B_ 0 6,13
M_BG_B_ 1 6,13
M_BG_B_ 0 6,13
M_B_CLK 3 6
M_B_CLK #3 6
M_B_CLK 2 6
M_B_CLK #2 6
M_B_CS# 3 6
M_B_CS# 2 6
M_B_CKE 3 6
M_B_CKE 2 6
M_PARIT Y_B 6,13
M_ALERT _B_N 6,13
M_ACT_B _N 6,13
M_B_ODT 3 6
M_B_ODT 2 6
SM_DRAMR ST#_R 12,13,14,20
SMB_DAT A_MAIN 1 2,13,14,2 0,59,93,9 4
SMB_CLK _MAIN 12,13 ,14,20,59 ,93,94
DIMM_CHB_V REF_C A 13
M_VREF_ DQ_DIM1 6
R31133 240R2 F-1-GP R31133 240R2 F-1-GP
VDDQ
SM_DRAMR ST#_R
1 2
3D3V_S 0
12
C2012
C2012
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
(R_)
(R_)
M_B_A16
M_B_A15
M_B_A14
M_B_A13
M_B_A12
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A7
M_B_A6
M_B_A5
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
M_BA_B_ 1
M_BA_B_ 0
M_BG_B_ 1
M_BG_B_ 0
M_B_CLK 3
M_B_CLK #3
M_B_CLK 2
M_B_CLK #2
M_B_CS# 3
M_B_CS# 2
M_B_CKE 3
M_B_CKE 2
M_B_ODT 3
M_B_ODT 2
M_PARIT Y_B
SM_DRAMR ST#_R
DIMM1_EV ENT_N
M_ALERT _B_N
M_ACT_B _N
SMB_DAT A_MAIN
SMB_CLK _MAIN
DIMM_CHB_V REF_C A
12
C1134
C1134
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
12
C15172
C15172
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
(R_)
(R_)
234
82
86
228
232
65
210
225
66
68
211
69
213
214
71
216
72
79
224
81
207
63
218
219
74
75
235
237
93
89
84
203
60
91
87
199
54
192
47
201
56
194
49
222
58
78
208
62
284
238
140
139
285
141
146
144
230
227
205
DDR4-28 8P-82-GP
DDR4-28 8P-82-GP
(022.100 10.0771 )
(022.100 10.0771 )
A17
A16_RAS#
A15_CAS#
A14_WE#
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA1
BA0
BG1
BG0
CK1
CK1#
CK0
CK0#
C2
S3#_C1
S2#_C0
S1#
S0#
CKE1
CKE0
ODT1
ODT0
CB7
CB6
CB5
CB4
CB3
CB2
CB1
CB0
PAR
RESET#
EVENT#
ALERT#
ACT#
VDDSPD
SA2
SA1
SA0
SDA
SCL
VREFCA
RFU#144
RFU#230
RFU#227
RFU#205
1/4
280
M_DATA_ B63
DQ63
135
M_DATA_ B62
DQ62
273
M_DATA_ B61
DQ61
128
M_DATA_ B60
DQ60
282
M_DATA_ B59
DQ59
137
M_DATA_ B58
DQ58
275
M_DATA_ B57
DQ57
130
M_DATA_ B56
DQ56
269
M_DATA_ B55
DQ55
124
M_DATA_ B54
DQ54
262
M_DATA_ B53
DQ53
117
M_DATA_ B52
DQ52
271
M_DATA_ B51
DQ51
126
M_DATA_ B50
DQ50
264
M_DATA_ B49
DQ49
119
M_DATA_ B48
DQ48
258
M_DATA_ B47
DQ47
113
M_DATA_ B46
DQ46
251
M_DATA_ B45
DQ45
106
M_DATA_ B44
DQ44
260
M_DATA_ B43
DQ43
115
M_DATA_ B42
DQ42
253
M_DATA_ B41
DQ41
108
M_DATA_ B40
DQ40
247
M_DATA_ B39
DQ39
102
M_DATA_ B38
DQ38
240
M_DATA_ B37
DQ37
95
M_DATA_ B36
DQ36
249
M_DATA_ B35
DQ35
104
M_DATA_ B34
DQ34
242
M_DATA_ B33
DQ33
97
M_DATA_ B32
DQ32
188
M_DATA_ B31
DQ31
43
M_DATA_ B30
DQ30
181
M_DATA_ B29
DQ29
36
M_DATA_ B28
DQ28
190
M_DATA_ B27
DQ27
45
M_DATA_ B26
DQ26
183
M_DATA_ B25
DQ25
38
M_DATA_ B24
DQ24
177
M_DATA_ B23
DQ23
32
M_DATA_ B22
DQ22
170
M_DATA_ B21
DQ21
25
M_DATA_ B20
DQ20
179
M_DATA_ B19
DQ19
34
M_DATA_ B18
DQ18
172
M_DATA_ B17
DQ17
27
M_DATA_ B16
DQ16
166
M_DATA_ B15
DQ15
21
M_DATA_ B14
DQ14
159
M_DATA_ B13
DQ13
14
M_DATA_ B12
DQ12
168
M_DATA_ B11
DQ11
23
M_DATA_ B10
DQ10
161
M_DATA_ B9
DQ9
16
M_DATA_ B8
DQ8
155
M_DATA_ B7
DQ7
10
M_DATA_ B6
DQ6
148
M_DATA_ B5
DQ5
3
M_DATA_ B4
DQ4
157
M_DATA_ B3
DQ3
12
M_DATA_ B2
DQ2
150
M_DATA_ B1
DQ1
5
M_DATA_ B0
DQ0
NP1
NP1
NP2
NP2
NP3
NP3
SPD ADDRESS FOR CHANNEL-1
WRITE ADDRESS: 0xA6
READ ADDRESS: 0xA7
SA0 = 1; SA1 = 1
DIMM1B
DIMM1B
DIMM288_DDR4
DIMM288_DDR4
2/4
2/4
DDR4-28 8P-82-GP
DDR4-28 8P-82-GP
(022.100 10.0771 )
(022.100 10.0771 )
DQS17#
DQS16#
DQS15#
DQS14#
DQS13#
DQS12#
DQS11#
DQS10#
2 OF 4
2 OF 4
51
DQS17
52
132
DQS16
133
121
DQS15
122
110
DQS14
111
99
DQS13
100
40
DQS12
41
29
DQS11
30
18
DQS10
19
7
DQS9
8
DQS9#
197
DQS8
196
DQS8#
278
DQS7
277
DQS7#
267
DQS6
266
DQS6#
256
DQS5
255
DQS5#
245
DQS4
244
DQS4#
186
DQS3
185
DQS3#
175
DQS2
174
DQS2#
164
DQS1
163
DQS1#
153
DQS0
152
DQS0#
M_B_DQS _DP7
M_B_DQS _DN7
M_B_DQS _DP6
M_B_DQS _DN6
M_B_DQS _DP5
M_B_DQS _DN5
M_B_DQS _DP4
M_B_DQS _DN4
M_B_DQS _DP3
M_B_DQS _DN3
M_B_DQS _DP2
M_B_DQS _DN2
M_B_DQS _DP1
M_B_DQS _DN1
M_B_DQS _DP0
M_B_DQS _DN0
VDDQ
138
136
134
131
129
127
125
123
120
118
116
114
112
109
107
105
103
101
98
96
94
57
55
53
50
48
46
44
42
39
37
35
33
31
28
26
24
22
20
17
15
13
11
DIMM1C
DIMM1C
DIMM288_DDR4
DIMM288_DDR4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
9
VSS
6
VSS
4
VSS
2
VSS
DDR4-28 8P-82-GP
DDR4-28 8P-82-GP
(022.100 10.0771 )
(022.100 10.0771 )
3 OF 4
3 OF 4
3/4
3/4
283
VSS
281
VSS
279
VSS
276
VSS
274
VSS
272
VSS
270
VSS
268
VSS
265
VSS
263
VSS
261
VSS
259
VSS
257
VSS
254
VSS
252
VSS
250
VSS
248
VSS
246
VSS
243
VSS
241
VSS
239
VSS
202
VSS
200
VSS
198
VSS
195
VSS
193
VSS
191
VSS
189
VSS
187
VSS
184
VSS
182
VSS
180
VSS
178
VSS
176
VSS
173
VSS
171
VSS
169
VSS
167
VSS
165
VSS
162
VSS
160
VSS
158
VSS
156
VSS
154
VSS
151
VSS
149
VSS
147
VSS
VDDQ
DDR_VT T
2D5V_V PP
DIMM1D
DIMM1D
288
287
286
143
142
221
77
236
233
231
229
226
223
220
217
215
212
209
206
204
92
90
88
85
83
80
76
73
70
67
64
61
59
DDR4-28 8P-82-GP
DDR4-28 8P-82-GP
(022.100 10.0771 )
(022.100 10.0771 )
DIMM288_DDR4
DIMM288_DDR4
VPP
VPP
VPP
VPP
VPP
VTT
VTT
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
4 OF 4
4 OF 4
4/4
4/4
145
TP_DIMM1 _145
12V
1
TP_DIMM1 _1
12V
B B
A A
5
VDDQ
(R_) C 1202
(R_)
CAD NOTE
PLACE RESISTORS CLOSE TO CH_B DIMMS
ON DIMM_VREF_B
12
C1202
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
VDDQ
CAD NOTE:
PLACE AT CHB DIMM0
R1204
R1204
1 2
1KR2F-3 -GP
1KR2F-3 -GP
R1205
R1205
1 2
1KR2F-3 -GP
1KR2F-3 -GP
12
C1201
C1201
SC1U10V 2KX-1GP
SC1U10V 2KX-1GP
12
C1212
C1212
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
4
12
C1209
C1209
SC1U10V 2KX-1GP
SC1U10V 2KX-1GP
12
C1213
C1213
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
DIMM_DQ_ VREF_B
12
C1203
C1203
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
DIMM_DQ_ CPU_VRE F_B_RC
12
C1210
C1210
SC1U10V 2KX-1GP
SC1U10V 2KX-1GP
12
C1214
C1214
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
12
C1211
C1211
SC1U10V 2KX-1GP
SC1U10V 2KX-1GP
12
C1215
C1215
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
12
C1206
C1206
SCD022 U16V2KX -3GP
SCD022 U16V2KX -3GP
(78.2232 2.2FL)
(78.2232 2.2FL)
1 2
R1207
R1207
24D9R2 F-L-GP
24D9R2 F-L-GP
12
C1216
C1216
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
0R0402 -PAD-2-GP
0R0402 -PAD-2-GP
1 2
R1201
R1201
R1206
R1206
1 2
2R2F-GP
2R2F-GP
CAD NOTE:
PLACE NEAR DIMM AREA
BOM NOTE:
VOLTAGE DIVIDER OPTION:STUFF R1 201, EMPTY R1206
VREF CONTROL FROM CPU: STUFF R1 206; EMPTY R1201
STUFF ALL R1201, R1206 FOR POR
DDR_VT T
12
C1207
C1207
SC4D7U6 D3V3KX -GP
SC4D7U6 D3V3KX -GP
CAD NOTE:
CH A V_SM_VTT DECOUPLING CAPS
3
1 2
2 CAPS FOR DEFENSIVE DESIGN AS VREF CRITICAL.
PLACE DIFFERENT LOCATION IN LAYOUT
12
C1208
C1208
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
C1204
C1204
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
C1205
C1205
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
1 2
DIMM_CHB_V REF_C A M_VREF_ DQ_DIM1
2D5V_V PP
12
2
C1217
C1217
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
12
C1218
C1218
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
VDDQ
12
C1225
C1225
SCD1U16 V2KX-3G P
SCD1U16 V2KX-3G P
<Core Des ign>
<Core Des ign>
<Core Des ign>
Title
Title
Title
DDR DIMM_1
DDR DIMM_1
DDR DIMM_1
ize Document Numb er Rev
Size Docume nt Number Rev
Size Docume nt Number Rev
S
D
D
D
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, S ec.1,Hsin Tai W u Rd
21F, 88, S ec.1,Hsin Tai W u Rd
21F, 88, S ec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsie n
Hsichih, Taipei Hsie n
Hsichih, Taipei Hsie n
11 107 Wednes day, Septem ber 23, 20 15
11 107 Wednes day, Septem ber 23, 20 15
11 107 Wednes day, Septem ber 23, 20 15
-1
-1
-1
5
4
3
2
1
M_A_A[0..16] 5,1 4
M_DATA_A[0..63] 5,1 4
D D
C C
M_A_DQS_DP[0..7] 5,14
M_A_DQS_DN[0..7] 5,14
M_BA_A_1 5,1 4
M_BA_A_0 5,1 4
M_BG_A_1 5,14
M_BG_A_0 5,14
M_A_CLK3 5
M_A_CLK#3 5
M_A_CLK2 5
M_A_CLK#2 5
M_A_ODT3 5
M_A_ODT2 5
M_A_CS#3 5
M_A_CS#2 5
M_A_CKE3 5
M_A_CKE2 5
M_PARITY_A 5,14
M_ALERT_A_N 5,14
M_ACT_A_N 5,14
SM_DRAMRST#_R 11,1 3,14,20
SMB_DATA_MAIN 11,13,1 4,20,59,9 3,94
SMB_CLK_MAIN 1 1,13,14,20 ,59,93,94
DIMM_CA_VREF_A 14
DIMM_CA_CPU_VREF_A 6
CHANNEL A -- DIMM1
1 OF 4
DIMM288_DDR4
DIMM288_DDR4
1 OF 4
1/4
1/4
280
M_DATA_A63
DQ63
135
M_DATA_A62
DQ62
273
M_DATA_A61
DQ61
128
M_DATA_A60
DQ60
282
M_DATA_A59
DQ59
137
M_DATA_A58
DQ58
275
M_DATA_A57
DQ57
130
M_DATA_A56
DQ56
269
M_DATA_A55
DQ55
124
M_DATA_A54
DQ54
262
M_DATA_A53
DQ53
117
M_DATA_A52
DQ52
271
M_DATA_A51
DQ51
126
M_DATA_A50
DQ50
264
M_DATA_A49
DQ49
119
M_DATA_A48
DQ48
258
M_DATA_A47
DQ47
113
M_DATA_A46
DQ46
251
M_DATA_A45
DQ45
106
M_DATA_A44
DQ44
260
M_DATA_A43
DQ43
115
M_DATA_A42
DQ42
253
M_DATA_A41
DQ41
108
M_DATA_A40
DQ40
247
M_DATA_A39
DQ39
102
M_DATA_A38
DQ38
240
M_DATA_A37
DQ37
95
M_DATA_A36
DQ36
249
M_DATA_A35
DQ35
104
M_DATA_A34
DQ34
242
M_DATA_A33
DQ33
97
M_DATA_A32
DQ32
188
M_DATA_A31
DQ31
43
M_DATA_A30
DQ30
181
M_DATA_A29
DQ29
36
M_DATA_A28
DQ28
190
M_DATA_A27
DQ27
45
M_DATA_A26
DQ26
183
M_DATA_A25
DQ25
38
M_DATA_A24
DQ24
177
M_DATA_A23
DQ23
32
M_DATA_A22
DQ22
170
M_DATA_A21
DQ21
25
M_DATA_A20
DQ20
179
M_DATA_A19
DQ19
34
M_DATA_A18
DQ18
172
M_DATA_A17
DQ17
27
M_DATA_A16
DQ16
166
M_DATA_A15
DQ15
21
M_DATA_A14
DQ14
159
M_DATA_A13
DQ13
14
M_DATA_A12
DQ12
168
M_DATA_A11
DQ11
23
M_DATA_A10
DQ10
161
M_DATA_A9
DQ9
16
M_DATA_A8
DQ8
155
M_DATA_A7
DQ7
10
M_DATA_A6
DQ6
148
M_DATA_A5
DQ5
3
M_DATA_A4
DQ4
157
M_DATA_A3
DQ3
12
M_DATA_A2
DQ2
150
M_DATA_A1
DQ1
5
DQ0
NP1
NP1
NP2
NP2
NP3
NP3
2 OF 4
2 OF 4
DIMM2B
DIMM2B
DIMM288_DDR4
DIMM288_DDR4
2/4
2/4
51
DQS17
52
DQS17#
132
DQS16
133
DQS16#
121
DQS15
122
DQS15#
110
DQS14
111
DQS14#
99
DQS13
100
DQS13#
40
DQS12
41
DQS12#
29
DQS11
30
DQS11#
18
DQS10
19
DQS10#
7
DQS9
8
DQS9#
197
DQS8
196
DQS8#
278
M_A_DQS_DP7
DQS7
277
M_A_DQS_DN7
DQS7#
267
M_A_DQS_DP6
DQS6
266
M_A_DQS_DN6
DQS6#
256
M_A_DQS_DP5
DQS5
255
M_A_DQS_DN5
DQS5#
245
M_A_DQS_DP4
DQS4
244
M_A_DQS_DN4
DQS4#
186
M_A_DQS_DP3
DQS3
185
M_A_DQS_DN3
DQS3#
175
M_A_DQS_DP2
DQS2
174
M_A_DQS_DN2
DQS2#
164
M_A_DQS_DP1
DQS1
163
M_A_DQS_DN1
DQS1#
153
M_A_DQS_DP0
DQS0
152
M_A_DQS_DN0
DQS0#
DDR4-288P-82 -GP
DDR4-288P-82 -GP
(022.10010 .0771)
(022.10010 .0771)
SPD ADDRESS FOR CHANNEL-1
WRITE ADDRESS: 0xA2
READ ADDRESS: 0xA3
SA0 = 1; SA1 = 0
R31135 240R2F-1-GP R311 35 240R2F-1-GP
VDDQ
SM_DRAMRST#_R
1 2
12
3D3V_S0
C2009
C2009
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
(R_)
(R_)
DIMM2A
DIMM2A
234
A17
M_A_A16
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
M_BA_A_1
M_BA_A_0
M_BG_A_1
M_BG_A_0
M_A_CLK3
M_A_CLK#3
M_A_CLK2
M_A_CLK#2
M_A_CS#3
M_A_CS#2
M_A_CKE3
M_A_CKE2
M_A_ODT3
M_A_ODT2
M_PARITY_A
SM_DRAMRST#_R
DIMM2_EVENT_N
M_ALERT_A_N
M_ACT_A_N
SMB_DATA_MAIN
SMB_CLK_MAIN
DIMM_CA_VREF_A M_DATA_A0
12
C1132
C1132
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
82
A16_RAS#
86
A15_CAS#
228
A14_WE#
232
A13
65
A12
210
A11
225
A10
66
A9
68
A8
211
A7
69
A6
213
A5
214
A4
71
A3
216
A2
72
A1
79
A0
224
BA1
81
BA0
207
BG1
63
BG0
218
CK1
219
CK1#
74
CK0
75
CK0#
235
C2
237
S3#_C1
93
S2#_C0
89
S1#
84
S0#
203
CKE1
60
CKE0
91
ODT1
87
ODT0
199
CB7
54
CB6
192
CB5
47
CB4
201
CB3
56
CB2
194
CB1
49
CB0
222
PAR
58
RESET#
78
EVENT#
208
ALERT#
62
ACT#
284
VDDSPD
238
SA2
140
SA1
139
SA0
285
SDA
141
SCL
146
VREFCA
144
12
RFU#144
230
RFU#230
227
C15170
C15170
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
RFU#227
205
RFU#205
(R_)
(R_)
DDR4-288P-82 -GP
DDR4-288P-82 -GP
(022.10010 .0771)
(022.10010 .0771)
3 OF 4
3 OF 4
DIMM2C
DIMM2C
DIMM288_DDR4
DIMM288_DDR4
3/4
3/4
138
VSS
136
VSS
134
VSS
VDDQ
131
VSS
129
VSS
127
VSS
125
VSS
123
VSS
120
VSS
118
VSS
116
VSS
114
VSS
112
VSS
109
VSS
107
VSS
105
VSS
103
VSS
101
VSS
98
VSS
96
VSS
94
VSS
57
VSS
55
VSS
53
VSS
50
VSS
48
VSS
46
VSS
44
VSS
42
VSS
39
VSS
37
VSS
35
VSS
33
VSS
31
VSS
28
VSS
26
VSS
24
VSS
22
VSS
20
VSS
17
VSS
15
VSS
13
VSS
11
VSS
9
VSS
6
VSS
4
VSS
2
VSS
DDR4-288P-82 -GP
DDR4-288P-82 -GP
(022.10010 .0771)
(022.10010 .0771)
283
VSS
281
VSS
279
VSS
276
VSS
274
VSS
272
VSS
270
VSS
268
VSS
265
VSS
263
VSS
261
VSS
259
VSS
257
VSS
254
VSS
252
VSS
250
VSS
248
VSS
246
VSS
243
VSS
241
VSS
239
VSS
202
VSS
200
VSS
198
VSS
195
VSS
193
VSS
191
VSS
189
VSS
187
VSS
184
VSS
182
VSS
180
VSS
178
VSS
176
VSS
173
VSS
171
VSS
169
VSS
167
VSS
165
VSS
162
VSS
160
VSS
158
VSS
156
VSS
154
VSS
151
VSS
149
VSS
147
VSS
VDDQ
DDR_VTT
2D5V_VPP
DIMM2D
DIMM2D
288
287
286
143
142
221
77
236
233
231
229
226
223
220
217
215
212
209
206
204
92
90
88
85
83
80
76
73
70
67
64
61
59
DDR4-288P-82 -GP
DDR4-288P-82 -GP
(022.10010 .0771)
(022.10010 .0771)
DIMM288_DDR4
DIMM288_DDR4
VPP
VPP
VPP
VPP
VPP
VTT
VTT
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
4 OF 4
4 OF 4
4/4
4/4
145
TP_DIMM2_145
12V
1
TP_DIMM2_1
12V
B B
R1112
R1112
24D9R2F-L-GP
24D9R2F-L-GP
12
12
1 2
R1110 2R2F -GP R1110 2R2F-GP
12
C1101
C1101
C1107
C1107
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C1111
C1111
C1110
C1110
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DIMM_CA_VREF_A
12
C1108
C1108
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C1112
C1112
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DIMM_CA_CPU_VREF_A
12
C1119
C1119
SCD022U16V2KX-3 GP
12
C1106
C1106
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C1109
C1109
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD022U16V2KX-3 GP
(78.22322. 2FL)
(78.22322. 2FL)
1 2
DIMM_CA_CPU_VREF_A_RC
VDDQ
A A
5
4
CAD NOTE:
PLACE AT CHA DIMM0
VDDQ
12
12
C1113
C1113
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3
C1117
C1117
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R1109
R1109
1 2
1KR2F-3-GP
1KR2F-3-GP
R1111
R1111
1 2
1KR2F-3-GP
1KR2F-3-GP
V_SM_R2_DIMM_VREF_ A
DDR_VTT
C1102
C1102
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
12
CAD NOTE:
CH A V_SM_VTT DECOUPLING CAPS
1 2
R1101
R1101
C1103
C1103
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
12
DIMM_CA_VREF_A
C1118
C1118
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2D5V_VPP
12
C1220
C1220
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
12
C1219
C1219
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
DDR-DIMM_2
DDR-DIMM_2
DDR-DIMM_2
ize Doc ument Number Rev
Size Do cument Number Rev
Size Do cument Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron I ncorporated
Wistron I ncorporated
Wistron I ncorporated
21F, 88, Se c.1,Hsin Tai W u Rd
21F, 88, Se c.1,Hsin Tai W u Rd
21F, 88, Se c.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
12 107 Wednesday, S eptember 23, 2015
12 107 Wednesday, S eptember 23, 2015
12 107 Wednesday, S eptember 23, 2015
-1
-1
-1
5
4
3
2
1
CHANNEL B -- DIMM0
D D
1 OF 4
DIMM288_DDR4
DIMM288_DDR4
1 OF 4
1/4
1/4
280
M_DATA_B63
DQ63
135
M_DATA_B62
DQ62
273
M_DATA_B61
DQ61
128
M_DATA_B60
DQ60
282
M_DATA_B59
DQ59
137
M_DATA_B58
DQ58
275
M_DATA_B57
DQ57
130
M_DATA_B56
DQ56
269
M_DATA_B55
DQ55
124
M_DATA_B54
DQ54
262
M_DATA_B53
DQ53
117
M_DATA_B52
DQ52
271
M_DATA_B51
DQ51
126
M_DATA_B50
DQ50
264
M_DATA_B49
DQ49
119
M_DATA_B48
DQ48
258
M_DATA_B47
DQ47
113
M_DATA_B46
DQ46
251
M_DATA_B45
DQ45
106
M_DATA_B44
DQ44
260
M_DATA_B43
DQ43
115
M_DATA_B42
DQ42
253
M_DATA_B41
DQ41
108
M_DATA_B40
DQ40
247
M_DATA_B39
DQ39
102
M_DATA_B38
DQ38
240
M_DATA_B37
DQ37
95
M_DATA_B36
DQ36
249
M_DATA_B35
DQ35
104
M_DATA_B34
DQ34
242
M_DATA_B33
DQ33
97
M_DATA_B32
DQ32
188
M_DATA_B31
DQ31
43
M_DATA_B30
DQ30
181
M_DATA_B29
DQ29
36
M_DATA_B28
DQ28
190
M_DATA_B27
DQ27
45
M_DATA_B26
DQ26
183
M_DATA_B25
DQ25
38
M_DATA_B24
DQ24
177
M_DATA_B23
DQ23
32
M_DATA_B22
DQ22
170
M_DATA_B21
DQ21
25
M_DATA_B20
DQ20
179
M_DATA_B19
DQ19
34
M_DATA_B18
DQ18
172
M_DATA_B17
DQ17
27
M_DATA_B16
DQ16
166
M_DATA_B15
DQ15
21
M_DATA_B14
DQ14
159
M_DATA_B13
DQ13
14
M_DATA_B12
DQ12
168
M_DATA_B11
DQ11
23
M_DATA_B10
DQ10
161
M_DATA_B9
DQ9
16
M_DATA_B8
DQ8
155
M_DATA_B7
DQ7
10
M_DATA_B6
DQ6
148
M_DATA_B5
DQ5
3
M_DATA_B4
DQ4
157
M_DATA_B3
DQ3
12
M_DATA_B2
DQ2
150
M_DATA_B1
DQ1
5
M_DATA_B0
DQ0
NP1
NP1
NP2
NP2
NP3
NP3
SPD ADDRESS FOR CHANNEL-0
WRITE ADDRESS: 0xA4
READ ADDRESS: 0xA5
SA0 = 0; SA1 = 1
DIMM3B
DIMM3B
DIMM288_DDR4
DIMM288_DDR4
2/4
2/4
DDR4-288P-82-GP
DDR4-288P-82-GP
DQS17
DQS17#
DQS16
DQS16#
DQS15
DQS15#
DQS14
DQS14#
DQS13
DQS13#
DQS12
DQS12#
DQS11
DQS11#
DQS10
DQS10#
DQS9#
DQS8#
DQS7#
DQS6#
DQS5#
DQS4#
DQS3#
DQS2#
DQS1#
DQS0#
2 OF 4
2 OF 4
DQS9
DQS8
DQS7
DQS6
DQS5
DQS4
DQS3
DQS2
DQS1
DQS0
VDDQ
51
52
132
133
121
122
110
111
99
100
40
41
29
30
18
19
7
8
197
196
278
M_B_DQS_DP7
277
M_B_DQS_DN7
267
M_B_DQS_DP6
266
M_B_DQS_DN6
256
M_B_DQS_DP5
255
M_B_DQS_DN5
245
M_B_DQS_DP4
244
M_B_DQS_DN4
186
M_B_DQS_DP3
185
M_B_DQS_DN3
175
M_B_DQS_DP2
174
M_B_DQS_DN2
164
M_B_DQS_DP1
163
M_B_DQS_DN1
153
M_B_DQS_DP0
152
M_B_DQS_DN0
138
136
134
131
129
127
125
123
120
118
116
114
112
109
107
105
103
101
98
96
94
57
55
53
50
48
46
44
42
39
37
35
33
31
28
26
24
22
20
17
15
13
11
9
6
4
2
DIMM3C
DIMM3C
DIMM288_DDR4
DIMM288_DDR4
3/4
3/4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DDR4-288P-82-GP
DDR4-288P-82-GP
3 OF 4
3 OF 4
283
VSS
281
VSS
279
VSS
276
VSS
274
VSS
272
VSS
270
VSS
268
VSS
265
VSS
263
VSS
261
VSS
259
VSS
257
VSS
254
VSS
252
VSS
250
VSS
248
VSS
246
VSS
243
VSS
241
VSS
239
VSS
202
VSS
200
VSS
198
VSS
195
VSS
193
VSS
191
VSS
189
VSS
187
VSS
184
VSS
182
VSS
180
VSS
178
VSS
176
VSS
173
VSS
171
VSS
169
VSS
167
VSS
165
VSS
162
VSS
160
VSS
158
VSS
156
VSS
154
VSS
151
VSS
149
VSS
147
VSS
2D5V_VPP
DDR_VTT
VDDQ
DIMM3D
DIMM3D
288
287
286
143
142
221
77
236
233
231
229
226
223
220
217
215
212
209
206
204
92
90
88
85
83
80
76
73
70
67
64
61
59
DDR4-288P-82-GP
DDR4-288P-82-GP
DIMM288_DDR4
DIMM288_DDR4
VPP
VPP
VPP
VPP
VPP
VTT
VTT
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
4 OF 4
4 OF 4
4/4
4/4
145
TP_DIMM3_145
12V
1
TP_DIMM3_1
12V
DIMM3A
M_B_A[0..16] 6,11
M_DATA_B[0..63] 6,11
M_B_DQS_DN[0..7] 6,11
M_B_DQS_DP[0..7] 6,11
M_BA_B_1 6,11
M_BA_B_0 6,11
M_BG_B_1 6,11
M_BG_B_0 6,11
M_B_CLK1 6
M_B_CLK#1 6
M_B_CLK0 6
M_B_CLK#0 6
M_B_CS#1 6
M_B_CS#0 6
M_B_CKE1 6
C C
B B
M_B_CKE0 6
M_PARITY_B 6,11
M_ALERT_B_N 6,11
M_ACT_B_N 6,11
M_B_ODT1 6
M_B_ODT0 6
SM_DRAMRST#_R 11,12,14,20
SMB_DATA_MAIN 11,12,14,20,59,93,94
SMB_CLK_MAIN 11,12,14,20,59,93,94
DIMM_CHB_VREF_CA 11
R31136 240R2F-1-GP R31136 240R2F-1-GP
VDDQ
SM_DRAMRST#_R
1 2
3D3V_S0
1 2
C2011
C2011
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
(R_)
(R_)
M_B_A16
M_B_A15
M_B_A14
M_B_A13
M_B_A12
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A7
M_B_A6
M_B_A5
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
M_BA_B_1
M_BA_B_0
M_BG_B_1
M_BG_B_0
M_B_CLK1
M_B_CLK#1
M_B_CLK0
M_B_CLK#0
M_B_CS#1
M_B_CS#0
M_B_CKE1
M_B_CKE0
M_B_ODT1
M_B_ODT0
M_PARITY_B
SM_DRAMRST#_R
DIMM3_EVENT_N
M_ALERT_B_N
M_ACT_B_N
SMB_DATA_MAIN
SMB_CLK_MAIN
DIMM_CHB_VREF_CA
1 2
C1135
C1135
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DIMM3A
234
A17
82
A16_RAS#
86
A15_CAS#
228
A14_WE#
232
A13
65
A12
210
A11
225
A10
66
A9
68
A8
211
A7
69
A6
213
A5
214
A4
71
A3
216
A2
72
A1
79
A0
224
BA1
81
BA0
207
BG1
63
BG0
218
CK1
219
CK1#
74
CK0
75
CK0#
235
C2
237
S3#_C1
93
S2#_C0
89
S1#
84
S0#
203
CKE1
60
CKE0
91
ODT1
87
ODT0
199
CB7
54
CB6
192
CB5
47
CB4
201
CB3
56
CB2
194
CB1
49
CB0
222
PAR
58
RESET#
78
EVENT#
208
ALERT#
62
ACT#
284
VDDSPD
238
SA2
140
SA1
139
SA0
285
SDA
141
SCL
146
VREFCA
144
1 2
RFU#144
230
RFU#230
C15173
C15173
227
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
RFU#227
205
RFU#205
(R_)
(R_)
DDR4-288P-82-GP
DDR4-288P-82-GP
VDDQ
3D3V_S0
C1402
C1402
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
4
1 2
C1403
C1403
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
CAD NOTE:
PLACE BETWEEN CHA & CHB.
DO NOT PUNCH VIA.
A A
5
DDR_VTT
1 2
CAD NOTE:
CH A V_SM_VTT DECOUPLING CAPS
C1412
C1412
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C1413
C1413
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3
1 2
1 2
CAD NOTE:
PLACE AT CHB DIMM1
C1404
C1404
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1407
C1407
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1405
C1405
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C1408
C1408
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1406
C1406
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C1409
C1409
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
1 2
2
C1401
C1401
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1410
C1410
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1411
C1411
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2D5V_VPP
1 2
C1222
C1222
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1221
C1221
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
DDR DIMM_3
DDR DIMM_3
DDR DIMM_3
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
13 107 Wednesday, September 23, 2015
13 107 Wednesday, September 23, 2015
13 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
CHANNEL A -- DIMM0
D D
C C
B B
M_A_A[0..16] 5,12
M_DATA_A[0..63] 5,12
M_A_DQS_DP[0..7] 5,12
M_A_DQS_DN[0..7] 5,12
M_BA_A_1 5,12
M_BA_A_0 5,12
M_BG_A_1 5,12
M_BG_A_0 5,12
M_A_CLK1 5
M_A_CLK#1 5
M_A_CLK0 5
M_A_CLK#0 5
M_A_ODT1 5
M_A_ODT0 5
M_A_CS#1 5
M_A_CS#0 5
M_A_CKE1 5
M_A_CKE0 5
M_PARITY_A 5,12
M_ALERT_A_N 5,12
M_ACT_A_N 5,12
SM_DRAMRST#_R 11,12,13,20
SMB_DATA_MAIN 11,12,13,20,59,93,94
SMB_CLK_MAIN 11,12,13,20,59,93,94
DIMM_CA_VREF_A 12
R31134 240R2F-1-GP R31134 240R2F-1-GP
1 2
VDDQ
3D3V_S0
1 2
M_A_A16
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
M_BA_A_1
M_BA_A_0
M_BG_A_1
M_BG_A_0
M_A_CLK1
M_A_CLK#1
M_A_CLK0
M_A_CLK#0
M_A_CS#1
M_A_CS#0
M_A_CKE1
M_A_CKE0
M_A_ODT1
M_A_ODT0
M_PARITY_A
SM_DRAMRST#_R
DIMM4_EVENT_N
M_ALERT_A_N
M_ACT_A_N
SMB_DATA_MAIN
SMB_CLK_MAIN
DIMM_CA_VREF_A
C1133
C1133
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C15171
C15171
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
DIMM4A
DIMM4A
234
A17
82
A16_RAS#
86
A15_CAS#
228
A14_WE#
232
A13
65
A12
210
A11
225
A10
66
A9
68
A8
211
A7
69
A6
213
A5
214
A4
71
A3
216
A2
72
A1
79
A0
224
BA1
81
BA0
207
BG1
63
BG0
218
CK1
219
CK1#
74
CK0
75
CK0#
235
C2
237
S3#_C1
93
S2#_C0
89
S1#
84
S0#
203
CKE1
60
CKE0
91
ODT1
87
ODT0
199
CB7
54
CB6
192
CB5
47
CB4
201
CB3
56
CB2
194
CB1
49
CB0
222
PAR
58
RESET#
78
EVENT#
208
ALERT#
62
ACT#
284
VDDSPD
238
SA2
140
SA1
139
SA0
285
SDA
141
SCL
146
VREFCA
144
RFU#144
230
RFU#230
227
RFU#227
205
RFU#205
(R_)
(R_)
DDR4-288P-82-GP
DDR4-288P-82-GP
DIMM288_DDR4
DIMM288_DDR4
1 OF 4
1 OF 4
1/4
1/4
280
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
M_DATA_A63
135
M_DATA_A62
273
M_DATA_A61
128
M_DATA_A60
282
M_DATA_A59
137
M_DATA_A58
275
M_DATA_A57
130
M_DATA_A56
269
M_DATA_A55
124
M_DATA_A54
262
M_DATA_A53
117
M_DATA_A52
271
M_DATA_A51
126
M_DATA_A50
264
M_DATA_A49
119
M_DATA_A48
258
M_DATA_A47
113
M_DATA_A46
251
M_DATA_A45
106
M_DATA_A44
260
M_DATA_A43
115
M_DATA_A42
253
M_DATA_A41
108
M_DATA_A40
247
M_DATA_A39
102
M_DATA_A38
240
M_DATA_A37
95
M_DATA_A36
249
M_DATA_A35
104
M_DATA_A34
242
M_DATA_A33
97
M_DATA_A32
188
M_DATA_A31
43
M_DATA_A30
181
M_DATA_A29
36
M_DATA_A28
190
M_DATA_A27
45
M_DATA_A26
183
M_DATA_A25
38
M_DATA_A24
177
M_DATA_A23
32
M_DATA_A22
170
M_DATA_A21
25
M_DATA_A20
179
M_DATA_A19
34
M_DATA_A18
172
M_DATA_A17
27
M_DATA_A16
166
M_DATA_A15
21
M_DATA_A14
159
M_DATA_A13
14
M_DATA_A12
168
M_DATA_A11
23
M_DATA_A10
161
M_DATA_A9
DQ9
16
M_DATA_A8
DQ8
155
M_DATA_A7
DQ7
10
M_DATA_A6
DQ6
148
M_DATA_A5
DQ5
3
M_DATA_A4
DQ4
157
M_DATA_A3
DQ3
12
M_DATA_A2
DQ2
150
M_DATA_A1
DQ1
5
M_DATA_A0
DQ0
NP1
NP1
NP2
NP2
NP3
NP3
2 OF 4
2 OF 4
DIMM4B
DIMM4B
DIMM288_DDR4
DIMM288_DDR4
2/4
2/4
51
DQS17
52
DQS17#
132
DQS16
133
DQS16#
121
DQS15
122
DQS15#
110
DQS14
111
DQS14#
99
DQS13
100
DQS13#
40
DQS12
41
DQS12#
29
DQS11
30
DQS11#
18
DQS10
19
DQS10#
7
DQS9
8
DQS9#
197
DQS8
196
DQS8#
278
M_A_DQS_DP7
DQS7
277
M_A_DQS_DN7
DQS7#
267
M_A_DQS_DP6
DQS6
266
M_A_DQS_DN6
DQS6#
256
M_A_DQS_DP5
DQS5
255
M_A_DQS_DN5
DQS5#
245
M_A_DQS_DP4
DQS4
244
M_A_DQS_DN4
DQS4#
186
M_A_DQS_DP3
DQS3
185
M_A_DQS_DN3
DQS3#
175
M_A_DQS_DP2
DQS2
174
M_A_DQS_DN2
DQS2#
164
M_A_DQS_DP1
DQS1
163
M_A_DQS_DN1
DQS1#
153
M_A_DQS_DP0
DQS0
152
M_A_DQS_DN0
DQS0#
DDR4-288P-82-GP
DDR4-288P-82-GP
SPD ADDRESS FOR CHANNEL-0
WRITE ADDRESS: 0xA0
READ ADDRESS: 0xA1
SA0 = 0; SA1 = 0
VDDQ
DIMM4C
DIMM4C
138
VSS
136
VSS
134
VSS
131
VSS
129
VSS
127
VSS
125
VSS
123
VSS
120
VSS
118
VSS
116
VSS
114
VSS
112
VSS
109
VSS
107
VSS
105
VSS
103
VSS
101
VSS
98
VSS
96
VSS
94
VSS
57
VSS
55
VSS
53
VSS
50
VSS
48
VSS
46
VSS
44
VSS
42
VSS
39
VSS
37
VSS
35
VSS
33
VSS
31
VSS
28
VSS
26
VSS
24
VSS
22
VSS
20
VSS
17
VSS
15
VSS
13
VSS
11
VSS
9
VSS
6
VSS
4
VSS
2
VSS
DDR4-288P-82-GP
DDR4-288P-82-GP
DIMM288_DDR4
DIMM288_DDR4
3/4
3/4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3 OF 4
3 OF 4
283
281
279
276
274
272
270
268
265
263
261
259
257
254
252
250
248
246
243
241
239
202
200
198
195
193
191
189
187
184
182
180
178
176
173
171
169
167
165
162
160
158
156
154
151
149
147
VDDQ
1 2
DDR_VTT
VDDQ
TC1402
TC1402
E820U2D5VM-8-GP
E820U2D5VM-8-GP
(R_)
(R_)
2D5V_VPP
DIMM4D
DIMM4D
288
287
286
143
142
221
77
236
233
231
229
226
223
220
217
215
212
209
206
204
92
90
88
85
83
80
76
73
70
67
64
61
59
DDR4-288P-82-GP
DDR4-288P-82-GP
1 2
TC1401
TC1401
E820U2D5VM-8-GP
E820U2D5VM-8-GP
DIMM288_DDR4
DIMM288_DDR4
VPP
VPP
VPP
VPP
VPP
VTT
VTT
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
4 OF 4
4 OF 4
4/4
4/4
145
TP_DIMM4_145
12V
1
TP_DIMM4_1
12V
SM_DRAMRST#_R
A A
5
1 2
C2010
C2010
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
(R_)
(R_)
VDDQ
1 2
1 2
CAD NOTE:
PLACE AT CHA DIMM1
4
C1302
C1302
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1305
C1305
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1303
C1303
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C1306
C1306
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1301
C1301
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C1307
C1307
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1304
C1304
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C1308
C1308
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DDR_VTT
1 2
1 2
C1309
C1309
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3
CAD NOTE:
CH A V_SM_VTT DECOUPLING CAPS
C1310
C1310
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C1311
C1311
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
2D5V_VPP
1 2
C1224
C1224
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1223
C1223
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
DDR DIMM_4
DDR DIMM_4
DDR DIMM_4
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
-1
-1
-1
14 107 Wednesday, September 23, 2015
14 107 Wednesday, September 23, 2015
14 107 Wednesday, September 23, 2015
5
SIO_PME_N 24
SPI_SI_PCH 22,25
D D
SPI_SO_PCH 22,25
SPI_CS_PCH_N0 25
SPI_CLK_PCH 25
SPI_WP_PCH 22,25,99
SPI_HOLD_PCH 22,25
PLTRST#_PCH 24,64,68,91,97
FP_AUDIO_PRESENCE_N 29
GPP_H_12 22
LPSS_GSPI1_MOSI 22
EC_ASF 24
LPSS_GSPI0_MOSI 22
SIO_PME_N PCH_PME_N PCH_PME_N
4
R1536
R1536
1 2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
TP_PCH_AR19
TP_PCH_AN17
SPI_SI_PCH
SPI_SO_PCH
SPI_CS_PCH_N0
SPI_CLK_PCH
SPI_WP_PCH
SPI_HOLD_PCH
PCH1A
PCH1A
BD17
GPP_A11/PME#
AG15
RSVD_AG15
AG14
RSVD_AG14
AF17
RSVD_AF17
AE17
RSVD_AE17
AR19
TP5
AN17
TP4
BB29
SPI0_MOSI
BE30
SPI0_MISO
BD31
SPI0_CS0#
BC31
SPI0_CLK
AW31
SPI0_CS1#
BC29
SPI0_IO2
BD30
SPI0_IO3
AT31
SPI0_CS2#
AN36
GPP_D1/SPI1_CLK
AL39
GPP_D0/SPI1_CS#
AN41
GPP_D3/SPI1_MOSI
AN38
GPP_D2/SPI1_MISO
AH43
GPP_D22/SPI1_IO3
AG44
GPP_D21/SPI1_IO2
SUNRISE-1-GP
SUNRISE-1-GP
(B_KI.B1501.001,Q_KI.Q1701.001)
(B_KI.B1501.001,Q_KI.Q1701.001)
3
GPP_B13/PLTRST#
SPL PCH-H
SPL PCH-H
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
PCH Symbol: 071.SUNRI.0A0U
1 OF 12
1 OF 12
INTRUDER#
BB27
P43
R39
R36
R42
R41
AF41
AE44
BC23
BD24
BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34
BE11
PLTRST_PCH_N
FP_AUDIO_PRESENCE_N
ME_CNTL
GPP_H_12
PCH_INTRUDER_N
2
R276 33R2J-2-GP R276 33R2J-2-GP
1 2
1 2
R1510 1MR2J-1-GP R1510 1MR2J-1-GP
PLTRST#_PCH
3V_VRTC_G3
EC_ASF_PCH
OBR
X16_PRSNT
1
1 2
R1502 10KR2J-3-GP R1502 10KR2J-3-GP
1 2
R1530 10KR2J-3-GP R1530 10KR2J-3-GP
1 2
R1521 10KR2J-3-GP R1521 10KR2J-3-GP
1 2
R1523 10KR2J-3-GP R1523 10KR2J-3-GP
3D3V_S5
3D3V_S0
C C
B B
A A
X16_PRSNT 93
PCIEX16_DET1
W1_DISABLE_N 61
W2_DISABLE_N 61
SPI_WP_ROM_C2 25
SPI_WP_ROM_C 25
11 OF 12PCH1K
1 2
R1529
R1529
0R0402-PAD-2-GP
0R0402-PAD-2-GP
ME_CNTL 20
LPSS_GSPI1_MOSI
EC_ASF_PCH EC_ASF
LPSS_GSPI0_MOSI
X16_PRSNT
OBR
AT29
GPP_B22/GSPI1_MOSI
AR29
GPP_B21/GSPI1_MISO
AV29
GPP_B20/GSPI1_CLK
BC27
GPP_B19/GSPI1_CS#
BD28
GPP_B18/GSPI0_MOSI
BD27
GPP_B17/GSPI0_MISO
AW27
GPP_B16/GSPI0_CLK
AR24
GPP_B15/GSPI0_CS#
AV44
GPP_C9/UART0_TXD
BA41
GPP_C8/UART0_RXD
AU44
GPP_C11/UART0_CTS#
AV43
GPP_C10/UART0_RTS#
AU41
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AT44
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43
GPP_C12/UART1_RXD/ISH_UART1_RXD
AN43
GPP_C23/UART2_CTS#
AN44
GPP_C22/UART2_RTS#
AR39
GPP_C21/UART2_TXD
AR45
GPP_C20/UART2_RXD
AR41
GPP_C19/I2C1_SCL
AR44
GPP_C18/I2C1_SDA
AR38
GPP_C17/I2C0_SCL
AT42
GPP_C16/I2C0_SDA
AM44
GPP_D4/ISH_I2C2_SDA
AJ44
GPP_D23/ISH_I2C2_SCL
SUNRISE-1-GP
SUNRISE-1-GP
(B_KI.B1501.001,Q_KI.Q1701.001)
(B_KI.B1501.001,Q_KI.Q1701.001)
SPL PCH-H
SPL PCH-H
GPP_D16/ISH_UART0_CTS#
GPP_D15/ISH_UART0_RTS#
PCH Symbol: 071.SUNRI.0A0U
GPP_D14/ISH_UART0_TXD
GPP_D13/ISH_UART0_RXD
GPIO
3D3V_S5 3D3V_S5
R243
1 2
1 2
R811
R811
1KR2J-1-GP
1KR2J-1-GP
(R_)
(R_)
R244
R244
10KR2J-3-GP
10KR2J-3-GP
GPIO1
GPIO1
1
2
JOWLE-CON2-5-GP
JOWLE-CON2-5-GP
1 2
PCH_GPIO2 PCH_GPIO1
1 2
R812
R812
1KR2J-1-GP
1KR2J-1-GP
(R_)
(R_)
R243
10KR2J-3-GP
10KR2J-3-GP
GPIO2
GPIO2
1
2
JOWLE-CON2-5-GP
JOWLE-CON2-5-GP
11 OF 12PCH1K
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7
OBR
OBR
3
1
2
75.00099.O7D
AL44
AL36
AL35
AJ39
AJ43
AL43
AK44
AK45
BC38
BB38
BD38
BE39
BC22
BD18
BE21
BD22
BD21
BB22
BC19
D39
D39
LBAV99LT1G-1-GP
LBAV99LT1G-1-GP
3D3V_S0
SPI_WP_ROM_C
SPI_WP_ROM_C2
PCH_GPIO1
PCH_GPIO2
W1_DISABLE_N
W2_DISABLE_N
1 2
C894
C894
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
R1021
R1021
1 2
33R2J-2-GP
33R2J-2-GP
OBR_R
OBR1
OBR1
2
1
PIN-CON2-S-GP
PIN-CON2-S-GP
(21.60909.102)
(21.60909.102)
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH (SPI/UART/I2C)
PCH (SPI/UART/I2C)
PCH (SPI/UART/I2C)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
15 107 Wednesday, September 23, 2015
15 107 Wednesday, September 23, 2015
15 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
DMI
DMI_TX_CPU_N[0..3] 3
DMI_TX_CPU_P[0..3] 3
DMI_RX_CPU_N[0..3] 3
DMI_RX_CPU_P[0..3] 3
USB3.0
USB30_RX_PCH_N7 39
D D
C C
B B
A A
USB30_RX_PCH_P7 39
USB30_TX_PCH_N7 39
USB30_TX_PCH_P7 39
USB30_TX_PCH_N8 39
USB30_TX_PCH_P8 39
USB30_RX_PCH_N8 39
USB30_RX_PCH_P8 39
PCIE
PCIE_RX_LAN_N5 31,97
PCIE_RX_LAN_P5 31,97
PCIE_TX_LAN_N5 31,97
PCIE_TX_LAN_P5 31,97
PCIE_RX_PCH_N6 61
PCIE_RX_PCH_P6 61
PCIE_TX_CON_N6 61
PCIE_TX_CON_P6 61
PCIE_RX_PCH_N7 59
PCIE_RX_PCH_P7 59
PCIE_TX_CON_N7 59
PCIE_TX_CON_P7 59
PCIE_RX_PCH_N8 94
PCIE_RX_PCH_P8 94
PCIE_TX_CON_N8 94
PCIE_TX_CON_P8 94
USB2.0
USB_PCH_PN1 38
USB_PCH_PP1 38
USB_PCH_PN2 38
USB_PCH_PP2 38
USB_PCH_PN3 38
USB_PCH_PP3 38
USB_PCH_PN4 38
USB_PCH_PP4 38
USB_PCH_PN5 39
USB_PCH_PP5 39
USB_PCH_PN6 39
USB_PCH_PP6 39
USB_PCH_PN7 37
USB_PCH_PP7 37
USB_PCH_PN8 37
USB_PCH_PP8 37
USB_PCH_PN9 37
USB_PCH_PP9 37
USB_PCH_PN10 36
USB_PCH_PP10 36
USB_PCH_PN11 36
USB_PCH_PP11 36
USB_PCH_PN12 61
USB_PCH_PP12 61
USB_PCH_PN13 39
USB_PCH_PP13 39
USB_PCH_PN14 39
USB_PCH_PP14 39
USB OC CTRL
USB30_OC_H1# 42
USB30_OC_P1# 42
USB30_OC_P2# 42
VISACH2_D3 22
USB20_OC_P1# 42
USB20_OC_P2# 42
USB30_OC_H2# 42
DISPLAY CTRL
DP_HPD_PCH 57
DP2_HPD_PCH 56
DVI_DET_PCH 55
CRT_HPD_PCH 58
DP2_CTRLCLK_PCH 56
DP2_CTRLDATA_PCH 56
DP_CTRLCLK_PCH 57
DP_CTRLDATA_PCH 57
DVI_CLK_PCH 55
DVI_DATA_PCH 55
GPIO
H_SKTOCC_N 4
FOR LAN
FOR NGFFE1
PCIE TO PCI Bridge
FOR PCIE2
PCIE_TX_LAN_N5
PCIE_TX_LAN_P5
PCIE_TX_CON_N6
PCIE_TX_CON_P6
PCIE_TX_CON_N7
PCIE_TX_CON_P7
PCIE_TX_CON_N8
PCIE_TX_CON_P8
PORT7 - USB30
FRONT HEADER 2
PORT8 - USB30
FRONT HEADER 2
Close to CONN
1 2
C1608 SCD1U16V2KX-3GP C1608 SCD1U16V2KX-3GP
1 2
C1603 SCD1U16V2KX-3GP C1603 SCD1U16V2KX-3GP
1 2
C1614 SCD22U10V2KX-1GP C1614 SCD22U10V2KX-1GP
1 2
C1613 SCD22U10V2KX-1GP C1613 SCD22U10V2KX-1GP
C1616
C1616
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C1615 SCD1U16V2KX-3GP C1615 SCD1U16V2KX-3GP
1 2
C1617 SCD22U10V2KX-1GP C1617 SCD22U10V2KX-1GP
1 2
C1618 SCD22U10V2KX-1GP C1618 SCD22U10V2KX-1GP
1 2
R1608
R1608
100R2F-L1-GP-U
100R2F-L1-GP-U
2014/9/9
DDI1 TO DP1
DDI2 TO DP2
DDI3 TO DVI
R1702
R1702
0R0402-PAD-2-GP
0R0402-PAD-2-GP
R1707 0R2J-2-GP(R_)R1707 0R2J-2-GP(R_)
DMI_TX_CPU_N0
DMI_TX_CPU_P0
DMI_RX_CPU_N0
DMI_RX_CPU_P0
DMI_TX_CPU_N1
DMI_TX_CPU_P1
DMI_RX_CPU_N1
DMI_RX_CPU_P1
DMI_TX_CPU_N2
DMI_TX_CPU_P2
DMI_RX_CPU_N2
DMI_RX_CPU_P2
DMI_TX_CPU_N3
DMI_TX_CPU_P3
DMI_RX_CPU_N3
DMI_RX_CPU_P3
PEG_RCOMPN_CPU
PEG_RCOMPP_CPU
USB30_RX_PCH_N7
USB30_RX_PCH_P7
USB30_TX_PCH_N7
USB30_TX_PCH_P7
USB30_TX_PCH_N8
USB30_TX_PCH_P8
USB30_RX_PCH_N8
USB30_RX_PCH_P8
PCIE_RX_LAN_N5
PCIE_RX_LAN_P5
PCIE_TX_PCH_N5
PCIE_TX_PCH_P5
PCIE_RX_PCH_N6
PCIE_RX_PCH_P6
PCIE_TX_PCH_N6
PCIE_TX_PCH_P6
PCIE_RX_PCH_N7
PCIE_RX_PCH_P7
PCIE_TX_PCH_N7
PCIE_TX_PCH_P7
PCIE_RX_PCH_N8
PCIE_RX_PCH_P8
PCIE_TX_PCH_N8
PCIE_TX_PCH_P8
DP_HPD_PCH
DP2_HPD_PCH
DVI_DET_PCH
1 2
1 2
R9703
R9703
100KR2J-1-GP
100KR2J-1-GP
DDPE_HPD
EDP_HPD CRT_HPD_PCH
1 2
PCH1B
PCH1B
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
(B_KI.B1501.001,Q_KI.Q1701.001)
(B_KI.B1501.001,Q_KI.Q1701.001)
PCH Symbol: 071.SUNRI.0A0U
AW4
GPP_I0/DDPB_HPD0
AY2
GPP_I1/DDPC_HPD1
AV4
GPP_I2/DDPD_HPD2
BA4
GPP_I3/DDPE_HPD3
BD7
GPP_I4/EDP_HPD
(B_KI.B1501.001,Q_KI.Q1701.001)
(B_KI.B1501.001,Q_KI.Q1701.001)
PCH Symbol: 071.SUNRI.0A0U
SPL PCH-H
SPL PCH-H
DMI
DMI
PCIe/USB 3
PCIe/USB 3
SPL PCH-H
SPL PCH-H
SUNRISE-1-GP
SUNRISE-1-GP
USB 2.0
USB 2.0
SUNRISE-1-GP
SUNRISE-1-GP
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
2 OF 12
2 OF 12
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
GPD7/RSVD
5 OF 12PCH1E
5 OF 12PCH1E
GPP_F14
GPP_F23
GPP_F22
GPP_G23
GPP_G22
GPP_G21
GPP_G20
GPP_H23
AF5
AG7
AD5
AD7
AG8
AG10
AE1
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13
AD43
AD42
AD39
AC44
Y43
Y41
W44
W43
AG3
AD10
AB13
AG2
BD14
BB3
BD6
BA5
BC4
BE5
BE6
Y44
V44
W39
L43
L44
U35
R35
BD36
USB_PCH_PN1
USB_PCH_PP1
USB_PCH_PN2
USB_PCH_PP2
USB_PCH_PN3
USB_PCH_PP3
USB_PCH_PN4
USB_PCH_PP4
USB_PCH_PN5
USB_PCH_PP5
USB_PCH_PN6
USB_PCH_PP6
USB_PCH_PN7
USB_PCH_PP7
USB_PCH_PN8
USB_PCH_PP8
USB_PCH_PN9
USB_PCH_PP9
USB_PCH_PN10
USB_PCH_PP10
USB_PCH_PN11
USB_PCH_PP11
USB_PCH_PN12
USB_PCH_PP12
USB_PCH_PN13
USB_PCH_PP13
USB_PCH_PN14
USB_PCH_PP14
USB30_OC_H1#
USB30_OC_P1#
USB30_OC_P2#
VISACH2_D3
USB20_OC_P1#
USB20_OC_P2#
USB20_OC_C1#
USB30_OC_H2#
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
TP_PCH_BD14
DP2_CTRLCLK_PCH
DP2_CTRLDATA_PCH
DP_CTRLCLK_PCH
DP_CTRLDATA_PCH
DVI_CLK_PCH
DVI_DATA_PCH
H_SKTOCC_N
BOARD_ID_2
BOARD_ID_1
BOARD_ID_0
USB Table
Pair
1
2
3
4
5
6
7
8
9
10
11
12
13
14
USB 3.0 OC
USB 2.0 OC
1 2
R1604 113R2F-GP R1604 113R2F-GP
1 2
R1605 1KR2J-1-GP R1605 1KR2J-1-GP
1 2
R1606 1KR2J-1-GP R1606 1KR2J-1-GP
BOARD
ID
10KR2J-3-GP
10KR2J-3-GP
BOARD_ID_2 BOARD_ID_1 BOARD_ID_0
10KR2J-3-GP
10KR2J-3-GP
Device
USB3.0 Ext. port 1 (Rear)
USB3.0 Ext. port 2 (Rear)
USB3.0 Ext. port 3 (Rear)
USB3.0 Ext. port 4 (Rear)
USB3.0 Ext. Header (Front)
USB3.0 Ext. Header (Front)
USB2.0 Ext. Header (Front)
CR Ext. Header ( Front)
USB2.0 Ext. Header (Front)
RJ45+USB Dual port
RJ45+USB Dual port
NGFFE1
USB3.0 Ext.Header (Front) for Q170 bom option
USB3.0 Ext.Header (Front) for Q170 bom option
USB20_OC_C1#
3D3V_S5 3D3V_S5 3D3V_S5
1 2
(R_)
(R_)
R1601
R1601
R1619
R1619
10KR2J-3-GP
10KR2J-3-GP
1 2
10KR2J-3-GP
10KR2J-3-GP
Board_ID_0
pull high for Q170
pull low for B150
1 2
R1620 10KR2J-3-GP R1620 10KR2J-3-GP
1 2
(R_)
(R_)
R1616
R1616
1 2
R1615
R1615
(Q_)
(Q_)
R1618
R1618
10KR2J-3-GP
10KR2J-3-GP
R1617
R1617
10KR2J-3-GP
10KR2J-3-GP
(B_)
(B_)
3D3V_S5
1 2
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH (DMI/PCI-E/USB)
PCH (DMI/PCI-E/USB)
PCH (DMI/PCI-E/USB)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
16 107 Wednesday, September 23, 2015
16 107 Wednesday, September 23, 2015
16 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
CL BUS
WLAN_C LK_PCH 61
WLAN_D AT_PCH 61
D D
C C
B B
WLAN_R ST_PCH 61
PCIE
PCIE_TX_CO N_P11 94
PCIE_TX_CO N_N11 94
PCIE_RX_PCH_P11 94
PCIE_RX_PCH_N11 94
SATA PORT
SATA_RX_P CH_N0 60
SATA_RX_P CH_P0 60
SATA_TX_PCH_N0 60
SATA_TX_PCH_P0 60
SATA_RX_P CH_N1 60
SATA_RX_P CH_P1 60
SATA_TX_PCH_N1 60
SATA_TX_PCH_P1 60
SATA_RX_P CH_N2 63
SATA_RX_P CH_P2 63
SATA_TX_PCH_N2 63
SATA_TX_PCH_P2 63
SATA_RX_P CH_N3 60
SATA_RX_P CH_P3 60
SATA_TX_PCH_N3 60
SATA_TX_PCH_P3 60
SATA_RX_P CH_N4 60
SATA_RX_P CH_P4 60
SATA_TX_PCH_N4 60
SATA_TX_PCH_P4 60
SATA_RX_P CH_N5 60
SATA_RX_P CH_P5 60
SATA_TX_PCH_N5 60
SATA_TX_PCH_P5 60
SATA DET
SATAEX_DE T0 60
SATAEX_DE T1 60
M2_SATA_DET_PCH 63
PCH_SATA_LED_N 64
PCIE_TX_CO N_P11
PCIE_TX_CO N_N11
FOR PCIE1
1 2
C1620 SCD22U10V2KX-1G P C1620 SCD22U10V2KX-1GP
1 2
C1619 SCD22U10V2KX-1G P C1619 SCD22U10V2KX-1GP
WLAN_C LK_PCH
WLAN_D AT_PCH
WLAN_R ST_PCH
PCIE_TX_PCH_P11
PCIE_TX_PCH_N11
PCIE_RX_PCH_P11
PCIE_RX_PCH_N11
AV2
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PW M_0
R43
GPP_G9/FAN_PW M_1
U39
GPP_G10 /FAN_PW M_2
N42
GPP_G11 /FAN_PW M_3
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_ TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B _RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_ TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B _RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP
K44
PCIE20_TXN
N38
PCIE20_RXP
N39
PCIE20_RXN
H44
PCIE19_TXP
H43
PCIE19_TXN
L39
PCIE19_RXP
L37
PCIE19_RXN
(B_KI.B15 01.001,Q_KI.Q1701.001 )
(B_KI.B15 01.001,Q_KI.Q1701.001 )
SPL PCH-H
SPL PCH-H
CLINK
CLINK
FAN
FAN
PCIe/SATA
PCIe/SATA
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/S ATAXPCIE3 /SATAGP3
GPP_F1/S ATAXPCIE4 /SATAGP4
GPP_F2/S ATAXPCIE5 /SATAGP5
GPP_F3/S ATAXPCIE6 /SATAGP6
GPP_F4/S ATAXPCIE7 /SATAGP7
HOST
HOST
SUNRISE-1-G P
SUNRISE-1-G P
PCH Symbol: 071.SUNRI.0A0U
3 OF 12PCH1C
3 OF 12PCH1C
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_ RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A _RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_ TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_ RXP
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_ RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_ RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_ RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_F21/EDP_BKL TCTL
GPP_F20/EDP_BKL TEN
GPP_F19/EDP_VDDE N
THERMTRIP#
PM_SYNC
PLTRST_CPU#
PM_DOWN
G31
H31
C31
B31
G29
E29
C32
B32
F41
E41
B39
A39
D43
E42
A41
A40
H42
H40
E45
F45
K37
G37
G45
G44
AD44
AG36
AG35
AG39
AD35
AD31
AD38
AC43
AB44
W36
W35
W42
AJ3
AL3
PECI
AJ4
AK2
AH2
SATA_RX_P CH_N0
SATA_RX_P CH_P0
SATA_TX_PCH_N0
SATA_TX_PCH_P0
SATA_RX_P CH_N1
SATA_RX_P CH_P1
SATA_TX_PCH_N1
SATA_TX_PCH_P1
SATA_RX_P CH_N2
SATA_RX_P CH_P2
SATA_TX_PCH_N2
SATA_TX_PCH_P2
SATA_RX_P CH_N3
SATA_RX_P CH_P3
SATA_TX_PCH_N3
SATA_TX_PCH_P3
SATA_RX_P CH_N4
SATA_RX_P CH_P4
SATA_TX_PCH_N4
SATA_TX_PCH_P4
SATA_RX_P CH_N5
SATA_RX_P CH_P5
SATA_TX_PCH_N5
SATA_TX_PCH_P5
PCH_SATA_LED_N
SATAEX_DE T0
SATAEX_DE T1
M2_SATA_DET_PCH
PECI_PCH
PM_SYNC_PC H
PLTRST_CPU_N
PM_DOWN_PCH
1 2
R1704 560R2J-3-GP R1 704 560R2J-3-G P
1 2
R1705 30R2J-1-GP R1705 30R2J-1-G P
SATA0
SATA1
NGFFB1
SATA3
SATA4
SATA5
PM_SYNC_CP U
1V_VCCST_VCCPLL_S 3
1 2
PECI_CPU
close to PCH
THERMTRIP#_CPU_R
R412 1KR2 J-1-GP R412 1KR2 J-1-GP
SATA Express
THERMTRIP#_CPU_R THERMTRIP#_PCH
1 2
R1706
R1706
1KR2J-1-GP
1KR2J-1-GP
1 2
R1701 0R2J-2-GP
R1701 0R2J-2-GP
(R_)
(R_)
1 2
C1701
C1701
SC47P50V2JN-3GP
SC47P50V2JN-3GP
(R_)
(R_)
HOST
THERMTRIP#_CPU_R 4
PECI_CPU 4,24
PLTRST_CPU_N 4
PM_DOWN_PCH 4
PM_SYNC_CP U 4
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH (PCI-E/SATA)
PCH (PCI-E/SATA)
PCH (PCI-E/SATA)
Size Document Number Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
17 107 Wednesday, S eptember 23 , 2015
17 107 Wednesday, S eptember 23 , 2015
17 107 Wednesday, S eptember 23 , 2015
-1
-1
-1
5
CPU CLK
CPU_CLK24M_PCH 4
CPU_CLK24M_PCH# 4
CPU_BCLK_PCH 4
CPU_BCLK_PCH# 4
D D
LKREQ
C
PEG_CLKREQ0_M2# 63
PEG_CLKREQ1_W LAN# 61
PEG_CLKREQ2_LAN# 31,97
CLK_REQ9 _SATAE_N 60
PEG_CLKREQ4_PCIE1# 94
PEG_CLKREQ5_PCIE2# 94
PEG_CLKREQ8_PCIE16# 93
CLKOUT_48 is only supported and enabled on SKL-H Server
1D0V_S5
1 2
R1803 2K7R2F-GP R1 803 2K7R2F-GP
CLOCK
XDP_CLK_ CON#
XDP_CLK_ CON
CPU_PCIBCLK_PCH# 4
C C
CPU_PCIBCLK_PCH 4
PEG_CLK0_M2# 63
PEG_CLK0_M2 63
PEG_CLK1_WLA N# 61
PEG_CLK1_WLA N 61
PEG_CLK2_LAN# 3 1,97
PEG_CLK2_LAN 31,9 7
PEG_CLK3_PCH# 59
PEG_CLK3_PCH 5 9
PEG_CLK4_PCH# 94
PEG_CLK4_PCH 9 4
PEG_CLK5_PCH# 94
PEG_CLK5_PCH 9 4
PEG_CLK8_PCH# 93
PEG_CLK8_PCH 9 3
4
CLKOUT_48M_R
CPU_CLK24M_PCH
CPU_CLK24M_PCH#
CPU_BCLK_PCH
CPU_BCLK_PCH#
XTL_24M_O UT_PCH
XTL_24M_IN_PCH
XCLK_BIA SREF_PCH
XTL_32K_X1_PCH
XTL_32K_X2_PCH
PEG_CLKREQ0_M2#
PEG_CLKREQ1_W LAN#
PEG_CLKREQ2_LAN#
PEG_CLKREQ4_PCIE1#
PEG_CLKREQ5_PCIE2#
PEG_CLKREQ8_PCIE16#
CLK_REQ9 _SATAE_N
AR17
GPP_A16 /CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC#
G2
CLKOUT_CPUB CLK_P
H2
CLKOUT_CPUB CLK#
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIA SREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ 0#
AW24
GPP_B6/SRCCLKREQ 1#
AT24
GPP_B7/SRCCLKREQ 2#
BD25
GPP_B8/SRCCLKREQ 3#
BB24
GPP_B9/SRCCLKREQ 4#
BE25
GPP_B10 /SRCCLKRE Q5#
AT33
GPP_H0/S RCCLKREQ6#
AR31
GPP_H1/S RCCLKREQ7#
BD32
GPP_H2/S RCCLKREQ8#
BC32
GPP_H3/S RCCLKREQ9#
BB31
GPP_H4/S RCCLKREQ10#
BC33
GPP_H5/S RCCLKREQ11#
BA33
GPP_H6/S RCCLKREQ12#
AW33
GPP_H7/S RCCLKREQ13#
BB33
GPP_H8/S RCCLKREQ14#
BD33
GPP_H9/S RCCLKREQ15#
R13
CLKOUT_PCIE _N15
R11
CLKOUT_PCIE _P15
P1
CLKOUT_PCIE _N14
R2
CLKOUT_PCIE _P14
W7
CLKOUT_PCIE _N13
Y5
CLKOUT_PCIE _P13
U2
CLKOUT_PCIE _N12
U3
CLKOUT_PCIE _P12
SUNRISE-1-G P
SUNRISE-1-G P
(B_KI.B15 01.001,Q_KI.Q1701.001 )
(B_KI.B15 01.001,Q_KI.Q1701.001 )
3
SPL PCH-H
SPL PCH-H
7 OF 12PCH1G
7 OF 12PCH1G
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_CPUP CIBCLK#
CLKOUT_CPUP CIBCLK_P
CLKOUT_PCIE _N0
CLKOUT_PCIE _P0
CLKOUT_PCIE _N1
CLKOUT_PCIE _P1
CLKOUT_PCIE _N2
CLKOUT_PCIE _P2
CLKOUT_PCIE _N3
CLKOUT_PCIE _P3
CLKOUT_PCIE _N4
CLKOUT_PCIE _P4
CLKOUT_PCIE _N5
CLKOUT_PCIE _P5
CLKOUT_PCIE _N6
CLKOUT_PCIE _P6
CLKOUT_PCIE _N7
CLKOUT_PCIE _P7
CLKOUT_PCIE _N8
CLKOUT_PCIE _P8
CLKOUT_PCIE _N9
CLKOUT_PCIE _P9
CLKOUT_PCIE _N10
CLKOUT_PCIE _P10
CLKOUT_PCIE _N11
CLKOUT_PCIE _P11
2
PEG_CLKREQ1_W LAN#
L1
L2
J1
J2
N7
N8
L7
L5
D3
F2
E5
G4
D5
E6
D8
D7
R8
R7
U5
U7
W10
W11
N3
N2
P3
P2
R3
R4
XDP_CLK_ CON#
XDP_CLK_ CON
CPU_PCIBCLK_PCH#
CPU_PCIBCLK_PCH
PEG_CLK0_M2#
PEG_CLK0_M2
PEG_CLK1_WLA N#
PEG_CLK1_WLA N
PEG_CLK2_LAN#
PEG_CLK2_LAN
PEG_CLK3_PCH#
PEG_CLK3_PCH
PEG_CLK4_PCH#
PEG_CLK4_PCH
PEG_CLK5_PCH#
PEG_CLK5_PCH
PEG_CLK8_PCH#
PEG_CLK8_PCH
CLK OUT for CPU XDP
NGFFB1 (SSD)
NGFFE1 ( WLAN)
INTEL & REALTK LAN
FOR PCIE to PCI bridge
FOR PCIE1 CONN
FOR PCIE2 CONN
FOR PCIEx16 CONN
PEG_CLKREQ0_M2#
PEG_CLKREQ2_LAN#
1
1 2
R1809 10KR2J-3-GP R1809 10KR2J-3-GP
1 2
R1811 10KR2J-3-GP R1811 10KR2J-3-GP
1 2
R1810 10KR2J-3-GP(Q_)R1810 10 KR2J-3-GP(Q_)
3D3V_S0
PCH Symbol: 071.SUNRI.0A0U
B B
C1801
C1801
SC4P50V2CN-GP
SC4P50V2CN-GP
(78.4R774 .1FL)
(78.4R774 .1FL)
RTC CLOCK
1 2
R1808 10MR3J-L1-GP R1808 10 MR3J-L1-GP
X1801
X1801
XTAL-32D76 8KHZ-64-GP
XTAL-32D76 8KHZ-64-GP
1
1 2
2 3
XTL_32K_X1_PCH
XTL_32K_X2_PCH
4
1 2
C1804
C1804
SC4P50V2CN-GP
SC4P50V2CN-GP
(78.4R774 .1FL)
(78.4R774 .1FL)
XTL_24M_IN_PCH
1MR2J-1-GP
1MR2J-1-GP
XTL_24M_O UT_PCH
R1807
R1807
X1802
X1802
4 1
XTAL-24MHZ-126-GP
XTAL-24MHZ-126-GP
2 3
1 2
C1802
C1802
1 2
SC8P50V2CN-3GP
SC8P50V2CN-3GP
(78.2703 4.1FL)
(78.2703 4.1FL)
(78.3303 4.1FL)
(78.3303 4.1FL)
C1803
C1803
1 2
SC8P50V2CN-3GP
SC8P50V2CN-3GP
82.30001.661
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH(CLOCK/CL)
PCH(CLOCK/CL)
PCH(CLOCK/CL)
ize Document Num ber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
18 107 Wednesday, S eptember 23 , 2015
18 107 Wednesday, S eptember 23 , 2015
18 107 Wednesday, S eptember 23 , 2015
-1
-1
-1
5
USB30_TX_PCH_N1 39
USB30_TX_PCH_P1 39
USB30_RX_PCH_N1 39
USB30_RX_PCH_P1 39
USB30_TX_PCH_N2 39
D D
C C
B B
USB30_TX_PCH_P2 39
USB30_RX_PCH_N2 39
USB30_RX_PCH_P2 39
USB30_TX_PCH_N6 38
USB30_TX_PCH_P6 38
USB30_RX_PCH_N6 38
USB30_RX_PCH_P6 38
USB30_TX_PCH_N5 38
USB30_TX_PCH_P5 38
USB30_RX_PCH_N5 38
USB30_RX_PCH_P5 38
USB30_TX_PCH_P3 38
USB30_TX_PCH_N3 38
USB30_RX_PCH_P3 38
USB30_RX_PCH_N3 38
USB30_TX_PCH_P4 38
USB30_TX_PCH_N4 38
USB30_RX_PCH_P4 38
USB30_RX_PCH_N4 38
LPC_AD_SIO_P0 24,68,91
LPC_AD_SIO_P1 24,68,91
LPC_AD_SIO_P2 24,68,91
LPC_AD_SIO_P3 24,68,91
LPC_FRAME#_SIO 24,68,91
LPC_SERIRQ_PCH 24,91
KBRST# 24
SUS_STAT_N 91
CLK_CLKIN_SIO 24
CLK_PCICLK_SIO 24
CLK_LPC_PORT80 68,91
SSD_SATA_DEVSLP 63
SATAEX_DEVSLP 60
PORT1 - USB30
FRONT HEADER 1
PORT2 - USB30
FRONT HEADER 1
PORT6 - USB30
REAR PORT
PORT5 - USB30
REAR PORT
PORT3 - USB30
REAR PORT
PORT4 - USB30
REAR PORT
4
USB30_TX_PCH_N1
USB30_TX_PCH_P1
USB30_RX_PCH_N1
USB30_RX_PCH_P1
USB30_TX_PCH_N2
USB30_TX_PCH_P2
USB30_RX_PCH_N2
USB30_RX_PCH_P2
USB30_TX_PCH_N6
USB30_TX_PCH_P6
USB30_RX_PCH_N6
USB30_RX_PCH_P6
USB30_TX_PCH_N5
USB30_TX_PCH_P5
USB30_RX_PCH_N5
USB30_RX_PCH_P5
USB30_TX_PCH_P3
USB30_TX_PCH_N3
USB30_RX_PCH_P3
USB30_RX_PCH_N3
USB30_TX_PCH_P4
USB30_TX_PCH_N4
USB30_RX_PCH_P4
USB30_RX_PCH_N4
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
B12
USB3_2_TXN/SSIC_1_TXN
A12
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP/SSIC_2_TXP
C13
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
B10
USB3_3_RXN/SSIC_2_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
(B_KI.B1501.001,Q_KI.Q1701.001)
(B_KI.B1501.001,Q_KI.Q1701.001)
LPC/eSPI
LPC/eSPI
SPL PCH-H
SPL PCH-H
GPP_A5/LFRAME#/ESPI_CS#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
USB
USB
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
SATA
SATA
SUNRISE-1-GP
SUNRISE-1-GP
PCH Symbol: 071.SUNRI.0A0U
3
6 OF 12PCH1F
6 OF 12PCH1F
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A6/SERIRQ
GPP_A10/CLKOUT_LPC1
GPP_G19/SMI#
GPP_G18/NMI#
GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3
AT22
AV22
AT19
BD16
BE16
BA17
AW17
AT17
BC18
BC17
AV19
M45
N43
AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41
2
LPC_AD_SIO_P0
LPC_AD_SIO_P1
LPC_AD_SIO_P2
LPC_AD_SIO_P3
LPC_SERIRQ_PCH
LPC_PIRQ_A
KBRST#
SUS_STAT_N
CLK_PCICLK_SIO_R
CLK_LPC_PORT80_R CLK_LPC_PORT80
SSD_SATA_DEVSLP
SATAEX_DEVSLP
1 2
R1911 22R2J-2-GP R1911 22R2J-2-GP
1 2
R1909 22R2J-2-GP R1909 22R2J-2-GP
1 2
R1910 22R2J-2-GP R1910 22R2J-2-GP
LPC_FRAME#_SIO LPC_FRAME#_PCH
CLK_CLKIN_SIO
CLK_PCICLK_SIO
1 2
C9101
C9101
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
LPC_SERIRQ_PCH
KBRST#
LPC_FRAME#_SIO
LPC_AD_SIO_P2
LPC_AD_SIO_P0
LPC_AD_SIO_P3
LPC_AD_SIO_P1
LPC_PIRQ_A
CLK_CLKIN_SIO CLK_PCICLK_SIO CLK_LPC_PORT80
1 2
R1905 10KR2J-3-GP R1905 10KR2J-3-GP
1 2
R1907 10KR2J-3-GP R1907 10KR2J-3-GP
1 2
R1901 10KR2J-3-GP(R_)R1901 10KR2J-3-GP(R_)
(R_)
(R_)
1
RN1901 SRN10KJ-11-GP-U
RN1901 SRN10KJ-11-GP-U
2 3
(R_)
(R_)
1
RN1902 SRN10KJ-11-GP-U
RN1902 SRN10KJ-11-GP-U
2 3
1 2
R1908 10KR2J-3-GP R1908 10KR2J-3-GP
1 2
C15176
C15176
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
4
4
1 2
C15177
C15177
SC33P50V2JN-3GP
SC33P50V2JN-3GP
3D3V_S0
3D3V_S5
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Title
Title
Title
PCH (USB/ESPI
PCH (USB/ESPI
PCH (USB/ESPI
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
19 107 Wednesday, September 23, 2015
19 107 Wednesday, September 23, 2015
19 107 Wednesday, September 23, 2015
-1
-1
-1
5
AUDIO
HDA_BITCLK_CODEC 27
HDA_RST#_CODEC 27
HDA_SDIN0_PCH 27
HDA_SDOUT_CODEC 27
HDA_SYNC_CODEC 27
D D
AUD_AZACPU_SDO_R 7
AUD_AZACPU_CPU_SDI 7
AUD_AZACPU_SCLK 7
HDA_BITCLK_CODEC
HDA_RST#_CODEC
HDA_SDIN0_PCH
HDA_SDOUT_CODEC
HDA_SYNC_CODEC
AUD_AZACPU_CPU_SDI
SMBUS
SMLINK0_CLK 97
SMLINK0_DATA 97
SMB_CLK_RESUME 61
SMB_DATA_RESUME 61
SMB_ALERT 22
SML1CLK_PCH_DASH 31
SML1DATA_PCH_DASH 31
SMB_CLK_MAIN 11,12,13,14,59,93,94
SMB_DATA_MAIN 11,12,13,14,59,93,94
PM CTRL
PCH_PWROK 40
RSMRST_SIO_N 24
SM_DRAMRST#_R 11,12,13,14
PCH_SYSPWROK 40
SLP_S3_N 24,40,41,42,43,44,50
OTHER
SLP_S4_N 8,24,42,44
H_PWRGD 4
PM_PWRBTN# 24
FP_RST_N 64
PCH_WAKE_N 59,61,63,93,94
SUSCLK_PCH 22
ME_CNTL 15
GPP_C_5 22
PCH_HOT_R_N 22
SPKR 22
LAN_DISABLE_N 97
USB_PWR_EUP 42
SLP_LAN_N 24
LANWAKE_N_PCH 24
PCH_SUSCLK_WLAN 61
SUSCLK_PCH_M2 63
SMB_DATA_RESUME
SMB_CLK_RESUME
SML1CLK_PCH
SML1DATA_PCH
SMBUS
SMB_DATA_RESUME
2nd = 84.DM601.03F
2nd = 84.DM601.03F
SMB_CLK_RESUME
Q6511
Q6511
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
3D3V_S0
R539 0R2J-2-GP(B_)R539 0R2J-2-GP(B_)
R538 0R2J-2-GP(B_)R538 0R2J-2-GP(B_)
R536 0R2J-2-GP(R_)R536 0R2J-2-GP(R_)
R535 0R2J-2-GP(R_)R535 0R2J-2-GP(R_)
1
2 3
C C
B B
check logic & current leakage
4
HDA_RST#: PDG -- 33ohm
DDR4 CRB -- 0ohm
DDR3L CRB -- 33ohm
Intel LAN
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
1 2
1 2
1 2
RN6
RN6
SRN2K2J-1-GP
SRN2K2J-1-GP
4
1
6
23 45
(75.27002.F7C)
(75.27002.F7C)
Close to PCH
R2020 33R2J-2-GP R2020 33R2J-2-GP
1 2
1 2
R2022 33R2J-2-GP R2022 33R2J-2-GP
R2025 33R2J-2-GP R2025 33R2J-2-GP
1 2
1 2
R2017 33R2J-2-GP R2017 33R2J-2-GP
1 2
R2028 33R2J-2-GP R2028 33R2J-2-GP
1 2
R702 20R2J-3-GP R702 20R2J-3-GP
1 2
R2029 33R2J-2-GP R2029 33R2J-2-GP
1 2
1 2
(R_)
(R_)
(R_)
(R_)
C1504
C1504
C1503
C1503
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SML1DATA_PCH_DASH
SML1CLK_PCH_DASH
OTHERS
SMB_DATA_MAIN
SMB_CLK_MAIN
HDA_BITCLK_PCH
HDA_RST#_PCH
HDA_SDOUT_PCH
HDA_SYNC_PCH
AUD_AZACPU_SDO AUD_AZACPU_SDO_R
AUD_AZACPU_SDI
AUD_AZACPU_SCLK_R AUD_AZACPU_SCLK
PCH_RTCRST_PULLUP
PCH_SRTCRSTB_PULLUP
PCH_PWROK
RSMRST_SIO_N
SMB_ALERT
SMB_CLK_RESUME
SMB_DATA_RESUME
GPP_C_5
SMLINK0_CLK
SMLINK0_DATA
PCH_HOT_R_N
SML1CLK_PCH
SML1DATA_PCH
CMOS CLR JUMPER
CMOS1
CMOS1
1
2
PCH_RTCRST_PULLUP
3
CMOS1_3
PIN-CON 3 - S -GP
PIN-CON3-S-GP
1-2 Normal
2-3 CLR CMOS
1 2
PCH_SRTCRSTB_PULLUP
3
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AUDIO
AM1
AN2
AM2
AL42
AN42
AM43
AJ33
AH44
AJ35
AJ38
AJ42
BC10
BB10
AW11
BA11
AV11
BB41
AW44
BB43
BA40
AY44
BB39
AT27
AW42
AW45
AUDIO
DISPA_SDO
DISPA_SDI
DISPA_BCLK
GPP_D8/SSP0_SCLK
GPP_D7/SSP0_RXD
GPP_D6/SSP0_TXD
GPP_D5/SSP0_SFRM
GPP_D20/DMIC_DATA0
GPP_D19/DMIC_CLK0
GPP_D18/DMIC_DATA1
GPP_D17/DMIC_CLK1
RTCRST#
SRTCRST#
PCH_PWROK
RSMRST#
DSW_PWROK
GPP_C2/SMBALERT#
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C5/SML0ALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
(B_KI.B1501.001,Q_KI.Q1701.001)
(B_KI.B1501.001,Q_KI.Q1701.001)
CRB pull 30.1kļ¼but PDG use 20k
1 2
R2069 20KR2J-L2-GP R2069 20KR2J-L2-GP
1 2
R2068
R2068
C2008
C2008
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
4K75R2F-1-GP
4K75R2F-1-GP
(78.10523.5FL)
(78.10523.5FL)
1 2
R2046 20KR2J-L2-GP R2046 20KR2J-L2-GP
1 2
C2001
C2001
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(78.10523.5FL)
(78.10523.5FL)
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
SPL PCH-H
SPL PCH-H
GPP_G17/ADR_COMPLETE
GPP_A13/SUSWARN#/SUSPW RDNACK
SMBUS
SMBUS
JTAG
JTAG
SUNRISE-1-GP
SUNRISE-1-GP
PCH Symbol: 071.SUNRI.0A0U
3V_VRTC_G3
3V_VRTC_G3
4 OF 12PCH1D
4 OF 12PCH1D
GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B1
GPP_B0
GPP_B11
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW#
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAGX
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
BB17
AW22
AR15
AV13
BC14
BD23
AL27
AR27
N44
AN24
AY1
BC13
BC15
AV15
BC26
AW15
BD15
BA13
AN15
BD13
BB19
BD19
BD11
BB15
BB13
AT13
AW1
BD26
AM3
AT2
AR3
AR2
AP1
AP2
AN3
1 2
R2117
R2117
1KR2J-1-GP
1KR2J-1-GP
2
PCH_CLKRUN_N
LAN_DISABLE_N
SLP_WLAN_N
SM_DRAMRST#
VRALERTB_PU
GPP_B1
USB_PWR_EUP
PCH_SYSPWROK
PCH_WAKE_N
SLP_A#
SLP_LAN_N_PCH
SLP_S3_N
SLP_S4_N
SLP_S5_N
SUSCLK_PCH
BATLOW_N
SUSACK_N
SUS_WARNB
LANWAKE_N_PCH
GPD1
SLP_SUS_N
PM_PWRBTN#
FP_RST_N
SPKR
R2092 30R2J-1-GP R2092 30R2J-1-GP
H_PWRGD_PCH
ITP_PMODE
PCH_JTAGX
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK
1 2
H_PWRGD
ME ENABLE/DISABLE
Flash Descriptor Secu rity Overide
Low = Default
High = Debug mode
need resume GPIO
MECLR1
MECLR1
1
2
HDA_SDOUT_R HDA_SDOUT_PCH
3D3V_S5
3
PIN - C O N3-S-GP
PIN-CON3-S-GP
(R_)
(R_)
SUSCLK_PCH PCH_SUSCLK_WLAN
R2041 33R2J-2-GP R2041 33R2J-2-GP
R2042 33R2J-2-GP(R_)R2042 33R2J-2-GP(R_)
ME_CNTL
HDA_SDOUT_PCH
1 2
1 2
R2115
R2115
1KR2J-1-GP
1KR2J-1-GP
1 2
ME_CNTL1
SUSCLK_PCH_M2
B
3D3V_S5
1 2
ME_CNTL2
E
C
R2116
R2116
1KR2J-1-GP
1KR2J-1-GP
Q2102
Q2102
MMBT3906-4-GP
MMBT3906-4-GP
3D3V_S0
FP_RST_N
PCH_CLKRUN_N
USB_PWR_EUP
SML1CLK_PCH
SML1DATA_PCH
VRALERTB_PU
ME_CNTL
LAN_DISABLE_N
SLP_WLAN_N
SMB_CLK_RESUME
SMB_DATA_RESUME
SUSACK_N
SUS_WARNB
PCH_WAKE_N
BATLOW_N
GPD1
SMLINK0_CLK
SMLINK0_DATA
LANWAKE_N_PCH
SLP_LAN_N_PCH
PCH_JTAGX
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMS
RSMRST_SIO_N
PCH_JTAG_TCK
R2015 2K2R2J-2-GP R2015 2K2R2J-2-GP
R31127 8K2R2J-3-GP R31127 8K2R2J-3-GP
R2037 10KR2J-3-GP(R_)R2037 10KR2J-3-GP(R_)
R2019 S RN1KJ-7-GP R2019 SRN1KJ-7-GP
R2023 10KR2J-3-GP R2023 10KR2J-3-GP
R2033 10KR2J-3-GP R2033 10KR2J-3-GP
R2026 10KR2J-3-GP(R_)R2026 10KR2J-3-GP(R_)
R2027 10KR2J-3-GP
R2027 10KR2J-3-GP
R2002 SRN1KJ-7-GP R2002 SRN1KJ-7-GP
RN7903 SRN10KJ-11-GP-U RN7903 S RN10KJ-11-GP-U
R2030 1KR2J-1-GP R2030 1KR2J-1-GP
R2032 10KR2J-3-GP R2032 10KR2J-3-GP
R2047 10KR2J-3-GP R2047 10KR2J-3-GP
R2016 499R2F-2-GP R2016 499R2F-2-GP
R2018 499R2F-2-GP R2018 499R2F-2-GP
R2034 10KR2J-3-GP R2034 10KR2J-3-GP
R2048 10KR2J-3-GP(R_)R2048 10KR2J-3-GP(R_)
R2039 1KR2J-1-GP(R_)R2039 1KR2J-1-GP(R_)
R2038 51R2J-2-GP R2038 51R2J-2-GP
R2040 51R2J-2-GP R2040 51R2J-2-GP
R2043 51R2J-2-GP R2043 51R2J-2-GP
R31128 100KR2J-1-GP R31128 100KR2J-1-GP
R9911 51R2J-2-GP(R_)R9911 51R2J-2-GP(R_)
CAD NOTE: PLACE CLOSE TO PCH
10KR2J-3-GP
10KR2J-3-GP
(63.22234.1DL)
(63.22234.1DL)
SLP_LAN_N
SLP_LAN_N_PCH
1
1 2
1 2
3D3V_S5
1 2
1
2 3
1 2
1 2
1 2
1 2
(R_)
(R_)
1
2 3
1
2 3
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
3D3V_S5
R2044
R2044
123 4
6
4
4
4
1 2
SLP_LAN_N_PCH_R
5
3D3V_S0
3D3V_S5
1V_VCCST_VCCPLL_S3
Q6512
Q6512
2N7002KDW-GP
2N7002KDW-GP
(75.27002.F7C)
(75.27002.F7C)
SM_DRAMRST_N
VDDQ
1 2
1 2
R2053
R2053
470R2F-GP
470R2F-GP
R2001
R2001
0R0402-PAD-2-GP
0R0402-PAD-2-GP
C2007
C2007
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
(R_)
(R_)
1 2
SM_DRAMRST#_R
3
1 2
R8005 0R0402-PAD-2-GP R8005 0R0402-PAD-2-GP
D3404
D3404
BAT54A-7-F-2-GP
BAT54A-7-F-2-GP
R2055
R2055
10KR2J-3-GP
10KR2J-3-GP
(R_)
(R_)
1
3
2
(R_)
(R_)
4
SLP_S4_N
SM_DRAMRST#
1 2
A A
5
BUZZER
SPKR
1 2
1 2
2K2R2J-2-GP
2K2R2J-2-GP
R2010
R2010
1KR2J-1-GP
1KR2J-1-GP
(R_)
(R_)
R2008
R2008
PCH_SPKR1
B
BZ_ON
C
Q2002
Q2002
LMBT3904LT1G-GP
LMBT3904LT1G-GP
E
R2006
R2006
1 2
75R3J-L-GP
75R3J-L-GP
1 2
75R3J-L-GP
75R3J-L-GP
2
5V_S0
BUZ1
BUZ1
1
+
+
BUZZER
BUZZER
2
BZ_ON1
-
-
HY-05LF-GP
R2009
R2009
HY-05LF-GP
3D3V_S5 5V_S0
C804
C804
1 2
SCD1U25V2KX-GP
SCD1U25V2KX-GP
3D3V_S5 5V_S0
C805
C805
1 2
SCD1U25V2KX-GP
SCD1U25V2KX-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH (GPIO/CPU/SMBUS/IHDA/JTAG)
PCH (GPIO/CPU/SMBUS/IHDA/JTAG)
PCH (GPIO/CPU/SMBUS/IHDA/JTAG)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
20 107 Wednesday, September 23, 2015
20 107 Wednesday, September 23, 2015
20 107 Wednesday, September 23, 2015
-1
-1
-1
5
PROC_TRIGOUT_PCH 9
PROC_TRIGIN_ CPU 9
D D
1V_VCCAMPHYPLL_Sx
1V_VCCAP LL_Sx
3D3V_S5
C C
B B
A A
5
1D0V_S5
1V_VCCDSW_PCH
1D0V_S5
1V_VCCF24_Sx
1D0V_S5
1D0V_S5
3D3V_DVDDIO_AUDIO
1 2
R2107 0R0603-P AD R2107 0R0603-P AD
VCCHDA may be designed or configured to support two
modes; HD Audio or I2S. If the circuit is designed
and configured for HD Audio VCCHDA should be
connected to 3.3V or 1.5V. If the circuit is designed and
configured for I2S VCCHDA should be connected to 1.8V or 3.3V
VCCDSW_ 3P3_W 15
4
AA23
VCCPRIM_1P0_AA23
AA26
VCCPRIM_1P0_AA26
AA28
VCCPRIM_1P0_AA28
AC23
VCCPRIM_1P0_AC23
AC26
VCCPRIM_1P0_AC26
AC28
VCCPRIM_1P0_AC28
AE23
VCCPRIM_1P0_AE23
AE26
VCCPRIM_1P0_AE26
Y23
VCCPRIM_1P0_Y23
Y25
VCCPRIM_1P0_Y25
BA29
DCPDSW_ 1P0
N17
VCCCLK1
R19
VCCCLK3
U20
VCCCLK4
V17
VCCCLK2
R17
VCCCLK6
K2
VCCCLK5_K2
K3
VCCCLK5_K3
U21
VCCMPHY_1P 0_U21
U23
VCCMPHY_1P 0_U23
U25
VCCMPHY_1P 0_U25
U26
VCCMPHY_1P 0_U26
V26
VCCMPHY_1P 0_V26
A43
VCCMPHYPLL _1P0_A43
B43
VCCMPHYPLL _1P0_B43
C44
VCCPCIE3P LL_1P0 _C44
C45
VCCPCIE3P LL_1P0 _C45
V28
VCCAPLLE BB_1P0
AC17
VCCPRIM_1P0_AC17
AJ5
VCCUSB2PLL_1P0_ AJ5
AL5
VCCUSB2PLL_1P0_ AL5
AN19
VCCHDAPLL _1P0
BA15
VCCHDA
W15
VCCDSW_ 3P3_W 15
(B_KI.B15 01.001,Q_KI.Q1701.001 )
(B_KI.B15 01.001,Q_KI.Q1701.001 )
1 2
R2109 0R0603-PAD R2109 0R0603-PA D
DESIGN NOTE:
GROUP D POWER
SPT-H :1.8V
CRB
3D3V_S5
R2108 0R0603-PAD R2108 0R0603-PA D
R2111 0R0603-PAD R2111 0R0603-PA D
1 2
4
SPL PCH-H
SPL PCH-H
PCH Symbol: 071.SUNRI.0A0U
1 2
3D3V_DVDDIO_AUDIO 3D3V_S5
CORE
CORE
VCCGPIO
VCCGPIO
MPHY
MPHY
USB
USB
SUNRISE-1-G P
SUNRISE-1-G P
3D3V_1D8 V_PCHSPI_Sx 3D3V_S5
1D8V_VCCPGPPD_Sx
8 OF 12PCH1 H
8 OF 12PCH1 H
VCCPRIM_1P0_AL22
VCCDSW_ 3P3_BA 24
VCCPGPPA
VCCPGPPB H_BC42
VCCPGPPB H_BD40
VCCPGPPE F_AJ41
VCCPGPPE F_AL41
VCCPGPPG
VCCPRIM_3P3_AN5
VCCPRIM_1P0_AD15
VCCATS
VCCRTCPRIM_3P3
VCCRTC
DCPRTC
VCCPRIM_1P0_AJ20
VCCPRIM_1P0_AJ21
VCCPRIM_1P0_AJ23
VCCPRIM_1P0_AJ25
VCCSPI_BE41
VCCSPI_BE43
VCCSPI_BE42
VCCPGPPCD_BC44
VCCPGPPCD_BA45
VCCPGPPCD_BC45
VCCPGPPCD_BB45
VCCPRIM_3P3_BD3
VCCPRIM_3P3_BE3
VCCPRIM_3P3_BE4
AL22
1V_PRIME_PCH_FUSE _Sx
BA24
VCCDSW_ 3P3_BA 24
BA31
BC42
BD40
AJ41
AL41
AD41
AN5
AD15
AD13
BA20
BA22
BA26
AJ20
AJ21
AJ23
AJ25
BE41
BE43
BE42
BC44
BA45
BC45
BB45
BD3
BE3
BE4
3
3D3V_VCCPRIM
3
R2104
R2104
0R0603-PAD
0R0603-PAD
1 2
1 2
R2110 0R0 603-PAD R2110 0R0603-PAD
3D3V_S5
1D0V_S5
3D3V_S0
3D3V_S5
1D0V_S5
3D3V_1D8 V_PCHSPI_Sx
1D8V_VCCPGPPD_Sx
1D0V_S5
3D3V_S5
3D3V_VCCPGPPA_S x
VCC_RTC
1 2
R2112 0 R0603-PAD R2112 0R0603-PAD
1 2
1 2
R2105
R2105
0R0603-PAD
0R0603-PAD
3D3V_S5
2
3D3V_S5
10 OF 12PCH1J
R2102
R2102
0R0603-PAD
0R0603-PAD
1 2
3D3V_VCCPRTC
TP_PCH_C1
C2101
C2101
Near Ball BA26
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
9 OF 12PCH1I
9 OF 12PCH1I
SPL PCH-H
SPL PCH-H
AC18
VSS
AN4
VSS
AN10
VSS
BE14
VSS
BE18
VSS
BE23
VSS
BE28
VSS
BE32
VSS
BE37
VSS
BE40
VSS
BE9
VSS
C10
VSS
C2
VSS
C28
VSS
C37
VSS
J7
VSS
K10
VSS
K27
VSS
K33
VSS
K36
VSS
K4
VSS
K42
VSS
K43
VSS
L12
VSS
L13
VSS
L15
VSS
L4
VSS
L41
VSS
L8
VSS
M35
VSS
M42
VSS
N10
VSS
N15
VSS
N19
VSS
N22
VSS
N24
VSS
N35
VSS
N36
VSS
N4
VSS
N41
VSS
N5
VSS
P17
VSS
P19
VSS
P22
VSS
P45
VSS
R10
VSS
R14
VSS
R22
VSS
R29
VSS
R33
VSS
R38
VSS
R5
VSS
T1
VSS
T2
VSS
T4
VSS
Y18
VSS
Y20
VSS
Y21
VSS
Y26
VSS
Y28
VSS
Y29
VSS
A18
VSS
A25
VSS
A32
VSS
A37
VSS
AA17
VSS
AA18
VSS
AA20
VSS
AA21
VSS
AA25
VSS
AA29
VSS
AA4
VSS
AA42
VSS
AB10
VSS
SUNRISE-1-G P
SUNRISE-1-G P
(B_KI.B15 01.001,Q_KI.Q1701.001 )
(B_KI.B15 01.001,Q_KI.Q1701.001 )
PCH Symbol: 071.SUNRI.0A0U PCH Symbol: 071.SUNRI.0A0U
AR5
VSS
AR7
VSS
U15
VSS
AL4
VSS
AE29
VSS
AE4
VSS
AE42
VSS
AF18
VSS
AF20
VSS
AF21
VSS
AF23
VSS
AF25
VSS
AF26
VSS
AF28
VSS
AF29
VSS
AG11
VSS
AG13
VSS
AG31
VSS
AG32
VSS
AG33
VSS
AG38
VSS
AG4
VSS
AH1
VSS
AH17
VSS
AH18
VSS
AH20
VSS
AH21
VSS
AH23
VSS
AH25
VSS
AH26
VSS
AH28
VSS
AH29
VSS
AH45
VSS
AJ10
VSS
AJ14
VSS
AJ15
VSS
AJ17
VSS
AJ18
VSS
AJ26
VSS
AJ28
VSS
AJ29
VSS
AJ31
VSS
AJ32
VSS
AJ36
VSS
AK4
VSS
AK42
VSS
AU7
VSS
AV17
VSS
AV24
VSS
AV27
VSS
AV31
VSS
AV33
VSS
AV6
VSS
AW13
VSS
AW19
VSS
AW29
VSS
AW37
VSS
AW9
VSS
AY38
VSS
AY45
VSS
B25
VSS
B3
VSS
B37
VSS
B40
VSS
B6
VSS
BA1
VSS
BB11
VSS
BB16
VSS
BB21
VSS
BB25
VSS
BB30
VSS
BB34
VSS
BC2
VSS
BD43
VSS
TP_PCH_D1
2
BD2
BD45
BD44
BE44
D45
A42
B45
B44
A4
A3
B2
A2
B1
BB1
BC1
A44
C1
D1
PROC_TRIGIN_ PCH
SPL PCH-H
SPL PCH-H
VSS_BD2
VSS_BD45
VSS_BD44
VSS_BE4 4
VSS_D45
VSS_A42
VSS_B45
VSS_B44
VSS_A4
VSS_A3
VSS_B2
VSS_A2
VSS_B1
VSS_BB1
VSS_BC1
VSS_A44
RSVD_C1
RSVD_D1
SUNRISE-1-G P
SUNRISE-1-G P
(B_KI.B15 01.001,Q_KI.Q1701.001 )
(B_KI.B15 01.001,Q_KI.Q1701.001 )
PCH Symbol: 071.SUNRI.0A0U
10 OF 12PCH1J
RSVD_AR22
RSVD_W13
RSVD_U13
RSVD_P31
RSVD_N31
RSVD_P27
RSVD_R27
RSVD_N29
RSVD_P29
RSVD_AN29
RSVD_R24
RSVD_P24
PREQ#
PRDY#
CPU_TRST#
PCH_TRIGOUT
PCH_TRIGIN
R2106
R2106
1 2
30R2J-1-GP
30R2J-1-GP
SPL PCH-H
SPL PCH-H
C42
VSS
D10
VSS
D12
VSS
D15
VSS
D16
VSS
D17
VSS
D19
VSS
D21
VSS
D24
VSS
D25
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
D33
VSS
D35
VSS
D36
VSS
E13
VSS
E15
VSS
E31
VSS
E33
VSS
F44
VSS
F8
VSS
G42
VSS
G9
VSS
H17
VSS
H19
VSS
H22
VSS
H24
VSS
H27
VSS
H29
VSS
H3
VSS
H35
VSS
J10
VSS
J11
VSS
J3
VSS
J39
VSS
J5
VSS
T42
VSS
U10
VSS
U11
VSS
U14
VSS
U17
VSS
U18
VSS
U28
VSS
U29
VSS
U31
VSS
U32
VSS
U33
VSS
U38
VSS
U4
VSS
U8
VSS
V18
VSS
V20
VSS
V21
VSS
V23
VSS
V25
VSS
V29
VSS
V3
VSS
V45
VSS
W14
VSS
W31
VSS
W32
VSS
W33
VSS
W38
VSS
W4
VSS
W8
VSS
Y17
VSS
SUNRISE-1-G P
SUNRISE-1-G P
(B_KI.B15 01.001,Q_KI.Q1701.001 )
(B_KI.B15 01.001,Q_KI.Q1701.001 )
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH ( POWER1)
PCH ( POWER1)
PCH ( POWER1)
S
ize Document Num ber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
AR22
TP_PCH_AR2 2
W13
TP_PCH_W 13
U13
TP_PCH_U13
P31
TP_PCH_P31
N31
TP_PCH_N31
P27
TP_PCH_P27
R27
TP_PCH_R27
N29
TP_PCH_N29
P29
TP_PCH_P29
AN29
TP_PCH_AN2 9
R24
TP_PCH_R24
P24
TP_PCH_P24
AT3
PCH_XDP_PREQ_R_N
AT4
XDP_PRDY_N
AY5
H_TRST_N_R RTCEXT_CAP
AL2
PROC_TRIGIN_ PCH
AK1
PROC_TRIGOUT_PCH
PROC_TRIGIN_ CPU
12 OF 12PCH1L
12 OF 12PCH1L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB11
AB7
AB14
AB31
AB32
AB38
AB4
AB5
AC1
AC20
AC21
AC25
AC29
AC45
AB8
AD11
AD14
AB15
AD32
AD33
AD36
AD4
AD8
AE18
AE20
AE21
AE25
AE28
AL10
AL11
AL13
AL17
AL19
AL24
AL29
AL32
AL33
AL38
AM15
AM17
AM19
AM22
AM24
AM27
AM29
AM45
AN11
AN22
AN27
AN31
AN39
AN7
AN8
AP11
AP4
AR33
AR34
AR42
AR9
AT10
AT15
AT36
AT9
AU1
AU35
AU36
AU39
AU45
C4
1
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
21 107 Wednesday, S eptember 23 , 2015
21 107 Wednesday, S eptember 23 , 2015
21 107 Wednesday, S eptember 23 , 2015
-1
-1
-1
5
SPI_SI_PCH 15,25
SPI_SO_PCH 15,25
SPI_WP_PCH 15,25,99
SPI_HOLD_PCH 15,25
SPKR 20
D D
C C
LPSS_GSPI0_MOSI 15
SMB_ALERT 20
LPSS_GSPI1_MOSI 15
SUSCLK_PCH 20
GPP_C_5 20
PCH_HOT_R_N 20
GPP_H_12 15
VISACH2_D3 16
3D3V_1D8V_PCHSPI_Sx
3D3V_S0
4
(R_)
(R_)
1 2
R2202 1KR2J-1-GP
R2202 1KR2J-1-GP
(R_)
(R_)
1 2
R2203 4K7R2J-2-GP
R2203 4K7R2J-2-GP
1 2
R2204
R2204
(R_)
(R_)
1 2
R2205 4K7R2J-2-GP
R2205 4K7R2J-2-GP
1 2
R2206 20KR2J-L2-GP
R2206 20KR2J-L2-GP
1 2
R2207 4K7R2J-2-GP
R2207 4K7R2J-2-GP
R2208
(63.10234.1DL)R2208
(63.10234.1DL)
20KR2J-L2-GP
20KR2J-L2-GP
1 2
1 2
R2209 1KR2J-1-GP
R2209 1KR2J-1-GP
(R_)
(R_)
1 2
R2210 4K7R2J-2-GP
R2210 4K7R2J-2-GP
1 2
R2211 20KR2J-L2-GP
R2211 20KR2J-L2-GP
1 2
R2212 4K7R2J-2-GP
R2212 4K7R2J-2-GP
1 2
R2213 1KR2J-1-GP(R_)R2213 1KR2J-1-GP(R_)
3
2
1
PCH STRAP FUNCTIONS
0: Enable boot halt
SPI_SI_PCH
20KR2J-L2-GP(R_)
20KR2J-L2-GP(R_)
SPI_SO_PCH
(R_)
(R_)
(R_)
(R_)
(R_)
(R_)
(R_)
(R_)
(R_)
(R_)
SPI_WP_PCH
SPI_HOLD_PCH
SPKR
LPSS_GSPI0_MOSI
SPI_SI_PCH
(SPI0_MOSI)
SPI_SO_PCH
(SPI0_MISO)
SPI_WP_PCH
(SPI0_IO2)
SPI_HOLD_PCH
(SPI0_IO3)
SPKR
(SPKR / GPP_B14)
LPSS_GSPI0_MOSI
(GPP_B18/GSPI0_MOSI)
1: Disable boot halt
The internal PU resistor is enabled when RSMRST# is asserted
and is switched to the internal PD when RSMRST# is de-asserted.
0: Disable JTAG ODT
1: Enable JTAG ODT
The internal PU resistor is enabled when RSMRST# is asserted
0: Enable consent strap
1: Disable consent strap
PCH has internal weak PU
0: Enable personality strap
1: Disable personality strap
PCH has internal weak PU
0: Disable Top Swap mode. (Default)
1: Enable Top Swap mode.
PCH internal pull-down is disabled after PLTRST# deasserts.
0: Disable No Reboot mode.
1: Enable No Reboot mode This function is useful
when running ITP/XDP.
The internal pull-down is disabled after PLTRST# deasserts.
3D3V_S5
B B
A A
5
R2214
(R_)
(R_)
1 2
R2215 20KR2J-L2-GP
R2215 20KR2J-L2-GP
1 2
R2217
R2217
1 2
R2218
R2218
1 2
R2219
R2219
1 2
R2220
R2220
(63.15434.1DL)
(63.15434.1DL)
1 2
R2221
R2221
1 2
R2222
R2222
1 2
R2223
R2223
1 2
R2224
R2224
(R_)
(R_)
1 2
R2201 10KR2J-3-GP
R2201 10KR2J-3-GP
(R_)
(R_)
1 2
R2225 10KR2J-3-GP
R2225 10KR2J-3-GP
R2227 1K5R2J-3-GP
R2227 1K5R2J-3-GP
1 2
(R_)
(R_)
4
4K7R2J-2-GP(R_)
4K7R2J-2-GP(R_)
20KR2J-L2-GP(R_)
20KR2J-L2-GP(R_)
4K7R2J-2-GP(R_)
4K7R2J-2-GP(R_)
20KR2J-L2-GP(R_)
20KR2J-L2-GP(R_)
4K7R2J-2-GP
4K7R2J-2-GP
20KR2J-L2-GP(R_)
20KR2J-L2-GP(R_)
4K7R2J-2-GP(R_)
4K7R2J-2-GP(R_)
20KR2J-L2-GP(R_)
20KR2J-L2-GP(R_)
SUSCLK_PCH
SMB_ALERT
LPSS_GSPI1_MOSI
GPP_C_5
PCH_HOT_R_N
GPP_H_12
VISACH2_D3
SMB_ALERT
(GPP_C2/SMBALERT#)
LPSS_GSPI1_MOSI
(GPP_B22/GSPI1_MOSI)
GPP_C_5
(GPP_C5/SML0ALERT#)
PCH_HOT_R_N
(GPP_B23/SML1ALERT#/PCHHOT#)
GPP_H_12
(GPP_H12/SML2ALERT#)
VISACH2_D3
(GPP_E12)
HDA_SDOUT_PCH
(HDA_SDO)
SUSCLK_PCH
(GPD8/SUSCLK)
3
4K7R2J-2-GP
4K7R2J-2-GP
1 2
R2214
0: Disable TSL confidentiality
1: Enable TSL confidentiality (default)
The internal pull-down is disabled after RSMRST# deasserts.
BOOT SELECT STRAP
0: SPI select
1: LPC select
The internal pull-down is disabled after PLTRST# deasserts.
ESPI/LPC SELECT STRAP
0: LPC is selected for EC.
1: eSPI is selected for EC.
The internal pull-down is disabled after RSMRST# deasserts.
0: Disable Exi boot stall bypass
1: Enable Exi boot stall bypass
The internal PD resistor is disable after RSMRST# de-asserted.
ESPI flash sharing mode
0: Master attached flash sharing
1: Slave attached flash sharing
PCH has internal weak PD.
DFX test mode
0: XTAL input is single ended.
1: XTAL input is differential.
The internal PD resistoris disabled after RSMRST# de-asserts
0: Enable security measures defined in the Flash Descriptor.
1: Disable Flash Descriptor Security (override).
The internal pull-down is disabled after PLTRST# deasserts.
0: Disable OD PLL VR
1: Enable OD PLL VR
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH_(POWER2)
PCH_(POWER2)
PCH_(POWER2)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
22 107 Wednesday, September 23, 2015
22 107 Wednesday, September 23, 2015
22 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
1 2
R2302 0R0603-PAD R2302 0R0603-PAD
1D0V_S5 1V_VCCAMPHYPLL_Sx
1 2
C2302
C2302
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
D D
3V_VRTC_G3 3D3V_VCCPRTC
C C
V_3P3_A
CHECK
DESIGN NOTE:
PLACE HOLDER FOR VCCMPHYPLL_1P0 FILTER
CAD NOTE:
PLACE CLOSE TO PCH PIN
PIN A42,A43, AND B43
R2304 0R0603-PAD R2304 0R0603-PAD
3D3V_S5
1 2
1 2
1 2
C2301
C2301
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(78.10523.5FL)
(78.10523.5FL)
DESIGN NOTE:
BOARD CAP FOR VCCPRTC_3P3
CAD NOTE:
PLACE 3~5MM FROM PACKAGE EDGE
PIN BA22
DESIGN NOTE:
C2310
C2310
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
EDGE CAP FOR VCCPUSBDSW_3P3
CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE
PIN W15
1 2
C2303
C2303
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
crb
1D0V_S5 1V_VCCAPLL_Sx 1D0V_S5 1V_VCCF24_Sx
SB3V CHECK
R2303 0R0603-PAD R2303 0R0603-PAD
DESIGN NOTE:
PLACE HOLDER FOR VCCAUSB_1P0 AND VCCAAZPLL_1P0 FILTER
CAD NOTE:
PLACE CLOSE TO PCH PIN
PIN AJ5,AL5, AND AN19
3D3V_S5
1 2
C2308
C2308
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3D3V_S5
1 2
C2311
C2311
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
1 2
C2304
C2304
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DESIGN NOTE:
EDGE CAP FOR VCCPGPPEF(PLACE HOLDER)
CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE
PIN AJ41 AND AL41
DESIGN NOTE:
BOAED CAP FOR VCCPRTCPRIM_3P3
CAD NOTE:
PLACE 3~5MM FROM PACKAGE EDGE
PIN BA20
1 2
C2305
C2305
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
R2301 0R0603-PAD R2301 0R0603-PAD
1 2
C2306
C2306
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DESIGN NOTE:
PLACE HOLDER FOR VCCF24_1P0 FILTER
CAD NOTE:
PLACE CLOSE TO PCH PIN
PIN K2 AND K3
1D0V_S5
DESIGN NOTE:
1 2
C2309
C2309
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1V_VCCDSW_PCH
1 2
C2312
C2312
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
BOAED CAP FOR VCCMPHY_1P0
CAD NOTE:
PLACE 3~5MM FROM PACKAGE EDGE
PIN U21,U23,U25,U26,V26
1 2
DESIGN NOTE:
BOAED CAP FOR VCCDSW_1P0
CAD NOTE:
PLACE 3~5MM FROM PACKAGE EDGE
PIN BA29
C2307
C2307
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
3D3V_S5
DESIGN NOTE:
EDGE CAP FOR VCCPGPPG(PLACE HOLDER)
CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE
PIN AD41
DESIGN NOTE:
BOAED CAP FOR VCCATS
CAD NOTE:
PLACE 3~5MM FROM PACKAGE EDGE
PIN AD13
DESIGN NOTE:
EDGE CAP FOR VCCMPHY_1P0 AND VCCDUSB_1P0
CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE
PIN U21,U23,U25,U26,V26,AND AC17
4
3D3V_S0
1 2
1D0V_S5
1 2
1 2
C2313
C2313
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C2316
C2316
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C2319
C2319
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
5
B B
A A
1V_VCCAMPHYPLL_Sx 1V_VCCF24_Sx
1 2
C2314
C2314
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3D3V_S5
1 2
C2318
C2318
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DESIGN NOTE:
BOAED CAP FOR VCCMPHYPLL_1P0(PLACE HOLDER)
CAD NOTE:
PLACE 3~5MM FROM PACKAGE EDGE
PIN A42,A43 AND B43
DESIGN NOTE:
EDGE CAP FOR VCCPGPPBCH(PLACE HOLDER)
CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE
PIN BC42 AND BD40
3
1 2
3D3V_S5
1 2
C2317
C2317
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
C2315
C2315
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DESIGN NOTE:
BOAED CAP FOR VCCF24_1P0(PLACE HOLDER)
CAD NOTE:
PLACE 3~5MM FROM PACKAGE EDGE
PIN K2,K3
DESIGN NOTE:
BOAED CAP FOR VCCPHVC_3P3(PLACE HOLDER)
CAD NOTE:
PLACE 1~3MM FROM PACKAGE EDGE
PIN AN15
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH Power CAP
PCH Power CAP
PCH Power CAP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
23 107 Wednesday, September 23, 2015
23 107 Wednesday, September 23, 2015
23 107 Wednesday, September 23, 2015
-1
-1
-1
FAN
CPU_FAN_TACH_SIO 26
CPU_FAN_CTRL_SIO 26
SYS_FAN_TACH_SIO 26
SYS_FAN_CTRL_SIO 26
KBMS
MSCLK 92
MSDATA 92
KBCLK 92
KBDATA 92
LPC
LPC_AD_SIO_P0 19,68,91
LPC_AD_SIO_P1 19,68,91
D D
LPC_AD_SIO_P2 19,68,91
LPC_AD_SIO_P3 19,68,91
LPC_FRAME#_SIO 19,68,91
Power Manager
PWRGD_3V 40
RSMRST_SIO_N 20
SLP_S3_N 20,40,41,42,43,44,50
SLP_S4_N 8,20,42,44
PWRBTN_IN 64
PM_PWRBTN# 20
CLOCK
CLK_CLKIN_SIO 19
CLK_PCICLK_SIO 19
SMBUS
SMB_CLK_LAN 3 1
SIO
SMB_DATA_LAN 31
PECI
PECI_CPU 4,17
C C
5
HW Monitor
VCC_CORE
1 2
1 2
12
SIO_AGND
VDDQ
SIO_VIN1
SIO_AGND
G7901
G7901
COPPER-CLOSE-GP-U
COPPER-CLOSE-GP-U
HM_VCCP
R7946
R7946
10KR2F-2-GP
10KR2F-2-GP
HM_VCCP_R
C7908
C7908
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
1 2
R155
R155
10KR2F-2-GP
10KR2F-2-GP
12
C428
C428
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
SIO_VIN3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
SIO_VIN4
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
SIO_VIN5
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
SIO_VIN2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
+5V_AUX1
R7968
R7968
17K8R2F-GP
17K8R2F-GP
1 2
1 2
12
C7928
C7928
R7969
R7969
10KR2F-2-GP
10KR2F-2-GP
SIO_AGND
1 2
12
C7912
C7912
SIO_AGND
1 2
12
C7913
C7913
SIO_AGND
1 2
12
C7914
C7914
SIO_AGND
R7959
R7959
10KR2F-2-GP
10KR2F-2-GP
R7964
R7964
10KR2F-2-GP
10KR2F-2-GP
R7953
R7953
10KR2F-2-GP
10KR2F-2-GP
R7958
R7958
6K49R2F-1-GP
6K49R2F-1-GP
1 2
R7963
R7963
15KR2F-GP
15KR2F-GP
1 2
R7952
R7952
56KR2F-GP
56KR2F-GP
1 2
3D3V_S0
5V_S0
12V_S0
OTHERS
KBRST# 19
LPC_SERIRQ_PCH 19,91
LAN_LED3_CTRL 64
TURN_OFF_PWM 64
PS_ON_N 43
PLT_SATAEX_RST# 60
SIO_EUP_EN 41
PLTRST#_PCH 15,64,68,91,97
PLTRST_LAN 31
PLT_WLAN_RST# 61,63
PLTRST_X16 93
SUSLED_N 64
EC_ASF 15
LANWAKE_N_PCH 2 0
RTD2168_SMBUS_ON 58
LANWAKE_N 31,97
PWR_LEN_2_SIO 64
DP PWR CTRL
DP1_PWR_CTRL 57
DP2_PWR_CTRL 56
B B
COM Port
SP1_RTS_N 67
SP1_DTR_N 67
SP1_DSR_N 67
SP1_RXD 67
SP1_DCD_N 67
SP1_TXD 67
SP1_CTS_N 67
SP1_RI_N 67
COM Port
SP2_RTS_N 67
SP2_DTR_N 67
SP2_DSR_N 67
SP2_RXD 67
SP2_DCD_N 67
SP2_TXD 67
SP2_CTS_N 67
SP2_RI_N 67
SIO_CLK 58,64
SIO_DAT 58 ,64
SIO_PME_N 15
SLP_LAN_N 20
LAN_EN_PWR_SIO 97
PCHD_SMBUS_ON 64
PWRGD_PS 41,49
PLT_PCI_RST# 5 9
A A
PLTRST_X1 94
SPI Interface
1 2
1 2
R7965
R7965
10KR2F-2-GP
10KR2F-2-GP
10KR2F-2-GP
10KR2F-2-GP
SIO_CE_N
SIO_SO
1. layout trace is as far as po ssible short
2. Pull-up resistor 1Kohm near SPI Flash
1 2
R7966
R7966
R7967
R7967
10KR2F-2-GP
10KR2F-2-GP
PCH SMLINK To ECIO
SUSLED_R_N
SIO_WP#
1 2
R7912 0R0402-PAD-2-GP R7912 0R0402-PAD-2-GP
1 2
R7911 0R0402-PAD-2-GP R7911 0R0402-PAD-2-GP
1026
U7902
U7902
1
CE#
VCC
2
SO/IO1
HOLD#/IO3
3
WP#/IO2
SCK
4
GND
SI/IO0
PM25LQ010B-SCE-GP
PM25LQ010B-SCE-GP
change to 1Mbit
072.25010.0A01
8
7
6
5
SUSLED_N
PS_ON_N SIO_PS_ON#
ATX_3.3VSB
SIO_HOLD#
SCD1U16V2ZY-2GP (R_)
SCD1U16V2ZY-2GP (R_)
PARALLEL PORT
LPT_SLCT 69
LPT_PE 69
LPT_BUSY 69
LPT_ACK* 69
LPT_SLIN* 69
LPT_ERR* 69
LPT_AFD* 69
LPT_STB* 69
LPT_INIT* 69
LPT_PD[7:0] 69
5
REMINE LAYOUT
PCH
1 2
R7947
R7947
10KR2F-2-GP
10KR2F-2-GP
C7909
C7909
1 2
10KR2F-2-GP
10KR2F-2-GP
12
R7948
R7948
4
SIO_AGND
PECI_CPU
PLTRST#_PCH
PLT_PCI_RST#
PLT_WLAN_RST#
PLT_SATAEX_RST#
PLTRST_X16
PLTRST_LAN
PLTRST_X1
1 2
4
10KR2F-2-GP
10KR2F-2-GP
1 2
R7954 0R0402-PA D-2-GP R7954 0R0402-PAD-2-GP
1 2
R7932 43D2R2F-GP R7932 43D2R2F-GP
(R_)
(R_)
C15174 SC47P50V2JN-3GP
C15174 SC47P50V2JN-3GP
12
Reset signals
(63.R0034.1DL)
(63.R0034.1DL)
1 2
R7939 33R2J-2-GP
R7939 33R2J-2-GP
R7972 33R2J-2-GP R7972 33R2J-2-GP
1 2
1 2
R7956 33R2J-2-GP R7956 33R2J-2-GP
1 2
R7941 33R2J-2-GP R7941 33R2J-2-GP
1 2
R7927 33R2J-2-GP R7927 33R2J-2-GP
1 2
R7924 33R2J-2-GP R7924 33R2J-2-GP
1 2
R7926 33R2J-2-GP R7926 33R2J-2-GP
1 2
R529 0R2J-2-GP(R_)R529 0R2J-2-GP(R_)
1 2
R528
R528
0R0402-PAD-2-GP
0R0402-PAD-2-GP
R7949
R7949
SIO_SCK
SIO_SI
PECI_SIO_R
PLTRST*_SIO
PCIRST2#
PCIRST1#
LANWAKE_N_PCH
LANWAKE_N_SIO LANWAKE_N
ATX_3.3VSB
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
3
SIO_VREF
VRD
VRD_TMPIN2
C7925
C7925
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
Layout Note: place it
near CPU VORE MOS
SIO_AGND
ATX_3.3VSB
12
C7906
C7906
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
SIO_SCK SIO_SCK_R
PWROK3_1_R PWROK3_1
12
C7916
C7916
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
ATX_3.3VSB
SIO_EUP_EN_R
PWROK3_1_R
C7919
C7919
R7938
R7938
100KR2J-1-GP
100KR2J-1-GP
ATX_3.3VSB
3D3V_S0
1 2
SC1U25V3KX-1-GP
SC1U25V3KX-1-GP
1 2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
1 2
12
C7918
C7918
SC2D2U6D3V2MX-GP
SC2D2U6D3V2MX-GP
(R_)
(R_)
1 2
Note:
*Place C866, C898,C890 close to IT8731
12
C7903
C7903
To SB 3/5 EUP control
R7961
R7961
10KR2J-3-GP
10KR2J-3-GP
R7974
R7974
1 2
12
1KR2J-1-GP
1KR2J-1-GP
R7928
R7928
SIO_EUP_EN
(R_)
(R_)
C7920
C7920
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R7997
R7997
10KR2F-2-GP
10KR2F-2-GP
1 2
1 2
R221
R221
NTC-10K-19-GP-U
NTC-10K-19-GP-U
R7951
R7951
1 2
33R2J-2-GP
33R2J-2-GP
R7922
R7922
1 2
33R2J-2-GP
33R2J-2-GP
1 2
CLK_CLKIN_SIO
R8002
R8002
0R0402-PAD-2-GP
0R0402-PAD-2-GP
1 2
C7922 SCD1U16V2ZY-2GP
C7922 SCD1U16V2ZY-2GP
(R_)
(R_)
SIO_WRST#
For EC domain,
reset after power up
Power Good 3V
PCH
SP1_CTS_N
SIO_EUP_EN_R
SIO_CABLE_DET
LDRQ#
LANWAKE_N_SIO
CPU_FAN_TACH_SIO
CPU_FAN_CTRL_SIO
SYS_FAN_TACH_SIO
SYS_FAN_CTRL_SIO
PCHD_SMBUS_ON
PWR_LEN_2_SIO
RTD2168_SMBUS_ON
LAN_EN_PWR_SIO
SUSLED_R_N
PWRGD_PS
SP2_RXD
SP2_TXD
SP2_DSR_N
SP2_RTS_N
SIO_SI
SP2_DCD_N
SP2_CTS_N
SP2_RI_N
SP2_DTR_N
SIO_CE_N
EC_ASF
PCIRST1#
PCI R ST2#
SIO_VCORE
071.08733.000E
LPC I/F
PWRBT Signal
3
SP1_RTS_N
SP1_DSR_N
SP1_TXD
SP1_RXD
SP1_DTR_N
SP1_DCD_N
SP1_RI_N
U7901
U7901
1
CTS1#
2
5VSB_CTRL#/CIRRX2/GP16
3
PCIRSTIN#/CIRTX2/GP15/CPU_PG
4
3VSB
5
LDRQ#
6
SLP_SUS#/VLDT_EN/GP63
7
GNDD
8
FAN_TAC1
9
FAN_CTL1
10
FAN_TAC2/GP52
11
FAN_CTL2/GP51
12
FAN_TAC3/GP37
13
FAN_CTL3/GP36
14
FAN_TAC4/GP35
15
SUSWARN#/GP34
16
SUSACK#/GP33
17
DPWROK/GP32
18
PWMOUT/GP31
19
ATXPG/GP30
20
SIN2/GP27
21
SOUT2/GP26
22
DSR2#/GP25
23
RTS2#/GP24
24
SI/GP23
25
SCK/GP22
26
DCD2#/GP21
27
CTS2#/GP20
28
RI2#/GP17
29
DTR2#
30
CE_N/CIRTX1
31
PCH_C1/GP14/VCORE_EN
32
PWROK1/GP13
33
PCIRST1#/GP12
34
PCIRST2#/GP11
35
3VSB
36
VCORE
37
CK_SIO
CLKIN
38
GNDD
IT8732F-CX-GP
IT8732F-CX-GP
LPC_SERIRQ_PCH
LPC_FRAME#_SIO
LPC_AD_SIO_P0
LPC_AD_SIO_P1
LPC_AD_SIO_P2
LPC_AD_SIO_P3
KBRST#
A20_GATE
CLK_PCICLK_SIO
SIO_SO
PLTRST*_SIO
SIO_WRST#
PB_IN_N_1
To
SIO
R7977
R7977
0R2J-2-GP (R_)
0R2J-2-GP (R_)
SW_ON_N_SIO PM_PWRBT N#
12
C7904
C7904
SC100P50V2JN-3GP
SC100P50V2JN-3GP
125
128
126
124
127
RI1#
DTR1#
DCD1#
SIN1/D_RX1
SOUT1/D_TX1
SERIRQ39LFRAME#40LAD041LAD142LAD243LAD344KRST#/GP6245GA2046PCICLK47SO/GP5048LRESET#49WRST#50SMCLK151SMDAT152PCH_D1/SST/AMDTSI_D53GP77/KSO554PECI/AMDTSI_C55GP76/KSO456GP75/KSO357GP74/KSO258GP73/KSO159GP72/KSO0/JP160GP71/KSI161GP70/KSI062GP86/SMCLK063IO_SCI#/GP85/SMDAT0
SIO_CLK_DB
SIO_DAT_DB
(78.10421.2FL)
(78.10421.2FL)
12
C7921 SCD1U16V2ZY-2GP
C7921 SCD1U16V2ZY-2GP
R7976
R7976
1 2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
R7975
R7975
1 2
1 2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
SYS
122
123
112
121
120
119
114
118
113
116
115
117
PD7
PD6
PD1
PD5
PD0
PD3
PD2
PD4
STB#
RTS1#
DSR1#
FAN_CTL4
PWRBTN_IN
0.8VCC3-> S0_PWR_GOOD
SIO delay:
23h<3:2>
00b 01b 10b
400ms / 15ms / 200ms
PWRGD_3V
1 2
R7943
R7943
20KR2J-L2-GP
20KR2J-L2-GP
SIO_VREF
SYS_TMPIN1
C232
C232
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
(78.10421.2FL)
(78.10421.2FL)
109
111
110
108
INIT#
AFD#
ERR#
To
PCH
SIO_AGND
LPT_PD7
LPT_PD6
LPT_PD5
LPT_PD4
LPT_PD3
LPT_PD2
LPT_PD1
LPT_PD0
LPT_STB*
LPT_AFD*
LPT_ERR*
LPT_INIT*
LPT_SLIN*
LPT_ACK*
LPT_BUSY
LPT_PE
LPT_SLCT
106
104
105
103
107
PE
SLCT
ACK#
BUSY
SLIN#
VIN0/VCORE_0D8V
VIN1/VDIMMSTR_1D2V
RSMRST#/CIRRX1/GP55
PCIRST3#/GP10
3VSBSW#/GP40
PANSWH#/GP43
D_RX0/SMCLK2/GP46
D_TX0/SMDAT2/GP47
64
1 2
1 2
HSCK
VIN4/VLDT_12
VIN5/5VDUAL
MCLK/GP56
MDAT/GP57
KCLK/GP60
KDAT/GP61
PWROK2/GP41
SUSC#/GP53
PSON#/GP42
PME#/GP54
PWRON#/GP44
SYS_3VSB
COPEN#
R197
R197
10KR2F-2-GP
10KR2F-2-GP
RT3
RT3
NTC-10K-19-GP-U
NTC-10K-19-GP-U
HMOSI
HMISO
HSCE#
A3VSB
VIN2
VIN3
VCC3
VREF
TMPIN1
TMPIN2
TMPIN3
TSD-
GNDA
GNDD
SUSB#
VBAT
3VSB
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
SMB_DATA_LAN
SMB_CLK_LAN
TURN_OFF_PWM
EUP_DSW_SEL
DP1_PWR_CTRL
DP2_PWR_CTRL
PECI_SIO_R
Chassis Intrusion
2
IT8732 Pow er On Strapp ing Opt ions
JP1
DSW_EUP_SEL
Pin 60
If without use these pins, Please pull-up to 3.3V.
Don't let it floating
Pin19/24/25/30/48/57/71/75/77/80~83/96/95
HM_VCCP_R
SIO_VIN1
For Power monitor function
SIO_VIN2
SIO_VIN3
SIO_VIN4
SIO_VIN5
SIO_MAIN_VCC3
SIO_VREF
ICH_RSMRST_N_R RSMRST_SIO_N
LAN_LED3_CTRL
MSCLK
MSDATA
KBCLK
KBDATA
SLP_S3_N_R SLP_S3_N
SYS_3VSB
SIO_COPEN#
SIO_CLK
SIO_DAT
SIO_COPEN#
1KR2J-1-GP
1KR2J-1-GP
1 2
R7950 1KR2J-1-GP R7950 1KR2J-1-GP
1 2
C7901 SC1U10V2KX- 1 GP C7901 SC1U10V2KX- 1 GP
SYS_TMPIN1
VRD_TMPIN2
R7978 0R0402-PAD-2-GP R7978 0R0402-PAD-2-GP
1 2
SLP_LAN_N_C
R2067 0R0402-PA D-2-GP R2067 0R0402-PAD-2-GP
LAN_WAKE_SIO LANWAKE_N_PCH
R526 0R0402-PAD-2-GP R526 0R0402-PAD-2-GP
SLP_S4_N_R
R527 0R0402-PAD-2-GP R527 0R0402-PAD-2-GP
SIO_PS_ON#
PB_IN_N_1
SIO_PME_N
SW_ON_N_SIO
1 2
R533 0R0402-PAD-2-GP R533 0R0402-PAD-2-GP
R389
R389
1 2
VBAT_SIO
100R2F-L1-GP-U
100R2F-L1-GP-U
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R6702
R6702
1 2
0R0402-PAD
0R0402-PAD
R6701
R6701
(R_)
(R_)
1 2
2
1 2
1 2
1 2
3D3V_S5
(78.10421.2FL)
(78.10421.2FL)
SIO_AGND
C7915
C7915
12
ATX_3.3VSB
1 2
COPEN#_C
K A
C6701
C6701
0
12
R6703
R6703
200R2F-L-GP
200R2F-L-GP
D6701
D6701
1N4148WS-7-F-GP
1N4148WS-7-F-GP
(83.00355.F1F)
(83.00355.F1F)
SIO_COPEN#_N
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(R_)
(R_)
Description Symbol value
EUP 1
DSW
SIO_MAIN_VCC3
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3D3V_S0
SIO_AGND
C7917
C7917
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SIO_CLK_DB
SIO_DAT_DB
R2056
R2056
(R_)
(R_)
1 2
330R2J-3-GP
330R2J-3-GP
Q2001
Q2001
2N7002K-2-GP
2N7002K-2-GP
(R_)
(R_)
SIO_AVCC3
1 2
12
12
C7907
C7907
C7905
C7905
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SLP_LAN_N
SLP_S4_N
1 2
C7902 SC1U10V2KX-1GP C7902 SC1U10V2K X-1GP
1 2
R7925 0R0402-PA D-2-GP R7925 0R0402-PAD-2-GP
ATX_3.3VSB
Case Open Detection
Note:
Note:
*Place C869,C883 close to IT8731
*Recommended net "V_3P3_A" minimum trace width 12mils.
2
1
3V_VRTC_G3
1 2
R6704
R6704
1MR2J-1-GP
1MR2J-1-GP
PIN-CO N 2 -S-GP
PIN-CON2-S-GP
ATX_3.3VSB
1 2
EUP_DSW_SEL
SIO_PSON_N_1
D
S
G
SIO_PS_ON#
L7901
L7901
MHC1608S181NBP-GP
MHC1608S181NBP-GP
Note:
Place C887,C884 close
to IT8731
3V_VRTC_G3
COPEN# should be connecte d to GND
when this function is not be used.
JP1
JP1
JOWLE-CON2-5-GP
JOWLE-CON2-5-GP
(R_21.60909.102)
(R_21.60909.102)
CSOPN1
CSOPN1
1
2
(21.60909.102)
(21.60909.102)
R69
R69
1KR2J-1-GP
1KR2J-1-GP
ATX_3.3VSB
1
RN7904 SRN10KJ-11-GP-U RN7904 SRN10KJ-11-GP-U
1
SIO_CLK
SIO_DAT
SLP_LAN_N
SIO_PS_ON#
RSMRST_SIO_N
SIO_CABLE_DET
ATX_3.3VSB
SW_ON_N_SIO
SIO_DAT_DB
SIO_CLK_DB
LAN_LED3_CTRL
LANWAKE_N_SIO
DP1_PWR_CTRL
DP2_PWR_CTRL
LDRQ#
A20_GATE
PCIRST2#
PCIRST1#
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
4
2 3
R71 10KR2J-3-GP R71 10K R2J-3-GP
1 2
1 2
R72 10KR2J-3-GP (64.10015.6DL)R72 1 0KR2J-3-GP (64.10015.6DL)
1 2
R67 10KR2J-3-GP R67 10K R2J-3-GP
R8003
R8003
0R3J-0-U-GP
0R3J-0-U-GP
1 2
(R_)
(R_)
1 2
R70 10KR2J-3-GP R70 10K R2J-3-GP
1
RN7902 SRN10KJ-11-GP-U RN7902 SRN10KJ-11-GP-U
2 3
1 2
R8013 10KR2J-3-GP(R_)R8013 10K R2J-3-GP(R_)
1 2
R68 10KR2J-3-GP(R_)R68 10KR2J-3-GP(R_)
1
R1527 SRN10KJ-11-GP-U R1527 SRN10KJ-11-GP-U
2 3
1 2
R8000 10KR2J-3-GP R8000 10KR2J-3-GP
R8001 10KR2J-3-GP(R_)R8001 10K R2J-3-GP(R_)
1 2
RN7909
RN7909
1
2 3
(R_)
(R_)
SRN10KJ-11-GP-U
SRN10KJ-11-GP-U
SIO_IT8732
SIO_IT8732
SIO_IT8732
ize Document Number Rev
Custom
Custom
Custom
vHulk
vHulk
vHulk
ATX_3.3VSB
4
4
3D3V_S0
4
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
3D3V_S5
3D3V_S5
24 107 Wednesday, September 23, 2015
24 107 Wednesday, September 23, 2015
24 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
SPI ROM
WP# function is not supported when
SPI ROM is used on descriptor mode.
SPI_CS_PCH_N0
D D
C C
SPI_CS_PCH_N0 15
SPI_SO_PCH 15,22
SPI_WP_PCH 15,22,99
SW path
SPI_HOLD_PCH 15,22
SPI_CLK_PCH 15
SPI_SI_PCH 15,22
SPI_WP_ROM_C 15
SPI_WP_ROM_C2 15
SPI_WP_ROM_C
3D3V_S5
1 2
SPI Write Protect
SPI_SO_PCH SPI_SO_ROM
SPI_WP_PCH
SPI_WP_SW
R8006
R8006
10KR2J-3-GP
10KR2J-3-GP
D S
U405
U405
ME2N7002E-G-GP
ME2N7002E-G-GP
(84.2N702.J31)
(84.2N702.J31)
G
HW path
1 2
R7955
R7955
0R0402-PAD-2-GP
0R0402-PAD-2-GP
1-2: Disable BIOS_WP
2-3: Enable BIOS_WP
1 2
R2505 15R2J-GP R2505 15R2J-GP
1 2
R2507 15R2J-GP R2507 15R2J-GP
1 2
R7957 0R2J-2-GP(R_)R7957 0R2J-2-GP(R_)
3D3V_S5
SPI_WP_HW SPI_WP_ROM_C2
WP1
WP1
PIN-CON3-S-GP
PIN-CON3-S-GP
R8004
R8004
10KR2J-3-GP
10KR2J-3-GP
1 2
SPI_WP_ROM_PLL
123
3D3V_S5
1 2
R2502
R2502
1KR2J-1-GP
1KR2J-1-GP
U2501
U2501
1
CS#
2
SO/SIO1
SPI_WP_ROM SPI_CLK_ROM
3
SIO2
GND4SI/SIO0
MX25L12873FM2I-10G-GP
MX25L12873FM2I-10G-GP
(Q_72.12873.001,B_72.12873.001)
(Q_72.12873.001,B_72.12873.001)
SPI1
SPI1
1
2
3 6
4
SKT-G6179-GP-U
SKT-G6179-GP-U
62.10089.001
8
VCC
7
SIO3
6
SCLK
5
8
7
5
(R_62.10089.001)
(R_62.10089.001)
SPI socket mount in SA stage
SPI ROM TABLE
Q170/B150
3D3V_S5
SPI_HOLD_ROM
SPI_SI_ROM
WINBOND
1 2
C2501
C2501
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R2506 15R2J-GP R2506 15R2J-GP
R2508 15R2J-GP R2508 15R2J-GP
R2510 15R2J-GP R2510 15R2J-GP
MXIC
3D3V_S5
1 2
R2503
R2503
1KR2J-1-GP
1KR2J-1-GP
(R_)
(R_)
1 2
1 2
1 2
Single Flash Device: 15ohom
Dual Flash Device: 33ohm
SPI_HOLD_PCH
SPI_CLK_PCH
SPI_SI_PCH
Package
SOP8 / 16MB
SOP8 / 16MB
72.12873.001
72.25128.0E1
SA Vendor
SB
72.12873.001
72.25128.0E1
B B
VCCRTC
ATX_3.3VSB
1 2
R2514
R2514
1K5R2F-2-GP
1 2
1K5R2F-2-GP
R2516
R2516
45K3R2F-L-GP
45K3R2F-L-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Flash&RTC
Flash&RTC
Flash&RTC
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
25 107 Wednesday, September 23, 2015
25 107 Wednesday, September 23, 2015
25 107 Wednesday, September 23, 2015
-1
-1
-1
3V_VBAT1_G3
R2515
R2515
1 2
1KR2J-1-GP
+
+
1 2
A A
5
4
1KR2J-1-GP
BT1
BT1
BAT-AAA-BAT-029-K01-GP-U
BAT-AAA-BAT-029-K01-GP-U
PLACE NEAR PCH
3V_VBAT1_G3_R
C2504
C2504
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(78.10523.5FL)
(78.10523.5FL)
3V_BATIN_Sx
1
2
D2502
D2502
BAS40C-2-GP
BAS40C-2-GP
3
1 2
3V_VRTC_G3
3
1 2
C2503
C2503
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(78.10523.5FL)
(78.10523.5FL)
5
CPU_FAN_CTRL_SIO 24
CPU_FAN_TACH_SIO 24
SYS_FAN_CTRL_SIO 24
SYS_FAN_TACH_SIO 24
D D
C C
CPU FAN
4
CPU_FAN_CTRL_SIO
R2607
R2607
1 2
100R2J-2-GP
100R2J-2-GP
3D3V_S0
1 2
R2605
R2605
2K2R2J-2-GP
2K2R2J-2-GP
A K
PWM:21-28KHz
D2601
D2601
1SS355GP-GP
1SS355GP-GP
(R_)
(R_)
CPU_FAN_CTRL_CONN
C2602
C2602
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12V_S0
1 2
3
12V_S0
1 2
R2602
R2602
4K7R2J-2-GP
4K7R2J-2-GP
R2603
R2603
1 2
CPU_FAN_TACH_L CPU_FAN_TACH_1
20KR2J-L2-GP
FOX-CON4-11-GP
FOX-CON4-11-GP
1
2
3
4
FANC1
FANC1
20KR2J-L2-GP
1 2
R2606
R2606
8K2R2J-3-GP
8K2R2J-3-GP
2
1 2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
R2604
R2604
1
CPU_FAN_TACH_SIO
SYS FAN
SYS 3 PINS/4 PINS FAN CONTROL
Option for 3PIN CTRL
3D3V_S0
B B
SYS_FAN_CTRL_SIO
A A
5
1 2
R2613
R2613
100R2J-2-GP
100R2J-2-GP
R2610
R2610
2K2R2J-2-GP
2K2R2J-2-GP
1 2
(R_)
(R_)
D2602
D2602
1SS355GP-GP
1SS355GP-GP
A K
SYSTEM_FAN_PWM1_1
R2614
1 2
SYSTEM_FAN_PWM1_2
(R_)R2614
(R_)
10KR2J-3-GP
10KR2J-3-GP
4
R2615
100KR2J-1-GP
100KR2J-1-GP
1 2
(R_)
(R_)
C2601
C2601
SC1U16V3KX-2GP
SC1U16V3KX-2GP
1 2
(R_) R2615
(R_)
SYSTEM_FAN_PWM1_3
12V_S0 12V_S0
1 2
(R_)
(R_)
R2608
R2608
10KR2J-3-GP
10KR2J-3-GP
(R_63.10234.1DL)
B
SYS_FAN_3P_G
C
(R_)
(R_)
Q2601
Q2601
LMBT3904LT1G-GP
LMBT3904LT1G-GP
E
SYS_FAN_FB
1 2
(R_)
(R_)
R2617
R2617
330R2F-GP
330R2F-GP
1 2
1 2
3
(R_63.10234.1DL)
R2611
R2611
4K7R2J-2-GP
4K7R2J-2-GP
R2612
R2612
4K7R2J-2-GP
4K7R2J-2-GP
(R_63.10234.1DL)
(R_63.10234.1DL)
R2616
R2616
1 2
(R_)
(R_)
2K2R2J-2-GP
2K2R2J-2-GP
SYS_FAN_M
SYS_FAN_M1
E
B
(R_84.T3906.A11)
(R_84.T3906.A11)
C
1 2
TC2601
TC2601
E100U16VM-113-GP
E100U16VM-113-GP
(R_09.56710.F8L)
(R_09.56710.F8L)
B
MMBT3906-4-GP
MMBT3906-4-GP
Q2603
Q2603
E
MMBT3906-4-GP
MMBT3906-4-GP
Q2602
Q2602
(R_84.T3906.A11)
(R_84.T3906.A11)
C
1 2
R2609
R2609
0R0603-PAD
0R0603-PAD
SYS_FAN_3P_POWER
SYSTEM_FAN_PWM1_1
2
1 2
C2603
C2603
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1
2
3
4
SYS_FAN_TACH1_1
FOX-CON4-11-GP
FOX-CON4-11-GP
FANS1
FANS1
Co_layout with System FAN
SYS_FAN_3P_POWER
SYS_FAN_TACH1_1
12V_S0
1 2
R2618
R2618
4K7R2J-2-GP
4K7R2J-2-GP
FANS2
FANS2
1
2
3
BAOT-CON3-S4-GP-U
BAOT-CON3-S4-GP-U
(R_)
(R_)
R2619
R2619
1 2
SYS_FAN_TACH1_2
20KR2J-L2-GP
20KR2J-L2-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Thermal & FAN
Thermal & FAN
Thermal & FAN
S
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
1 2
R2601
R2601
0R0402-PAD
0R0402-PAD
R2620
R2620
8K2R2J-3-GP
8K2R2J-3-GP
1
SYS_FAN_TACH_SIO
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
26 107 Wednesday, September 23, 2015
26 107 Wednesday, September 23, 2015
26 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
HD_LINK
C2724
HDA_SDIN0_PCH 20
HDA_SDOUT_CODEC 20
HDA_RST#_CO DEC 20,27
HDA_SYNC_CO DEC 20
HDA_BITCLK_ CODEC 20
D D
AUDIO REAR PORT
AUD_IN_L 30
AUD_IN_R 30
AUDAMPIN_L 30
AUDAMPIN_R 30
MIC1_VREFO_L 30
AUD_MIC1_L 30
AUD_MIC1_R 30
MIC1_VREFO_R 30
SENSE_A 30
3D3V_S5
3D3V_S0
1 2
R2113 0 R3J-0-U-GP R2113 0R3J-0-U-GP
1 2
R2114 0 R3J-0-U-GP(R_)R211 4 0R3J-0 -U-GP(R_)
+5V_AUX1
C2724
SC10U10V 5KX-2GP
SC10U10V 5KX-2GP
C2725
C2725
SC10U10V 5KX-2GP
SC10U10V 5KX-2GP
11/21 Add C2930 C2931
AUDIO FRONT HEADER
1 2
L2702
SENSE_B 2 9
MIC2-VREFO 29
FP_MIC2_L 29
C C
FP_MIC2_R 29
FP_OUT_L 29
FP_OUT_R 29
LINE2_VREFO 29
DF2B6D8E-1-GP
DF2B6D8E-1-GP
P BY20120 9T-221Y-N-GP
PBY20120 9T-221Y-N-GP
(68.00335.071)
(68.00335.071)
D2702
D2702
(R_)
(R_)
K A
Analog Digital
L2702
R2715
R2715
10KR2J-3-G P
10KR2J-3-G P
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
1 2
C2726
C2726
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
AGND A GND
1 2
1 2
C2727
C2727
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
AGND A GND
DVDD_IO
1 2
AGND AGND
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
5V_LDOIN_SIO_Sx
C2731
C2731
SC10U10V 5KX-2GP
SC10U10V 5KX-2GP
C2713
C2713
1 2
C2730
C2730
Close to Pin 38
Close to Pin 25
Close to Pin 38
DVDD_IO
3D3V_S0
1 2
1 2
C2728
C2728
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U10V 5KX-2GP
SC10U10V 5KX-2GP
AUD_IN_L
AUD_IN_R
FP_OUT_L
FP_OUT_R
5V_LDOIN_SIO_Sx
LINE2_VREFO
AUD_MIC1_L
AUD_MIC1_R
FP_MIC2_L
FP_MIC2_R
MIC1_VREFO_R
MIC1_VREFO_L
MIC2-VREFO
MISC
HDA_RST#_CO DEC 20,27
MUTE 29,30
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
B B
Audio Internal Speaker Header
0712
R2231
R2231
1 2
MUTE
20KR2F-L-G P
20KR2F-L-G P
A A
5
3D3V_S0
R2228
R2228
20KR2F-L-G P
20KR2F-L-G P
1 2
C
B
MUTE_INT
E
AGND
MUTE AU D_SPK_L L*
MONO_R
MUTE_C
Q2201
Q2201
MMBT3904-4-GP
MMBT3904-4-GP
(84.T3904.H11)
(84.T3904.H11)
1 2
R5804
R5804
1KR2J-1-GP
1KR2J-1-GP
1 2
R5803
R5803
1KR2J-1-GP
1KR2J-1-GP
R2229
R2229
3K6R2F-GP
3K6R2F-GP
1 2
1 2
R2230
R2230
3K6R2F-GP
3K6R2F-GP
2K2R2J-2-G P
2K2R2J-2-G P
AUD_SPK_ RR*
4
1 2
R2232
R2232
AGND AGND
MONO_R
MONO_C_L MONO_L
MONO_C_R
SPK1
SPK1
1 2
3 4
5 6
7 8
BAOT-CONN 8 A -SFP-GP-U
BAOT-CONN8A-SFP-GP-U
1 2
R2226
R2226
2K2R2J-2-G P
2K2R2J-2-G P
AGND AGND
Q5808
Q5808
1
6
2
5
3 4
MBT3904DW 1 T1G-2-GP
MBT3904DW 1T1G-2-GP
75.03904.A7C
75.03904.A7C
1 2
C2729
C2729
ALC662-VD-GR-GP
ALC662-VD-GR-GP
71.00662.A0G
C2734
C2734
X
X
SC1U10V2 KX-1GP
SC1U10V2 KX-1GP
MONO_L
AGND AGND
AVDD2
AVDD2
U2701
U2701
23
LINE1_L/PORT_C_L
24
LINE1_R/P ORT_C_R
14
LINE2_L/PORT_E_L
15
LINE2_R/P ORT_E_R
29
LDO_IN
31
LINE2_VREFO
21
MIC1_L/PO RT_B_L
22
MIC1_R/PORT_B_R
16
MIC2_L/PO RT_F_L
17
MIC2_R/PORT_F_R
32
MIC1_VREFO_R
28
MIC1_VREFO_L
30
MIC2_VREFO
1 2
(R_)
(R_)
C2223
C2223
25
38
1
9
DVDD
DVDD_IO
LDO_OUT1
LDO_OUT2
DVSS
AVSS126VREF
AVSS2
7
42
AGND
C2733
C2733
SC10U10V 5KX-2GP
SC10U10V 5KX-2GP
Close to codec
5V_RR
1 2
1 2
SC1U10V2 KX-1GP
SC1U10V2 KX-1GP
11
6
10
33
12
BEEP
SYNC
BITCLK
RESET#
LINE1_VREFO
PIN37_VREFO
JDREF
4
27
37
40
JDREF
AUDIO_VREF
1 2
1 2
R2716
R2716
20KR2F-L-G P
20KR2F-L-G P
AGND
5V_S0
L2201
L2201
1 2
PBY20120 9T-800Y-N-1GP
PBY20120 9T-800Y-N-1GP
C2224
C2224
43
44
34
LFE/PORT_G_R
CENTER/PORT_G_L
SURR_L/PO RT_A_L
SURR_R/PORT_A_R
FRONT_L/PORT_D_L
FRONT_R/PORT_D_R
GPIO02REGREF3GPIO1
CD_L18CD_GND19CD_R
20
ANTI-POP_GPIO1_L
1 2
C2732
C2732
SC10U10V 5KX-2GP
SC10U10V 5KX-2GP
3
SENSE_B
13
SENSE_A
SENSE_B
SENSE_A
HDA_RST#_CO DEC
1 2
C2714
C2714
SC22P50V2JN-4GP
SC22P50V2JN-4GP
(R_)
(R_)
HDA_SYNC_CO DEC
HDA_BITCLK_ CODEC
1 2
C2712
C2712
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SDATA_OUT
SDATA_IN
S/PDIF_OUT
EAPD
DMIC_DATA
DMIC_CLK
ANTI-POP_GP IO1
HDA_RST#_CO DEC
5
HDA_SDOUT_CODEC
8
HDA_SDIN0_CODEC
48
47
EAPD_DEP OP
45
46
39
LINE_SPK _L
41
LINE_SPK _R MONO_R
35
AUDAMPIN_L
36
AUDAMPIN_R
POP Circuit
Control by software driver and CODEC GPIO.
GPIO driving low at:
1).Initial state
2).Suspend to S1
3).Resume from S1.
R5830
R5830
1 2
1KR2J-1-GP
1KR2J-1-GP
Control line
R2714
R2714
1 2
1 2
C2213 SC1U10V2KX-1G P C2 213 SC1U10V2KX-1GP
1 2
C2214 SC1U10V2KX-1G P C2 214 SC1U10V2KX-1GP
33R2J-2-GP
33R2J-2-GP
HDA_SDIN0_PCH
Rear
E
B
AZRST
MMBT3906-4-GP
MMBT3906-4-GP
C
Q5817
Q5817
1 2
ANTI-POP_GP IO1 ANTI-PO P_GPIO1 _R
R2710 1KR2J-1-GP
R2710 1KR2J-1-GP
(R_)
(R_)
EAPD_DEP OP
1 2
R2713 1KR2J-1-GP R2 713 1KR2J-1-GP
1 2
MONO_L
3D3V_S5
1 2
C2210
C2210
SC4D7P50 V2CN-1GP(R_)
SC4D7P50 V2CN-1GP(R_)
R2711
R2711
10KR2J-3-G P
10KR2J-3-G P
3.3_POP
E
C
Line-in
Line-out
Mic-in 1
Mic-in 2 pin16/17
FP-out
E
B
C
B
MMBT3906-4-GP
MMBT3906-4-GP
Q2702
Q2702
2
ALC662-VC\VD
pin23/24
pin35/36
pin21/22
pin14/15
1 2
C2717
C2717
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R2706
R2706
1 2
0R0603-PAD
0R0603-PAD
Layout: separately placed around AGND and GND
1 2
C2718
C2718
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
AGND AGND
R2705
R2705
1 2
0R0603-PAD
0R0603-PAD
AGND
1 2
C2720
C2720
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R2707
R2707
1 2
0R0603-PAD
0R0603-PAD
AGND
DIGITAL
Layout close to C5811
Add & reserve 0.1uF for pop-noise
MUTE_RR
MMBT3906-4-GP
MMBT3906-4-GP
Q2703
Q2703
1 2
C2722
C2722
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
05/05
1 2
C2721
C2721
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
(R_)
(R_)
R2708
R2708
1 2
10KR2J-3-G P
10KR2J-3-G P
C2723
C2723
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
MUTE_R
R2712
R2712
1 2
220KR2J-L 2-GP
220KR2J-L 2-GP
Control circuit
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Audio Codec_ALC662
Audio Codec_ALC662
Audio Codec_ALC662
ize Document Num ber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
S
Custom
Custom
Custom
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1 2
C2719
C2719
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R2701
R2701
1 2
0R0603-PAD
0R0603-PAD
C
B
Q2704
Q2704
MMBT3906-4-GP
MMBT3906-4-GP
E
3D3V_S5
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
MUTE
27 107 Wednesday, S eptember 23 , 2015
27 107 Wednesday, S eptember 23 , 2015
27 107 Wednesday, S eptember 23 , 2015
AGND AGND AGND AGND
A
NALOG
-1
-1
-1
5
D D
C C
4
3
2
1
(R)
B B
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
AMP_(R)
AMP_(R)
AMP_(R)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
28 107 Wednesday, September 23, 2015
28 107 Wednesday, September 23, 2015
28 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
D D
C C
FP_AUDIO_PRESENCE_N 15
SENSE_B 27
MIC2-VREFO 27
FP_MIC2_L 27
FP_MIC2_R 27
FP_OUT_L 27
FP_OUT_R 27
LINE2_VREFO 27
MUTE 27,30
MIC2-VREFO
TC2925
TC2925
FP_MIC2_L FP_MIC2_L_C
TC2924
TC2924
FP_MIC2_R FP_MIC2_R_C
TC2903
TC2903
FP_OUT_L
TC2904
TC2904
FP_OUT_R
LINE2_VREFO
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
E100U16VM-113-GP
E100U16VM-113-GP
1 2
E100U16VM-113-GP
E100U16VM-113-GP
D2906
D2906
3
BAT54A-7-F-2-GP
BAT54A-7-F-2-GP
FP_OUT_L_C
FP_OUT_R_C
D2907
D2907
3
BAT54A-7-F-2-GP
BAT54A-7-F-2-GP
2
1
1 2
1 2
1 2
1 2
2
1
FP_MICVREF_D1
FP_MICVREF_D2
R2948
R2948
1KR2J-1-GP
1KR2J-1-GP
R2949
R2949
1KR2J-1-GP
1KR2J-1-GP
R2945
R2945
R2947
R2947
LINE2_VREFO_D1
LINE2_VREFO_D2
75R2J-1-GP
75R2J-1-GP
75R2J-1-GP
75R2J-1-GP
R2932
R2932
1 2
R2941
R2941
1 2
(R_)
(R_)
R2942
R2942
1 2
R2944
R2944
1 2
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP(R_)
4K7R2J-2-GP(R_)
22KR2J-GP
22KR2J-GP
R2946
R2946
1 2
AGND
1 2
R2943
R2943
22KR2J-GP
22KR2J-GP
MIC2_LL
MIC2_RR
FP_OUTR_LL
FP_OUTR_RR
AGND
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C2936
C2936
1 2
FL2906 0R0603-PAD FL2906 0R0603-PAD
1 2
FL2907 0R0603-PAD FL2907 0R0603-PAD
1 2
FL2908 0R0603-PAD FL2908 0R0603-PAD
1 2
FL2909 0R0603-PAD FL2909 0R0603-PAD
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C2937
C2937
AGND
6
3
2
MMDT3904-7-F-1-GP
MMDT3904-7-F-1-GP
1
4
AGND
AGND
6
3
2
MMDT3904-7-F-1-GP
MMDT3904-7-F-1-GP
1
4
AGND AGND
FP_OUTR_SENSE
MIC2_JD
LINE2_JD
FP_OUTR_RR FP_OUTR_LL
Q2901
Q2901
(075.01C03.007C)
(075.01C03.007C)
5
MIC2_RR
Q2902
Q2902
(075.01C03.007C)
(075.01C03.007C)
5
Front Audio Port De-Pop Circuit
R2952
R2952
1 2
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C2934
C2934
MIC2_L
MIC2_R
FP_OUTR_L
FP_OUTR_R
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C2935
C2935
MUTE
MUTE
SENSE_B
FP_OUT_LL*
1KR2J-1-GP
1KR2J-1-GP
R2953
R2953
1 2
FP_OUT_RR*
1KR2J-1-GP
1KR2J-1-GP
R2950
R2950
1 2
MIC2_LL*
1KR2J-1-GP
1KR2J-1-GP
R2951
R2951
1 2
MIC2_RR*
1KR2J-1-GP
1KR2J-1-GP
R2908 0R2J-2-GP
R2908 0R2J-2-GP
R2909 20KR2F-L-GP R2909 20KR2F-L-GP
R2907 39K2R2F-L-GP R2907 39K2R2F-L-GP
1 2
(R_)
(R_)
1 2
1 2
MIC2_LL
Layout: Near Codec
B B
Audio Front Panel Header
21.62895.205
AUDF1
AUDF1
MIC2_L
MIC2_R
FP_OUTR_R
FP_OUTR_SENSE
FP_OUTR_L
A A
5
4
1 2
3 4
5 6
7 8
X
X
9 10
CLX-CONN 1 0 A-SFP1-GP
CLX-CONN10A-SFP1-GP
1 2
R2937
R2937
0R0402-PAD-1-GP
0R0402-PAD-1-GP
AGND AGND
3
FP_AUDIO_PRESENCE*_C
MIC2_JD
LINE2_JD
R2933
R2933
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
1 2
1 2
C2933
C2933
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
R2935
R2935
1 2
0R0402-PAD-2-GP
0R0402-PAD-2-GP
FP_AUDIO_PRESENCE_N
2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Audio IO_Front
Audio IO_Front
Audio IO_Front
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
29 107 Wednesday, September 23, 2015
29 107 Wednesday, September 23, 2015
29 107 Wednesday, September 23, 2015
-1
-1
-1
5
4
3
2
1
BACK PANEL PHONJACKS
AUDIO REAR PORT
AUD_IN_L 27
D D
AUD_IN_R 27
AUDAMPIN_L 27
AUDAMPIN_R 27
MIC1_VREFO_L 27
AUD_MIC1_L 27
AUD_MIC1_R 27
MIC1_VREFO_R 27
SENSE_A 27
MUTE 27,29
The cap need to
close codec on layout.
The cap need to
close codec on layout.
C C
The cap need to
close codec on layout.
LINEIN_JD
AUD_IN_L
AUD_IN_R
FRONT_JD
AUDAMPIN_L
AUDAMPIN_R
MIC1_JD
MIC1_VREFO_L
TC3005
AUD_MIC1_L
AUD_MIC1_R
MIC1_VREFO_R
TC3005
TC3006
TC3006
NOTE:
MIC GROUND ROUT BACK TO CODEC
ALONG WITH MIC_TRACE.
TIE MIC_GND TO AGND NEAR CODEC
TC3002
TC3002
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
TC3003
TC3003
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
TC3001
TC3001
1 2
E100U16VM-113-GP
E100U16VM-113-GP
TC3004
TC3004
1 2
E100U16VM-113-GP
E100U16VM-113-GP
INCREASE VREF CAP IF
POP IS PRESENT
1 2
1 2
AUD_MIC1_LL_1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
AUD_MIC1_RR_1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
AUD_IN_LL_1
AUD_IN_RR_1
AUDAMPIN_L_C
AUDAMPIN_R_C
R3008
R3008
R3011
R3011
2K2R2J-2-GP
2K2R2J-2-GP
1 2
1 2
2K2R2J-2-GP
2K2R2J-2-GP
R3009
R3009
1 2
R3010
R3010
1 2
R3002
R3002
75R2J-1-GP
75R2J-1-GP
R3003
R3003
75R2J-1-GP
75R2J-1-GP
R3004
R3004
1 2
75R2J-1-GP
75R2J-1-GP
1 2
R3005
R3005
75R2J-1-GP
75R2J-1-GP
22KR2J-GP
22KR2J-GP
AUD_MIC1_LL
75R2J-1-GP
75R2J-1-GP
75R2J-1-GP
75R2J-1-GP
FB_AUDOUTR_L
FB_AUDOUTR_R
1 2
R3006
R3006
AGND
AUD_MIC1_RR
AUD_IN_LL
AUD_IN_RR
1 2
R3007
R3007
22KR2J-GP
22KR2J-GP
1 2
0R0603-PAD
0R0603-PAD
1 2
0R0603-PAD
0R0603-PAD
SC100P50V2JN-3GP
SC100P50V2JN-3GP
Layout: PLACE NEAR CONN
LINE IN (BLUE)
1 2
L3002
L3002
0R0603-PAD
0R0603-PAD
1 2
L3003
L3003
0R0603-PAD
0R0603-PAD
C3001
C3001
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
AGND
1 2
C3002
C3002
SC100P50V2JN-3GP
SC100P50V2JN-3GP
AUDIN_L
AUDIN_R
Layout: PLACE NEAR CONN
LINE OUT (GREEN)
1 2
L3004
L3004
0R0603-PAD
0R0603-PAD
1 2
L3005
L3005
0R0603-PAD
0R0603-PAD
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C3003
C3003
AGND
1 2
1 2
C3004
C3004
SC100P50V2JN-3GP
SC100P50V2JN-3GP
FB_AUDOUT_L
FB_AUDOUT_R
Layout: PLACE NEAR CONN
MIC IN (PINK)
1 2
C3006
C3006
SC100P50V2JN-3GP
SC100P50V2JN-3GP
AUD_MIC_1L
AUD_MIC_1R
L3001
L3001
L3006
L3006
C3005
C3005
1 2
AGND
AUDIN_L
LINEIN_JD
AUDIN_R
FB_AUDOUT_L
FRONT_JD
FB_AUDOUT_R
AUD_MIC_1L
MIC1_JD
AUD_MIC_1R
ESDGND
Line in
Line Out
Mic
AUDR1
AUDR1
32
33
34
35
22
23
24
25
2
3
4
5
1
G1
G2
G3
G4
NP1
AUDIO-JK187-GP
AUDIO-JK187-GP
AGND
22.10251.831
BLUE
LIME
PINK
Rear Audio Port De-Pop Circuit
R3014
R3014
1 2
1KR2J-1-GP
1KR2J-1-GP
R3015
R3015
1 2
1KR2J-1-GP
1KR2J-1-GP
R3016
R3016
1 2
1KR2J-1-GP
1KR2J-1-GP
R3017
R3017
1 2
1KR2J-1-GP
1KR2J-1-GP
R3018
R3018
1 2
1KR2J-1-GP
1KR2J-1-GP
R3019
R3019
1 2
1KR2J-1-GP
1KR2J-1-GP
SENSE_A
AUD_IN_LL*
AUD_IN_RR*
FB_AUDOUTR_L*
FB_AUDOUTR_R*
AUD_MIC1_LL*
AUD_MIC1_RR*
MUTE
MUTE
MUTE
NEAR CODEC
1 2
R30125K1R2F-2-GP R30125K1R2F-2-GP
1 2
R3001 10KR2F-2-GP R3001 10KR2F-2-GP
1 2
R301320KR2F-L-GP R301320KR2F-L-GP
6
3
2
MMDT3904-7-F-1-GP
MMDT3904-7-F-1-GP
1
4
AGND AGND
6
3
2
MMDT3904-7-F-1-GP
MMDT3904-7-F-1-GP
1
4
AGND AGND
6
3
2
MMDT3904-7-F-1-GP
MMDT3904-7-F-1-GP
1
4
AGND AGND
FRONT_JD
LINEIN_JD
MIC1_JD
AUD_IN_RR AUD_IN_LL
Q3001
Q3001
(075.01C03.007C)
(075.01C03.007C)
5
FB_AUDOUTR_R FB_AUDOUTR_L
Q3002
Q3002
(075.01C03.007C)
(075.01C03.007C)
5
AUD_MIC1_RR AUD_MIC1_LL
Q3003
Q3003
(075.01C03.007C)
(075.01C03.007C)
5
B B
audio ESD design
2
3
FB_AUDOUT_L AUDIN_L
1
D3005
D3005
AZ5125-02S-R7G-1-GP
AZ5125-02S-R7G-1-GP
075.05125.007D
075.05125.007D
(75.05125.07D)
(75.05125.07D)
AUDIN_R FRONT_JD LINEIN_JD FB_AUDOUT_R
2
1
D3002
D3002
AZ5125-02S-R7G-1-GP
AZ5125-02S-R7G-1-GP
075.05125.007D
075.05125.007D
(75.05125.07D)
(75.05125.07D)
3
1 2
G2406
G2406
0R0603-PAD
A A
5
0R0603-PAD
ESDGND
4
2
1
3
3
AUD_MIC_1L
AUD_MIC_1R
D3003
D3003
AZ5125-02S-R7G-1-GP
AZ5125-02S-R7G-1-GP
075.05125.007D
075.05125.007D
(75.05125.07D)
(75.05125.07D)
D3006
D3006
AZ5125-01H-R7G-GP
AZ5125-01H-R7G-GP
(75.YSE05.077)
(75.YSE05.077)
1 2
D3004
D3004
AZ5125-01H-R7G-GP
AZ5125-01H-R7G-GP
(75.YSE05.077)
(75.YSE05.077)
1 2
MIC1_JD
D3001
D3001
AZ5125-01H-R7G-GP
AZ5125-01H-R7G-GP
(75.YSE05.077)
(75.YSE05.077)
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Audio IO_Rear
Audio IO_Rear
Audio IO_Rear
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
C
C
C
vHulk
vHulk
vHulk
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
Hsichih, Taipei Hsien
30 107 Wednesday, September 23, 2015
30 107 Wednesday, September 23, 2015
30 107 Wednesday, September 23, 2015
-1
-1
-1