Acer TravelMate 292 Schematics Rev20

A
1 1
B
C
D
E
2 2
Compal Confidential
DCL56 Schematics Document
Banias uFCBGA/uFCPGA Package with Odem Core Logic
2004-05-07 for MP
3 3
REV:20
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
401286
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2231
星期四
, 16, 2004
十二月
144
E
of
A
Compal confidential
B
C
D
E
Block Diagram
Model Name :DCL56 File Name : LA-2231 Rev:20
Mobile Banias
1 1
Fan Control
VGA Board
page 30
CRT Connector
AGP Conn
page 18
page 17
AGP4X(1.5V)
uFCBGA/uFCPGA CPU
478pin
System Bus
400MHz
page 4,5
HD#(0..63)HA#(3..31)
Odem B
uFCBGA-593 pin
page 6,7,8
Memory BUS(DDR)
2.5V 200MHz
Thermal Sensor
MAX6654
page 4
DDR-SO-DIMM X2
BANK 0, 1, 2, 3
Clock Generator
page 9,10,11
page 12
SPR Conn
page 34
2 2
PCI BUS
MINI PCI I/F
1394 Controller
VIA VT6301S
page 22page 23
1394
3 3
Connector
page 22
LAN
RTL 8100L
page 21
RJ45
page 21
3.3V 33MHz
CardBus
ENE CB1410
page 19
Slot 0
page 20
MULTIO
ICH4-M
BGA-421
LPC BUS
3.3V 33MHz
page 13,14,15
3.3V 48MHz
3.3V 24.576MHz
3.3V ATA100
USB port 0, 1, 2
Ext. Board
USBx3
USB conn
page 25
AC-LINK
USB port 4
BlueTooth I/F
page 25
LED INDICATE
page 17
Winbond W83L518D
page 24
SD/MS Slot
page 24
HDD
page 16
D
CDROM
AC97 Codec
page 16
ALC250
page 31
AMP& Phone Jack
page 32
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
401286
星期四 十二月
SCHEMATIC, M/B LA-2231
004
E
A
of
244, 16, 2
page 25
Power On/Off Reset & RTC
page 30
DC/DC Interface Suspend
4 4
page 33
Power Circuit DC/DC
page 35,36,37,38,39,40,41,42
A
SIO LPC47N217
PARALLEL
FIR
Legacy I/O Option
B
page 26
SERIAL
ENE 910
LPC to X-BUS & KBC
page 28
EC I/O Bu ffer
page 29
BIOS Int.KBD
page 29 page 17
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Touch Pad
C
A
B
C
D
E
Voltage Rails
Power Plane Description
1 1
B+ +CPU_CORE
VIN
Adapter power supply (19V) AC or batte ry power rail for power circuit.
Core voltage for CPU +VCCP ON OF F OFF1.05V rail for Processor I/O +1.2VS
1.2VS switched power rail for MCH +1.25VS 1.25V switched power rail +1.5VALW +1.5V
1.5V power rail
1.5V power rail
S0-S1 S3 S5
N/A N/A N/A
ON OFF
ON OFF ON OFF OFF ON ON ON ON ON OF F
N/AN/AN/A OFF
OFF
Board ID Table
BID2 BID1 BID0 PCB Revision
000 00 0 0 1 1 1 1
1
1
0 11 0
0 0
1
0
1 11
0.1
0.2
0.3
0.4
AGP 4X ON OF F O F F+1.5VS +1.8VALW 1.8V power rail O N ON +1.8VS +2.5V
1.8V switched power rail
2.5V power rail +2.5VS 2.5V switched power rail +3VALW +3V
2 2
+3VS +5VALW +5V +5VS
3.3V always on power rail
3.3V power rail
3.3V switched power rail
5V always on power rail 5V power rail 5V switched power rail 12V always on power rail
RTCVCC
RTC power
ON ON ON ON ON ON ON ON ON ON ON+12VALW ON
ON*
OFF
OFF OFF
ON
OFF
OFF ON ON*
OFF
ON OFF
OFF
ON
ON* OFF
OFF
OFF
ON
ON* ON
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Devices
Device IDSEL # REQ # / GNT # Interrupts
VGA
CardBus
LAN
3 3
Mini-PCI
1394
AD19 AD17 AD18,AD22 AD16 0
2
3PIRQD
1/4
PIRQA PIRQC
PIRQC/PIRQD PIRQB
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC, M/B LA-2231
Size Document Number Rev
401286
Date: Sheet
星期四
, 16, 2004
十二月
344
E
of
5
H_RS#[0..2] HD#[0..63]
HA#[3..31]6
H_REQ#[0..4]6
D D
C C
B B
A A
+VCCP
ITP_TDI
R262
1 2
150_0402_5%
ITP_TRST#
R265
1 2
680_0402_5%
Note: Placement near to CPU Conn
1 2
+VCCP
ITP_DBRESET#14
+3VALW
H_PWRGD13
+VCCP
5
R272 56_0402_5%
HA#[3..31] H_REQ#[0..4]
CLK_CPU_ITP12
CLK_CPU_ITP#12
CLK_CPU_BCLK12
CLK_CPU_BCLK#12
H_DEFER#6
H_LOCK#6
H_CPURST#6
H_TRDY#6
R285 150_0402_5%
1 2
ITP_DBRESET#
1 2
R257 330_0402_5%
H_CPUSLP#13
R254 @1K_0402_5%
THERMTRIP#14
H_ADSTB#06 H_ADSTB#16
H_BPRI#6
H_DPSLP#7,13 H_DPWR#7
R261 @1K_0402_5%
1 2 1 2
H_ADS#6 H_BNR#6
H_BR0#6 H_DRDY#6
H_HIT#6 H_HITM#6
H_DBSY#6
H_RS#[0..2] 6
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_IERR#
H_CPURST#
H_RS#0 H_RS#1 H_RS#2
1 2
R271 0_0402_5%
PRO_CHOT#
ITP_TCK ITP_TDI ITP_TDO TEST1 TEST2 ITP_TMS ITP_TRST#
THERMDA THERMDC
AA3 AA2
AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1
AE5
A16 A15
B15 B14
B11
C19 A10 B10 B17
A13 C12 A12
F23 C11 B13
B18 A18 C17
P4 U4 V3 R3 V2
W1
T4
W2
Y4 Y1 U1
Y3
R2 P3 T2 P1 T1
U3
N2 L1
J3 N4 L4 H2 K3 K4 A4
J2
H1 K1 L2
M3
C8 B8 A9 C9
A7
M2
B7
E4 A6
C5
4
JP12A
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24#
ADDR GROUP
A25# A26# A27# A28# A29# A30# A31#
REQ0# REQ1# REQ2# REQ3# REQ4#
ADSTB0# ADSTB1#
ITP_CLK0 ITP_CLK1
BCLK0
HOST CLK
BCLK1
ADS# BNR# BPRI# BR0# DEFER# DRDY# HIT#
CONTROL GROUP
HITM# IERR# LOCK# RESET#
RS0# RS1# RS2# TRDY#
BPM0# BPM1# BPM2# BPM3#
DBR# DBSY# DPSLP# DPWR# PRDY# PREQ# PROCHOT#
PWRGOOD SLP# TCK TDI TDO TEST1 TEST2 TMS TRST#
THERMDA THERMDC THERMTRIP#
AMP_1473129-1
4
Banias
MISC
THERMAL DIODE
DATA GROUP
LEGACY CPU
D0# D1# D2# D3# D4# D5# D6# D7# D8#
D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DINV0# DINV1# DINV2# DINV3#
DSTBN0# DSTBN1# DSTBN2# DSTBN3# DSTBP0# DSTBP1# DSTBP2# DSTBP3#
A20M# FERR#
IGNNE#
INIT#
LINT0 LINT1
STPCLK#
SMI#
3
HD#[0..63] 6
HD#0
A19
HD#1
A25
HD#2
A22
HD#3
B21
HD#4
A24
HD#5
B26
HD#6
A21
HD#7
B20
HD#8
C20
HD#9
B24
HD#10
D24
HD#11
E24
HD#12
C26
HD#13
B23
HD#14
E23
HD#15
C25
HD#16
H23
HD#17
G25
HD#18
L23
HD#19
M26
HD#20
H24
HD#21
F25
HD#22
G24
HD#23
J23
HD#24
M23
HD#25
J25
HD#26
L26
HD#27
N24
HD#28
M25
HD#29
H26
HD#30
N25
HD#31
K25
HD#32
Y26
HD#33
AA24
HD#34
T25
HD#35
U23
HD#36
V23
HD#37
R24
HD#38
R26
HD#39
R23
HD#40
AA23
HD#41
U26
HD#42
V24
HD#43
U25
HD#44
V26
HD#45
Y23
HD#46
AA26
HD#47
Y25
HD#48
AB25
HD#49
AC23
HD#50
AB24
HD#51
AC20
HD#52
AC22
HD#53
AC25
HD#54
AD23
HD#55
AE22
HD#56
AF23
HD#57
AD24
HD#58
AF20
HD#59
AE21
HD#60
AD21
HD#61
AF25
HD#62
AF22
HD#63
AF26
D25 J26 T24 AD20
C23 K24 W25 AE24 C22 L24 W24 AE25
C2 D3 A3 B5 D1 D4
C6 B4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
H_DINV#0 6 H_DINV#1 6 H_DINV#2 6 H_DINV#3 6
H_DSTBN#0 6 H_DSTBN#1 6 H_DSTBN#2 6 H_DSTBN#3 6 H_DSTBP#0 6 H_DSTBP#1 6 H_DSTBP#2 6 H_DSTBP#3 6
H_A20M# 13 H_FERR# 13 H_IGNNE# 13 H_INIT# 13 H_INTR 13 H_NMI 13
H_STPCLK# 13 H_SMI# 13
3
+VCCP
+VCCP
1 2
R269 @56_0402_5%
1 2
R268 56_0402_5%
EC_SMB_CK228,34 EC_SMB_DA228,34
2
B
PRO_CHOT#
+3VS
R290 @1K_0402_5%
1 2
1
C
Q34 @2SC2411K_SOT23
E
3
2
2
C86
1
2200P_0402_50V7K
THERMDA
2
THERMDC
PROCHOT#
1
+3VS
1
C91
0.1U_0402_16V4Z
2
U15
2
D+
3
D-
8
SCLK
7
SDATA
ADM1032ARM_RM8
Title
SCHEMATIC, M/ B LA-2231
Size Document Number Rev
A3
Date: Sheet of
星期四
1
VDD1
6
ALERT#
4
THERM#
5
GND
Note: Placement near to ITP Conn
Compal Electronics, Inc.
401286
, 16, 2004
十二月
12
R79 @10K_0402_5%
+VCCP
1 2
R273 @54.9_0402_1%
1 2
R264 @54.9_0402_1%
1 2
R259 39.2_0603_1%
1 2
R274 27.4_0402_1%
1
ITP_TDO
H_CPURST#
ITP_TMS
ITP_TCK
444
5
JP12B
1 2
R217 @54.9_0402_1%
1 2
R211 @54.9_0402_1%
+CPU_CORE
12
R218
27.4_0402_1%
5
+1.8VS
+VCCP
PSI#39 CPU_VID039
CPU_VID139 CPU_VID239 CPU_VID339 CPU_VID439 CPU_VID539
12
R221
54.9_0402_1%
D D
C C
+VCCP
12
R233
B B
A A
1K_0402_1%
1 2
R231 2K_0402_1%
12
R238
27.4_0402_1%
12
R239
54.9_0402_1%
VCCSENSE
AE7
VSSSENSE
AF6
F26
B1 N1
AC26
P23
W4
D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16
K6 L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6 T22 U21
D6
D8 D18 D20 D22
E5 E7
E9 E17 E19 E21
F6
F8 F18
E1
E2
F2
F3
G3
G4
H4
GTL_REF0
AD26
E26
G1 AC1
COMP0 COMP1 COMP2 COMP3
1 2
R263 @1K_0402_5%
1 2
R212 @1K_0402_5%
1 2
R266 @1K_0402_5%
1 2
R260 @1K_0402_5%
1 2
R267 @1K_0402_5%
P25 P26 AB2 AB1
AF7 C14
C16
B2
C3
VCCSENSE VSSSENSE
VCCA0 VCCA1 VCCA2 VCCA3
VCCQ0 VCCQ1
VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
PSI# VID0
VID1 VID2 VID3 VID4 VID5
GTLREF0 RSVD RSVD RSVD
COMP0 COMP1 COMP2 COMP3
RSVD RSVD RSVD RSVD
TEST3
AMP_1473129-1
Banias
POWER, GROUNG, RESERVED SIGNALS AND NC
4
+CPU_CORE
1
+
C224
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS
E25
VSS
F1
VSS
F4
VSS
F5
VSS
F7
VSS
F9
VSS
F11
VSS
F13
VSS
F15
VSS
F17
VSS
F19
VSS
F21
VSS
F24
VSS
G2
VSS
G6
VSS
G22
VSS
G23
VSS
G26
VSS
H3
VSS
H5
VSS
H21
VSS
H25
VSS
J1
VSS
J4
VSS
J6
VSS
J22
VSS
J24
VSS
K2
VSS
K5
VSS
K21
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L22
VSS
L25
VSS
M1
VSS
4
+1.8VS
+VCCP
2
220U_D2_4VM_R12
+CPU_CORE
1
C242
2
10U_0805_6.3V6M
+CPU_CORE
1
C241
2
10U_0805_6.3V6M
+CPU_CORE
1
C259
2
10U_0805_6.3V6M
+CPU_CORE
1
C232
2
10U_0805_6.3V6M
+CPU_CORE
1
C301
2
10U_0805_6.3V6M
Vcc-core Decoupling
SPCAP,Polymer MLCC 0805 X5R
1
1
2
0.01U_0402_16V7K
1
2
150U_D2_6.3VM
C351
C320
2
0.01U_0402_16V7K
1
+
C365
C331
2
0.1U_0402_16V4Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
+
C223
2
220U_D2_4VM_R12
1
1
C278
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C311
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C260
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C235
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C239
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
2
0.01U_0402_16V7K
C249
C286
2
0.01U_0402_16V7K
1
1
C277
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3
1
2
220U_D2_4VM_R12
C240
C267
C262
C293
C229
+
C226
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
+
C225
2
220U_D2_4VM_R12
1
C312
2
10U_0805_6.3V6M
1
C261
2
10U_0805_6.3V6M
1
C231
2
10U_0805_6.3V6M
1
C268
2
10U_0805_6.3V6M
1
C310
2
10U_0805_6.3V6M
1
+
C555
2
@220U_D2_4VM_R12
1
C284
C274
2
10U_0805_6.3V6M
1
C292
C258
2
10U_0805_6.3V6M
1
C281
C236
2
10U_0805_6.3V6M
1
C237
C228
2
10U_0805_6.3V6M
1
C243
C238
2
10U_0805_6.3V6M
1
+
C556
2
@220U_D2_4VM_R12
1
C314
2
10U_0805_6.3V6M
1
C230
2
10U_0805_6.3V6M
1
C299
2
10U_0805_6.3V6M
1
C233
2
10U_0805_6.3V6M
1
C309
2
10U_0805_6.3V6M
C,uF ESR, mohm ESL,nH
4X220uF 12m ohm/4 3.5nH/4 35X10uF 5m ohm/35 0.6nH/35
1
1
1
1
C332
2
2
10U_1206_10V4Z
10U_1206_10V4Z
1
C337
2
0.1U_0402_16V4Z
C344
1
C336
2
0.1U_0402_16V4Z
2
10U_1206_10V4Z
1
C338
2
0.1U_0402_16V4Z
C280
C330
C255
2
10U_1206_10V4Z
1
C295
2
0.1U_0402_16V4Z
2
1
1
C285
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C329
+CPU_CORE
1
C263
2
0.1U_0402_16V4Z
1
JP12C
F20
VCC
F22
VCC
G5
VCC
G21
VCC
H6
VCC
H22
VCC
J5
VCC
J21
VCC
K22
VCC
U5
VCC
V6
VCC
V22
VCC
W5
VCC
W21
VCC
Y6
VCC
Y22 AA5 AA7
AA9 AA11 AA13 AA15 AA17 AA19 AA21
AB6
AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22
AC9 AC11 AC13 AC15 AC17 AC19
AD8 AD10 AD12 AD14 AD16 AD18
AE9 AE11 AE13 AE15 AE17 AE19
AF8
AF10 AF12 AF14 AF16 AF18
M4
M5 M21 M24
N3
N6 N22 N23 N26
P2
P5 P21 P24
R1
R4
R6 R22 R25
T3
T5 T21 T23
AMP_1473129-1
Compal Electronics, Inc.
Title
SCHEMATIC, M/ B LA-2231
Size Document Number Rev
A3
Date: Sheet of
星期四
Banias
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
POWER, GROUND
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
401286
, 16, 2004
十二月
T26
VSS
U2
VSS
U6
VSS
U22
VSS
U24
VSS
V1
VSS
V4
VSS
V5
VSS
V21
VSS
V25
VSS
W3
VSS
W6
VSS
W22
VSS
W23
VSS
W26
VSS
Y2
VSS
Y5
VSS
Y21
VSS
Y24
VSS
AA1
VSS
AA4
VSS
AA6
VSS
AA8
VSS
AA10
VSS
AA12
VSS
AA14
VSS
AA16
VSS
AA18
VSS
AA20
VSS
AA22
VSS
AA25
VSS
AB3
VSS
AB5
VSS
AB7
VSS
AB9
VSS
AB11
VSS
AB13
VSS
AB15
VSS
AB17
VSS
AB19
VSS
AB21
VSS
AB23
VSS
AB26
VSS
AC2
VSS
AC5
VSS
AC8
VSS
AC10
VSS
AC12
VSS
AC14
VSS
AC16
VSS
AC18
VSS
AC21
VSS
AC24
VSS
AD1
VSS
AD4
VSS
AD7
VSS
AD9
VSS
AD11
VSS
AD13
VSS
AD15
VSS
AD17
VSS
AD19
VSS
AD22
VSS
AD25
VSS
AE3
VSS
AE6
VSS
AE8
VSS
AE10
VSS
AE12
VSS
AE14
VSS
AE16
VSS
AE18
VSS
AE20
VSS
AE23
VSS
AE26
VSS
AF2
VSS
AF5
VSS
AF9
VSS
AF11
VSS
AF13
VSS
AF15
VSS
AF17
VSS
AF19
VSS
AF21
VSS
AF24
VSS
544
1
5
H_RS#[0..2]4
HA#[3..31]4
H_REQ#[0..4]4
D D
C C
B B
A A
H_RS#[0..2] HA#[3..31] H_REQ#[0..4]
U17A
HA#3
U6
HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_ADSTB#04 H_ADSTB#14
CLK_MCH_BCLK#12
CLK_MCH_BCLK12
H_ADS#4
H_TRDY#4
H_DRDY#4
H_DEFER#4
H_HITM#4 H_HIT#4 H_LOCK#4 H_BR0#4 H_BNR#4
H_BPRI#4
H_DBSY#4
H_CPURST#4
H_DSTBN#04 H_DSTBN#14 H_DSTBN#24 H_DSTBN#34 H_DSTBP#04 H_DSTBP#14 H_DSTBP#24 H_DSTBP#34
H_DINV#04 H_DINV#14 H_DINV#24 H_DINV#34
5
H_RS#0 H_RS#1 H_RS#2
HA#3
T5
HA#4
R2
HA#5
U3
HA#6
R3
HA#7
P7
HA#8
T3
HA#9
P4
HA#10
P3
HA#11
P5
HA#12
R6
HA#13
N2
HA#14
N5
HA#15
N3
HA#16
J3
HA#17
M3
HA#18
M4
HA#19
M5
HA#20
L5
HA#21
K3
HA#22
J2
HA#23
N6
HA#24
L6
HA#25
L2
HA#26
K5
HA#27
L3
HA#28
L7
HA#29
K4
HA#30
J5
HA#31
U2
HREQ#0
T7
HREQ#1
R7
HREQ#2
U5
HREQ#3
T4
HREQ#4
R5
HADSTB#0
N7
HADSTB#1
K8
BCLK#
J8
BCLK
U7
ADS#
V4
HTRDY#
W2
DRDY#
Y4
DEFER#
Y3
HITM#
Y5
HIT#
W3
HLOCK#
V7
BR0#
V3
BNR#
Y7
BPRI#
V5
DBSY#
W7
RS#0
W5
RS#1
W6
RS#2
AE17
CPURST#
AD4
HDSTBN#0
AF6
HDSTBN#1
AD11
HDSTBN#2
AC15
HDSTBN#3
AD3
HDSTBP#0
AG6
HDSTBP#1
AE11
HDSTBP#2
AC16
HDSTBP#3
AD5
DBI#0
AG5
DBI#1
AH9
DBI#2
AD15
DBI#3
RG82P4300M_FCBGA593
Odem
HOST
4
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8
HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HVREF0 HVREF1 HVREF2 HVREF3 HVREF4
HSWNG1 HSWNG0
HRCOMP1 HRCOMP0
4
AA2 AB5 AA5 AB3 AB4 AC5 AA3 AA6 AE3 AB7 AE5 AF3 AC6 AC3 AF4 AE2 AG4 AG2 AE7 AE8 AH2 AC7 AG3 AD7 AH7 AE6 AC8 AG8 AG7 AH3 AF8 AH5 AC11 AC12 AE9 AC10 AE10 AD9 AG9 AC9 AE12 AF10 AG11 AG10 AH11 AG12 AE13 AF12 AG13 AH13 AC14 AF14 AG14 AE14 AG15 AG16 AG17 AH15 AC17 AF16 AE15 AH17 AD17 AE16
M7 P8 AA9 AB12 AB16
AD13 AA7
AC13 AC2
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
H_SWNG1 H_SWNG0
H_RCOMP1 H_RCOMP0
HD#[0..63]
1
2
220P_0402_50V7K
0.01U_0402_16V7K
0.01U_0402_16V7K
MGH_GTLREF
1
C283
C290
2
220P_0402_50V7K
R235
27.4_0402_1%
1 2
3
HD#[0..63] 4
R234 301_0402_1%
R230 150_0402_1%
R240 301_0402_1%
R244 150_0402_1%
AGP_AD[0..31] AGP_C/BE#[0..3 ] AGP_SBA[0..7]
AGP_FRAME#17 AGP_DEVSEL#17 AGP_IRDY#17 AGP_TRDY#17 AGP_STOP#17 AGP_PAR17
AGP_ADSTB017 AGP_ADSTB0#17 AGP_ADSTB117 AGP_ADSTB1#17
AGP_SBSTB17 AGP_SBSTB#17
AGP_RBF#17 AGP_WBF#17
AGP_ST017 AGP_ST117 AGP_ST217
CLK_MCH_66M12
AGP_REQ#17 AGP_GNT#17
CLK_MCH_66M
AGP_AD0 HUB_PD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5
AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
AGP_SBA0 AGP_SBA1 AGP_SBA2 AGP_SBA3 AGP_SBA4 AGP_SBA5 AGP_SBA6 AGP_SBA7
AGP_ST1 AGP_ST2
CLK_MCH_66M
12
R255 @22_0402_5%
1
C327 @10P_0402_50V8K
2
AGP_AD[0..31]17 AGP_C/BE#[0..3]17 AGP_SBA[0..7]17
+VCCP
12
1
C279
H_SWNG1
H_SWNG0
1 2
2
12
+VCCP
12
1
C289
2
12
+VCCP
12
R242
49.9_0402_1%
1
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET IN FORMATIO N. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMEN T EX CEPT AS AUTH ORIZ ED B Y CO MPAL ELE CTRONICS, INC. NEI THER THIS SHEE T NOR THE INFORMATIO N IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
C322 1U_0603_10V6K
R236
27.4_0402_1%
R245 100_0402_1%
3
2
U17B
R27
GAD0
R28
GAD1
T25
GAD2
R25
GAD3
T26
GAD4
T27
GAD5
U27
GAD6
U28
GAD7
V26
GAD8
V27
GAD9
T23
GAD10
U23
GAD11
T24
GAD12
U24
GAD13
U25
GAD14
V24
GAD15
Y27
GAD16
Y26
GAD17
AA28
GAD18
AB25
GAD19
AB27
GAD20
AA27
GAD21
AB26
GAD22
Y23
GAD23
AB23
GAD24
AA24
GAD25
AA25
GAD26
AB24
GAD27
AC25
GAD28
AC24
GAD29
AC22
GAD30
AD24
GAD31
V25
GCBE#0
V23
GCBE#1
Y25
GCBE#2
AA23
GCBE#3
Y24
GFRAME#
W28
GDEVSEL#
W27
GIRDY#
W24
GTRDY#
W23
GSTOP#
W25
GPAR
AG24
GREQ#
AH25
GGNT#
R24
AD_STB0
R23
AD_STB#0
AC27
AD_STB1
AC28
AD_STB#1
AH28
SBA0
AH27
SBA1
AG28
SBA2
AG27
SBA3
AE28
SBA4
AE27
SBA5
AE24
SBA6
AE25
SBA7
AF27
SB_STB
AF26
SB_STB#
AE22
RBF#
AE23
WBF#
AF22
PIPE#
AG25
ST0
AF24
ST1
AG26
ST2
P22
66IN
RG82P4300M_FCBGA593
2
Odem
AGP
1
HUB_PD[0..10]
P25
HI_0 HI_1 HI_2 HI_3 HI_4 HI_5 HI_6 HI_7 HI_8
HUB
HI_9
HI_10
HI_STB
HI_STB#
HLRCOMP
HI_REF
VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116
GND
VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141
GRCOMP
AGPREF
Compal Electronics, Inc.
Title
SCHEMATIC, M/B LA-2231
Size Document Number R ev
Custom
Date: Sheet
HUB_PD1
P24
HUB_PD2
N27
HUB_PD3
P23
HUB_PD4
M26
HUB_PD5
M25
HUB_PD6AGP_AD6
L28
HUB_PD7AGP_AD7
L27
HUB_PD8
M27
HUB_PD9
N28
HUB_PD10
M24 N25
N24
HUB_RCOMP
P27 P26
1
AB9 AD10 AF9 AJ9 A7 F8 J7 L8 N8 R8 U8 W8 AA8 AD8 AF7 AJ7 D5 F6 H6 K6 M6 P6 T6 V6 Y6 AB6 AD6 AF5 AJ5 A3 J4 L4 N4 R4 U4 W4 AA4 AC4 AE4 AJ3 E1 J1 L1 N1 R1 U1 W1 AA1 AC1 AE1 AG1
AD25 AA21
2
AGP_RCOMP +AGPREF
1
C291
0.1U_0402_16V4Z
2
Note: R203,R204 placement
center of MCH and AGP
401286
星期四 十
G 16, 2004
HUB_PSTRB 13 HUB_PSTRB# 13
1 2
C334
0.01U_0402_16V7K
ST1 ST2
1 2
36.5_0402_1%
HUB_VREF
AGP_ST2
AGP_ST1
X
11DDR X
0
X
R232
40.2_0603_1%
+AGPREF
1
HUB_PD[0:10] 13
R256
+1.5VS
12
R224 @1K_0402_5%
+1.5VS
12
R228 @1K_0402_5%
12
R225 @1K_0402_5%
MCH STRAP
TEST MODE 400 Mhz PSB
+AGPREF
644, 
+1.8VS
+1.5VS
of
12
R241 1K_0402_1%
12
R237 1K_0402_1%
A
5
4
3
2
1
DDR_SMA[0..12]
DDR_SDQ[0..63]9 DDR_SDQS[0..8]9
DDR_CB[0..7]9
D D
C C
B B
+SDREF
A A
DDR_SDQ[0..63] DDR_SDQS[0..8]
DDR_CB[0..7]
R270 0_0805_5%
C354
0.1U_0402_16V4Z
DDR_SMA[0..12] 9
+1.25VS_SMVREF
12
1
2
DDR_SWE#9 DDR_SRAS#9 DDR_SCAS#9
DDR_CLK09 DDR_CLK0#9 DDR_CLK19 DDR_CLK1#9 DDR_CLK29 DDR_CLK2#9 DDR_CLK310 DDR_CLK3#10 DDR_CLK410 DDR_CLK4#10 DDR_CLK510 DDR_CLK5#10
DDR_CKE09,10 DDR_CKE19,10 DDR_CKE210 DDR_CKE310
DDR_SCS#09,10 DDR_SCS#19,10 DDR_SCS#210 DDR_SCS#310
DDR_SBS09 DDR_SBS19
1
C353
0.1U_0402_16V4Z
2
+1.25VS
H_DPSLP#4,13 H_DPWR#4
DDR_SMA0 DDR_SMA1 DDR_SMA2 DDR_SMA3 DDR_SMA4 DDR_SMA5 DDR_SMA6 DDR_SMA7 DDR_SMA8 DDR_SMA9 DDR_SMA10 DDR_SMA11 DDR_SMA12
DDR_SDQS0 DDR_SDQS1 DDR_SDQS2 DDR_SDQS3 DDR_SDQS4 DDR_SDQS5 DDR_SDQS6 DDR_SDQS7 DDR_SDQS8
1 2
R275
1
30.1_0603_1%
C352
2
0.1U_0402_16V4Z
DDR_RCOMP
M_RCV#
U17C
E12
SMA0
F17
SMA1
E16
SMA2
G17
SMA3
G18
SMA4
E18
SMA5
F19
SMA6
G20
SMA7
G19
SMA8
F21
SMA9
F13
SMA10
E20
SMA11
G21
SMA12
G22
RSVD2
F26
SDQS0
C26
SDQS1
C23
SDQS2
B19
SDQS3
D12
SDQS4
C8
SDQS5
C5
SDQS6
E3
SDQS7
E15
SDQS8
G11
SWE#
F11
SRAS#
G8
SCAS#
J25
SCK0
K25
SCK#0
G5
SCK1
F5
SCK#1
G24
SCK2
E24
SCK#2
G25
SCK3
J24
SCK#3
G6
SCK4
G7
SCK#4
K23
SCK5
J23
SCK#5
G23
SCKE0
E22
SCKE1
H23
SCKE2
F23
SCKE3
E9
SCS#0
F7
SCS#1
F9
SCS#2
E7
SCS#3
G12
SBS0
G13
SBS1
J9
SMVREF0
J21
SMVREF1
J28
SMRCOMP
G15
RCVENIN#
G14
RCVENOUT#
V8
DPSLP#
Y8
DPWR#
AD26
NC0
AD27
NC1
RG82P4300M_FCBGA593
Odem
MEMORY
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8
SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63 SDQ64 SDQ65 SDQ66 SDQ67 SDQ68 SDQ69 SDQ70 SDQ71
RSTIN#
RSVD1
TESTIN#
G28 F27 C28 E28 H25 G27 F25 B28 E27 C27 B25 C25 B27 D27 D26 E25 D24 E23 C22 E21 C24 B23 D22 B21 C21 D20 C19 D18 C20 E19 C18 E17 E13 C12 B11 C10 B13 C13 C11 D10 E10 C9 D8 E8 E11 B9 B7 C7 C6 D6 D4 B3 E6 B5 C4 E4 C3 D3 F4 F3 B2 C2 E2 G4 C16 D16 B15 C14 B17 C17 C15 D14
J27 H27 H26
DDR_SDQ0 DDR_SDQ1 DDR_SDQ2 DDR_SDQ3 DDR_SDQ4 DDR_SDQ5 DDR_SDQ6 DDR_SDQ7 DDR_SDQ8 DDR_SDQ9 DDR_SDQ10 DDR_SDQ11 DDR_SDQ12 DDR_SDQ13 DDR_SDQ14 DDR_SDQ15 DDR_SDQ16 DDR_SDQ17 DDR_SDQ18 DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ22 DDR_SDQ23 DDR_SDQ24 DDR_SDQ25 DDR_SDQ26 DDR_SDQ27 DDR_SDQ28 DDR_SDQ29 DDR_SDQ30 DDR_SDQ31 DDR_SDQ32 DDR_SDQ33 DDR_SDQ34 DDR_SDQ35 DDR_SDQ36 DDR_SDQ37 DDR_SDQ38 DDR_SDQ39 DDR_SDQ40 DDR_SDQ41 DDR_SDQ42 DDR_SDQ43 DDR_SDQ44 DDR_SDQ45 DDR_SDQ46 DDR_SDQ47 DDR_SDQ48 DDR_SDQ49 DDR_SDQ50 DDR_SDQ51 DDR_SDQ52 DDR_SDQ53 DDR_SDQ54 DDR_SDQ55 DDR_SDQ56 DDR_SDQ57 DDR_SDQ58 DDR_SDQ59 DDR_SDQ60 DDR_SDQ61 DDR_SDQ62 DDR_SDQ63
MCH_TEST#
DDR_CB0 DDR_CB1 DDR_CB2 DDR_CB3 DDR_CB4 DDR_CB5 DDR_CB6 DDR_CB7
DDR_CB0 9 DDR_CB1 9 DDR_CB2 9 DDR_CB3 9 DDR_CB4 9 DDR_CB5 9 DDR_CB6 9 DDR_CB7 9
PCIRST# 13,19,20,21,22,23,24,26
1 2
R279 @4.7K_0402_5%
+1.5VS
Compal Electronics, Inc.
THIS SHEET OF ENG INEE RING DR AWING IS TH E PROP RIET ARY PR OPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTIAL
AND TRADE SECRET I NFORMATIO N. THI S SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMEN T EX CEPT AS AUTH ORIZ ED B Y CO MPAL ELE CTRONICS, INC. NEI THER THIS SHEE T NOR THE INFORMATIO N IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
Title
Size Document Number R ev
Custom
Date: Sheet
SCHEMATIC, M/B LA-2231
401286
星期四 十
G 16, 2004
A
of
744, 
1
5
U17D
+1.5VS_ODEM
D D
+1.2VS
+1.8VS
C C
+VCCP
+2.5V
B B
A A
C313
0.1U_0402_16V4Z
5
+1.8VS
1
2
1
2
R29
W29 AC29 AG29
U26 AA26 AE26
AJ25 AD23 AF23
R22 U22
W22 AA22 AB21 AD21
P17 N16 P15 R16 T15 U16 N14 P13 R14 U14
N26 N23 M22
AG23
AJ23 AE21 AG21
AJ21 AB20 AC19 AD20 AE19 AF20 AG19
AJ19 AB18 AD18 AF18 AB14 AB10
AB8
C29 G29 A25 D25 K26 D23 H24 K24
A21 F22 H22 K22 D19 H20 A17 F18 H18 D15 F16 H16 A13 F14 H14 D11 H12
F10 H10
T17 T13
C325 10U_1206_10V4Z
L29 L25
M8
T8
L23
A9
D7 H8 K7 A5 E5 H5
J6 C1 G1
RG82P4300M_FCBGA593
4
VCCAGP0 VCCAGP1 VCCAGP2 VCCAGP3 VCCAGP4 VCCAGP5 VCCAGP6 VCCAGP7 VCCAGP8 VCCAGP9 VCCAGP10 VCCAGP11 VCCAGP12 VCCAGP13 VCCAGP14 VCCAGP15
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9
VCCHL0 VCCHL1 VCCHL2 VCCHL3 VCCHL4
POWER GND
VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8 VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37
VCCGA VCCHA
4
Odem
VSS0 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8
VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90
RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9
ETS#
E29 J29 N29 U29 AA29 AE29 A27 K27 AJ27 E26 G26 J26 L26 R26 W26 AC26 AF25 A23 F24 L24 M23 AC23 AH23 D21 H21 J22 L22 N22 T22 V22 Y22 AB22 AC21 AD22 AF21 AG22 AH21 A19 F20 H19 AB19 AC20 AD19 AE20 AF19 AG20 AH19 D17 H17 N17 R17 U17 AB17 AC18 AE18 AF17 AG18 AJ17 A15 F15 H15 N15 P16 R15 T16 U15 AB15 AD16 AF15 AJ15 D13 E14 H13 N13 P14 R13 T14 U13 AB13 AD14 AF13 AJ13 A11 F12 H11 AB11 AD12 AF11 AJ11 D9 H9
G16 G10 G9 H7 G2 G3 H3
H4
1 2
12
R280 @1K_0402_5%
3
+2.5V
150U_D2_6.3VM
1
1
+
C367
2
150U_D2_6.3VM
+2.5V
0.1U_0402_16V4Z
1
1
C358
2
2
0.1U_0402_16V4Z
+1.8VS
1
C345
2
10U_1206_10V4Z
+1.5VS_ODEM
1
+
C264
2
150U_D2_6.3VM
+1.2VS
1
+
C296
2
150U_D2_6.3VM
+VCCP
1
+
C254
2
150U_D2_6.3VM
+2.5V
R277 10K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITT EN CON SENT O F COMPAL ELECTRONICS, INC.
3
+
C372
2
1
C375
C376
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C343
2
10U_1206_10V4Z
1
C297
2
10U_1206_10V4Z
150U_D2_6.3VM
1
+
C347
2
0.1U_0402_16V4Z
1
C266
2
1
2
22U_1206_10V4Z
1
2
0.1U_0402_16V4Z
1
2
1
2
2.2U_0805_16V4Z
1
2
0.1U_0402_16V4Z
22U_1206_10V4Z
1
C348
C342
2
0.1U_0402_16V4Z
1
C382
2
0.1U_0402_16V4Z
1
C335
2
0.1U_0402_16V4Z
1
C321
2
0.22U_0603_10V7K
1
C300
2
0.1U_0402_16V4Z
1
C265
2
2
1
2
0.1U_0402_16V4Z
C339
C305
C272
2
C381
C307
0.1U_0402_16V4Z
1
1
C349
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C359
2
0.1U_0402_16V4Z
1
1
C273
2
2
0.1U_0402_16V4Z
1
C306
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C282
2
2
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1
1
C366
C357
C371
1
C374
2
0.1U_0402_16V4Z
C288
0.01U_0402_16V7K
1
C323
2
C275
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C378
2
1
C298
2
0.1U_0402_16V4Z
1
C308
2
0.22U_0603_10V7K
1
C256
2
0.1U_0402_16V4Z
Title
Size Document Number Rev
Custom
Date: Sheet
0.1U_0402_16V4Z
1
1
C380
C379
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C304
C257
2
2
0.1U_0402_16V4Z
0.047U_0603_16V7K
1
C328
2
0.1U_0402_16V4Z
1
1
C276
C315
2
2
0.1U_0402_16V4Z
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2231
401286
|, 16, 2004
薔 十二月
0.1U_0402_16V4Z
1
1
C373
2
2
0.1U_0402_16V4Z
1
C377
A
of
844
5
DDR_SDQ0 DDR_SDQ3 DDR_SDQ2 DDR_SDQ7
RP53
1 8 2 7 3 6 4 5
DDR_DQ0 DDR_DQ3 DDR_DQ2 DDR_DQ7
DDR_SDQ32 DDR_SDQ37 DDR_SDQ36 DDR_SDQS4
10_8P4R_1206_5%
DDR_SDQ5 DDR_SDQ1 DDR_SDQS0 DDR_SDQ4
D D
DDR_SDQ6 DDR_SDQ8 DDR_SDQ13 DDR_SDQ9
RP63
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP54
1 8 2 7 3 6 4 5
DDR_DQ5 DDR_DQ1 DDR_DQS0 DDR_DQ4
DDR_DQ6 DDR_DQ8 DDR_DQ13 DDR_DQ9
DDR_SDQ33 DDR_SDQ38 DDR_SDQ34 DDR_SDQ39
DDR_SDQ35 DDR_SDQ44 DDR_SDQ40 DDR_SDQ41
10_8P4R_1206_5%
DDR_SDQ12 DDR_SDQ14 DDR_SDQS1 DDR_SDQ15
RP62
1 8 2 7 3 6 4 5
DDR_DQ12 DDR_DQ14 DDR_DQS1 DDR_DQ15
DDR_SDQ45 DDR_SDQ43 DDR_SDQ42 DDR_SDQS5
10_8P4R_1206_5%
DDR_SDQ11 DDR_SDQ16
DDR_SDQ20
RP52
1 8 2 7 3 6 4 5
DDR_DQ11 DDR_DQ10DDR_SDQ10 DDR_DQ16 DDR_DQ20
DDR_SDQ47 DDR_SDQ46 DDR_SDQ52 DDR_DQ52 DDR_SDQ49
10_8P4R_1206_5%
DDR_SDQ17 DDR_SDQS2 DD R_DQS2 DDR_SDQ21 DDR_DQ21
C C
DDR_SDQ18 DDR_SDQ19 DDR_SDQ23 DDR_SDQ24
RP61
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP51
1 8 2 7 3 6 4 5
DDR_DQ17
DDR_DQ22DDR_SDQ22
DDR_DQ18 DDR_DQ19 DDR_DQ23 DDR_DQ24
10_8P4R_1206_5%
DDR_SDQ25 DDR_SDQ28 DDR_SDQ29 DDR_SDQ26
DDR_SDQ27 DDR_DQ27
RP60
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP50
1 8 2 7 3 6 4 5
DDR_DQ25 DDR_DQ28 DDR_DQ29 DDR_DQ26
DDR_DQS3DDR_SDQS3 DDR_DQ30DDR_SDQ30
DDR_DQ31DDR_SDQ31
10_8P4R_1206_5%
DDR_CB5 DDR_CB4 DDR_CB1 DDR_CB0
B B
DDR_CB6 DDR_CB2 DDR_CB7 DDR_CB3
DDR_SMA0 DDR_SMA2
RP59
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP49
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP19
1 4 2 3
DDR_F_CB5 DDR_F_CB4 DDR_F_CB1 DDR_F_CB0
DDR_F_CB6 DDR_F_CB2 DDR_F_CB7 DDR_F_CB3
DDR_F_SMA0 DDR_F_SMA2
DDR_SBS17 DDR_F_SBS1 10
DDR_SBS07
10_4P2R_0404_5%
RP17
DDR_SMA8 DDR_SMA11 DDR_F_SMA11
1 4 2 3
DDR_F_SMA8
DDR_SCAS#7 DDR_SWE#7
10_4P2R_0404_5%
DDR_SMA1 DDR_SMA3 DDR_F_SMA3
A A
RP12
1 4 2 3
10_4P2R_0404_5%
DDR_F_SMA1
DDR_SDQ48 DDR_SDQS6 DDR_SDQ53 DDR_SDQ55
DDR_SDQ50 DDR_SDQ54 DDR_SDQ51 DDR_SDQ63
DDR_SDQ58 DDR_SDQ59 DDR_SDQS7 DDR_SMA3DDR_DQS7
DDR_SDQ56 DDR_SDQ62 DDR_SDQ61 DDR_SDQ60
DDR_SBS1
DDR_SBS0 DDR_SMA10
DDR_SMA4 DDR_SMA6
DDR_SCAS#
DDR_SMA9 DDR_F_SMA9 DDR_SMA12 DDR_F _ SMA1 2
4
RP48
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP58
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP47
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP57
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP46
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP56
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP45
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP55
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP44
1 8 2 7 3 6 4 5
10_8P4R_1206_5%
RP20
1 4 2 3
10_4P2R_0404_5%
RP13
1 4 2 3
10_4P2R_0404_5%
RP18
1 4 2 3
10_4P2R_0404_5%
RP14
1 4 2 3
10_4P2R_0404_5%
RP10
1 4 2 3
10_4P2R_0404_5%
DDR_DQ32 DDR_DQ37 DDR_DQ36 DDR_DQS4
DDR_DQ33 DDR_DQ38 DDR_DQ34 DDR_DQ39
DDR_DQ35 DDR_DQ44 DDR_DQ40 DDR_DQ41
DDR_DQ45 DDR_DQ43 DDR_DQ42 DDR_DQS5
DDR_DQ47 DDR_DQ46
DDR_DQ49
DDR_DQ48 DDR_DQS6 DDR_DQ53 DDR_DQ55
DDR_DQ50 DDR_DQ54 DDR_DQ51 DDR_DQ63
DDR_DQ58 DDR_DQ59
DDR_DQ57
DDR_DQ56 DDR_DQ62 DDR_DQ61 DDR_DQ60
DDR_F_SRAS#DDR_SRAS# DDR_F_SBS1
DDR_F_SBS0 DDR_F_SMA10
DDR_F_SMA4 DDR_F_SMA6
DDR_F_SCAS# DDR_F_SWE#DDR_SWE#
DDR_F_SRAS# 10DDR_SRAS#7
DDR_F_SBS0 10
DDR_F_SCAS# 10 DDR_F_SWE# 10
3
+2.5V
JP25
1
VREF
3
DDR_DQ0 DDR_DQ3
DDR_DQS0 DDR_DQ2
DDR_DQ7 DDR_DQ8
DDR_DQ13 DDR_DQS1
DDR_DQ9 DDR_DQ12
DDR_CLK07
DDR_CLK0#7
DDR_DQ16 DDR_DQ20
DDR_DQS2 DDR_DQ17
DDR_DQ21 DDR_DQ24
DDR_DQ25 DDR_DQS3
DDR_DQ28 DDR_DQ29
DDR_F_CB0 DDR_F_CB1
DDR_DQS8 DDR_F_CB2
DDR_F_CB3
DDR_CLK27 DDR_CLK2#7
DDR_CKE17,10
DDR_CKE1
DDR_SMA12 DDR_SMA9
DDR_SMA7 DDR_SMA5
DDR_SMA1 DDR_SMA10
DDR_SBS0 DDR_SWE#
DDR_SCS#07,10
DDR_SCS#0
DDR_DQ32 DDR_DQ37
DDR_DQS4 DDR_DQ36
DDR_DQ33 DDR_DQ44
DDR_DQS5 DDR_DQ41
DDR_DQ45
DDR_DQ52 DDR_DQ49
DDR_DQS6 DDR_DQ48
DDR_DQ53 DDR_DQ63
DDR_DQ58 DDR_DQS7
DDR_DQ59 DDR_DQ57
SMB_DATA10,12,13
SMB_CLK10,12,13
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DU/RESET#
DU/BA2
VREF
DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQ30 DQ31
CKE0
RAS# CAS#
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQ46 DQ47
CK1#
DQ52 DQ53
DQ54 DQ55
DQ60 DQ61
DQ62 DQ63
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
VDD DM1
VSS
VDD VDD VSS VSS
VDD DM2
VSS
VDD DM3
VSS
VDD CB4 CB5 VSS DM8 CB6 VDD CB7
VSS VSS VDD VDD
VSS
VDD BA1
VSS
VDD DM4
VSS
VDD DM5
VSS
VDD CK1
VSS
VDD DM6
VSS
VDD DM7
VSS
VDD SA0 SA1 SA2
2
1
+2.5V
+1.25VS_SDREF_R
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
DDR_DQ5 DDR_DQ1
DDR_DQ4 DDR_DQ6
DDR_DQ14 DDR_DQ15
DDR_DQ11 DDR_DQ10
DDR_DQ22 DDR_DQ18
DDR_DQ19 DDR_DQ23
DDR_DQ26 DDR_DQ27
DDR_DQ30 DDR_DQ31
DDR_F_CB4 DDR_F_CB5
DDR_F_CB6 DDR_F_CB7
DDR_CKE0
DDR_SMA11 DDR_SMA8
DDR_SMA6 DDR_SMA4 DDR_SMA2 DDR_SMA0DDR_SDQ57
DDR_SBS1 DDR_SRAS# DDR_SCAS# DDR_SCS#1
DDR_DQ38 DDR_DQ34
DDR_DQ39 DDR_DQ35
DDR_DQ43 DDR_DQ42DDR_DQ40
DDR_DQ47 DDR_DQ46
DDR_DQ55 DDR_DQ50
DDR_DQ54 DDR_DQ51
DDR_DQ56 DDR_DQ62
DDR_DQ61 DDR_DQ60
1
C431
0.1U_0402_16V4Z
2
DDR_CKE0 7,10
DDR_SCS#1 7,10
DDR_CLK1# 7 DDR_CLK1 7
1 2
+SDREF
R363 0_0805_5%
DDR_SDQ[0..63]
DDR_DQ[0..63]
DDR_DQS[0..8] DDR_SDQS[0..8]
DDR_CB[0..7] DDR_F_CB[0..7]
DDR_F_SMA[0..12] DDR_SMA[0..12]
DDR_SDQ[0..63] 7 DDR_DQ[0..63] 10
DDR_DQS[0..8] 10 DDR_SDQS[0..8] 7
DDR_CB[0..7] 7 DDR_F_CB[0..7] 10
DDR_F_SMA[0..12] 10 DDR_SMA[0..12] 7
AMP1376409_REVERSE
DIMM0
DDR_SDQS8 DDR_DQS8
1 2
R331 10_0402_5%
5
RP11
DDR_SMA5 DDR_SMA7 DDR_F_SMA7
1 4 2 3
DDR_F_SMA5
10_4P2R_0404_5%
4
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2231
401286
星期四 十二月
004
of
944, 16, 2
1
A
A
+1.25VS
DDR_DQ0 DDR_DQ3
RP103
1 4 2 3
56_4P2R_0404_5%
DDR_DQ7 DDR_DQ8
1 1
DDR_DQ5 DDR_DQ1
RP99
1 4 2 3
56_4P2R_0404_5%
RP102
1 4 2 3
56_4P2R_0404_5%
DDR_DQS0 DDR_DQ4
RP101
1 4 2 3
56_4P2R_0404_5%
DDR_DQ2 DDR_DQ6
RP100
1 4 2 3
56_4P2R_0404_5%
DDR_DQ9 DDR_DQS1
RP97
1 4 2 3
56_4P2R_0404_5%
DDR_DQ11 DDR_DQ10
RP98
1 4 2 3
56_4P2R_0404_5%
2 2
DDR_DQ15 DDR_DQ14
RP95
1 4 2 3
56_4P2R_0404_5%
DDR_DQ12 DDR_DQ13
RP96
1 4 2 3
56_4P2R_0404_5%
DDR_DQ16 DDR_DQ20
RP92
1 4 2 3
56_4P2R_0404_5%
DDR_DQ23 DDR_DQ24
RP90
1 4 2 3
56_4P2R_0404_5%
DDR_DQ18 DDR_DQ19
RP91
1 4 2 3
56_4P2R_0404_5%
DDR_DQS2
3 3
DDR_DQ17
DDR_DQ21 DDR_DQ22
RP94
1 4 2 3
56_4P2R_0404_5%
RP93
1 4 2 3
56_4P2R_0404_5%
DDR_F_CB4 DDR_F_CB0
RP84
1 4 2 3
56_4P2R_0404_5%
DDR_DQ26 DDR_DQS3
RP89
1 4 2 3
56_4P2R_0404_5%
RP88
14
23
56_4P2R_0404_5% RP86
14
23
56_4P2R_0404_5% RP81
14
23
56_4P2R_0404_5% RP77
14
23
56_4P2R_0404_5% RP80
14
23
56_4P2R_0404_5% RP79
14
23
56_4P2R_0404_5% RP78
14
23
56_4P2R_0404_5% RP75
14
23
56_4P2R_0404_5% RP74
14
23
56_4P2R_0404_5% RP32
14
23
56_4P2R_0404_5% RP73
14
23
56_4P2R_0404_5% RP72
14
23
56_4P2R_0404_5% RP71
14
23
56_4P2R_0404_5% RP70
14
23
56_4P2R_0404_5% RP69
14
23
56_4P2R_0404_5% RP68
14
23
56_4P2R_0404_5% RP21
DDR_CKE0
14
DDR_CKE1
23
DDR_DQ25 DDR_DQ28
DDR_DQ31 DDR_DQ29
DDR_F_SMA4
DDR_DQ37
DDR_DQ44 DDR_DQ35
DDR_F_SMA0 DDR_F_SCAS#
DDR_DQ38 DDR_DQ34
DDR_DQ33 DDR_DQ39
DDR_DQ43 DDR_DQ40
DDR_DQ42 DDR_DQ41
DDR_DQS4 DDR_SCS#2
DDR_DQ47 DDR_DQ46
DDR_DQ52 DDR_DQ49
DDR_DQ48 DDR_DQ55
DDR_DQ50 DDR_DQS6
DDR_DQ53 DDR_DQ54
DDR_DQ51 DDR_DQ63
+1.25VS
56_4P2R_0404_5% RP76
DDR_F_SBS0 9 DDR_F_SBS1 9 DDR_SCS#0 7,9 DDR_SCS#1 7,9 DDR_CKE0 7,9
DDR_CKE1 DDR_SCS#0
56_4P2R_0404_5%
4 4
DDR_F_SBS0 DDR_F_SBS1
DDR_SCS#0
DDR_SCS#1
DDR_CKE0
DDR_CKE17,9
DDR_SCS#07,9
A
DDR_DQS5
14
DDR_DQ45
23
B
RP66
14
23
56_4P2R_0404_5% RP65
14
23
56_4P2R_0404_5% RP67
14
23
56_4P2R_0404_5% RP64
14
23
56_4P2R_0404_5% RP87
DDR_DQ30
14
DDR_DQ27
23
56_4P2R_0404_5%
RP85
14
23
56_4P2R_0404_5% RP82
14
23
56_4P2R_0404_5% RP83
14
23
56_4P2R_0404_5% RP24
DDR_F_SMA9
14
DDR_F_SMA12
23
56_4P2R_0404_5% RP22
DDR_CKE2
14
DDR_F_SMA11
23
56_4P2R_0404_5% RP25
DDR_F_SMA6
14
DDR_F_SMA7
23
56_4P2R_0404_5% RP27
DDR_F_SMA5
14
DDR_F_SMA1
23
56_4P2R_0404_5% RP26
DDR_F_SMA8
14
DDR_F_SMA3
23
56_4P2R_0404_5% RP28
DDR_F_SBS1
14
DDR_F_SMA2
23
56_4P2R_0404_5% RP29
DDR_SCS#3
14
DDR_F_SRAS#
23
56_4P2R_0404_5% RP30
DDR_F_SBS0
14
23
56_4P2R_0404_5% RP33
14
23
56_4P2R_0404_5% RP23
DDR_CKE3
14
DDR_DQS8
23
56_4P2R_0404_5% RP34
14
DDR_F_SWE#
23
56_4P2R_0404_5% RP31
DDR_F_SMA10
14
DDR_SCS#1
23
56_4P2R_0404_5%
B
DDR_DQ62 DDR_DQS7
DDR_DQ59 DDR_DQ61
DDR_DQ56 DDR_DQ58
DDR_DQ57 DDR_DQ60
DDR_F_CB5 DDR_F_CB1
DDR_F_CB7 DDR_F_CB3
DDR_F_CB6 DDR_F_CB2
DDR_DQ32
DDR_DQ36 DDR_SCS#0
C
D
+2.5V +2.5V
JP26
1
VREF
3
DDR_DQ0 DDR_DQ3
DDR_DQS0 DDR_DQ2
DDR_DQ7 DDR_DQ8
DDR_DQ13 DDR_DQS1
DDR_DQ9 DDR_DQ12
DDR_CLK37 DDR_CLK3#7
DDR_DQ16 DDR_DQ20
DDR_DQS2 DDR_DQ17
DDR_DQ21 DDR_DQ24
DDR_DQ25 DDR_DQS3
DDR_DQ28 DDR_DQ29
DDR_F_CB0 DDR_F_CB1
DDR_DQS8 DDR_F_CB2
DDR_F_CB3
DDR_CLK57 DDR_CLK5#7
DDR_F_SWE#9
SMB_DATA9,12,13
SMB_CLK9,12,13
DDR_CKE3 DDR_CKE2
DDR_F_SMA12 DDR_F_SMA9
DDR_F_SMA7 DDR_F_SMA5 DDR_F_SMA3 DDR_F_SMA1
DDR_F_SMA10 DDR_F_SBS0 DDR_F_SWE# DDR_SCS#2 DDR_SCS#3
DDR_DQ32 DDR_DQ37
DDR_DQS4 DDR_DQ36
DDR_DQ33 DDR_DQ44
DDR_DQ40 DDR_DQS5
DDR_DQ41 DDR_DQ45
DDR_DQ52 DDR_DQ49
DDR_DQS6 DDR_DQ48
DDR_DQ53 DDR_DQ63
DDR_DQ58 DDR_DQS7
DDR_DQ59 DDR_DQ57
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
VREF
DQ4 DQ5 VDD DM0 DQ6
DQ7
DQ12
VDD
DQ13
DM1
DQ14 DQ15
VDD VDD
DQ20 DQ21
VDD DM2
DQ22 DQ23
DQ28
VDD
DQ29
DM3
DQ30 DQ31
VDD
DM8 VDD
DU/RESET#
VDD VDD
CKE0
DU/BA2
VDD
RAS# CAS#
DQ36 DQ37
VDD DM4
DQ38 DQ39
DQ44
VDD
DQ45
DM5
DQ46 DQ47
VDD
CK1#
DQ52 DQ53
VDD DM6
DQ54 DQ55
DQ60
VDD
DQ61
DM7
DQ62 DQ63
VDD
VSS
VSS
VSS
VSS VSS
VSS
VSS
CB4 CB5 VSS
CB6 CB7 VSS
VSS
VSS
BA1
VSS
VSS
VSS
CK1 VSS
VSS
VSS
SA0 SA1 SA2
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100
A11
102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122
S1#
124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
AMP1376408_STANDARD
DIMM1
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
E
+1.25VS_SDREF_R
DDR_DQ5 DDR_DQ1
DDR_DQ4 DDR_DQ6
DDR_DQ14 DDR_DQ15
DDR_DQ11 DDR_DQ10
DDR_DQ22 DDR_DQ18
1
C468
0.1U_0402_16V4Z
2
DDR_F_SMA[0..12]
DDR_DQ[0..63]
DDR_F_CB[0..7]
DDR_DQS[0..8]
DDR_F_SMA[0..12] 9 DDR_DQ[0..63] 9
DDR_DQS[0..8] 9
DDR_F_CB[0..7] 9
DDR_DQ19 DDR_DQ23
DDR_DQ26 DDR_DQ27
DDR_DQ30 DDR_DQ31
DDR_F_CB4 DDR_F_CB5
DDR_F_CB6 DDR_F_CB7
DDR_F_SMA11 DDR_F_SMA8
DDR_F_SMA6 DDR_F_SMA4 DDR_F_SMA2 DDR_F_SMA0
DDR_F_SBS1 DDR_F_SRAS# DDR_F_SCAS#
DDR_DQ38 DDR_DQ34
DDR_CKE2 7DDR_CKE37
DDR_F_SRAS# 9 DDR_F_SCAS# 9 DDR_SCS#3 7DDR_SCS#27
DDR_DQ39 DDR_DQ35
DDR_DQ43 DDR_DQ42
DDR_DQ47 DDR_DQ46
DDR_CLK4# 7
DDR_DQ55 DDR_DQ50
DDR_CLK4 7
DDR_DQ54 DDR_DQ51
DDR_DQ56 DDR_DQ62
DDR_DQ61 DDR_DQ60
+3VS
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2231
401286
星期四 十二月
004
of
10 44, 16, 2
E
A
A
B
C
D
E
Layout note :
Distribute as close as possible to DDR-SODIMM.
+2.5V
1 1
1
C456
0.1U_0402_16V4Z
2
1
C142
0.1U_0402_16V4Z
2
1
C457
0.1U_0402_16V4Z
2
1
C459
0.1U_0402_16V4Z
2
1
C153
0.1U_0402_16V4Z
2
1
C136
0.1U_0402_16V4Z
2
1
C465
0.1U_0402_16V4Z
2
1
C461
0.1U_0402_16V4Z
2
1
C470
0.1U_0402_16V4Z
2
1
C141
0.1U_0402_16V4Z
2
1
C455
0.1U_0402_16V4Z
2
+2.5V +2.5V
1
C463
0.1U_0402_16V4Z
2
1
C462
0.1U_0402_16V4Z
2
1
C460
0.1U_0402_16V4Z
2
1
C154
0.1U_0402_16V4Z
2
1
C458
0.1U_0402_16V4Z
2
1
C157
0.1U_0402_16V4Z
2
1
+
C137 150U_D2_6.3VM
2
1
+
C138 150U_D2_6.3VM
2
Layout note :
Place one cap close to every 2 pull up resistors termination to +1.25V
2 2
+1.25VS
1
C526
0.1U_0402_16V4Z
2
+1.25VS
1
C516
0.1U_0402_16V4Z
2
1
C525
0.1U_0402_16V4Z
2
1
C514
0.1U_0402_16V4Z
2
1
C524
0.1U_0402_16V4Z
2
1
C515
0.1U_0402_16V4Z
2
1
C522
0.1U_0402_16V4Z
2
1
C513
0.1U_0402_16V4Z
2
1
C521
0.1U_0402_16V4Z
2
1
C512
0.1U_0402_16V4Z
2
1
C519
0.1U_0402_16V4Z
2
1
C179
0.1U_0402_16V4Z
2
1
C523
0.1U_0402_16V4Z
2
1
C173
0.1U_0402_16V4Z
2
1
C520
0.1U_0402_16V4Z
2
1
C511
0.1U_0402_16V4Z
2
1
C518
0.1U_0402_16V4Z
2
1
C180
0.1U_0402_16V4Z
2
1
C517
0.1U_0402_16V4Z
2
1
C510
0.1U_0402_16V4Z
2
+1.25VS
1
C509
0.1U_0402_16V4Z
3 3
2
1
C508
0.1U_0402_16V4Z
2
1
C507
0.1U_0402_16V4Z
2
1
C504
0.1U_0402_16V4Z
2
1
C506
0.1U_0402_16V4Z
2
1
C503
0.1U_0402_16V4Z
2
1
C502
0.1U_0402_16V4Z
2
1
C501
0.1U_0402_16V4Z
2
1
C500
0.1U_0402_16V4Z
2
1
C499
0.1U_0402_16V4Z
2
+1.25VS
1
C498
0.1U_0402_16V4Z
2
1
C497
0.1U_0402_16V4Z
2
1
C492
0.1U_0402_16V4Z
2
1
C490
0.1U_0402_16V4Z
2
1
C182
0.1U_0402_16V4Z
2
1
C493
0.1U_0402_16V4Z
2
1
C186
0.1U_0402_16V4Z
2
1
C491
0.1U_0402_16V4Z
2
1
C177
0.1U_0402_16V4Z
2
1
C174
0.1U_0402_16V4Z
2
+1.25VS
1
C505
0.1U_0402_16V4Z
2
1
C494
0.1U_0402_16V4Z
2
1
C178
0.1U_0402_16V4Z
2
1
C176
0.1U_0402_16V4Z
2
1
C495
0.1U_0402_16V4Z
2
1
C496
0.1U_0402_16V4Z
2
1
C175
0.1U_0402_16V4Z
2
1
C184
0.1U_0402_16V4Z
2
1
C183
0.1U_0402_16V4Z
2
1
C185
0.1U_0402_16V4Z
2
+1.25VS
4 4
1
C487
0.1U_0402_16V4Z
2
1
C181
0.1U_0402_16V4Z
2
A
1
C489
0.1U_0402_16V4Z
2
1
C488
0.1U_0402_16V4Z
2
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2231
401286
星期四 十二月
004
11 44, 16, 2
E
A
of
A
B
C
D
E
F
G
H
Clock Generator
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
0
0
0
0
111
0
1 1
R432 10K_0402_5%
2 2
3 3
VGATE14,39
CLK_ICH_48M14
SDCLK_48M24
CLK_ICH_14M14 CLK_14M_SIO26
166.67 166.67
00
100.00 100.00
01
200.00 200.00
133.33 133.33
+3VS
+3VS
1 2
1 2
+VCCP
1 2
R428 @56_0402_5%
+3VS
R94 @1K_0402_5%
R93
1K_0402_5%
1 2 1 2
R96
@1K_0402_5%
1 2
R131 10K_0402_5%
R129 0_0402_5%
1
C109
2
@10P_0402_50V8K
+3VS
12
12
R95 1K_0402_5%
13
D
2
G
S
1
C100
2
@10P_0402_50V8K
SLP_S1#14,28 STP_PCI#14 STP_CPU#14,39
Q17 2N7002_SOT23
+3VS
SMB_DATA9,10,13
SMB_CLK9,10,13
1 2
1 2
1 2
1 2 1 2
1 2
+3VS
C101 @10P_0402_50V8K
1 2
12
Y1
14.31818MHZ_20P_6X1430004201
1 2
C103 @10P_0402_50V8K
R118 1K_0402_5%
1 2
R113 10K_0402_5%
R117 475_0402_1%
R125 33_0402_5%
R124 33_0402_5%
R92 33_0402_5%
R91 33_0402_5%
XTALIN
XTALOUT
L10 CHB2012U121_0805
1 2
L9 CHB2012U121_0805
1 2
2
3
54 55 40
25 34 53
28
43
29 30
33 35
42
39
38
56
U20
XTAL_IN
XTAL_OUT
SEL0 SEL1 SEL2
PWR_DWN# PCI_STOP# CPU_STOP#
VTT_PWRGD#
MULT0
SDATA SCLK
3V66_0 3V66_1/VCH_CLK
IREF
48MHZ_USB
48MHZ_DOT
REF
+3V_CLK
Width=40 mils
32
14
1
VDD_REF
VDD_PCI_08VDD_PCI_1
VDD_3V66_019VDD_3V66_1
GND_REF4GND_PCI_09GND_PCI_115GND_3V66_020GND_3V66_131GND_48MHZ
1
C102 10U_1206_10V4Z
2
37
50
VDD_CPU_046VDD_CPU_1
VDD_48MHZ
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1 CPUCLKT0
CPUCLKC0
PCICLK_F2 PCICLK_F1 PCICLK_F0
GND_IREF41GND_CPU
ICS950810CG_TSSOP56
36
47
VDDA
VSSA
3V66_5
3V66_4 3V66_3 3V66_2
PCICLK6 PCICLK5 PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLK0
1
C106
2
0.1U_0402_16V4Z
+3V_VDD
26
1
C118
2
27
0.1U_0402_16V4Z
CLK_BCLK
45
CLK_BCLK#
44
CLK_MCH
49
CLK_MCH#
48
CLK_ITP
52
CLK_ITP#
51 24
AGP_66M
23
MCH_66M
22
ICH_66M
21
PCI_ICH
7 6 5
PCI_1394
18
PCI_SD
17
PCI_LAN
16
PCI_PCM
13
PCI_MINI
12
PCI_SIO
11
PCI_LPC
10
0.1U_0402_16V4Z
1
C108
2
1 2
1
C119 10U_1206_10V4Z
2
1 2
1 2 1 2
1 2 1 2
1 2
0.1U_0402_16V4Z
1
1
C110
2
2
0.1U_0402_16V4Z
L11 CHB2012U121_0805
R108 33_0402_5%
R110 33_0402_5%
R103 33_0402_5%
R104 33_0402_5%
R97 33_0402_5%
R99 33_0402_5%
R130 33_0402_5%
1 2
R128 33_0402_5%
1 2
R127 33_0402_5%
1 2
R102 33_0402_5%
1 2
R123 33_0402_5%
1 2
R122 33_0402_5%
1 2
R116 33_0402_5%
1 2
R115 33_0402_5%
1 2
R112 33_0402_5%
1 2
R109 33_0402_5%
1 2
R106 33_0402_5%
1 2
C113 @10P_0402_50V8K
C114
1 2 1 2
1 2 1 2
1 2 1 2
+3VS
0.1U_0402_16V4Z
1
1
C111
2
2
0.1U_0402_16V4Z
CLK_CPU_BCLK 4
R107
49.9_0402_1%
R111
49.9_0402_1%
CLK_CPU_BCLK# 4 CLK_MCH_BCLK 6
R101
49.9_0402_1%
R105
49.9_0402_1%
CLK_MCH_BCLK# 6 CLK_CPU_ITP 4
R98
49.9_0402_1%
R100
49.9_0402_1%
CLK_CPU_ITP# 4
1
2
1
C107
2
0.1U_0402_16V4Z
1
2
C115
@10P_0402_50V8K
C104
0.1U_0402_16V4Z
1
C116
2
1
C117 @10P_0402_50V8K
2
CLK_AGP_66M 17 CLK_MCH_66M 6 CLK_ICH_66M 13
CLK_PCI_ICH 13
CLK_PCI_1394 22
CLK_PCI_SD 24 CLK_PCI_LAN 21 CLK_PCI_PCM 19 CLK_PCI_MINI 23 CLK_PCI_SIO 26 CLK_PCI_LPC 28
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
D
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
SCHEMATIC, M/B LA-2231
Size Document Number Rev
B
401286
Date: Sheet
星期四 十二月
G
004
of
12 44, 16, 2
H
A
A
1 1
CLK_PCI_ICH
CLK_ICH_66M
2 2
12
R324 10_0402_5%
1
C413 18P_0402_50V8K
2
12
R330 @22_0402_5%
1
C423 @10P_0402_50V8K
2
PCI_AD[0..31]19,21,22,23
PCI_AD[0..31]
PCI Pullups
PCI_PERR# PCI_REQA# PCI_PIRQA# PCI_STOP# PCI_SERR#
3 3
4 4
+3VS
PCI_IRDY# PCI_TRDY# PCI_DEVSEL# PCI_FRAME#
+3VS
+3VS
1 8 2 7 3 6 4 5
1 2
RP6
8.2K_8P4R_1206_5%
1 2 3 4 5
1 2 3 4 5
PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3
PIDERST#
R308 @1K_0402_5%
RP8
8.2K_10P8R_1206_5%
RP5
8.2K_10P8R_1206_5%
10 9 8 7 6
10 9 8 7 6
A
PCI_PIRQB# PCI_REQ#4 PCI_REQB#
PCI_PIRQC# PCI_PIRQD#
SIRQ
PCI_LOCK#
+3VS
+3VS
PCIRST#
U41C SN74LVC125APWLE_TSSOP14
I9O
+3V POWER
10
OE#
B
U18A
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
PCI_C/BE#019,21,22,23 PCI_C/BE#119,21,22,23 PCI_C/BE#219,21,22,23 PCI_C/BE#319,21,22,23
PCI_REQ#022 PCI_REQ#123 PCI_REQ#219 PCI_REQ#321 PCI_REQ#423
PCI_GNT#022 PCI_GNT#123 PCI_GNT#219 PCI_GNT#321 PCI_GNT#423
CLK_PCI_ICH12
PCI_FRAME#19,21,22,23
PCI_DEVSEL#19,21,22,23
PCI_IRDY#19,21,22,23
PCI_PAR19,21,22,23
PCI_PERR#19,21,22,23
PCIRST#7,19,20,21,22,23,24,26
PCI_SERR#19,21,23
PCI_STOP#19,21,22,23
PCI_TRDY#19,21,22,23
PIDERST#16 SIDERST#16
8
B
PCI_C/BE#0 PCI_C/BE#1 PCI_C/BE#2 PCI_C/BE#3
PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4
PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4
CLK_PCI_ICH
PCI_FRAME# PCI_DEVSEL# PCI_IRDY#
PCI_PERR# PCI_LOCK#
PCIRST# PCI_SERR# PCI_STOP# PCI_TRDY#
PCI_REQA# PCI_REQB#
PIDERST# SIDERST#
B_PCIRST# 16,17,28
H5
AD0
J3
AD1
H3
AD2
K1
AD3
G5
AD4
J4
AD5
H4
AD6
J5
AD7
K2
AD8
G2
AD9
L1
AD10
G4
AD11
L2
AD12
H2
AD13
L3
AD14
F5
AD15
F4
AD16
N1
AD17
E5
AD18
N2
AD19
E3
AD20
N3
AD21
E4
AD22
M5
AD23
E2
AD24
P1
AD25
E1
AD26
P2
AD27
D3
AD28
R1
AD29
D2
AD30
P4
AD31
J2
C/BE#0
K4
C/BE#1
M4
C/BE#2
N4
C/BE#3
B1
REQ#0
A2
REQ#1
B3
REQ#2
C7
REQ#3
B6
REQ#4
C1
GNT#0
E6
GNT#1
A7
GNT#2
B7
GNT#3
D6
GNT#4
P5
PCICLK
F1
FRAME#
M3
DEVSEL#
L5
IRDY#
G1
PAR
L4
PERR#
M2
LOCK#
W2
PME#
U5
PCIRST#
K5
SERR#
F3
STOP#
F2
TRDY#
B5
REQA#/GPI0
A6
REQB#/GPI1/REQ5#
E8
GNTA#/GPO16
C5
GNTB#/GPO17/GNT5#
FW82801DBM_BGA421
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICH4
PCI I/F
EEPROM I/F
SM I/F
SMB_ALERT#/GPI11
CPU I/F
CPU_PWRGOOD
HUB I/F
HUB_VSWING
PIRQE#/GPI2
PIRQF#/GPI3 PIRQG#/GPI4 PIRQH#/GPI5
Interrupt I/F
LAN I/F
LAN_RSTSYNC
INTRUDER#
SMLINK0 SMLINK1
SMB_CLK
SMB_DATA
A20GATE
STPCLK#
HUB_VREF
APICCLK
EE_SHCLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
LAN_CLK
LAN_RST#
A20M#
DPSLP#
FERR#
IGNNE#
INIT#
INTR
RCIN#
SLP#
SMI#
HI10 HI11
CLK66
HI_STB
HI_STB# HICOMP
APICD0 APICD1 PIRQA# PIRQB# PIRQC# PIRQD#
IRQ14 IRQ15
SERIRQ
EE_CS
EE_IN
EE_OUT
C
INTRUDER#
W6
SMLINK0
AC3
SMLINK1
AB1
SMB_CLK
AC4
SMB_DATA
AB4
ACIN
AA5
Y22 AB23 U23
R351
AA21
56_0402_5%
W21 V22 AB22 V21
NMI
Y23 U22 U21 W23 V23
HUB_PD0
L19
HI0
HUB_PD1
L20
HI1
HUB_PD2
M19
HI2
HUB_PD3
M21
HI3
HUB_PD4
P19
HI4
HUB_PD5
R19
HI5
HUB_PD6
T20
HI6
HUB_PD7
R20
HI7
HUB_PD8
P23
HI8
HUB_PD9
L22
HI9
HUB_PD10
N22 K21
1 2
CLK_ICH_66M
T21 P21
N20
HUB_RCOMP_ICH
R23 M23 R22
APICCLK
J19
APICD0
H19
APICD1
K20
PCI_PIRQA#
D5
PCI_PIRQB#
C2
PCI_PIRQC#
B4
PCI_PIRQD#
A3
PCI_PIRQE#
C8
PCI_PIRQF#
D7
PCI_PIRQG#
C3
PCI_PIRQH#
C4
IRQ14
AC13
IRQ15
AA19
SIRQ
J22
D10 D11 A8 C12
A10 A9 A11 B10 C10 A12 C11 B11 Y5
C
1 2
R298 @1K_0402_5%
1 2
R347 10K_0402_5%
SMB_CLK 9,10,12 SMB_DATA 9,10,12 ACIN 28,34,35
H_FERR#
HUB_PD[0..10]
R319 @56_0402_5%
CLK_ICH_66M 12
HUB_PSTRB 6 HUB_PSTRB# 6
HUB_VREF
PCI_PIRQA# 17 PCI_PIRQB# 22 PCI_PIRQC# 19,23 PCI_PIRQD# 21,23
IRQ14 16 IRQ15 16 SIRQ 19,24,26,28
APICCLK APICD0 APICD1
R320 10K_0402_5%
H_IGNNE# 4 H_INIT# 4 H_INTR 4 H_NMI 4 H_PWRGD 4 RC# 28 H_CPUSLP# 4 H_SMI# 4 H_STPCLK# 4
HUB_PD[0..10] 6
1 2
GATEA20 28 H_A20M# 4 H_DPSLP# 4,7 H_FERR# 4
R314 10K_0402_5%
1 2
+1.8VS
R81
150_0402_1%
R82
150_0402_1%
R318 0_0402_5%
1 2
Title
Size Document Number Rev
401286
Date: Sheet
星期四 十二月
D
HUB_VREF
HUB_VREF
0.01U_0402_16V7K
1 2
1 2
1 2
1 2
1 2
1 8 2 7 3 6 4 5
INTRUDER#
C97
R368 10K_0402_5%
R361 10K_0402_5%
R304 @8.2K_0402_5%
R370
8.2K_0402_5% R350
8.2K_0402_5% RP7
100K_8P4R_1206_5%
1 2
1 2
1 2
1 2
C95
0.01U_0402_16V7K
Note: R272,R273 placement
center of MCH and ICH4M
SMB_CLK
SMB_DATA
SIDERST#
IRQ14
IRQ15
PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#
H_FERR#
HUB_RCOMP_ICH
SMLINK0
SMLINK1
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2231
004
D
1 2
R343 100K_0402_5%
+VCCP
R345 56_0402_5%
R327
36.5_0402_1%
R362
4.7K_0402_5% R354
4.7K_0402_5%
13 44, 16, 2
C96
0.1U_0402_16V4Z
+3VS
+3VS
+RTCVCC
+3VALW
of
A
A
+3VALW
5
SLPS4# SLPS5#
1 1
2 2
+3VS
1 2
R338 1K_0402_5%
+VCCP
1 2
R346
8.2K_0402_5%
+3VS
R369 10K_0402_5%
+3VS
1 2
+3VS
+3VS
+3VALW
R313 @1K_0402_5%
R306 @10K_0402_5%
R328 10K_0402_5%
OVCUR#3 OVCUR#4 OVCUR#1
R352 10K_0402_5%
R305 @10K_0402_5%
R353 @10K_0402_5%
3 3
4 4
U22
1
P
IN1
O
2
IN2
G
SN74AHC1G08HDCK_TSSOP5
3
V_GATE
CPUPERF#
PM_CLKRUN#
12
SPKR
ICH_AC_SDOUT
12
AGP_BUSY#
12
RP4
1 2 3 4 5
10K_10P8R_1206_5%
RSMRST#
12
IAC_BITCLK
12
RTCCLK
12
4
SLP_S5# 28
R332 0_0402_5%
IAC_BITCLK IAC_SDATAI0
IAC_SDATAI1 ICH_AC_SDOUT
ICH_AC_SYNC
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_DRQ#0 LPC_DRQ#1 LPC_FRAME#
USB_RBIAS
SIDEPWR16
@22P_0402_50V8J
AGP_BUSY# SYSRST# LLBATT# C3_STAT#
PM_CLKRUN#
EC_RIOUT# RSMRST#
SLPS4# SLPS5#
RTCCLK
SUS_STAT# ATF_INT#
CPUPERF#
V_GATE
12
OVCUR#1 OVCUR#3
OVCUR#4
C383
1
2
AGP_BUSY#17 LLBATT#28
C3_STAT#17
PM_CLKRUN#19,23,26,28
PM_DPRSLPVR39
PWRBTN_OUT#28
SYS_PWROK30 EC_RIOUT#28 RSMRST#28
SLP_S1#12,28
SLP_S3#28,34
STP_CPU#12,39 STP_PCI#12
SUS_STAT#17
VGATE12,39
IAC_BITCLK27,31
IAC_RST#27,31
IAC_SDATAI031 IAC_SDATAI127
LPC_AD024,26,28 LPC_AD124,26,28 LPC_AD224,26,28 LPC_AD324,26,28
LPC_DRQ#028
LPC_DRQ#126
LPC_FRAME#24,26,28
USBP0+25
USBP0-25
USBP1+34
USBP1-34
USBP2+25
USBP2-25
USBP3+27
USBP3-27
USBP4+34
USBP4-34
USBP5+25
USBP5-25
OVCUR#025 OVCUR#1 OVCUR#225
OVCUR#4 OVCUR#525
R300
22.6_0402_1%
1 2
MBAY_DISABLE34
10 9 8 7 6
A
+3VALW
EC_LID_OUT#
LLBATT# SCI#
IAC_SYNC27,31
IAC_SDATAO27,31
U18B
R2
AGPBUSY#
Y3
SYSRST#
AB2
BATLOW#
T3
C3_STAT#
AC2
CLKRUN#
V20
DPRSLPVR
AA1
PWRBTN#
AB6
PWROK
Y1
RI#
AA6
RSMRST#
W18
SLP_S1#
Y4
SLP_S3#
Y2
SLP_S4#
AA2
SLP_S5#
W19
STP_CPU#
Y21
STP_PCI#
AA4
SUS_CLK
AB3
SUS_STAT#/LPCPD#
V1
THRM#
J21
SSMUXSEL
Y20
CPUPERF#
V19
VGATE/VRMPWRGD
B8
AC_BITCLK
C13
AC_RST#
D13
AC_SDATAIN0
A13
AC_SDATAIN1
B13
AC_SDATAIN2
D9
AC_SDATAOUT
C9
AC_SYNC
T2
LPC_AD0
R4
LPC_AD1
T4
LPC_AD2
U2
LPC_AD3
U3
LPC_DRQ#0
U4
LPC_DRQ#1
T5
LPC_FRAME#
C20
USBP0+
D20
USBP0-
A21
USBP1+
B21
USBP1-
C18
USBP2+
D18
USBP2-
A19
USBP3+
B19
USBP3-
C16
USBP4+
D16
USBP4-
A17
USBP5+
B17
USBP5-
B15
OC#0
C14
OC#1
A15
OC#2
B14
OC#3
A14
OC#4
D14
OC#5
A23
USB_RBIAS
B23
USB_RBIAS#
J20
GPIO32
G22
GPIO33
F20
GPIO34
G20
GPIO35
F21
GPIO36
H20
GPIO37
F23
GPIO38
H22
GPIO39
G23
GPIO40
H21
GPIO41
F22
GPIO42
E23
GPIO43
FW82801DBM_BGA421
1
2
B
AC97 I/F
LPC I/F
USB I/F
GPIO
R301 33_0402_5%
1 2 1 2
R303
33_0402_5% C386 @22P_0402_50V8J
B
ICH4
GPIO
PM
IST
IDE I/F
CLOCK
MISC
ICH_AC_SYNC ICH_AC_SDOUT
C
+VCCP
THERMTRIP#4
12
1 2
R348 0_0402_5%
1 2
R143
10M_0603_5%
C130
12P_0402_50V8J
+3VS
PDD[0..15] 16
SDD[0..15] 16
1 2
+VCCP
1 2
R137 @2.4M_0603_1%
1 2
1 2
C429 @1U_0805_10V6F
C135
0.047U_0603_16V7K
R413 10K_0402_5%
R3
GPI7
GPI8 GPI12 GPI13
GPIO25 GPIO27 GPIO28
PDA0 PDA1
PDA2 PDCS1# PDCS3#
PDDREQ
PDDACK#
PDIOR# PDIOW# PIORDY
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8
PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
SDA0 SDA1
SDA2 SDCS1# SDCS3#
SDDREQ
SDDACK#
SDIOR# SDIOW# SIORDY
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
CLK14 CLK48
RTCRST#
VBIAS RTCX1 RTCX2
SPKR
THRMTRIP#
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EC_SMI#
V4
SCI#
V5
EC_LID_OUT#
W3 V2 W1 W4
PDA0
AA13
PDA1
AB13
PDA2
W13
PDCS1#
Y13
PDCS3#
AB14
PDDREQ
AA11
PDDACK#
Y12
PDIOR#
AC12
PDIOW#
W12
PDIORDY
AB12
PDD0
AB11
PDD1
AC11
PDD2
Y10
PDD3
AA10
PDD4
AA7
PDD5
AB8
PDD6
Y8
PDD7
AA8
PDD8
AB9
PDD9
Y9
PDD10
AC9
PDD11
W9
PDD12
AB10
PDD13
W10
PDD14
W11
PDD15
Y11
SDA0
AA20
SDA1
AC20
SDA2
AC21
SDCS1#
AB21
SDCS3#
AC22
SDDREQ
AB18
SDDACK#
AB19
SDIOR#
Y18
SDIOW#
AA18
SDIORDY
AC19
SDD0
W17
SDD1
AB17
SDD2
W16
SDD3
AC16
SDD4
W15
SDD5
AB15
SDD6
W14
SDD7
AA14
SDD8
Y14
SDD9
AC15
SDD10
AA15
SDD11
Y15
SDD12
AB16
SDD13
Y16
SDD14
AA17
SDD15
Y17
CLK_ICH_14M
J23
CLK_ICH_48M
F19
RTC_RST#
W7
VBIAS R_VBIAS
Y6
RTCX1
AC7
RTCX2
AC6
SPKR
H23
THERTRIP#
W20
32.768KHZ_12.5P_1TJS125DJ2A073
+3VS
12
EC_SMI# 28 SCI# 28 EC_LID_OUT# 28 EC_FLASH# 29
USB_EN# 25
PDA0 16 PDA1 16 PDA2 16 PDCS1# 16 PDCS3# 16
PDDREQ 16 PDDACK# 16 PDIOR# 16 PDIOW# 16 PDIORDY 16
SDA0 16 SDA1 16 SDA2 16 SDCS1# 16 SDCS3# 16
SDDREQ 16 SDDACK# 16 SDIOR# 16 SDIOW# 16 SDIORDY 16
CLK_ICH_14M 12 CLK_ICH_48M 12
SPKR 32
12P_0402_50V8J
C131
1
2
1 2
R134 10M_0603_5%
2
NC3NC
OUT4IN
1
C
PDD[0..15]
SDD[0..15]
X2
J1 JOPEN
1
2
1 2
R339 10K_0402_5%
+3VS
ITP_DBRESET#4
R372 @330_0402_5%
1 2
R342 56_0402_5%
THERMTRIP#
1 2
R334
1
180K_0402_5%
C418
0.1U_0402_16V4Z
2
1 2
12
R142 @22M_0603_5%
D
ATF_INT#
C435 1U_0805_25V4Z
1 2
R366
1 2
10K_0402_5%
1
C
Q36
2
B
@2SC2411K_SOT23
E
3
R341 56_0402_5%
+RTCVCC
R136 1K_0402_5%
Title
Size Document Number Rev
401286
Date: Sheet
星期四 十二月
D22
2 1
RB751V_SOD323
+3VALW
5
U37
1
P
IN1
SYSRST#
4
O
2
IN2
G
SN74AHC1G08HDCK_TSSOP5
3
THERTRIP#
CLK_ICH_14M
CLK_ICH_48M
1 2
R355
4.7K_0402_5%
1 2
R367
4.7K_0402_5%
12
1
2
12
1
2
+3VS
+3VS
MAINPWON 35,37,38
12
Compal Electronics, Inc.
SCHEMATIC, M/B LA-2231
004
D
EC_THRM# 28
PDIORDY
SDIORDY
R317 @22_0402_5%
C402 @10P_0402_50V8K
R310 @22_0402_5%
C394 @10P_0402_50V8K
of
14 44, 16, 2
A
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