Acer eMachines E732 Schematics
5
4
3
2
1
HM55_CP (ZRD) SYSTEM BLOCK DIAGRAM
BOM Option Table
Reference
IV@
X'TAL
14.318MHz
SW@
D D
C C
B B
Cardreader
P32
Description
for UMA only SKU
for Switchable Graphic only SKU
DDRIII-SODIMM1
DDRIII-SODIMM2
CK505
CLOCK
GENERATOR
SATA - HDD
SATA - ODD
USB Port
USB/B Con.
(USB Port x2)
Bluetooth Con.
AU6437-GBL
Cardreader control
P14,15
P34
P34
P34
P32
Dual Channel DDR III
800/1066 MHZ
P3
P29
P29
USB-1
USB-9/11
USB-4
USB-12
P8
BATTERY
Azalia
SATA 0
SATA 1
FDI
FDI
CLK
SATA
Ibex Peak-M
USB
PCH
P8, 9, 10, 11, 12, 13
RTC
IHDA
Arrandale
rPGA 989
P4, 5, 6, 7
LPC
DMI
DMI(x4)
DMI
GFXIMC
Display
PCI-E x1
SPI
PCI-E x16
INT_CRT
INT_LVDS
INT_HDMI
X'TAL
32.768KHz
X'TAL 25MHz
SPI ROM
AMD GPU
Robson_XT &
Park_XT
( 512M )
Capilano-Pro &
Madison-Pro
( 1G or 2G )
P16, 17, 18, 21, 22, 23
P8
PCIE-6
USB-13
PCIE-1
Channel A
Channel B
EXT_HDMI
EXT_CRT
EXT_LVDS
MINI CARD
WLAN
BRM 57780
GIGA LAN
TI SN75DP139
LS
P28
P26
X'TAL
25MHz
ISL88731A
Batery Charger
64Mb x 16 IO x 4 pcs
64Mb x 16 IO x 8 pcs
128Mb x 16 IO x 8 pcs
P38
P19, 20
P25
UP6111AQDD
+1.05V
USB-8
Int. MIC
RJ45
CRT Con.
LVDS/CCD/MIC
Con.
HDMI Con.
P27
P42
P24
P24
P25
ISL62881HRZ-T
+VGFX_AXG
P46
LPC
Int. MIC
A A
5
ALC272X
AUDIO CODEC
MIC JACK
P31
HP JACK
P31
P30
GMT
G1442P81U
AMP
Speaker
P31
P35
K/B Con.
4
NPCE781
EC
Power
Board Con.
P33
W25X16VSS1G
SPI FLASH
P37
SW/B Touch Pad
P33
EM-6781-T3
P37P35
HALL SENSOR
Board Con.
P24
3
P35
Fan Driver
(PWM Type)
P35
X'TAL
32.768KHz
RT8206B
3V/5V
ISL62882
CPU core
UP6111AQDD
+1.1V_VTT
2
RT8207A
+1.5V_SUS
P39
MAX8792ETD+T
+VGPU_CORE
P40
ISL62872
+VGPU_IO
P41
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
TPS54418RTE x2
+1.8V/+1V
P43
Discharger
P44
Thermal Protection
P45
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Block Diagram
Block Diagram
Block Diagram
1
ZRD
ZRD
ZRD
P47
P47
P48
1C
1C
1C
of
of
of
146Wednesday, July 21, 2010
146Wednesday, July 21, 2010
146Wednesday, July 21, 2010
1
GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)
+3.3V
2
VIN
VIN
3
+1.5V
4
+1.5V_SUS
5
+1.8V
6
7
8
+5V
dGPU_VRON
A A
VDDR3
MOS (AO3413)
+3_D (0.5A)
+3V_D
P22
VDDC
ISL6264
+VGPU_CORE (20A)
P44
PG_GPUIO_EN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
P47
PG_1.5V_EN
VDDR1
MOS (AO4710)
P43
+1.5V_GPU (10A)
PG_1.5V_EN
VDDR4
MOS (AO6402)
P43
+1.8V_GPU (3A)
PG_1.5V_EN
BJT
P22
dGPU_PWROK
dGPU_PWR_EN#
MOS
AO3413
+5_GPU
P22
GPU PWR CTRL Option 2 (VDDR3 after VDDR1)
VIN
VDDCI
ISL62872
P45
+VGPU_IO (4.5A)
PG_1V_EN
dGPU_VRON
VIN
VDDC
ISL6264
P44
+VGPU_CORE (20A)
Power States
POWER PLANE
B B
C C
VIN
+VCCRTC
+3VPCU
+5VPCU
+15V
+3V_S5
+5V_S5
+5V
+1.5VSUS
+0.75V_DDR_VTT
+VGFX_AXG S0GFX_ONInternal GPU POWER
+1.8V
+1.5V
+1.1V_VTT S0
+1.05V
+VCC_CORE
LCDVCC
+5V_GPU
+GPU_CORE
+GPU_IO PG_GPUIO_EN+0.9V~+1.1V
VOLTAGE
+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+5V
+3.3V
+1.5V
+0.75V
variation
+1.8V
+1.5V
+1.05V or +1.1V
+1.05V
variation
+3.3V
+5V Discrete enableSWITCHABLE PWM IC POWER
DESCRIPTION
RTC POWER
EC POWER
CHARGE POWER
CHARGE PUMP POWER
LAN/BT/CIR POWER
USB POWER
HDD/ODD/Codec/TP/CRT/HDMI POWER
PCH/GPU/Peripheral component POWER+3V
CPU/SODIMM CORE POWER
SODIMM Termination POWER
CPU/PCH/Braidwood POWER
MINI CARD/NEW CARD POWER
PCH CORE POWER MAINON
CPU CORE POWER
LCD POWER
+1.5V
(DP PLL PWR)
+1V
G9334ADJ & MOS
+1V (3A)
CONTROL
SIGNAL
ALWAYSMAIN POWER
ALWAYS
ALWAYS
ALWAYS
S5_ON
S5_ON
MAINON
MAINON
SUSON
MAINON
MAINON
MAINON
MAINONCPU VTT POWER
VRON
LVDS_VDDEN
dGPU_PWR_EN#
PG_1.5V_EN+1.5V+1.5V_GPU
+1.5V_GPU+1.8V+1.8V_GPU
PG_1V_EN+1V+1V Discrete enableDP/PEG POWER
P47
PG_1.5V_EN
+1.5V_SUS
VDDR1
MOS (AO4710)
+1.5V_GPU (10A)
ACTIVE IN
ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYSALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0
S0
S0
S0
S0
S0
Discrete enable+3V_DGPU CORE POWER+0.9V~+1.1V
Discrete enableGPU I/O POWER
Discrete enableVRAM CORE POWER
Discrete enableGPU_CRE/LVDS/PLL POWER
+1.5V_GPU
P43
Thermal Follow Chart
CPU
CORE PWR
+3.3V
VDDR3
MOS (AO3413)
P22
+3_D (0.5A)
+3V_DPG_GPUIO_EN
H_ORICHOT#
H/W Throttling
+1.8V
VDDR4
MOS (AO6402)
P43
+1.8V_GPU (3A)
NTC
Thermal
Protection
CPU
PCH
SM-Bus
EC
PG_1.5V_EN
BJT
P22
PM_THRMTRIP#
SML1ALERT#
CPUFAN#
dGPU_PWROK
SYS_SHDN#
WIRE-AND
dGPU_PWR_EN#
3V/5 V
SYS PWR
FANFAN Driver
+5V
MOS
AO3413
+5_GPU
P22
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
PWR Status & GPU PWR CRL & THRM
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
PROJECT :
ZRD
ZRD
ZRD
1C
1C
246Wednesday, July 21, 2010
246Wednesday, July 21, 2010
246Wednesday, July 21, 2010
8
1C
of
of
of
5
D D
L54 *PBY160808T-181Y-N/2A/180ohm_6L54 *PBY160808T-181Y-N/2A/180ohm_6
+1.5V
R586
R586
0_6
0_6
C464
C464
.1u/16V_4
.1u/16V_4
20mil
L29 BLM18AG601SN1D/200mA/600ohm_6L29 BLM18AG601SN1D/200mA/600ohm_6
+3V
C432
C432
4.7u/10V_8
4.7u/10V_8
C C
150mA(30mil)
C434
C434
.1u/16V_4
.1u/16V_4
C442
C442
.1u/16V_4
.1u/16V_4
CLK_ICH_14M[10]
.1u/16V_4
.1u/16V_4
+3V_CLK
IDT: AL003197000 (ICS9LRS3197AKLFT)
Realtek: AL000875002 (RTM875N-632-VB-GRT)
Silego: AL8SP585000 (SLG8SP585VTR)
C740
C740
4
+1.5V_CLK
C437
C437
.1u/16V_4
.1u/16V_4
C735 33p/50V_4C735 33p/50V_4
C733 33p/50V_4C733 33p/50V_4
R564 33_4R564 33_4
Y6
Y6
14.318MHz
14.318MHz
3
6/21 add R586 for 3V CLK gen
Un-stuff L54
U31 Change P/N
U31
U31
1
VDD_DOT
17
VDD_SRC
24
VDD_CPU
5
VDD_27
29
CLK_SDATA
CLK_SCLK
CPU_SEL
XTAL_IN
XTAL_OUT
VDD_REF
31
SDA
32
SCL
30
REF_0/CPU_SEL
28
XTAL_IN
27
XTAL_OUT
2
VSS_DOT
8
VSS_27
9
VSS_SATA
12
VSS_SRC
21
VSS_CPU
26
VSS_REF
33
GND
SLG8LV585V
SLG8LV585V
VDD_SRC_I/O
VDD_CPU_I/O
DOT_96
DOT_96#
27M
27M_SS
SRC_1/SATA
SRC_1#/SATA#
SRC_2
SRC_2#
*CPU_STOP#
CPU_1
CPU_1#
CPU_0
CPU_0#
CKPWRGD/PD#
15
18
3
4
R561 *33_4R561 *33_4
6
R562 *33_4R562 *33_4
7
10
11
13
14
16
20
19
23
22
CK_PWRGD_R
25
+VDDIO_CLK
CLK_BUF_DREFCLK [10]
CLK_BUF_DREFCLK# [10]
C467 *10p/50V_4C467 *10p/50V_4
CLK_BUF_DREFSSCLK [10]
CLK_BUF_DREFSSCLK# [10]
CLK_BUF_PCIE_3GPLL [10]
CLK_BUF_PCIE_3GPLL# [10]
R287 10K_4R287 10K_4
TP19TP19
TP20TP20
CLK_BUF_BCLK [10]
CLK_BUF_BCLK# [10]
2
80mA(20mil)
C435
C435
C734
C734
.1u/16V_4
.1u/16V_4
.1u/16V_4
.1u/16V_4
Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.
27M_CLK [17]
27M_CLK_SS [17]
REV: B Switch CLK_BUF_DREFSSCLK and
+3V
CLK_BUF_PCIE_3GPLL
L53 PBY160808T/2A/180ohm_6L53 PBY160808T/2A/180ohm_6
C731
C731
10u/Y5V_8
10u/Y5V_8
C732
C732
10u/Y5V_8
10u/Y5V_8
1
+1.05V
AL000890000REALTEK
AL000595000SLG
B B
+1.05V
R560
R560
*10K_4
*10K_4
R559
R559
10K_4
10K_4
CPU_SEL
C737
C737
*10p/50V/COG_4
*10p/50V/COG_4
01
A A
CPU_SEL
CPU0/1=133MHz
(default)
5
CPU0/1=100MHz
SMBusCPU_CLK select
ICH_SMBDATA[10]
ICH_SMBCLK[10]
4
+3V
CLK Enable
R555
2
3
3
+3V
2
Q20
Q20
2N7002K
2N7002K
Q19
Q19
2N7002K
2N7002K
R555
2.2K_4
2.2K_4
CLK_SDATA
1
R554
R554
2.2K_4
2.2K_4
CLK_SCLK
1
3
CLK_SDATA [14,15,28]
CLK_SCLK [14,15,28]
VR_PWRGD_CK505#[39]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
+3V
R558
R558
1K/F_4
1K/F_4
3
Q21
Q21
2N7002K
2N7002K
2
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Clock Generator
Clock Generator
Clock Generator
CK_PWRGD_R
R556
R556
100K/F_4
100K/F_4
ZRD
ZRD
ZRD
1C
1C
1C
346Wednesday, July 21, 2010
346Wednesday, July 21, 2010
346Wednesday, July 21, 2010
of
of
1
of
5
AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)
U24A
U24A
FDI_FSYNC0_R
FDI_FSYNC1_R
FDI_INT_R
FDI_LSYNC0_R
FDI_LSYNC1_R
A24
DMI_RX#[0]
C23
DMI_RX#[1]
B22
DMI_RX#[2]
A21
DMI_RX#[3]
B24
DMI_RX[0]
D23
DMI_RX[1]
B23
DMI_RX[2]
A22
DMI_RX[3]
D24
DMI_TX#[0]
G24
DMI_TX#[1]
F23
DMI_TX#[2]
H23
DMI_TX#[3]
D25
DMI_TX[0]
F24
DMI_TX[1]
E23
DMI_TX[2]
G23
DMI_TX[3]
E22
FDI_TX#[0]
D21
FDI_TX#[1]
D19
FDI_TX#[2]
D18
FDI_TX#[3]
G21
FDI_TX#[4]
E19
FDI_TX#[5]
F21
FDI_TX#[6]
G18
FDI_TX#[7]
D22
FDI_TX[0]
C21
FDI_TX[1]
D20
FDI_TX[2]
C18
FDI_TX[3]
G22
FDI_TX[4]
E20
FDI_TX[5]
F20
FDI_TX[6]
G19
FDI_TX[7]
F17
FDI_FSYNC[0]
E17
FDI_FSYNC[1]
C17
FDI_INT
F18
FDI_LSYNC[0]
D17
FDI_LSYNC[1]
Clarksfield/Auburndale
Clarksfield/Auburndale
DMI Intel(R) FDI
DMI Intel(R) FDI
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
DMI_TXN0[8]
DMI_TXN1[8]
DMI_TXN2[8]
DMI_TXN3[8]
D D
DMI_TXP0[8]
DMI_TXP1[8]
DMI_TXP2[8]
DMI_TXP3[8]
DMI_RXN0[8]
DMI_RXN1[8]
DMI_RXN2[8]
DMI_RXN3[8]
DMI_RXP0[8]
DMI_RXP1[8]
DMI_RXP2[8]
DMI_RXP3[8]
FDI_TXN0[8]
FDI_TXN1[8]
FDI_TXN2[8]
FDI_TXN3[8]
FDI_TXN4[8]
FDI_TXN5[8]
FDI_TXN6[8]
FDI_TXN7[8]
FDI_TXP0[8]
FDI_TXP1[8]
FDI_TXP2[8]
FDI_TXP3[8]
FDI_TXP4[8]
C C
FDI_TXP5[8]
FDI_TXP6[8]
FDI_TXP7[8]
B B
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
CPEG_TXN0
CPEG_TXN1
CPEG_TXN2
CPEG_TXN3
CPEG_TXN4
CPEG_TXN5
CPEG_TXN6
CPEG_TXN7
CPEG_TXN8
CPEG_TXN9
CPEG_TXN10
CPEG_TXN11
CPEG_TXN12
CPEG_TXN13
CPEG_TXN14
CPEG_TXN15
CPEG_TXP0
CPEG_TXP1
CPEG_TXP2
CPEG_TXP3
CPEG_TXP4
CPEG_TXP5
CPEG_TXP6
CPEG_TXP7
CPEG_TXP8
CPEG_TXP9
CPEG_TXP10
CPEG_TXP11
CPEG_TXP12
CPEG_TXP13
CPEG_TXP14
CPEG_TXP15
4
R424 49.9/F_4R424 49.9/F_4
R426 750/F_4R426 750/F_4
C603 EV@0.1u/10V_4C603 EV@0.1u/10V_4
C586 EV@0.1u/10V_4C586 EV@0.1u/10V_4
C601 EV@0.1u/10V_4C601 EV@0.1u/10V_4
C599 EV@0.1u/10V_4C599 EV@0.1u/10V_4
C597 EV@0.1u/10V_4C597 EV@0.1u/10V_4
C595 EV@0.1u/10V_4C595 EV@0.1u/10V_4
C578 EV@0.1u/10V_4C578 EV@0.1u/10V_4
C593 EV@0.1u/10V_4C593 EV@0.1u/10V_4
C576 EV@0.1u/10V_4C576 EV@0.1u/10V_4
C591 EV@0.1u/10V_4C591 EV@0.1u/10V_4
C611 EV@0.1u/10V_4C611 EV@0.1u/10V_4
C615 EV@0.1u/10V_4C615 EV@0.1u/10V_4
C623 EV@0.1u/10V_4C623 EV@0.1u/10V_4
C602 EV@0.1u/10V_4C602 EV@0.1u/10V_4
C585 EV@0.1u/10V_4C585 EV@0.1u/10V_4
C600 EV@0.1u/10V_4C600 EV@0.1u/10V_4
C583 EV@0.1u/10V_4C583 EV@0.1u/10V_4
C598 EV@0.1u/10V_4C598 EV@0.1u/10V_4
C581 EV@0.1u/10V_4C581 EV@0.1u/10V_4
C596 EV@0.1u/10V_4C596 EV@0.1u/10V_4
C579 EV@0.1u/10V_4C579 EV@0.1u/10V_4
C594 EV@0.1u/10V_4C594 EV@0.1u/10V_4
C577 EV@0.1u/10V_4C577 EV@0.1u/10V_4
C592 EV@0.1u/10V_4C592 EV@0.1u/10V_4
C575 EV@0.1u/10V_4C575 EV@0.1u/10V_4
C590 EV@0.1u/10V_4C590 EV@0.1u/10V_4
C613 EV@0.1u/10V_4C613 EV@0.1u/10V_4
C617 EV@0.1u/10V_4C617 EV@0.1u/10V_4
C627 EV@0.1u/10V_4C627 EV@0.1u/10V_4
PEG_RXN[0..15] [16]
Use reverse type
(at GPU side)
PEG_RXP[0..15] [16]
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_TXN[0..15] [16]
PEG_TXP[0..15] [16]
3
Processor Compensation Signals
R439 20/F_4R439 20/F_4
R435 20/F_4R435 20/F_4
R131 49.9/F_4R131 49.9/F_4
R432 49.9/F_4R432 49.9/F_4
H_PECI[11]
H_PROCHOT#[39]
PM_THRMTRIP#[11]
PM_SYNC[8]
H_PWRGOOD[11]
PM_DRAM_PWRGD[8]
PLTRST#[10,11,26,28,32,36]
R143 1.5K/F_4R143 1.5K/F_4
2
AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)
DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Arrandale
directly if motherboard only supports discrete graphics. If motherboard supports
U24B
R147
R147
750/F_4
750/F_4
U24B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
Clarksfield/Auburndale
Clarksfield/Auburndale
MISC THERMAL
MISC THERMAL
BCLK_ITP#
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
H_COMP3
H_COMP2
H_COMP1
H_COMP0
T14T14
H_CATERR#
H_PROCHOT#
H_CPURST# XDP_TMS
H_VTTPWRGD
T18T18
CPU_PLTRST#
integrated graphics but without eDP, these pins can also be connected to GND directly.
BCLK
BCLK#
BCLK_ITP
PEG_CLK
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TMS
TDI
TDO
A16
B16
AR30
AT30
E16
D16
DPLL_REF_SSCLK_R
A18
DPLL_REF_SSCLK#_R
A17
F6
SM_RCOMP_0
AL1
SM_RCOMP_1
AM1
SM_RCOMP_2
AN1
AN15
AP15
AT28
XDP_PREQ#
AP27
XDP_TCLK
AN28
AP28
XDP_TRST#
AT27
XDP_TDI_R
AT29
XDP_TDO
AR27
XDP_TDI_M
AR29
XDP_TDO_M
AP29
AN25
XDP_OBS0
AJ22
XDP_OBS1
AK22
XDP_OBS2
AK24
XDP_OBS3
AJ24
XDP_OBS4
AJ25
XDP_OBS5
AH22
XDP_OBS6
AK23
XDP_OBS7
AH23
T57T57
T58T58
CLK_CPU_BCLK [11]
CLK_CPU_BCLK# [11]
CLK_PCIE_3GPLL [10]
CLK_PCIE_3GPLL# [10]
DDR3_DRAMRST# [14,15]
R195 100/F_4R195 100/F_4
R194 24.9/F_4R194 24.9/F_4
R193 130/F_4R193 130/F_4
R137 10K_4R137 10K_4
R134 10K_4R134 10K_4
T60T60
R402 *0_4R402 *0_4
T23T23C584 EV@0.1u/10V_4C584 EV@0.1u/10V_4
T22T22
T21T21C582 EV@0.1u/10V_4C582 EV@0.1u/10V_4
T17T17
T15T15C580 EV@0.1u/10V_4C580 EV@0.1u/10V_4
T19T19
T20T20
T16T16
R453 *0_4R453 *0_4
R457 *0_4R457 *0_4
R458 *Short_4R458 *Short_4
R452 *Short_4R452 *Short_4
+1.05V
REV : B R116 SHORT
1
Layout Note: Place
these resistors
near Processor
PM_EXTTS#0 [14]
PM_EXTTS#1 [15]
XDP_DBRST# [8]
DGG^9000005LTS
DGG^9000016
SUY
DGG^9000023
FOX
DPLL_REF_SSCLK [10]
DPLL_REF_SSCLK# [10]
REV : B R458 & R452
Change to short pad
Thermaltrip protect
+1.05V
REV :B Change P/N for EOD
3
Q16
DELAY_VR_PWRGOOD[8,39]
A A
PM_THRMTRIP#
5
2
1 3
FDV301N
FDV301N
1
R162
R162
1K_4
1K_4
2
Q15
Q15
MMBT3904
MMBT3904
SYS_SHDN# [38,45]
4
VTT PWR_Good
MPWROK[36]
+3V
C295
C295
0.1u/10V_4
0.1u/10V_4
R129
3 5
4
U6
TC7SH08FUU6TC7SH08FU
R129
2K/F_4
2K/F_4
H_VTTPWRGD
R133
R133
1K_4
1K_4
3
2
1
Processor pull-up
+1.5VSUS
R156
R156
1.1K/F_4
1.1K/F_4
R154
R154
3K/F_4
3K/F_4
XDP_TDO
H_CATERR#
H_PROCHOT#
H_CPURST#
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#
PM_DRAM_PWRGD
R414 51/F_4R414 51/F_4
R141 49.9/F_4R141 49.9/F_4
R113 68_4R113 68_4
R428 *68_4R428 *68_4
R112 *51_4R112 *51_4
R425 *51_4R425 *51_4
R417 *51_4R417 *51_4
R111 *51_4R111 *51_4
R429 51/F_4R429 51/F_4
Use a voltage divider with VDDQ
(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.
+1.05V
2
FDI_FSYNC0[8]
FDI_FSYNC1[8]
FDI_LSYNC0[8]
FDI_LSYNC1[8]
R121 IV@0_4R121 IV@0_4
R123 IV@0_4R123 IV@0_4
R128 IV@0_4R128 IV@0_4
FDI_INT[8]
R119 IV@0_4R119 IV@0_4
R126 IV@0_4R126 IV@0_4
R120 EV@1K_4R120 EV@1K_4
R122 EV@1K_4R122 EV@1K_4
R127 EV@1K_4R127 EV@1K_4
R118 EV@1K_4R118 EV@1K_4Q16
R125 EV@1K_4R125 EV@1K_4
<The GFX_IMON, FDI_FSYNC[0],
FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1],
and FDI_INT>Note that if these signals
are left as no connect, there are no
functional impacts, but a small amount of
power (~15 mW) maybe wasted.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 1/4
AUBURNDA 1/4
AUBURNDA 1/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
1
FDI_FSYNC0_R
FDI_FSYNC1_R
FDI_INT_R
FDI_LSYNC0_R
FDI_LSYNC1_R
ZRD
ZRD
ZRD
446Wednesday, July 21, 2010
446Wednesday, July 21, 2010
446Wednesday, July 21, 2010
1C
1C
1C
of
of
of
5
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)
U24C
U24C
M_A_DQ[63:0][14]
D D
C C
B B
M_A_BS#0[14]
M_A_BS#1[14]
M_A_BS#2[14]
M_A_CAS#[14]
M_A_RAS#[14]
M_A_WE#[14]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AJ10
AL10
AK12
AK11
AM10
AR11
AL11
AM9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
A10
C10
B10
D10
E10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AK8
AL7
AL8
AN8
AN9
AC3
AB2
AE1
AB3
AE9
F10
J10
AJ7
AJ6
AJ9
C7
A7
A8
D8
E6
F7
E9
B7
E7
C6
G8
K7
J8
G7
J7
L7
M6
M8
L9
L6
K8
N8
P9
U7
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_CLK0 [14]
M_A_CLK0# [14]
M_A_CKE0 [14]
M_A_CLK1 [14]
M_A_CLK1# [14]
M_A_CKE1 [14]
M_A_CS#0 [14]
M_A_CS#1 [14]
M_A_ODT0 [14]
M_A_ODT1 [14]
M_A_DM[7:0] [14]
M_A_DQS#[7:0] [14]
M_A_DQS[7:0] [14]
M_A_A[15:0] [14]
3
M_B_DQ[63:0][15]
M_B_BS#0[15]
M_B_BS#1[15]
M_B_BS#2[15]
M_B_CAS#[15]
M_B_RAS#[15]
M_B_WE#[15]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AG1
AG4
AG3
AH4
AM6
AN2
AM4
AM3
AN5
AN6
AN4
AN3
AN7
AR10
AT10
AC5
AC6
AF3
AJ3
AK1
AJ4
AK3
AK4
AK5
AK2
AP3
AT4
AT5
AT6
AP6
AP8
AT9
AT7
AP9
AB1
W5
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
R7
Y7
U24D
U24D
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
2
W8
SB_CK[0]
W9
SB_CK#[0]
M3
SB_CKE[0]
V7
SB_CK[1]
V6
SB_CK#[1]
M2
SB_CKE[1]
AB8
SB_CS#[0]
AD6
SB_CS#[1]
AC7
SB_ODT[0]
AD1
SB_ODT[1]
M_B_DM0
D4
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
1
M_B_CLK0 [15]
M_B_CLK0# [15]
M_B_CKE0 [15]
M_B_CLK1 [15]
M_B_CLK1# [15]
M_B_CKE1 [15]
M_B_CS#0 [15]
M_B_CS#1 [15]
M_B_ODT0 [15]
M_B_ODT1 [15]
M_B_DQS#[7:0] [15]
M_B_DQS[7:0] [15]
M_B_DM[7:0] [15]
M_B_A[15:0] [15]
Clarksfield/Auburndale
Clarksfield/Auburndale
Clarksfield/Auburndale
Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.
A A
5
4
3
Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.
Clarksfield/Auburndale
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 2/4
AUBURNDA 2/4
AUBURNDA 2/4
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZRD
ZRD
ZRD
546Wednesday, July 21, 2010
546Wednesday, July 21, 2010
546Wednesday, July 21, 2010
of
of
1
of
1C
1C
1C
5
U24F
CPU Core Power
ARD:48A
CFD:52A
C604 10U/6.3V_8C604 10U/6.3V_8
C653 22U/6.3V_8C653 22U/6.3V_8
C249 10U/6.3V_8C249 10U/6.3V_8
D D
C C
B B
A A
C607 22U/6.3V_8C607 22U/6.3V_8
C650 22U/6.3V_8C650 22U/6.3V_8
C673 10U/6.3V_8C673 10U/6.3V_8
C672 10U/6.3V_8C672 10U/6.3V_8
C606 22U/6.3V_8C606 22U/6.3V_8
C670 10U/6.3V_8C670 10U/6.3V_8
C217 10U/6.3V_8C217 10U/6.3V_8
C181 22U/6.3V_8C181 22U/6.3V_8
C250 10U/6.3V_8C250 10U/6.3V_8
C195 10U/6.3V_8C195 10U/6.3V_8
C288 10U/6.3V_8C288 10U/6.3V_8
C651 10U/6.3V_8C651 10U/6.3V_8
C648 10U/6.3V_8C648 10U/6.3V_8
C669 10U/6.3V_8C669 10U/6.3V_8
C652 10U/6.3V_8C652 10U/6.3V_8
C605 10U/6.3V_8C605 10U/6.3V_8
C649 10U/6.3V_8C649 10U/6.3V_8
C274 10U/6.3V_8C274 10U/6.3V_8
C273 10U/6.3V_8C273 10U/6.3V_8
C251 10U/6.3V_8C251 10U/6.3V_8
C671 10U/6.3V_8C671 10U/6.3V_8
C286 10U/6.3V_8C286 10U/6.3V_8
C248 10U/6.3V_8C248 10U/6.3V_8
C662 10U/6.3V_8C662 10U/6.3V_8
C280 0.1u/10V_4C280 0.1u/10V_4
C276 0.1u/10V_4C276 0.1u/10V_4
C284 330u/2V_7343
C284 330u/2V_7343
C285 330u/2V_7343
C285 330u/2V_7343
+VCC_CORE
+
+
+
+
U24F
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28
VCC38
AC27
VCC39
AC26
VCC40
AA35
VCC41
AA34
VCC42
AA33
VCC43
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
Clarksfield/Auburndale
Clarksfield/Auburndale
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)
5
4
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VTT_SELECT
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
4
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
H_PSI#
AN33
PSI#
H_VID0
AK35
H_VID1
AK33
H_VID2
AK34
H_VID3
AL35
H_VID4
AL33
H_VID5
AM33
H_VID6
AM35
H_DPRSLPVR
AM34
G15
H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V
AN35
AJ34
AJ35
VTT_SENSE
B15
VSS_SENSE_VTT
A15
C694 10U/6.3V_8C694 10U/6.3V_8
C693 10U/6.3V_8C693 10U/6.3V_8
C664 10U/6.3V_8C664 10U/6.3V_8
C306 10U/6.3V_8C306 10U/6.3V_8
C678 10U/6.3V_8C678 10U/6.3V_8
C685 10U/6.3V_8C685 10U/6.3V_8
C675 10U/6.3V_8C675 10U/6.3V_8
C695 10U/6.3V_8C695 10U/6.3V_8
C696 10U/6.3V_8C696 10U/6.3V_8
C308 10U/6.3V_8C308 10U/6.3V_8
+
+
C301 330u/2V_7343
C301 330u/2V_7343
C298 22U/6.3V_8C298 22U/6.3V_8
C305 22U/6.3V_8C305 22U/6.3V_8
R71 100/F_4R71 100/F_4
R70 100/F_4R70 100/F_4
VTT Rail Values are
Auburndal VTT=1.05V
Clarksfield VTT=1.1V
18A
+1.05V
+1.05V
H_PSI# [39]
H_VID0 [39]
H_VID1 [39]
H_VID2 [39]
H_VID3 [39]
H_VID4 [39]
H_VID5 [39]
H_VID6 [39]
H_DPRSLPVR [39]
I_MON [39]
+VCC_CORE
VCCSENSE [39]
VSSSENSE [39]
T64T64
T63T63
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)
+VGFX_AXG
22A
+
+
C665
C665
*330U/2V_7343
*330U/2V_7343
+
+
C686
C686
*330U/2V_7343
*330U/2V_7343
+1.05V
C309
C309
10U/6.3V_8
10U/6.3V_8
3
C283
C283
IV@22u/6.3V_8
IV@22u/6.3V_8
C289
C289
IV@10u/6.3V_8
IV@10u/6.3V_8
C296
C296
10U/6.3V_8
10U/6.3V_8
C692
C692
10U/6.3V_8
10U/6.3V_8
1
1
1
0
0
1
0
1
0
Note:
For Validating IMVP VR R6451 should be STUFF
and R2N1 NO_STUFF
R117 EV@1K_4R117 EV@1K_4
C691
C691
22u/6.3V_8
22u/6.3V_8
C297
C297
22u/6.3V_8
22u/6.3V_8
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_DPRSLPVR
H_PSI#
C282
C282
IV@22u/6.3V_8
IV@22u/6.3V_8C196 22U/6.3V_8C196 22U/6.3V_8
C290
C290
IV@10u/6.3V_8
IV@10u/6.3V_8
C307
C307
22u/6.3V_8
22u/6.3V_8
R381 1K_4R381 1K_4
R386 *1K/F_4R386 *1K/F_4
R380 1K_4R380 1K_4
R385 *1K/F_4R385 *1K/F_4
R382 1K_4R382 1K_4
R387 *1K/F_4R387 *1K/F_4
R389 *1K/F_4R389 *1K/F_4
R395 1K_4R395 1K_4
R390 *1K/F_4R390 *1K/F_4
R396 1K_4R396 1K_4
R393 1K_4R393 1K_4
R399 *1K/F_4R399 *1K/F_4
R391 *1K/F_4R391 *1K/F_4
R397 1K_4R397 1K_4
R392 1K_4R392 1K_4
R398 *1K/F_4R398 *1K/F_4
R407 *1K/F_4R407 *1K/F_4
R401 1K_4R401 1K_4
U24G
U24G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
Clarksfield/Auburndale
Clarksfield/Auburndale
HFM_VID : Max 1.4V
LFM_VID : Min 0.65V
2
GRAPHICS
GRAPHICS
FDI PEG & DMI
FDI PEG & DMI
+1.05V
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
GRAPHICS VIDs
GRAPHICS VIDs
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
POWER
POWER
VDDQ18
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
1.1V1.8V
1.1V1.8V
VTT1_66
VTT1_67
VTT1_68
VCCPLL1
VCCPLL2
VCCPLL3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
R115 EV@1K_4R115 EV@1K_4
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
C697 10U/6.3V_8C697 10U/6.3V_8
L10
C690 10U/6.3V_8C690 10U/6.3V_8
K10
J22
C644 10U/6.3V_8C644 10U/6.3V_8
J20
C658 10U/6.3V_8C658 10U/6.3V_8
J18
H21
H20
H19
L26
L27
C271 22U/6.3V_8C271 22U/6.3V_8
M26
C278 4.7U/6.3V_6C278 4.7U/6.3V_6
C223 2.2U/6.3V_6C223 2.2U/6.3V_6
C225 1U/6.3V_4C225 1U/6.3V_4
C226 1U/6.3V_4C226 1U/6.3V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
AUBURNDA 3/4 (PWR)
Date: Sheet
Date: Sheet
Date: Sheet
C347
C347
1U/6.3V_4
1U/6.3V_4
C415
C415
1U/6.3V_4
1U/6.3V_4
VCC_AXG_SENSE [42]
VSS_AXG_SENSE [42]
GFX_VID0 [42]
GFX_VID1 [42]
GFX_VID2 [42]
GFX_VID3 [42]
GFX_VID4 [42]
GFX_VID5 [42]
GFX_VID6 [42]
GFX_ON [42]
GFX_DPRSLPVR [42]
GFX_IMON [42]
ARD:3A
CFD:6A
C341
C341
C338
1U/6.3V_4
1U/6.3V_4
C343
C343
22U/6.3V_8
22U/6.3V_8
C338
1U/6.3V_4
1U/6.3V_4
ZRD
ZRD
ZRD
C342
C342
1U/6.3V_4
1U/6.3V_4
C352
C352
22U/6.3V_8
22U/6.3V_8
+1.05V
0.6A
+1.8V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
+
+
C358
C358
*330U/2V_7343
*330U/2V_7343
646Wednesday, July 21, 2010
646Wednesday, July 21, 2010
646Wednesday, July 21, 2010
+1.5VSUS
of
of
of
1C
1C
1C
5
4
3
2
1
AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U24E
U24H
U24H
AT20
VSS1
AT17
VSS2
AR31
VSS3
AR28
VSS4
AR26
VSS5
AR24
VSS6
AR23
VSS7
AR20
VSS8
AR17
VSS9
AR15
VSS10
D D
C C
B B
AR12
VSS11
AR9
VSS12
AR6
VSS13
AR3
VSS14
AP20
VSS15
AP17
VSS16
AP13
VSS17
AP10
VSS18
AP7
VSS19
AP4
VSS20
AP2
VSS21
AN34
VSS22
AN31
VSS23
AN23
VSS24
AN20
VSS25
AN17
VSS26
AM29
VSS27
AM27
VSS28
AM25
VSS29
AM20
VSS30
AM17
VSS31
AM14
VSS32
AM11
VSS33
AM8
VSS34
AM5
VSS35
AM2
VSS36
AL34
VSS37
AL31
VSS38
AL23
VSS39
AL20
VSS40
AL17
VSS41
AL12
VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45
AK29
VSS46
AK27
VSS47
AK25
VSS48
AK20
VSS49
AK17
VSS50
AJ31
VSS51
AJ23
VSS52
AJ20
VSS53
AJ17
VSS54
AJ14
VSS55
AJ11
VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59
AH35
VSS60
AH34
VSS61
AH33
VSS62
AH32
VSS63
AH31
VSS64
AH30
VSS65
AH29
VSS66
AH28
VSS67
AH27
VSS68
AH26
VSS69
AH20
VSS70
AH17
VSS71
AH13
VSS72
AH9
VSS73
AH6
VSS74
AH3
VSS75
AG10
VSS76
AF8
VSS77
AF4
VSS78
AF2
VSS79
AE35
VSS80
Clarksfield/Auburndale
Clarksfield/Auburndale
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
U24I
U24I
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
Clarksfield/Auburndale
Clarksfield/Auburndale
VSS
VSS
NCTF
NCTF
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
TP7TP7
TP9TP9
TP13TP13
TP10TP10
TP11TP11
CFG0
CFG3
CFG4
CFG7
Processor Strapping
CFG0
10
(PCI-Epress
Configuration Select)
CFG3
(PCI-Epress Static
Lane Reversal)
A A
5
CFG4
(Embended
Display Port Presence)
7KH&ODUNILHOGSURFHVVRUV3&,([SUHVVLQWHUIDFHPD\QRWPHHW3&,([SUHVVMLWWH
VSHFLILFDWLRQV
,
Q
WHOUHFRPPHQGVSODFLQJD.SXOOGRZQUHVLVWRUWR966RQ&)*>@SLQIRUERWKU3*$
DQG%*$
FRP
SRQHQWV7KLVSXOOGRZQUHVLVWRUVKRXOGEHUHPRYHGZKHQWKLVLVVXHLVIL[HG
Single PEG
Normal Operation Lane Numbers Reversed
Disabled; No Physical Display Port
attached to Embedded Diplay Port
4
Bifurcation enabled
Enabled; An external Display port
device is connected to the Embedded
Display port
U
3
DEFAULT
1
1
1
U24E
AP25
RSVD1
AL25
RSVD2
AL24
RSVD3
AL22
RSVD4
AJ33
RSVD5
AG9
RSVD6
M27
RSVD7
L28
RSVD8
J17
SA_DIMM_VREF
H17
SB_DIMM_VREF
G25
RSVD11
G17
RSVD12
E31
RSVD13
E30
RSVD14
AM30
CFG[0]
AM28
CFG[1]
AP31
CFG[2]
AL32
CFG[3]
AL30
CFG[4]
AM31
CFG[5]
AN29
CFG[6]
AM32
CFG[7]
AK32
CFG[8]
AK31
CFG[9]
AK28
CFG[10]
AJ28
CFG[11]
AN30
CFG[12]
AN32
CFG[13]
AJ32
CFG[14]
AJ29
CFG[15]
AJ30
CFG[16]
AK30
CFG[17]
H16
RSVD_TP_86
B19
RSVD15
A19
RSVD16
A20
RSVD17
B20
RSVD18
U9
RSVD19
T9
RSVD20
AC9
RSVD21
AB9
RSVD22
C1
RSVD_NCTF_23
A3
RSVD_NCTF_24
J29
RSVD26
J28
RSVD27
A34
RSVD_NCTF_28
A33
RSVD_NCTF_29
C35
RSVD_NCTF_30
B35
RSVD_NCTF_31
Clarksfield/Auburndale
Clarksfield/Auburndale
CFG0
R110 *3.01K_NCR110 *3.01K_NC
CFG3
R102 3.01K/F_4R102 3.01K/F_4
CFG4
R109 *3.01KR109 *3.01K
CFG7
R103 *3.01K/F_4R103 *3.01K/F_4
AJ13
RSVD32
AJ12
RSVD33
AH25
RSVD34
AK26
RSVD35
AL26
RSVD36
RSVD_NCTF_37
RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD_TP_59
RSVD_TP_60
RESERVED
RESERVED
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
2
AR2
AJ26
RSVD38
AJ27
RSVD39
AP1
AT2
AT3
AR1
AL28
RSVD45
AL29
RSVD46
AP30
RSVD47
AP32
RSVD48
AL27
RSVD49
AT31
RSVD50
AT32
RSVD51
AP33
RSVD52
AR33
RSVD53
AT33
AT34
AP35
AR35
AR32
RSVD58
E15
F15
A2
KEY
D15
RSVD62
C15
RSVD63
AJ15
RSVD64
RSVD65
VSS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
TP1TP1
AH15
TP2TP2
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
TP8TP8
AP34 can be NC on CRB; EDS/DG suggestion to GND
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
AUBURNDA 4/4
AUBURNDA 4/4
AUBURNDA 4/4
1
ZRD
ZRD
ZRD
746Wednesday, July 21, 2010
746Wednesday, July 21, 2010
746Wednesday, July 21, 2010
1C
1C
1C
of
of
of
5
IBEX PEAK-M (DMI,FDI,GPIO)
4
3
2
1
AC-coupling CAP place close to PCH
U26C
U26C
XDP_DBRST#
ACIN_R
PM_BATLOW#
PM_RI#
BC24
BJ22
AW20
BJ20
BD24
BG22
BA20
BG20
BE22
BF21
BD20
BE18
BD22
BH21
BC20
BD18
BH25
BF25
T6
M6
B17
K5
A10
D9
C16
M1
P5
P7
A6
F14
IbexPeak-M_R1P0
IbexPeak-M_R1P0
DMI_RXN0[4]
SYS_PWROK
ICH_RSMRST#[36]
DNBSWON#[36]
PCH_ACIN[36]
DMI_RXN1[4]
DMI_RXN2[4]
DMI_RXN3[4]
DMI_RXP0[4]
DMI_RXP1[4]
DMI_RXP2[4]
DMI_RXP3[4]
DMI_TXN0[4]
DMI_TXN1[4]
DMI_TXN2[4]
DMI_TXN3[4]
DMI_TXP0[4]
DMI_TXP1[4]
DMI_TXP2[4]
DMI_TXP3[4]
+1.05V
R480 49.9/F_4R480 49.9/F_4
RSV_ICH_LAN_RST#
SUS_PWR_ACK_R
R258 *0_4R258 *0_4
D D
C C
XDP_DBRST#[4]
PM_DRAM_PWRGD[4]
B B
0-ohm resistor place close to PCH
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
DMI_IRCOMP
SYS_RESET#
SYS_PWROK
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#
SUS_PWR_DN_ACK / GPIO30
PWRBTN#
ACPRESENT / GPIO31
BATLOW# / GPIO72
RI#
System Power Management
System Power Management
DMI
DMI
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI
FDI
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
SUSCLK / GPIO62
SLP_S5# / GPIO63
SLP_S4#
SLP_S3#
SLP_M#
TP23
PMSYNCH
SLP_LAN# / GPIO29
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
FDI_TXN0_R
FDI_TXN1_R
FDI_TXN2_R
FDI_TXN3_R
FDI_TXN4_R
FDI_TXN5_R
FDI_TXN6_R
FDI_TXN7_R
FDI_TXP0_R
FDI_TXP1_R
FDI_TXP2_R
FDI_TXP3_R
FDI_TXP4_R
FDI_TXP5_R
FDI_TXP6_R
FDI_TXP7_R
SLP_M#
PM_SLP_LAN#
R491 IV@0_4R491 IV@0_4
R499 IV@0_4R499 IV@0_4
R506 IV@0_4R506 IV@0_4
R510 IV@0_4R510 IV@0_4
R496 IV@0_4R496 IV@0_4
R505 IV@0_4R505 IV@0_4
R517 IV@0_4R517 IV@0_4
R514 IV@0_4R514 IV@0_4
R493 IV@0_4R493 IV@0_4
R500 IV@0_4R500 IV@0_4
R503 IV@0_4R503 IV@0_4
R512 IV@0_4R512 IV@0_4
R495 IV@0_4R495 IV@0_4
R509 IV@0_4R509 IV@0_4
R515 IV@0_4R515 IV@0_4
R513 IV@0_4R513 IV@0_4
REV : B R244 SHORT
R235 *0_4R235 *0_4
TP18TP18
TP6TP6
FDI_TXN0 [4]
FDI_TXN1 [4]
FDI_TXN2 [4]
FDI_TXN3 [4]
FDI_TXN4 [4]
FDI_TXN5 [4]
FDI_TXN6 [4]
FDI_TXN7 [4]
FDI_TXP0 [4]
FDI_TXP1 [4]
FDI_TXP2 [4]
FDI_TXP3 [4]
FDI_TXP4 [4]
FDI_TXP5 [4]
FDI_TXP6 [4]
FDI_TXP7 [4]
FDI_INT [4]
FDI_FSYNC0 [4]
FDI_FSYNC1 [4]
FDI_LSYNC0 [4]
FDI_LSYNC1 [4]
PCIE_WAKE# [26,28]
CLKRUN# [36]
ICH_SUSCLK [36]
SUSC# [36]
SUSB# [36]
PM_SYNC [4]
INT_LVDS_BLON[24]
INT_LVDS_DIGON[24]
INT_LVDS_BRIGHT[24]
INT_LVDS_EDIDCLK[24]
INT_LVDS_EDIDDATA[24]
INT_TXLCLKOUT-[24]
INT_TXLCLKOUT+[24]
INT_TXLOUT0-[24]
INT_TXLOUT1-[24]
INT_TXLOUT2-[24]
INT_CRT_BLU[24]
INT_CRT_GRN[24]
INT_CRT_RED[24]
INT_CRT_DDCCLK[24]
INT_CRT_DDCDAT[24]
INT_HSYNC[24]
INT_VSYNC[24]
+3V
INT_TXLOUT0+[24]
INT_TXLOUT1+[24]
INT_TXLOUT2+[24]
R149 IV@10K_4R149 IV@10K_4
R150 IV@10K_4R150 IV@10K_4
R132 IV@0_4R132 IV@0_4
R135 IV@0_4R135 IV@0_4
INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
DAC_IREF
R161
R161
1K/F_4
1K/F_4
IBEX PEAK-M (LVDS,DDI)
U26D
U26D
AB48
AB46
AP39
AP41
AT43
AT42
AV53
AV51
BB47
BA52
AY48
AV47
BB48
BA50
AY49
AV48
AP48
AP47
AY53
AT49
AU52
AT53
AY51
AT48
AU50
AT51
AA52
AB53
AD53
AD48
AB51
T48
T47
Y48
Y45
V48
V51
V53
Y53
Y51
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
IbexPeak-M_R1P0
IbexPeak-M_R1P0
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
CRT
CRT
SDVO_INTN
SDVO_INTP
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
SDVO_CTRLCLK
SDVO_CTRLDAT
INT_HDMI_HPD
INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R
R49 IV@0_4R49 IV@0_4R170 IV@2.37K/F_4R170 IV@2.37K/F_4
R48 IV@0_4R48 IV@0_4
R171 IV@0_4R171 IV@0_4
C275 IV@0.1u/10V_4_X7RC275 IV@0.1u/10V_4_X7R
C272 IV@0.1u/10V_4_X7RC272 IV@0.1u/10V_4_X7R
C269 IV@0.1u/10V_4_X7RC269 IV@0.1u/10V_4_X7R
C270 IV@0.1u/10V_4_X7RC270 IV@0.1u/10V_4_X7R
C281 IV@0.1u/10V_4_X7RC281 IV@0.1u/10V_4_X7R
C279 IV@0.1u/10V_4_X7RC279 IV@0.1u/10V_4_X7R
C257 IV@0.1u/10V_4_X7RC257 IV@0.1u/10V_4_X7R
C266 IV@0.1u/10V_4_X7RC266 IV@0.1u/10V_4_X7R
R place close to PCH
R465 IV@150_4R465 IV@150_4
R466 IV@150_4R466 IV@150_4
R467 IV@150_4R467 IV@150_4
HDMI_DDCCLK_SW [17,25]
HDMI_DDCDATA_SW [17,25]
HDMI_HP [17,25]
INT_HDMITX2N [25]
INT_HDMITX2P [25]
INT_HDMITX1N [25]
INT_HDMITX1P [25]
INT_HDMITX0N [25]
INT_HDMITX0P [25]
INT_HDMICLK- [25]
INT_HDMICLK+ [25]
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
PCH Pull-high/low System PWR_OK
+3V
CLKRUN#
A A
XDP_DBRST#
ICH_RSMRST#
RSV_ICH_LAN_RST#
SYS_PWROK
R532 8.2K_4R532 8.2K_4
R236 1K_4R236 1K_4
R507 10K_4R507 10K_4
R516 10K_4R516 10K_4
R502 10K_4R502 10K_4
5
PM_RI#
PM_BATLOW#
PCIE_WAKE#
PM_SLP_LAN#
SUS_PWR_ACK_R
ACIN_R
R200 10K_4R200 10K_4
R523 10K_4R523 10K_4
R240 10K_4R240 10K_4
R260 *10K_4R260 *10K_4
R536 10K_4R536 10K_4
R237 10K_4R237 10K_4
+3V_S5
4
3
C703 *.1u_4C703 *.1u_4
SYS_PWROK
U28
U28
TC7SH08FU
TC7SH08FU
+3V_S5
DELAY_VR_PWRGOOD need PU 2K to +3V.
PU at power side
53
1
4
2
R546 100K_4R546 100K_4
DELAY_VR_PWRGOOD [4,39]
PWROK_EC [36]
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
IBEX PEAK-M 1/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZRD
ZRD
ZRD
of
of
of
846Wednesday, July 21, 2010
846Wednesday, July 21, 2010
1
846Wednesday, July 21, 2010
1C
1C
1C
5
RTC Circuitry
+VCCRTC
CR1
+3VPCU
VCCRTC_1
R478
R478
1K_4
1K_4
BT1
D D
BT1
1
1
2
2
RTC_CONN
RTC_CONN
CR1
BAT54C
BAT54C
R508 20K/F_4R508 20K/F_4
R501 20K/F_4R501 20K/F_4
C710
C710
1u/10V_4
1u/10V_4
C709
C709
1u/10V_4
1u/10V_4
C708
C708
1u/10V_4
1u/10V_4
RTC_RST#
12
J3
J3
*SHORT_ PAD1
*SHORT_ PAD1
SRTC_RST#
12
J2
J2
*SHORT_ PAD1
*SHORT_ PAD1
HDA Bus
C C
PCH_AZ_CODEC_SYNC[30]
PCH_AZ_CODEC_RST#[30]
PCH_AZ_CODEC_SDOUT[30]
PCH_AZ_CODEC_BITCLK[30]
R490 33_4R490 33_4
R484 33_4R484 33_4
R492 33_4R492 33_4
R487 33_4R487 33_4
C704
C704
*27p_4
*27p_4
ACZ_SYNCACZ_SYNC
ACZ_RST#
ACZ_SDOUTACZ_SDOUT
ACZ_BIT_CLKACZ_BIT_CLK
4
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
C364 15p/50V_4C364 15p/50V_4
C362 15p/50V_4C362 15p/50V_4
+VCCRTC
PCH_AZ_CODEC_SDIN0[30]
+3V_S5
+3VPCU
23
Y1
32.768KHZY132.768KHZ
4 1
R504 1M_4R504 1M_4
ACZ_BIT_CLK
ACZ_SYNC
SPKR[30]
ACZ_RST#
R494 *10K_4R494 *10K_4
R553 *10K_4R553 *10K_4
3
R207
R207
10M_4
10M_4
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INVRMEN
SPKR
ACZ_SDOUT
PCH_GPIO33
RTC_X1
RTC_X2
SPI_CLK_R
SPI_CS0#_R
SPI_CS1#
SPI_SI_R
SPI_SO_R
U26A
U26A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IbexPeak-M_R1P0
IbexPeak-M_R1P0
RTCIHDA
RTCIHDA
SPI JTAG
SPI JTAG
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
FWH4 / LFRAME#
LDRQ1# / GPIO23
LPC
LPC
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19
LDRQ0#
SERIRQ
2
D33
B33
C32
A32
C34
A34
F34
AB9
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
T3
Y9
V1
R232 10K_4R232 10K_4
SATA_RXN0_C
SATA_RXP0_C
SATA_RXN1_C
SATA_RXP1_C
Note:
SATA port2/3 may not be available on all PCH sku
(HM55 support 3 port only)
R199 37.4/F_4R199 37.4/F_4
SATA_ACT# [33]
R252 43K/F_4R252 43K/F_4
R530 43K/F_4R530 43K/F_4
LPC_LAD0 [28,36]
LPC_LAD1 [28,36]
LPC_LAD2 [28,36]
LPC_LAD3 [28,36]
LPC_LFRAME# [28,36]
+3V
IRQ_SERIRQ [36]
SATA_RXN0_C [29]
SATA_RXP0_C [29]
SATA_TXN0 [29]
SATA_TXP0 [29]
SATA_RXN1_C [29]
SATA_RXP1_C [29]
SATA_TXN1 [29]
SATA_TXP1 [29]
+1.05V
+3V
+3V
1
PCH Strap Pin Configuration Table-1
INTVRMEN
SPI_MOSI
PCH SPI
B B
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R
R552 3.3K/F_4R552 3.3K/F_4
+3V
U29
U29
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q32BVSSIG
W25Q32BVSSIG
HOLD#
VDD
VSS
8
R547 3.3K/F_4R547 3.3K/F_4
7
4
+3V
C721
C721
.1u/10V_4
.1u/10V_4
SPKR
HDA_DOCK_EN
#/GPIO33
GNT0#,
GNT1#
GNT2#/
GPIO53
GNT3#/
GPIO55
NV_ALE
NV_CLE
Integrated 1.05V VRM
Enable / Disable
TPM Functionality
Disable
Reboot option at
power-up
Flash Descriptor
Security Override
Boot BIOS Strap
ESI Strap
(Server Only)
Top-Block
Swap Override
IntelR Anti-Theft Technology
HDD Data Protection
(Intel AT-d) Enable
DMI Termination
Voltage
1 = Integrated VRM is enabled
0 = Integrated VRM is disabled
1 = Enabled
0 = Disable
0 = Default Mode (Internal weak Pull-down)
1 = No Reboot Mode with TCO Disabled
0 = Flash Descriptor Security will be overridden
1 = Security measure defined in the Flash
Descriptor will be enabled.
(0,0) = LPC (0,1) = Reserved NAND
(1,0) = PCI (1,1) = SPI
ESI compatible mode is for server
platforms only
0 = Top Block Swap Mode
1 = Default Mode (Internal pull-up)
1 = Enabled
0 = Disabled (Default)
DMI termination voltage. Weak
internal pull-up. Do not pull low.
+VCCRTC
+3V
+3V
PCH_GPIO33
PCI_GNT0#[10]
PCI_GNT1#[10]
PWM_SELECT#[10]
PCI_GNT3#[10]
NV_ALE[10]
NV_CLE[10]
1 2
R158 1K_4R158 1K_4
R152 1K_4R152 1K_4
R153 *1K_4R153 *1K_4
R159 *1K_4R159 *1K_4
R182 *1K/F_4R182 *1K/F_4
R462 *10K/F_4R462 *10K/F_4
R213 *1K/F_4R213 *1K/F_4
R216 *1K/F_4R216 *1K/F_4
PCH_INVRMEN
SPI_SI_R
SPKR
R511 330K_6R511 330K_6
R551 *1K_4R551 *1K_4
R538 *1K/F_4R538 *1K/F_4
J1 *SHORT_ PAD1J1 *SHORT_ PAD1
+3V
+1.8V
+1.8V
GPIO8
A A
GPIO15
GPIO27
5
4
Reserved This signal has a weak internal pull up.
Reserved
On-Die PLL Voltage
Regulator
<internal weak pull-up>
NOTE: This signal should not be pulled low
0 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with confidentiality
0 = Disables the VccVRM.
1 = Enables the internal VccVRM to have
a clean supply for analog rails.
3
RSV_GPIO8[11]
CR_WAKE#[11]
PCH_GPIO27[11]
R215 10K_4R215 10K_4
R214 *1K_4R214 *1K_4
R256 1K_4R256 1K_4
R231 *10K_4R231 *10K_4
2
+3V_S5
+3V_S5
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
IBEX PEAK-M 2/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
ZRD
ZRD
ZRD
of
of
of
946Wednesday, July 21, 2010
946Wednesday, July 21, 2010
1
946Wednesday, July 21, 2010
1C
1C
1C
5
U26E
U26E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
D D
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
TP5TP5
R464 22_4R464 22_4
TP12TP12
R157 22_4R157 22_4
R146 22_4R146 22_4
PCI_REQ0#
PCI_REQ1#
dGPU_SELECT#
PCI_REQ3#
PCI_GNT0#
PCI_GNT1#
PWM_SELECT#
PCI_GNT3#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
PCI_RST#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
ICH_PME#
PCI_PLTRST#
CLK_LPC_DEBUG_C
CLK_PCI_PCCARD
CLK_PCI_775_CCLK_PCI_775_C
C C
PCI_GNT0#[9]
PCI_GNT1#[9]
PWM_SELECT#[9]
PCI_GNT3#[9]
PCI_RST#[28]
CLK_LPC_DEBUG[28]
B B
CLK_PCI_775[36]
CLK_PCI_FB CLK_PCI_FB_C
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1# / GPIO50
B45
REQ2# / GPIO52
M53
REQ3# / GPIO54
F48
GNT0#
K45
GNT1# / GPIO51
F36
GNT2# / GPIO53
H53
GNT3# / GPIO55
B41
PIRQE# / GPIO2
K53
PIRQF# / GPIO3
A36
PIRQG# / GPIO4
A48
PIRQH# / GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
IbexPeak-M_R1P0
IbexPeak-M_R1P0
PCI
PCI
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NVRAM
NVRAM
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USB
USB
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_ALE
NV_CLE
NV_RCOMP
NV_RB#
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
AY9
BD1
AP15
BD8
AV9
BG8
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
D25
N16
J16
F16
L16
E14
G16
F12
T15
4
NV_ALE
NV_CLE
NV_RCOMP
R519 *32.4/F_4R519 *32.4/F_4
Port1 and port9 can be used on debug mode
USBP1- [34]
USBP1+ [34]
USBP4- [34]
USBP4+ [34]
TP16TP16
TP17TP17
USB port6/7 may not be available on all PCH sku
(HM55 support 12port only)
USBP8- [24]
USBP8+ [24]
USBP9- [34]
USBP9+ [34]
TP15TP15
TP14TP14
USBP11- [34]
USBP11+ [34]
USBP12- [32]
USBP12+ [32]
USBP13- [28]
USB_BIAS
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4_5#
USB_OC6#
USB_OC7#
USBP13+ [28]
R497 22.6/F_4R497 22.6/F_4
NV_ALE [9]
NV_CLE [9]
MB USB
BLUETOOTH
Camera
USB/B-USB1-2
USB/B-USB1-1
Card Reader
Mini Card (WLAN)
USB_OC0# [34]
USB_OC4_5# [34]
EHCI1
EHCI2
Wireless
LAN
3
PCIE_RX1-[26]
PCIE_RX1+[26]
PCIE_TX1-[26]
PCIE_TX1+[26]
PCIE_RX6-[28]
PCIE_RX6+[28]
PCIE_TX6-[28]
PCIE_TX6+[28]
CLK_PCH_SRC2#[28]
CLK_PCH_SRC2[28]
PCIE_CLK_REQ2#[28]
CLK_PCIE_LOM#[26]
CLK_PCIE_LOM[26]
CLK_PCIE_LAN_REQ#[26]
C701 0.1u/10V_4_X7RC701 0.1u/10V_4_X7R
C702 0.1u/10V_4_X7RC702 0.1u/10V_4_X7R
C316 0.1u/10V_4_X7RC316 0.1u/10V_4_X7R
C320 0.1u/10V_4_X7RC320 0.1u/10V_4_X7R
CLK_PCIE_REQ0#
CLK_PCIE_REQ1#_R
CLK_PCIE_REQ2#_R
R537 *Short_4R537 *Short_4
REV : B Change to short pad
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
REV : B R243 SHORT
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN6_C
PCIE_TXP6_C
BG30
BF29
BH29
AW30
BA30
BC30
BD30
AU30
AT30
AU32
AV32
BA32
BB32
BD32
BE32
BF33
BH33
BG32
BA34
AW34
BC34
BD34
AT34
AU34
AU36
AV36
BG34
BG36
AK48
AK47
AM43
AM45
AM47
AM48
AH42
AH41
AM51
AM53
AK53
AK51
BJ30
BJ32
BJ34
BJ36
U4
N4
M9
AJ50
AJ52
H6
P13
U26B
U26B
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
P9
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2# / GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
A8
PCIECLKRQ3# / GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4# / GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5# / GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
IbexPeak-M_R1P0
IbexPeak-M_R1P0
2
PCI-E*
PCI-E*
SMBALERT# / GPIO11
SMBDATA
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
SML1ALERT# / GPIO74
SMBus
SMBus
SML1CLK / GPIO58
SML1DATA / GPIO75
Link
Link
Controller
Controller
PEG
PEG
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
Clock Flex
Clock Flex
CL_DATA1
CL_RST1#
PEG_A_CLKRQ# / GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67
SMBCLK
CL_CLK1
B9
H14
C8
J14
C6
G8
M14
E10
G12
CL_CLK1
T13
CL_DATA1
T11
CL_RST1#
T9
PEG_CLKREQ#_R
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
AH53
XCLK_RCOMP
AF38
T45
P43
T42
dGPU_EDIDSEL#
N50
RSV_SMBALERT#
ICH_SMBCLK
ICH_SMBDATA
RSV_SML0ALERT#
SMB_CLK_ME0
SMB_DATA_ME0
RSV_SML1ALERT#
SMB_CLK_ME1
SMB_DATA_ME1
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
R167 90.9/F_4R167 90.9/F_4
BOARD_ID1
BOARD_ID2
BOARD_ID3
R254 *0_4R254 *0_4
CL_CLK1 [28]
CL_DATA1 [28]
CL_RST1# [28]
CLK_PCIE_VGA# [16]
CLK_PCIE_VGA [16]
CLK_PCIE_3GPLL# [4]
CLK_PCIE_3GPLL [4]
DPLL_REF_SSCLK# [4]
DPLL_REF_SSCLK [4]
R151 *10K_4R151 *10K_4
1
ICH_SMBCLK [3]
ICH_SMBDATA [3]
SML1ALERT# [11,35,36]
CLK_BUF_PCIE_3GPLL# [3]
CLK_BUF_PCIE_3GPLL [3]
CLK_BUF_BCLK# [3]
CLK_BUF_BCLK [3]
CLK_BUF_DREFCLK# [3]
CLK_BUF_DREFCLK [3]
CLK_BUF_DREFSSCLK# [3]
CLK_BUF_DREFSSCLK [3]
CLK_ICH_14M [3]
+1.05V
+3V
R468
R468
1M_4
1M_4
C683 27p/50V_4C683 27p/50V_4
12
Y5
25MHzY525MHz
C682 27p/50V_4C682 27p/50V_4
+3V
EC1
EC1
*0.1u/10V_4
*0.1u/10V_4
+3V_S5
R257 10K_4R257 10K_4
R522 10K_4R522 10K_4
R239 10K_4R239 10K_4
R259 10K_4R259 10K_4
R242 10K_4R242 10K_4
R526 IV@10K_4R526 IV@10K_4
+3V
R540 10K_4R540 10K_4
+3V
R164 10K_4R164 10K_4
R165 8.2K_4R165 8.2K_4
R463 8.2K_4R463 8.2K_4
R169 8.2K_4R169 8.2K_4
R527 10K_4R527 10K_4
R535 EV@10K/F_4R535 EV@10K/F_4
CLK_PCIE_REQ0#
CLK_PCIE_REQ3#
CLK_PCIE_REQ4#
CLK_PCIE_REQ5#
CLK_PCIE_LAN_REQ#
PEG_CLKREQ#_R
CLK_PCIE_REQ1#_R
dGPU_SELECT#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
CLK_PCIE_REQ2#_R
PEG_CLKREQ#_R
3
RP2
USB_OC3#
USB_OC2#
+3V_S5
C395
C395
.1u/10V_4
.1u/10V_4
PCI_PLTRST#
R261 *0_4R261 *0_4
A A
2
1
R264
R264
10K_4
10K_4
+3V
U8
3 5
TC7SH08FUU8TC7SH08FU
R265 *0_4R265 *0_4
4
5
R262
R262
100K_4
100K_4
PLTRST# [4,11,26,28,32,36]
USB_OC4_5#
+3V_S5
PCI_PIRQD#
PCI_REQ1#
PCI_FRAME#
PCI_TRDY#
+3V
PCI_PIRQC#
PCI_PIRQA#
PCI_STOP# PCI_PLOCK#
PCI_IRDY#
+3V
6
7
8
9
10
6
7
8
9
10
6
7
8
9
10
RP2
8.2K_10P8R
8.2K_10P8R
RP4
RP4
8.2K_10P8R
8.2K_10P8R
RP1
RP1
8.2K_10P8R
8.2K_10P8R
4
5
4
3
2
1
5
4
3
2
1
5
4
3
2
1
USB_OC1#
USB_OC0#
USB_OC6#
USB_OC7#
PCI_REQ3#
PCI_PIRQB#
PCI_REQ0#
PCI_PIRQH#
PCI_DEVSEL#
PCI_PERR#
PCI_SERR#
+3V_S5
+3V
+3V
R163 stuff/R442 non stuff for SMT debug
R441 SP@10K_4R441 SP@10K_4
R442 *10K_4R442 *10K_4
R443 *10K_4R443 *10K_4
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID1
R160 SP@10K_4R160 SP@10K_4
BOARD_ID2
R163 10K_4R163 10K_4
BOARD_ID3
R444 10K_4R444 10K_4
High = Capilano
Low = Madsion or other GPUs
High = 80port output to LPC
Low = 80port output to PCI
High = Reserved
Low = Reserved (Default)
+3V_S5
R518 10K_4R518 10K_4
R220 10K_4R220 10K_4
R255 10K_4R255 10K_4
R521 2.2K_4R521 2.2K_4
R520 2.2K_4R520 2.2K_4
R225 2.2K_4R225 2.2K_4
R222 2.2K_4R222 2.2K_4
2
RSV_SMBALERT#
RSV_SML0ALERT#
RSV_SML1ALERT#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0
2ND_MBCLK[36]
2ND_MBDATA[36]
+3V_S5
R203
R203
2
2.2K_4
2.2K_4
SMB_CLK_ME1
3
1
Q1
2N7002KQ12N7002K
+3V_S5
R204
R204
2
2.2K_4
2.2K_4
SMB_DATA_ME1
3
1
Q2
2N7002KQ22N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
IBEX PEAK-M 3/6
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT :
1
ZRD
ZRD
ZRD
of
of
of
10 46Wednesday, July 21, 2010
10 46Wednesday, July 21, 2010
10 46Wednesday, July 21, 2010
1C
1C
1C
5
4
3
2
1
GPU RST#
D D
LCD_DETECT[24]
SIO_EXT_SMI#[36]
SIO_EXT_SCI#[36]
RSV_GPIO8[9]
CR_WAKE#[9]
dGPU_PWROK[19]
PCH_GPIO27[9]
C C
dGPU_VRON[19,43]
dGPU_PWR_EN# should be stable
before dGPU_VRON enable
REV : B Change to short pad
SML1ALERT#[10,35,36]
EC suggestion use GPIO49 for FAN control
SATA5GP / GPIO49 / TEMP_ALERT# is used to
alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.
B B
So connecting GPIO49 to EC and avoid this
pin to be used for other purpose
A A
R533 *Short_4R533 *Short_4
LCD_DETECT
SIO_EXT_SMI#
SIO_EXT_SCI#
BOARD_ID0
RSV_GPIO8
LAN_DISABLE#
CR_WAKE#
dGPU_HOLD_RST#
GPIO22
PCH_GPIO27
TP_PCH_GPIO28
STP_PCI#
dGPU_PWR_EN#dGPU_PWR_EN#
dGPU_PRSNT#
GPIO38
SAVE_LED#
GPIO45
RST_GATE#
SV_SET_UP
SATA5GP
GPIO57
C38
D37
F10
AA2
F38
H10
AB12
V13
M11
AB7
AB13
AB6
AA4
A49
A50
A52
A53
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D53
E53
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U26F
U26F
A20GATE
PECI
RCIN#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
TP1
AW22
TP2
BB22
TP3
AY45
TP4
AY46
TP5
AV43
TP6
AV45
TP7
AF13
TP8
M18
TP9
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
Y3
BMBUSY# / GPIO0
TACH1 / GPIO1
TACH2 / GPIO6
J32
TACH3 / GPIO7
GPIO8
K9
LAN_PHY_PWR_CTRL / GPIO12
T7
GPIO15
SATA4GP / GPIO16
TACH0 / GPIO17
Y7
SCLOCK / GPIO22
GPIO24
GPIO27
GPIO28
STP_PCI# / GPIO34
V6
SATACLKREQ# / GPIO35
SATA2GP / GPIO36
SATA3GP / GPIO37
V3
SLOAD / GPIO38
P3
SDATAOUT0 / GPIO39
H3
PCIECLKRQ6# / GPIO45
F1
PCIECLKRQ7# / GPIO46
SDATAOUT1 / GPIO48
SATA5GP / GPIO49
F8
GPIO57
A4
VSS_NCTF_1
VSS_NCTF_2
A5
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
VSS_NCTF_29
E1
VSS_NCTF_30
VSS_NCTF_31
IbexPeak-M_R1P0
IbexPeak-M_R1P0
MISC
MISC
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PROCPWRGD
THRMTRIP#
PCH_THRMTRIP#_R
R208 56/F_4R208 56/F_4
SIO_A20GATE [36]
CLK_CPU_BCLK# [4]
CLK_CPU_BCLK [4]
H_PECI [4]
SIO_RCIN# [36]
H_PWRGOOD [4]
R211 56/F_4R211 56/F_4
PM_THRMTRIP# [4]
+1.05V
GPU_RST# [16]
GPIO Pull-up/Pull-down
TP_PCH_GPIO28
GPIO45
RST_GATE#
GPIO57
LAN_DISABLE#
SIO_EXT_SMI#
SIO_EXT_SCI#
dGPU_PWR_EN#
dGPU_PWROK
SIO_RCIN#
SIO_A20GATE
dGPU_HOLD_RST#
SATA5GP
GPIO22
SAVE_LED#
STP_PCI#
GPIO38
LCD_DETECT
SV_SET_UP
SV_SET_UP 1-X High = Strong (Default)
GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1
R173 10K_4R173 10K_4
+3V
R250 IV@10K_4R250 IV@10K_4 R230 EV@10K_4R230 EV@10K_4
+3V
53
4
GPIO57
BOARD_ID0
R267 EV@0_4R267 EV@0_4
*.1u_4
*.1u_4
C408
C408
1
dGPU_HOLD_RST#
2
U9
U9
*TC7SH08FU
*TC7SH08FU
R251 10K_4R251 10K_4
R525 10K_4R525 10K_4
R524 10K_4R524 10K_4
R218 *10K_4R218 *10K_4
R241 10K_4R241 10K_4
R172 10K_4R172 10K_4
R483 10K_4R483 10K_4
R233 10K_4R233 10K_4
R175 *10K_4R175 *10K_4
R539 10K_4R539 10K_4
R529 10K_4R529 10K_4
R542 *10K_4R542 *10K_4
R543 10K_4R543 10K_4
R234 10K_4R234 10K_4
R528 10K_4R528 10K_4
R238 10K_4R238 10K_4
R541 10K_4R541 10K_4
R531 *8.2K_4R531 *8.2K_4
R253 10K_4R253 10K_4
R217 10K_4R217 10K_4
BOARD_ID0
dGPU_PRSNT#
dGPU always exist
High = 15"
Low = 14"
R246
R246
*100K_4
*100K_4
+3V_S5
+3V
+3V
R181 *10K_4R181 *10K_4
PLTRST#[4,10,26,28,32,36]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 4/6
IBEX PEAK-M 4/6
IBEX PEAK-M 4/6
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
ZRD
ZRD
ZRD
1C
1C
1C
of
of
of
11 46Wednesday, July 21, 2010
11 46Wednesday, July 21, 2010
11 46Wednesday, July 21, 2010
1
IBEX PEAK-M (POWER)
+1.05V
REV : B Change to short pad
D D
5
R144 *Short_8R144 *Short_8
R155 *Short_8R155 *Short_8
+1.05V_VCCCORE_ICH
C335
C335
10u/6.3V_8
10u/6.3V_8
VCCCORE(+1.05V) = 1.432A(80mils)
C330
C330
1u/6.3V_4
1u/6.3V_4
AB24
AB26
AB28
AD26
AD28
AH26
AH28
AH30
AH31
AF26
AF28
AF30
AF31
AJ30
AJ31
U26G
U26G
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
REV : B Change to short pad
C705 *10u/6.3V_6C705 *10u/6.3V_6
37mA(15mils)
C707
C707
*10u/6.3V_6
*10u/6.3V_6
+1.05V_PCH_VCCDPLL_EXP
+V1.1LAN_VCCAPLL_EXP
C333 10U/6.3V_8C333 10U/6.3V_8
C336 1U/6.3V_4C336 1U/6.3V_4
C348 1U/6.3V_4C348 1U/6.3V_4
C337 1U/6.3V_4C337 1U/6.3V_4
C329 1U/6.3V_4C329 1U/6.3V_4
+3V
+V1.5S_1.8S
+V1.1LAN_VCCAPLL_FDI
+1.05V
REV : B Short R189
AK24
AN20
AN22
AN23
AN24
AN26
AN28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31
AN35
AT22
AM23
BJ24
BJ26
BJ28
BJ18
VCCIO[24]
VCCAPLLEXP
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCIO[54]
VCCIO[55]
VCC3_3[1]
VCCVRM[1]
VCCFDIPLL
VCCIO[1]
IbexPeak-M_R1P0
IbexPeak-M_R1P0
R191 *Short_6R191 *Short_6
+1.05V
40mA(15mils)
C C
L46 *1uh_6L46 *1uh_6
+1.05V
VCCIO = 3.062A(150mils)
+1.05V
REV : B Short R140 & R201
L47 *1uH_6L47 *1uH_6
+1.05V
B B
VCCVRM=196mA(15mils)
R224 *Short_6R224 *Short_6
+1.8V
REV : B Change to short pad
VRM enable by strap pin GPIO27
which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]
L44 *10uh_8L44 *10uh_8
+1.05V
L43 10uh_8L43 10uh_8
A A
POWER
POWER
VCC CORE
VCC CORE
PCI E*
PCI E*
C376
C376
.1u/16V_4
.1u/16V_4
4
CRTLVDS
CRTLVDS
HVCMOS
HVCMOS
DMI
DMI
NAND / SPI
NAND / SPI
FDI
FDI
C379
C379
.1u/16V_4
.1u/16V_4
+
+
C667
C667
*220u_3528
*220u_3528
+
+
C684
C684
220u_3528
220u_3528
VCCADAC[1]
VCCADAC[2]
VSSA_DAC[1]
VSSA_DAC[2]
VCCALVDS
VSSA_LVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[2]
VCC3_3[3]
VCC3_3[4]
VCCVRM[2]
VCCDMI[1]
VCCDMI[2]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
+V1.5S_1.8S
+VCCA_DAC_1_2
AE50
AE52
AF53
AF51
AH38
AH39
SP@
UMA=CH31004KB17<0.01u>
AP43
MXM=CS00002JB38<0_ohm>
AP45
AT46
C314
C314
AT45
SP@.01u/25V_4
SP@.01u/25V_4
AB34
AB35
+3V_VCC_GIO
AD35
C328
C328
.1u/16V_4
.1u/16V_4
+VCCVRM
AT24
+VCCDMI
AT16
AU16
C359
C359
1u/10V_4
1u/10V_4
AM16
AK16
AK20
VCCPNAND
AK19
AK15
C355
C355
AK13
AM12
.1u/16V_4
.1u/16V_4
AM13
AM15
AM8
+3V_VCCME_SPI
AM9
AP11
C361
C361
AP9
.1u/16V_4
.1u/16V_4
HDA_SYNC (PCH strap pin)
Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V
+V1.1LAN_VCCA_A_DPL
R461
R461
*Short_8
*Short_8
+V1.1LAN_VCCA_B_DPL
VCCADAC= 69mA(15mils)
L42
L42
SP@PBY160808T/3A/60ohm_6
SP@PBY160808T/3A/60ohm_6
C655
C655
C688
C688
IV@.01u/25V_4
IV@.01u/25V_4
VCCALVDS= 1mA
VCCALVDS
R148
R148
EV@0_4
EV@0_4
VCC3_3 = 357mA(30mils)
R136 *Short_6R136 *Short_6
IV@22u/6.3V_8
IV@22u/6.3V_8
R142 IV@0_4R142 IV@0_4
VCCTX_LVDS
C313
C313
IV@.01u/25V_4
IV@.01u/25V_4
C681
C681
REV: B change P/N for EOD
IV@0.1u/10V_4_X7R
IV@0.1u/10V_4_X7R
C311
C311
IV@22u/6.3V_8
IV@22u/6.3V_8
+3V
REV : B Change to short pad
R197 *Short_6R197 *Short_6
R206 *Short_4R206 *Short_4
REV : B Change to short pad
VCCPNAND= 156mA(15mils)
R219 *Short_8R219 *Short_8
REV : B Change to short pad
+V1.5S_1.8S
+1.05V
+1.8V
REV : B Change to short pad
R212 *Short_6R212 *Short_6
EC8
EC8
*0.1u/10V_4
*0.1u/10V_4
REV : B Change to short pad
3
3.3 V. This rail should be powered up during S0 system state.
Note that Thermal Sensor shares the same power supply rail with DAC.
The external filters on this pin are not needed in case internal graphic is
disabled so only 3.3-V connection is required.
+3V
REV C:C655 change footprint from 0603 to 0805
+3V
VCCTX_LVDS= 59mA(15mils)
L26 IV@0.1UH_8/250mAL26 IV@0.1UH_8/250mA
VCCACLK= 52mA(15mils)
+1.05V
VCCLAN = 320mA(30mils)
+1.05V
R196 *0_6R196 *0_6
+1.05V
+1.8V
C482 change to 0 ohm resistor.
VCCME(+1.05V) = 1.849A(100mils)
R166 *Short_8R166 *Short_8
R174 *Short_8R174 *Short_8
REV : B Change to short pad
VCCVRM= 196mA(15mils)
VCCDMI= 61mA(15mils)
VCCIO = 3.062A(150mils)
+3V
VCCME3_3= 85mA(15mils)
VCCSUS3_3 = 163mA(20mils)
+3V_S5
REV : B Change to short pad
VCC3_3 = 0.357A(30mils)
REV : B Change to short pad
V_CPU_IO >1mA(15mils)
+1.05V
VCCRTC= 2mA(15mils)
2
POWER
VCCACLK[1]
VCCACLK[2]
VCCLAN[1]
VCCLAN[2]
DCPSUSBYP
VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]
VCCME[7]
VCCME[8]
VCCME[9]
VCCME[10]
VCCME[11]
VCCME[12]
DCPRTC
VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
VCCIO[3]
VCCIO[4]
DCPSST
DCPSUS
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSUS3_3[31]
VCCSUS3_3[32]
VCC3_3[5]
VCC3_3[6]
VCC3_3[7]
V_CPU_IO[1]
V_CPU_IO[2]
VCCRTC
POWER
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
USB
USB
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
VCCSUS3_3[28]
VCCIO[56]
V5REF_SUS
V5REF
VCC3_3[8]
Clock and Miscellaneous
Clock and Miscellaneous
CPU
CPU
RTC PCI/GPIO/LPC
RTC PCI/GPIO/LPC
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
PCI/GPIO/LPC
PCI/GPIO/LPC
VCC3_3[13]
VCC3_3[14]
VCCSATAPLL[1]
VCCSATAPLL[2]
VCCIO[9]
VCCVRM[4]
VCCIO[10]
VCCIO[11]
SATA
SATA
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
VCCSUSHDA
HDA
HDA
U26J
C680 *10u/6.3V_6C680 *10u/6.3V_6
C687 *1u/6.3V_4C687 *1u/6.3V_4
+1.05V_VCCAUX
C344
1U/6.3V_4
1U/6.3V_4
+1.05V_VCCEPW
C363 0.1u/10V_4_X7RC363 0.1u/10V_4_X7R
+V1.5S_1.8S
+V1.1LAN_VCCA_A_DPL
+V1.1LAN_VCCA_B_DPL
C360 0.1u/10V_4_X7RC360 0.1u/10V_4_X7R
C349 0.1u/10V_4_X7RC349 0.1u/10V_4_X7R
C375 4.7U/6.3V_6C375 4.7U/6.3V_6
C370 0.1u/10V_4_X7RC370 0.1u/10V_4_X7R
C366 0.1u/10V_4_X7RC366 0.1u/10V_4_X7R
C711 0.1u/10V_4_X7RC711 0.1u/10V_4_X7R
C712 0.1u/10V_4_X7RC712 0.1u/10V_4_X7R
+V1.1LAN_VCCA_CLK
TP_PCH_VCCDSW
C350
C350
1u/6.3V_4
1u/6.3V_4
C315 22U/6.3V_8C315 22U/6.3V_8
C321 22U/6.3V_8C321 22U/6.3V_8
C326 1U/6.3V_4C326 1U/6.3V_4
C327 1U/6.3V_4C327 1U/6.3V_4
+VCCRTCEXT
C332 1U/6.3V_4C332 1U/6.3V_4
C331 1U/6.3V_4C331 1U/6.3V_4
C322 1U/6.3V_4C322 1U/6.3V_4
+VCCSST
+V1.1LAN_INT_VCCSUS
+3V_S5_VCCPSUS
C353 0.1u/10V_4_X7RC353 0.1u/10V_4_X7R
+3V_VCCPCORE
C354 0.1u/10V_4_X7RC354 0.1u/10V_4_X7R
+VTT_VCCPCPU
L45 *10uh_8L45 *10uh_8
68mA(15mils)
69mA(15mils)
+1.05V
R188 *Short_6R188 *Short_6
R202 *Short_6R202 *Short_6
+3V
R209 *Short_6R209 *Short_6
+VCCRTC +3V_S5
AP51
AP53
AD38
AD39
AD41
AU24
BB51
BB53
BD51
BD53
AH23
AH35
AH34
AT18
AU18
AF23
AF24
AF43
AF41
AF42
AJ35
AF34
AF32
Y20
V39
V41
V42
Y39
Y41
Y42
V9
V12
Y22
P18
U19
U20
U22
V15
V16
Y16
A12
U26J
IbexPeak-M_R1P0
IbexPeak-M_R1P0
VCCIO = 3.208A(150mils)
V24
V26
C340 1U/6.3V_4C340 1U/6.3V_4
Y24
Y26
+3V_S5_VCCPUSB
V28
U28
C346 0.1u/10V_4_X7RC346 0.1u/10V_4_X7R
U26
C334 0.1u/10V_4_X7RC334 0.1u/10V_4_X7R
U24
C345 0.022U/16V_4C345 0.022U/16V_4C344
P28
P26
N28
N26
M28
M26
L28
VCCSUS3_3 = 0.163A(20mils)
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
REV : B
U23
Short R190
V23
+1.05V
V5REF_SUS
F24
V5REF
K49
+3V_VCCPPCI
J38
L38
C318 0.1u/10V_4_X7RC318 0.1u/10V_4_X7R
M36
N36
C317 0.1u/10V_4_X7RC317 0.1u/10V_4_X7R
P36
U35
AD13
+V1.1LAN_VCCAPLL
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
+1.05V_VCCEPW
AA34
Y34
Y35
AA35
+V3.3A_1.5A_HDA_IO
L30
C325
C325
1u/10V_4
1u/10V_4
1
R184 *Short_8R184 *Short_8
REV : B Change to short pad
R168 *Short_6R168 *Short_6
C388
C388
C714
C714
*10u/6.3V_6
*10u/6.3V_6
*1u/6.3V_4
*1u/6.3V_4
C356
+V1.5S_1.8S
C356
1u/10V_4
1u/10V_4
VCCME = 1.849A(100mils)
R185 *Short_4R185 *Short_4
REV : B Change to short pad
VCCSUSHDA= 6mA(15mils)
+1.05V
+3V_S5
V5REF_SUS< 1mA
R498 100/F_4R498 100/F_4
D17 RB500V-40D17 RB500V-40
C706 1U/6.3V_4C706 1U/6.3V_4
V5REF< 1mA
R145 100/F_4R145 100/F_4
D8 RB500V-40D8 RB500V-40
C310 1U/6.3V_4C310 1U/6.3V_4
REV : B Change to short pad
+3V
VCC3_3 = 0.357A(30mils)
31mA(15mils)
L28 *10uh_8L28 *10uh_8
VCCIO = 3.062A(150mils)
REV : B Short R534
+1.05V
+1.05V
+5V_S5
+3V_S5
+5V
+3V
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
IBEX PEAK-M 5/6
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT :
1
ZRD
ZRD
ZRD
1C
1C
1C
of
of
of
12 46Wednesday, July 21, 2010
12 46Wednesday, July 21, 2010
12 46Wednesday, July 21, 2010
5
IBEX PEAK-M (GND)
D D
U26H
U26H
AB16
VSS[0]
AA19
VSS[1]
AA20
VSS[2]
AA22
VSS[3]
AM19
VSS[4]
AA24
VSS[5]
AA26
VSS[6]
AA28
VSS[7]
AA30
VSS[8]
AA31
VSS[9]
AA32
VSS[10]
AB11
VSS[11]
AB15
VSS[12]
AB23
VSS[13]
AB30
VSS[14]
AB31
VSS[15]
AB32
VSS[16]
AB39
VSS[17]
AB43
VSS[18]
AB47
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AF12
AH49
AF35
AP13
AN34
AF45
AF46
AF49
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AJ19
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AK12
AM41
AN19
AK26
AK22
AK23
AK28
AB5
AB8
AC2
AD7
AE2
AE4
Y13
AU4
AF5
AF8
AG2
AH7
AJ2
AT5
AJ4
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
IbexPeak-M_R1P0
IbexPeak-M_R1P0
C C
B B
A A
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
4
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
F49
G10
G14
G18
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42
3
U26I
U26I
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
B7
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
E6
VSS[238]
E8
VSS[239]
VSS[240]
F5
VSS[241]
VSS[242]
VSS[243]
VSS[244]
G2
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
2
1
IbexPeak-M_R1P0
IbexPeak-M_R1P0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
IBEX PEAK-M 6/6
IBEX PEAK-M 6/6
IBEX PEAK-M 6/6
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZRD
ZRD
ZRD
13 46Wednesday, July 21, 2010
13 46Wednesday, July 21, 2010
13 46Wednesday, July 21, 2010
of
of
1
of
1C
1C
1C
5
M_A_A[15:0][5]
DGMK4000087LTK
D D
C C
B B
DGMK4000073SUY
R249 10K_4R249 10K_4
R248 10K_4R248 10K_4
M_A_BS#0[5]
M_A_BS#1[5]
M_A_BS#2[5]
M_A_CS#0[5]
M_A_CS#1[5]
M_A_CLK0[5]
M_A_CLK0#[5]
M_A_CLK1[5]
M_A_CLK1#[5]
M_A_CKE0[5]
M_A_CKE1[5]
M_A_CAS#[5]
M_A_RAS#[5]
M_A_WE#[5]
CLK_SCLK[3,15,28]
CLK_SDATA[3,15,28]
M_A_ODT0[5]
M_A_ODT1[5]
M_A_DM[7:0][5]
M_A_DQS[7:0][5]
M_A_DQS#[7:0][5]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
107
119
109
108
114
121
101
103
102
104
115
110
113
197
201
202
200
116
120
136
153
170
187
137
154
171
188
135
152
169
186
98
97
96
95
92
91
90
86
89
85
84
83
80
78
79
73
74
11
28
46
63
12
29
47
64
10
27
45
62
Place these Caps near So-Dimm0.
+1.5VSUS
C382
C367
C367
10u/6.3V_6
10u/6.3V_6
C369
C369
10u/6.3V_6
10u/6.3V_6
C398
C398
10u/6.3V_6
10u/6.3V_6
C382
10u/6.3V_6
10u/6.3V_6
C371
C371
10u/6.3V_6
10u/6.3V_6
C377
C377
10u/6.3V_6
10u/6.3V_6
C378
C378
.1u/16V_4
.1u/16V_4
C385
C385
.1u/16V_4
.1u/16V_4
C373
C373
.1u/16V_4
.1u/16V_4
C394
C394
.1u/16V_4
.1u/16V_4
C368
C368
.1u/16V_4
.1u/16V_4
+
+
C372
C372
330u/2V_7343
330u/2V_7343
4
JDIM1A
JDIM1A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DDR3-DIMM1_H=8.0_Reverse
DDR3-DIMM1_H=8.0_Reverse
+SMDDR_VREF_DIMM
C386
C386
.1u/16V_4
.1u/16V_4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
C384
C384
2.2u/6.3V_6
2.2u/6.3V_6
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
+SMDDR_VREF_DQ0
C392
C392
.1u/16V_4
.1u/16V_4
M_A_DQ4
M_A_DQ0
M_A_DQ2
M_A_DQ3
M_A_DQ1
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ12
M_A_DQ13
M_A_DQ11
M_A_DQ10
M_A_DQ8
M_A_DQ9
M_A_DQ14
M_A_DQ15
M_A_DQ17
M_A_DQ20
M_A_DQ18
M_A_DQ19
M_A_DQ16
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ28
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ29
M_A_DQ31
M_A_DQ30
M_A_DQ36
M_A_DQ33
M_A_DQ35
M_A_DQ34
M_A_DQ32
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ45
M_A_DQ44
M_A_DQ47
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ46
M_A_DQ43
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ62
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ63
M_A_DQ58
C390
C390
2.2u/6.3V_6
2.2u/6.3V_6
3
M_A_DQ[63:0] [5]
PM_EXTTS#0[4]
DDR3_DRAMRST#[4,15]
+SMDDR_VREF_DQ
+SMDDR_VREF_DIMM
+1.5VSUS
R269
R269
10K/F_4
10K/F_4
+SMDDR_VREF_DIMM
R229
R229
10K/F_4
10K/F_4
+1.5VSUS
R223
R223
10K/F_4
10K/F_4
+SMDDR_VREF_DQ
R226
R226
10K/F_4
10K/F_4
2.48A
+3V
+SMDDR_VREF_DQ
+SMDDR_VREF_DIMM
C412
C412
470p/X7R_4
470p/X7R_4
C387
C387
470p/X7R_4
470p/X7R_4
2
+1.5VSUS
JDIM1B
JDIM1B
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
DDR3-DIMM1_H=8.0_Reverse
DDR3-DIMM1_H=8.0_Reverse
1
44
VSS16
48
VSS17
49
VSS18
54
VSS19
55
VSS20
60
VSS21
61
VSS22
65
VSS23
66
VSS24
71
VSS25
72
VSS26
127
VSS27
128
VSS28
133
VSS29
134
VSS30
138
VSS31
139
VSS32
144
VSS33
145
VSS34
150
VSS35
151
VSS36
155
VSS37
156
VSS38
161
VSS39
162
VSS40
167
VSS41
168
VSS42
172
VSS43
173
VSS44
178
VSS45
179
VSS46
184
VSS47
185
VSS48
189
VSS49
190
VSS50
195
VSS51
196
VSS52
(204P)
(204P)
PC2100 DDR3 SDRAM SO-DIMM
PC2100 DDR3 SDRAM SO-DIMM
VTT1
VTT2
GND
GND
203
204
205
206
+0.75V_DDR_VTT
A A
+3V
C405
C405
2.2u/6.3V_6
2.2u/6.3V_6
C402
C402
.1u/16V_4
.1u/16V_4
5
+0.75V_DDR_VTT
C401
C401
1U/6.3V_4
1U/6.3V_4
C383
C383
1U/6.3V_4
1U/6.3V_4
C381
C381
1U/6.3V_4
1U/6.3V_4
C397
C397
1U/6.3V_4
1U/6.3V_4
4.7U/6.3V_6
4.7U/6.3V_6
4
C380
C380
C404
C404
4.7U/6.3V_6
4.7U/6.3V_6
C421
C421
4.7U/6.3V_6
4.7U/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
DDRIII SO-DIMM-0
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PROJECT :
ZRD
ZRD
ZRD
1C
1C
1C
of
of
of
14 46Wednesday, July 21, 2010
14 46Wednesday, July 21, 2010
14 46Wednesday, July 21, 2010
1
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