Acer eMachines E525, eMachines E725 Schematics

1 1

Compal Confidential

2 2

NAWF3/F4/H3 M/B Schematics Document

Intel Penryn Processor with Cantiga + DDRIII + ICH9M

3 3

2009-09-01

REV:0.1

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2009/08/25 2009/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cover Page

NAWF3 M/B LA-4854P Schematic

1 45Wednesday, September 02, 2009

0.1

Compal Confidential

Model Name : NAWF3

Fan Control

page 4

File Name : LA-4854P P/N : DA60000FJ00

1 1

P/N :

LCD Conn.

page 17

CRT Conn.

page 18

Intel Penryn Processor

uPGA-478 Package

(Socket P)

H_A#(3..35) H_D#(0..63)

667/800/1066MHz

page 4,5,6

FSB

Intel Cantiga

LVDS

port 0

port 4

PCI-Express

S-ATA

port 1

15" and 17" ODD Conn.

page 23

2 2

New Card Socket

MINI Card x1

WLAN

page 27page 28

LAN ATHEROS AR8132

page 26

15 " HDD Conn.

RJ45

page 27

page 23

17 " HDD

3 3

RTC CKT.

page 20

LS-4851P

POWER/B Conn.

page 30

Conn.

page 23

uFCBGA-1329

page 7,8,9,10,11,12,13

DMI

Intel ICH9-M

BGA-676

page 19,20,21,22

LPC BUS

ENE KB926 D2

page 29

C-Link

Thermal Sensor

EMC 1402

page 4

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 800/1066

USB conn x2

USB port 0, 6

3.3V 48MHz

3.3V 24.576MHz/48Mhz

USB

Clock Generator

ICS9LPRS387

page 16

204pin DDRIII-SO-DIMM X2

page 14,15

CMOS Camera

HDA Codec

ALC272

page 32

Bluetooth Conn

page 28

MDC 1.5 Conn

page 31

BANK 0, 1, 2, 3

HD Audio

Phone Jack x2

page 33

Card Reader Realtek RTS5159

page 24page 28 page 17

Audio AMP

page 33

Power On/Off CKT.

page 31

DC/DC Interface CKT.

page 34

LS-4852P

ODD/B Conn.

page 23

LS-4853P

BATTERY/B Conn.

page 36

Touch Pad

page 30

BIOS

page 30

Int.KBD

page 30

Power Circuit DC/DC

4 4

page 35,36,37,38 39,40,41,42

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2009/08/25 2009/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

NAWF3 M/B LA-4854P Schematic

2 45Wednesday, September 02, 2009

0.1

Voltage Rails

Power Plane Description

VIN

1 1

B+

+CPU_CORE

+0.75VS 0.75V power rail for DDR

+1.05VS

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.05V switched power rail

S1 S3 S5

N/A N/A N/A

ON OFF

ON OFF OFF

N/AN/AN/A

OFF

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

OFF

ON ON

OFF

LOW

OFF

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

+1.5V 1.5V power rail for HDA ON ON OFF

+1.5VS

+1.8V

+2.5VS

+3VALW

+3V

+3V_LAN

+3VS

+5VALW

+5VS

2 2

+VSB VSB always on power rail ON ON*

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

1.5V switched power rail

1.8V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V power rail for SB

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

ON OFF OFF

ON OFF

OFF

ON ON*

ON ON

OFF

ON*

OFFON

ONON

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

V typ

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

max

BOARD ID Table BTO Option Table

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

Board ID

0 1 2 3 4 5 6 7

EC SM Bus1 address

3 3

Device

Smart Battery

EEPROM(24C16/02)

GMT G781-1

Address Address

1010 000X b

1001 101X b

EC SM Bus2 address

Device

ADI ADT7421

1001 100X b0001 011X b

USB table

EHCI1

UHCI1

UHCI2

UHCI3

UHCI4

ICH9M SM Bus address

Device

Clock Generator (ICS9LPRS387, SLG8SP556V)

DDR DIMM0

DDR DIMM2

4 4

Address

1101 001Xb

1001 000Xb

1001 010Xb

EHCI2

UHCI5

UHCI6

Port0 Port1 Port2 Port3 Port4 Port5 Port6 Port7 Port8 Port9 Port10 Port11

PCB Revision

0.1 (PVT2)

MB USB Conn.

CMOS Camera Card Reader New Card(Reserved) MB USB Conn.

Blue Tooth

Wireless Card

BTO Item BOM Structure

GM45 GL40 15" 17"

GM@ GL@ 15@

17@

8114 8114@ 8132 8132@

PCIE table

PCIE port1

PCIE port2

PCIE port3

PCIE port4

PCIE port5

PCIE port6

Express Card(Reserved)

Wireless Card

PCIE LAN

SATA table

SATA port0

SATA port1

SATA port2

SATA port3

SATA port4

SATA port5

HDD

ODD

for 17" 2nd HDD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2009/08/25 2009/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Notes List

NAWF3 M/B LA-4854P Schematic

3 45Wednesday, September 02, 2009

0.1

H_A#[3..35 ]7

H_REQ#[0 ..4]7

H_RS#[0..2 ]7

D D

C C

B B

BSEL2 BSEL1 BSEL0 BCLK

0 0 0 266

0 1 0 200

A A

H_A#[3..35 ]

H_REQ#[0 ..4]

H_RS#[0..2 ]

JCPU1A

AA4 AB2 AA3

D22

J4 L5 L4

J1 N3 P5 P2

L2 P4 P1 R1

K3 H2 K2

Y2 U5 R3

U4 Y5 U1 R4 T5 T3

W2 W5

Y4 U2 V4

A6 A5 C4

D5 C6 B4 A3

N5 T2 V3 B2 D2

D3 F6

1660 1

JCPU1A

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

Penryn

CONN@

ADDR GROUP_0

ADDR GROUP_1

THERMAL

ICH

THERMTRIP#

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDI TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

PROCHOT#

THERMDA THERMDC

H CLK

BCLK[0] BCLK[1]

H_PROCH OT#

H1 E2 G5

H5 F21 E1

H_IERR#

D20 B3

H_RESET #

H_RS#0

H_RS#1

H_RS#2

G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2

XDP_BPM #5

AC1

XDP_TCK

AC5

XDP_TDI

AA6 AB3

XDP_TMS

AB5

XDP_TRS T#

AB6

XDP_DBR ESET#

C20

H_PROCH OT#

D21

H_THERM DA

A24

H_THERM DC

B25

A22 A21

Layout Note: H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil

+1.05VS

R12

R12 56_0402 _5%

56_0402 _5%

3 1

Q2 MMBT390 4_SOT23-3

MMBT390 4_SOT23-3

H_ADS# 7 H_BNR# 7 H_BPRI# 7

H_DEFER # 7 H_DRDY# 7 H_DBSY# 7

H_BR0# 7

H_INIT# 20

H_LOCK# 7

H_RESET # 7

H_TRDY# 7

H_HIT# 7 H_HITM# 7

XDP_DBR ESET# 21

H_THERM TRIP# 8,20

CLK_CPU _BCLK 16 CLK_CPU _BCLK# 16

OCP# 2 1

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EN_DFAN 129

0_0603_ 5%

EN_DFAN 1 VSET

2009/08/ 25 20 09/08/25

1 2

R51 330_040 2_5% R51 330_040 2_5%

20080430 Add soft-start for +5VS drop i ssue

+VCC_FA N1

H_THERM DA

C158

2200P_0 402_50V7K

H_THERM DC

Compal Secret Data

Deciphered Date

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15

H_ADSTB #07

H_ADSTB #17

H_A20M#2 0

H_FERR#20

H_IGNNE#20

H_STPCL K#20

H_INTR20

H_NMI20

H_SMI#20

H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

R245

C106

0.01U_04 02_16V7K

XDP_TDI

XDP_TMS

XDP_BPM #5

H_PROCH OT#

H_IERR#

XDP_TRS T#

XDP_TCK

+5VS

+3VS

C114 10 U_0805_10V4Z

1 2

VEN

VIN

VSET

G993P1U F_SOP8

FAN_SPE ED129

R43 54.9_040 2_1%

1 2

R42 54.9_040 2_1%

1 2

R16 54.9_040 2_1%

1 2

R70 56_0402 _5%

R54 56_0402 _5%

R41 54.9_040 2_1%

R17 54.9_040 2_1%

1 2

C159

0.1U_040 2_16V4Z

1 2

VDD

THERM#

EMC1402 -1-ACZL-TR_MSOP 8

GND

+3VS

SMCLK

SMDATA

ALERT#

FAN1 Conn

+5VS

D6 1SS355_ SOD323-2

1SS355_ SOD323-2

1 2

BAS16_S OT23-3

BAS16_S OT23-3 C122

C122

10U_080 5_10V4Z

1 2

C121

1000P_0 402_50V7K

R55

R55 10K_040 2_5%

10K_040 2_5%

C115

C115 1000P_0 402_50V7K

1000P_0 402_50V7K

40mil

+VCC_FA N1

FANPW M29

+1.05VS

left NC if no ITP

39Ohm

GND

Title

Size Document Number Rev

Date: Sheet of

EC_SMB_ CK2 29

EC_SMB_ DA2 29

1 2

R109

R109 10K_040 2_5%

10K_040 2_5%

Compal Electronics, Inc.

NAWF3 M/B LA-4851P Schematic

1 2

JP12

1 2 3

ACES_85 205-03001

CONN@

JP15

+VCC_FA N1

+3VS

Penryn (1/3) & FAN

JP15

ACES_85 205-0400

4 45Wednesd ay, September 02, 20 09

0.1

H_D#[0..63 ]

JCPU1B

G22

G25

G24

H22

H23

H26 H25

N22

R23

M24

M23

R24

N25

M26 N24

AD26

C23 D25 C24

AF26

AF1

C21

E22 F24 E26

F23

E25 E23 K24

J24 J23

F26 K22

J26

K25 P26

L23

L22

P25 P23 P22 T24

L25 T25

L26

A26

B22 B23

JCPU1B

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn

CONN@

DATA GRP 0

MISC

DATA GRP 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

H_D#0

D D

H_DSTBN #07 H_DSTBN #2 7 H_DSTBP #07 H_DSTBP#2 7

H_DINV#07

C C

Trace Close CPU < 0.5'

Width=4 mil , Spacing: 15mil (55Ohm)

B B

R386

R386 1K_0402 _1%

1K_0402 _1%

R387

R387 2K_0402 _1%

2K_0402 _1%

+1.05VS

1 2

H_DSTBN #17 H_DSTBN #3 7 H_DSTBP #17 H_DSTBP#3 7

H_DINV#17

R406 1K_0402 _5%@R406 1K_0402 _5%@ R405 1K_0402 _5%@R405 1K_0402 _5%@

C438 0.1U_040 2_16V4Z@C438 0.1U_0402_16V 4Z@

1 2

12 12

T26

T26 T27

T27

CPU_BSE L016 CPU_BSE L116 CPU_BSE L216

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

GTL_REF 0

TEST1 TEST2 TEST3

@ R14 54.9_040 2_1%

PAD

PAD PAD

PAD

TEST4 TEST5

TEST6

H_D#32

Y22

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

H_PW RGOOD H_CPUSL P#

R393 27.4_040 2_1%

R393 27.4_040 2_1% R394 54.9_040 2_1%

R394 54.9_040 2_1% R15 27.4_040 2_1%

R15 27.4_040 2_1% R14 54.9_040 2_1%

H_DINV#2 7

H_DINV#3 7

1 2 1 2 1 2 1 2

H_DPRST P# 8,20,4 1 H_DPSLP # 20 H_DPW R# 7 H_PW RGOOD 20 H_CPUSL P# 7 PSI# 41

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

H_D#[0..63 ] 7

+CPU_CO RE

A10 A12 A13 A15 A17 A18 A20

B10 B12 B14 B15 B17 B18 B20

C10 C12 C13 C15 C17 C18

D10 D12 D14 D15 D17 D18

E10 E12 E13 E15 E17 E18 E20

F10 F12 F14 F15 F17 F18 F20 AA7

AA9 AA10 AA12 AA13 AA15 AA17 AA18 AA20

AB9 AC10 AB10 AB12 AB14 AB15 AB17 AB18

A7 A9

B7 B9

E7 E9

F7 F9

JCPU1C

VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]

Penryn

CONN@

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

+CPU_CO RE

VCCSENS E

VSSSENS E

C156

CPU_VID0 41 CPU_VID1 41 CPU_VID2 41 CPU_VID3 41 CPU_VID4 41 CPU_VID5 41 CPU_VID6 41

R376 1 00_0402_1%

R375 1 00_0402_1%

0.01U_04 02_16V7K

1 2

C156

+1.05VS

20mils

C157

10U_080 5_10V4Z

+CPU_CO RE

VCCSENS E 41

VSSSENS E 41

+1.5VS

A A

Security Class ification

2009/08/ 25 20 09/08/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 25 20 09/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

NAWF3 M/B LA-4854P Schematic

Date: Sheet of

Compal Electronics, Inc.

Penryn (2/3)

5 45Wednesd ay, September 02, 20 09

0.1

+CPU_CO RE +CPU_CO RE

JCPU1D

VSS[001]

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

D D

C C

B B

A23

VSS[007]

AF2

VSS[008]

VSS[009]

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

VSS[017]

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

VSS[023]

C22

VSS[024]

C25

VSS[025]

VSS[026]

VSS[027]

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

VSS[035]

VSS[036]

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

VSS[044]

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

VSS[050]

F22

VSS[051]

F25

VSS[052]

VSS[053]

VSS[054]

G23

VSS[055]

G26

VSS[056]

VSS[057]

VSS[058]

H21

VSS[059]

H24

VSS[060]

VSS[061]

VSS[062]

J22

VSS[063]

J25

VSS[064]

VSS[065]

VSS[066]

K23

VSS[067]

K26

VSS[068]

VSS[069]

VSS[070]

L21

VSS[071]

L24

VSS[072]

VSS[073]

VSS[074]

M22

VSS[075]

M25

VSS[076]

VSS[077]

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

CONN@

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

C98

330U_D2 E_2.5VM_R9

+CPU_CO RE

C465

10U_080 5_6.3V6M

+CPU_CO RE

C108

10U_080 5_6.3V6M

+CPU_CO RE

C112

10U_080 5_6.3V6M

+CPU_CO RE

C455

10U_080 5_6.3V6M

+CPU-CORE Decoupling SPCAP,Polymer

MLCC 0805 X5R

+1.05VS

C13

330U_D2 E_2.5VM_R9

2 x 330uF(6mOhm/2) 2 x 330uF(6mOhm/2)

C113

330U_D2 E_2.5VM_R9

C107

330U_D2 E_2.5VM_R9

South Side Secondary North Side Secondary

10U_080 5_6.3V6M

C466

10U_080 5_6.3V6M

C451

10U_080 5_6.3V6M

C95

C111

10U_080 5_6.3V6M

C90

330U_D2 E_2.5VM_R9

C94

(Place these capacitors on South side,Secondary Layer)

10U_080 5_6.3V6M

C103

10U_080 5_6.3V6M

C102

10U_080 5_6.3V6M

C92

C91

10U_080 5_6.3V6M

C457

(Place these capacitors on North side,Secondary Layer)

10U_080 5_6.3V6M

C105

10U_080 5_6.3V6M

C104

10U_080 5_6.3V6M

C97

10U_080 5_6.3V6M

C440

10U_080 5_6.3V6M

C444

(Place these capacitors on South side,Primary Layer)

10U_080 5_6.3V6M

C450

10U_080 5_6.3V6M

C442

10U_080 5_6.3V6M

C441

C469

10U_080 5_6.3V6M

C443

(Place these capacitors on North side,Primary Layer)

C,uF ESR, mohm ESL,nH

4X330uF 6m ohm/4 1.8nH/6

32X22uF 3m ohm/32 0.6nH/32

32X10uF 3m ohm/32 0.6nH/32

C119

0.1U_040 2_16V4Z

C120

C118

0.1U_040 2_16V4Z

C78

0.1U_040 2_16V4Z

C77

0.1U_040 2_16V4Z

C79

0.1U_040 2_16V4Z

10U_080 5_6.3V6M@

C93

C456

C110

C468

C458

10U_080 5_6.3V6M@

C96

10U_080 5_6.3V6M@

C109

10U_080 5_6.3V6M@

C467

10U_080 5_6.3V6M@

A A

Security Class ification

2009/08/ 25 20 09/08/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 25 20 09/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

Penryn (3/3)

NAWF3 M/B LA-4854P Schematic

6 45Wednesd ay, September 02, 20 09

0.1

U23A

H_D#[0..63 ]5

D D

+1.05VS

R126

221_040 2_1%

H_SW ING

width=10mil

H_RCOMP

+1.05VS

1 2

C206

0.1U_040 2_16V4Z

width=10mil

R139

1K_0402 _1%

R134

2K_0402 _1%

C216

0.1U_040 2_16V4Z

H_RESET #4

H_CPUSL P#5

C C

B B

R125

100_040 2_1%

1 2

R395

24.9_040 2_1%

width:spacing=10mil:20mil (<0.5")

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SW ING H_RCOMP

H_RESET # H_CPUSL P#

H_AVREF

U23A

H_D#_0

H_D#_1

H_D#_2

H_D#_3

H_D#_4

H_D#_5

H_D#_6

H_D#_7

H_D#_8

H_D#_9

H_D#_10

M11

H_D#_11

H_D#_12

H_D#_13

N12

H_D#_14

H_D#_15

H_D#_16

H_D#_17

H_D#_18

H_D#_19

H_D#_20

H_D#_21

H_D#_22

H_D#_23

H_D#_24

H_D#_25

H_D#_26

P13

H_D#_27

H_D#_28

H_D#_29

N10

H_D#_30

H_D#_31

H_D#_32

AD14

H_D#_33

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

H_D#_38

H_D#_39

AA8

H_D#_40

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

H_SWING

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES _FCBGA1329

GL@

H_ADSTB#_0 H_ADSTB#_1

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_HIT#

H_HITM#

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB #0 H_ADSTB #1 H_BNR# H_BPRI# H_BR0# H_DEFER # H_DBSY# CLK_MCH _BCLK CLK_MCH _BCLK# H_DPW R# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN #0 H_DSTBN #1 H_DSTBN #2 H_DSTBN #3

H_DSTBP #0 H_DSTBP #1 H_DSTBP #2 H_DSTBP #3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[3..35 ] 4

H_ADS# 4 H_ADSTB #0 4 H_ADSTB #1 4 H_BNR# 4 H_BPRI# 4 H_BR0# 4 H_DEFER # 4 H_DBSY# 4 CLK_MCH _BCLK 16 CLK_MCH _BCLK# 16 H_DPW R# 5 H_DRDY# 4 H_HIT# 4 H_HITM# 4 H_LOCK# 4 H_TRDY# 4

H_DINV#0 5 H_DINV#1 5 H_DINV#2 5 H_DINV#3 5

H_DSTBN #0 5 H_DSTBN #1 5 H_DSTBN #2 5 H_DSTBN #3 5

H_DSTBP #0 5 H_DSTBP #1 5 H_DSTBP #2 5 H_DSTBP #3 5

H_REQ#[0 ..4] 4

H_RS#[0..2 ] 4

U23

GMA1@

GM@

U23

GLA1@

within 100mil to Ball A9,B9

A A

Security Class ification

2009/08/ 25 20 09/08/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 25 20 09/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH(1/7)-GTL

NAWF3 M/B LA-4854P Schematic

7 45Wednesd ay, September 02, 20 09

0.1

D D

All RSVD balls on GMCH should be left No Connect.

C C

MCH_CLKSEL016 MCH_CLKSEL116 MCH_CLKSEL216

PM_EXTTS#0

VGATE16,21,41

+1.05VS

1 2

R177 10K_0402_5% R177 10K_04 02_5%

1 2

R202 10K_0402_5% R202 10K_04 02_5%

1 2

R189 10K_0402_5% R189 10K_04 02_5%

H_DPRSTP#5,20,41 PM_EXTTS#014 PM_EXTTS#115

H_THERMTRIP#4,20 PM_DPRSLPVR21,41

R398

54.9_0402_1%

R397

1 2

330_0402_5%

PM_SYNC#21

PLT_RST#19,25,29

PM_EXTTS#1

MCH_CLKREQ#

VGATE

ICH_PWROK

+3VS

1 2

R224 0_0402_5%@R224 0_0402_5%@

1 2

R223 0_0402_5% R223 0_0402_5%

R141 0_0402_5% R141 0_0402_5%

1 2

R135 0_0402_5% R135 0_0402_5%

1 2

R133 100_0402_5% R133 100_0402_5%

1 2

R143 0_0402_5% R143 0_0402_5%

1 2

R140 0_0402_5% R140 0_0402_5%

1 2

R403

R403 1K_0402_5%

1K_0402_5%

Q34

Q34 MMBT3904_SOT23-3

MMBT3904_SOT23-3

3 1

GMCH_PWROK

+3VS

R404

R404 1K_0402_5%

1K_0402_5%

Q33

Q33 MMBT3904_SOT23-3

MMBT3904_SOT23-3

3 1

+3VS

ICH_PWROK21

B B

A A

MCH_TSATN#

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

MCH_CFG_5 MCH_CFG_6 MCH_CFG_7

MCH_CFG_9 MCH_CFG_10

MCH_CFG_12 MCH_CFG_13

MCH_CFG_16

MCH_CFG_19 MCH_CFG_20

PM_SYNC#_R PM_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1 GMCH_PWROK MCH_RSTIN# THERMTRIP#_R DPRSLPVR_R

MCH_TSATN_EC# 29

U23B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

RSVD16

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

NC_25

A47

NC_26

CANTIGA ES_FCBGA1329

GL@

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

BB36

SB_CKE_1

BA17

SA_CS#_0

AY16

SA_CS#_1

AV16

SB_CS#_0

AR13

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMIGRAPHICS VIDMEMISC

SB_CS#_1

BD17

SA_ODT_0

AY17

SA_ODT_1

BF15

SB_ODT_O

AY13

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK

HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

N28 M28 G36 E36 K36 H36

B12

B28 B30 B29 C29 A28

Issued Date

SMRCOMP SMRCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_PWROK SM_REXT SM_DRAMRST#

CLK_DREF_96M CLK_DREF_96M# CLK_DREF_SSC CLK_DREF_SSC#

CLK_MCH_3GPLL CLK_MCH_3GPLL#

DMI_ITX_MRX_N0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N2 DMI_ITX_MRX_N3

DMI_ITX_MRX_P0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P2 DMI_ITX_MRX_P3

DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3

DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3

ICH_PWROK

CL_VREF

MCH_CLKREQ#

MCH_TSATN#

DDRA_CLK0 14 DDRA_CLK1 14 DDRB_CLK0 15 DDRB_CLK1 15

DDRA_CLK0# 14 DDRA_CLK1# 14 DDRB_CLK0# 15 DDRB_CLK1# 15

DDRA_CKE0 14 DDRA_CKE1 14 DDRB_CKE0 15 DDRB_CKE1 15

DDRA_SCS0# 14 DDRA_SCS1# 14 DDRB_SCS0# 15 DDRB_SCS1# 15

DDRA_ODT0 14 DDRA_ODT1 14 DDRB_ODT0 15 DDRB_ODT1 15

R368 80.6_0402_1% R368 80.6_0402_1%

1 2

R367 80.6_0402_1% R367 80.6_0402_1%

1 2

SM_VREF

SM_PWROK 31

R366 49 9_0402_1%

1 2

SM_DRAMRST# 14,15

CLK_DREF_96M 16 CLK_DREF_96M# 16 CLK_DREF_SSC 16 CLK_DREF_SSC# 16

CLK_MCH_3GPLL 16 CLK_MCH_3GPLL# 16

DMI_ITX_MRX_N0 21 DMI_ITX_MRX_N1 21 DMI_ITX_MRX_N2 21 DMI_ITX_MRX_N3 21

DMI_ITX_MRX_P0 21 DMI_ITX_MRX_P1 21 DMI_ITX_MRX_P2 21 DMI_ITX_MRX_P3 21

DMI_MTX_IRX_N0 21 DMI_MTX_IRX_N1 21 DMI_MTX_IRX_N2 21 DMI_MTX_IRX_N3 21

DMI_MTX_IRX_P0 21 DMI_MTX_IRX_P1 21 DMI_MTX_IRX_P2 21 DMI_MTX_IRX_P3 21

CL_CLK0 21 CL_DATA0 21

CL_RST#0 21

MCH_CLKREQ# 16 MCH_ICH_SYNC# 21

Compal Secret Data

2009/08/25 2009/08/25

Compal Secret Data

SM_DRAMRST# would be needed for DDR3 only

For Cantiga

20mil

C264

0.1U_0402_16V4Z

Deciphered Date

+1.5V +1.5V

C278

0.1U_0402_16V4Z

DDR3

80 Ohm

R220

1K_0402_1%

1 2

R221 0_0402_5%

0_0402_5%

R222

1K_0402_1%

1 2

+1.5V

R363

1K_0402_1%

R369

3.01K_0402_1%

R362

1K_0402_1%

+DIMM_VREF

@R221

C419

2.2U_0603_6.3V6K

C418

2.2U_0603_6.3V6K

SM_RCOMP_VOH

C423

0.01U_0402_16V7K

SM_RCOMP_VOL

C422

0.01U_0402_16V7K

Strap Pin Table

011 = FSB667 010 = FSB800 000 = FSB1067

0 = DMI x 2 1 = DMI x 4

0 = iTPM Host Interface is enabled

1 = iTPM Host Interface is Disabled 0 = Lane Reversal Enable

1 = Normal Operation (Default)

0 = PCIe Loopback Enable 1 = Disable*(Default)

00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation

0 = Dynamic ODT Disabled 1 = Dynamic ODT Enabled

0 = Normal Operation 1 = DMI Lane Reversal Enable

0 = Only PCIE or SDVO is operational.

1 = PCIE/SDVO are operating simu.

0 = No SDVO Card Present 1 = SDVO Card Present

0 = LFP Disable 1 = LFP Card Present; PCIE disable

0 = Digital DisplayPort Disable 1 = Digital DisplayPort Device Present

MCH_CFG_5

MCH_CFG_6

MCH_CFG_7

MCH_CFG_9

MCH_CFG_10

MCH_CFG_12

MCH_CFG_13

MCH_CFG_16

MCH_CFG_19

MCH_CFG_20

Title

Size Document Number Rev

Custom

NAWF3 M/B LA-4854P Schematic

Date: Sheet of

(Default)

R175 2.21K_0402_1%@R175 2.21K_0402_1%@

R142 4.02K_0402_1%@R142 4.02K_0402_1%@

R162 2.21K_0402_1%@R162 2.21K_0402_1%@

R158 2.21K_0402_1%@R158 2.21K_0402_1%@

R161 2.21K_0402_1%@R161 2.21K_0402_1%@

R154 2.21K_0402_1%@R154 2.21K_0402_1%@

R153 2.21K_0402_1%@R153 2.21K_0402_1%@

R155 2.21K_0402_1%@R155 2.21K_0402_1%@

R159 4.02K_0402_1%@R159 4.02K_0402_1%@

R163 4.02K_0402_1%@R163 4.02K_0402_1%@

Compal Electronics, Inc.

Cantiga GMCH(2/7)-DMI/DDR

8 45Wednesday, September 02, 2009

+3VS

0.1

+1.05VS

1 2

R183

1K_0402_1%

R182

511_0402_1%

CFG[2:0]

CFG5

CFG6

CFG9

CFG10

CFG[13:12]

CFG16

CFG19

CFG20

(PCIE/SDVO select)

SDVO_CTRLDATA

L_DDC_DATA

DDPC_CTRLDATA

DDR_B_D Q[0..63]

DDR_B_D M[0..7]

DDR_B_M A[0..14]

DDR_B_D QS#[0..7]

DDR_A_B S0 1 4 DDR_A_B S1 1 4 DDR_A_B S2 1 4

DDR_A_R AS# 14 DDR_A_C AS# 14 DDR_A_W E# 14

DDR_A_D QS0 14 DDR_A_D QS1 14 DDR_A_D QS2 14 DDR_A_D QS3 14 DDR_A_D QS4 14 DDR_A_D QS5 14 DDR_A_D QS6 14 DDR_A_D QS7 14

DDR_B_D 0 DDR_B_D 1 DDR_B_D 2 DDR_B_D 3 DDR_B_D 4 DDR_B_D 5 DDR_B_D 6 DDR_B_D 7 DDR_B_D 8 DDR_B_D 9 DDR_B_D 10 DDR_B_D 11 DDR_B_D 12 DDR_B_D 13 DDR_B_D 14 DDR_B_D 15 DDR_B_D 16 DDR_B_D 17 DDR_B_D 18 DDR_B_D 19 DDR_B_D 20 DDR_B_D 21 DDR_B_D 22 DDR_B_D 23 DDR_B_D 24 DDR_B_D 25 DDR_B_D 26 DDR_B_D 27 DDR_B_D 28 DDR_B_D 29 DDR_B_D 30 DDR_B_D 31 DDR_B_D 32 DDR_B_D 33 DDR_B_D 34 DDR_B_D 35 DDR_B_D 36 DDR_B_D 37 DDR_B_D 38 DDR_B_D 39 DDR_B_D 40 DDR_B_D 41 DDR_B_D 42 DDR_B_D 43 DDR_B_D 44 DDR_B_D 45 DDR_B_D 46 DDR_B_D 47 DDR_B_D 48 DDR_B_D 49 DDR_B_D 50 DDR_B_D 51 DDR_B_D 52 DDR_B_D 53 DDR_B_D 54 DDR_B_D 55 DDR_B_D 56 DDR_B_D 57 DDR_B_D 58 DDR_B_D 59 DDR_B_D 60 DDR_B_D 61 DDR_B_D 62 DDR_B_D 63

AK47 AH46 AP47 AP46

AJ46

AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8 BH12 BF11

BF8 BG7 BC5 BC6

AY3

AY1

BF6

BF5

BA1 BD3

AV2 AU3 AR3 AN2

AY2

AV1

AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

U23E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

DDR_B_D M0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

CANTIGA ES _FCBGA1329GM@

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_D M1 DDR_B_D M2 DDR_B_D M3 DDR_B_D M4 DDR_B_D M5 DDR_B_D M6 DDR_B_D M7

DDR_B_D QS0 DDR_B_D QS1 DDR_B_D QS2 DDR_B_D QS3 DDR_B_D QS4 DDR_B_D QS5 DDR_B_D QS6 DDR_B_D QS7

DDR_B_D QS#0 DDR_B_D QS#1 DDR_B_D QS#2 DDR_B_D QS#3 DDR_B_D QS#4 DDR_B_D QS#5 DDR_B_D QS#6 DDR_B_D QS#7

DDR_B_M A0 DDR_B_M A1 DDR_B_M A2 DDR_B_M A3 DDR_B_M A4 DDR_B_M A5 DDR_B_M A6 DDR_B_M A7 DDR_B_M A8 DDR_B_M A9 DDR_B_M A10 DDR_B_M A11 DDR_B_M A12 DDR_B_M A13 DDR_B_M A14

DDR_B_B S0 1 5 DDR_B_B S1 1 5 DDR_B_B S2 1 5

DDR_B_R AS# 15 DDR_B_C AS# 15 DDR_B_W E# 15

DDR_B_D QS0 15 DDR_B_D QS1 15 DDR_B_D QS2 15 DDR_B_D QS3 15 DDR_B_D QS4 15 DDR_B_D QS5 15 DDR_B_D QS6 15 DDR_B_D QS7 15

U23D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

DDR_A_D [0..63]

DDR_A_D M[0..7]

DDR_A_M A[0..14]

DDR_A_D QS#[0..7]

DDR_B_D [0..63]15

DDR_B_D M[0..7]15

DDR_B_M A[0..14]15

DDR_B_D QS#[0..7]15

BD21

SA_BS_0

BG18

SA_BS_1

AT25

SA_BS_2

BB20

SA_RAS#

BD20

SA_CAS#

AY20

SA_WE#

DDR_A_D M0

AM37

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3

DDR SYSTEM MEMORY A

SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

CANTIGA ES _FCBGA1329GM@

AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7

AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDR_A_D M1 DDR_A_D M2 DDR_A_D M3 DDR_A_D M4 DDR_A_D M5 DDR_A_D M6 DDR_A_D M7

DDR_A_D QS0 DDR_A_D QS1 DDR_A_D QS2 DDR_A_D QS3 DDR_A_D QS4 DDR_A_D QS5 DDR_A_D QS6 DDR_A_D QS7

DDR_A_D QS#0 DDR_A_D QS#1 DDR_A_D QS#2 DDR_A_D QS#3 DDR_A_D QS#4 DDR_A_D QS#5 DDR_A_D QS#6 DDR_A_D QS#7

DDR_A_M A0 DDR_A_M A1 DDR_A_M A2 DDR_A_M A3 DDR_A_M A4 DDR_A_M A5 DDR_A_M A6 DDR_A_M A7 DDR_A_M A8 DDR_A_M A9 DDR_A_M A10 DDR_A_M A11 DDR_A_M A12 DDR_A_M A13 DDR_A_M A14

DDR_A_D [0..63]14

D D

C C

B B

DDR_A_D M[0..7]14

DDR_A_M A[0..14]14

DDR_A_D QS#[0..7]14

DDR_A_D 0 DDR_A_D 1 DDR_A_D 2 DDR_A_D 3 DDR_A_D 4 DDR_A_D 5 DDR_A_D 6 DDR_A_D 7 DDR_A_D 8 DDR_A_D 9 DDR_A_D 10 DDR_A_D 11 DDR_A_D 12 DDR_A_D 13 DDR_A_D 14 DDR_A_D 15 DDR_A_D 16 DDR_A_D 17 DDR_A_D 18 DDR_A_D 19 DDR_A_D 20 DDR_A_D 21 DDR_A_D 22 DDR_A_D 23 DDR_A_D 24 DDR_A_D 25 DDR_A_D 26 DDR_A_D 27 DDR_A_D 28 DDR_A_D 29 DDR_A_D 30 DDR_A_D 31 DDR_A_D 32 DDR_A_D 33 DDR_A_D 34 DDR_A_D 35 DDR_A_D 36 DDR_A_D 37 DDR_A_D 38 DDR_A_D 39 DDR_A_D 40 DDR_A_D 41 DDR_A_D 42 DDR_A_D 43 DDR_A_D 44 DDR_A_D 45 DDR_A_D 46 DDR_A_D 47 DDR_A_D 48 DDR_A_D 49 DDR_A_D 50 DDR_A_D 51 DDR_A_D 52 DDR_A_D 53 DDR_A_D 54 DDR_A_D 55 DDR_A_D 56 DDR_A_D 57 DDR_A_D 58 DDR_A_D 59 DDR_A_D 60 DDR_A_D 61 DDR_A_D 62 DDR_A_D 63

AJ38

AJ41 AN38 AM38

AJ36

AJ40 AM44 AM42 AN43 AN44 AU40

AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37

AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

AU10

BA11

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6

AT5 AN10 AM11

AM5

AN12 AM13

AJ11 AJ12

BB9 BA9

AV9

AJ9 AJ8

A A

Security Class ification

2009/08/ 25 20 09/08/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 25 20 09/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH(3/7)-DDR

NAWF3 M/B LA-4854P Schematic

9 45Wednesd ay, September 02, 20 09

0.1

DPST_PW M17

ENBKL29

D D

C C

R157

75_0402 _1%

GMCH_CR T_B18

GMCH_CR T_G18

GMCH_CR T_R18

B B

+3VS

R187 2.2 K_0402_5%R187 2.2 K_0402_5%

1 2

R191 2.2 K_0402_5%R191 2.2 K_0402_5%

1 2

R188 10 K_0402_5%R188 10 K_0402_5%

1 2

R190 10 K_0402_5%R190 10 K_0402_5%

1 2

R178 2.2 K_0402_5%R178 2.2 K_0402_5%

1 2

R164 2.2 K_0402_5%R164 2.2 K_0402_5%

1 2

Change to 0Ohm when use PM chip

R173 150_040 2_1%R173 150_0402_1 %

R172 150_040 2_1%R172 150_0402_1 %

R171 150_040 2_1%R171 150_0402_1 %

GMCH_CR T_HSYNC18

GMCH_CR T_VSYNC18

GMCH_LC D_CLK

GMCH_LC D_DATA

LCTLB_D ATA

LCTLA_C LK

GMCH_CR T_CLK

GMCH_CR T_DATA

1 2

R180 0_040 2_5%R180 0_ 0402_5%

GMCH_LC D_CLK17

GMCH_LC D_DATA17

GMCH_EN VDD17

1 2

R396 2.3 7K_0402_1%R396 2.3 7K_0402_1%

GMCH_TX CLK-17 GMCH_TX CLK+17 GMCH_TZ CLK-17 GMCH_TZ CLK+17

GMCH_TX OUT0-17 GMCH_TX OUT1-17 GMCH_TX OUT2-17

GMCH_TX OUT0+17 GMCH_TX OUT1+17 GMCH_TX OUT2+17

GMCH_TZ OUT0-17 GMCH_TZ OUT1-17 GMCH_TZ OUT2-17

GMCH_TZ OUT0+17 GMCH_TZ OUT1+17 GMCH_TZ OUT2+17

R160

R156

1 2

75_0402 _1%

GMCH_CR T_CLK18 GMCH_CR T_DATA18

U23C

L32

LBKLT_E N LCTLA_C LK LCTLB_D ATA GMCH_LC D_CLK GMCH_LC D_DATA

LVDS_IBG

R185

R185 0_0402_ 5%

0_0402_ 5%

1 2

GMCH_TX CLKGMCH_TX CLK+ GMCH_TZ CLKGMCH_TZ CLK+

GMCH_TX OUT0GMCH_TX OUT1GMCH_TX OUT2-

GMCH_TX OUT0+ GMCH_TX OUT1+ GMCH_TX OUT2+

GMCH_TZ OUT0GMCH_TZ OUT1GMCH_TZ OUT2-

GMCH_TZ OUT0+ GMCH_TZ OUT1+ GMCH_TZ OUT2+

GMCH_TV _COMPS GMCH_TV _LUMA GMCH_TV _CRMA

TV_DCON SEL_0 TV_DCON SEL_1

GMCH_CR T_CLK GMCH_CR T_DATA

CRT_IREF

R174

1.02K_04 02_1%

1 2

G32 M32 M33 K33

M29

C44 B43 E37 E38

C41 C40 B37 A37

H47 E46 G40 A40

H48 D45

B40

A41 H38 G37

B42 G38

K37

H25 K25

H24

C31 E32

E28

G28

G29

H32

E29

J33

F40

J37

F37

F25

J28

J32 J29

L29

GL@

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK L_CTRL_DATA L_DDC_CLK L_DDC_DATA L_VDD_EN

LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL

LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_IRTN

CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF

CRT_VSYNC

LVDS TV VGA

PCI-EXPRESS GRAPHICS

CANTIGA ES _FCBGA1329

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

T37 T36

H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

PEG_COM P

10mils

1 2

R184 49.9_040 2_1% R184 49.9_0402 _1%

+1.05VS

A A

R186 0_ 0402_5%R186 0_ 0402_5%

R176 0_ 0402_5%R176 0_ 0402_5%

R179 10 0K_0402_5%

1 2

TV_DCON SEL_0

TV_DCON SEL_1

LBKLT_E N

Security Class ification

2009/08/ 25 20 09/08/25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/08/ 25 20 09/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH(4/7)-VGA/LVDS/TV

NAWF3 M/B LA-4854P Schematic

10 45Wed nesday, September 02, 2009

0.1

U23F

+1.5V

D D

Reference PILLAR_ROCK CRB Rev1.0

Pins BA36, BB24, BD16, BB21, AW16, AW13, AT13 could be left NC for DDR2 board.

C C

VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16

VCC_SM_AW16

VCC_SM_AT13

+1.05VS

B B

VCC_AXG_SENSE

PAD

T17

PAD

T18

A A

VSS_AXG_SENSE

U23F

2600mA

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA ES_FCBGA1329

GL@

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC SM LF

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

+1.05VS

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

C213

0.1U_0402_16V7K

Reference PILLAR_ROCK CRB Rev1.0

VCC_SM_BA36 VCC_SM_BB24 VCC_SM_BD16 VCC_SM_AW16 VCC_SM_AT13

C215

0.1U_0402_16V7K

C230

C205

0.22U_0402_6.3V6K

Place close to the GMCH

VCC: 1930.4mA (GMCH), 1210.34mA (MCH)

+1.05VS

C485

220U_D2_4VM_R15

+1.05VS

0.47U_0603_16V4Z

C482

330U_D2E_2.5VM_R9

(270UF*1, 22UF*1, 0.22UF*2, 0.1UF*1)

10U_0805_10V4Z

C255

0.22U_0402_6.3V6K

C265

0.22U_0402_6.3V6K

Cavity Capacitors

VCC_AXG: 6326.84mA (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2)

C234

C244

C243

1U_0402_6.3V4Z

10U_0805_10V4Z

Cavity Capacitors

C266

0.1U_0402_16V4Z

C235

10U_0805_10V4Z

C256

C236

0.1U_0402_16V4Z

C242

+1.05VS

AG34 AC34 AB34 AA34

AM33 AK33

AJ33 AG33 AF33

AE33 AC33 AA33

W33

AH28 AF28 AC28 AA28

AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24

AJ23 AH23 AF23

U23G

VCC_1 VCC_2 VCC_3 VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13 VCC_14 VCC_15

Y33

VCC_16 VCC_17

V33

VCC_18

U33

VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34

T32

VCC_35

Place close to the GMCH

VCC_SM: 2600mA

+1.5V

(330UF*1, 22UF*2, 0.1UF*1)

C269

330U_D2E_2.5VM_R9

10U_0805_10V4Z

C252

C251

10U_0805_10V4Z

C263

0.1U_0402_16V4Z

Place on the edge

C228

C229

0.1U_0402_16V7K

C270

1U_0402_6.3V4Z

C228

0.1U_0402_16V7K

C214

0.1U_0402_16V7K

C272

0.47U_0603_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

C271

0.1U_0402_16V7K

Compal Secret Data

Deciphered Date

C240

0.1U_0402_16V7K

C279

1U_0402_6.3V4Z

2009/08/25 2009/08/25

CANTIGA ES_FCBGA1329

GL@

VCC CORE

POWER

+1.05VS

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28

VCC NCTF

VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH(5/7)-VCC

NAWF3 M/B LA-4854P Schematic

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

11 45Wednesday, September 02, 2009

0.1

L18

+1.05VS

VCCA_HPLL: 24mA

Please check Power source if want support IAMT

D D

(4.7UF*1, 0.1UF*1)

VCCA_MPLL: 139.2mA (22UF*1, 0.1UF*1)

1 2

MBK1608121YZF_0603

120Ohm@100MHz

1 2

MBK1608121YZF_0603 L6MBK1608121YZF_0603

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

1 2

+3VS

L21

L21 MBK1608221YZF_0603

MBK1608221YZF_0603

C483

220U_D2_4VM_R15

C C

VCCA_DAC_BG: 2.6833333mA (0.1UF*1, 0.01UF*1)

1 2

+3VS

L20

L20 MBK1608221YZF_0603

MBK1608221YZF_0603

+1.05VS_HPLL

C433

4.7U_0805_10V4Z

+1.05VS_MPLL

R108

0.5_0603_1%

C151

C151 22U_0805_6.3V6M

22U_0805_6.3V6M

C462

C475

0.1U_0402_16V4Z

0.01U_0402_16V7K

Close to Ball A26, B27

C473

0.1U_0402_16V4Z

C461

0.01U_0402_16V7K

C434

0.1U_0402_16V4Z

Please check Power source if want support IAMT

C189

0.1U_0402_16V4Z

+3VS_CRTDAC

+1.05VS

Please check Power source if want support IAMT

+3VS_DACBG

C474

10U_0805_6.3V6M

FOR EMI 2008022 6

+1.05VS

FOR EMI 2008022 6

R262

R262 0_0402_5%@

0_0402_5%@

1 2

+3VS

R261

R261 0_0402_5%

0_0402_5%

1 2

+1.5VS

Please check Power source if want support IAMT

+1.05VS

C304

10U_0805_6.3V6M

C478

220U_D2_4VM_R15

+1.05VS

L22

1 2

MBK1608121YZF_0603

VCCA_DPLLA VCCA_DPLLB: 64.8mA (220UF*1, 0.1UF*1)

L12

1 2

MBK1608121YZF_0603

1 2

R152

0_0805_5%

Please check Power source if want support IAMT

Close to Ball A25

VCCA_TV_DAC: 40mA (0.1UF*1,

+3VS

180Ohm@100MHz

+1.5VS

MBK1608221YZF_0603

180Ohm@100MHz

0.01UF*1 for each DAC)

L19

1 2

MBK1608221YZF_0603

VCCD_TVDAC: 58.696mA (0.1UF*1, 0.01UF*1)

1 2

R144

100_0603_1%

C472

0.1U_0402_16V4Z

C246

0.1U_0402_16V4Z

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

C247

0.1U_0402_16V4Z

C460

0.01U_0402_16V7K

+1.5VS_TVDAC

C245

Also power for internal Thermal Sensor

0.022U_0402_16V7K

C257

0.01U_0402_16V7K

+3VS_TVDAC

+1.5VS_QDAC

R165

R165 0_0402_5%

0_0402_5%

Please check Power source if want support IAMT

B B

A A

+1.5VS

+1.05VS_DPLLA

C479

220U_D2_4VM_R15

+1.05VS_DPLLB

C305

C305 10U_0805_10V4Z

10U_0805_10V4Z

+1.8V_TX_LVDS

+VCCA_PEG_BG

C289

0.1U_0402_16V4Z

No CIS Symbol

L10

1 2

MBK1608221YZF_0603

1 2

R201

R201 1_0402_1%

1_0402_1%

+1.05VS_A_SM

+1.05VS_A_SM_CK

1 2

R170

0_0603_5%

2.2U_0603_6.3V6K

NO_STUFF

+1.05VS_HPLL

+1.8V

C464

0.1U_0402_16V4Z

C290

0.1U_0402_16V4Z

C291

1000P_0402_50V7K

VCCA_SM: (22UF*2, 4.7UF*1, 1UF*1)

C233

22U_0805_6.3V6M

C241

0_0402_5%

VCCA_LVDS: 13.2mA (1000PF*1)

VCCA_PEG_BG: 0.414mA (0.1UF*1)

+1.05VS_PEGPLL

C254

22U_0805_6.3V6M

VCCA_PEG_PLL: 50mA

C288

(0.1UF*1)

0.1U_0402_16V4Z

C231

4.7U_0805_10V4Z

VCCA_SM_CK: 24mA (22UF*1, 2.2UF*1, 0.1UF*1)

C253

0.1U_0402_16V4Z

+3VS_TVDAC

VCCD_HDA: 50mA (0.1UF*1)

R402

<BOM Structure>R402

VCCD_HPLL: 157.2mA (0.1UF*1)

+1.05VS_PEGPLL

VCCD_PEG_PLL: 50mA (0.1UF*1)

1 2

R192

R192 0_0603_5%

0_0603_5%

C274

10U_0805_6.3V6M

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

+3VS_CRTDAC

+3VS_DACBG

+1.05VS_DPLLA

+1.05VS_DPLLB

+1.05VS_HPLL

+1.05VS_MPLL

C232

1U_0402_6.3V4Z

+1.5VS_HDA

+1.5VS_TVDAC

+1.5VS_QDAC

+1.8V_LVDS

1U_0402_6.3V4Z

VCCD_LVDS: 60.311111mA (1UF*1)

Issued Date

AD1

AE1

AD48

AA48

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25

AL25

AM24

AL24

AM23

AL23

M25

AF1

AA47

M38

C273

U23H

73mA

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

2.69mA

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

64.8mA

F47

VCCA_DPLLA

L48

VCCA_DPLLB

24mA

VCCA_HPLL

139.2mA

VCCA_MPLL

13.2mA

J48

VCCA_LVDS

J47

VSSA_LVDS

0.414mA

VCCA_PEG_BG

50mA

VCCA_PEG_PLL

480mA

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9

24mA

VCCA_SM_CK_1 VCCA_SM_CK_2 VCCA_SM_CK_3 VCCA_SM_CK_4 VCCA_SM_CK_5 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8

87.79mA

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

50mA

A32

VCC_HDA

58.696mA

VCCD_TVDAC

48.363mA

L28

VCCD_QDAC

157.2mA

VCCD_HPLL

50mA

VCCD_PEG_PLL

60.31mA

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA ES_FCBGA1329

GL@

2009/08/25 2009/08/25

POWER

A SM

HDA

LVDS D TV/CRT

852mA

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7

VTT

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

118.8mA

VCC_TX_LVDS

105.3mA

A CK

VCC_HV_1 VCC_HV_2 VCC_HV_3

1782mA

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

456mA

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

DMI PEG

VTTLF

Deciphered Date

VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VTTLF1 VTTLF2 VTTLF3

CRTPLLA LVDSA PEG

Compal Secret Data

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

VCC_HV: 105.3mA

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

VCC_DMI: 456mA (0.1UF*1)

VTTLF_CAP1

VTTLF_CAP2

VTTLF_CAP3

AB2

0.47U_0603_16V4Z

VTT: 852mA

+1.05VS

(270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)

C481

220U_D2_4VM_R15

C471

10U_0805_6.3V6M

+1.8V_TX_LVDS: 118.8mA (22UF*1, 1000PF*1)

+3VS

C267

0.1U_0402_16V4Z

+1.05VS_PEG: 1782mA (220UF*1, 22UF*1, 4.7UF*1)

+1.05VS_DMI

C445

C190

0.47U_0603_16V4Z

+1.05VS +3VS

C154

4.7U_0805_10V4Z

VCC_AXF: 321.35mA

+1.05VS_AXF

(10UF*1, 1UF*1)

C459

1U_0402_6.3V4Z

+1.5V_SM_CK

C424

0.1U_0402_16V4Z

10U_0805_10V4Z

C470

0.47U_0603_16V4Z

D15

2 1

CH751H-40PT_SOD323-2

4.7U_0805_10V4Z

1000P_0402_50V7K

C287

0.1U_0402_16V4Z

Date: Sheet of

C155

2.2U_0603_6.3V6K

1 2

R399

0_0603_5%

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)

1 2

R361

R361 1_0402_1%

1_0402_1%

+1.8V_TX_LVDS

C292

C293

10U_0805_10V4Z

+1.05VS_PEG

C311

C312

220U_D2_4VM_R15

1 2

R225

0_0805_5%

R263

1 2

10_0603_5%

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Compal Electronics, Inc.

Crestline GMCH (6/7)-VCC

NAWF3 M/B LA-4854P Schematic

C152

C153

0.47U_0603_16V4Z

Please check Power source if want support IAMT

+1.05VS

1uH 30%

1 2

L17

MBK1608121YZF_0603

0.1uH 20%

1 2

R226

R226 0_0603_5%

0_0603_5%

1 2

R264 0_0805_5%

0_0805_5%

+1.05VS

1 2

C250

C250 10U_0805_6.3V6M

10U_0805_6.3V6M

R264

+1.5V

+1.8V

Please check Power source if want support IAMT

+1.05VS

12 45Wednesday, September 02, 2009

0.1

U23I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46 AY46 AV46 AR46

AM46

BF44 AH44 AD44 AA44

BC43 AV43 AU43

AM43

BG42 AY42 AT42 AN42

AJ42

AE42

BD41 AU41

AM41

AH41 AD41 AA41

BG40 BB40 AV40 AN40

AT39

AM39

AJ39

AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

N47 L47 G47

V46 R46 P46 H46 F46

Y44 U44 T44 M44 F44

C43

N42 L42

Y41 U41 T41 M41 G41 B41

H40 E40

N39 L39 B39

Y38 U38 T38

F38 C38

H37 C37

VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84

J38

VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

GL@

VSS

CANTIGA ES_FCBGA1329

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

U23J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17

BA16

AU16 AN16

BG15 AC15

BG14 AA14

BG13 BC13 BA13

AN13

AJ13

AE13

BF12

AV12

AT12

AM12

AA12

BD11 BB11

AY11 AN11 AH11

BG10 AV10

AT10

AJ10 AE10 AA10

N16

G16

W15

C14

N13

G13

N11 G11 C11

M10 BF9 BC9 AN9 AM9 AD9

BH8 BB8 AV8 AT8

VSS_233

VSS_235

VSS_237 VSS_238 VSS_239

K16

VSS_240 VSS_241

E16

VSS_242 VSS_243 VSS_244 VSS_245

A15

VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257 VSS_258

L13

VSS_259 VSS_260

E13

VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266

J12

VSS_267

A12

VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

Y11

VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290

VSS_291

VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

GL@

VSS

VSS NCTF

CANTIGA ES_FCBGA1329

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

VSS SCB

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

2009/08/25 2009/08/25

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH(1/7)-GTL

NAWF3 M/B LA-4854P Schematic

13 45Wednesday, September 02, 2009

0.1

+DIMM_VREF

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2

D D

C C

B B

A A

DDRA_CKE08

DDR_A_BS29

DDRA_CLK08 DDRA_CLK0#8

DDR_A_BS09

DDR_A_WE#9

DDR_A_CAS#9 DDRA_ODT0 8

DDRA_SCS1#8

+3VS

DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDRA_CKE0

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

DDRA_CLK0 DDRA_CLK0#

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13 DDRA_SCS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

R601

1 2

10K_0402_5%

C908

C907

2.2U_0603_6.3V4Z

0.1U_0402_16V4Z

+1.5V +1.5V

JDIMM2

VREF_DQ1VSS1

VSS2

DQ0

DQ1

VSS4

DM0

VSS5

DQ2

DQ3

VSS7

DQ8

DQ9

VSS9

DQS#1 DQS129RESET# VSS1131VSS12

DQ10

DQ11 VSS1337VSS14

DQ16

DQ17 VSS1543VSS16

DQS#2

DQS2

VSS18

DQ18

DQ19

VSS20

DQ24

DQ25 VSS2261DQS#3

DM3 VSS2365VSS24

DQ26

DQ27 VSS2571VSS26

CKE0

VDD1

NC1

BA2

VDD3

A12/BC#

VDD5

VDD7

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

R602

10K_0402_5%

VTT1

205

CONN@

VREF_CA

+0.75VS

DQS#0

VSS10

VSS17

VSS19

VSS21

VDD10

VDD12

VDD14

VDD16

VDD18

VSS28

VSS30

VSS31

VSS33

VSS35 DQS#5

VSS38

VSS40

VSS42

VSS43

VSS45

VSS47 DQS#7

VSS50

VSS52

EVENT#

DQ4 DQ5

VSS3

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1

CK1#

BA1

RAS#

ODT0

ODT1

NC2

DQ36 DQ37

DM4

DQ38 DQ39

DQ44 DQ45

DQS5

DQ46 DQ47

DQ52 DQ53

DM6

DQ54 DQ55

DQ60 DQ61

DQS7

DQ62 DQ63

SDA SCL

VTT2

A15 A14

A11

A6 A4

A2 A0

S0#

DIMM0 REV H:5.2mm (BOT)

DDR_A_D4

DDR_A_D5

6 8

DDR_A_DQS#0

DDR_A_DQS0

12 14

DDR_A_D6

DDR_A_D7

18 20

DDR_A_D12

DDR_A_D13

24 26

DDR_A_DM1

SM_DRAMRST#

30 32

DDR_A_D14

DDR_A_D15

36 38

DDR_A_D20

DDR_A_D21

42 44

DDR_A_DM2

46 48

DDR_A_D22

DDR_A_D23

52 54

DDR_A_D28

DDR_A_D29

58 60

DDR_A_DQS#3

DDR_A_DQS3

64 66

DDR_A_D30

DDR_A_D31

70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDRA_CKE1

DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

DDRA_CLK1 DDRA_CLK1#

DDR_A_BS1 DDR_A_RAS#

DDRA_SCS0# DDRA_ODT0

DDRA_ODT1

DDR_VREF_CA_DIMMA

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_EXTTS#0 D_CK_SDATA D_CK_SCLK

+0.75VS

SM_DRAMRST# 8,15

DDRA_CKE1 8

DDRA_CLK1 8 DDRA_CLK1# 8

DDR_A_BS1 9 DDR_A_RAS# 9

DDRA_SCS0# 8

DDRA_ODT1 8

1 2

R600 0_0402_5%R600 0_0402_5 %

PM_EXTTS#0 8

D_CK_SDATA 15,16 D_CK_SCLK 15,16

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

C905

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

+DIMM_VREF

C906

Layout Note: Place near JDIMM2

+1.5V

10U_0603_6.3V6M

C889

C890

Layout Note: Place near JDIMM2.203 & JDIMM2.204

+0.75VS

C9001U_0603_10 V4Z C9001U_0603_10V4Z

Compal Secret Data

2009/08/25 2009/08/25

Compal Secret Data

Deciphered Date

DDR_A_DQS#[0..7]9

DDR_A_D[0..63]9

DDR_A_DM[0..7]9

DDR_A_DQS[0..7]9

DDR_A_MA[0..14]9

+DIMM_VREF8,15

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

10U_0603_6.3V6M

C891

C9011U_0603_10 V4Z C9011U_0603_10V4Z

C893

C892

C9021U_0603_10V4Z C 9021U_0603_10V4Z

C9031U_0603_10 V4Z C9031U_0603_10V4Z

10U_0603_6.3V6M

C894

10U_0805_6.3V6M

C904

0.1U_0402_16V4Z

C895

Title

Size Document Number Rev

NAWF3 M/B LA-4854P Schematic

Date: Sheet of

+DIMM_VREF

C887

0.1U_0402_16V4Z

C896

Compal Electronics, Inc.

+1.5V

R598

C888

C898

R598

+DIMM_VREF

R599

1K_0402_1%

C899

C899 330U_D2E_2.5VM_R7

330U_D2E_2.5VM_R7

1K_0402_1%

2.2U_0805_16V4Z

0.1U_0402_16V4Z

C897

DDRIII-SODIMM0

0.1

14 45Wednesday, September 02, 2009

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