Acer Aspire R7-372T Schematic
SYSTEM PAGE REF.
Dr-Bios.com
5
4
3
2
1
01. Block Diagram
02. GPIO Setting
03. CPU(1) _DDI/eDP
04. CPU(2)_LPDDR3
05. CPU(3)_+VCCCORE
06. CPU(4)_+VCCGT
07. CPU(5)_+VDDQ/IO/SA
D D
08. CPU(6)_CPU GND
09. CPU(7)_CFG/RSVD
11. Alpine Ridge_TBT
12. Alpine Ridge_Power
13. CC_Logic_TPS65982
14. USB Type_C
16. LPDDR3(1)_MEMORY DOWN
17. LPDDR3(2)_MEMORY DOWN
18. LPDDR3(3)_CA/DQ Voltage
20. PCH(1)_SPI/LPC
21. PCH(2)_ISH/GPIO
22. PCH(3)_HDA/SDIO
23. PCH(4)_USB/PCIE/SATA
24. PCH(5)_CLK/RTC
25. PCH(6)_POWER MANAGEMENT
26. PCH(7)_POWER
28. PCH(9)_SPI/SMB
30. EC_IT8587E/FX
31. EC_IT8587E/FX_KB/TP/KBBL
32. RST_Reset Circuit
C C
36. ALC255_Combo Jack,SPK,DMIC
44. Debug CONN
45. CRT(1)_eDP,CAMERA,TSN
48. HDMI OUT
50. THERMAL / FAN
51. NGFF PCIE/SATA SSD x2
52. USB 3.0/Sleep Charge IC
53. NGFF PCIE WLAN/BT
57. Discharge
58. SHB_Sensor Hub
60. DC_DC/BAT CONN
62. TPM NPCT650
64. IO Board
65. ME_CONN / Skew Hole
68. BYPASS EC SEQUENCE
69. Power Switch/Lid Switch
80. POWER_VCORE for U22
81. POWER_SYSTEM
82. POWER_+1.0VSUS
83. POWER_ DDR & VTT_UMA
B B
84. POWER_1.8VSUS
88. POWER_CHARGER
89. POWER_ AC_PD_WC Input
90. POWER_DETECT
91. POWER_LOAD SWITCH
92. POWER_PROTECT
93. POWER_SIGNAL
94. POWER_FLOWCHART
97. System History
Panel (eDP)
3800x1600
HDMI1.4
USB3.1 Type_C
Keyboard
Universal Jack
Speaker Conn.
SKI2 Schematics for SKL-U Platform pre Rev 2.0
BLOCK DIAGRAM
Page 14
FANx2
DMIC x2
Page 45
Page 45
/2.0
Page 48
Page 31
Page 50
Page 36
Page 36
Page 36
USB3.1/CIO/DP
Power Delivery
TI/TPS65982
Page 13
PWM
Thunderbolt
INTEL/DSL6340
Page 11,12
1MB SPI ROM
TPM NPCT650
Debug Conn.
EC IT8587/FX
8MB SPI ROM
Touch Pad
Audi o Codec
Realtek/ALC255
NGFF SSD
NGFF SSD
eDPx4
DDI x 2
PCIEx4
Page 11
Page 62
Page 44
Page 30
Page 28
Page 31
Page 36
Page 51
Page 51
1
1,2,3,4
LPC
SPI
I2C
HDA
PCIE x4
PCIE x2
1
Skylake U
CPU
+
PCH
PCIE
3
5,6
7,8
11,12
Page 3~9
Page 20~26
USB 3.0
USB 2.0
LPDDR3 1600 MT/s
1
1
2
2
7
4
6
8
5
Touch panel conn.
Card Reader
RTS5170
NGFF
WLAN + BT4.0
Charger IC
TPS2544
Page 52
Page A01
Page 53
LPDDR3 4G/8G
USB3.0 Port / S&C
USB3.0 Port
Camera
1
USB2.0 Port
Page 45
Page 45
Page A01
Page 16~18
Page 52
Page 52
Power
+VCORE
CPU VR
+VCCGT
+VCCSA
Page 80
System (5V & 3.3V)
+1.0VSUS
DDR & VTT
+1.8VSUS
BATTERY CHARGER
DC Input Select
Page 81
Page 82
Page 83
Page 84
Page 88
Page 89
0
Page 58
ISH
USB2.0
I2C
Discharge Circuit
9
0
Reset Circuit
Page 57
Page 32
2
DC & BATT. Conn.
Page 60
Skew Holes
Page 65
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Gyro+A
InvenSense/ICM20630
Page A0
Page A0
I2C
Sensor Hub
IT8350
A A
Light Sensor
Capella/CM32180
e-Compass
AKM/AK09911C
5
Page A0
4
3
DETECT
LOAD SWITCH
Power Protect
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
P3HCJ
P3HCJ
P3HCJ
1
Page 90
Page 91
Page 92
Block Diagram
Block Diagram
Block Diagram
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
1100Thursday, September 03, 2015
1100Thursday, September 03, 2015
1100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
4
3
2
1
Use As Signal NameEC GPIOUse As Signal NameEC GPIO
D D
C C
B B
A A
Title :
Title :
Title :
GPIO Setting
GPIO Setting
GPIO Setting
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
2100Thursday, September 03, 2015
2100Thursday, September 03, 2015
2100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
P3HCJ
P3HCJ
Engineer:
Engineer:
Engineer:
1
5
Dr-Bios.com
4
3
2
1
+VCCIO
+VCCST_CPU
+VCCSTG
+3VS
SKYLAKE-U symbol ReV0.53 #545316 / Ballout_Rev0_71 #543787 / PEGA local PN is 4201-0062000
U0301A
D D
DDI Port 1: Alpine Ridge
R13: DDI[0:1] to TBT
DDI Port 2: Alpine Ridge
+VCCIO
C C
12
R0311
1KOhm
H_THRMTRIP#32
B B
PROCHOT#88
VR_HOT#80
H_PROCHOT# H_PROCHOT#_R
R0325 0Ohm@
R0320 0Ohm@
H_PROCHOT#
DDI1_TXN0_TBT11
DDI1_TXP0_TBT11
DDI1_TXN1_TBT11
DDI1_TXP1_TBT11
DDI1_TXN2_TBT11
DDI1_TXP2_TBT11
DDI1_TXN3_TBT11
DDI1_TXP3_TBT11
DDI2_TXN0_TBT11
DDI2_TXP0_TBT11
DDI2_TXN1_TBT11
DDI2_TXP1_TBT11
DDI2_TXN2_TBT11
DDI2_TXP2_TBT11
DDI2_TXN3_TBT11
DDI2_TXP3_TBT11
DDPB_CTRLCLK_TBT11
DDPB_CTRLDATA_TBT11
R13:No Need
R0301 24.9Ohm1%
12
R0312
1KOhm
1 2
R0314 499Ohm1%
12
12
T0303
T0304
12
141024 follow PDG V1.0 Table 10-4
Rpu = 1K ohm 5%
Rs = 500 ohm 5%
12
R0326
NB_R0402_5MIL_SMALL
DDPB_CTRLDATA_TBT
DDPC_CTRLCLK
1
DDPC_CTRLDATA
1
DDPD_CTRLDATA
DP_COMP
H_PECI_EC30
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22
N12
GPP_E23
E52
eDP_RCOMP
940432
01V010000015
1 2
R0315 43Ohm
1 2
SP0301
1 2
R0316 49.9Ohm1%
1 2
R0317 49.9Ohm1%
1 2
R0318 49.9Ohm1%
1 2
R0319 49.9Ohm1%
T0306
T0311
T0312
T0313
T0314
+VCCST_CPU+VCCSTG+VCCST_CPU
DDI
DISPLAY SIDEBANDS
12
R0313
49.9Ohm
1%
@
TP_CATERR#_R
H_PECI
H_THRMTRIP#_R
1
SKTOCC#
CPU_GP0
1
CPU_GP1
1
CPU_GP2
1
CPU_GP3
1
CPU_POPIRCOMP
PCH_POPIRCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
EDP
D63
A54
C65
C63
A65
C55
D55
B54
C56
A6
A7
BA5
AY5
AT16
AU16
H66
H65
EDP_DISP_UTIL
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
U0301D
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
940432
01V010000015
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
RSVD_1
RSVD_2
eDP_BKLTEN
eDP_BKLTCTL
eDP_VDDEN
CPU MISC
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
EDP_DISP_UTIL_S
B52
G50
F50
E48
F48
G46
F46
L9
L7
EXT_SMI#_R
L6
EXT_SCI#_R
N9
eDP_HPD
L10
R12
R11
U13
1
1 2
R0302 NB_R0402_5MIL_SMALL
1 2
R0303 NB_R0402_5MIL_SMALL
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_T CK
PCH_JTAG_T DI
PCH_JTAG_T DO
PCH_JTAG_T MS
PCH_TRST#
JTAGX
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
XDP_TCLK
XDP_TDI_CPU
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TRST_CPU_N
PCH_JTAG_TCLK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST_CPU_N
XDP_TCLK_JTAGX
T0305
EDP_TXN0 45
EDP_TXP0 45
EDP_TXN1 45
EDP_TXP1 45
EDP_AUXN 45
EDP_AUXP 45
EXT_SMI#
EXT_SCI#
EDP_TXN2 45
EDP_TXP2 45
EDP_TXN3 45
EDP_TXP3 45
DDI1_AUXN_TBT 11
DDI1_AUXP_TBT 11
DDI2_AUXN_TBT 11
DDI2_AUXP_TBT 11
eDP_HPD 45
LCD_BKLTEN_PCH 21,45
LCD_BL_PWM_PCH 45
EDP_VDD_EN 45
1
T0315
R14: eDP x 2
R13: eDP x 4
R13: AUX to TBT
DDI1_HPD_TBT 11
DDI2_HPD_TBT 11
EXT_SMI# 30,44
EXT_SCI# 30
Pull down at connector side
PCH_JTAG_TMS XDP_TMS_CPU
DDPB_CTRLDATA has pull high at connector side
DDPB_CTRLDATA_TBT
DDPC_CTRLDATA
DDPD_CTRLDATA
EXT_SCI#
EXT_SMI#
R13: HPD to TBT
XDP_TDO_CPUPCH_JTAG_TDO
R0323 51Ohm
XDP_TRST_CPU_NPCH_TRST_CPU_N
XDP_TDI_CPUPCH_JTAG_TDI
XDP_TCLKXDP_TCLK_JTAGX
R0324 51Ohm
+3VSUS_ORG
1 2
R0304 2.2KOhm@
1 2
R0305 2.2KOhm
1 2
R0306 2.2KOhm@
1 2
R0307 10KOhm
1 2
R0308 10KOhm
+VCCSTG
12
12
1
1
1
+VCCIO 7,9,91
+VCCST_CPU 5,7,9,25,32
+VCCSTG 5,7
+3VS 4,12,20,21,22,23,24,28,30,31,32,36,44,45,48,50,51,53,57,58,62,64,91,92
+3VSUS_ORG 20,21,22,23,25,26
+3VS
DDPB_CTRLDATA
DDPC_CTRLDATA
DDPD_CTRLDATA
- Internal weak pull down 20k ohm
- 0 : port is not detected
1 : port is deteccted
+3VS
T0316
T0317
T0318
A A
5
32
3
Q0301
D
2N7002
1
1
G
S
2
THRO_CPU 30
CPU(1)_DDI/eDP
CPU(1)_DDI/eDP
CPU(1)_DDI/eDP
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
P3HCJ
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
3100Thursday, September 03, 2015
3100Thursday, September 03, 2015
3100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
T25S used Non-Interleave
D D
C C
M_A_D0
M_A_D1
M_A_D2
M_A_D3
M_A_D4
M_A_D5
M_A_D6
M_A_D7
M_A_D8
M_A_D9
M_A_D10
M_A_D11
M_A_D12
M_A_D13
M_A_D14
M_A_D15
NIL Channel A[0..15]NIL Channel A[32..47]NIL Channel B[0..15]NIL Channel B[32..47]
M_A_D32
M_A_D33
M_A_D34
M_A_D35
M_A_D36
M_A_D37
M_A_D38
M_A_D39
M_A_D40
M_A_D41
M_A_D42
M_A_D43
M_A_D44
M_A_D45
M_A_D46
M_A_D47
M_B_D0
M_B_D1
M_B_D2
M_B_D3
M_B_D4
M_B_D5
M_B_D6
M_B_D7
M_B_D8
M_B_D9
M_B_D10
M_B_D11
M_B_D12
M_B_D13
M_B_D14
M_B_D15
M_B_D32
M_B_D33
M_B_D34
M_B_D35
M_B_D36
M_B_D37
M_B_D38
M_B_D39
M_B_D40
M_B_D41
M_B_D42
M_B_D43
M_B_D44
M_B_D45
M_B_D46
M_B_D47
U0301B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
940432
01V010000015
M_A_D[63:0]16 M_B_D[63:0]17
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR CH - A
4
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
AM69
AT69
AT70
BA64
AY64
AY60
BA60
BA38
AY38
AY34
BA34
BA30
AY30
AY26
BA26
AW50
AT52
AY67
AY68
BA67
AW67
M_A_CAA[9:0] 16
M_A_CAB[9:0] 16
M_A_DQS#[7:0] 16
M_A_DQS[7:0] 16
M_A_DIM0_ODT0
M_A_CAA0
M_A_CAA1
M_A_CAA2
M_A_CAA3
M_A_CAA4
M_A_CAA5
M_A_CAA6
M_A_CAA7
M_A_CAA8
M_A_CAA9
M_A_CAB0
M_A_CAB1
M_A_CAB2
M_A_CAB3
M_A_CAB4
M_A_CAB5
M_A_CAB6
M_A_CAB7
M_A_CAB8
M_A_CAB9
M_A_DQS#0
M_A_DQS0
M_A_DQS#1
M_A_DQS1
M_A_DQS#4
M_A_DQS4
M_A_DQS#5
M_A_DQS5
M_B_DQS#0
M_B_DQS0
M_B_DQS#1
M_B_DQS1
M_B_DQS#4
M_B_DQS4
M_B_DQS#5
M_B_DQS5
DDR_PG_CTRL_S
M_A_DIM0_CLK#0 16
M_A_DIM0_CLK0 16
M_A_DIM0_CLK#1 16
M_A_DIM0_CLK1 16
M_A_DIM0_CKE0 16
M_A_DIM0_CKE1 16
M_A_DIM0_CKE2 16
M_A_DIM0_CKE3 16
M_A_DIM0_CS#0 16
M_A_DIM0_CS#1 16
M_A_DIM0_ODT0 16
DIMM_VREF_CA 18
DIMM0_VREF_DQ 18
DIMM1_VREF_DQ 18
3
U0301C
M_A_D16
AF65
M_A_D17
M_A_D18
M_A_D19
M_A_D20
M_A_D21
M_A_D22
M_A_D23
M_A_D24
M_A_D25
M_A_D26
M_A_D27
M_A_D28
M_A_D29
M_A_D30
NIL Channel A[16..31]NIL Channel A[48..63]NIL Channel B[16..31]NIL Channel B[48..63]
M_A_D31
M_A_D48
M_A_D49
M_A_D50
M_A_D51
M_A_D52
M_A_D53
M_A_D54
M_A_D55
M_A_D56
M_A_D57
M_A_D58
M_A_D59
M_A_D60
M_A_D61
M_A_D62
M_A_D63
M_B_D16
M_B_D17
M_B_D18
M_B_D19
M_B_D20
M_B_D21
M_B_D22
M_B_D23
M_B_D24
M_B_D25
M_B_D26
M_B_D27
M_B_D28
M_B_D29
M_B_D30
M_B_D31
M_B_D48
M_B_D49
M_B_D50
M_B_D51
M_B_D52
M_B_D53
M_B_D54
M_B_D55
M_B_D56
M_B_D57
M_B_D58
M_B_D59
M_B_D60
M_B_D61
M_B_D62
M_B_D63
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
940432
01V010000015
SKL_ULT
DDR CH - B
2
M_B_DQS#[7:0] 17
M_B_DQS[7:0] 17
M_B_CAA[9:0] 17
M_B_CAB[9:0] 17
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
+1.2V
+3VSUS
+3VS
M_B_DIM0_ODT0
M_A_DQS#2
M_A_DQS2
M_A_DQS#3
M_A_DQS3
M_A_DQS#6
M_A_DQS6
M_A_DQS#7
M_A_DQS7
M_B_DQS#2
M_B_DQS2
M_B_DQS#3
M_B_DQS3
M_B_DQS#6
M_B_DQS6
M_B_DQS#7
M_B_DQS7
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
+1.2V 7,16,17,18,57,83
+3VSUS 12,13,21,24,25,26,28,30,31,53,62,64,68,81,84,92
+3VS 3,12,20,21,22,23,24,28,30,31,32,36,44,45,48,50,51,53,57,58,62,64,91,92
M_B_DIM0_CLK#0 17
M_B_DIM0_CLK#1 17
M_B_DIM0_CLK0 17
M_B_DIM0_CLK1 17
M_B_DIM0_CKE0 17
M_B_DIM0_CKE1 17
M_B_DIM0_CKE2 17
M_B_DIM0_CKE3 17
M_B_DIM0_CS#0 17
M_B_DIM0_CS#1 17
M_B_CAA0
M_B_CAA1
M_B_CAA2
M_B_CAA3
M_B_CAA4
M_B_CAA5
M_B_CAA6
M_B_CAA7
M_B_CAA8
M_B_CAA9
M_B_CAB0
M_B_CAB1
M_B_CAB2
M_B_CAB3
M_B_CAB4
M_B_CAB5
M_B_CAB6
M_B_CAB7
M_B_CAB8
M_B_CAB9
R0402 200Ohm1%
R0403 80.6Ohm1%
R0404 162Ohm1%
M_B_DIM0_ODT0 17
Controls reset to the memory subsystems,
and is used on DDR3L, DDR4
(not applicable to LPDDR3).
DRAM_RESET#
1 2
1 2
1 2
1
1
T0401
B B
+1.2V
12
C0401
U0401
1
NC
2
A
3 4
12
R0406
10KOhm@
A A
GND
74AUP1G07GW
5
VCC
Y
0.1UF/16V
5
4
3
+3VS
12
R0412
220KOhm
N/A
+3VSUS
12
12
R0407
220KOhm
@
R0411
2MOHM
@
DDR_PG_CTRL 83
2
CPU(2)_DDR3L
CPU(2)_DDR3L
CPU(2)_DDR3L
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1
BG1
BG1
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
Date: Sheet of
P3HCJ
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
4100Thursday, September 03, 2015
4100Thursday, September 03, 2015
4100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
4
3
2
1
+VCORE
1 2
R0536 100Ohm1%
1 2
R0537 100Ohm1%
SP0505
+1.8VSUS
VCORE_VCCSENSE 80
VCORE_VSSSENSE 80
1 2
R0517 220Ohm1%
1 2
R0518 0Ohm
1 2
R0519 0Ohm
1 2
D D
+VCORE +VCORE
SKL 2+2, +V1.8VS_EDRAM / +V_EDRAM_VR / +V_EOPIO_VR
C C
From Intel, SKL-U 2+2 reserve these pins PD to GND
1 2
R0528 0Ohm@
1 2
R0529 0Ohm@
1 2
R0530 0Ohm@
RSVD NC
1 2
R0535 0Ohm@
1 2
R0531 0Ohm@
1 2
R0532 0Ohm@
1 2
R0533 0Ohm@
1 2
R0534 0Ohm@
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40
AM32
AM33
AM35
AM37
AM38
AK32
AB62
AC63
AE63
AE62
AG62
AL63
AJ62
A30
A34
A39
A44
G30
K32
P62
V62
H63
G61
U0301L
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
RSVD_3
RSVD_4
VCCOPC_1
VCCOPC_2
VCCOPC_3
VCC_OPC_1P8_1
VCC_OPC_1P8_2
VCCOPC_SENSE
VSSOPC_SENSE
VCCEOPIO_1
VCCEOPIO_2
VCCEOPIO_SENSE
VSSEOPIO_SENSE
940432
01V010000015
CPU POWER 1 OF 4
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
Pull H/L near CPU side
VIDALERT#
VIDSCK
VIDSOUT
+VCCFUSEPRG
NB_R0402_20MIL_SMALL
+1.8VSUS 9,26,84 +VCCST_CPU 3,7,9,25,32
CPU side VR side
+VCCST_CPU
+VCORE
+VCCSTG
12
+VCCST_CPU
12
R0520
56Ohm
1%
R0521
100Ohm
1%
+VCCSTG
+VCCST_CPU
VIDALERT#_R
VIDSCK_R
VIDSOUT_R
+VCCSTG 3,7+VCORE 80
+VCCST_CPU
12
+VCCST_CPU
12
R0522
45.3Ohm
1%
R0523
100Ohm
1%
1 2
R0524 0Ohm
12
C0505
0.1UF/25V
1 2
R0525 51Ohm1%
1 2
R0526 10Ohm1%
VR_SVID_ALERT# 80
VR_SVID_CLK 80
VR_SVID_DATA 80
B B
A A
CPU(3)_+VCCCORE
CPU(3)_+VCCCORE
CPU(3)_+VCCCORE
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
5100Thursday, September 03, 2015
5100Thursday, September 03, 2015
5100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
5
Dr-Bios.com
4
3
2
1
+VCCGT
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCCGT
1 2
R0601 0Ohm@
1 2
R0608 0Ohm@
1 2
R0604 0Ohm@
1 2
R0605 0Ohm@
1 2
R0606 0Ohm@
1 2
R0607 0Ohm@
1 2
R0602 0Ohm@
1 2
R0603 0Ohm@
From Intel, SKL-U 2+2 reserve these pins PD to GND
+VCCGT
D D
C C
+VCCGT
R0609
100Ohm
1%
1 2
VCCGT_VCCSENSE80
VCCGT_VSSSENSE80
Pull H/L near CPU side
12
R0610
100Ohm
1%
Pull H/L near CPU side
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
U0301M
CPU POWER 2 OF 4
VCCGT_1
VCCGT_2
VCCGT_3
VCCGT_4
VCCGT_5
VCCGT_6
VCCGT_7
VCCGT_8
VCCGT_9
VCCGT_10
VCCGT_11
VCCGT_12
VCCGT_13
VCCGT_14
VCCGT_15
VCCGT_16
VCCGT_17
VCCGT_18
VCCGT_19
VCCGT_20
VCCGT_21
VCCGT_22
VCCGT_23
VCCGT_24
VCCGT_25
VCCGT_26
VCCGT_27
VCCGT_28
VCCGT_29
VCCGT_30
VCCGT_31
VCCGT_32
VCCGT_33
VCCGT_34
VCCGT_35
VCCGT_36
VCCGT_37
VCCGT_38
VCCGT_39
VCCGT_40
VCCGT_41
VCCGT_42
VCCGT_43
VCCGT_44
VCCGT_45
VCCGT_46
VCCGT_47
VCCGT_48
VCCGT_49
VCCGT_50
VCCGT_51
VCCGT_52
VCCGT_53
VCCGT_54
VCCGT_55
VCCGT_SENSE
VSSGT_SENSE
940432
01V010000015
VCCGT_56
VCCGT_57
VCCGT_58
VCCGT_59
VCCGT_60
VCCGT_61
VCCGT_62
VCCGT_63
VCCGT_64
VCCGT_65
VCCGT_66
VCCGT_67
VCCGT_68
VCCGT_69
VCCGT_70
VCCGT_71
VCCGT_72
VCCGT_73
VCCGT_74
VCCGT_75
VCCGT_76
VCCGT_77
VCCGT_78
VCCGT_79
VCCGT_80
VccGTx_1
VccGTx_2
VccGTx_3
VccGTx_4
VccGTx_5
VccGTx_6
VccGTx_7
VccGTx_8
VccGTx_9
VccGTx_10
VccGTx_11
VccGTx_12
VccGTx_13
VccGTx_14
VccGTx_15
VccGTx_16
VccGTx_17
VccGTx_18
VccGTx_19
VccGTx_20
VccGTx_21
VccGTx_22
VccGTx_23
VccGTx_24
VccGTx_25
VccGTx_26
VccGTx_27
VccGTx_28
VccGTx_29
VCCGTx_SENSE
VSSGTx_SENSE
+VCCGT 80
B B
A A
CPU(4)_+VCCGT
CPU(4)_+VCCGT
CPU(4)_+VCCGT
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
6100Thursday, September 03, 2015
6100Thursday, September 03, 2015
6100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
5
Dr-Bios.com
D D
4
3
+1.2V
+VDDQ_CPU
+VCCST_CPU
+VCCSTG
+VCCIO
+VCCSA
+5VSUS
+12VSUS
+1.0VSUS
2
+1.2V 4,16,17,18,57,83
+VDDQ_CPU
+VCCST_CPU 3,5,9,25,32
+VCCSTG 3,5
+VCCIO 3,9,91
+VCCSA 80
+5VSUS 13,52,64,81,84
+12VSUS 28,81,91
+1.0VSUS 26,82
+VDDQ_CPU_CLK
+VCCSFR_OC
+VCCSFR
+1.0V
+VDDQ_CPU_CLK
+VCCSFR_OC
+VCCSFR
+1.0V 57,91
1
+1.2V
C C
B B
JP0701
3MM_OPEN_5MIL
2
112
JP0702
3MM_OPEN_5MIL
2
112
JP0703
3MM_OPEN_5MIL
2
112
JP0704
3MM_OPEN_5MIL
2
112
+VDDQ_CPU
12
C0701
10UF/6.3V
12
C0702
10UF/6.3V
12
C0703
10UF/6.3V
12
C0704
10UF/6.3V
+VDDQ_CPU
12
12
R0701 0Ohm
C0705
10UF/6.3V
1 2
+VCCST_CPU
+VCCSTG
+VCCSFR_OC
+VCCSFR
C0706
10UF/6.3V
12
12
0.1UF/25V
1 2
0.1UF/25V
1 2
C0701 - C0704 : Near by package
C0705 - C0710 : Underneath the package
12
+VDDQ_CPU_CLK
C0712
1UF/6.3V
C0713
1UF/6.3V
C0714
C0715
12
C0707
1UF/6.3V
0.1UF/25V
1 2
0.1UF/25V
1 2
C0711
C0716
C0708
1UF/6.3V
12
C0709
1UF/6.3V
12
C0710
1UF/6.3V
U0301N
CPU POWER 3 OF 4
AU23
VDDQ_1
AU28
VDDQ_2
AU35
VDDQ_3
AU42
VDDQ_4
BB23
VDDQ_5
BB32
VDDQ_6
BB41
VDDQ_7
BB47
VDDQ_8
BB51
VDDQ_9
AM40
VDDQC
A18
VCCST
A22
VCCSTG
AL23
VCCPLL_OC
K20
VccPLL_1
K21
VccPLL_2
940432
01V010000015
+1.0V
1 2
R0710 0Ohm
+1.0V +VCCSFR
+VCCIO
vx_r0603_small_short
1 2
R0711 0Ohm
vx_r0603_small_short
1 2
R0713 0Ohm
vx_r0603_small_short
VCCIO_1
VCCIO_2
VCCIO_3
VCCIO_4
VCCIO_5
VCCIO_6
VCCIO_7
VCCSA_1
VCCSA_2
VCCSA_3
VCCSA_4
VCCSA_5
VCCSA_6
VCCSA_7
VCCSA_8
VCCSA_9
VCCSA_10
VCCSA_11
VCCSA_12
VCCSA_13
VCCSA_14
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
+VCCST_CPU
+VCCSTG
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
VCCIO_VR_FB
VSSIO_VR_FB
+VCCSA
VCCSA_VSSSENSE 80
1 2
R0702 100Ohm1%
1 2
R0703 100Ohm1%
VCCSA_VCCSENSE 80
Pull H/L near CPU side
12
12
C0717
C0718
1UF/6.3V
1UF/6.3V
+VCCSA
1 2
R0709 0Ohm
vx_r0603_small_short
+VCCIO
12
12
12
+VCCSFR_OC+1.2V
C0719
1UF/6.3V
R0714
1KOHM
@
R0715
1KOHM
@
+VCCIO
12
C0720
1UF/6.3V
Reserved PH/PD
A A
CPU(5)_+VDDQ/IO/SA
CPU(5)_+VDDQ/IO/SA
CPU(5)_+VDDQ/IO/SA
Title :
Title :
reference 543977_543977_SKL_PDDG_Rev0_91
5
4
3
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
7100Thursday, September 03, 2015
7100Thursday, September 03, 2015
7100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
4
3
2
1
F8
G10
G22
G43
G45
G48
G5
G52
G55
G58
G6
G60
G63
G66
H15
H18
H71
J11
J13
J25
J28
J32
J35
J38
J42
J8
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71
L11
L16
L17
U0301R
GND 3 OF 3
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
940432
01V010000015
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
U0301P
GND 1 OF 3
A5
VSS_1
A67
VSS_2
A70
VSS_3
AA2
VSS_4
AA4
VSS_5
AA65
VSS_6
AA68
VSS_7
AB15
VSS_8
AB16
VSS_9
D D
C C
AB18
AB21
AD13
AD16
AD19
AD20
AD21
AD62
AE64
AE65
AE66
AE67
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AB8
AD8
AF1
AF2
AF4
AH6
AJ15
AJ18
AJ20
AJ4
AK8
AL2
AL28
AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
940432
01V010000015
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
AV1
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA2
F68
U0301Q
GND 2 OF 3
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
940432
01V010000015
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
B B
A A
CPU(6)_CPU GND
CPU(6)_CPU GND
CPU(6)_CPU GND
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
8100Thursday, September 03, 2015
8100Thursday, September 03, 2015
8100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
5
Dr-Bios.com
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
T0901
1
CFG11
CFG12
CFG13
CFG14
CFG15
SNN_CFG16
SNN_CFG17
SNN_CFG18
SNN_CFG19
CFG_RCOMP
ITP_PMODE
RSVD_VSS_F65
RSVD_VSS_G65
BA70
BA68
AL25
AL27
D D
1
T0902
1
T0903
1
T0904
1
T0905
1 2
R0901 49.9Ohm1%
C C
1
T0917
1
T0918
Remove SNN
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
U0301S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMOD E
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_16
RSVD_TP_1
RSVD_TP_2
RSVD_17
RSVD_18
VSS_360
VSS_361
RSVD_19
RSVD_20
940432
01V010000015
4
RESERVED SIGNALS-1
RSVD_TP_3
RSVD_TP_4
RSVD_TP_5
RSVD_TP_6
RSVD_21
RSVD_22
RSVD_23
RSVD_24
RSVD_25
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
RSVD_33
RSVD_34
RSVD_35
RSVD_36
RSVD_37
RSVD_38
RSVD_39
RSVD_40
RSVD_41
RSVD_42
VSS_362
ZVM#
RSVD_TP_7
RSVD_TP_8
MSM#
PROC_SELECT#
3
BB68
BB69
AK13
AK12
BB2
BA3
AU5
TP5
AT5
TP6
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
TP4
A69
B69
AY3
D71
C70
C54
D54
AY4
TP1
BB3
TP2
AY71
AR56
AW71
AW70
AP56
C64
RSVD_AY3
VSS_AY71
SKL_CNL#
1 2
R0902 0Ohm
vx_r0402_small_short
1 2
R0903 0Ohm
vx_r0402_small_short
1 2
R0904 100KOhm@
+1.8VSUS
+VCCST_CPU
2
1 2
R0930 0Ohm@
1 2
R0931 0Ohm@
+VCCST_CPU
+1.8VSUS
VCC_1P8_U12
VCC_1P8_U11
12
C0901
@
0.1UF/25V
+VCCIO
@
12
C0902
0.1UF/25V
+VCCIO 3,7,91
+VCCST_CPU 3,5,7,25,32
+1.8VSUS 26,84
U0301T
AW69
RSVD_43
AW68
RSVD_44
AU56
RSVD_45
AW48
RSVD_46
C7
RSVD_47
U12
RSVD_48
U11
RSVD_49
H11
RSVD_50
940432
01V010000015
SPARE
1
F6
RSVD_51
E3
RSVD_52
C11
RSVD_53
B11
RSVD_54
A11
RSVD_55
D12
RSVD_56
C12
RSVD_57
F52
RSVD_58
+VCCIO
12
R0905
0Ohm
@
+VCCIO_OUT_CFG_PU
B B
A A
5
R0906
1 2
10KOhm
@
1%
1 2
R0907 10KOhm
@
1%
1 2
R0908 10KOhm
@
1%
1 2
R0909 10KOhm
@
1%
1 2
R0910 10KOhm
@
1%
1 2
R0911 10KOhm
@
1%
1 2
R0912 10KOhm
@
1%
1 2
R0913 10KOhm
@
1%
1 2
R0914 10KOhm
@
1%
1 2
R0915 10KOhm
@
1%
1 2
R0916 10KOhm
@
1%
1 2
R0917 10KOhm
@
1%
1 2
R0918 10KOhm
@
1%
1 2
R0919 10KOhm
@
1%
1 2
R0920 10KOhm
@
1%
1 2
R0921 10KOhm
@
1%
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
4
1 2
R0922 1KOhm@
1 2
R0923 1KOhm@
1 2
R0924 1KOhm@
1 2
R0925 1KOhm@
1 2
R0926 1KOhm
1 2
R0927 1KOhm@
1 2
R0928 1KOhm@
1 2
R0929 1KOhm@
CPU(7)_CFG/RSVD
CPU(7)_CFG/RSVD
CPU(7)_CFG/RSVD
Title :
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
P3HCJ
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
9100Thursday, September 03, 2015
9100Thursday, September 03, 2015
9100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
PCIE_TXP1_TBT23
PCIE_TXN1_TBT23
PCIE_TXP2_TBT23
CPU PCIE TX
D D
REQ# PU in PCH
CPU Display Port
C C
USB3.1 Conn
B B
R1112
R1111
3.3KOhm
3.3KOhm
1 2
1 2
A A
PCIE_TXN2_TBT23
PCIE_TXP3_TBT23
PCIE_TXN3_TBT23
PCIE_TXP4_TBT23
PCIE_TXN4_TBT23
CLK_PCIE_TBT_PCH24
CLK_PCIE_TBT#_PCH24
CLK_REQ0_TBT#24
DDI1_TXP0_TBT3
DDI1_TXN0_TBT3
DDI1_TXP1_TBT3
DDI1_TXN1_TBT3
DDI1_TXP2_TBT3
DDI1_TXN2_TBT3
DDI1_TXP3_TBT3
DDI1_TXN3_TBT3
DDI1_AUXP_TBT3
DDI1_AUXN_TBT3
DDI1_HPD_TBT3
DDPB_CTRLCLK_TBT3
DDPB_CTRLDATA_TBT3
DDI2_TXP0_TBT3
DDI2_TXN0_TBT3
DDI2_TXP1_TBT3
DDI2_TXN1_TBT3
DDI2_TXP2_TBT3
DDI2_TXN2_TBT3
DDI2_TXP3_TBT3
DDI2_TXN3_TBT3
DDI2_AUXP_TBT3
DDI2_AUXN_TBT3
DDI2_HPD_TBT3
TBTA_CA2HD_1_P14
TBTA_CA2HD_1_N14
TBTA_HD2CA_1_P14
TBTA_HD2CA_1_N14
TBTA_HD2CA_0_P14
TBTA_HD2CA_0_N14
TBTA_CA2HD_0_N14
TBTA_CA2HD_0_P14
TBTA_DPSRC_AUX_P13
TBTA_DPSRC_AUX_N13
TBTA_USB2_D_P13
TBTA_USB2_D_N13
TBTA_LSTX13
TBTA_LSRX13
TBTA_HPD13
12
U1101
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q80DVSNIG
05V000000084
C1135
0.1UF/16V
HOLD#(IO3)
R1113
3.3KOhm
1 2
TBT_EE_CS_N
TBT_EE_DO
TBT_EE_WP_N TBT_EE_CLK
1 2
R1192 NB_R0402_5MIL_SMALL
1 2
R1191 NB_R0402_5MIL_SMALL
R1103 14KOHM1%
R1104 4.75KOhm0.1%
C1129 0.22UF/6.3Vvx_c0201
C1130 0.22UF/6.3Vvx_c0201
C1131 0.22UF/6.3Vvx_c0201
C1132 0.22UF/6.3Vvx_c0201
R1107 499Ohm1%
+3V3_FLASH
8
VCC
TBT_HOLD_N
7
6
CLK
TBT_EE_DI
5
DI(IO0)
1 2
C1109 0.1UF/6.3V
1 2
C1110 0.1UF/6.3V
1 2
C1111 0.1UF/6.3V
1 2
C1112 0.1UF/6.3V
1 2
C1113 0.1UF/6.3V
1 2
C1114 0.1UF/6.3V
1 2
C1115 0.1UF/6.3V
1 2
C1116 0.1UF/6.3V
1 2
C1117 0.1UF/6.3V
1 2
C1118 0.1UF/6.3V
1 2
C1119 0.1UF/6.3V
1 2
C1120 0.1UF/6.3V
1 2
C1121 0.1UF/6.3V
1 2
C1122 0.1UF/6.3V
1 2
C1123 0.1UF/6.3V
1 2
C1124 0.1UF/6.3V
1 2
C1125 0.1UF/6.3V
1 2
C1126 0.1UF/6.3V
1 2
C1127 0.1UF/6.3V
1 2
C1128 0.1UF/6.3V
T1100
T1101
T1102
T1103
1 2
1 2
C1133 0.1UF/6.3V
1 2
C1134 0.1UF/6.3V
1 2
1 2
5
12
1
1
1
1
12
12
12
12
R1114
3.3KOhm
4
CLK_REQ0_TBT#
DDI1_TXP0_TBT_C
DDI1_TXN0_TBT_C
DDI1_TXP1_TBT_C
DDI1_TXN1_TBT_C
DDI1_TXP2_TBT_C
DDI1_TXN2_TBT_C
DDI1_TXP3_TBT_C
DDI1_TXN3_TBT_C
DDI1_AUXP_TBT_C
DDI1_AUXN_TBT_C
TBT_SNK0_DDC_CLK
TBT_SNK0_DDC_DATA
DDI2_TXP0_TBT_C
DDI2_TXN0_TBT_C
DDI2_TXP1_TBT_C
DDI2_TXN1_TBT_C
DDI2_TXP2_TBT_C
DDI2_TXN2_TBT_C
DDI2_TXP3_TBT_C
DDI2_TXN3_TBT_C
DDI2_AUXP_TBT_C
DDI2_AUXN_TBT_C
TBT_SNK1_DDC_CLK
TBT_SNK1_DDC_DATA
DPSINK_RBIAS
TBT_TDI
TBT_TMS
TBT_TCK
TBT_TDO
TBT_RBIAS
TBT_RSENSE
TBTA_TX1_P
TBTA_TX1_N
TBTA_TX0_P
TBTA_TX0_N
TBTA_AUX_P
TBTA_AUX_N
PA_USB2_RBIAS
4
U1100A
Y23
PCIE_RX0_P
Y22
PCIE_RX0_N
T23
PCIE_RX1_P
T22
PCIE_RX1_N
M23
PCIE_RX2_P
M22
PCIE_RX2_N
H23
PCIE_RX3_P
H22
PCIE_RX3_N
V19
PCIE_REFCLK_100_IN_P
T19
PCIE_REFCLK_100_IN_N
AC5
PCIE_CLKREQ_N
AB7
DPSNK0_ML0_P
AC7
DPSNK0_ML0_N
AB9
DPSNK0_ML1_P
AC9
DPSNK0_ML1_N
AB11
DPSNK0_ML2_P
AC11
DPSNK0_ML2_N
AB13
DPSNK0_ML3_P
AC13
DPSNK0_ML3_N
Y11
DPSNK0_AUX_P
W11
DPSNK0_AUX_N
AA2
DPSNK0_HPD
Y5
DPSNK0_DDC_CLK
R4
DPSNK0_DDC_DATA
AB15
DPSNK1_ML0_P
AC15
DPSNK1_ML0_N
AB17
DPSNK1_ML1_P
AC17
DPSNK1_ML1_N
AB19
DPSNK1_ML2_P
AC19
DPSNK1_ML2_N
AB21
DPSNK1_ML3_P
AC21
DPSNK1_ML3_N
Y12
DPSNK1_AUX_P
W12
DPSNK1_AUX_N
Y6
DPSNK1_HPD
Y8
DPSNK1_DDC_CLK
N4
DPSNK1_DDC_DATA
Y18
DPSNK_RBIAS
Y4
TDI
V4
TMS
T4
TCK
W4
TDO
H6
RBIAS
J6
RSENSE
A15
PA_RX1_P
B15
PA_RX1_N
A17
PA_TX1_P
B17
PA_TX1_N
A19
PA_TX0_P
B19
PA_TX0_N
B21
PA_RX0_P
A21
PA_RX0_N
Y15
PA_DPSRC_AUX_P
W15
PA_DPSRC_AUX_N
E20
PA_USB2_D_P
D20
PA_USB2_D_N
A5
PA_LSTX
A4
PA_LSRX
M4
PA_DPSRC_HPD
H19
PA_USB2_RBIAS
AC23
THERMDA_2
AB23
THERMDA_1
V18
PCIE_ATEST
AC1
TEST_EDM
L15
FUSE_VQPS_64
N15
FUSE_VQPS_128
C23
MONDC_ CIO_0
C22
NC_C22
DSL6340
02V000000021
Port A
POC
PCIe GEN3
SINK PORT 0
SOURCE PORT 0
LC GPIOPOC GPIO
SINK PORT 1
Misc
MISC
TBT PORTS
DEBUG
3
V23
PCIE_TX0_P
V22
PCIE_TX0_N
P23
PCIE_TX1_P
P22
PCIE_TX1_N
K23
PCIE_TX2_P
K22
PCIE_TX2_N
F23
PCIE_TX3_P
F22
PCIE_TX3_N
L4
PERST_N
N16
PCIE_RBIAS
R2
DPSRC_ML0_P
R1
DPSRC_ML0_N
N2
DPSRC_ML1_P
N1
DPSRC_ML1_N
L2
DPSRC_ML2_P
L1
DPSRC_ML2_N
J2
DPSRC_ML3_P
J1
DPSRC_ML3_N
W19
DPSRC_AUX_P
Y19
DPSRC_AUX_N
G1
DPSRC_HPD
N6
DPSRC_RBIAS
U1
GPIO_0
U2
GPIO_1
V1
GPIO_2
V2
GPIO_3
W1
GPIO_4
W2
GPIO_5
Y1
GPIO_6
Y2
GPIO_7
AA1
GPIO_8
J4
POC_GPIO_0
E2
POC_GPIO_1
D4
POC_GPIO_2
H4
POC_GPIO_3
F2
POC_GPIO_4
D2
POC_GPIO_5
F1
POC_GPIO_6
E1
TEST_EN
RESET_N
XTAL_25_IN
XTAL_25_OUT
EE_DI
EE_DO
EE_CS_N
EE_CLK
NC_B7
NC_A7
NC_A9
NC_B9
NC_A11
NC_B11
NC_A13
NC_B13
NC_Y16
NC_W16
NC_E19
NC_D19
NC_B4
NC_B5
NC_G2
NC_F19
MONDC_ SVR
ATEST_P
ATEST_N
USB2_ATEST
AB5
F4
D22
D23
AB3
AC4
AC3
AB4
B7
A7
A9
B9
A11
B11
A13
B13
Y16
W16
E19
D19
B4
B5
G2
F19
D6
A23
B23
E18
W13
W18
AB2
TEST_PWR_GOOD
MONDC_ DPSNK_ 0
MONDC_ DPSNK_ 1
MONDC_ DPSRC
DEBUG PINs:
PIN | TERMINATION
------------------------------ÂMONDC_SVR | GND
MONDC_DPSNK_0 | GND
MONDC_DPSNK_1 | GND
MONDC_DPSRC | GND
MONDC_CIO_0 | GND
TEST_EDM | GND
FUSE_VQPS_64 | GND
FUSE_VQPS_128 | GND
ATEST_P/N | FLOATING
USB2_ATEST | FLOATING
PCIE_ATEST | FLOATING
3
PCIE_RXP1_TBT_C
PCIE_RXN1_TBT_C
PCIE_RXP2_TBT_C
PCIE_RXN2_TBT_C
PCIE_RXP3_TBT_C
PCIE_RXN3_TBT_C
PCIE_RXP4_TBT_C
PCIE_RXN4_TBT_C
PCIE_RBIAS
12
C1199 1PF/25V
vx_c0201
12
C1198 1PF/25V
vx_c0201
12
C1197 1PF/25V
vx_c0201
12
C1196 1PF/25V
vx_c0201
DPSRC_RBIAS
TBT_EE_WP_N
TBT_TMU_CLK_OUT
TBT_PCIE_WAKE_N
TBT_CIO_PLUG_EVENT_N
TBT_SRC_CFG1
TBTB_I2C_INT
RTD3_USB_PWR_EN
TBT_FORCE_PWR
TBT_BATLOW_N
TBT_SLP_S3_N
RTD3_CIO_PWR_EN
TBT_TEST_EN
TBT_TEST_PWG
TBT_XTAL_25_IN
TBT_XTAL_25_OUT
NC_B4
NC_B5
NC_G2
NC_F19
2
12
C1101 0.22UF/10V
12
C1102 0.22UF/10V
12
C1103 0.22UF/10V
12
C1104 0.22UF/10V
12
C1105 0.22UF/10V
12
C1106 0.22UF/10V
12
C1107 0.22UF/10V
12
C1108 0.22UF/10V
1 2
R1198 0Ohm
1 2
R1100 3.01KOHM1%
1
T1104
1
T1105
1 2
R1101 14KOHM1%
1 2
R1147 0Ohm
1 2
R1146 0Ohm
1 2
R1145 0Ohm
1 2
R1144 0Ohm
1 2
R1105 100Ohm
1 2
R1106 100Ohm
1 2
R1197 0Ohm
TBT_XTAL_25_OUT_R
1 2
SP1100
R1110 499Ohm 1%
NB_R0402_5MIL_SMALL
TBT_EE_DI 13
TBT_EE_DO 13
TBT_EE_CS_N 13
TBT_EE_CLK 13
TBT_SNK1_DDC_CLK
TBT_SNK1_DDC_DATA
1 2
CLK_REQ0_TBT#
RTD3_CIO_PWR_EN
RTD3_USB_PWR_EN
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW:
GPIO | TERMINATION | Power Rail
---------------------------------------------------ÂGPIO_0 | 10K PU | VCC3V3_LC
GPIO_1 | 10K PU | VCC3V3_LC
GPIO_2 | 100K PD |
GPIO_3 | 100k PD |
GPIO_4 | 10K PU | VCC3V3_LC
GPIO_5 | 10K PU | VCC3V3_LC
GPIO_6 | 100K PD |
GPIO_7 | 100K PD |
GPIO_8 | 100K PD |
POC_GPIO_0 | 10K PU | VCC3V3_TBT_SX
POC_GPIO_1 | 10K PU | VCC3V3_TBT_SX
POC_GPIO_2 | 100K PD |
POC_GPIO_3 | 100K PD |
POC_GPIO_4 | 10K PU | VCC3V3_TBT_SX
POC_GPIO_5 | 10K PU | VCC3V3_TBT_SX
POC_GPIO_6 | 100K PD |
TBT_PCIE_WAKE#_R
07V080000049
1 3
12
C1151
10PF/50V
5%
2
PCIE_RXP1_TBT 23
PCIE_RXN1_TBT 23
PCIE_RXP2_TBT 23
PCIE_RXN2_TBT 23
PCIE_RXP3_TBT 23
PCIE_RXN3_TBT 23
PCIE_RXP4_TBT 23
PCIE_RXN4_TBT 23
PLT_RST#_BUF 25,30,32,51 ,53,62
HDMI_TXP2 48
HDMI_TXN2 48
HDMI_TXP1 48
HDMI_TXN1 48
HDMI_TXP0 48
HDMI_TXN0 48
HDMI_CLKP 48
HDMI_CLKN 48
HPD_HDMI_TBT 48
TBT_I2C_SDA 13
TBT_I2C_SCL 13
HDMI_SDA_TBT 48
HDMI_SCL_TBT 48
TBTA_I2C_INT 13
PM_SUSB# 25,30,68
TBT_RESET_N 13
X1100
2
4
12
25Mhz
C1150
10PF/50V
5%
1 2
R1188 100KOhm@
1 2
R1187 100KOhm@
PULL-UP - HDMI MODE
1 2
R1184 100KOhm
1 2
R1186 10KOhm
@
1 2
R1185 10KOhm
@
+3V3_FLASH
+3VSUS_SX
+3VSUS_LC
CPU PCIE RX
+3VS_TBT
VCC0V9_DP
VCC0V9_PCIE
VCC0V9_USB
VCC0V9_CIO
HDMI Conn
+3VSUS_SX
1
1
Q1101
G
2N7002
2
S
1 2
R1195 0Ohm@
1 2
R1199 0Ohm@
TBT_CIO_PLUG_EVENT# 20
TBT_FORCE_PWR_PCH 21
TBT_PCIE_WAKE_N, TBT_CIO_PLUG_EVENT_N,
TBT_FORCE_PWR should connect to PCH.
TBT_CIO_PLUG_EVENT_N should use GPI with SCI .
DDI2_AUXN_TBT_C
DDI1_AUXN_TBT_C
DDI2_AUXP_TBT_C
DDI1_AUXP_TBT_C
TBT_TDI
TBT_TMS
TBT_TCK
TBT_TDO
TBT_SNK0_DDC_CLK
TBT_SNK0_DDC_DATA
TBT_SNK1_DDC_CLK
TBT_SNK1_DDC_DATA
TBT_FORCE_PWR
TBT_SRC_CFG1
TBT_I2C_SCL
TBT_I2C_SDA
TBT_PCIE_WAKE_N
+3VSUS_SX
TBT_CIO_PLUG_EVENT_N
TBT_SLP_S3_N
TBT_BATLOW_N
TBTA_I2C_INT
TBTB_I2C_INT
TBT_TMU_CLK_OUT
TBT_FORCE_PWR
+3VS_TBT
RTD3_CIO_PWR_EN
RTD3_USB_PWR_EN
DDI1_HPD_TBT
DDI2_HPD_TBT
TBTA_LSTX
TBTA_HPD
TBTA_LSRX
NC_B4
NC_B5
NC_G2
TBT_SRC_CFG1
HPD_HDMI_TBT
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
3
32
D
D1101
12
RB751V-40
R1194 100KOhm
R1190 100KOhm
R1193 100KOhm
R1189 100KOhm
R1140 10KOhm
R1141 10KOhm
R1142 10KOhm
R1143 10KOhm
R1116 2.2KOhm
R1117 2.2KOhm
R1118 2.2KOhm
R1119 2.2KOhm
R1196 100KOhm
R1102 10KOhm
R1120 2.2KOhm
R1121 2.2KOhm
R1122 10KOhm
R1123 10KOhm
R1124 10KOhm@
R1125 10KOhm
R1126 10KOhm
R1127 10KOhm
R1128 100KOhm
R1129 100KOhm
R1130 100KOhm
R1131 100KOhm
R1132 100KOhm
R1133 100KOhm
R1134 1MOhm
R1135 100KOhm
R1136 1MOhm
R1137 100KOhm
R1138 100KOhm
R1139 100KOhm
R1108 1MOhm@
R1109 1MOhm@
P3HCJ
P3HCJ
P3HCJ
1
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
Engineer:
Engineer:
Engineer:
1
+3V3_FLASH 13
+3VSUS_SX 12
+3VSUS_LC 12
+3VS_TBT 12
VCC0V9_DP 12
VCC0V9_PCIE 12
VCC0V9_USB 12
VCC0V9_CIO 12
WAKE_PCIE# 25,53
TBT_PCIE_WAKE# 20
@
Title :
Title :
Title :
Alpine Ridge_TBT
Alpine Ridge_TBT
Alpine Ridge_TBT
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
+3VS_TBT
+3VSUS_LC
+3VS_TBT
+3VSUS_SX
11 100Thursday, September 03, 2015
11 100Thursday, September 03, 2015
11 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
+3VSUS
R1202 0Ohm
+3VSUS +3VSUS_SX
R1201 0Ohm
vx_r0805_0ohm_h24_small
D D
VCC0V9_DP
12
C1230
1UF/6.3V
VCC0V9_USB
C C
B B
A A
12
C1236
1UF/6.3V
R1.1 +3VS_TBT reserve +3Vsus for B0 version
+3VS +3VS_TBT
R1203 0Ohm
vx_r0805_0ohm_h24_small
12
12
C1228
C1229
1UF/6.3V
1UF/6.3V
12
VCC0V9_CIO
C1235
1UF/6.3V
12
@
vx_r0402_0ohm_small
1 2
1 2
@
12
C1227
1UF/6.3V
VCC0V9_PCIE
12
C1234
1UF/6.3V
12
C1237
C1239
1UF/6.3V
1UF/6.3V
12
12
12
C1226
1UF/6.3V
C1232
1UF/6.3V
12
C1238
1UF/6.3V
12
0.03A
1.24A
1.05A
12
12
C1240
1UF/6.3V
C1225
1UF/6.3V
C1233
1UF/6.3V
12
0.19A
R1204
0Ohm
vx_r0805_0ohm_h24_small
1 2
1.05A
12
C1224
1UF/6.3V
12
C1231
1UF/6.3V
VCC3V3_ANA_PCIE
VCC3V3_ANA_USB2
C1241
1UF/6.3V
+3VSUS_LC
0.7A
0.58A
0.22A
0.28A
0.1A
0.1A
4
+3VS_S0
12
F8
VCC3P3_SX
GND VCC
VSS_ANA_61
VSS_ANA_79
R20
R22
R23
C1245
1UF/6.3V
R13
H9
VCC3P3_SVR_1
VCC3P3_SVR_2
VCC3P3_SVR_3
VCC3P3A
VCC3P3_S0
VCC0P9_SVR_1
VCC0P9_SVR_2
VCC0P9_SVR_ANA_1
VCC0P9_SVR_ANA_2
VCC0P9_SVR_ANA_3
VCC0P9_SVR_ANA_4
VCC0P9_SVR_ANA_5
VCC0P9_SVR_ANA_6
VCC0P9_SVR_SENSE
VCC0P9_LVR_2
VCC0P9_LVR_3
VCC0P9_LVR_1
VCC0P9_LVR_SENSE
VSS_ANA_91
VSS_ANA_92
VSS_ANA_93
VSS_ANA_94
VSS_ANA_88
VSS_ANA_89
VSS_ANA_90
VSS_ANA_110
VSS_ANA_111
VSS_ANA_112
VSS_ANA_113
VSS_ANA_107
VSS_ANA_108
VSS_ANA_109
VSS_ANA_116
VSS_ANA_114
VSS_ANA_115
VSS_ANA_10
VSS_ANA_11
VSS_ANA_32
VSS_ANA_33
VSS_ANA_12
VSS_ANA_13
VSS_ANA_14
VSS_ANA_15
VSS_ANA_16
VSS_ANA_17
VSS_ANA_18
VSS_ANA_41
VSS_ANA_42
VSS_ANA_34
VSS_ANA_35
VSS_ANA_36
VSS_ANA_37
VSS_ANA_38
VSS_ANA_39
VSS_ANA_40
VSS_ANA_80
VSS_ANA_82T1VSS_ANA_83T2VSS_ANA_85T5VSS_ANA_84
VSS_ANA_86
T20
U23
U22
SVR_IND_1
SVR_IND_2
SVR_IND_3
SVR_VSS_1
SVR_VSS_2
SVR_VSS_3
VSS_16
VSS_17
VSS_18
VSS_19
VSS_27
VSS_28
VSS_29
VSS_14
VSS_15
VSS_11
VSS_12
VSS_13
VSS_24
VSS_25
VSS_26
VSS_20
VSS_21
VSS_22
VSS_23
VSS_10
VSS_ANA_87
+3VSUS_LC +3VSUS_SX
12
C1243
0.1UF/16V
U1100B
L8
VCC0P9_DP_3
L11
VCC0P9_DP_1
L12
VCC0P9_DP_2
M8
VCC0P9_DP_4
T11
VCC0P9_DP_5
T12
VCC0P9_DP_6
L6
VCC0P9_ANA_DPSRC_1
M6
VCC0P9_ANA_DPSRC_2
V11
VCC0P9_ANA_DPSNK_1
V12
VCC0P9_ANA_DPSNK_2
V13
VCC0P9_ANA_DPSNK_3
M13
VCC0P9_PCIE_1
M15
VCC0P9_PCIE_2
M16
VCC0P9_PCIE_3
L19
VCC0P9_ANA_PCIE_1_1
N19
VCC0P9_ANA_PCIE_1_2
L18
VCC0P9_ANA_PCIE_2_1
M18
VCC0P9_ANA_PCIE_2_2
N18
VCC0P9_ANA_PCIE_2_3
R15
VCC0P9_USB_1
R16
VCC0P9_USB_2
R8
VCC0P9_CIO_3
R9
VCC0P9_CIO_4
R11
VCC0P9_CIO_1
R12
VCC0P9_CIO_2
L16
VCC3P3_ANA_PCIE
J16
VCC3P3_ANA_USB2
A6
VSS_ANA_8
A8
VSS_ANA_9
A10
VSS_ANA_1
A12
VSS_ANA_2
A14
VSS_ANA_3
A16
VSS_ANA_4
A18
VSS_ANA_5
A20
VSS_ANA_6
A22
VSS_ANA_7
B6
VSS_ANA_62
B8
VSS_ANA_63
B10
VSS_ANA_43
B12
VSS_ANA_44
B14
VSS_ANA_45
B16
VSS_ANA_46
B18
VSS_ANA_47
B20
SVR_VSS_4
B22
VSS_ANA_48
D8
VSS_ANA_70
D9
VSS_ANA_71
D11
VSS_ANA_64
D12
VSS_ANA_65
D13
VSS_ANA_66
D15
VSS_ANA_67
D16
VSS_ANA_68
D18
VSS_ANA_69
E8
VSS_ANA_77
E9
VSS_ANA_78
E11
VSS_ANA_72
E15
VSS_ANA_73
E16
VSS_ANA_74
E22
VSS_ANA_75
E23
VSS_ANA_76
F9
VSS_ANA_97
F16
VSS_ANA_95
F20
VSS_ANA_96
G22
VSS_ANA_98
G23
VSS_ANA_99
H1
VSS_ANA_100
H2
VSS_ANA_105
H12
VSS_ANA_101
H13
VSS_ANA_102
H15
VSS_ANA_103
H16
VSS_ANA_104
H20
VSS_ANA_106
J5
VSS_ANA_24
J18
VSS_ANA_19
J19
VSS_ANA_20
J20
VSS_ANA_21
J22
VSS_ANA_22
J23
VSS_ANA_23
K1
VSS_ANA_25
K2
VSS_ANA_26
L5
VSS_ANA_30
L20
VSS_ANA_27
L22
VSS_ANA_28
L23
VSS_ANA_29
M1
VSS_ANA_31
M2
VSS_ANA_50
M5
VSS_ANA_52
M19
VSS_ANA_49
M20
VSS_ANA_51
N5
VSS_ANA_56
N20
VSS_ANA_53
N22
VSS_ANA_54
N23
VSS_ANA_55
DSL6340
02V000000021
12
R6
C1242
1UF/6.3V
VCC3P3_LC
VSS_ANA_57P1VSS_ANA_58P2VSS_ANA_81R5VSS_ANA_59
VSS_ANA_60
R18
R19
12
C1221
47uF/6.3V
0603 cap 0603 cap
12
C1244
1UF/6.3V
A2
A3
B3
L9
M9
E12
E13
F11
F12
F13
F15
J9
C1
C2
D1
A1
B1
B2
F18
H18
J11
H11
V5
V6
V8
V9
V15
V16
V20
W5
W6
W8
W9
W20
W22
W23
Y9
Y13
Y20
AA22
AA23
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC6
AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
D5
E4
E5
E6
F5
F6
H5
H8
VSS_2
J8
VSS_6
J12
VSS_3
J13
VSS_4
J15
VSS_5
L13
VSS_7
M11
VSS_8
M12
VSS_9
N8
N9
N11
N12
N13
T6
T8
T9
T13
T15
T16
T18
AB1
VSS_1
AC2
3
TBT_SVR_IND
12
C1222
47uF/6.3V
12
C1256
1UF/6.3V
1.83A
Intel Review
L ( LQM18PN1R0MFHD):
RDC < 0.2Ohm
IDC > 0.2A <0.2ohm >200mA
L1201
21
1UH Irat=400mA
12
12
C1254
C1255
1UF/6.3V
1UF/6.3V
L1200
0.6uH
COILCRAFT/XFL4012-601MEC
0.06A
12
C1261
10UF/6.3V
2
+3VS
12
C1266
47UF/6.3V
+3VSUS
+3VSUS_SX
+3VSUS_LC
+3VS_S0
+3VS_TBT
VCC0V9_DP
VCC0V9_PCIE
VCC0V9_USB
VCC0V9_CIO
VCC0V9_SVR
+3VS_TBT
12
12
12
C1252
1UF/6.3V
12
C1263
1UF/6.3V
C1248
10UF/6.3V
12
C1265
47UF/6.3V
12
12
C1250
1UF/6.3V
C1249
10UF/6.3V
C1246
C1247
10UF/6.3V
10UF/6.3V
1.83A
12
C1253
1UF/6.3V
1.83A
21
12
C1262
10UF/6.3V
12
12
C1251
1UF/6.3V
12
C1223
1UF/6.3V
12
C1264
47UF/6.3V
VCC0V9_LVR_OUT
+3VS 3,4,20,21,22,23,24,28,30,31,32,36,44,45,48,50,51,53,57,58,62,64,91,92
+3VSUS 4,13,21,24,25,26,28,30,31,53,62,64,68,81,84,92
+3VSUS_SX 11
+3VSUS_LC 11
+3VS_S0
+3VS_TBT 11
VCC0V9_DP
VCC0V9_PCIE
VCC0V9_USB
VCC0V9_CIO
Share Same GND plane
with SVR_VSS of AR
1
5
4
3
Title :
Title :
Title :
Alpine Ridge_PWR
Alpine Ridge_PWR
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
P3HCJ
P3HCJ
1
Engineer:
Engineer:
Engineer:
Alpine Ridge_PWR
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
12 100Thursday, September 03, 2015
12 100Thursday, September 03, 2015
12 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
+3VSUS
25mil
25mil
CC_PWR_ON30
D D
1 2
R1308 0Ohm@
1 2
1 2
2 3
R1339
10KOhm
R1340
10KOhm
S
2
1
1
G
D
3
Q1303
G
1
SI2305CDS-T1-GE3
1
32
3
D
Q1304
S
2
2N7002
25mil
12
C1300
10UF/6.3V
4
12
C1301
1UF/6.3V
12
C1322
22UF/6.3V
3
12
C1323
22UF/6.3V
12
C1324
22UF/6.3V
12
C1325
22UF/6.3V
12
C1307
0.1UF/16V
+3VSUS_TYPEC+3VSUS
+5VSUS +5VSUS_VBUS
1 2
R1309 0Ohm
vx_r1206_h28
12
C1306
47UF/6.3V
2
+5VSUS
+3VSUS
+VBUS_CONN
+USB_PD_IN
+3V3_FLASH
+3VSUS_SX
+3VSUS_LC
+3VS_S0
+5VSUS 52,64,81,84
+3VSUS 4,12,21,24,25,26,28,30,31,53,62,64,68,81,84,92
+VBUS_CONN 14
+USB_PD_IN 89
+3V3_FLASH 11
+3VSUS_SX 11,12
+3VSUS_LC 11,12
+3VS_S0 12
1
+USB_PD_IN +VBUS_CONN
12
12
C1308
4.7uF/25V
+5VSUS_VBUS
+3VSUS_TYPEC
C1309
0.1UF/25V
+3V3_FLASH
0.5A
C C
+3V3_FLASH
1 2
R1324 10KOhm
1 2
R1325 10KOhm
1 2
R1341 10KOhm@
1 2
R1342 10KOhm@
I2C Address Resistance
TPS65982
Device
Master 0
Slave 1
Slave 2
Slave 3
Slave 4
Slave 5
Slave 6
Slave 7
B B
A A
PLT_RST#_BUF25,30,32,51,53,62
TBTA_MRESET_EC30
External
Resistance (1%)
0
93.1k
156k
220k
280k
340k
402k
Open
C1303
10UF/6.3V
1 2
DEBUG_CTL1
DEBUG_CTL2
DEBUG_CTL1
DEBUG_CTL2
I2C Unique
Address [3:1]
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x0F
U1302
1
NC
2
A
3 4
GND
SN74AUP1G04DCKR
06V030000022
1 2
R1338 0OhmN/A
TBT_I2C_SCL11
TBT_I2C_SDA11
TBTA_I2C_INT11
TBT_EE_CLK11
TBT_EE_DI11
TBT_EE_DO11
TBT_EE_CS_N11
TBTA_LSTX11
TBTA_LSRX11
TBTA_USB2_D_P11
TBTA_USB2_D_N11
TBTA_DPSRC_AUX_P11
TBTA_DPSRC_AUX_N11
+3VSUS_TYPEC
@
5
VCC
Y
JP1301
2.5A
112
2mm_open_5mil_m1m2
C1302 1UF/6.3V
1 2
C1305 2.2UF/16V
1 2
C1304 2.2UF/16V
+3V3_FLASH
+LDO_1V8D_TBT
12
C1326
0.1UF/16V
@
+PD_VBUS
2
3.3A
+VCC_3V3_TBTA_SX
12
+3V3_FLASH
+LDO_1V8D_TBT
+LDO_1V8A_TBT
R1307 0Ohm
ACE_I2C_SCL
ACE_I2C_SDA
ACE_I2C_IRQ
DEBUG_CTL1
DEBUG_CTL2
SWD_DATA
1
T1303
SWD_CLK
1
T1304
1 2
R1318 100KOhm
TBTA_ACE_GPIO0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
TBTA_DPSRC_AUX_P
TBTA_DPSRC_AUX_N
+3V3_FLASH
R1334 0Ohm@
R1323 1KOhm
R1335 0Ohm@
16mil25mil
16mil
12
2.5A
5
4
4.5~22V
(OD)
(OD)
(OD)
1 2
1 2
1 2
TBT_RESET_N11
TBTA_HPD11
A8
A7
A6
B7
A11
B11
C11
D11
H10
B1
H1
H2
G1
A2
K1
F1
D2
D1
C1
B5
A5
B6
E4
D5
A3
B4
A4
B3
F4
G4
E2
F2
L4
K4
B2
C2
L5
K5
L2
K2
L3
K3
J1
J2
U1301
PP_HV_3
PP_HV_2
PP_HV_1
PP_HV_4
PP_5V0_1
PP_5V0_2
PP_5V0_3
PP_5V0_4
PP_CABLE
VDDIO
VIN_3V3
VOUT_3V3
LDO_3V3
LDO_1V8D
LDO_1V8A
I2C_ADDR
I2C_SCL1
I2C_SDA1
I2C_IRQ1Z
I2C_SCL2
I2C_SDA2
I2C_IRQ2Z
DEBUG_CTL1
DEBUG_CTL2
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_SSZ
SWD_DATA
SWD_CLK
UART_TX
UART_RX
LSX_R2P
LSX_P2R
GPIO0
GPIO1
USB_RP_P
USB_RP_N
DEBUG1
DEBUG2
DEBUG3
DEBUG4
AUX_P
AUX_N
TPS65982
B10
SENSEP
A10
SENSEN
HV_GATE1
HV_GATE2
VBUS_1
VBUS_2
VBUS_3
VBUS_4
RPD_G1
C_CC1
C_CC2
RPD_G2
LDO_BMC
C_USB_TN
C_USB_TP
C_USB_BP
C_USB_BN
C_SBU2
C_SBU1
GND_1
GND_2
GND_4
GND_3
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
BUSPOWERZ
GPIO2
RESETZ
MRESET
GPIO8H6GPIO7D7GPIO6
GPIO5
GPIO4
GPIO3
R_OSC
F10
F11
E11
D10
TBTA_ACE_GPIO2
TBTA_ACE_GPIO7
1
TBTA_MRESET
T1301
G2
E10
C10
G10
G11
R1310
15KOhm
0.1%
1 2
TBTA_ACE_GPIO3
TBTA_ACE_GPIO6
1
T1302
SMB1_CLK28,30,50, 60
SMB1_DAT28,30,50,60
ACE_I2C_IRQ_EC30
3
B9
A9
H11
J10
J11
K11
K9
L9
L10
K10
E1
L6
K6
K7
L7
L8
K8
A1
B8
D8
D6
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H7
H8
L1
L11
4.5~22V
RPD_G1
R1300 0Ohm
C_CC1
R1313 0Ohm
C_CC2
R1301 0Ohm
RPD_G2
R1302 0Ohm
C_USB_TN_R
C_USB_TP_R
C_USB_BP_R
C_USB_BN_R
SBU2_R
SBU1_R
1 2
R1320 NB_R0402_5MIL_SMALL
1 2
R1319 NB_R0402_5MIL_SMALL
1 2
R1322 NB_R0402_5MIL_SMALL
1 2
R1321 NB_R0402_5MIL_SMALL
1 2
R1312 NB_R0402_5MIL_SMALL
1 2
R1311 NB_R0402_5MIL_SMALL
12
C1313
0.22UF/10V
Q1301A
UM6K1N
Q1301B
UM6K1N
Q1302A
UM6K1N
3A
12
C1311
0.1UF/25V
+3VSUS_TYPEC
2
6 1
+3VSUS_TYPEC
5
3 4
+3VSUS_TYPEC
2
6 1
12
12
C1310
C1312
4.7uF/25V
1UF/25V
12
12
12
12
12
12
C1320
C1321
220PF/50V
220PF/50V
Configured as Digital Cross-bar I/O or Unused
Configured as Digital Cross-bar I/O or Unused
Output power enable. Turns on VOUT_3V3.
Output power enable. Turns on VOUT_3V3.
Configured as HPD RX or HPD TX when DP Mode supported.
Configured as HPD RX or Unused when DP Mode supported.
5V Supply Enable (Driven High or High-Z, never Low)
System WAKE# Signal (Open Drain, wire-ORed to all Aces)
Power Output FAULT# Inidcator Signal (Open Drain). Indicates
a fault has occurred in supervisory circuits (OV, OVP, UVP, TSD).
ACE_I2C_SCL
ACE_I2C_SDA
ACE_I2C_IRQ
C_USB_TN 14
C_USB_TP 14
C_USB_BP 14
C_USB_BN 14
SBU2 14
SBU1 14
12
C1319
2.2UF/16V
UART_TX
UART serial transmit data. Connect pin to another TPS65982 UART_TX to share
firmware. Connect UART_RX to UART_TX when not connected to another TPS65982.
DEBUG1/2/3/4
Ground pin with between 1kΩ and 5MΩ resistance when unused.
GPIO Pin Mapping
Pin Type Function
GPIO0
I/O
GPIO1
I/O
GPIO2
In
GPIO3
In
GPIO4
I/O
GPIO5
Out
GPIO6
Out
GPIO7
Out(OD)
GPIO8
Out(OD)
5
Q1302B
UM6K1N
3 4
2
C_CC1_CON 14
C_CC2_CON 14
TBTA_DPSRC_AUX_N
TBTA_DPSRC_AUX_P
TBTA_ACE_GPIO0
TBTA_ACE_GPIO7
ACE_I2C_SCL
ACE_I2C_SDA
ACE_I2C_IRQ
DEBUG1
DEBUG2
DEBUG3
DEBUG4
TBTA_MRESET
TBTA_ACE_GPIO6
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
R1336 100KOhm
1 2
R1337 100KOhm
1 2
R1314 10KOhm
1 2
R1315 10KOhm
1 2
R1316 3.3KOhm
1 2
R1327 3.3KOhm
1 2
R1328 10KOhm
1 2
R1317 100KOhm
1 2
R1329 100KOhm
1 2
R1330 100KOhm
1 2
R1331 100KOhm
1 2
R1332 100KOhm
1 2
R1333 10KOhm
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
P3HCJ
P3HCJ
P3HCJ
1
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
+3V3_FLASH
+3VSUS_TYPEC
CC_Logic_TPS65982
CC_Logic_TPS65982
CC_Logic_TPS65982
Rev
Rev
Rev
2.0
2.0
2.0
13 100Thursday, September 03, 2015
13 100Thursday, September 03, 2015
13 100Thursday, September 03, 2015
5
Dr-Bios.com
4
3
2
1
A6 A12A7
+VBUS_CONN 13
D1410
1 2
PESD5V0S1BA
D1412
1 2
PESD5V0S1BA
D1414
1 2
PESD5V0S1BA
D1416
1 2
PESD5V0S1BA
D1418
1 2
PESD5V0S1BA
D1420
1 2
PESD5V0S1BA
D1422
1 2
PESD5V0S1BA
D1424
1 2
PESD5V0S1BA
Vbus
D1411
PESD5V0S1BA
D1413
PESD5V0S1BA
D1415
PESD5V0S1BA
D1417
PESD5V0S1BA
D1419
PESD5V0S1BA
D1421
PESD5V0S1BA
D1423
PESD5V0S1BA
D1425
PESD5V0S1BA
12
12
12
12
12
12
12
12
C_USB_BP_CON
C_USB_BN_CON
C_CC1_CON
C_CC2_CON
TBTA_HD2CA_1_P
TBTA_HD2CA_1_N
TBTA_CA2HD_1_P
TBTA_CA2HD_1_N
+VBUS_CONN
+VBUS_CONN +VBUS_TYPEC
D D
C C
12
C1401
0.1UF/25V
C_USB_TP13
C_USB_TN13
C_USB_BN13
C_USB_BP13
3A
21
L1401 33ohm
D1402
AZ4024-01F
07V180000052
1 2
RN1405A
RN1405B
RN1406A
RN1406B
1 2
0Ohm
1 4
3 4
0Ohm
1 2
0Ohm
1 4
3 4
0Ohm
2 3
2 3
CM1405
90OHM/100MHz
@
CM1406
90OHM/100MHz
@
C_USB_TP_CON
C_USB_TN_CON
C_USB_BN_CON
C_USB_BP_CON
A2 A3 A5A4 A8 A9 A11A10A1
TX1+ TX1- CC1 RX2+
GND Vbus D+ D- SBU1 RX2-Vbus GND
GND TX2+TX2-Vbus CC2D+D-SBU2RX1-RX1+ GND
B12 B11 B8 B7B9 B4 B2 B1B6
B10 B5 B3
C_USB_TP_CON
C_USB_TN_CON
SBU1
SBU2
TBTA_HD2CA_0_P
TBTA_HD2CA_0_N
TBTA_CA2HD_0_N
TBTA_CA2HD_0_P
B B
C1403
0.47uF/25V
1 2
TBTA_HD2CA_0_P11
TBTA_HD2CA_0_N11
C_CC1_CON13
A A
W/SS 8mils/8mils
C_CC1_CON
SBU113
TBTA_CA2HD_1_N11
TBTA_CA2HD_1_P11
+VBUS_TYPEC
+VBUS_TYPEC
C_USB_TP_CON
C_USB_TN_CON
SBU1
12
C1405
0.47uF/25V
A10
A11
A12
5
4
1
GND5
2
GND6
3
P_GND1
4
P_GND2
5
P_GND3
P_GND46P_GND5
A1
GND2
A2
SSTXp1
A3
SSTXn1
A4
VBUS1
A5
CC1
A6
Dp1
A7
Dn1
A8
RFU1
A9
SBU1
SSRXn2
SSRXp2
GND1
USB_24P_12HD_LOTE
CON1401
NP_NC2
NP_NC1
P_GND8
P_GND7
P_GND6
GND4
SSRXp1
SSRXn1
SBU2
RFU2
VBUS2
SSTXn2
SSTXp2
GND3
3
12
11
10
9
8
7
B12
B11
B10
B9
B8
B7
Dn2
B6
Dp2
B5
CC2
B4
B3
B2
B1
1 2
SBU2
C_USB_BN_CON
C_USB_BP_CON
C_CC2_CON
12
C1402
0.47uF/25V
+VBUS_TYPEC
+VBUS_TYPEC
C1404
0.47uF/25V
TBTA_CA2HD_0_P 11
TBTA_CA2HD_0_N 11
SBU2 13
W/SS 8mils/8mils
TBTA_HD2CA_1_N 11
TBTA_HD2CA_1_P 11
C_CC2_CON 13
Title :
Title :
Title :
USB Type_C
USB Type_C
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
P3HCJ
P3HCJ
1
Engineer:
Engineer:
Engineer:
USB Type_C
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
14 100Thursday, September 03, 2015
14 100Thursday, September 03, 2015
14 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
LPDDR3 Channel A
M_A_CAA[9:0]4 M_A_CAB[9:0]4
D D
C C
B B
M_A_DIM0_CLK04
M_A_DIM0_CLK#04
M_A_DIM0_CKE04
M_A_DIM0_CKE14
M_A_DIM0_CS#04,16
M_A_DIM0_CS#14,16
M_A_DQS14
B1
M_A_DQS#14
M_A_DQS04
B0
M_A_DQS#04
M_A_DQS34
B3
M_A_DQS#34
M_A_DQS24
B2
M_A_DQS#24
M_A_CAA0
M_A_CAA1
M_A_CAA2
M_A_CAA3
M_A_CAA4
M_A_CAA5
M_A_CAA6
M_A_CAA7
M_A_CAA8
M_A_CAA9
U1601
R2
CA0
P2
CA1
N2
CA2
N3
CA3
M3
B1
CA4
F3
CA5
E3
CA6
E2
CA7
D2
CA8
C2
CA9
J3
B0
CK_t
J2
CK_c
K3
CKE0
K4
CKE1
L3
B3
CS0_n
L4
CS1_n
L8
DM0
G8
DM1
P8
DM2
D8
DM3
B2
A1
GND GND
GND
DNU_1
A2
DNU_5
A12
DNU_7
A13
DNU_9
B1
DNU_2
B13
DNU_10
T1
DNU_3
T13
DNU_11
U1
DNU_4
U2
DNU_6
U12
DNU_8
U13
DNU_12
L10
DQS0_t
L11
DQS0_c
G10
DQS1_t
G11
DQS1_c
P10
DQS2_t
P11
DQS2_c
D10
DQS3_t
D11
DQS3_c
B2
VSS_1
B5
VSS_10
C5
VSS_11
E4
VSS_6
E5
VSS_12
F5
VSS_13
H2
VSS_2
J12
VSS_19
K2
VSS_3
L6
VSS_18
M5
VSS_14
N4
VSS_7
N5
VSS_15
R4
VSS_8
R5
VSS_16
T2
VSS_4
T3
VSS_5
T4
VSS_9
T5
VSS_17
C3
VSSCA_1
D3
VSSCA_2
F4
VSSCA_5
G3
VSSCA_3
G4
VSSCA_6
J4
VSSCA_7
M4
VSSCA_8
P3
VSSCA_4
B6
VSSQ_1
B12
VSSQ_14
C6
VSSQ_2
D12
VSSQ_15
E6
VSSQ_3
F6
VSSQ_4
F12
VSSQ_16
G6
VSSQ_5
G9
VSSQ_10
H10
VSSQ_12
K10
VSSQ_13
L9
VSSQ_11
M6
VSSQ_6
M12
VSSQ_17
N6
VSSQ_7
P12
VSSQ_18
R6
VSSQ_8
T6
VSSQ_9
T12
VSSQ_19
H9CCNNNBLTMLAR-NTM
03V150000040
VDD1_1
VDD1_3
VDD1_5
VDD1_7
VDD1_9
VDD1_2
VDD1_4
VDD1_6
VDD1_8
VDD1_10
VDD2_15
VDD2_17
VDD2_1
VDD2_3
VDD2_10
VDD2_4
VDD2_5
VDD2_11
VDD2_19
VDD2_6
VDD2_12
VDD2_7
VDD2_13
VDD2_20
VDD2_8
VDD2_2
VDD2_9
VDD2_14
VDD2_16
VDD2_18
VDDCA_1
VDDCA_2
VDDCA_5
VDDCA_3
VDDCA_4
VDDQ_8
VDDQ_12
VDDQ_1
VDDQ_13
VDDQ_14
VDDQ_2
VDDQ_5
VDDQ_9
VDDQ_6
VDDQ_7
VDDQ_3
VDDQ_10
VDDQ_15
VDDQ_4
VDDQ_16
VDDQ_17
VDDQ_11
Vref(CA)
Vref(DQ)
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
NC_2
NC_3
NC_1
M_A_D8
P9
DQ0
M_A_D11
N9
DQ1
M_A_D13
N10
DQ2
M_A_D12
N11
DQ3
M_A_D14
M8
DQ4
M_A_D15
M9
DQ5
M_A_D9
M10
DQ6
M_A_D10
M11
DQ7
M_A_D4
F11
DQ8
M_A_D1
F10
DQ9
M_A_D5
F9
M_A_D7
F8
M_A_D6
E11
M_A_D0
E10
M_A_D2
E9
M_A_D3
D9
M_A_D28
T8
M_A_D25
T9
M_A_D27
T10
M_A_D30
T11
M_A_D24
R8
M_A_D29
R9
M_A_D26
R10
M_A_D31
R11
M_A_D17
C11
M_A_D16
C10
M_A_D23
C9
M_A_D18
C8
M_A_D21
B11
M_A_D20
B10
M_A_D22
B9
M_A_D19
B8
A3
A4
A5
A6
A10
U3
U4
U5
U6
U10
A8
A9
D4
D5
D6
G5
H5
H6
H12
J5
J6
K5
K6
K12
L5
P4
P5
P6
U8
U9
F2
G2
H3
L2
M2
A11
C12
E8
E12
G12
H8
H9
H11
J9
J10
K8
K11
L12
N8
N12
R12
U11
H4
J11
J8
ODT
B3
ZQ0
B4
ZQ1
C4
K9
R3
+1.8V_DDR3 +1.8V_DDR3
+1.2V
+1.2V
+1.2V +1.2V
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM0
M_A_DIM0_ODT0 4,16 M_A_DIM0_ODT0 4,16
1 2
R1601 243Ohm1%
1 2
R1602 243Ohm1%
M_A_D[15:8] 4
M_A_D[7:0] 4
M_A_D[31:24] 4
M_A_D[23:16] 4
GND
4
M_A_CAB0
R2
M_A_CAB1
P2
M_A_CAB2
N2
M_A_CAB3
N3
M_A_CAB4
M3
M_A_CAB5
F3
M_A_CAB6
E3
M_A_CAB7
E2
M_A_CAB8
D2
M_A_CAB9
C2
M_A_DIM0_CLK14
M_A_DIM0_CLK#14
M_A_DIM0_CKE24
M_A_DIM0_CKE34
M_A_DIM0_CS#04,16
M_A_DIM0_CS#14,16
M_A_DQS44
B4
M_A_DQS#44
M_A_DQS54
B5
M_A_DQS#54
M_A_DQS64
B6
M_A_DQS#64
M_A_DQS74
B7
M_A_DQS#74
J3
J2
K3
K4
L3
L4
L8
G8
P8
D8
A1
A2
A12
A13
B1
B13
T1
T13
U1
U2
U12
U13
L10
L11
G10
G11
P10
P11
D10
D11
B2
B5
C5
E4
E5
F5
H2
J12
K2
L6
M5
N4
N5
R4
R5
T2
T3
T4
T5
C3
D3
F4
G3
G4
J4
M4
P3
B6
B12
C6
D12
E6
F6
F12
G6
G9
H10
K10
L9
M6
M12
N6
P12
R6
T6
T12
GND
3
U1602
CA0
CA1
CA2
CA3
B4
CA4
CA5
CA6
CA7
CA8
CA9
B5
CK_t
CK_c
CKE0
CKE1
B6
CS0_n
CS1_n
DM0
DM1
DM2
DM3
B7
DNU_1
DNU_5
DNU_7
DNU_9
DNU_2
DNU_10
DNU_3
DNU_11
DNU_4
DNU_6
DNU_8
DNU_12
DQS0_t
DQS0_c
DQS1_t
DQS1_c
DQS2_t
DQS2_c
DQS3_t
DQS3_c
VSS_1
VSS_10
VSS_11
VSS_6
VSS_12
VSS_13
VSS_2
VSS_19
VSS_3
VSS_18
VSS_14
VSS_7
VSS_15
VSS_8
VSS_16
VSS_4
VSS_5
VSS_9
VSS_17
VSSCA_1
VSSCA_2
VSSCA_5
VSSCA_3
VSSCA_6
VSSCA_7
VSSCA_8
VSSCA_4
VSSQ_1
VSSQ_14
VSSQ_2
VSSQ_15
VSSQ_3
VSSQ_4
VSSQ_16
VSSQ_5
VSSQ_10
VSSQ_12
VSSQ_13
VSSQ_11
VSSQ_6
VSSQ_17
VSSQ_7
VSSQ_18
VSSQ_8
VSSQ_9
VSSQ_19
H9CCNNNBLTMLAR-NTM
03V150000040
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
VDD1_1
VDD1_3
VDD1_5
VDD1_7
VDD1_9
VDD1_2
VDD1_4
VDD1_6
VDD1_8
VDD1_10
VDD2_15
VDD2_17
VDD2_1
VDD2_3
VDD2_10
VDD2_4
VDD2_5
VDD2_11
VDD2_19
VDD2_6
VDD2_12
VDD2_7
VDD2_13
VDD2_20
VDD2_8
VDD2_2
VDD2_9
VDD2_14
VDD2_16
VDD2_18
VDDCA_1
VDDCA_2
VDDCA_5
VDDCA_3
VDDCA_4
VDDQ_8
VDDQ_12
VDDQ_1
VDDQ_13
VDDQ_14
VDDQ_2
VDDQ_5
VDDQ_9
VDDQ_6
VDDQ_7
VDDQ_3
VDDQ_10
VDDQ_15
VDDQ_4
VDDQ_16
VDDQ_17
VDDQ_11
Vref(CA)
Vref(DQ)
NC_2
NC_3
NC_1
2
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM0
12
C1629
1UF/6.3V
12
C1637
0.1UF/16V
12
C1647
1UF/6.3V
+1.8V_DDR3
M_A_CAA0
M_A_CAA1
M_A_CAA2
M_A_CAA3
M_A_CAA4
M_A_CAA5
M_A_CAA6
M_A_CAA7
M_A_CAA8
M_A_CAA9
M_A_CAB0
M_A_CAB1
M_A_CAB2
M_A_CAB3
M_A_CAB4
M_A_CAB5
M_A_CAB6
M_A_CAB7
M_A_CAB8
M_A_CAB9
M_A_DIM0_ODT0
M_A_DIM0_CS#0
M_A_DIM0_CS#1
M_A_DIM0_CKE0
M_A_DIM0_CKE1
M_A_DIM0_CKE2
M_A_DIM0_CKE3
M_A_DIM0_CLK0
M_A_DIM0_CLK#0
M_A_DIM0_CLK1
M_A_DIM0_CLK#1
C1630
1UF/6.3V
12
C1638
0.1UF/16V
C1648
1UF/6.3V
+1.2V
+1.2V
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM0
1 2
1 2
M_A_D[39:32] 4
M_A_D[47:40] 4
M_A_D[55:48] 4
M_A_D[63:56] 4
GND
+1.8V_DDR3
12
+1.2V
12
+0.6VS
12
+0.6VS
12
@
JP1602
112
1MM_OPEN_M1M2
S1V080100001
@
12
C1605
10UF/6.3V
vx_c0603_small
12
C1609
C1608
1UF/6.3V
1UF/6.3V
12
C1612
10UF/6.3V
vx_c0603_small
12
C1625
1UF/6.3V
12
C1632
C1633
1UF/6.3V
1UF/6.3V
12
C1640
C1641
1UF/6.3V
1UF/6.3V
12
C1653
@
C1652
22UF/6.3V
22UF/6.3V
vx_c0603_h39_small
vx_c0603_h39_small
2
12
@
+1.8V_DDR3+1.8V
C1606
10UF/6.3V
vx_c0603_small
12
GND
12
12
12
12
12
C1607
10UF/6.3V
vx_c0603_small
GND
12
C1610
C1611
1UF/6.3V
1UF/6.3V
GND
12
C1613
10UF/6.3V
vx_c0603_small
12
C1627
C1626
1UF/6.3V
1UF/6.3V
12
C1635
C1634
1UF/6.3V
1UF/6.3V
12
C1642
C1643
1UF/6.3V
1UF/6.3V
C1654
22UF/6.3V
vx_c0603_h39_small
12
12
C1628
1UF/6.3V
12
C1636
0.1UF/16V
12
12
C1646
1UF/6.3V
12
C1655
22UF/6.3V
vx_c0603_h39_small
mount a 22uf per channel
M_A_D33
P9
DQ0
M_A_D36
N9
DQ1
M_A_D35
N10
DQ2
M_A_D37
N11
DQ3
M_A_D34
M8
DQ4
M_A_D38
M9
DQ5
M_A_D32
M10
DQ6
M_A_D39
M11
DQ7
M_A_D45
F11
DQ8
M_A_D44
F10
DQ9
M_A_D46
F9
M_A_D42
F8
M_A_D41
E11
M_A_D40
E10
M_A_D43
E9
M_A_D47
D9
M_A_D53
T8
M_A_D50
T9
M_A_D48
T10
M_A_D54
T11
M_A_D51
R8
M_A_D52
R9
M_A_D49
R10
M_A_D55
R11
M_A_D60
C11
M_A_D56
C10
M_A_D62
C9
M_A_D58
C8
M_A_D61
B11
M_A_D57
B10
M_A_D63
B9
M_A_D59
B8
A3
A4
A5
A6
A10
U3
U4
U5
U6
U10
A8
A9
D4
D5
D6
G5
H5
H6
H12
J5
J6
K5
K6
K12
L5
P4
P5
P6
U8
U9
F2
G2
H3
L2
M2
A11
C12
E8
E12
G12
H8
H9
H11
J9
J10
K8
K11
L12
N8
N12
R12
U11
H4
J11
J8
ODT
B3
R1603 243Ohm1%
ZQ0
B4
R1604 243Ohm1%
ZQ1
C4
K9
R3
+1.8V
+1.2V
+0.6VS
R1605 68Ohm
R1606 68Ohm
R1607 68Ohm
R1608 68Ohm
R1609 68Ohm
R1610 68Ohm
R1611 68Ohm
R1612 68Ohm
R1613 68Ohm
R1614 68Ohm
R1615 68Ohm
R1616 68Ohm
R1617 68Ohm
R1618 68Ohm
R1619 68Ohm
R1620 68Ohm
R1621 68Ohm
R1622 68Ohm
R1623 68Ohm
R1624 68Ohm
R1629 80.6Ohm
R1628 80.6Ohm
R1627 80.6Ohm
R1625 80.6Ohm
R1626 80.6Ohm
R1635 80.6Ohm
R1634 80.6Ohm
R1630 37.4Ohm
R1631 37.4Ohm
R1632 37.4Ohm
R1633 37.4Ohm
12
12
C1631
1UF/6.3V
GND
12
C1639
0.1UF/16V
GND
12
12
@
C1649
1UF/6.3V
12
12
@
C1656
@
22UF/6.3V
vx_c0603_h39_small
GND
1
+1.8V 57,91
+1.8V_DDR3 17
+1.2V 4,7,17,18,57,83
+0.6VS 17,57,83
+V_VREF_CA_DIMM0 18
+V_VREF_DQ_DIMM0 18
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C1618
1UF/6.3V
12
C1650
C1651
@
22UF/6.3V
22UF/6.3V
vx_c0603_h39_small
vx_c0603_h39_small
GND
C1657
22UF/6.3V
vx_c0603_h39_small
+0.6VS
+1.2V
A A
12
C1624
1UF/6.3V
12
C1616
10UF/6.3V
vx_c0603_small
12
C1617
10UF/6.3V
vx_c0603_small
GND
+1.2V
12
C1619
1UF/6.3V
+V_VREF_CA_DIMM0 +V_VREF_DQ_DIMM0
12
C1620
1UF/6.3V
GND
C1601
C1602
0.047UF/16V
0.047UF/16V
N/A
GND GND GND GND
N/A
C1603
0.047UF/16V
N/A
C1604
0.047UF/16V
N/A
5
4
+1.2V +1.2V
12
C1623
1UF/6.3V
3
12
C1614
10UF/6.3V
vx_c0603_small
12
C1615
10UF/6.3V
vx_c0603_small
GND
12
C1621
1UF/6.3V
12
C1622
1UF/6.3V
GND
2
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
LPDDR3(1)_MEMORY DOWN
LPDDR3(1)_MEMORY DOWN
LPDDR3(1)_MEMORY DOWN
Dep.3/Sec.3
Dep.3/Sec.3
Engineer:
Engineer:
P3HCJ
P3HCJ
P3HCJ
Engineer:
1
BG1
BG1
BG1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Dep.3/Sec.3
16 100Thursday, September 03, 2015
16 100Thursday, September 03, 2015
16 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
LPDDR3 Channel B
M_B_CAA[9:0]4
M_B_DIM0_CLK04
D D
M_B_DIM0_CLK#04
M_B_DIM0_CKE04
M_B_DIM0_CKE14
M_B_DIM0_CS#04,17
M_B_DIM0_CS#14,17
B0
B1
C C
B2
B3
B B
M_B_CAA0
M_B_CAA1
M_B_CAA2
M_B_CAA3
M_B_CAA4
M_B_CAA5
M_B_CAA6
M_B_CAA7
M_B_CAA8
M_B_CAA9
M_B_DQS04
M_B_DQS#04
M_B_DQS14
M_B_DQS#14
M_B_DQS24
M_B_DQS#24
M_B_DQS34
M_B_DQS#34
GND
U1701
R2
CA0
P2
CA1
N2
CA2
N3
CA3
M3
CA4
F3
CA5
E3
CA6
E2
CA7
D2
CA8
C2
CA9
J3
CK_t
J2
CK_c
K3
CKE0
K4
CKE1
L3
CS0_n
L4
CS1_n
L8
DM0
G8
DM1
P8
DM2
D8
DM3
A1
DNU_1
A2
DNU_5
A12
DNU_7
A13
DNU_9
B1
DNU_2
B13
DNU_10
T1
DNU_3
T13
DNU_11
U1
DNU_4
U2
DNU_6
U12
DNU_8
U13
DNU_12
L10
DQS0_t
L11
DQS0_c
G10
DQS1_t
G11
DQS1_c
P10
DQS2_t
P11
DQS2_c
D10
DQS3_t
D11
DQS3_c
B2
VSS_1
B5
VSS_10
C5
VSS_11
E4
VSS_6
E5
VSS_12
F5
VSS_13
H2
VSS_2
J12
VSS_19
K2
VSS_3
L6
VSS_18
M5
VSS_14
N4
VSS_7
N5
VSS_15
R4
VSS_8
R5
VSS_16
T2
VSS_4
T3
VSS_5
T4
VSS_9
T5
VSS_17
C3
VSSCA_1
D3
VSSCA_2
F4
VSSCA_5
G3
VSSCA_3
G4
VSSCA_6
J4
VSSCA_7
M4
VSSCA_8
P3
VSSCA_4
B6
VSSQ_1
B12
VSSQ_14
C6
VSSQ_2
D12
VSSQ_15
E6
VSSQ_3
F6
VSSQ_4
F12
VSSQ_16
G6
VSSQ_5
G9
VSSQ_10
H10
VSSQ_12
K10
VSSQ_13
L9
VSSQ_11
M6
VSSQ_6
M12
VSSQ_17
N6
VSSQ_7
P12
VSSQ_18
R6
VSSQ_8
T6
VSSQ_9
T12
VSSQ_19
H9CCNNNBLTMLAR-NTM
03V150000040
M_B_D4
P9
DQ0
M_B_D5
N9
DQ1
M_B_D1
N10
DQ2
M_B_D7
N11
DQ3
M_B_D0
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
VDD1_1
VDD1_3
VDD1_5
VDD1_7
VDD1_9
VDD1_2
VDD1_4
VDD1_6
VDD1_8
VDD1_10
VDD2_15
VDD2_17
VDD2_1
VDD2_3
VDD2_10
VDD2_4
VDD2_5
VDD2_11
VDD2_19
VDD2_6
VDD2_12
VDD2_7
VDD2_13
VDD2_20
VDD2_8
VDD2_2
VDD2_9
VDD2_14
VDD2_16
VDD2_18
VDDCA_1
VDDCA_2
VDDCA_5
VDDCA_3
VDDCA_4
VDDQ_8
VDDQ_12
VDDQ_1
VDDQ_13
VDDQ_14
VDDQ_2
VDDQ_5
VDDQ_9
VDDQ_6
VDDQ_7
VDDQ_3
VDDQ_10
VDDQ_15
VDDQ_4
VDDQ_16
VDDQ_17
VDDQ_11
Vref(CA)
Vref(DQ)
NC_2
NC_3
NC_1
M8
DQ4
M_B_D6
M9
DQ5
M_B_D2
M10
DQ6
M_B_D3
M11
DQ7
M_B_D8
F11
DQ8
M_B_D12
F10
DQ9
M_B_D13
F9
M_B_D9
F8
M_B_D11
E11
M_B_D15
E10
M_B_D10
E9
M_B_D14
D9
M_B_D21
T8
M_B_D17
T9
M_B_D22
T10
M_B_D19
T11
M_B_D20
R8
M_B_D16
R9
M_B_D23
R10
M_B_D18
R11
M_B_D29
C11
M_B_D31
C10
M_B_D28
C9
M_B_D25
C8
M_B_D27
B11
M_B_D30
B10
M_B_D26
B9
M_B_D24
B8
A3
A4
A5
A6
A10
U3
U4
U5
U6
U10
A8
A9
D4
D5
D6
G5
H5
H6
H12
J5
J6
K5
K6
K12
L5
P4
P5
P6
U8
U9
F2
G2
H3
L2
M2
A11
C12
E8
E12
G12
H8
H9
H11
J9
J10
K8
K11
L12
N8
N12
R12
U11
H4
J11
J8
ODT
B3
ZQ0
B4
ZQ1
C4
K9
R3
+1.8V_DDR3 +1.8V_DDR3
+1.2V
+1.2V
+1.2V +1.2V
+V_VREF_CA_DIMM1
+V_VREF_DQ_DIMM1
1 2
R1701 243Ohm1%
1 2
R1702 243Ohm1%
B0
B1
B2
B3
4
M_B_D[7:0] 4
M_B_D[15:8] 4
M_B_D[23:16] 4 M_B_D[55:48] 4
M_B_D[31:24] 4
M_B_CAB[9:0]4
M_B_DIM0_CLK14
M_B_DIM0_CLK#14
M_B_DIM0_CKE24
M_B_DIM0_CKE34
M_B_DIM0_CS#04,17
M_B_DIM0_CS#14,17
B4
B5
B6
B7
M_B_CAB0
R2
M_B_CAB1
P2
M_B_CAB2
N2
M_B_CAB3
N3
M_B_CAB4
M3
M_B_CAB5
F3
M_B_CAB6
E3
M_B_CAB7
E2
M_B_CAB8
D2
M_B_CAB9
C2
J3
J2
K3
K4
L3
L4
L8
G8
P8
D8
A1
GNDGND
A2
A12
A13
B1
B13
T1
T13
U1
U2
U12
U13
M_B_DQS44
M_B_DQS#44
M_B_DQS54
M_B_DQS#54
M_B_DQS64
M_B_DQS#64
M_B_DQS74
M_B_DQS#74
L10
L11
G10
G11
P10
P11
D10
D11
B2
B5
C5
E4
E5
F5
H2
J12
K2
L6
M5
N4
N5
R4
R5
T2
T3
T4
T5
C3
D3
F4
G3
G4
J4
M4
P3
B6
B12
C6
D12
E6
F6
F12
G6
G9
H10
K10
L9
M6
M12
N6
P12
R6
T6
T12
GND
3
U1702
CA0
CA1
CA2
CA3
B4
CA4
CA5
CA6
CA7
CA8
CA9
B5
CK_t
CK_c
CKE0
CKE1
B6
CS0_n
CS1_n
DM0
DM1
DM2
DM3
B7
DNU_1
DNU_5
DNU_7
DNU_9
DNU_2
DNU_10
DNU_3
DNU_11
DNU_4
DNU_6
DNU_8
DNU_12
DQS0_t
DQS0_c
DQS1_t
DQS1_c
DQS2_t
DQS2_c
DQS3_t
DQS3_c
VSS_1
VSS_10
VSS_11
VSS_6
VSS_12
VSS_13
VSS_2
VSS_19
VSS_3
VSS_18
VSS_14
VSS_7
VSS_15
VSS_8
VSS_16
VSS_4
VSS_5
VSS_9
VSS_17
VSSCA_1
VSSCA_2
VSSCA_5
VSSCA_3
VSSCA_6
VSSCA_7
VSSCA_8
VSSCA_4
VSSQ_1
VSSQ_14
VSSQ_2
VSSQ_15
VSSQ_3
VSSQ_4
VSSQ_16
VSSQ_5
VSSQ_10
VSSQ_12
VSSQ_13
VSSQ_11
VSSQ_6
VSSQ_17
VSSQ_7
VSSQ_18
VSSQ_8
VSSQ_9
VSSQ_19
H9CCNNNBLTMLAR-NTM
03V150000040
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
VDD1_1
VDD1_3
VDD1_5
VDD1_7
VDD1_9
VDD1_2
VDD1_4
VDD1_6
VDD1_8
VDD1_10
VDD2_15
VDD2_17
VDD2_1
VDD2_3
VDD2_10
VDD2_4
VDD2_5
VDD2_11
VDD2_19
VDD2_6
VDD2_12
VDD2_7
VDD2_13
VDD2_20
VDD2_8
VDD2_2
VDD2_9
VDD2_14
VDD2_16
VDD2_18
VDDCA_1
VDDCA_2
VDDCA_5
VDDCA_3
VDDCA_4
VDDQ_8
VDDQ_12
VDDQ_1
VDDQ_13
VDDQ_14
VDDQ_2
VDDQ_5
VDDQ_9
VDDQ_6
VDDQ_7
VDDQ_3
VDDQ_10
VDDQ_15
VDDQ_4
VDDQ_16
VDDQ_17
VDDQ_11
Vref(CA)
Vref(DQ)
NC_2
NC_3
NC_1
+1.2V
+1.2V
+V_VREF_CA_DIMM1
+V_VREF_DQ_DIMM1
M_B_DIM0_ODT0 4,17M_B_DIM0_ODT0 4,17
1 2
1 2
M_B_D[39:32] 4
M_B_D[47:40] 4
M_B_D[63:56] 4
GNDGND
M_B_D35
P9
DQ0
M_B_D36
N9
DQ1
M_B_D38
N10
DQ2
M_B_D34
N11
DQ3
M_B_D37
M8
DQ4
M_B_D32
M9
DQ5
M_B_D33
M10
DQ6
M_B_D39
M11
DQ7
M_B_D45
F11
DQ8
M_B_D41
F10
DQ9
M_B_D47
F9
M_B_D46
F8
M_B_D40
E11
M_B_D44
E10
M_B_D42
E9
M_B_D43
D9
M_B_D52
T8
M_B_D48
T9
M_B_D51
T10
M_B_D55
T11
M_B_D53
R8
M_B_D49
R9
M_B_D54
R10
M_B_D50
R11
M_B_D60
C11
M_B_D56
C10
M_B_D59
C9
M_B_D62
C8
M_B_D57
B11
M_B_D61
B10
M_B_D58
B9
M_B_D63
B8
A3
A4
A5
A6
A10
U3
U4
U5
U6
U10
A8
A9
D4
D5
D6
G5
H5
H6
H12
J5
J6
K5
K6
K12
L5
P4
P5
P6
U8
U9
F2
G2
H3
L2
M2
A11
C12
E8
E12
G12
H8
H9
H11
J9
J10
K8
K11
L12
N8
N12
R12
U11
H4
J11
J8
ODT
B3
R1703 243Ohm1%
ZQ0
B4
R1704 243Ohm1%
ZQ1
C4
K9
R3
+1.8V_DDR3
12
+1.2V
12
+0.6VS
12
+0.6VS
12
2
12
C1705
10UF/6.3V
vx_c0603_small
12
C1708
1UF/6.3V
12
12
12
C1732
1UF/6.3V
12
C1740
1UF/6.3V
12
C1752
@
22UF/6.3V
vx_c0603_h39_small
12
12
C1709
1UF/6.3V
C1712
10UF/6.3V
vx_c0603_small
12
C1725
1UF/6.3V
12
C1733
1UF/6.3V
12
C1741
1UF/6.3V
12
C1753
@
22UF/6.3V
vx_c0603_h39_small
12
C1706
10UF/6.3V
vx_c0603_small
GND
12
C1710
1UF/6.3V
GND
12
C1713
10UF/6.3V
vx_c0603_small
GND
12
C1726
1UF/6.3V
12
C1734
1UF/6.3V
12
C1742
1UF/6.3V
C1754
@
22UF/6.3V
vx_c0603_h39_small
C1707
10UF/6.3V
vx_c0603_small
C1711
1UF/6.3V
12
12
C1728
C1727
1UF/6.3V
1UF/6.3V
12
C1735
C1736
1UF/6.3V
0.1UF/16V
12
C1746
1UF/6.3V
12
C1755
22UF/6.3V
vx_c0603_h39_small
12
C1743
1UF/6.3V
mount a 22uf per channel
+V_VREF_CA_DIMM1
+V_VREF_DQ_DIMM1
12
C1729
1UF/6.3V
12
C1737
0.1UF/16V
12
C1747
1UF/6.3V
+1.8V_DDR3
M_B_CAA0
M_B_CAA1
M_B_CAA2
M_B_CAA3
M_B_CAA4
M_B_CAA5
M_B_CAA6
M_B_CAA7
M_B_CAA8
M_B_CAA9
M_B_CAB0
M_B_CAB1
M_B_CAB2
M_B_CAB3
M_B_CAB4
M_B_CAB5
M_B_CAB6
M_B_CAB7
M_B_CAB8
M_B_CAB9
M_B_DIM0_ODT0
M_B_DIM0_CS#0
M_B_DIM0_CS#1
M_B_DIM0_CKE0
M_B_DIM0_CKE1
M_B_DIM0_CKE2
M_B_DIM0_CKE3
M_B_DIM0_CLK0
M_B_DIM0_CLK#0
M_B_DIM0_CLK1
M_B_DIM0_CLK#1
12
C1730
1UF/6.3V
12
C1738
0.1UF/16V
12
C1748
1UF/6.3V
12
C1756
@
22UF/6.3V
vx_c0603_h39_small
1
+1.2V
+0.6VS
R1705 68Ohm
R1706 68Ohm
R1707 68Ohm
R1708 68Ohm
R1709 68Ohm
R1710 68Ohm
R1711 68Ohm
R1712 68Ohm
R1713 68Ohm
R1714 68Ohm
R1715 68Ohm
R1716 68Ohm
R1717 68Ohm
R1718 68Ohm
R1719 68Ohm
R1720 68Ohm
R1721 68Ohm
R1722 68Ohm
R1723 68Ohm
R1724 68Ohm
R1729 80.6Ohm
R1728 80.6Ohm
R1727 80.6Ohm
R1725 80.6Ohm
R1726 80.6Ohm
R1734 80.6Ohm
R1735 80.6Ohm
R1730 37.4Ohm
R1731 37.4Ohm
R1733 37.4Ohm
R1732 37.4Ohm
12
C1731
C1718
1UF/6.3V
1UF/6.3V
GND
12
C1739
0.1UF/16V
GND
12
C1749
C1750
@
1UF/6.3V
22UF/6.3V
vx_c0603_h39_small
12
C1757
@
22UF/6.3V
vx_c0603_h39_small
GND
+1.8V_DDR3 16
+1.2V 4,7,16,18,57,83
+0.6VS 16,57,83
+V_VREF_CA_DIMM1 18
+V_VREF_DQ_DIMM1 18
12
C1751
@
22UF/6.3V
vx_c0603_h39_small
+0.6VS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
GND
+1.2V +1.2V
12
C1714
10UF/6.3V
vx_c0603_small
12
C1715
10UF/6.3V
vx_c0603_small
GND
A A
12
C1723
1UF/6.3V
12
C1719
1UF/6.3V
12
C1720
1UF/6.3V
GND
+V_VREF_CA_DIMM1 +V_VREF_DQ_DIMM1
C1702
C1701
0.047UF/16V
0.047UF/16V
N/A
N/A
GND GND GND GND
C1703
0.047UF/16V
N/A
C1704
0.047UF/16V
N/A
5
4
+1.2V
12
12
C1724
1UF/6.3V
3
C1716
10UF/6.3V
vx_c0603_small
12
C1717
10UF/6.3V
vx_c0603_small
GND
+1.2V
12
C1721
1UF/6.3V
12
C1722
1UF/6.3V
GND
2
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
LPDDR3(2)_MEMORY DOWN
LPDDR3(2)_MEMORY DOWN
LPDDR3(2)_MEMORY DOWN
Dep.3/Sec.3
Dep.3/Sec.3
Engineer:
Engineer:
P3HCJ
P3HCJ
P3HCJ
Engineer:
1
BG1
BG1
BG1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Dep.3/Sec.3
17 100Thursday, September 03, 2015
17 100Thursday, September 03, 2015
17 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
Dr-Bios.com
LPDDR3 Vref
R1821
DIMM0_VREF_DQ4
D D
DIMM1_VREF_DQ4
12
C1805
0.022UF/16V
12
R1819
24.9Ohm
1%
12
C1804
0.022UF/16V
12
R1818
24.9Ohm
1%
10Ohm
1%
R1822
10Ohm
1%
12
12
+1.2V
+1.2V
4
R1815
8.2KOhm
1%
1 2
12
R1816
8.2KOhm
1%
R1810
8.2KOhm
1%
1 2
12
R1809
8.2KOhm
1%
+V_VREF_DQ_DIMM0
+V_VREF_DQ_DIMM1
3
+1.2V
+V_VREF_DQ_DIMM0
+V_VREF_CA_DIMM0
+V_VREF_DQ_DIMM1
+V_VREF_CA_DIMM1
+1.2V 4,7,16,17,57,83
+V_VREF_DQ_DIMM0 16
+V_VREF_CA_DIMM0 16
+V_VREF_DQ_DIMM1 17
+V_VREF_CA_DIMM1 17
2
1
C C
R1823
5.1Ohm
1%
DIMM_VREF_CA_R
C1806
0.022UF/16V
R1820
24.9Ohm
1%
1 2
DIMM_VREF_CA4
B B
12
12
+1.2V
R1807
SP1801 nb_r0402_short_25mil
8.2KOhm
1%
1 2
SP1802 nb_r0402_short_25mil
12
R1808
8.2KOhm
1%
+V_VREF_CA_DIMM0
1 2
+V_VREF_CA_DIMM1
1 2
A A
Title :
Title :
Title :
LPDDR3(3)_CA/DQ
LPDDR3(3)_CA/DQ
LPDDR3(3)_CA/DQ
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
18 100Thursday, September 03, 2015
18 100Thursday, September 03, 2015
18 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
Engineer:
Engineer:
P3HCJ
P3HCJ
P3HCJ
Engineer:
1
BG1
BG1
BG1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
5
Dr-Bios.com
4
3
2
1
+3VSUS_ORG
+3VS
U0301E
SPI - FLASH
SPI_CLK28
D D
TBT_PCIE_WAKE#11
SPI_SO28
SPI_SI28
SPI_WP#_IO228
SPI_HOLD#_IO328
SPI_CS#028
T2011
T2001
SPI_CS1#
1
SPI_CS2#
1
Delete TP for Touch
1 2
1 2
1 2
1 2
R2010 0Ohm
SMBALERT#
SML0ALERT#
TBT_CIO_PLUG_EVENT#11
CL_CLK53
CL_DATA53
CL_RST#53
RCIN#30
INT_SERIRQ30,44,62
C C
R2004 20KOhm@
GND
R2006 20KOhm@
GND
B B
R2008 20KOhm@
GND
AV2
SPI0_CLK
AW3
SPI0_MISO
AV3
SPI0_MOSI
AW2
SPI0_IO2
AU4
SPI0_IO3
AU3
SPI0_CS0#
AU2
SPI0_CS1#
AU1
SPI0_CS2#
SPI - TOUCH
M2
GPP_D1/SPI1_CLK
M3
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
V2
GPP_D22/SPI1_IO3
M1
GPP_D0/SPI1_CS#
G3
CL_CLK
G2
CL_DATA
G1
CL_RST#
AW13
GPP_A0/RCIN#
AY11
GPP_A6/SERIRQ
940432
01V010000015
1 2
R2003 2.2KOhm
CRB 0.53 reserve 150k ohm
1 2
R2005 4.7KOhm@
CRB 0.53 reserve 150k ohm
1 2
R2007 4.7KOhm@
C LINK
+3VSUS_ORG
+3VSUS_ORG
+3VSUS_ORG
BBS 21
SMBALERT# - Internal weak pull down 20k ohm
TLS Confidentiality
0 : Disable (default)
1 : Enable
SML0ALERT# - Internal weak pull down 20 kohm
0 : LPC EC (default)
1 : eSPI EC
BBS - Internal weak pull down 20k ohm
Boot BIOS Strap
0 : SPI destination (default)
1 : LPC destination
LPC
SMBUS, SMLINK
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
SMB_CLK
SMB_DAT
SMBALERT#
SML0_CLK_NFC
SML0_DAT_NFC
SML0ALERT#
SML1_CLK
SML1_DAT
SML1ALERT#
CLK_KBCPCI_PCH_R
CLK_LPC1
PM_CLKRUN#
INT_SERIRQ
SMB_CLK
SMB_DAT
SML1_DAT
SML1_CLK
SML1ALERT#
SMB_CLK 28
T2008
T2003
T2004
T2010
1 2
1 2
3 4
2.2KOhm
1 2
2.2KOhm
SMB_DAT 28
SML1_CLK 28
SML1_DAT 28
12
C2103
10PF/50V
@
GND
1
1
1
1
1 2
R2001 NB_R0402_5MIL_SMALL
1 2
R2002 22Ohm 1%/debug
1 2
R2011 22Ohm 1%/TPM
PM_CLKRUN# 30,62
R2013 10KOhm
R2009 10KOhm
RN2001B
RN2001A
Delete SML0 PU
3 4
RN2002B
2.2KOhm
1 2
RN2002A
2.2KOhm
1 2
R2012 150KOhm 1%
MOW WW52
To enable Direct Connect Interface (DCI),
a 150K pull up resistor will need to be added to PCHHOT#
pin. This pin must be low during the rising edge of RSMRST#.
+3VSUS_ORG
+3VSUS_ORG 21,22,23,25,26
+3VS 3,4,12,21,22,23,24,28,30,31,32,36,44,45,48,50,51,53,57,58,62,64,91,92
LPC_AD0 30,44,62
LPC_AD1 30,44,62
LPC_AD2 30,44,62
LPC_AD3 30,44,62
LPC_FRAME# 30,44,62
PM_SUS_STAT# 62
CLK_KBCPCI_PCH 30
CLK_DEBUG 44
LPCCLK_TPM 62
12
+3VS
12
C2001
10PF/50V
@
GNDGND
C2002
10PF/50V
@
CLOCK Share with Debug
A A
PCH(1)_SPI/LPC
PCH(1)_SPI/LPC
PCH(1)_SPI/LPC
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Title :
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
20 100Thursday, September 03, 2015
20 100Thursday, September 03, 2015
20 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
P3HCJ
P3HCJ
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
P3HCJ
5
Dr-Bios.com
D D
4
3
2
1
+3VS
+3V_TP
U0301F
GPP_B15
GPP_B16
GPP_B17
GND
12
12
1
1
1
1
1
1
1
1
1
1
R2115
10KOhm
/4G_DRAM
R2116
10KOhm
/8G_DRAM
GPP_B18
BT_LED
WLAN_LED
GPP_B21
BBS_R
GPP_C8
GPP_C9
GPP_C10
GPP_C11
WLAN_ON_PCH
BT_ON/OFF#_PCH
LCD_BKLTEN_PCH_R
GPP_C23
PCH_I2C0_SDA
PCH_I2C0_SCL
PCH_I2C1_SDA
PCH_I2C1_SCL
SNN_GPP_F4
SNN_GPP_F5
12
R2119
@
10KOhm
12
R2120
10KOhm
GND
R1.3 NO USE IN P3HCJ Default Low
C C
1 2
BBS20
WLAN_ON30,53
BT_ON/OFF#30,53
LCD_BKLTEN_PCH3,45
+3VSUS_ORG+3VSUS_ORG
PCH_I2C0_SDA58
PCH_I2C0_SCL58
PCH_I2C1_SDA31
PCH_I2C1_SCL31
12
R2104
@
10KOhm
12
R2105
10KOhm
GNDGND
R1.3 set as P3 default
PCB_ID1 GPP_C14
External SensorHub
Touch pad
B B
12
R2106
10KOhm
12
R2107
@
10KOhm
A A
PCB_ID1 PCB_ID0
(GPP_C14) (GPP_C13)
N/A 0 0
Non-FingerPrint 0 1
N/A 1 0
FingerPrint 1 1
R2102 NB_R0402_5MIL_SMALL
1 2
R2126 0Ohm@
1 2
R2127 0Ohm@
1 2
R2144 0Ohm
(GPP_B15) (GPP_B16) (GPP_B17) (GPP_C15)
Hynix 1600 8G 0 0 0 0
Samsung 1600 8G 1 0 0 0
Hynix 1600 4G 0 1 0 0
Samsung 1600 4G 1 1 0 0
T2107
T2106
T2105
T2109
T2110
T2111
T2144
T2112
T2101
T2102
+3VSUS_ORG +3VSUS_ORG +3VSUS_ORG
12
R2108
10KOhm
/SAM_DRAM
12
R2109
10KOhm
/HYX_DRAM
GND
+3VSUS_ORG
12
@
12
GND
R2117
10KOhm
R2118
10KOhm
AH10
AH11
AH12
AF11
AF12
AN8
AP7
AP8
AR7
AM5
AN7
AP5
AN5
AB1
AB2
W4
AB3
AD1
AD2
AD3
AD4
U7
U6
U8
U9
AH9
LPSS ISH
GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
940432
01V010000015
MEM_ID0 GPP_B15
MEM_ID1 GPP_B16PCB_ID0 GPP_C13
MEM_ID2 GPP_B17
MEN_ID3 GPP_C15
C 3.3V GPIO
F 1.8V GPIO
+3VA
+3VA
GND
GND
D 3.3V GPIO
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
Sx_EXIT_HOLDOFF#/G PP_A12/BM_BUSY#/ISH_GP6
R2133 100KOhm/P4HCJ
R2134 100KOhm/P3HCJ
R2139 100KOhm@
R2140 100KOhm@
MBBD_ID_EC
IOBD_ID_EC
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
1 2
1 2
1 2
1 2
+3VA +3VSUS
12
R2135
100KOhm
61
Q2101A
2
UM6K1N
GND
+3VA +3VSUS
12
R2137
100KOhm@
61
Q2102A
2
UM6K1N
@
GND
GPP_D9
GPP_D10
GPP_D11
GPP_D12
5
5
P2
P3
VOL_UP#_PCH
P4
VOL_DOWN#_PCH
P1
ISH_I2C0_SDA
M4
ISH_I2C0_SCL
N3
ISH_I2C1_SDA
N1
ISH_I2C1_SCL
N2
SNN_GPP_F10
AD11
SNN_GPP_F11
AD12
TP_IRQ#_PCH
U1
GPP_D14
U2
GPP_D15
U3
TCH_PNL_RPS#_PCH_R
U4
GPP_C12
AC1
GPP_C13
AC2
GPP_C14
AC3
GPP_C15
AB4
GYRO_IRQ_R
AY8
ALS_IRQ_R
BA8
SNN_GPP_A20
BB7
BA7
AY7
SNN_GPP_A23
AW7
AP13
MBBD_ID_EC
IOBD_ID_EC
12
R2136
100KOhm
MBBD_ID_PCH GPP_D14
34
Q2101B
UM6K1N
GND
12
R2138
100KOhm@
IOBD_ID_PCH GPP_D15
34
Q2102B
UM6K1N
@
GND
MBBD_ID_EC 30
IOBD_ID_EC 30,64
MBBD_ID
13" MB 0
14" MB 1
1 2
R2101 0Ohm
1 2
R2141 0Ohm
1 2
R2124 0Ohm@
1 2
R2125 0Ohm@
1
T2127
1
T2128
1
T2115
1
T2116
1 2
R2142 0Ohm
1 2
R2143 0Ohm
1 2
R2103 0Ohm
1 2
R2128 0Ohm
1 2
R2129 0Ohm
1
T2103
1
T2114
R1.3 NO SWAP requirement GPP_D15 floating
5
4
3
2
+3VS 3,4,12,20,22,23,24,28,30,31,32,36,44,45,48,50,51,53,57,58,62,64,91,92
+3V_TP
TBT_FORCE_PWR_PCH 11
TP_SENSOR_OFF# 31
VOL_UP# 30,64
ISH_I2C0_SDA 58
ISH_I2C0_SCL 58
OP_SD# 36
R1.2 use on report panel ID
GYRO_IRQ 58,64
ALS_IRQ 58,64
ISH_I2C0_SDA
ISH_I2C0_SCL
PCH_I2C0_SDA
PCH_I2C0_SCL
GPP_B18
GSPI0_MOSI / GPP_B18 - Internal weak pull down 20k ohm
0 : Disable No Reboot mode(default)
1 : Enable NO Reboot Enable mode
Default is GPO, to reserve pull high to +3VSUS_ORG MEM_ID0 MEM_ID1 MEM_ID2 MEM_ID3
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1/HW2
BG1/HW2
BG1/HW2
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Panel_ID0
Panel_ID1
1 2
R2110 10KOhm@
1 2
R2111 10KOhm@
1 2
R2113 10KOhm
1 2
R2114 10KOhm
1 2
R2112 4.7KOhm@
1 2
R2122 4.7KOhm@
P3HCJ
P3HCJ
P3HCJ
VOL_DOWN# 30,64
TP_IRQ# 30,31
TCH_PNL_RPS#_PCH 64
+3VSUS_ORG
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
+3VS
+3VS
PCH(2)_ISH
PCH(2)_ISH
PCH(2)_ISH
Dep.3/Sec.3
Dep.3/Sec.3
Dep.3/Sec.3
21 100Thursday, September 03, 2015
21 100Thursday, September 03, 2015
21 100Thursday, September 03, 2015
Rev
Rev
Rev
2.0
2.0
2.0
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