Acer Aspire One AOD255, Aspire One 260 Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

PAV70 Schematics Document

Intel Pineview Processor with Tigerpoint + DDRII

3 3

REV: 1.0

4 4

Security Classification

Security Classification

2010-07-01

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-6221P

LA-6221P

LA-6221P

1 39Friday, July 02, 2010

1 39Friday, July 02, 2010

1 39Friday, July 02, 2010

E

1.0

1.0

1.0

A

B

C

D

E

Compal Confidential

Clock Generator
CK505

page 8

Model Name :
File Name : LA-6221P

1 1

Thermal Sensor

EMC1402

2 2

page 5

ZZZ

ZZZ

PAV70@

PAV70@

PCB

PCB

DAZ0F300201

DAZ0F300201

ZZZ

ZZZ

PAV50@

PAV50@

PCB

PCB

DAZ0F000300

DAZ0F000300

MINI Card x1
3G

page 17

CRT Conn

page 10

LCD Conn.

page 9

MINI Card x1
WLAN

page 18

RGB

LVDS

PCI-Express

10/100 Ethernet

AR8152L

page 16

Pineview
FCBGA 559

DMI
X2 mode
GEN1

Tigerpoint

PCBGA360

22x22mm

page 4,5,6

17x17mm

page 11,12,13,14

LPC BUS

Memory BUS(DDRII)

1.8V DDRII 667

SATA

DDRII-SO-DIMM

USB

HDA

HDD

page 15

page 7

USB Port X3

page 15

BlueTooth

page 23

CMOS CAM

page 9

3G

page 17

Transfermer

3 3

WLAN

page 18

Aralia Codec

Power ON/OFF

page 26

DC IN

page 27

DC/DC Interface

3VALW/5VALW

page 27

page 27

RJ45

ENE KBC
KB926

page 24

SPI

ALC272

0.89VP/1.5VP

BATT IN

page 29

CHARGER

4 4

page 30

0.9VSP/2.5VSP

1.8V/VCCP

CPU_CORE

A

page 32

page 32

page 34

、、、、

33

B

Int.KBD

page 25

Touch Pad

page 25

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SPI ROM

page 25

Compal Secret Data

Compal Secret Data

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

AMP & INT
Speaker

I/O Board

D

page 19

INT MIC HeadPhone &

MIC Jack

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

Card Reader
ENE6252

SD/MMC/MS
CONN

LA-6221P

LA-6221P

LA-6221P

E

page 22

2 39Thursday, July 01, 2010

2 39Thursday, July 01, 2010

2 39Thursday, July 01, 2010

1.0

1.0

1.0

A

B

C

D

E

Voltage Rails

S5

DescriptionPower Plane

1 1

VIN

B+

+CPU_CORE

+VCCP

+1.5VS

+1.8V

+0.89V Graphic core power rail

+3VALW

+3VS

+5VALW

+5VS

+VSB VSB always on power rail ON

+RTCVCC

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

0.9V switched power rail for DDR terminator+0.9VS

VCCP switched power rail

1.5V switched power rail

1.8V power rail for DDR

3.3V always on power rail

3.3V switched power rail

5V always on power rail

5V switched power rail

RTC power

S3S1

ONONONONON

ON

ON OFF

ON

ON

ON

ON

ON

ON

OFFON

OFF

OFFON

OFF

OFFOFFON

OFFOFFON

OFF

ON

OFF

ON ON*

OFF

OFF

ON ON*

OFF

OFFON

ON*

ONON

External PCI Devices

DEVICE REQ/GNT # PIRQ

IDSEL #

No PCI Device

EC SM Bus1 address

Device

Smart Battery

Address

EC SM Bus2 address

Device

EMC1402

Address

100_11000001 011X b

2 2

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

SLP_S3#

SLP_S4#

SLP_S5#

HIGH HIGH HIGH

HIGH

LOW

LOW LOW

LOWLOW

HIGHHIGHHIGH

HIGH

HIGH

LOW

+VALW

ON

ON

ON

ON

ON

+V +VS Clock

ON

ON

ON

OFF

OFF

ON

OFF

OFF

OFF

ONON

LOW

OFF

OFF

OFF

BOARD ID Table(Page 17)

Vcc 3.3V +/- 5%

3 3

Board ID

0(EVT)
1(DVT)
2(PVT)
3(MP)

4
5
6
7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

V typ

AD_BID

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

max

BOARD ID Table

Board ID

0
1

4 4

2
3

PCB Revision

0.1

0.2

Tiger Point SM Bus address

Device

Clock Generator
(SLG8SP556VTR)

DDR DIMMA

Address

1101 001Xb

1010 000Xb

USB table

EHCI1

EHCI2

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

Port0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
Port8
Port9
Port10
Port11

MB USB Conn1.
MB USB Conn2.
MB USB Conn3.
CMOS
Card Reader
WWAN
BT
WLAN

PCIE table

PCIE port1

PCIE port2

PCIE port3

PCIE port4

PCIE port5

PCIE port6

SATA table

SATA port0

SATA port1

SATA port2

SATA port3

SATA port4

SATA port5

LAN

Wireless Card

3G

HDD

4
5
6
7

A

B

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

LA-6221P

LA-6221P

LA-6221P

3 39Thursday, July 01, 2010

3 39Thursday, July 01, 2010

3 39Thursday, July 01, 2010

E

1.0

1.0

1.0

5

PINEVIEW_M

U71A

U71A

DMI_RX0_C
DMI_RX#0_C
DMI_RX1_C
DMI_RX#1_C

D D

C C

CLK_CPU_EXP#(8)
CLK_CPU_EXP(8)

C435

C435

DMI_RX0(12)

DMI_RX#0(12)

DMI_RX1(12)

DMI_RX#1(12)

C436

C436

C437

C437

C438

C438

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

F3
F2
H4

G3

N7
N6

R10

R9

N10

N9

K2

J1

M4

L3

DMI_RX0_C

DMI_RX#0_C

DMI_RX1_C

DMI_RX#1_C

DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1

EXP_CLKINN
EXP_CLKINP

EXP_TCLKINN
EXP_TCLKINP
RSVD
RSVD

RSVD
RSVD
RSVD
RSVD

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

PINEVIEW_M

+VCCP

REV = 1.1

REV = 1.1

DMI

DMI

Close to CPU

B B

FAN1 Conn

Modify follow KAV60 schematic 06/12

+5VS

+VCC_FAN1

EN_FAN1(24)

A A

1 2

R47 330 _0402_5%R47 330 _0402_5%

FAN_SPEED1(24)

5

1
2
3
4

1

C1151

C1151

0.01U_0402_16V7K

0.01U_0402_16V7K

2

U12

U12

APL5607KI-TRG_SO8

APL5607KI-TRG_SO8

+3VS

C312 2.2U_0603_10V6KC312 2.2U_0603_10V6K

1 2

EN
VIN
VOUT
VSET

12

1

2

8

GND

7

GND

6

GND

5

GND

R256

R256
10K_0402_5%

10K_0402_5%

C311

C311
100P_0402_50V8J

100P_0402_50V8J

40mil

+VCC_FAN1

+5VS

3

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1

EXP_RCOMPO

EXP_ICOMPI

EXP_RBIAS

1 OF 6

1 OF 6

H_PWRGD(5,13)

SLPIOVR#(13)

PLTRST#(5,13,16,17,18,24,26)

2

D19

@D19

@

DAN217_SC59

DAN217_SC59

1

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C313

C313

1 2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C1150

C1150

1000P_0402_50V7K

1000P_0402_50V7K

1 2

1
2
3

ACES_85204-03001

ACES_85204-03001

4

G2
G1
H3
J2

L10
L9
L8

N11

RSVD_TP

P11

RSVD_TP

K3

RSVD

L2

RSVD

M2

RSVD

N2

RSVD

XDP_PREQ#(5)
XDP_PRDY#(5)

XDP_BPM#3(5)
XDP_BPM#2(5)

XDP_BPM#1(5)
XDP_BPM#0(5)

R354 1K_0402_5%R354 1K_0402_5%

1 2

R347 1K_0402_5%R347 1K_0402_5%

1 2

CPU_ITP(8)
CPU_ITP#(8)

PLTRST#

1 2

XDP_TDO(5)

XDP_TRST#(5)

XDP_TDI(5)
XDP_TMS(5)

XDP_TCK(5)

C314

C314

JP12

JP12

1

4

2

G1

5

3

G2

CONN@

CONN@

4

3

DDR_A_DQS#[0..7](7)

DDR_A_D[0..63](7)

DDR_A_DM[0..7](7)

DMI_TX0 (12)
DMI_TX#0 (12)
DMI_TX1 (12)
DMI_TX#1 (12)

R162

R162
R203

R203

49.9_0402_1%

49.9_0402_1%
750_0402_1%

750_0402_1%

T38T38

Must be placed within 500 mils from Pineview-M pins

T39T39

JP16

JP16

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

G1

26

G2

ACES_87151-24051

ACES_87151-24051

CONN@

CONN@

R348

R348

XDP_PREQ#
XDP_PRDY#

XDP_BPM#3
XDP_BPM#2

XDP_BPM#1
XDP_BPM#0

1K_0402_1%

1K_0402_1%

XDP_TDO

XDP_TRST#
XDP_TDI
XDP_TMS

XDP_TCK

XDP Reserve

XDP_TDI

XDP_TMS

XDP_TDO

XDP_PREQ#

XDP_TRST#

XDP_TCK

R341 51 +-1% 0402R341 51 +-1% 0402

1 2

R342 51 +-1% 0402R342 51 +-1% 0402

1 2

R343 51 +-1% 0402R343 51 +-1% 0402

1 2

R344 51 +-1% 0402R344 51 +-1% 0402

1 2

R345 51 +-1% 0402R345 51 +-1% 0402

1 2

R346 51 +-1% 0402R346 51 +-1% 0402

1 2

Modify D38 D39 D40 Pin define 08/13

XDP_PREQ#

XDP_TDO

XDP_TRST#

XDP_TDI

3

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR_A_DQS[0..7](7)

DDR_A_MA[0..14](7)

+VCCP

XDP_TMS
XDP_TCK

2

3

2

D40

D40

1

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

3

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_WE#(7)
DDR_A_CAS#(7)
DDR_A_RAS#(7)

DDR_A_BS0(7)
DDR_A_BS1(7)
DDR_A_BS2(7)

DDR_CS#0(7)
DDR_CS#1(7)

DDR_CKE0(7)
DDR_CKE1(7)

M_ODT0(7)
M_ODT1(7)

M_CLK_DDR0(7)
M_CLK_DDR#0(7)
M_CLK_DDR1(7)
M_CLK_DDR#1(7)

+1.8V

12

R50

R50

1K_0402_1%

1K_0402_1%

12

R142

R142

1K_0402_1%

1K_0402_1%

2

3

D38

D38

D39

D39

1

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

Add 2009-6-17

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

PJDLC05C_SOT23-3

Compal Secret Data

Compal Secret Data

Compal Secret Data

DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

DDR_CS#0
DDR_CS#1

DDR_CKE0
DDR_CKE1

M_ODT0
M_ODT1

M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

1

C1221

C1221

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+1.8V

1

C1222

C1222

0.01U_0402_16V7K

0.01U_0402_16V7K

2

Deciphered Date

Deciphered Date

Deciphered Date

+1.8V

R242

R242

R243

R243

R369

R369
10K_0402_5%

10K_0402_5%

R370

R370
10K_0402_5%

10K_0402_5%

@

@

DDR_RPD
DDR_RPU

2

T40T40
T41T41

DDR_RPU

80.6_0402_1%

80.6_0402_1%

DDR_RPD

80.6_0402_1%

80.6_0402_1%

2

AH19

AJ18
AK18
AK16

AJ14
AH14
AK14

AJ12
AH13
AK12
AK20
AH12

AJ11

AJ24

AJ10

AK22

AJ22
AK21

AJ20
AH20
AK11

AH22
AK25

AJ21

AJ25

AH10

AH9

AK10

AK24
AH26
AH24
AK27

AG15
AF15
AD13
AC13

AC15
AD15
AF13
AG13

AD17
AC17
AB15
AB17

AB4
AK8

AB11
AB13

AL28
AK28

AJ26

AK29

AJ8

U71B

U71B

DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14

DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#

DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2

DDR_A_CS#_0
DDR_A_CS#_1
DDR_A_CS#_2
DDR_A_CS#_3

DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3

DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3

DDR_A_CK_0
DDR_A_CK_0#
DDR_A_CK_1
DDR_A_CK_1#

DDR_A_CK_3
DDR_A_CK_3#
DDR_A_CK_4
DDR_A_CK_4#

RSVD
RSVD
RSVD
RSVD

RSVD
RSVD

RSVD_TP
RSVD_TP

DDR_VREF
DDR_RPD
DDR_RPU

RSVD

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

1

PINEVIEW_M

PINEVIEW_M

REV = 1.1

REV = 1.1

DDR_A_DQS_0

DDR_A_DQS#_0

DDR_A_DM_0

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7

DDR_A_DQS_1

DDR_A_DQS#_1

DDR_A_DM_1

DDR_A_DQ_8

DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15

DDR_A_DQS_2

DDR_A_DQS#_2

DDR_A_DM_2

DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23

DDR_A_DQS_3

DDR_A_DQS#_3

DDR_A_DM_3

DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31

DDR_A_DQS_4

DDR_A_DQS#_4

DDR_A_DM_4

DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39

DDR_A_DQS_5

DDR_A_DQS#_5

DDR_A_DM_5

DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47

DDR_A_DQS_6

DDR_A_DQS#_6

DDR_A

DDR_A

2 OF 6

2 OF 6

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

DDR_A_DM_6

DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55

DDR_A_DQS_7

DDR_A_DQS#_7

DDR_A_DM_7

DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Pineview(1/3)

Pineview(1/3)

Pineview(1/3)

LA-6221P

LA-6221P

LA-6221P

1

AD3
AD2
AD4

AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3

AB8
AD7
AA9

AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6

AD8
AD10
AE8

AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10

AK5
AK3
AJ3

AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6

AG22
AG21
AD19

AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21

AE26
AG27
AJ27

AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27

AE30
AF29
AF30

AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28

AB27
AA27
AB26

AA24
AB25
W24
W22
AB24
AB23
AA23
W27

DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7

DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1

DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15

DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2

DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23

DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3

DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31

DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4

DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39

DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5

DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47

DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6

DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7

DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

1.0

1.0

4 39Friday, July 02, 2010

4 39Friday, July 02, 2010

4 39Friday, July 02, 2010

1.0

5

4

3

2

1

PINEVIEW_M

U71C

U71C

D12

T2T2
T12T12
T3T3
T4T4

D D

C C

B B

A A

T13T13
T5T5
T6T6
T7T7
T14T14

XDP_RSV D_09

T8T8
T15T15
T9T9
T16T16
T10T10
T17T17
T11T11
T28T28

T37T37

XDP_RSV D_09

R1378

R1378
1K_0402 _5%

1K_0402 _5%

1 2

T18T18
T19T19
T20T20
T21T21

T22T22
T23T23
T24T24
T25T25

H_THERMDA, H_THERMDC routing together.
Trace width / Spacing = 10 / 10 mil

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C79

C79

1 2

2200P_0 402_50V7K

2200P_0 402_50V7K

1

2

C80

C80

C10
D10
B11
B10
B12
C11

AA7
AA6

AA21

W21

V21

L11

T21

XDP_RSVD_00

A7

XDP_RSVD_01

D6

XDP_RSVD_02

C5

XDP_RSVD_03

C7

XDP_RSVD_04

C6

XDP_RSVD_05

D8

XDP_RSVD_06

B7

XDP_RSVD_07

A9

XDP_RSVD_08

D9

XDP_RSVD_09

C8

XDP_RSVD_10

B8

XDP_RSVD_11
XDP_RSVD_12
XDP_RSVD_13
XDP_RSVD_14
XDP_RSVD_15
XDP_RSVD_16
XDP_RSVD_17

RSVD

RSVD_TP
RSVD_TP

R5

RSVD_TP

R6

RSVD_TP

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

H_THERM DA

H_THERM DC

5

PINEVIEW_M

REV = 1.1

REV = 1.1

VGA

VGA

MISC

MISC

CRT_HSYNC
CRT_VSYNC

CRT_RED

CRT_GREEN

CRT_BLUE

CRT_IRTN

CRT_DDC_DATA

CRT_DDC_CLK

DAC_IREF

REFCLKINP

REFCLKINN
REFSSCLKINP
REFSSCLKINN

PM_EXTTS#_1/DPRSLPVR

PM_EXTTS#_0

PWROK

RSTIN#

HPL_CLKINN
HPL_CLKINP

3 OF 6

3 OF 6

CPU THERMAL SENSOR

U2

U2

GND

8

7

6

5

EC_SMB_ CK2

EC_SMB_ DA2

1

VDD

2

DP

3

DN

4

THERM#

EMC1402 -1-ACZL-TR MSOP 8P SENSOR

EMC1402 -1-ACZL-TR MSOP 8P SENSOR

Address:100_1100

SMCLK

SMDATA

ALERT#

R249 be placed <750 mils to U 71.M30
R247 be placed <750 mils to U 71.M29

R249 10_0402_5%R249 10_0402_5%

M30
M29

N31
P30
P29
N30

L31
L30

P28

Y30
Y29
AA30
AA31

K29
J30
L5
AA3

W8
W9

1 2

R247 10_0402_5%R247 10_0402_5%

1 2

GMCH_CR T_R
GMCH_CR T_G
GMCH_CR T_B

R201 be placed <500 mils to U 71.P28

CPU_DRE FCLK
CPU_DRE FCLK#
CPU_SSC DREFCLK
CPU_SSC DREFCLK#

PM_EXTT S#1
PM_EXTT S#0
H_PW ROK
PLTRST#

CLK_CPU _HPLCLK#
CLK_CPU _HPLCLK

GMCH_CR T_R (10)
GMCH_CR T_G (10)
GMCH_CR T_B (10)

GMCH_CR T_DATA (10)
GMCH_CR T_CLK (10)

R201 665_040 2_1%R201 665_040 2_1%

0_0402_ 5%

0_0402_ 5%

R200

R200

PM_EXTT S#0 (7)

PLTRST# (4,13,16,17 ,18,24,26)

CPU_DRE FCLK (8)
CPU_DRE FCLK# (8)
CPU_SSC DREFCLK (8)
CPU_SSC DREFCLK# (8)

CLK_CPU _HPLCLK# (8)
CLK_CPU _HPLCLK (8)

Modify 08/04

@

@

R305

+3VS

R305

1 2

0_0402_ 5%

0_0402_ 5%
R306

R306

1 2

0_0402_ 5%

0_0402_ 5%

R307

R307

1 2

150_040 2_1%

150_040 2_1%
R308

R308

1 2

150_040 2_1%

150_040 2_1%
R309

R309

1 2

150_040 2_1%

150_040 2_1%

R34

R34

100K_04 02_5%

100K_04 02_5%

H_PW ROK

To be placed <2 50 mils to U71 ball

GMCH_CR T_R

GMCH_CR T_G

GMCH_CR T_B

GMCH_EN BKL

To be placed <5 00 mils to U71 ball

EC_SMB_ CK2 (24,26)

R58

R58

10K_040 2_5%

10K_040 2_5%

EC_SMB_ DA2 (24,26)

12

4

GMCH_CR T_HSYNC (10)
GMCH_CR T_VSYNC (10)

PM_DPRS LPVR (13)

VGATE (8,1 3,24,35)

EC_PW ROK (13,24)

H_SMI#

1

C1171

C1171
470P_04 02_50V7K

470P_04 02_50V7K

2

LVDS_AC LK#(9)

LVDS_AC LK(9)
LVDS_A0 #(9)
LVDS_A0(9 )
LVDS_A1 #(9)
LVDS_A1(9 )
LVDS_A2 #(9)
LVDS_A2(9 )

R151 be placed U71.R22

GMCH_EN BKL(24)
DPST_PW M(9)

LVDS_SC L(9)
LVDS_SD A(9)

GMCH_EN VDD(9)

XDP_TDI(4)
XDP_TDO(4 )
XDP_TCK(4)
XDP_TMS(4 )
XDP_TRS T#(4)

T58T58

T59T59

T60T60

T61T61

T62T62

T63T63

2.37K_04 02_1%

2.37K_04 02_1%

GMCH_EN BKL

XDP_BPM #0(4)
XDP_BPM #1(4)
XDP_BPM #2(4)
XDP_BPM #3(4)

H_THERM DA
H_THERM DC

XDP_TCK

XDP_TDI

XDP_TDO

XDP_TMS

XDP_TRS T#

H_PW RGD

R151

R151

T48T48
T49T49
T50T50
T51T51

T55T55

XDP_TDI
XDP_TDO

XDP_TCK

XDP_TMS
XDP_TRS T#

U25

LA_CLKN

U26

LA_CLKP

R23

LA_DATAN_0

R24

LA_DATAP_0

N26

LA_DATAN_1

N27

LA_DATAP_1

R26

LA_DATAN_2

R27

LA_DATAP_2

R22

LIBG

J28

LVBG

N22

LVREFH

N23

LVREFL

L27

LBKLT_EN

L26

LBKLT_CTL

L23

LCTLA_CLK

K25

LCTLB_DATA

K23

LDDC_CLK

K24

LDDC_DATA

H26

LVDD_EN

G11

BPM_1_0#

E15

BPM_1_1#

G13

BPM_1_2#

F13

BPM_1_3#

B18

BPM_2_0#/RSVD

B20

BPM_2_1#/RSVD

C20

BPM_2_2#/RSVD

B21

BPM_2_3#/RSVD

G5

RSVD

D14

TDI

D13

TDO

B14

TCK

C14

TMS

C16

TRST#

D30

THRMDA_1

E30

THRMDC_1

C30

THRMDA_2/RSVD

D31

THRMDC_2/RSVD

U71D

U71D

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

Add 470PF on H_SMI# for known issue 07/08

+3VS

12

R143

R143
10K_040 2_5%

10K_040 2_5%

PM_EXTT S#0

Close to Processor
pin

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

3

H_PROCH OT#

Close to Processor
pin

+VCCP

R202

R202
68_0402 _5%

68_0402 _5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

H_GTLRE F

C939

C939

placed within 0.5" of processor
pin and 5 mils spacing.

2

PINEVIEW_M

PINEVIEW_M

LVDS

LVDS

1

2

1U_0603_10V6K

1U_0603_10V6K

4 OF 6

4 OF 6

+VCCP

REV = 1.1

REV = 1.1

CPU

CPU

ICH

ICH

H_SMI#

E7

SMI#
A20M#
FERR#

LINT0
LINT1

IGNNE#

STPCLK#

DPRSTP#

DPSLP#

INIT#
PRDY#
PREQ#

THERMTRIP#

PROCHOT#

CPUPWRGOOD

GTLREF

VSS

RSVD
RSVD

BCLKN
BCLKP

BSEL_0
BSEL_1
BSEL_2

VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6

RSVD
RSVD
RSVD
RSVD

RSVD_TP
RSVD_TP

EXTBGREF

R144

R144
1K_0402 _1%

1K_0402 _1%

R155

R155
2K_0402 _1%

2K_0402 _1%

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

H_A20M#

H7

H_FERR#

H6

H_INTR

F10

H_NMI

F11

H_IGNNE#

E5

H_STPCL K#

F8

H_DPRST P#

G6

H_DPSLP #

G10

H_INIT#

G8

XDP_PRD Y#

E11

XDP_PRE Q#

F15

H_THERM TRIP#

E13

H_PROCH OT#

C18

H_PW RGD

W1

H_GTLRE F

A13
H27

L6
E17

CLK_CPU _BCLK#

H10

CLK_CPU _BCLK

J10

CPU_BSE L0

K5

CPU_BSE L1

H5

CPU_BSE L2

K6

CPU_VID0

H30

CPU_VID1

H29

CPU_VID2

H28

CPU_VID3

G30

CPU_VID4

G29

CPU_VID5

F29

CPU_VID6

E29

L7
D20
H13
D18

K9
D19
K7

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

T26T26
T27T27

H_EXTBG REF

H_EXTBG REF

placed within 0.5" of processor
pin and 5 mils spacing.

Pineview(2/3)

Pineview(2/3)

Pineview(2/3)

LA-6221P

LA-6221P

LA-6221P

C940

C940

1U_0603_10V6K

1U_0603_10V6K

H_SMI# (11)
H_A20M# (11)
H_FERR# (11)
H_INTR (11)
H_NMI (11)
H_IGNNE# (11)
H_STPCL K# (11)

H_DPRST P# (13)
H_DPSLP # (13)

H_INIT# (11 )
XDP_PRD Y# (4)
XDP_PRE Q# (4 )

H_THERM TRIP# (11)

H_PW RGD (4,13)

CPU_BSE L0 (8)
CPU_BSE L1 (8)
CPU_BSE L2 (8)

CPU_VID0 (35)
CPU_VID1 (35)
CPU_VID2 (35)
CPU_VID3 (35)
CPU_VID4 (35)
CPU_VID5 (35)
CPU_VID6 (35)

+VCCP

1

2

1

CLK_CPU _BCLK# (8 )
CLK_CPU _BCLK (8)

R244

R244
976_040 2_1%

976_040 2_1%

R156

R156

3.3K_040 2_1%

3.3K_040 2_1%

5 39Thursday, July 01, 2010

5 39Thursday, July 01, 2010

5 39Thursday, July 01, 2010

1.0

1.0

1.0

5

U71E

W14
W16
W18
W19

U71E

T13

VCCGFX

T14

VCCGFX

T16

VCCGFX

T18

VCCGFX

T19

VCCGFX

V13

VCCGFX

V19

VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX

GFX/MCH

GFX/MCH

PINEVIEW_M

PINEVIEW_M

REV = 1.1

REV = 1.1

GFX supply current: 1.38A
Sustained GFX supply current: 1.05A

D D

+0.89V

DDR supply current 2.27A

+1.8V

2.2U_0603_10V6K

2.2U_0603_10V6K

+1.8V

C C

1

+VCCP

C267

C267

2

22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805

C243 to closed U71.U10

Display PLL SFR and CRT DAC s upply
current: 0.154A

B B

+1.8VS

R321

R321

0_0603_5%

0_0603_5%

+VCCP

DAC, GIO, LVDS, & LGIO, DPLL, HMPLL
supply current: 0.33A

A A

2.2U_0603_10V6K

2.2U_0603_10V6K

Modify to 2.2U 05/11

2.2U_0603_10V6K

2.2U_0603_10V6K

2

2

C188

C188

C187

C187

1

1

2.2U_0603_10V6K

2.2U_0603_10V6K

2

2

C186

C186

1

1

2.2U_0603_10V6K

2.2U_0603_10V6K

AK13
AK19

C85

C85

DDR analog supp ly current: 1. 32A

1

C55

C55

C243

C243

2

22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805

1

1

C236

C236

2

2

1U_0603_10V6K

1U_0603_10V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

AA10
AA11

AA19

change to 0402 size

C1160

C1160

1

C76

C76

2

AC31

1

2

@

@

1

C75

C75

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

12

1

1

C192

C192

C189

C189

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

+3VS

GIO supply current: 0.006A

+RING_EAST
+RING_WEST

+0.89V

1

2

C74

C74

C81

C81

2

1

+VCC_CRT_DAC

1

1

C70

C70

C71

C71

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

Close Chipset pin

5

AL11
AL16
AL21
AL25

W10
W11

0.1U_0402_10V6K

0.1U_0402_10V6K

AK9

AK7
AL7

U10

U5
U6
U7
U8
U9
V2
V3
V4

V11

T30

T31
J31

C3
B2
C2

A21

1

C78

C78

2

1U_0402_6.3V6K

1U_0402_6.3V6K

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

VCCCK_DDR
VCCCK_DDR

VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

VCCACK_DDR
VCCACK_DDR

VCCD_AB_DPL

VCCD_HMPLL

VCCSFR_AB_DPL

VCCACRTDAC

VCC_GIO
VCCRING_EAST
VCCRING_WEST
VCCRING_WEST
VCCRING_WEST
VCC_LGI

5 OF 6

5 OF 6

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

2

1

C77

C77

C1223

C1223

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

DDR

DDR

EXP\CRT\PLL

EXP\CRT\PLL

1

+

+

C1224

C1224

2

10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_10V6K

0.1U_0402_10V6K

@

@

4

CPU

CPU

POWER

POWER

LVDS

LVDS

DMI

DMI

VCCSFR_DMIHMPLL

1

C1225

C1225
330U_B2_2.5VM_R15M

330U_B2_2.5VM_R15M

2

4

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCCSENSE
VSSSENSE

VCCA

VCCP

VCCP
VCCP

VCCALVDS
VCCDLVDS

VCCA_DMI
VCCA_DMI
VCCA_DMI

RSVD

VCCP

1U_0402_6.3V6K

A23
A25
A27
B23
B24
B25
B26
B27
C24
C26
D23
D24
D26
D28
E22
E24
E27
F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21

C29
B29
Y2

D4

B4
B3

1U_0402_6.3V6K

1

C428

C428

2

1U_0402_6.3V6K

1U_0402_6.3V6K

Please closed U71

+CPU_CORE

1

+

+

2

1

2

VCCSENSE
VSSSENSE

+VCCP

Processor Core analog supply current: 0.08A

1

2

1

2

C1161

C1161

0.1U_0402_10V6K

0.1U_0402_10V6K

VCCSENSE (35)
VSSSENSE (35)

C391

C391

0.01U_0402_16V7K

0.01U_0402_16V7K

+CPU_CORE

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

C430

C430

C429

C429

2

2

Change from SGA20331D20 to SGA20331E10 060810

2 x 330uF(9mohm/2)

1

+

C275

C275

330U 2.5V Y

330U 2.5V Y

C1154

C1154

22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805

+

2

+CPU_CORE

1

1

C1152

C1152

22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805

2

2

+1.5VS

Please closed U 71.Y2

Please closed U 71.D4

+VCC_ALVD

V30

+VCC_DLVD

W31

T1
T2
T3

P2
AA1

E2

LVDS supply cur rent: 0.06A

+VCC_DMI

DMI analog supply current: 0.48A

+DMI_HMPLL

1

2

T56T56

SFR & DMIHMPLL supply current: 0.104A

+VCCP

C1162

C1162

0.1U_0402_10V6K

0.1U_0402_10V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C431

C431

2

1U_0402_6.3V6K

1U_0402_6.3V6K

C278

C278

330U 2.5V Y

330U 2.5V Y

C1153

C1153

22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805

3

+VCCP

R20

R20

1 2

0_0603_5%

0_0603_5%

R21

R21

1 2

0_0603_5%

0_0603_5%

1U_0603_10V6K

1U_0603_10V6K

R28

R28

1 2

0_0805_5%

0_0805_5%

VCCSENSE

VSSSENSE

+1.8VS

R25

R25

1 2

MBK1608601YZF_2P

MBK1608601YZF_2P

R18

R18

1 2

0_0603_5%

0_0603_5%

100NH +-5% LL1608-FSLR10J

100NH +-5% LL1608-FSLR10J

1

C1155

C1155
1U_0603_10V6K

1U_0603_10V6K

2

R27

R27

1 2

0_0603_5%

0_0603_5%

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

3

1

C242

C242
1U_0603_10V6K

1U_0603_10V6K

2

1

C64

C64

2

1

1U_0603_10V6K

1U_0603_10V6K

C68

C68

1U_0603_10V6K

1U_0603_10V6K

2

+CPU_CORE

R32

R32

1 2

100_0402_1%

100_0402_1%

R31

R31

1 2

100_0402_1%

100_0402_1%

+VCC_CRT_DAC

1

C239

C239
22UF 6.3V M X5R 0805

22UF 6.3V M X5R 0805

2

Change 22uF 080 5 061010

+DMI_HMPLL

1

C69

C69
1U_0603_10V6K

1U_0603_10V6K

2

R26

R26

1 2

+VCC_DLVD

1

C235

C235
1U_0603_10V6K

1U_0603_10V6K

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+RING_EAST

+RING_WEST

1

C241

C241
1U_0603_10V6K

1U_0603_10V6K

2

+VCC_DMI

1

C237

C237

2

+VCC_ALVD

1

C56

C56
22UF 6.3V M X5R 0805 H1.25

22UF 6.3V M X5R 0805 H1.25

2

2

1

PINEVIEW_M

PINEVIEW_M

U71F

U71F

REV = 1.1

REV = 1.1

A11

VSS

A16

VSS

A19

VSS

A29

RSVD_NCTF

A3

RSVD_NCTF

A30

RSVD_NCTF

A4

RSVD_NCTF

AA13

VSS

AA14

VSS

AA16

VSS

AA18

VSS

AA2

VSS

AA22

VSS

AA25

VSS

AA26

VSS

AA29

VSS

AA8

VSS

AB19

VSS

AB21

VSS

AB28

VSS

AB29

VSS

AB30

VSS

AC10

VSS

AC11

VSS

AC19

VSS

AC2

VSS

AC21
AC28
AC30
AD26

AD5

AE1
AE11
AE13
AE15
AE17
AE22
AE31
AF11
AF17
AF21
AF24
AF28
AG10

AG3
AH18
AH23
AH28

AH4

AH6

AH8

AJ1
AJ16
AJ31

AK1

AK2
AK23
AK30
AK31

AL13
AL19

AL2
AL23
AL29

AL3
AL30

AL9

B13

B16

B19

B22

B30

B31

B5
B9

C1
C12
C21
C22
C25
C31
D22

E1

E10
E19
E21
E25

E8

F17
F19

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

GND

GND

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS

6 OF 6

6 OF 6

PINEVIEW-M_FCBGA8559

PINEVIEW-M_FCBGA8559

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Pineview(3/3)

Pineview(3/3)

Pineview(3/3)

F24

VSS

F28

VSS

F4

VSS

G15

VSS

G17

VSS

G22

VSS

G27

VSS

G31

VSS

H11

VSS

H15

VSS

H2

VSS

H21

VSS

H25

VSS

H8

VSS

J11

VSS

J13

VSS

J15

VSS

J4

VSS

K11

VSS

K13

VSS

K19

VSS

K26

VSS

K27

VSS

K28

VSS

K30

VSS

K4

VSS

K8

VSS

L1

VSS

L13

VSS

L18

VSS

L22

VSS

L24

VSS

L25

VSS

L29

VSS

M28

VSS

M3

VSS

N1

VSS

N13

VSS

N18

VSS

N24

VSS

N25

VSS

N28

VSS

N4

VSS

N5

VSS

N8

VSS

P13

VSS

P14

VSS

P16

VSS

P18

VSS

P19

VSS

P21

VSS

P3

VSS

P4

VSS

R25

VSS

R7

VSS

R8

VSS

T11

VSS

U22

VSS

U23

VSS

U24

VSS

U27

VSS

V14

VSS

V16

VSS

V18

VSS

V28

VSS

V29

VSS

W13

VSS

W2

VSS

W23

VSS

W25

VSS

W26

VSS

W28

VSS

W30

VSS

W4

VSS

W5

VSS

W6

VSS

W7

VSS

Y28

VSS

Y3

VSS

Y4

VSS

T29

VSS

LA-6221P

LA-6221P

LA-6221P

1

6 39Thursday, July 01, 2010

6 39Thursday, July 01, 2010

6 39Thursday, July 01, 2010

1.0

1.0

1.0

5

DDR_A_DQS#[0..7](4)

DDR_A_D[0..63](4)

DDR_A_DM[0..7](4)

DDR_A_DQS[0..7](4)

DDR_A_MA[0..14](4)

D D

+1.8V

2

C128

C128

C129

C129

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

1

+

+

@

@

C94

C94

C106

C106

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

C C

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

+0.9VS

1

1

1

C117

C117

C119

C119

2

B B

A A

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_MA13
M_ODT0
DDR_CS#0
DDR_A_RAS#

DDR_A_BS0
DDR_A_MA10
DDR_A_MA1
DDR_A_MA3

M_ODT1
DDR_CS#1
DDR_A_CAS#
DDR_A_WE#

0.1U_0402_16V4Z

0.1U_0402_16V4Z

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

C86

C86

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RP6

RP6

1 8
2 7
3 6
4 5

RP2

RP2

1 8
2 7
3 6
4 5

RP3

RP3

1 8
2 7
3 6
4 5

C121

C121

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C87

C87

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

47_0804_8P4R_5%

2

C110

C110

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C105

C105

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C88

C88

C122

C122

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RP5

RP5

18
27
36
45

RP4

RP4

18
27
36
45

RP1

RP1

DDR_A_MA5

18
27
36

DDR_A_MA12

45

47_0804_8P4R_5%

47_0804_8P4R_5%

2

C109

C109

1

1

C108

C108

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

DDR_A_BS1

DDR_A_MA0
DDR_A_MA2

DDR_A_MA4

DDR_A_MA6
DDR_A_MA7
DDR_A_MA11

DDR_A_MA14

DDR_A_MA8
DDR_A_MA9

2

C130

C130

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C107

C107

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C91

C91

C115

C115

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C90

C90

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place near JDIM1

1

C120

C120

2

4

1

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place these resistor
closely DIMMA,all
trace length<750 mil

1

C89

C89

C118

C118

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

3

09/03

+DIMM_VREF

+1.8V

12

R61

R61

1K_0402_1%

1K_0402_1%

+DIMM_VREF

12

R62

R62

1K_0402_1%

1K_0402_1%

1

C439

C439

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C440

C440

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C441

C441

C442

C442

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Share +DIMM_VREF for

1.DDRII VREF

2.GMCH SM_VREF_0
SM_VREF_1

1

1

C445

C443

C443

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C445

C444

C444

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C116

C116

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

1

C446

C446

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C141

C141

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

20mils

1

C112

C112

2.2U 6.3V M X5R 0402

2.2U 6.3V M X5R 0402

2

DDR_CKE0(4)

DDR_A_BS2(4)

DDR_A_BS0(4)
DDR_A_WE#(4)

DDR_A_CAS#(4)

DDR_CS#1(4)

M_ODT1(4)

CLK_SMBDATA(8,17,18,26)

CLK_SMBCLK(8,17,18,26)

Follow Intel Layout checklist, add C141 05/12

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C111

C111

DDR_A_D0
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#
DDR_CS#1

M_ODT1

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

CLK_SMBDATA
CLK_SMBCLK

2

+1.8V +1.8V

CONN@

CONN@

JDIM1

JDIM1

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

G1

FOX_AS0A426-N4RN-7F

FOX_AS0A426-N4RN-7F

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD

ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SA0

SA1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

202

G2

DIMMA

1

Change to SP07F001720 04/30

DDR_A_D4
DDR_A_D5

DDR_A_DM0

DDR_A_D6
DDR_A_D7

DDR_A_D12
DDR_A_D13

DDR_A_DM1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_CKE1

DDR_A_MA14

DDR_A_MA11
DDR_A_MA7
DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#
DDR_CS#0

M_ODT0
DDR_A_MA13

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

R66 10K_0402_5%R66 10K_0402_5%

1 2

R65 10K_0402_5%R65 10K_0402_5%

1 2

R64

R64

M_CLK_DDR0 (4)
M_CLK_DDR#0 (4)

1 2

DDR_CKE1 (4)

DDR_A_BS1 (4)
DDR_A_RAS# (4)
DDR_CS#0 (4)

M_ODT0 (4)

M_CLK_DDR1 (4)
M_CLK_DDR#1 (4)

0_0402_5%

0_0402_5%

PM_EXTTS#0 (5)

DDR_CKE1

DDR_A_BS2

DDR_CKE0

R163

R163

1 2

47_0402_5%

47_0402_5%
R60

R60

1 2

47_0402_5%

47_0402_5%
R59

R59

1 2

47_0402_5%

47_0402_5%

Layout Note:
Place these resistor
closely DIMMA,all
trace length
Max=1.3"

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRII-SODIMMA

DDRII-SODIMMA

DDRII-SODIMMA

LA-6221P

LA-6221P

LA-6221P

7 39Thursday, July 01, 2010

7 39Thursday, July 01, 2010

7 39Thursday, July 01, 2010

1

1.0

1.0

1.0

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

MHz

33.30

14.318 96.0 48.0

DOT_96
MHz

USB
MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

D D

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1

+3VS

R435

R435

10K_0402_5%

10K_0402_5%

1 2

CLK_EN

13

Q31

Q31

R52

R52

FSC

R76

R76

2.2K_0402_5%

2.2K_0402_5%

FSA

1 2

R69

R69
0_0402_5%

0_0402_5%

1K_0402_1%

1K_0402_1%

1 2

1 2

R119

R119
0_0402_5%

0_0402_5%

R98

R98
10K_0402_5%

10K_0402_5%

1 2

R84

R84
0_0402_5%

0_0402_5%

2

DTC115EUA_SC70-3

DTC115EUA_SC70-3

+VCCP

12

R68

@R68

@

470_0402_5%

470_0402_5%

12

12

R73

R73

1K_0402_5%

1K_0402_5%

@

@

+VCCP

12

R113

R113

470_0402_5%

470_0402_5%

12

R110

R110

@

@

0_0402_5%

0_0402_5%

+VCCP

12

R92

@R92

@

470_0402_5%

470_0402_5%

12

12

R87

R87

@

@

0_0402_5%

0_0402_5%

CLK_ENABLE#(35)

C C

Rename 06/06

CPU_BSEL0(5)

Add 1K follow
Intel check list 05/11

B B

A A

Follow Intel check list change to 27P 06/05

FSB

CPU_BSEL1(5)

CPU_BSEL2(5)

Follow Vendor check change to 22P 10/16

C161 22P 50V J NPO 0402 C161 22P 50V J NPO 0402

C164 22P 50V J NPO 0402 C164 22P 50V J NPO 0402

Reserved

+3VS

+1.5VS

Change C1350 C1351 to 0402 type 06/24

@

@

R86

R86

TPM@

TPM@

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#
Pin28/29 : LCDCLK / LCDCLK #

For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only) 1=Overclocking of CPU and SRC NOT allowed

CLK_XTAL_IN

12

Y1

Y1

14.318MHZ_16PF_7A14300083

14.318MHZ_16PF_7A14300083

CLK_XTAL_OUT

1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS

Routing the trace at least 10mil

5

4

Change C174 C175 to 10U_0603 05/14

1 2

+3VS

R1370_0603_5%R1370_0603_5%

R138

R138

+VCCP

1 2

0_0603_5%

0_0603_5%

Add C1145 C1146 C1147 for EMI 06/12

Change co-lay net name to +1.5VM_CK505 07/03

@

@

1 2

R1348 0_0603_5%

R1348 0_0603_5%

10U_0603_6.3V6M

10U_0603_6.3V6M

CLK_48M_CR(22)

CLK_PCH_48M(12)

CLK_PCH_14M(13)

CLK_PCI_TPM(26)

CLK_PCI_LPC(24)

CLK_PCI_PCH(11)

+3VS+3VS +3VS

+1.5VM_CK505

1

C1119

C1119

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+VCCP

+1.5VS

CLK_48M_CR

C389

C389

R95

R95

10K_0402_5%

10K_0402_5%

@

@

1 2

R90

R90

10K_0402_5%

10K_0402_5%

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C140

C140

2

R1350 0_0402_5%

R1350 0_0402_5%

R1351 0_0402_5%R1351 0_0402_5%

@

@

C386

C386

10P_0402_50V8J

10P_0402_50V8J

1 2

1 2

C390 10P_0402_50V8JC390 10P_0402_50V8J

CLK_PCI_TPM

1

2

27P_0402_50V8J

27P_0402_50V8J

27P_0402_50V8J

27P_0402_50V8J

1 2

1 2

1 2

R1349 0_0603_5%R1349 0_0603_5%

1

47P_0402_50V8J

47P_0402_50V8J

C1147

C1147

2

R85

R85

10K_0402_5%

10K_0402_5%

@

@

1 2

ITP_EN PCI4_SEL PCI2_TME

R89

R89

10K_0402_5%

10K_0402_5%

1 2

4

3

+3VM_CK505

1

C1145

C1145

2

47P_0402_50V8J

47P_0402_50V8J

+1.05VM_CK505

1

C1146

C1146
47P_0402_50V8J

47P_0402_50V8J

2

1

C174

C174

10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C175

C175

10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C172

C172

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C139

C139

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C138

C138

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C167

C167

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Low Power (Silego : SA00003H730)

IDT SA00003H610

1

C160

C160

2

@

@

1 2

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R74

R74

1 2

22_0402_5%

22_0402_5%
R75

R75

1 2

33_0402_5%

33_0402_5%

R104

R104

1 2

33_0402_5%

33_0402_5%

VGATE(5,13,24,35)

R1487

R1487

1 2

R86

R86

1 2

R80

R80

1 2

1

C388

C388

2

R71

R71

10K_0402_5%

10K_0402_5%

@

@

R77

R77

10K_0402_5%

10K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C173

C173

@

@

CLK_EN

H_STP_CPU#(13)

H_STP_PCI#(13)

PCI2_TME

TPM@

TPM@

22_0402_5%

22_0402_5%

33_0402_5%

33_0402_5%

33_0402_5%

33_0402_5%

+3VM_CK505

1

C169

C169

2

+1.05VM_CK505

1

2

FSA

FSB

FSC

1 2

R371

R371

0_0402_5%

0_0402_5%

@

@

CLK_XTAL_IN

CLK_XTAL_OUT

PCI4_SEL

ITP_EN

U4

U4

55

VDD_SRC

6

VDD_REF

12

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

VSS

SLG8SP556VTR_QFN72_10X10

SLG8SP556VTR_QFN72_10X10

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FR OM THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

1

C148

C148

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C137

C137

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2007/10/15 2008/10/15

2007/10/15 2008/10/15

2007/10/15 2008/10/15

1

2

CPU_0

CPU_0#

CPU_1

CPU_1#

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK/27M

LCDCLK#/27M_SS

SRC_2

SRC_2#

SRC_3

SRC_3#

SRC_4

SRC_4#

SRC_6

SRC_6#

SRC_7

SRC_7#

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

SRC_9

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3#

CLKREQ_4#

CLKREQ_6#

CLKREQ_7#

CLKREQ_9#

SLKREQ_10#

CLKREQ_11#

USB_1/CLKREQ_A#

Compal Secret Data

Compal Secret Data

Compal Secret Data

C146

C146

0.1U_0402_16V4Z

0.1U_0402_16V4Z

9

SDA

10

SCL

71

70

68

67

24

25

28

29

32

33

35

36

39

40

57

56

61

60

64

63

44

45

50

51

48

47

37

41

58

65

43

49

46

21

Deciphered Date

Deciphered Date

Deciphered Date

1

C165

C165

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CLK_SMBDATA

CLK_SMBCLK

CLK_CPU_BCLK

CLK_CPU_BCLK#

CLK_CPU_HPLCLK

CLK_CPU_HPLCLK#

CPU_DREFCLK

CPU_DREFCLK#

CPU_SSCDREFCLK

CPU_SSCDREFCLK#

CLK_PCIE_WLAN

CLK_PCIE_WLAN#

CLK_PCIE_SATA

CLK_PCIE_SATA#

CLK_PCIE_PCH

CLK_PCIE_PCH#

CLK_CPU_EXP

CLK_CPU_EXP#

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLK_PCIE_WWAN

CLK_PCIE_WWAN#

WLAN_CLKREQ#

LAN_CLKREQ#

WWAN_CLKREQ#

2

1

+3VS

R72

R72

2.2K_0402_5%

2.2K_0402_5%

Q10A

Q10A

6 1

2

5

3

4

Q10B

Q10B

SRC PORT LIST

PORT

SRC1

CPU_SSCDREFCLK
SRC2
SRC3

PCIE_WLAN

SRC4

PCIE_SATA

SRC6

PCIE_PCH

SRC7

CPU_ITP

SRC8
SRC9

CLK_CPU_EXP
SRC10

PCIE_LAN
SRC11

PCIE_WWAN

WLAN_CLKREQ#

LAN_CLKREQ#

WWAN_CLKREQ#

R121 10K_0402_5%R121 10K_0402_5%

R1449 10K_0402_5%R1449 10K_0402_5%

R107 10K_0402_5%R107 10K_0402_5%

REQ PORT LIST

REQ_3#
REQ_4#

PCH_SMBDATA(13)

PCH_SMBCLK(13)

CLK_SMBDATA (7,17,18,26)

CLK_SMBCLK (7,17,18,26)

CLK_CPU_BCLK (5)

CLK_CPU_BCLK# (5)

CLK_CPU_HPLCLK (5)

CLK_CPU_HPLCLK# (5)

CPU_DREFCLK (5)

CPU_DREFCLK# (5)

CPU_SSCDREFCLK (5)

CPU_SSCDREFCLK# (5)

CLK_PCIE_WLAN (18)

CLK_PCIE_WLAN# (18)

CLK_PCIE_SATA (11)

CLK_PCIE_SATA# (11)

CLK_PCIE_PCH (12)

CLK_PCIE_PCH# (12)

CPU_ITP (4)

CPU_ITP# (4)

CLK_CPU_EXP (4)

CLK_CPU_EXP# (4)

CLK_PCIE_LAN (16)

CLK_PCIE_LAN# (16)

CLK_PCIE_WWAN (17)

CLK_PCIE_WWAN# (17)

Add WWAN_CLKREQ# 05/04

WLAN_CLKREQ# (18)

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

+3VS

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

Modify CLK SRC Port list 05/12

REQ_6#
REQ_7#

LAN_CLKREQ# (16)

WWAN_CLKREQ# (17)

REQ_9#
REQ_10#
REQ_11#
REQ_A#

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Clock Generator CK505

Clock Generator CK505

Clock Generator CK505

LA-6221P

LA-6221P

LA-6221P

1

R91

R91

2.2K_0402_5%

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

DEVICE

12

12

12

DEVICEPORT

PCIE_WLAN

PCIE_LAN
PCIE_WWAN

8 39Thursday, July 01, 2010

8 39Thursday, July 01, 2010

8 39Thursday, July 01, 2010

+3VS

1.0

1.0

1.0

5

4

3

2

1

Change R577 to 0402 SIZE 06/16

NTR4101PT1G 1P SOT-23-3

NTR4101PT1G 1P SOT-23-3

+LCDVDD

12

R577

D D

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

GMCH_ENVDD(5)

C C

470_0402_5%

470_0402_5%

R174

R174

100K_0402_5%

100K_0402_5%

R577

Q4

Q4

1 2

+3VS

100K_0402_5%

100K_0402_5%

R578

R578

0.047U_0402_16V4Z

0.047U_0402_16V4Z

1 2

+LCDVDD_R

13

D

D

2

G

G

R579 4.7K_0402_5%

2

R579 4.7K_0402_5%

13

Q5

Q5
DTC115EUA_SC70-3

DTC115EUA_SC70-3

S

S

1

C1108

C1108

2

12

+LCDVDD

W=20mils W=20mils

C1105

C1105

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C1106

C1106

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

D

D

1 3

1

2

Q3

Q3

2

Change C1106 to 4.7U_0603 05/14

+3VS

S

S

G

G

1

C1107

C1107

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

+3VS

USB20_N3_1

+CAM_VCC

Modify 05/11

USB20_N3_1

USB20_P3_1

1

1

C1168

C1168

2

2

@

@

@

@

CMOS & LCD/PANEL BD. Conn.

+3VS

C1167

C1167

Modify JLVDS1 08/04

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

R1181

1 2

LVDS_PWM

BKOFF#

C1156

C1156

R1181

1 2

2.2K_0402_5%

2.2K_0402_5%

LVDS_SCL (5)

LVDS_SDA (5)

LVDS_PWM

12

12

C1109

C1109

1000P 50V K X7R 0402

1000P 50V K X7R 0402

For RF

R1180

LVDS_SCL

LVDS_SDA

(20 MIL)

B+

C1112

C1112
100P_0402_50V8J

100P_0402_50V8J

R1180

2.2K_0402_5%

2.2K_0402_5%

220P_0402_50V7K

220P_0402_50V7K

JLVDS1

JLVDS1

1
2

B B

Add JLVDS.31//J LVDS.32/JLVDS. 34/JLVDS.35 to GND.042910.

A A

3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

31

20
21

32

22
23

34

24
25

35

26
27

36

28
293033

ACES_88341-3000B001

ACES_88341-3000B001

CONN@

CONN@

USB20_P3_1
USB20_N3_1

LVDS_ACLK

LVDS_ACLK#

LVDS_A2

LVDS_A2#

LVDS_A1

LVDS_A1#

LVDS_A0

LVDS_A0#

LVDS_SDA
LVDS_SCL

BKOFF#

LVDS_PWM

+LCDVDD_L

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

+LEDVDD

1 2

camera

L2

L2

+3VS

+CAM_VCC

DMIC_CLK (19)

DMIC_DATA (19)

LVDS_ACLK (5)

LVDS_ACLK# (5)

LVDS_A2 (5)

LVDS_A2# (5)

LVDS_A1 (5)

LVDS_A1# (5)

LVDS_A0 (5)

LVDS_A0# (5)

BKOFF# (24)
LVDS_PWM

+3VS

+LCDVDD

L1

L1

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

2

C1111

C1111
330P_0402_50V7K

330P_0402_50V7K

1

12

1

2

Add for RF 07/02

J1

J1

112

JUMP_43X39

JUMP_43X39

@

@

PJUSB208_SOT23-6

PJUSB208_SOT23-6

6

CH3

5

Vp

4

CH4

@

@

2

2

3

3

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805

R213

R213

1 2

0_0402_5%@

0_0402_5%@

R67

R67

1 2

0_0402_5%

0_0402_5%

2

R11820_0402_5% R11820_0402_5%

@ L3

@

R11830_0402_5% R11830_0402_5%

CH2

Vn

CH1

D6

D6

12

L3

1

4

12

DPST_PWM

INVT_PWM

0.1U_0402_16V4Z

0.1U_0402_16V4Z

3

2

USB20_P3_1

1

USB20_N3

1

USB20_P3

USB20_P3

4

+CAM_VCC

1

C1113

C1113

2

Add D6 05/14

USB20_N3 (12)

USB20_P3 (12)

DPST_PWM (5)

INVT_PWM (24)

LCD POWER CIRCUIT

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LVDS /INVERTER

LVDS /INVERTER

LVDS /INVERTER

LA-6221P

LA-6221P

LA-6221P

9 39Thursday, July 01, 2010

9 39Thursday, July 01, 2010

9 39Thursday, July 01, 2010

1

1.0

1.0

1.0

A

B

C

D

E

Close to CRT CONN for ESD, NU on 0623.

2

2

3

1 1

Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615

L15

L15

BK1608LL121-T_2P

BK1608LL121-T_2P

GMCH_CRT_R(5)

GMCH_CRT_G(5)

GMCH_CRT_B(5)

2 2

GMCH_CRT_HSYNC(5)

Place closed to chipset

GMCH_CRT_VSYNC(5)

R255

R255

150_0402_1%

150_0402_1%

12

12

R250

R250

R253

R253

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

1 2

C301 0.1U_0402_16V4ZC301 0.1U_0 402_16V4Z

1 2

C298 0.1U_0402_16V4ZC298 0.1U_0 402_16V4Z

12

+5VS

1

5

U11

U11

P

4

OE#

A2Y

G

SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

3

+5VS

1

5

U10

U10

P

4

OE#

A2Y

G

SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5

3

C310

C310

10P_0402_50V8J

10P_0402_50V8J

1

1

C303

C303

C308

C308

2

2

10P_0402_50V8J

10P_0402_50V8J

1 2

L14

L14

BK1608LL121-T_2P

BK1608LL121-T_2P

1 2

L12

L12

BK1608LL121-T_2P

BK1608LL121-T_2P

1 2

1

2

10P_0402_50V8J

10P_0402_50V8J

C307

C307

10P_0402_50V8J

10P_0402_50V8J

1

2

1

C306

C306
10P_0402_50V8J

10P_0402_50V8J

2

1

2

1

C304

C304
10P_0402_50V8J

10P_0402_50V8J

JVGA_HS

JVGA_VS

3

D18

D18

@

@

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

D17

D17

@

@

1

RED

PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

GREEN

BLUE

Add R1283 R1284
Change R24 7 R249 to 10 ohm
Add @ on U10 U11 C3 01 C298 06/08

3 3

GMCH_CRT_DATA(5)

GMCH_CRT_CLK(5)

4 4

A

R248

R248

2.2K_0402_5%

2.2K_0402_5%

+3VS

12

12

2.2K_0402_5%

2.2K_0402_5%

R245

R245

+3VS

R246

R246

2.2K_0402_5%

2.2K_0402_5%

5

3

4

2

Q24B

Q24B

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

Q24A

Q24A
2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

B

+CRT_VDD

12

12

R251

R251

2.2K_0402_5%

2.2K_0402_5%

VGA_DDC_DAT

VGA_DDC_CLK

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CRT PORT

+5VS

D3

D3

2 1

RB491D_SC59-3

RB491D_SC59-3

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

C

W=40mils

+RCRT_VCC +C RT_VDD

12/29

F1

F1

21

1.1A_6VDC_FUSE

1.1A_6VDC_FUSE

RED

VGA_DDC_DAT
GREEN

JVGA_HS
BLUE

JVGA_VS

VGA_DDC_CLK

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C142

C142

1 2

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070546FR015M21RZR

SUYIN_070546FR015M21RZR

CRT_DET#

+CRT_VDD

D

Change JCRT1 P/N to SP010906182 06/22

JCRT1

CONN@JCR T1

CONN@

16
17

CRT_DET# (13)

R1103

R1103
100K_0402_5%

100K_0402_5%

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CRT PORT

CRT PORT

CRT PORT

LA-6221P

LA-6221P

LA-6221P

E

0.2

0.2

10 39Thursday, July 01, 2010

10 39Thursday, July 01, 2010

10 39Thursday, July 01, 2010

0.2

5

CLK_PCI_P CH

12

R336

R336

@

@

33_0402 _5%

D D

33_0402 _5%

1

C432

C432

@

@

22P_040 2_50V8J

22P_040 2_50V8J

2

For EMI, close to TigerPoint

4

3

2

SATA_LE D#

GATEA20

SERIRQ

KB_RST#

R45

R45

10K_040 2_5%

10K_040 2_5%

R293

R293

10K_040 2_5%

10K_040 2_5%

R312

R312

10K_040 2_5%

10K_040 2_5%

R41

R41

1 2

10K_040 2_5%

10K_040 2_5%

1

+3VS

+3VS

PCI_DEVSE L#

R233

8.2K_040 2_5%

R366

R366

@

@

8.2K_040 2_5%

R363

R363
10K_040 2_5%

10K_040 2_5%

@

@

STRAP2#
GPIO17

CLK_PCI_P CH(8)

C C

R362

R362

10K_040 2_5%

10K_040 2_5%

@

@

10K_040 2_5%

B B

10K_040 2_5%

G_SENSO R_INT#(26)

0

1

A A

1

R233

R2358 .2K_0402_5% R2358.2K_040 2_5%

R2368 .2K_0402_5% R2368.2K_040 2_5%
R2298 .2K_0402_5% R2298.2K_040 2_5%
R2078 .2K_0402_5% R2078.2K_040 2_5%
R2318 .2K_0402_5% R2318.2K_040 2_5%
R2308 .2K_0402_5% R2308.2K_040 2_5%
R2378 .2K_0402_5% R2378.2K_040 2_5%

R2328 .2K_0402_5% R2328.2K_040 2_5%
R2098 .2K_0402_5% R2098.2K_040 2_5%

R2918 .2K_0402_5% R2918.2K_040 2_5%
R2921 0K_0402_5% R29210K_040 2_5%

R2388 .2K_0402_5% R2388.2K_040 2_5%
R2058 .2K_0402_5% R2058.2K_040 2_5%
R2068 .2K_0402_5% R2068.2K_040 2_5%
R2088 .2K_0402_5% R2088.2K_040 2_5%
R2108 .2K_0402_5% R2108.2K_040 2_5%
R2118 .2K_0402_5% R2118.2K_040 2_5%
R2128 .2K_0402_5% R2128.2K_040 2_5%
R2048 .2K_0402_5% R2048.2K_040 2_5%

R3648 .2K_0402_5% R3648.2K_040 2_5%
R3658 .2K_0402_5% R3658.2K_040 2_5%

G SENSOR @ R1472

G SENSOR @

R1472

1 2

0_0402_ 5%

0_0402_ 5%

STRAP1#
GPIO48

1

0

1

CLK_PCI_P CH

PCI_IRDY#

PCI_SERR#
PCI_STOP#
PCI_PLOCK #
PCI_TRDY#
PCI_PERR#
PCI_FRAME #

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_PIRQE#

Boot BIOS

SPI

PCI

LPC

G16

G14

M13

B15

A23

C22
B11
F14

A10
D10
A16

A18
E16

A20

C15

H10

D11

A5

J12

B7

A8

A2

C9

B2

D7

B3

E8
D6
H8

F8

K9

PAR
DEVSEL#
PCICLK
PCIRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#

GNT1#
GNT2#

REQ1#
REQ2#

GPIO48/STRAP1#
GPIO17/STRAP2#
GPIO22
GPIO1

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

STRAP0#
RSVD01
RSVD02

U72A

U72A

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

TGP

TGP

PCI

PCI

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8

AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

1

1

B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1

H16
M15
C13
L16

+3VS

R294 8.2K_0 402_5%R2 94 8.2K_0 402_5%

R294 be placed <200 mils to U72.AD23

R12
AE20
AD17
AC15
AD18

Y12
AA10
AA12

Y10
AD15

W10

V12
AE21
AE18
AD19

U12

AC17
AB13
AC13
AB15

Y14

AB16
AE24
AE23

AA14

V14

AD16
AB11
AB10

AD23

U72C

U72C

RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18

RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

RSVD24
RSVD25
RSVD26

RSVD27
RSVD28

RSVD29
RSVD30
RSVD31

GPIO36

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

TGP

TGP

SATA0RXN
SATA0RXP
SATA0TXN

SATA1RXN
SATA1RXP
SATA1TXN

SATA

SATA

SATA_CLKN

SATA_CLKP

SATARBIAS#

SATARBIAS

HOST

HOST

THRMTRIP#

SATA0TXP

SATA1TXP

SATALED#

A20GATE

A20M#

CPUSLP#

IGNNE#

INIT3_3V#

INIT#
INTR

FERR#

NMI

RCIN#

SERIRQ

SMI#

STPCLK#

3

3

AE6
AD6
AC7
AD7
AE8
AD8
AD9
AC9

AD4
AC4

AD11
AC11
AD25

U16
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
AC21
AA16
AA21
V18
AA20

SATA_ITX_ C_DRX_N0_R
SATA_ITX_ C_DRX_P0_R

Placed within 500 mils of Tiger point chipset pin.

CLK_PCIE_ SATA# (8)
CLK_PCIE_ SATA (8)

SATARBIAS

SATA_LE D#

GATEA20
H_A20M#

H_IGNNE#

H_INIT#
H_INTR
H_FERR#
H_NMI
KB_RST#
SERIRQ
H_SMI#
H_STPCL K#

SATA_LE D# (23 )

GATEA20 (2 4)
H_A20M# (5)

H_IGNNE# (5)

H_INIT# (5)
H_INTR (5)
H_FERR# (5)
H_NMI (5)
KB_RST# (24)
SERIRQ (24,26)
H_SMI# (5)
H_STPCL K# (5)

SATA_DT X_C_IRX_N0 (15 )
SATA_DT X_C_IRX_P0 (15)

0.01U_04 02_16V7K

0.01U_04 02_16V7K

R154 24.9_0 402_1%R154 24.9 _0402_1%

R164 has to be within 1" from the
Tiger Point chipset.

+VCCP

12

C320.01U_0402_ 16V7K C320.01U_0402_1 6V7K
C31

C31

R164

R164

56_0402 _5%

56_0402 _5%

SATA_ITX_ C_DRX_N0 (15 )
SATA_ITX_ C_DRX_P0 (15)

H_THERM TRIP# (5)

ESD request

@

+VCCP

R198

R198
56_0402 _5%

56_0402 _5%

H_FERR#

Close to TigerPoint
pin

H_A20M#

H_IGNNE#

H_INIT#

H_INTR

H_FERR#

H_NMI

H_SMI#

H_STPCL K#

C450

C450

C451

C451

C452

C452

C453

C453

C454

C454

C455

C455

C456

C456

C457

C457

@

1 2

@

@

1 2

@

@

1 2

@

@

1 2

@

@

1 2

@

@

1 2

@

@

1 2

@

@

1 2

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

100P_04 02_50V8J

Security Class ification

Security Class ification

Security Class ification

2006/08/ 18 2007/8/1 8

2006/08/ 18 2007/8/1 8

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/ 18 2007/8/1 8

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Tigerpoint(1/4)

Tigerpoint(1/4)

Tigerpoint(1/4)

LA-6221P

LA-6221P

LA-6221P

11 39Thursday, July 01, 2010

11 39Thursday, July 01, 2010

11 39Thursday, July 01, 2010

1

1.0

1.0

1.0

5

4

3

2

1

USB Port List

0

USB Left1

PCIE Port List

D D

1

2

3

LAN

WLAN

WWAN

4

TGP

U72B

U72B

DMI_TX#0(4)
DMI_TX0(4)
DMI_RX#0(4)
DMI_RX0(4)
DMI_TX#1(4)
DMI_TX1(4)
DMI_RX#1(4)
DMI_RX1(4)

C C

PCIE_DTX_C_IRX_N1(16)

LAN

WLAN

WWAN

B B

PCIE_DTX_C_IRX_P1(16)

PCIE_ITX_C_DRX_N1(16)

PCIE_ITX_C_DRX_P1(16)
PCIE_DTX_C_IRX_N2(18)
PCIE_DTX_C_IRX_P2(18)

PCIE_ITX_C_DRX_N2(18)

PCIE_ITX_C_DRX_P2(18)
PCIE_DTX_C_IRX_N3(17)
PCIE_DTX_C_IRX_P3(17)

PCIE_ITX_C_DRX_N3(17)

PCIE_ITX_C_DRX_P3(17)

C565

C565

0.1U_0402_10V7K

0.1U_0402_10V7K

C566 0.1U_0402_10V7KC566 0.1U_0402_10V7K

C53

C53

0.1U_0402_10V7K

0.1U_0402_10V7K

C49 0.1U_04 02_10V7KC49 0.1U_0402_10V7K

C52

C52

0.1U_0402_10V7K

0.1U_0402_10V7K

C54 0.1U_0402_ 10V7KC54 0.1U_0402_10V7K

R153 Please clo sed U72
PIN within 500 mils

+1.5VS

R153 24.9_0402_1%R153 24.9_0402_1%

1 2

CLK_PCIE_PCH#(8)
CLK_PCIE_PCH(8)

PCIE_ITX_C_DRX_N1_R

PCIE_ITX_C_DRX_N2_R
PCIE_ITX_C_DRX_P2_R

PCIE_ITX_C_DRX_N3_R
PCIE_ITX_C_DRX_P3_R

R23
R24

U23
U24

M18
M19

M21

N25
N24

H24

W23
W24

P21
P20
T21
T20
T24
T25
T19
T18

V21
V20
V24
V23

K21
K22

J23
J24

K24
K25
L23
L24
L22

P17
P18

J22

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4

DMI_ZCOMP
DMI_IRCOMP

DMI_CLKN
DMI_CLKP

TIGERPOINT_ES1_BGA360

TIGERPOINT_ES1_BGA360

TGP

USB20_N0

H7

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P

DMI PCI-E

DMI PCI-E

USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P

USB

USB

OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

USBRBIAS

USBRBIAS#

CLK48

2

2

OC0#
OC1#
OC2#
OC3#
OC4#

USB20_P0

H6

USB20_N1

H3

USB20_P1

H2

USB20_N2

J2

USB20_P2

J3

USB20_N3

K6

USB20_P3

K5

USB20_N4

K1

USB20_P4

K2

USB20_N5

L2

USB20_P5

L3

USB20_N6

M6

USB20_P6

M5

USB20_N7

N1

USB20_P7

N2

USB_OC#0_1

D4

USB_OC#0_1

C5

USB_OC#2

D3

USB_OC#3

D2

USB_OC#4PCIE_ITX_C_DRX_P1_R

E5

USB_OC#5

E6

USB_OC#6

C2

USB_OC#7

C3

G2

USBRBIAS

G3

CLK_PCH_48M

F4

For EMI, Close to TigerPoint

R152

R152

1 2

22.6_0402_1%

22.6_0402_1%

12

R338

R338
33_0402_5%

33_0402_5%

@

@

1

R434

R434

@

@

22P_0402_50V8J

22P_0402_50V8J

2

USB20_N0 (15)

USB20_P0 (15)

USB20_N1 (15)

USB20_P1 (15)

USB20_N2 (15)

USB20_P2 (15)

USB20_N3 (9)

USB20_P3 (9)

USB20_N4 (22)

USB20_P4 (22)

USB20_N5 (17)

USB20_P5 (17)

USB20_N6 (23)

USB20_P6 (23)

USB20_N7 (18)

USB20_P7 (18)

USB_OC#0_1 (15)

USB_OC#2 (15)

R152 Please clo sed U72
PIN within 500 mils

CLK_PCH_48M (8)

USB Left2

1
2

USB Right2

3

CMOS

4

CardReader

WWAN

5
6

WIMAX

7

USB port1

USB port2

USB port3

CMOS

Card Reader

WWAN

BT

WLAN

BT

USB20_N6

USB20_N7

USB20_P6

USB20_P7

R1474

R1474

1 2

0_0402_5%

0_0402_5%

R1475

R1475

1 2

0_0402_5%

0_0402_5%

R1476

R1476

1 2

0_0402_5%

0_0402_5%

R1477

R1477

1 2

0_0402_5%

0_0402_5%

USB_OC#0_1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

@

@

3G@

3G@

@

@

3G@

3G@

R46 10K_0402_5%R46 10K_0402_5%
R49 10K_0402_5%R49 10K_0402_5%
R48 10K_0402_5%R48 10K_0402_5%

modify 05/14

USB20_SIM_N (17)

USB20_SIM_P (17)

+3VALW

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER TH IS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

2006/08/18 2007/8/18

2006/08/18 2007/8/18

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Tigerpoint(2/4)

Tigerpoint(2/4)

Tigerpoint(2/4)

LA-6221P

LA-6221P

LA-6221P

1

1.0

1.0

12 39Thursday, July 01, 2010

12 39Thursday, July 01, 2010

12 39Thursday, July 01, 2010

1.0