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Aspire One AO751H
Schematics
34 pgs965.96 Kb0

Acer Aspire One AO751H Schematics

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1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
1A
134Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
1A
134Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
1A
134Sunday, March 08, 2009
ZA3
Intel@Atom(Silverthorne)
Intel@ System Controller Hub
(Poulsbo)
22 x 22 mm FCBGA 1249 Balls
LVDS
(1366 x 768)
ZA3(11.6") Block Diagram
11.6" LED Panel
14 x 13 mm 441 Balls
CRT PORT CH7317A SDVO to RGB
RGB
DDR2 400/533MHz 1GB (Max 2GB)
DDR2 SO-DIMM
CCD MODULE
(PORT3)
4 IN 1 CardReader
(PORT6)
USB X 3
(PORT0,1,2)
BT MODULE
(PORT4)
USB 2.0 * (port0~7)
LPC
IDE/PATA INTERFACE
SDVO
(1280 x 1024)
Page 4~6
Page 7~12
Page 15
Page 14Page 14
Page 13
Page 20
Page 15
Page 21
Page 20
WPCE775C/FLASH
Page 22
Touch Pad/B Con.
Page 21
SPI FlashK/B Con.
Page 22Page 21
3G MODULE
(PORT7)
Page 19
SIM Card
Page 19
10/100 LAN
(RTL8103EL)
FSB 400/533MHz
PCIE-1
WLAN/WMAX
MODULE
PCIE-2
USB
Page 18
PATA TO SATA CHIP
(JMH330 OR 8040)
SATA
Page 18
2.5"HDD&SSD
Page 19
Page 17
MIC(PINK)
Page 16
HD
AUDIO CODEC
(ALC272)
Page 16
HP(GREEN)
Page 16
Int. MIC
Page 16
Audio AMP
(G1453L)
Page 16
Int SPK
Page 16
Page 3
CLOCK GEN CK505
(SLG8SP513VTR
,ICS9LPRS365BKLFT)
CPU FSB (133MHz)
SCH FSB (133MHz)
SCH PCIE (100MHz)
SCH DA (96MHz)
SCH DB (100MHz)
SCH CLK14 (14.31818MHz)
WLAN CLK(100MHz)
LAN CLK(100MHz)
CR CLK(48MHz)
LAYER 5 : VCC
LAYER 6 : BOT
LAYER 2 : GND
LAYER 1 : TOP
LAYER 4 : IN2
ZA3 PCB STACK UP
LAYER 3 : IN1
Z520/Z530
hexainf@hotmail.com
5
5
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4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Power Sequence/ BOM Rule
1A
234Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Power Sequence/ BOM Rule
1A
234Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Power Sequence/ BOM Rule
1A
234Sunday, March 08, 2009
ZA3
ZA3 Power On Sequence
Items Function Name Description
1
2
3
4
BOM naming rule
EC775 SDA1 / SCL1 (+3VPCU)
EC775 SDA2 / SCL2 (+3VPCU)
Power Plane
MOS CKT
Battery CPU thermal Sensor EC EEPROM
+3VPCU +3V +3VPCU
XX
V
VV
(SMB_DATA) / (SMB_CLK) (+3V)
Power Plane
MOS CKT
CLK GEN RAM Mini Card (WLAN/WMAX)
V
+3V +3V
VV
+3V
Reserve
Poulsbo SCH SMBUS Table
EC SMBUS Table
3G Module 3G@
Stuff
ReserveReserve
Mini Card (3G)
+3VSUS
V
FAN Module FAN_PWM@ PWM FAN
Reserve
MAINON
+VCC_CORE
RSTRDY#(H Level)
CPU_PWRGD
ECPWROK
CPURST#
CPU_COREPG
+5V +3V +2.5V +1.8V +1.5V +1.05V
From Power Button
From SCH
From PWM
HWPG
PLTRST#
RSMRST#
+5VPCU +3VPCU
S5_ON
SYS_HWPG(PCU)
+3V_S5
NBSWON#
From AC,Battery VIN
>5ms
SUSON
MAINON
HWPG_1.5V HWPG_1.05V
VRON
VRON
From EC
From PWM
From PWM
From EC
From EC
From EC
From EC
From SCH
From EC
From SCH
2ms
SUSON
From EC
+5V_S5
HWPG_1.8V (SUS)
+3VSUS +1.8VSUS +SMDDR_VREF +SMDDR_VTERM
From PWM
SLPMODE(L Level)
From SCH
SLPRDY#(H Level)
From SCH
>5ms
>5ms
STPCPU#
From SCH
STPCLK#
From SCH
CPUSLP#
From SCH
DPSLP#
From SCH
DPRSTP#
From SCH
From SCH
DPRSLPVR
RSTWARN
From EC
20us
100us
5
6
PATA TO SATA BRIDGE 8040@
330@
Marvell 88SE8040
Jmicron JMH330PATA TO SATA BRIDGE
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SMBCK1
SMBDT1
CG_XOUT
FSA
PCI2
PCIF5
VDD_CK_VDD_REF
VR_PWRGD_CK410
NB_CLKREQ0#
CG_XIN
CLKREQ_WLAN#
CLKREQ_WLAN#
FSC
FSC_R
FSB
CG_XOUT
CG_XIN
PCI4
PCI4
PCI2
PCIF5
FSC_R
PM_STPCPU#
PCI_STOP#
PM_STPCPU#
FSC
CLKREQ_LAN#_R
FSB
FSA
FSA
VR_PWRGD_CK410
SMBDT1
SMBCK1
PCI_STOP#
NB_CLKREQ0#
NB_CLKREQ0#_R
CLKREQ_WLAN#_R
HCLK_CPU 4
NB_CLKREQ0# 9
HCLK_CPU# 4
HCLK_MCH 7
HCLK_MCH# 7
14M_SCH9
SCH_BSEL2 7
CPU_BSEL2 5
DREFCLK 9
DREFCLK# 9
DREFCLK_SS 9
DREFCLK_SS# 9
WLAN_PE2CLK+ 19
WLAN_PE2CLK- 19
CLKREQ_WLAN# 19
VR_PWRGD_CK410#25
PM_STPCPU# 9
PDAT_SMB9,19 SMBDT1 13
PCLK_SMB9,19 SMBCK1 13
PECLK_MCH# 8
PECLK_MCH 8
CLKREQ_LAN# 17
LAN_PE1CLK+ 17
LAN_PE1CLK- 17
+3V
+1.05V_VDD
+1.05V_VDD
+1.05V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+1.05V
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
CLOCK GEN(CK505)
1A
334Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
CLOCK GEN(CK505)
1A
334Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
CLOCK GEN(CK505)
1A
334Sunday, March 08, 2009
ZA3
To SCH FSB CLK
To CPU FSB CLK
Pin 11
Pin 13
Pin 14
ICS9LPRS365
(ALPRS365000)
SLG8SP513VTR
(AL8SP513000)
(default)
(default)
PCI2/TME
PCI4/
27_Select
PCIF-5/ITP_EN
PULL HIGH PULL DOWN
NO OVERCLOCKING NORMAL RUN
PIN 24/25 IS 27MHz PIN 24/25
IS SRC/DOT
PIN 53/54 IS CPUITP PIN 53/54 IS SRC8
(default)
<MAIN> : SLG8SP513VTR(AL8SP513000)
<SECOND> : ICS9LPRS365BKLFT(ALPRS365000)
Clock Generator(CLK)
To SCH Display PLLA CLK
SLG8SP513VTR ,ICS9LPRS365BKLFT
To SCH Oscillator CLK
To SCH Display PLLB CLK
To SCH PCIE CLK
To Mini Card 1 (WLAN/WMAX)
To LAN
SCH PCIE CLKREQ
WLAN PCIE CLKREQ
CLK GEN & PWR
Clock Gen I2C
Frequence select
0 0 1 133 100 33
FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
Default
SEL0SEL1SEL2
States
To Card Reader CLK
EMI
PCI2/TME
PCI_4/
SEL_LCDCLK#
PCIF-5/ITP_EN
LAN CLKREQ
Change R43 P/N
from
CS00002JB38 to
CS31002JB28
rev.c 20090301
Modify R39 R36
footprint from
RC0402 to SHORT0402
for 0 ohm cost down
rev.c 20090301
R33 *10K_4R33 *10K_4
T13T13
T12T12
R32 *10K_4R32 *10K_4
T2T2
C31
0.1u/10V_4
C31
0.1u/10V_4
C38
0.1u/10V_4
C38
0.1u/10V_4
R16 10K_4R16 10K_4
C27
0.1u/10V_4
C27
0.1u/10V_4
C29
0.1u/10V_4
C29
0.1u/10V_4
R25 10K_4R25 10K_4
T6T6
R40 10K_4R40 10K_4
R31 10K_4R31 10K_4
C45
0.1u/10V_4
C45
0.1u/10V_4
33p/50V_4C42 33p/50V_4C42
R12 475/F_4R12 475/F_4
L2
PBY160808T-301Y-N/2A/300ohm_6
L2
PBY160808T-301Y-N/2A/300ohm_6
C39
0.1u/10V_4
C39
0.1u/10V_4
C24
10u/10V_8
C24
10u/10V_8
Q2
2N7002E
Q2
2N7002E
3
2
1
R44 0_4R44 0_4
R13 10K_4R13 10K_4
R28
*10K_4
R28
*10K_4
C40 *33p/50V_4C40 *33p/50V_4
C26
10u/10V_8
C26
10u/10V_8C30
10u/10V_8
C30
10u/10V_8
R14 475/F_4R14 475/F_4
T3T3
R43 *10K_4R43 *10K_4
R39 *Short_4R39 *Short_4
C25
10u/10V_8
C25
10u/10V_8
R29 10K_4R29 10K_4
T5T5
L3
PBY160808T-301Y-N/2A/300ohm_6
L3
PBY160808T-301Y-N/2A/300ohm_6
T7T7
R34 10K_4R34 10K_4
T9T9
R11 475/F_4R11 475/F_4
C36
0.1u/10V_4
C36
0.1u/10V_4
C41
0.1u/10V_4
C41
0.1u/10V_4
T11T11
R17 10K_4R17 10K_4
R36 *Short_4R36 *Short_4
R24 100K_4R24 100K_4
T8T8
R46 *10K_4R46 *10K_4
Q4
*2N7002E
Q4
*2N7002E
3
2
1
Q3
*2N7002E
Q3
*2N7002E
3
2
1
T1T1
33p/50V_4C43 33p/50V_4C43
R45 0_4R45 0_4
C20
0.1u/10V_4
C20
0.1u/10V_4
C19
0.1u/10V_4
C19
0.1u/10V_4
CK505
U2
SLG8SP513VTR
CK505
U2
SLG8SP513VTR
VDD_SRC_IO_2
43
VDD_48
16
VSS_SRC3
49
PCI0/CR#_A
8
PCI2/TME
11
IO_VOUT
55
XTAL_OUT
2
SCLK
7
SDA
6
REF0/FSC/TESTSEL
5
VDD_SRC_IO_3
52
VDD_CPU_IO
56
VSS_REF
1
SRC8#/ITP#
53
PCIF5/ITP_EN
14
PCI3
12
VSS_PLL3
26
VDD_96_IO
19
VSS_48
18
VSS_IO
22
SRC1/SE1
24
VSS_SRC1
30
VSS_PCI
15
SRC5#/CPU_STOP#
44
SRC10
41
SRC8/ITP
54
VDD_CPU
62
PCI1/CR#_B
10
FSB/TEST/MODE
64
PCI4/SRC5_EN
13
SRC2#/SATA#
29
SRC5/PCI_STOP#
45
VDD_SRC
46
VSS_CPU
59
SRC10#
42
XTAL_IN
3
USB_48/FSA
17
VDD_PLL3_IO
27
SRC2/SATA
28
SRC3/CR#_C
31
SRC4
34
SRC6
48
SRC7/CR#_F
51
SRC9
37
SRC11/CR#_H
40
SRC3#/CR#_D
32
SRC4#
35
SRC6#
47
SRC7#/CR#_E
50
SRC9#
38
SRC11#/CR#_G
39
CPU1#
57
CPU1
58
CPU0#
60
CPU0
61
VDD_PCI
9
VDD_SRC_IO_1
33
VDD_PLL3
23
VDD_REF
4
VSS_SRC2
36
SRC1#/SE2
25
SRC0/DOT96
20
SRC0#/DOT96#
21
CKPWRGD/PWRDWN#
63
VSS_BODY
65
C37
0.1u/10V_4
C37
0.1u/10V_4
T4T4
R38 33_4R38 33_4
R35
*10K_4
R35
*10K_4
R10 *10K_4R10 *10K_4
R26 10K_4R26 10K_4
C47
0.1u/10V_4
C47
0.1u/10V_4
C46 *33p/50V_4C46 *33p/50V_4
Y2
14.318MHZ
Y2
14.318MHZ
21
R30 *10K_4R30 *10K_4
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_THERMDA
H_THERMDC
H_PROCHOT#
H_IGNNE#
CPU_CMREF
CPU_THRMTRIP#
TCK_CPU
TRST#
TDI
TDO
TMS
H_IERR#
H_IGNNE#
H_A20M#
HCLK_CPU
H_INIT#
H_PBE#
XDP_OBSFN_A0
XDP_OBSDATA_A1
XDP_OBSDATA_A3
XDP_OBSFN_A1
XDP_OBSDATA_A2
XDP_OBSDATA_A0
XDP_OBSFN_A0
TDI
TMS
TCK_CPU
THERM_ALERT#_R
H_THERMDA
H_THERMDCTHER_OVERT#
FAN_PWM_EC FAN_PWM_E
THER_OVERT# THER_OVERT#_B
FAN_PWM_CN
CPU_THRMTRIP#
HCLK_CPU#
TCK_SCH
TRST#
BC_TDI
TCK_CPU
TDI
H_IERR#
H_PROCHOT#
TDI
TDO
XDP_TDO
TMS
TCK_CPU
H_BREQ#0 7
H_BNR# 7
H_HIT# 7
H_HITM# 7
H_ADS# 7
H_LOCK# 7
H_DRDY# 7
H_DBSY# 7
H_TRDY# 7
H_RS#1 7
H_RS#0 7
H_CPURST# 7
H_RS#2 7
HCLK_CPU# 3
HCLK_CPU 3
H_INIT# 7
H_BPRI# 7
HADSTB0#7
HREQ#37
HREQ#17
HREQ#27
HREQ#07
HREQ#47
HADSTB1#7
H_PBE#7
H_INTR7
H_NMI7
H_SMI#7
H_STPCLK#7
HA#37
HA#47
HA#57
HA#67
HA#77
HA#87
HA#97
HA#107
HA#117
HA#127
HA#137
HA#147
HA#157
HA#167
HA#177
HA#187
HA#197
HA#207
HA#217
HA#227
HA#237
HA#247
HA#257
HA#267
HA#277
HA#287
HA#297
HA#307
HA#317
H_A20M#22
H_DEFER# 7
H_PROCHOT# 25
SYS_SHDN# 24,29
IMVP_PWRGD22,25
H_THRMTRIP# 7
THERM_ALERT#9
2ND_MBCLK22
2ND_MBDATA22
CPUFAN#22
FANSIG22
TRST# 9
TMS 9
XDP_TDO 9
TCK_SCH 9
BC_TDI 9
+1.05V_C6_OFF
+1.05V_C6_OFF
+1.05V_C6_OFF
+1.05V
+1.05V
+1.05V
+3V
+3V
+3V
+3V
+3V
+3V
+5V
+3V +3V
+5V
+3V
+1.05V
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(01_HOST)
1A
434Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(01_HOST)
1A
434Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(01_HOST)
1A
434Sunday, March 08, 2009
ZA3
Note : H_FERR# for layout length must be greater
than 150mils 20081128
To SCH
CPU Thermal monitor(THM)
<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard
ADDRESS: 4C
FAN(THM)
Thermal Trip(CPU)
For intel suggest R115 connect to
+1.05V_C6_OFF 20081218
XDP/ITP Debug
Test Points
Silverthorne(CPU)
Modify JETC pins for Boundary
Scan rev.b 20090205
Change R88 P/N from
CS05602JB17 to
CS11202JB21 rev.c
20090301
Change R81 P/N from
CS00002JB38 to
CS02402JB11 rev.c
20090301
T55T55
Q7
MMBT3904
Q7
MMBT3904
2
1 3
R87 56_4R87 56_4
R94 *0_4R94 *0_4
R78 *0_4R78 *0_4
R132
1K/F_4
R132
1K/F_4
R77 *0_4R77 *0_4
R202
FAN_PWM@10K_4
R202
FAN_PWM@10K_4
T17T17
R68 10K_4R68 10K_4
T18T18
R97 56_4R97 56_4
R102 56_4R102 56_4
R135
1K/F_4
R135
1K/F_4
R320 FAN_PWM@0_4R320 FAN_PWM@0_4
R66
10K_4
R66
10K_4
R103 100K_6R103 100K_6
T28T28
R69 10K_4R69 10K_4
R145 120_4R145 120_4
R98 56_4R98 56_4
ADDR GROUP
0
ADDR GROUP 1
CONTROL
XDP/ITP SIGNALSH CLK
THERM
NC
U14A
SILVERTHORNE
.
ADDR GROUP
0
ADDR GROUP 1
CONTROL
XDP/ITP SIGNALSH CLK
THERM
NC
U14A
SILVERTHORNE
.
A[10]#
A16
A[11]#
E18
A[12]#
D15
A[13]#
B19
A[14]#
A20
A[15]#
D17
A[16]#
B15
A[17]#
B5
A[18]#
A12
A[19]#
D5
A[20]#
E12
A[21]#
B9
A[22]#
A6
A[23]#
B13
A[24]#
E14
A[25]#
A10
A[26]#
B7
A[27]#
D13
A[28]#
A8
A[29]#
C4
A[3]#
E22
A[30]#
A14
A[31]#
B11
RSVD7
AE16
RSVD8
AF17
RSVD9
AD15
RSVD10
AD17
RSVD0
D9
RSVD1
D7
RSVD2
E8
RSVD3
E10
A[4]#
A22
A[5]#
D21
A[6]#
E24
A[7]#
B17
A[8]#
A18
A[9]#
B23
A20M#
G30
ADS#
C26
ADSTB[0]#
D19
ADSTB[1]#
D11
RSVD4
L30
RSVD5
J30
BCLK[0]
P29
BCLK[1]
R28
BNR#
H25
BPM[0]#
F1
BPM[1]#
E2
BPM[2]#
F5
BPM[3]#
D3
BPRI#
G24
BR0#
C28
RSVD14
G26
DBSY#
D29
DEFER#
B27
DRDY#
W28
FERR#
J28
RSVD13
K29
HIT#
E30
HITM#
F29
IERR#
H1
IGNNE#
H27
INIT#
F31
LINT0
H31
LINT1
L28
LOCK#
D25
PRDY#
E4
PREQ#
F7
PROCHOT#
H5
REQ[0]#
B25
REQ[1]#
D23
REQ[2]#
E20
REQ[3]#
A24
REQ[4]#
B21
RESET#
M5
RS[0]#
D27
RS[1]#
E28
RS[2]#
E26
SMI#
J26
STPCLK#
K1
TCK
L2
TDI
N2
TDO
M1
THERMTRIP#
T1
THRMDA
T5
THRMDC
U4
TMS
P1
TRDY#
F25
TRST#
J4
RSVD11
A26
RSVD6
E6
RSVD15
G28
TEST4
U30
TEST3
V27
CMREF[1]
AE26
VSS0
K31
R95 0_4R95 0_4
T25T25
U6
G780P81U
U6
G780P81U
VCC
1
DXP
2
DXN
3
GND
5
SCLK
8
SDA
7
ALERT#
6
OVERT#
4
Q6
2N7002E
Q6
2N7002E
3
2
1
T21T21
T27T27
R115 51/F_4R115 51/F_4
R113 68_4R113 68_4
Q8
2N7002E
Q8
2N7002E
3
2
1
Q24
FAN_PWM@MMBT3904
Q24
FAN_PWM@MMBT3904
2
1 3
C104
0.1u/10V_4
C104
0.1u/10V_4
Q5
2N7002E
Q5
2N7002E
3
2
1
R314
FAN_PWM@10K_4
R314
FAN_PWM@10K_4
R146 1K_4R146 1K_4
T22T22
C166
*0.1u/10V_4
C166
*0.1u/10V_4
T20T20
Q25
FAN_PWM@MMBT3904
Q25
FAN_PWM@MMBT3904
2
1 3
T59T59
T44T44
R141 1K_4R141 1K_4
R88
120_4
R88
120_4
R93
1K_4
R93
1K_4
CN9
FAN_PWM@CONN(88266-04001-06)
CN9
FAN_PWM@CONN(88266-04001-06)
1
2
3
4
5
6
R142 1K_4R142 1K_4
R67 *0_4R67 *0_4
T31T31
R96 0_4R96 0_4
T40T40
R321
FAN_PWM@10K_4
R321
FAN_PWM@10K_4
R315 FAN_PWM@10K_4R315 FAN_PWM@10K_4
R80
10K_4
R80
10K_4
R203
FAN_PWM@10K_4
R203
FAN_PWM@10K_4
C103
2200p/50V_4
C103
2200p/50V_4
R81 *24_4R81 *24_4
R90 0_4R90 0_4
T19T19
T24T24
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMP0
COMP1
COMP2
COMP3
CPU_GTLREF
HDSTBP#17
HDSTBN#17
HDSTBN#2 7HDSTBN#07
HDSTBP#07
HDSTBN#3 7
CPU_BSEL23
H_PWRGD 7
H_CPUSLP# 7
H_DPSLP# 7
H_DPWR# 7
H_DPRSTP# 7,25
HD#07
HD#17
HD#27
HD#37
HD#47
HD#57
HD#67
HD#77
HD#87
HD#97
HD#107
HD#117
HD#127
HD#137
HD#147
HD#157
HDINV#07
HD#167
HD#177
HD#187
HD#197
HD#207
HD#217
HD#227
HD#237
HD#247
HD#257
HD#267
HD#277
HD#287
HD#297
HD#307
HD#317
HDINV#17
HD#32 7
HD#33 7
HD#34 7
HD#35 7
HD#36 7
HD#37 7
HD#38 7
HD#39 7
HD#40 7
HD#41 7
HD#42 7
HD#43 7
HD#44 7
HD#45 7
HD#46 7
HD#47 7
HDSTBP#2 7
HDINV#2 7
HD#48 7
HD#49 7
HD#50 7
HD#51 7
HD#52 7
HD#53 7
HD#54 7
HD#55 7
HD#56 7
HD#57 7
HD#58 7
HD#59 7
HD#60 7
HD#61 7
HD#62 7
HD#63 7
HDSTBP#3 7
HDINV#3 7
+1.05V_C6_OFF
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(02_HOST)
1A
534Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(02_HOST)
1A
534Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(02_HOST)
1A
534Sunday, March 08, 2009
ZA3
BSEL[0]
L
H
Frequency
133
100
BSEL[2] BSEL[1]
LH
HL
Silverthorne(CPU)
T57T57
R133
1K/F_4
R133
1K/F_4
R136
2K/F_4
R136
2K/F_4
R125 27.4/F_4R125 27.4/F_4
R120 54.9/F_4R120 54.9/F_4
DATA GRP 0 DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
U14B
SILVERTHORNE
DATA GRP 0 DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
U14B
SILVERTHORNE
COMP[0]
AE14
COMP[1]
AD13
COMP[2]
E16
COMP[3]
F15
D[0]#
Y27
D[1]#
AH27
D[10]#
AD31
D[11]#
AF27
D[12]#
AD27
D[13]#
AG28
D[14]#
AB25
D[15]#
AC26
D[16]#
AE24
D[17]#
AC24
D[18]#
AJ20
D[19]#
AE20
D[2]#
Y31
D[20]#
AJ22
D[21]#
AF25
D[22]#
AH25
D[23]#
AH23
D[24]#
AH19
D[25]#
AF23
D[26]#
AE18
D[27]#
AH17
D[28]#
AD19
D[29]#
AJ24
D[3]#
AC30
D[30]#
AJ18
D[31]#
AF19
D[32]#
AE8
D[33]#
AD7
D[34]#
AH15
D[35]#
AF9
D[36]#
AH9
D[37]#
AE10
D[38]#
AJ16
D[39]#
AF13
D[4]#
AE30
D[40]#
AF7
D[41]#
AF15
D[42]#
AH13
D[43]#
AJ14
D[44]#
AJ12
D[45]#
AH7
D[46]#
AJ8
D[47]#
AJ10
D[48]#
AH5
D[49]#
AB5
D[5]#
AF29
D[50]#
AJ6
D[51]#
Y1
D[52]#
AF5
D[53]#
AG4
D[54]#
AF3
D[55]#
AC6
D[56]#
AE6
D[57]#
AE4
D[58]#
W4
D[59]#
AC2
D[6]#
AA26
D[60]#
AE2
D[61]#
AD1
D[62]#
AA2
D[63]#
AC4
D[7]#
AB31
D[8]#
W30
D[9]#
AC28
DINV[0]#
AE28
DINV[1]#
AE22
DINV[2]#
AE12
DINV[3]#
Y5
DPRSTP#
G2
DPSLP#
G6
DPWR#
V31
DSTBN[0]#
AA28
DSTBN[1]#
AF21
DSTBN[2]#
AH11
DSTBN[3]#
AB1
DSTBP[0]#
AA30
DSTBP[1]#
AH21
DSTBP[2]#
AF11
DSTBP[3]#
AA4
GTLREF
AJ26
RSVD12
K27
PWRGOOD
G4
SLP#
J2
BSEL[0]
R30
BSEL[1]
M31
BSEL[2]
U28
TEST2
T31
TEST1
P31
R119 27.4/F_4R119 27.4/F_4
T56T56
R117 54.9/F_4R117 54.9/F_4
C167
*0.1u/10V_4
C167
*0.1u/10V_4
T58T58
T54T54
U14D
SILVERTHORNE
U14D
SILVERTHORNE
VSS99
M7
VSS98
M3
VSS97
L6
VSS96
K25
VSS95
K23
VSS94
K21
VSS93
K19
VSS92
K17
VSS91
K15
VSS90
K13
VSS9
AC8
VSS89
K11
VSS88
K9
VSS87
K7
VSS86
K3
VSS85
J24
VSS84
J6
VSS83
H29
VSS82
H3
VSS81
G22
VSS80
G20
VSS8
AB29
VSS79
G18
VSS78
G16
VSS77
G14
VSS76
G12
VSS75
G10
VSS74
G8
VSS73
F27
VSS72
F23
VSS71
F21
VSS70
F19
VSS7
AB27
VSS69
F17
VSS68
F13
VSS67
F11
VSS66
F9
VSS65
F3
VSS64
D31
VSS63
D1
VSS62
C30
VSS61
C24
VSS60
C22
VSS6
AB3
VSS59
C20
VSS58
C18
VSS57
C16
VSS56
C14
VSS55
C12
VSS54
C10
VSS53
C8
VSS52
C6
VSS51
C2
VSS5
AA24
VSS49
B29
VSS48
B3
VSS46
AJ28
VSS45
AJ4
VSS42
AH29
VSS41
AH3
VSS4
AA6
VSS39
AG30
VSS38
AG26
VSS37
AG24
VSS36
AG22
VSS35
AG20
VSS34
AG18
VSS33
AG16
VSS32
AG14
VSS31
AG12
VSS30
AG10
VSS29
AG8
VSS28
AG6
VSS27
AG2
VSS26
AF31
VSS25
AF1
VSS24
AD29
VSS23
AD25
VSS22
AD23
VSS21
AD21
VSS20
AD11
VSS2
A28
VSS19
AD9
VSS18
AD5
VSS17
AD3
VSS16
AC22
VSS158
Y19
VSS157
Y17
VSS156
Y15
VSS155
Y13
VSS154
Y11
VSS153
Y9
VSS152
Y7
VSS151
Y3
VSS15
AC20
VSS149
W6
VSS148
V29
VSS147
V25
VSS146
V23
VSS145
V21
VSS144
V19
VSS143
V17
VSS142
V15
VSS141
V13
VSS140
V11
VSS14
AC18
VSS139
V9
VSS138
V7
VSS137
V5
VSS136
V3
VSS135
T29
VSS134
T27
VSS133
T25
VSS132
T23
VSS131
T21
VSS130
T19
VSS13
AC16
VSS129
T17
VSS128
T15
VSS127
T13
VSS126
T11
VSS125
T9
VSS124
T7
VSS123
T3
VSS122
P27
VSS121
P25
VSS120
P23
VSS12
AC14
VSS119
P21
VSS118
P19
VSS117
P17
VSS116
P15
VSS115
P13
VSS114
P11
VSS113
P9
VSS112
P7
VSS111
P3
VSS110
N28
VSS11
AC12
VSS109
M29
VSS108
M25
VSS107
M23
VSS106
M21
VSS105
M19
VSS104
M17
VSS103
M15
VSS102
M13
VSS101
M11
VSS100
M9
VSS10
AC10
VSS1
A4
VSS159
Y21
VSS160
Y23
VSS161
Y25
VSS162
Y29
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.05_C6_EN1
1.05_C6_EN2
VID2 25
VID0 25
VID5 25
VID1 25
VID4 25
VID3 25
VID6 25
VCC_SENSE 25
VSS_SENSE 25
SLPIOVR#9
+1.05V
VCC_CORE
+1.05V_C6_OFF
+1.05V_C6_OFF
+1.05V_C6_OFF
VCC_CORE
+1.5V
VCC_CORE
+1.05V
+1.05V_C6_OFF
VCC_CORE
+5V+3V
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(03_Power)
1A
634Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(03_Power)
1A
634Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Silverthorne CPU(03_Power)
1A
634Sunday, March 08, 2009
ZA3
CPU_CORE
+1.5V
2.5A
VCCP(+1.05V_C6_OFF)
+1.05V
+1.05V_C6_OFF
For Design Guide VCCSENSE pull up
100ohm to VCC_CORE 20081206
Silverthorne(CPU)
Modify +1.05V_C6_OFF
circuit 20090113
Modify R326 from
10K to 100K and
pull up +3V rev.c
20090228
Modify R168 P/N
from CS31002JB28
to CS41002JB20
rev.c 20090228
Add and revrse
Q27 R329 for C6
circuit rev.c
20090303
C148
1u/10V_4
C148
1u/10V_4
C185
10u/6.3V_6
C185
10u/6.3V_6
C131
1u/10V_4
C131
1u/10V_4
C121
1u/10V_4
C121
1u/10V_4
R101 100_4R101 100_4
U14C
SILVERTHORNE
U14C
SILVERTHORNE
VCCP36
J16
VCCP35
AA14
VCCPC63
J8
VCCPC62
H9
VCCPC61
H7
VCCP0
M27
VCCA
N30
VCC9
L24
VCC8
L22
VCC7
L20
VCC6
L18
VCC5
L16
VCC48
W24
VCC47
W22
VCC46
W20
VCC45
W18
VCC44
W16
VCC43
W14
VCC42
W12
VCC41
W10
VCC40
W8
VCC4
L14
VCC39
U24
VCC38
U22
VCC37
U20
VCC36
U18
VCC35
U16
VCC34
U14
VCC33
U12
VCC32
U10
VCC31
U8
VCC30
U6
VCC3
L12
VCC29
R24
VCC28
R22
VCC27
R20
VCC26
R18
VCC25
R16
VCC24
R14
VCC23
R12
VCC22
R10
VCC21
R8
VCC20
R6
VCC2
L10
VCC19
N24
VCC18
N22
VCC17
N20
VCC16
N18
VCC15
N16
VCC14
N14
VCC13
N12
VCC12
N10
VCC11
N8
VCC10
N6
VCC1
L8
VID[0]
P5
VID[1]
R4
VID[2]
N4
VID[3]
K5
VID[4]
L4
VID[5]
R2
VID[6]
U2
VSSSENSE
V1
VCCSENSE
W2
VCCP1
AA8
VCCP2
AA10
VCCP3
AA12
VCCP4
AA16
VCCP5
AA18
VCCP6
AA20
VCCP7
AA22
VCCP8
AB7
VCCP9
AB9
VCCP10
AB11
VCCP11
AB13
VCCP12
AB15
VCCP13
AB17
VCCP14
AB19
VCCP15
AB21
VCCP16
AB23
VCCP33
U26
VCCP32
R26
VCCP31
N26
VCCP30
L26
VCCP29
J22
VCCP28
J20
VCCP27
J18
VCCP26
J14
VCCP25
J12
VCCP24
J10
VCCP23
H23
VCCP22
H21
VCCP21
H19
VCCP20
H17
VCCP19
H15
VCCP18
H13
VCCP17
H11
VCCP34
W26
C137
1u/10V_4
C137
1u/10V_4
C140
1u/10V_4
C140
1u/10V_4
C149
1u/10V_4
C149
1u/10V_4
C156
10u/6.3V_6
C156
10u/6.3V_6
C160
*0.047u/25V_4
C160
*0.047u/25V_4
C158
1u/10V_4
C158
1u/10V_4
C127
0.1u/10V_4
C127
0.1u/10V_4
C155
10u/6.3V_6
C155
10u/6.3V_6
C135
10u/6.3V_6
C135
10u/6.3V_6
C174
0.1u/10V_4
C174
0.1u/10V_4
R148
33K_4
R148
33K_4
C130
1u/10V_4
C130
1u/10V_4
R326
100K_4
R326
100K_4
C157
10u/6.3V_6
C157
10u/6.3V_6
Q26
DTC144EU
Q26
DTC144EU
1 3
2
Q27
*AO3409
Q27
*AO3409
3
2
1
C138
0.1u/10V_4
C138
0.1u/10V_4
C113
1u/10V_4
C113
1u/10V_4
C141
1u/10V_4
C141
1u/10V_4
C165
10u/6.3V_6
C165
10u/6.3V_6
C139
1u/10V_4
C139
1u/10V_4
R100 100_4R100 100_4
C128
1u/10V_4
C128
1u/10V_4
Q9
SI3456BDV
Q9
SI3456BDV
3
6
5
2
4
1
R168
100K_4
R168
100K_4
C162
1u/10V_4
C162
1u/10V_4
C129
0.1u/10V_4
C129
0.1u/10V_4
Q13
2N7002E
Q13
2N7002E
3
2
1
R329 *1K_4R329 *1K_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_SWING
H_TESTIN#
H_RCOMPO
HCLK_MCH
HCLK_MCH#
CFG0
CFG1
SCH_BSEL2
H_CGVREF
CFG1
CFG0
H_GVREF
H_THRMTRIP#
H_PBE#_R
H_ADS# 4
H_DBSY# 4
HCLK_MCH# 3
H_NMI4
SCH_BSEL2 3
HA#3 4
HA#4 4
HA#5 4
HA#6 4
HA#7 4
HA#8 4
HA#9 4
HA#10 4
HA#11 4
HA#12 4
HA#13 4
HA#14 4
HA#15 4
HA#16 4
HA#17 4
HA#18 4
HA#19 4
HA#20 4
HA#21 4
HA#22 4
HA#23 4
HA#24 4
HA#25 4
HA#26 4
HA#27 4
HA#28 4
HA#29 4
HA#30 4
HA#31 4
H_CPURST# 4
H_RS#0 4
H_RS#1 4
H_RS#2 4
H_TRDY# 4
HD#05
HD#65
HD#75
HD#85
HD#95
HD#15
HD#105
HD#115
HD#125
HD#25
HD#135
HD#145
HD#155
HD#35
HD#45
HD#55
HD#165
HD#175
HD#185
HD#195
HD#205
HD#215
HD#225
HD#235
HD#245
HD#255
HD#265
HD#275
HD#285
HD#295
HD#305
HD#315
HD#325
HD#385
HD#395
HD#405
HD#415
HD#335
HD#425
HD#435
HD#445
HD#345
HD#455
HD#465
HD#475
HD#355
HD#365
HD#375
HD#485
HD#545
HD#555
HD#565
HD#575
HD#495
HD#585
HD#595
HD#605
HD#505
HD#615
HD#625
HD#635
HD#515
HD#525
HD#535
H_DPRSTP# 5,25
H_DPWR# 5
H_PWRGD 5
H_CPUSLP# 5
H_DPSLP# 5
HADSTB0# 4
HADSTB1# 4
HCLK_MCH 3
H_DEFER# 4
HDINV#0 5
HDINV#1 5
HDINV#2 5
HDINV#3 5
H_DRDY# 4
HDSTBN#0 5
HDSTBN#1 5
HDSTBN#2 5
HDSTBN#3 5
HDSTBP#0 5
HDSTBP#1 5
HDSTBP#2 5
HDSTBP#3 5
H_HIT# 4
H_HITM# 4
H_LOCK# 4
HREQ#0 4
HREQ#1 4
HREQ#2 4
HREQ#3 4
HREQ#4 4
H_BPRI# 4
H_BNR# 4
H_BREQ#0 4
H_SMI#4
H_PBE#4
H_STPCLK#4
H_THRMTRIP#4
H_INIT#4
H_INTR4
+1.05V
+1.05V
+1.05V
+1.05V
+1.05V
+1.05V
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(01_HOST)
1A
734Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(01_HOST)
1A
734Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(01_HOST)
1A
734Sunday, March 08, 2009
ZA3
15mil/10mil
FSB/DDR
H
L
133
100CFG0
CFG0
FSB Clock
Poulsbo(CLG)
Modify R150
from CPU side
to SCH side
rev.c
20090301
HOST
U15A
POULSBO
HOST
U15A
POULSBO
H_D0#
V8
H_D1#
AF4
H_D2#
V2
H_D3#
AA1
H_D4#
AC1
H_D5#
AD2
H_D6#
V4
H_D7#
Y2
H_D8#
U1
H_D9#
Y8
H_D10#
AB2
H_D11#
AF2
H_D12#
AB4
H_D13#
AF8
H_D14#
AE1
H_D15#
AB8
H_D16#
AJ1
H_D17#
AH2
H_D18#
AM8
H_D19#
AN1
H_D20#
AK4
H_D21#
AG1
H_D22#
AH8
H_D23#
AK8
H_D24#
AP8
H_D25#
AK2
H_D26#
AR1
H_D27#
AT8
H_D28#
AT2
H_D29#
AH4
H_D30#
AP4
H_D31#
AP2
H_D32#
AV4
H_D33#
BB6
H_D34#
AV6
H_D35#
AY8
H_D36#
BA1
H_D37#
AU1
H_D38#
AT6
H_D39#
AV8
H_D40#
BB4
H_D41#
AT4
H_D42#
AY6
H_D43#
AV10
H_D44#
AV2
H_D45#
BC1
H_D46#
BB2
H_D47#
AY2
H_D48#
BD2
H_D49#
BH4
H_D50#
BD10
H_D51#
BK10
H_D52#
BD6
H_D53#
BD4
H_D54#
BF2
H_D55#
BE1
H_D56#
BD8
H_D57#
BF4
H_D58#
BH10
H_D59#
BK6
H_D60#
BB8
H_D61#
BF6
H_D62#
BF10
H_D63#
BH6
H_PBE#
AH6
H_SWING
V6
H_STPCLK#
AD10
H_TESTIN#
AK6
RESERVED5
AT10
RESERVED4
AP10
H_CLKINP
M10
H_CLKINN
K10
H_A3#
M2
H_A4#
M8
H_A5#
K4
H_A6#
P2
H_A7#
F4
H_A8#
G1
H_A9#
M4
H_A10#
F6
H_A11#
H6
H_A12#
D2
H_A13#
H2
H_A14#
J1
H_A15#
F2
H_A16#
D4
H_A17#
D12
H_A18#
H12
H_A19#
G11
H_A20#
A7
H_A21#
A9
H_A22#
A11
H_A23#
B6
H_A24#
H8
H_A25#
F10
H_A26#
B10
H_A27#
D6
H_A28#
D10
H_A29#
B12
H_A30#
B4
H_A31#
D8
H_GVREF
Y10
H_BNR#
R1
H_BPRI#
P10
H_BREQ0#
L1
H_CPURST#
M6
H_DBSY#
H10
H_DEFER#
AD6
H_DPWR#
P6
H_CGVREF
AD4
H_DINV0#
AD8
H_DINV1#
AM2
H_DINV2#
AY10
H_DINV3#
BK8
H_DSTBN0#
Y4
H_DSTBN1#
AL1
H_DSTBN2#
AW1
H_DSTBN3#
BH8
H_DSTBP0#
W1
H_DSTBP1#
AM4
H_DSTBP2#
AY4
H_DSTBP3#
BF8
H_HIT#
V10
H_HITM#
T6
H_LOCK#
Y6
H_NMI
AB10
H_REQ0#
P4
H_REQ1#
N1
H_REQ2#
K8
H_REQ3#
P8
H_REQ4#
K2
H_RS0#
T4
H_RS1#
T2
H_RS2#
T8
H_CPUSLP#
AH10
H_TRDY#
F12
H_ADS#
K6
H_DRDY#
J9
H_ADSTB1#
B8
H_DPSLP#
F8
H_INIT#
AF10
H_INTR
AF6
H_RCOMPO
T10
H_SMI#
AB6
H_THRMTRIP#
AM6
H_CPUPWRGD
AP6
CFG0
J27
CFG1
B34
BSEL2
F28
H_ADSTB0#
H4
H_DPRSTP#
AK10
R131 1K/F_4R131 1K/F_4
R140
100/F_4
R140
100/F_4
R127 *56_4R127 *56_4
R89 56_4R89 56_4
R129 1K/F_4R129 1K/F_4
R154 10K_4R154 10K_4
R155 *10K_4R155 *10K_4
R137
221/F_4
R137
221/F_4
R130 1K/F_4R130 1K/F_4
C172
0.1u/10V_4
C172
0.1u/10V_4
R150 24_4R150 24_4
R134 2K/F_4R134 2K/F_4
R299 10K_4R299 10K_4
R147 24.9/F_4R147 24.9/F_4
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LPCAD0
LPCAD3
LPCAD2
LPCAD1
SERIRQ
RSVD1
RTC_X2
RTC_X1
INTVRMEN
RTCRST#
SDVO_R-
SDVO_R+
SDVO_G-
SDVO_G+
SDVO_B+
SDVO_B-
SDVO_CLK-
SDVO_CLK+
PCIE_ICOMPO
LCLK_EC_R
SERIRQ
CLKRUN#
SD_CD#
PCLK_DEBUG_R
LCLK_EC
PHL_CLK
PHL_DATA
PE2TX-R
PE2TX+R
PE1TX-R
PE1TX+R
RTCRST#VCCRTC_3
VCCRTC_4
ECPWROK
SD_CMD
LPCAD0
LPCAD3
LPCAD2
LPCAD1
LPCAD019,22
LPCAD119,22
LPCAD219,22
LPCAD319,22
SDVO_CTRLCLK 14
SDVO_CTRLDAT 14
ECPWROK 22
EC_RSMRST# 22
PECLK_MCH# 3
PECLK_MCH 3
TXLCLKOUT+15
TXLOUT0-15
TXLOUT1-15
TXLOUT2-15
INT_LVDS_DIGON15
INT_LVDS_PWM15
INT_LVDS_BLON15
PCLK_DEBUG19
PM_SLPMODE 22
PM_DPRSLPVR 25
PM_SLPRDY# 22
LCLK_EC22
CLKRUN#22
SERIRQ22
LPCFRAME#19,22
PHL_CLK15
PHL_DATA15
TXLCLKOUT-15
TXLOUT0+15
TXLOUT1+15
TXLOUT2+15
PE1TX- 17
PE1TX+ 17
PE2TX- 19
PE2TX+ 19
PE1RX- 17
PE1RX+ 17
PE2RX- 19
PE2RX+ 19
PM_EXTTS#0 13
SDVO_R-_R 14
SDVO_R+_R 14
SDVO_G-_R 14
SDVO_G+_R 14
SDVO_B+_R 14
SDVO_B-_R 14
SDVO_CLK-_R 14
SDVO_CLK+_R 14
VCCRTC
+3V
+1.5V
+3V
+3V
+3VPCU
VCCRTC
+5V_S5
+3V
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(02_LPC/LVDS/SDIO)
1A
834Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(02_LPC/LVDS/SDIO)
1A
834Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(02_LPC/LVDS/SDIO)
1A
834Sunday, March 08, 2009
ZA3
SDVO to CRT
PCIE TO WLAN/WMAX
SCH_RSV1 : (LPC_CLKOUT0 buffer strength)
0 = 1 Load driver strength
1 = 2 Load driver strength
*** intel has integrated 300K puii-up
PCIE TO LAN
EMI
Poulsbo(CLG)
RTC(RTC)
RTC Battery
SANYO: AHL03001502 ; ML1220-CM11
MATSUSHITA: AHL03001405 ; ML1220/USTC/TSB1
MAXELL: AHL03001404 ; ML1220-ZR1S
Add T60 T61 T62 T63
test point for
Boundary Scan rev.b
20090205
Stuff R312 for Keyboard
and TP issues rev.c
20090228
Add R333 R334
R335 R336 for
LPC AD0~AD3
rev.c 20090301
Change C233 C231 C243
C240 C239 C238 C237
C235 from SDVO chip
side to SCH side rev.c
20090301
CN16
ACS_85204-0200L
CN16
ACS_85204-0200L
1
1
2
2
3
3
4
4
R310 10K_4R310 10K_4
R336 20K_4R336 20K_4
R312 10K_4R312 10K_4
C192 *22p/50V_4C192 *22p/50V_4
R182 10K_4R182 10K_4
T60T60
R300 22_4R300 22_4
R335 20K_4R335 20K_4
R122 10K_4R122 10K_4
C111 0.1u/10V_4C111 0.1u/10V_4
C257 0.1u/10V_4C257 0.1u/10V_4
R334 20K_4R334 20K_4
C233 0.1u/10V_4C233 0.1u/10V_4
C208
1u/10V_6
C208
1u/10V_6
R118 24.9/F_4R118 24.9/F_4
R189 10K_4R189 10K_4
C243 0.1u/10V_4C243 0.1u/10V_4
D12
CH500H-40
D12
CH500H-40
C109 0.1u/10V_4C109 0.1u/10V_4
C231 0.1u/10V_4C231 0.1u/10V_4
R287
10M_4
R287
10M_4
R293 10K_4R293 10K_4
LPC BUS
LVDS
SDIO / MMC
MISC SIGNALSSYSTEM MGMTSDVOPCIE
RTC
U15B
POULSBO
LPC BUS
LVDS
SDIO / MMC
MISC SIGNALSSYSTEM MGMTSDVOPCIE
RTC
U15B
POULSBO
RTC_X1
F48
RTC_X2
F50
INTVRMEN
F46
RSMRST#
L43
SD0_DATA1
A17
SD0_DATA2
K18
SD0_DATA3
F16
SD0_DATA4
K16
SD0_DATA5
B16
SD0_DATA6
D16
SD0_DATA7
K20
SD0_DATA0
H16
SD0_CD#
B18
SD0_CLK
D18
SD0_CMD
J15
SD0_LED
H18
SD0_WP
F18
SD1_DATA0
F22
SD1_DATA1
J19
SD1_DATA2
K22
SD1_DATA3
D22
RESERVED18
G21
SD0_PWR#
H20
SD1_PWR#
D20
SD2_PWR#
A19
SD1_CD#
B22
SD1_CLK
H22
SD1_CMD
F20
SD1_LED
A21
SD1_WP
B20
SD2_DATA0
J23
SD2_DATA1
A25
SD2_DATA2
F26
SD2_DATA3
A23
SD2_DATA4
F24
SD2_DATA5
H24
SD2_DATA6
H26
SD2_DATA7
E25
SD2_CD#
K24
SD2_CLK
D26
SD2_CMD
B24
SD2_LED
D24
SD2_WP
B26
LA_DATAN0
AJ43
LA_DATAN1
AK48
LA_DATAN2
AH48
LA_DATAN3
AG45
LA_DATAP0
AJ45
LA_DATAP1
AK50
LA_DATAP2
AH50
LA_DATAP3
AG43
L_BKLTCTL
A33
L_BKLTEN
A31
L_CTLA_CLK
D28
L_CTLB_DATA
K26
L_DDCCLK
A27
L_DDCDATA
H28
L_VDDEN
D30
LA_CLKN
AF50
LA_CLKP
AF48
LPC_AD0
K38
LPC_AD1
J39
LPC_AD2
A35
LPC_AD3
L39
LPC_CLKOUT0
F38
LPC_CLKOUT1
B36
LPC_CLKRUN#
D36
LPC_FRAME#
K40
PCIE_PERn1
AW45
PCIE_PERp1
AW43
PCIE_PETn1
BB48
PCIE_PETp1
BB50
PCIE_PERn2
BA43
PCIE_PERp2
BA45
PCIE_PETn2
BE49
PCIE_PETp2
BD50
PCIE_CLKINN
AY48
PCIE_CLKINP
AY50
PCIE_ICOMPI
BA47
PCIE_ICOMPO
BA49
SDVO_CTRLCLK
F30
SDVO_CTRLDATA
A29
SDVOB_BLUE
AR45
SDVOB_BLUE#
AR43
SDVOB_RED
AM50
SDVOB_RED#
AM48
SDVOB_GREEN
AT50
SDVOB_GREEN#
AT48
SDVOB_CLK
AV48
SDVOB_CLK#
AV50
SDVOB_INT
AU47
SDVOB_INT#
AU49
SDVOB_STALL
AN45
SDVOB_STALL#
AN43
SDVOB_TVCLKIN
AP48
SDVOB_TVCLKIN#
AP50
RESERVED8
BK50
PWROK
C49
RESERVED0
E49
RTCRST#
H48
SLPMODE
L45
SLPRDY#
J49
EXTTS
D32
DPRSLPVR
D34
RESERVED2
BE15
RESERVED3
BA21
RESERVED1
B32
LPC_SERIRQ
B38
LPC_CLKOUT2
D38
C235 0.1u/10V_4C235 0.1u/10V_4
R302 10K_4R302 10K_4
C281 18p/50V_4C281 18p/50V_4
R281 2K/F_4R281 2K/F_4
R311 10K_4R311 10K_4
R333 20K_4R333 20K_4
C238 0.1u/10V_4C238 0.1u/10V_4
R280
1K_4
R280
1K_4
R282 2K/F_4R282 2K/F_4
C207
1u/10V_6
C207
1u/10V_6
T63T63
R285
6.8K_4
R285
6.8K_4
C237 0.1u/10V_4C237 0.1u/10V_4
R205
20K/F_6
R205
20K/F_6
R303 10K_4R303 10K_4
C258 0.1u/10V_4C258 0.1u/10V_4
C240 0.1u/10V_4C240 0.1u/10V_4
G2
*SHORT_PAD
G2
*SHORT_PAD
12
Q23
MMBT3904
Q23
MMBT3904
2
1 3
T62T62
R294 10K_4R294 10K_4
C239 0.1u/10V_4C239 0.1u/10V_4
C279 18p/50V_4C279 18p/50V_4R185 10K_4R185 10K_4
R298 *10K_4R298 *10K_4
Y6
32.768KHz
Y6
32.768KHz
R289 15K_4R289 15K_4
D13
CH500H-40
D13
CH500H-40
T61T61
R157 22_4R157 22_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IRQ14
PIORDY
SWI#
PCIE_WAKE#_R
EC_SMI#
EC_SCI#
SCH_GPIO0
SCH_GPIO3
ACZ_BITCLK_AUDIO_R
ACZ_SDOUT_AUDIO_R
ACZ_SYNC_AUDIO_R
ACZ_RESET#_AUDIO_R
14M_SCH
SMB_ALERT#
PIORDY
USB_RBIAS_P/N
ACZ_SDOUT_AUDIO
SWI#
PCIE_WAKE#_R
SCH_GPIO3
SCH_GPIO0
IRQ14
NB_CLKREQ0#
TRST#
TMS
XDP_TDO
BC_TDI
TCK_SCH
BOARD_ID0
BOARD_ID1
EC_SCI#
DNBSWON#
DNBSWON#
BOARD_ID0
BOARD_ID1
TRST#
TCK_SCH
BC_TDI
XDP_TDO
TMS
PDAT_SMB
PCLK_SMB
EC_SMI#
PDD1318
PDD118
PDD618
PDD1418
PDD218
PDD018
PDD318
PDD1118
PDD1218
PDD718
PDD418
PDD818
PDD1018
PDD918
PDD518
PDD1518
USBP1-20
USBP2-20
USBP3-15
USBP4-21
USBP5-19
USBP6-20
USBP7-19
USBP0-20
DREFCLK# 3
DREFCLK 3
DREFCLK_SS 3
DREFCLK_SS# 3
PM_RSTRDY# 22
SLPIOVR# 6
SB_BEEP 16
PDA118
PDCS3#18
PDA218
PDCS1#18
PDA018
ACZ_SDOUT_AUDIO 16
ACZ_SYNC_AUDIO 16
ACZ_RESET#_AUDIO 16
NB_CLKREQ0# 3
PCLK_SMB 3,19
PDAT_SMB 3,19
PDDACK#18
PDIOW#18
PDIOR#18
PDDREQ18
IRQ1418
PIORDY18
PLTRST# 14,17,18,19,20,22
PM_RSTWARN 22
EC_SMI# 22
EC_SCI# 22
ACZ_SDIN0 16
14M_SCH 3
THERM_ALERT# 4
USBP0+20
USBP1+20
USBP2+20
USBP6+20
USBP3+15
USBP4+21
USBP5+19
USBP7+19
USBOC#0_120
PCIE_WAKE# 17,19
PM_STPCPU# 3
USBOC#220
ACZ_BITCLK_AUDIO 16
DNBSWON# 22
TRST# 4
TMS 4
BC_TDI 4
XDP_TDO 4
TCK_SCH 4
+1.05V
+1.05V
+3V
+3V
+3V
+3V
+3V_S5
+3V
+3V_S5
+3V
+1.05V
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(03_USB/PATA/HD)
1A
934Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(03_USB/PATA/HD)
1A
934Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(03_USB/PATA/HD)
1A
934Sunday, March 08, 2009
ZA3
XDP/ITP Debug Test Points
SCH GFX SS Clock
SCH GFX Clock
0--MB USB PORT1
2--DB USB PORT3
6--CARD READER
3--CCD Module
1--MB USB PORT2
4--BT Module
5--MINI WLAN/WMAX
7--MINI 3G Module
FFFC000h
FFFD000h(*)
FFFE000h
CMC Base Add.
0 FFFB000h
GPIO3 GPIO0
1
0
0
* : Default
1
0
11
For intel suggest add R295 pull
down 20081218
0
ID1 ID0
1
0
0
* : Default
1
0
11
Functions
Poulsbo(CLG)
Modify JETC pins for Boundary
Scan rev.b 20090205
Change R186 R184 R309 R296
P/N from CS31002JB28 to
CS21002JB34 rev.c 20090301
Del RN8 and Add R337 R338 to SCH
SMBUS rev.c 20090301
Change R297 from
+3V_S5 to +3V
for SMI# rev.c
20090304
R279 10K_4R279 10K_4
R318 *10K_4R318 *10K_4
R239 *10K_4R239 *10K_4
R297 10K_4R297 10K_4
C153
*1u/10V_4
C153
*1u/10V_4
R245 *10K_4R245 *10K_4
R238 1K_4R238 1K_4
R316 *10K_4R316 *10K_4
R128 22.6/F_4R128 22.6/F_4
R240 10K_4R240 10K_4
R184 *1K_4R184 *1K_4
C145
10u/6.3V_6
C145
10u/6.3V_6
T41T41
C124
1u/10V_4
C124
1u/10V_4
R265 56_4R265 56_4
R263 *1K_4R263 *1K_4
R301 4.7K_4R301 4.7K_4
T46T46
T53T53
R116 *0_4R116 *0_4
R296 *1K_4R296 *1K_4
T49T49
R186 *1K_4R186 *1K_4
R319 *10K_4R319 *10K_4
R260 200_4R260 200_4
R308 10K_4R308 10K_4
R256 56_4R256 56_4
R124 10K_4R124 10K_4
R338 10K_4R338 10K_4
R295 10K_4R295 10K_4
R283 33_4R283 33_4
R236 10K_4R236 10K_4
R259 56_4R259 56_4
T45T45
T50T50
R277 33_4R277 33_4
R264 33_4R264 33_4
R337 10K_4R337 10K_4
C143
*1u/10V_4
C143
*1u/10V_4
R317 *10K_4R317 *10K_4
USB I/F PATA/IDE
No-Connect
SMB Termination Voltage
JTAG
SYSTEM GPIOsHD AUDIOCLOCK I/F
U15C
POULSBO
USB I/F PATA/IDE
No-Connect
SMB Termination Voltage
JTAG
SYSTEM GPIOsHD AUDIOCLOCK I/F
U15C
POULSBO
USB_DN0
AE47
USB_DN1
AD48
USB_DN2
AB50
USB_DN3
AA49
USB_DN4
Y48
USB_DN5
V50
USB_DN6
U47
USB_DN7
T50
USB_DP0
AE49
USB_DP1
AD50
USB_DP2
AB48
USB_DP3
AA47
USB_DP4
Y50
USB_DP5
V48
USB_DP6
U49
USB_DP7
T48
USB_OC0#
R43
USB_OC1#
W45
USB_OC2#
R45
USB_OC3#
U43
USB_OC4#
AA45
USB_OC5#
AA43
USB_OC6#
W43
USB_OC7#
U45
USB_RBIASN
AC45
USB_RBIASP
AC43
DA_REFCLKINN
AL45
DA_REFCLKINP
AL43
DB_REFCLKINNSSC
AE45
DB_REFCLKINPSSC
AE43
CLKREQ#
B28
CLK14
H32
USB_CLK48
W41
SUSCLK
J47
HDA_CLK
K14
HDA_SYNC
E13
HDA_RST#
A13
HDA_SDI0
F14
HDA_SDI1
B14
HDA_SDO
D14
HDA_DOCKEN#
E15
HDA_DOCKRST#
H14
PATA_DD0
D40
PATA_DD1
G43
PATA_DD2
B44
PATA_DD3
L41
PATA_DD4
D44
PATA_DD5
F42
PATA_DD6
B42
PATA_DD7
A39
PATA_DD8
J41
PATA_DD9
A41
PATA_DD10
A43
PATA_DD11
F40
PATA_DD12
D42
PATA_DD13
H42
PATA_DD14
E43
PATA_DD15
B40
PATA_DA0
H40
PATA_DA1
J45
PATA_DA2
K42
PATA_DCS1#
E47
PATA_DCS3#
C47
PATA_DDACK#
B46
PATA_DDREQ
J43
PATA_DIOR#
F44
PATA_DIOW#
A37
PATA_IORDY
D46
PATA_IDEIRQ
G45
SPKR
J35
STPCPU#
H30
GPIOSUS0
U41
GPIOSUS1
N43
GPIOSUS2
N45
GPIOSUS3
R41
WAKE#
N41
THRMB
F32
GPIO0
G29
GPIO1
K30
GPIO2
F34
GPIO3
G33
GPIO4
K36
GPIO5
H36
GPIO6
F36
GPIO7
J31
GPIO8
H34
GPIO9
K28
RESERVED6
AU43
RESERVED7
AU45
GPE#
P50
RESET#
BA41
RSTRDY#
H50
RSTWARN
K50
SMI#
B30
TCK
N47
TDI
K48
TDO
M48
TMS
M50
TRST#
N49
SMB_ALERT#
K32
SMB_DATA
G37
SMB_CLK
H38
VTT_1
AW13
VTT_2
AV12
VTT_3
AU13
VTT_4
AT12
VTT_5
AR13
VTT_6
AP12
VTT_7
AN13
VTT_8
AM12
VTT_9
AL13
VTT_10
AK12
VTT_11
AJ13
VTT_12
AH12
VTT_13
AG13
VTT_14
AF12
VTT_15
AE13
VTT_16
AD12
VTT_17
AC13
VTT_18
AB12
VTT_19
AA13
VTT_20
Y12
VTT_21
W13
VTT_22
V12
VTT_23
U13
VTT_24
T12
VTT_25
R13
VTT_26
P12
VTT_27
N13
VTT_28
M14
VTT_29
M12
T47T47
T52T52
R257 *56_4R257 *56_4
T48T48
R284 33_4R284 33_4
R244 1K_4R244 1K_4
T51T51
R309 *1K_4R309 *1K_4
hexainf@hotmail.com
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SM_RCOMPO
SMA_DQ0
SMA_DQ1
SMA_DQ2
SMA_DQ3
SMA_DQ4
SMA_DQ7
SMA_DQ8
SMA_DQ5
SMA_DQ6
SMA_DQ11
SMA_DQ12
SMA_DQ15
SMA_DQ16
SMA_DQ13
SMA_DQ14
SMA_DQ9
SMA_DQ10
SMA_DQ27
SMA_DQ28
SMA_DQ31
SMA_DQ32
SMA_DQ29
SMA_DQ30
SMA_DQ25
SMA_DQ26
SMA_DQ19
SMA_DQ20
SMA_DQ23
SMA_DQ24
SMA_DQ21
SMA_DQ22
SMA_DQ17
SMA_DQ18
SMA_DQ43
SMA_DQ44
SMA_DQ47
SMA_DQ48
SMA_DQ45
SMA_DQ46
SMA_DQ41
SMA_DQ42
SMA_DQ35
SMA_DQ36
SMA_DQ39
SMA_DQ40
SMA_DQ37
SMA_DQ38
SMA_DQ33
SMA_DQ34
SMA_DQ59
SMA_DQ60
SMA_DQ63
SMA_DQ61
SMA_DQ62
SMA_DQ57
SMA_DQ58
SMA_DQ51
SMA_DQ52
SMA_DQ55
SMA_DQ56
SMA_DQ53
SMA_DQ54
SMA_DQ49
SMA_DQ50
SM_REVENIN
SM_RCVENOUT
SM_VREF_MCH
SMA_DQS2 13
SMA_DQS3 13
SMA_DQS4 13
SMA_DQS5 13
SMA_DQS6 13
SMA_DQS7 13
SMA_DQ[63..0]13 SMA_BS0 13
SMA_BS1 13
SMA_BS2 13
SMA_CK0 13
SMA_CK1 13
SMA_CK#1 13
SMA_CK#0 13
SMA_CKE0 13
SMA_CKE1 13
SMA_CS#0 13
SMA_CS#1 13
SMA_DQS0 13
SMA_DQS1 13
SMA_MA3 13
SMA_MA7 13
SMA_MA1 13
SMA_MA2 13
SMA_MA12 13
SMA_MA10 13
SMA_MA5 13
SMA_MA11 13
SMA_MA0 13
SMA_MA8 13
SMA_MA9 13
SMA_MA4 13
SMA_MA13 13
SMA_MA6 13
SMA_CAS# 13
SMA_RAS# 13
SMA_WE# 13
SMA_MA14 13
+1.8VSUS
VTERM
DDR_VREF
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(04_MEM)
1A
10 34Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(04_MEM)
1A
10 34Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(04_MEM)
1A
10 34Sunday, March 08, 2009
ZA3
15mils/10mils
Poulsbo(CLG)
Modify R111
footprint from
RC0402 to SHORT0402
for 0 ohm cost down
rev.c 20090301
R105
10K/F_4
R105
10K/F_4
DDR SYSTEM MEMORY
U15D
POULSBO
DDR SYSTEM MEMORY
U15D
POULSBO
SM_CAS#
BA13
SM_RAS#
BE21
SM_RCOMPO
BE13
SM_RCVENIN
BA39
SM_RCVENOUT
BE41
SM_VREF
BE43
SM_WE#
BA17
SM_DQ0
BG49
SM_DQ1
BG47
SM_DQ2
BE45
SM_DQ3
BC43
SM_DQ4
BE47
SM_DQ5
BC47
SM_DQ6
BC45
SM_DQ7
BK44
SM_DQ8
BK42
SM_DQ9
BG41
SM_DQ10
BK40
SM_DQ11
BC41
SM_DQ12
BG43
SM_DQ13
BJ43
SM_DQ14
BJ39
SM_DQ15
BG39
SM_DQ16
BC39
SM_DQ17
BK38
SM_DQ18
BG37
SM_DQ19
BK36
SM_DQ20
BJ37
SM_DQ21
BG35
SM_DQ22
BJ35
SM_DQ23
BC35
SM_DQ24
BK34
SM_DQ25
BG31
SM_DQ26
BG33
SM_DQ27
BK30
SM_DQ28
BC33
SM_DQ29
BJ33
SM_DQ30
BJ31
SM_DQ31
BC31
SM_DQ32
BJ29
SM_DQ33
BG29
SM_DQ34
BK28
SM_DQ35
BC29
SM_DQ36
BE27
SM_DQ37
BK26
SM_DQ38
BG25
SM_DQ39
BJ25
SM_DQ40
BC25
SM_DQ41
BG23
SM_DQ42
BK22
SM_DQ43
BJ21
SM_DQ44
BK24
SM_DQ45
BJ23
SM_DQ46
BG21
SM_DQ47
BC21
SM_DQ48
BK20
SM_DQ49
BJ19
SM_DQ50
BG17
SM_DQ51
BJ17
SM_DQ52
BG19
SM_DQ53
BC19
SM_DQ54
BC17
SM_DQ55
BK16
SM_DQ56
BG15
SM_DQ57
BC15
SM_DQ58
BJ13
SM_DQ59
BK12
SM_DQ60
BK14
SM_DQ61
BJ15
SM_DQ62
BC13
SM_DQ63
BC11
SM_DQS0
BJ47
SM_DQS1
BJ41
SM_DQS2
BC37
SM_DQS3
BK32
SM_DQS4
BG27
SM_DQS5
BE23
SM_DQS6
BK18
SM_DQS7
BG13
SM_MA0
BJ27
SM_MA1
BA19
SM_MA2
BA27
SM_MA3
BA25
SM_MA4
BE29
SM_MA5
BC23
SM_MA6
BE31
SM_MA7
BA31
SM_MA8
BA33
SM_MA9
BA29
SM_MA10
BE17
SM_MA11
BE35
SM_MA12
BE33
SM_MA13
BE19
SM_MA14
BA37
SM_BS0
BC27
SM_BS1
BE25
SM_BS2
BA35
SM_CK0
BG45
SM_CK1
BE11
SM_CK0#
BJ45
SM_CK1#
BG11
SM_CKE0
BE39
SM_CKE1
BE37
SM_CS0#
BA23
SM_CS1#
BA15
R114
10K/F_4
R114
10K/F_4
R106 *0_6R106 *0_6
C110
0.1u/10V_4
C110
0.1u/10V_4
R107 30.1/F_4R107 30.1/F_4
R111 *Short_4R111 *Short_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCAUSBPLL
VCCAHPLL
VCCADPLLB
VCC5REFSUS
VCC_HDA
VCC5REF
VCC5REF
VCC5REFSUS
SCH_VCCSUS3
+1.05V
+1.5V
+1.5V
+1.5V
+3V
+1.5V
+1.8VSUS
+3V_S5
+3V
VCCRTC
+1.5V
+1.5V
+1.05V
+1.5V
+1.8VSUS
+1.5V
+1.5V
+3V
+3V
+3V
+3V
+5V
+3V_S5
+5V_S5
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(05_Power)
1A
11 34Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(05_Power)
1A
11 34Sunday, March 08, 2009
ZA3
Size Document Number Rev
Date: Sheet
of
Quanta Computer Inc.
PROJECT :
Poulsbo(05_Power)
1A
11 34Sunday, March 08, 2009
ZA3
Poulsbo(CLG)
Change C163 C136
connect
SCH_VCCSUS3 power
net 20090223
Modify R126
footprint from
RC0603 to
SHORT0603 for 0
ohm cost down
rev.c 20090301
C126
10u/6.3V_6
C126
10u/6.3V_6
C175
1u/10V_4
C175
1u/10V_4
C150 1u/10V_4C150 1u/10V_4
C154
0.1u/10V_4
C154
0.1u/10V_4
C177
1u/10V_4
C177
1u/10V_4
C133 1u/10V_4C133 1u/10V_4
C136
1u/10V_4
C136
1u/10V_4
C169
1u/10V_4
C169
1u/10V_4
C146 1u/10V_4C146 1u/10V_4
L18 BLM18PG121SN1/2A/120ohm_6L18 BLM18PG121SN1/2A/120ohm_6
C179 1u/10V_4C179 1u/10V_4
C115 1u/10V_4C115 1u/10V_4
D9
*BZX584C5V6
D9
*BZX584C5V6
2 1
C123
1u/10V_4
C123
1u/10V_4
C122
1u/10V_4
C122
1u/10V_4
L14 BLM18PG121SN1/2A/120ohm_6L14 BLM18PG121SN1/2A/120ohm_6
C163
0.1u/10V_4
C163
0.1u/10V_4
C176
1u/10V_4
C176
1u/10V_4
C142
0.1u/10V_4
C142
0.1u/10V_4
C144
0.1u/10V_4
C144
0.1u/10V_4
C147 1u/10V_4C147 1u/10V_4
C170
1u/10V_4
C170
1u/10V_4
C132
2.2u/6.3V_6
C132
2.2u/6.3V_6
R126 *Short_6R126 *Short_6
R123 10_4R123 10_4
C116
1u/10V_4
C116
1u/10V_4
C187 1u/10V_4C187 1u/10V_4
VCC
U15E
POULSBO
VCC
U15E
POULSBO
VCC_49
AM34
VCC_50
AM32
VCC_51
AM30
VCC_52
AM28
VCC_53
AM26
VCC_54
AM24
VCC_55
AM22
VCC_56
AM20
VCC_57
AM18
VCC_58
AM16
VCC_59
AK34
VCC_60
AK32
VCC_61
AK30
VCC_62
AK28
VCC_120
AK26
VCC15_1
R33
VCC15_2
R31
VCC15_3
R29
VCC15_4
R27
VCC15_5
R25
VCC15_6
R23
VCC15_7
R21
VCC15_8
R19
VCC15_9
R17
VCC15_10
R15
VCC15_11
P34
VCC15_12
P32
VCC15_13
N33
VCC15_14
N31
VCC15_15
M38
VCC15_16
M36
VCC15_17
M34
VCC15_18
M32
VCC_121
AK24
RESERVED10
P38
RESERVED9
P36
VCC15USB_1
AD34
VCC15USB_2
AD32
VCC15USB_3
AB34
VCC15USB_4
AB32
VCC15USB_5
Y34
VCC15USB_6
Y32
VCCSM_10
AW37
VCCSDVO_105
AL37
VCCSDVO_106
AK38
RESERVED12
AB38
RESERVED11
AA37
VCC33_1
N29
VCC33_2
N27
VCC33_3
N25
VCC33_4
N23
VCC33_5
N21
VCC33_6
N19
VCC33_7
N17
VCC33_8
N15
VCC33_9
M30
VCC33_10
M28
VCC33_11
M26
VCC33_12
M24
VCC33_13
M22
VCC33_14
M20
VCC33_15
M18
VCC33SUS_1
R39
VCC33SUS_2
U37
VCC33SUS_3
T38
VCCP33USBSUS_1
AA39
VCCP33USBSUS_2
Y38
VCCSM_100
AW35
VCCSM_101
AW33
VCCSM_102
AW31
VCCSM_103
AW29
VCCSM_104
AW27
VCCSM_105
AW25
VCCSM_106
AW23
VCCSM_107
AW21
VCCSM_108
AW19
RESERVED16
AC37
RESERVED17
AB36
VCCPCIE_101
AV38
VCCLVDS_101
AG37
VCCSDVO_110
AK36
VCC_11
AK22
VCC_12
AK20
VCC_13
AK18
VCC_14
AK16
VCC_15
AH34
VCC_16
AH32
VCC_17
AH30
VCC_18
AH28
VCC_19
AH26
VCC_20
AH24
VCC_21
AH22
VCC_22
AH20
VCC_23
AH18
VCC_24
AH16
VCC_25
AF34
VCC_26
AF32
VCC_27
AF30
VCC_28
AF28
VCC_29
AF26
VCC_30
AF24
VCC_31
AF22
VCC_32
AF20
VCC_33
AF18
VCC_34
AF16
VCC_35
AD30
VCC_36
AD28
VCC_37
AD26
VCC_38
AD24
VCC_39
AD22
VCC_40
AD20
VCC_41
AD18
VCC_42
AD16
VCC_43
AB30
VCC_44
AB28
VCC_45
AB26
VCC_46
AB24
VCC_47
AB22
VCC_48
AB20
VCCPCIE_1
AU37
VCCPCIE_2
AT38
VCCPCIE_3
AT36
VCCPCIE_4
AT34
VCC_63
AB18
VCC_64
AB16
VCC_65
Y30
VCC_66
Y28
VCC_67
Y26
VCC_68
Y24
VCC_69
Y22
VCCPCIE_5
AT32
VCCPCIE_6
AR37
VCCPCIE_7
AP38
VCCPCIE_8
AP36
VCCPCIE_9
AN37
VCC_70
Y20
VCCLVDS_100
AF38
VCCSDVO_100
AJ37
VCCSM_1
AW17
VCCSM_2
AV36
VCCSM_3
AV34
VCCSM_4
AV32
VCCSM_5
AV30
VCCSM_6
AV28
VCCSM_7
AV26
VCCSDVO_101
AH38
VCCSDVO_103
AH36
VCCPCIE_100
AM36
VCCSM_21
AV24
VCCSM_22
AV22
VCCSM_23
AV20
VCCSM_24
AV18
VCCSM_25
AV16
VCCSM_26
AT30
VCCSM_27
AT28
VCCSM_28
AT26
VCCSM_29
AT24
VCCSM_30
AT22
VCCSM_31
AT20
VCCSM_32
AT18
VCCSM_33
AT16
VCCSM_34
AP34
VCCSM_35
AP32
VCCSM_36
AP30
VCCSM_37
AP28
VCCSM_38
AP26
VCCSM_39
AP24
VCCSM_40
AP22
VCCSM_41
AP20
VCCSM_42
AP18
VCCSM_43
AP16
VCC_71
Y18
VCC_72
Y16
VCC_73
V34
VCC_74
V32
VCC_75
V30
VCC_76
V28
VCC_77
V26
RESERVED14
N37
RESERVED15
N35
VCC_78
V24
VCC_79
V22
VCC_80
V20
VCC_81
V18
VCC33RTC
A45
VCCHDA_1
K12
VCCHDA_2
J11
VCCAUSBPLL
AC39
VCCDHPLL
BB10
VCCAHPLL
BA11
VCCAUSBBGSUS
AE41
VCCAPCIEBG
AW41
VCCADPLLA
AE39
VCCAPCIEPLL
AN49
VCCADPLLB
AG39
VCC5REF_1
K34
VCC_82
V16
VCC5REFSUS
AA41
VCC_10
T34
VCC_9
T32
VCC_8
T30
VCC_7
T28
VCC_6
T26
VCC_5
T24
VCC_4
T22
VCC_3
T20
VCC_2
T18
VCC_1
T16
VCCLVDS_1
AF36
VCCLVDS_2
AE37
VCCLVDS_3
AD36
VCC33_16
M16
RESERVED13
W37
VCCP33USBSUS_3
W39
VSSAPCIEBG
AY42
VSSAUSBBGSUS
AC41
C171
1u/10V_4
C171
1u/10V_4
C117
0.1u/10V_4
C117
0.1u/10V_4
C151
1u/10V_4
C151
1u/10V_4
C134
1u/10V_4
C134
1u/10V_4
L16 BLM18PG121SN1/2A/120ohm_6L16 BLM18PG121SN1/2A/120ohm_6
C152 0.1u/10V_4C152 0.1u/10V_4
C118
1u/10V_4
C118
1u/10V_4
R177 10_4R177 10_4
D11
*BZX584C5V6
D11
*BZX584C5V6
2 1
C125
1u/10V_4
C125
1u/10V_4
C168
1u/10V_4
C168
1u/10V_4
C164
1u/10V_4
C164
1u/10V_4
L17 BLM18PG121SN1/2A/120ohm_6L17 BLM18PG121SN1/2A/120ohm_6
hexainf@hotmail.com
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