Acer Aspire 5620, Aspire 5670 TravelMate 4210, TravelMate 4270, TravelMate 4670 Schematics

5
4
3
2
1
ZB1 SYSTEM BLOCK DIAGRAM
P42
P31
PCI-Express X 2 TV out / CRT TV in
DVI Audio 10/100/1G
MAX4892 2N7002 MAX4892
New Card
Broadcom 5789/87/88
4401E 10/100 5705E GLAN
EEPROM
P27
Transformer
Fan Header
P5,P40
Switch
Switch
X'TAL 25M
P27
P27
P33
RJ45
DVI / 7307 Chrontel
D D
TVOUT
P41
P25
Clock Generator ICS954310BGLF
X'TAL
14.318MHZ
P2
TFT LCD Panel
WXGA WSXGA+ WUXGA
CRT
C C
Bluetooth
USB4 P29
USB Port x 4
B B
USB0~3
CCD
Audio Amplifier
P25
P26
P29
P29USB7
P37
SPIF3811 U51
HDD Master CN41
ODD Slave CN24
MIC Jack
SATA0
P37
HOT SWAP BAY
PATA
P35
PATA
P35
Int MIC
P36
Azalia Audio Controller ALC883
P36
Line in
SATA1
USB 2.0
Azalia
uFCPGA U44
SVIO TVout LVDS VGA
FSB
CALISTOGA 945GM/PM 1466 FCBGA U43
P6,P7,P8,P9,P10,P11
X4 DMI interface
ICH7M 82801
652 BGA U49
P14,P15,P16,P17
X'TAL
32.768K
LPC
KBC NS PC97541V
P3,P4
Dual Channel DDR2
533/667 Mhz
PCI-Express 16X Lan
VRAM X 4 U30,33,6,10
PCI-Express
X'TAL
32.768KHZ
P39
LVDS VGA/TV out
DDR2 16M X 16 32M X 16
IEEE 1394 Port
Yonah/Merom 479
CPU
Thermal Sensor U64
DDR II SODIMM0 CN36
DDR II SODIMM1 CN37
ATI M52/54 U34
P23
OSC 48MHZ
P18,P19,P20,P21, P22,P24
PCMCIA+1394 +Cardreader Controller
TI PCI7412
P30
6 in 1 Cardreader Socket
P5
P12,P13
X'TAL24.576MHZ
Docking Connector
with PCIE1~2 , Lan ,Ser & Par Port ,
PS2 , VGA, DVI , SPDIF
SM BUS
MiniCard / WLAN
P30,P31
P32
USB7 USB8
P29
MINI-PCI / TV Card
P29
PCMCIA Slot
BIOS
Primary Battery 2nd 8/6 Cell
PROJECT : ZB1
Quanta Computer Inc.
of
150Tuesday, February 07, 2006
1
C
P38
TPM
Connector
FIR CIR
Size Document Number Rev
BLOCK DIAGRAM
2
Date: Sheet
P39
A A
Speaker
Connector
P37
Phone Jack
5
MDC 1.5
4
P36
Touch Pad (Dual-Point)
P40
Super I/O SMSC SIO1000
3
A
B
C
D
E
4 4
+3V
120 ohms@100Mhz
L38 ACB2012L-120-T_8
25 mils
VDD_SRC_CPU
C772
.1U-10V_4
R234 2.2_6
C771
.1U-10V_4
VDD_A
.1U-10V_4
C298
C300
.1U-10V_4
.1U-10V_4
C314
10U-10V_8
C786
CGCLK_SMB<13>
CGDAT_SMB<13>
CLKUSB_48<16>
SIO_14M<38>
C279 10U-10V_8
VR_PWRGD_CK410#<16,43>
PM_STPCPU#<16>
PM_STPPCI#<16>
CGCLK_SMB CGDAT_SMB
CLK_BSEL0 CLK_BSEL1 CLK_BSEL2
25 mils
3 3
2 2
+3V
L74
ACB2012L-120-T_8
NEW_CLKREQ#<33>
EZ_CLKREQ#<42>
VDD_PCI
R191 2.2_6
R233 1_6
C768 .1U-10V_4
VDD_48
VDD_REF
C297
.1U-10V_4
CLKGN_REQ3_PCIE CLKGN_REQ4_PCIE
+3V
C767
C760
.1U-10V_4
10U-10V_8
C769
C770
.1U-10V_4
10U-10V_8
C308 10U-10V_8
R206 10K_4 R217 10K_4
Iref=5mA, Ioh=4*Iref
DREFCLK<8> DREFCLK#<8>
CPU_BSEL0<3> CPU_BSEL1<3> CPU_BSEL2<3> MCH_BSEL2 <8>
DREFCLK DREFCLK#
+3V
BSEL strappings need to be set for 533MHz Moby Dick (Intel?915GM - Calistoga Interposer) (if Calistoga is designed for 667MHz board).
Close to IC <500mils
C277 27P-50V_4
C257 27P-50V_4
+3V
R224 4.7K_4
R223 33_4
C310 *10P-50V_4
R510 475/F_6
RP52
1 3
33_4P2R_S
CLK_BSEL0 CLK_BSEL1 CLK_BSEL2
R196 *10K_4
R195 33_4 R502 4.7K_4
VDD_REF VDD_SRC_CPU
VDD_PCI
VDD_SRC_CPU
VDD_48
CLKGN_REQ3_PCIE CLKGN_REQ4_PCIE
R493 1K_4 R192 1K_4 R235 1K_4
CG_XIN
21
Y6
14.318MHZ
CG_XOUT
PM_STPCPU# PM_STPPCI#
IREF
2
R_DOT96#
4
T38
INTERNAL PULL HIGH
VDD_A
U15
58
X1
57
X2
10
Vtt_PwrGd#/PD
62
CPU_STOP#
63
PCI/PCIE_STOP#
54
SCLK
55
SDATA FSA/USB_48MHz
16
FSB/TEST_MODE
61
REF1/FSLC/TEST_SEL
56
VDD_REF
50
VDDCPU
1
VDD_PCI_1
7
VDD_PCI_2
21
VDD_PCIE
28
VDDPCIE
42
VDD_PCIE
11
VDD_48
32
REQ3(PCIE)
33
REQ4(PCIE)
47
IREF
14
DOT96MHz
15
DOT96MHz#
34
PWRSAVE#
53
MCH_BSEL0 <8> MCH_BSEL1 <8>
CK-410M
CPUCLKC2/PCIEC8
27Mfix/LCD_SSCGT/PCIE0T
27SS/LCD_SSCGC/PCIE0C
selPCIEX0_LCD#/PCI5
GND
GND
GND_PCI_2
GND_SRC VDDA
GND_PCI_1
GND_48
GND
59
37126
29 4592
13
46
REF0
GNDA
CPUCLKT0 CPUCLKC0
CPUCLKT1 CPUCLKC1
CPUCLKT2/PCIET8
REQ1#/PCIET7 REQ2#/PCIEC7
PCIET6 PCIEC6
PCIET5 PCIEC5
PCIET4 PCIEC4
SATA_CKT SATA_CKC
PCIET3 PCIEC3
PCIET2 PCIEC2
PCIET1 PCIEC1
PCI4
PCICLK2/REQ_SEL
PCI3
PCIF1/selLCD_27#
PCIF0/ITP_EN
ICS954310BGLF
Place these termination to close CK410M.
14M_REF
60
RHCLK_CPU
52
RHCLK_CPU#
51
RHCLK_MCH
49
RHCLK_MCH#
48
CLK_PCIE_MINI1_
44
CLK_PCIE_MINI1_#
43 41
40
RSRC_MCH
39
RSRC_MCH#
38 36
35
CLK_PCIE_NEW
30
CLK_PCIE_NEW#
31
RSRC_SATA
26
RSRC_SATA#
27
RSRC_ICH
24
RSRC_ICH#
25 22
23 19
20
R_DREFSSCLKR_DOT96
17
R_DREFSSCLK#
18
R_PCLK_SIO
5
R_PCLK_7411
4
R_PCLK_LAN
3
PCLK_MINI_LPC
64
R_PCLK_ICH R_PCLK_591
8
RP58
1 3
RP57
1 3
RP56
1 3
1 3
RP54
1 3
1 3
RP46
3 1
RP47
3 1
RP48
3 1
RP49
3 1
RP51
3 1
R199 33_4 R201 33_4 R202 NL_G5@33_4 R225 33_4 R500 33_4 R499 33_4
R220 *10K_4 R197 10K_4 R198 10K_4
EV@: Stuff when external VGA used
IV@: Stuff when internal VGA used
R_DREFSSCLK R_DREFSSCLK#
R_PCLK_SIO
RP118 EV@33_4P2R_S
1 3
33_4P2R_S
2 4
33_4P2R_S
2 4
33_4P2R_S
2 4
RP55
2 4
33_4P2R_S
2
EZ@33_4P2R_S
4
RP53
2 4
EX@33_4P2R_S
4
EZ@33_4P2R_S
2
33_4P2R_S
4 2
33_4P2R_S
4 2
G7_G9@33_4P2R_S
4 2
IV@33_4P2R_S
4 2
C757
+3V
*10P-50V_4
C756
C302
*10P-50V_4
*10P-50V_4
2 4
R689 EV@10K_4 R200 IV@10K_4
C236
C235
NL_G5@10P-50V_4
*10P-50V_4
+3V
CLK_CPU_BCLK <3> CLK_CPU_BCLK# <3>
CLK_MCH_BCLK <6> CLK_MCH_BCLK# <6>
C234
R222 33_4
CLK_PCIE_MINI1 <29> CLK_PCIE_MINI1# <29>
CLK_PCIE_EZ2 <42> CLK_PCIE_EZ2# <42>
CLK_PCIE_3GPLL <8> CLK_PCIE_3GPLL# <8>
CLK_PCIE_EZ1 <42> CLK_PCIE_EZ1# <42>
CLK_PCIE_NEW_C <33> CLK_PCIE_NEW_C# <33>
CLK_PCIE_SATA <14> CLK_PCIE_SATA# <14>
CLK_PCIE_ICH <15> CLK_PCIE_ICH# <15>
CLK_PCIE_LAN <27> CLK_PCIE_LAN# <27>
DREFSSCLK <8> DREFSSCLK# <8>
*10P-50V_4
PCI_CLK_SIO <38> PCI_CLK_7412 <30> PCLK_LAN <27> PCLK_MINI <29> PCLK_ICH <15> PCLK_591 <39>
CLK_PCIE_M56 <18> CLK_PCIE_M56# <18>
CLK_CPU_BCLK CLK_CPU_BCLK#
CLK_MCH_BCLK CLK_MCH_BCLK#
CLK_PCIE_MINI1 CLK_PCIE_MINI1#
CLK_PCIE_LAN CLK_PCIE_LAN#
CLK_PCIE_3GPLL CLK_PCIE_3GPLL#
CLK_PCIE_SATA CLK_PCIE_SATA#
CLK_PCIE_ICH CLK_PCIE_ICH#
CLK_PCIE_NEW_C CLK_PCIE_NEW_C#
DREFSSCLK DREFSSCLK#
DREFCLK DREFCLK#
CLK_PCIE_EZ2 CLK_PCIE_EZ2#
CLK_PCIE_EZ1 CLK_PCIE_EZ1#
CLK_PCIE_M56 CLK_PCIE_M56#
14M_ICH <16>
C309 *10P-50V_4
RP62
1 3
RP61
1 3
RP10
1
3
RP120 G7_G9@49.9_4P2R_S
3
1
RP59
1
3
RP122
3
1
RP121
3
1
RP123 EX@49.9_4P2R_S
3
1
3
1
3
1
RP60
1
3
RP4
1
3
1
3
49.9_4P2R_S
2 4
49.9_4P2R_S
2 4
49.9_4P2R_S
2 4
4 2
49.9_4P2R_S
2 4
49.9_4P2R_S
4 2
49.9_4P2R_S
4 2
4 2
RP45
4 2
RP117
4
IV@49.9_4P2R_S
2
EZ@49.9_4P2R_S
2
49.9_4P2R_S
4
EZ@49.9_4P2R_S
2 4
RP116
2 4
EV@49.9_4P2R_S
Q15
R218
RHU002N06
PDAT_SMB<16,27,29,33,42>
1 1
RHU002N06
PCLK_SMB<16,27,29,33,42>
A
2
3
+3V
Q14
2
3
10K_4
1
1
R216 10K_4
CGDAT_SMB
CGCLK_SMB
FSC FSB FSA CPU SRC PCI 1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33 0 1 0 200 100 33 0 0 0 266 100 33 1 0 0 333 100 33 1 1 0 400 100 33 1 1 1 200 100 33
B
C
D
Size Document Number Rev
CLOCK GENERATOR
Date: Sheet
PROJECT : ZB1
Quanta Computer Inc.
of
250Wednesday, March 01, 2006
E
C
5
H_A#[31:3]<6>
D D
H_ADSTB0#<6> H_REQ#[4:0]<6>
H_A#[31:3]<6>
C C
H_ADSTB1#<6>
H_A20M#<14> H_FERR#<14>
H_IGNNE#<14>
H_STPCLK#<14>
B B
XDP_DBRESET#
XDP_TMS
XDP_TDI
XDP_BPM#5
A A
XDP_TCK
XDP_TRST#
R154 0_4
H_INTR<14>
H_NMI<14>
H_SMI#<14>
T78 T81 T77 T82 T71 T22 T70 T69 T79 T80 T73 T27
T111
R228 *54.9/F_4
R156 39.2/F_4
R155 150_4
R157 54.9/F_4 R291
R159 27.4/F_4
R158 680_4
5
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
H_STPCLK_R#
TP_A32# TP_A33# TP_A34# TP_A35# TP_A36# TP_A37# TP_A38# TP_A39# TP_APM0# TP_APM1#
TP_HFPLL
U44A
J4
A[3]#
L4
A[4]#
M3
A[5]#
K5
A[6]#
+1.05V
AA1 AA4 AB2 AA3
B25
M1 N2
J1 N3 P5 P2
L1 P4 P1 R1
L2 K3
H2 K2
J3
L5 Y2
U5 R3
W6
U4 Y5 U2 R4 T5 T3
W3 W5
Y4
W2
Y1 V4
A6 A5 C4
D5 C6 B4 A3
M4 N5 T2 V3 B2 C3
ADDR GROUP 0
A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#
REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#
A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# ADSTB[1]#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD[01]# RSVD[02]# RSVD[03]# RSVD[04]# RSVD[05]# RSVD[06]# RSVD[07]# RSVD[08]# RSVD[09]# RSVD[10]#
RSVD[11]#
PZ47903-2741-01
H_PROCHOT#<43>
XDP/ITP SIGNALSTHERMH CLK
RESERVED
XDP_TCK PD 27.4/1% XDP_TRST PD 680ohm /5% XDP_TDI PU 150ohm /1.05V XDP_TMS PU 39.2/1%
DEFER#
DRDY# DBSY#
CONTROL
LOCK#
RESET#
TRDY#
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
PROCHOT THERMDA THERMDC
THERMTRIP#
BCLK[0] BCLK[1]
RSVD[12]#
RSVD[13]# RSVD[14]# RSVD[15]# RSVD[16]# RSVD[17]# RSVD[18]# RSVD[19]# RSVD[20]#
THERMTRIP#_PWR
4
H1
ADS#
E2
BNR#
G5
BPRI#
H5 F21 E1
F1
BR0#
D20
IERR#
B3
INIT#
H4 B1
H_RS#0
F3
RS[0]# RS[1]# RS[2]#
HITM#
TRST#
DBR#
R238 0_4
HIT#
TCK
TDI TDO TMS
H_RS#1
F4
H_RS#2
G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2
XDP_BPM#5
AC1 AC5 AA6 AB3 AB5 AB6
XDP_DBRESET#
C20 D21
A24 A25
THERMTRIP#_PWR
C7
A22 A21
TP_EXTBREF
T22
TP_SPARE0
D2
TP_SPARE1
F6
TP_SPARE2
D3
TP_SPARE3
C1
TP_SPARE4
AF1
TP_SPARE5
D22
TP_SPARE6
C23
TP_SPARE7
C24
DELAY_VR_PWRGOOD<8,16,43>
+1.05V
R292 0_4
4
XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST#
H_PROCHOT_R#
T102
T101
H_PROCHOT_R#
R290 56_4
T17
H_ADS# <6> H_BNR# <6> H_BPRI# <6>
H_DEFER# <6> H_DRDY# <6> H_DBSY# <6>
H_BREQ#0 <6>
H_INIT# <14> H_LOCK# <6>
H_CPURST# <6>
H_RS#[2:0] <6>
H_TRDY# <6> H_HIT# <6>
H_HITM# <6>
T14 T18 T74 T13 T75
+1.05V
T76
R236 68_4
H_THERMDA <5> H_THERMDC <5>
R497 *0_4
CLK_CPU_BCLK <2> CLK_CPU_BCLK# <2>
T49
T31 T26 T72
T43 T42 T113
Add D34, C948, Change R291 to 470K
2
Q51 BSS301
+1.05V
+1.05V
R230
56.2/F_4
T98
T12
XDP PU_R < 0.2"
PM_THRMTRIP# <8,14>
+1.05V
R251 1K/F_4
R253 2K/F_6
+1.05V
3
*10K_4
1 2
1 3
Q17 MMBT3904
3
+1.05V <4,6,9,10,14,17,46>
H_D#[63:0]<6>
H_DSTBN#0<6> H_DSTBP#0<6> H_DINV#0<6> H_D#[63:0]<6>
H_DSTBN#1<6> H_DSTBP#1<6> H_DINV#1<6>
H_GTLREF
20/15mils
CPU_BSEL0<2> CPU_BSEL1<2> CPU_BSEL2<2>
*BAS316
D34
2 1
C948 *1U-16V_6
1999_SHT# <44>
3
Near to MCH <500mils
H_D#0 H_D#1 H_D#2 H_D#3
H22
H_D#4
F23
H_D#5
G25
H_D#6
E25
H_D#7
E23
H_D#8
K24
H_D#9
G24
H_D#10 H_D#11 H_D#12
H26
H_D#13
F26
H_D#14
K22
H_D#15
H25 H23 G22
H_D#16
N22
H_D#17
K25
H_D#18
P26
H_D#19
R23
H_D#20 H_D#21 H_D#22 H_D#23
M23
H_D#24
P25
H_D#25
P22
H_D#26
P23
H_D#27
T24
H_D#28
R24
H_D#29 H_D#30
T25
H_D#31
N24
M24
N25
M26
AD26
*1K/F_4
R525 R524
XDP_DBRESET#
C26
51/F_4
D25
B22
B23
C21
+1.05V
1 3
*MMBT3904
R511 0_4
U44B
E22
D[0]#
F24
D[1]#
E26
D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]#
J24
D[10
J23
D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]#
J26
DINV[0]#
D[16]# D[17]# D[18]# D[19]#
L25
D[20]#
L22
D[21]#
L23
D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]#
L26
D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#
GTLREF
TEST1 TEST2
BSEL[0] BSEL[1] BSEL[2]
PZ47903-2741-01
R509 *330_6
2
Q35
DATA GRP 0 DATA GRP 1
MISC
D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]#
DATA GRP 2
D[42]# D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
DATA GRP 3
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
2
AA23 AB24 V24 V26 W25 U23 U25 U22 AB25 W22 Y23 AA26 Y26 Y22 AC26 AA24 W24 Y25 V23
AC22 AC23 AB22 AA21 AB21 AC25 AD20 AE22 AF23 AD24 AE21 AD21 AE25 AF25 AF22 AF26 AD23 AE24 AC20
R26 U26 U1 V1
E5 B5 D24 D6 D7 AE6
SYS_RST# <16>
2
1
H_D#[63:0] <6>
H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0 COMP1 COMP2 COMP3
27.4/F_6
T16
ICH_DPRSTP# <14> H_DPSLP# <14>
H_DSTBN#2 <6> H_DSTBP#2 <6> H_DINV#2 <6> H_D#[63:0] <6>
H_DSTBN#3 <6> H_DSTBP#3 <6> H_DINV#3 <6>
R252 R25054.9/F_4 R14227.4/F_6 R14354.9/F_4
H_CPUSLP# <6,14> PSI# <43>
+1.05V
25/25mils
H_PWRGD is CMOS driving by ICH
T112
R152 *200/F_6
TO VRD
Size Document Number Rev
CPU(1 OF 2 )
Date: Sheet
PROJECT : ZB1
Quanta Computer Inc.
350Wednesday, March 01, 2006
1
H_DPWR# <6> H_PWRGD <14>
of
C
5
U44D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
D D
C C
B B
A A
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
P3
VSS[081]
PZ47903-2741-01
5
VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162]
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24
VCC_CORE
4
C254 22U-6.3V_8
C264 22U-6.3V_8
C295 22U-6.3V_8
C792 22U-6.3V_8
C290 22U-6.3V_8
C285 22U-6.3V_8
C788 22U-6.3V_8
C296 22U-6.3V_8
C774 22U-6.3V_8
C247 22U-6.3V_8
C283 22U-6.3V_8
C259 22U-6.3V_8
C276 22U-6.3V_8
C790 22U-6.3V_8
C778 22U-6.3V_8
C306 22U-6.3V_8
change to 0805
4
C789 22U-6.3V_8
C791 22U-6.3V_8
C775 22U-6.3V_8
C278 22U-6.3V_8
C779 22U-6.3V_8
C294 22U-6.3V_8
C299 22U-6.3V_8
C776 22U-6.3V_8
C777 22U-6.3V_8
C282 22U-6.3V_8
C793 22U-6.3V_8
C261 22U-6.3V_8
C274 22U-6.3V_8
C329 *22U-6.3V_8
C255 22U-6.3V_8
C248 22U-6.3V_8
3
U44C
A7
A9 A10 A12 A13 A15 A17 A18 A20
B7
B9 B10 B12 B14 B15 B17 B18 B20
C9 C10 C12 C13 C15 C17 C18
D9 D10 D12 D14 D15 D17 D18
E7
E9 E10 E12 E13 E15 E17 E18 E20
F7
F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9
AA10 AA12 AA13 AA15 AA17 AA18 AA20
AB9
AC10 AB10 AB12 AB14 AB15 AB17 AB18
PZ47903-2741-01
3
VCC[001] VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009] VCC[010] VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018] VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025] VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032] VCC[033] VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041] VCC[042] VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064] VCC[065] VCC[066] VCC[067]
VCC[68] VCC[69] VCC[70] VCC[71] VCC[72] VCC[73] VCC[74] VCC[75] VCC[76] VCC[77] VCC[78] VCC[79] VCC[80] VCC[81] VCC[82] VCC[83] VCC[84] VCC[85] VCC[86] VCC[87] VCC[88] VCC[89] VCC[90] VCC[91] VCC[92] VCC[93] VCC[94] VCC[95] VCC[96] VCC[97] VCC[98] VCC[99]
VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
VCCSENSE VSSSENSE
2
VCC_COREVCC_CORE
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26
AD6 AF5 AE5 AF4 AE3 AF2 AE2
AF7 AE7
VCC_CORE
+1.05V
+1.05V
C187
330U-2.5V_7343
+
R194 100/F_4
Size Document Number Rev
C328 *22U-6.3V_8
+1.05V VCC_CORE +1.5V
C304 .1U-10V_4
H_VID0 <43> H_VID1 <43> H_VID2 <43> H_VID3 <43> H_VID4 <43> H_VID5 <43> H_VID6 <43>
+1.05V <3,6,9,10,14,17,46> VCC_CORE <43> +1.5V <10,15,17,29,33,44,45>
C327 *22U-6.3V_8
reserve dummy cap--Allen
C250 .1U-10V_4
+1.5V
C305 .1U-10V_4
VCC_CORE
R203 100/F_4
C326 *22U-6.3V_8
C249 .1U-10V_4
+1.5V
VCCSENSE <43> VSSSENSE <43>
PROJECT : ZB1
Quanta Computer Inc.
CPU(2 OF 2 )
Date: Sheet of
2
1
C213 .1U-10V_4
C815 .01U-16V_4
450Friday, February 24, 2006
1
C325 *22U-6.3V_8
C206 .1U-10V_4
C816 10U/X5R-6.3V_8
C
5
4
3
2
1
+3V
Q38
3
3
Q37
+3V
2
1
R254 10K_4
2
1
THERM_ALERT#<16>
LM86_SMD
1 2
+3V
R708 10K_4
RHU002N06
D D
C C
MBCLK<19,39,48>
MBDATA<19,39,48>
RHU002N06
+3V
R258 10K_4
LM86__SMC
R260
*0_4
THERM_OVER#
R257 200_6
LM86VCC
25mils
U18
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
MAX6657
ADDRESS: 98H
VCC
DXP DXN
GND
C323 .1U-10V_4
1 2 3 5
H_THERMDA
C324 2200P-50V_4
H_THERMDC
10/20mils
H_THERMDA <3>
H_THERMDC <3>
CPU FAN
+3V
R134
FANPWR = 1.6*VSET
U64
+5V
B B
CPUFANON#<19>
CPUFAN#<39>
THERM_OVER#
FAN_VSET
2 3
VIN VO
GND
1
FON#
GND GND
4
VSET
GND
G995
5 6 7 8
FANSIG<39>
TH_FAN_POWER
C176 10U-10V_8
C177 .01U-16V_4
C178
.01U-16V_4
10K_4
CN26
1 2 3
FAN_CON
A A
5
4
3
Size Document Number Rev
Thermal Sensor LM86
Date: Sheet of
2
PROJECT : ZB1
Quanta Computer Inc.
550Friday, February 24, 2006
1
C
5
H_XRCOMP
R150
24.9/F_4
D D
C C
B B
+1.05V
+1.05V
+1.05V
+1.05V
R164
54.9/F_4
R138 221/F_4
R139 100/F_4
R498
54.9/F_4
R503 221/F_4
R504 100/F_4
R505
24.9/F_4
15 mils/10mils
H_XSCOMP
H_XSWING
C186 .1U-10V_4
H_YSCOMP
H_YSWING
C766 .1U-10V_4
H_YRCOMP
15 mils/10mils
A A
5
CLK_MCH_BCLK<2> CLK_MCH_BCLK#<2>
H_D#[63:0]<3>
H_XRCOMP H_XSCOMP H_XSWING
H_YRCOMP H_YSCOMP H_YSWING
Short Stub < 100mils extract from same point
T100
T103
4
K11 T10
W11
U11 T11
AB7 AA9
Y10
AB8 AA4
AA7 AA2 AA6
AA10
AA1 AB4
AC9 AB11 AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5 AD10
AD4
AC8
AG2
AG1
F1
J1
H1
J6 H3 K2
G1 G2
K9 K1 K7
J8 H4
J3
G4
T3 U7 U9
W9
T1 T8 T4
W7
U5 T9
W6
T5
W4 W3
Y3 Y7
W5
W2
Y8
E1 E2 E4
Y1 U1
W1
U43A
H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63
H_XRCOMP H_XSCOMP H_XSWING
H_YRCOMP H_YSCOMP H_YSWING
H_CLKIN H_CLKIN#
Calistoga
HOST
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
4
3
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
H_SLPCPU#
H_TRDY#
3
H9 C9 E11 G11 F11 G12 F9 H11 J12 G14 D9 J14 H13 J15 F14 D12 A11 C11 A12 A13 E13 G13 F12 B12 B14 C12 A14 C14 D14
E8 B9 C13 J13 C6 F6 C7 B7 A7 C3 J9 H8 K13
J7 W8 U3 AB10
K4 T7 Y5 AC4
K3 T6 AA5 AC5
D3 D4 B3
D8 G8 B8 F8 A8
B4 E6 D6
E3 E7
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31
R476 0_4
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
2
H_A#[31:3] <3>
H_ADS# <3> H_ADSTB0# <3> H_ADSTB1# <3>
H_BNR# <3> H_BPRI# <3> H_BREQ#0 <3> H_CPURST# <3> H_DBSY# <3> H_DEFER# <3> H_DPWR# <3> H_DRDY# <3>
H_DINV#[3:0] <3>
H_DSTBN#[3:0] <3>
H_DSTBP#[3:0] <3>
H_HIT# <3> H_HITM# <3> H_LOCK# <3>
H_REQ#[4:0] <3>
H_RS#[2:0] <3>
H_CPUSLP# <3,14> H_TRDY# <3>
2
1
+1.05V
C232 .1U-10V_4
C231 .1U-10V_4
+1.05V
+1.05V <3,4,9,10,14,17,46>
R189 100/F_4
R190 200/F_4
H_VREF :10 mils/20 mils space
H_VREF
H_VREF
COMPONENTS P/N
945GM 945PM
Size Document Number Rev
GMCH HOST(1 OF 6 )
Date: Sheet
AJ009450T04 AJ009450T12
PROJECT : ZB1
Quanta Computer Inc.
650Friday, February 24, 2006
1
of
C
5
4
3
2
1
M_B_DQ[63:0]<13>
D D
M_A_DQ[63:0]<13>
C C
B B
A A
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
5
AJ35
AJ34 AM31 AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38 AM36 AM34
AN33
AK26
AL27 AM26
AN24
AK28
AL28 AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9 AN7 AK8 AK7 AP9 AN9 AT5 AL5 AY2
AW2
AP1 AN2 AV2 AT3 AN1 AL2 AG7 AF9 AG4 AF6 AG9 AH6 AF4 AF8
U43D
SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63
Calistoga
AU12
SA_BS_0
AV14
SA_BS_1
BA20
SA_BS_2
AY13
SA_CAS#
AJ33
SA_DM_0
AM35
SA_DM_1
AL26
SA_DM_2
AN22
SA_DM_3
AM14
SA_DM_4
AL9
SA_DM_5
AR3
SA_DM_6
AH4
SA_DM_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9
SA_RAS#
SA_WE#
AK33 AT33 AN28 AM22 AN12 AN8 AP3 AG5 AK32 AU33 AN27 AM21 AM12 AL8 AN3 AH5
AY16 AU14 AW16 BA16 BA17 AU16 AV17 AU17 AW17 AT16 AU13 AT17 AV20 AV12
AW14 AK23 AK24 AY14
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
4
M_A_BS#0 M_A_BS#1 M_A_BS#2
M_A_CAS# M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13
TP_MA_RCVENIN# TP_MA_RCVENOUT#
M_A_BS#0 <12,13> M_A_BS#1 <12,13> M_A_BS#2 <12,13> M_A_CAS# <12,13>
M_A_DM[7:0] <13>
M_A_DQS[7:0] <13>
M_A_DQS#[7:0] <13>
M_A_A[13:0] <12,13>
M_A_RAS# <12,13>
T37 T36
M_A_WE# <12,13>
3
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41 AT40 AV41
AU38
AV38
AP38 AR40 AW38
AY38
BA38
AV36 AR36
AP36
BA36 AU36
AP35
AP34
AY33
BA33
AT31 AU29 AU31 AW31
AV29 AW29 AM19
AL19
AP14 AN14 AN17 AM16
AP15
AL15 AJ11
AH10
AJ9
AN10
AK13 AH11
AK10
AJ8
BA10 AW10
BA4
AW4
AY10
AY9
AW5
AY5 AV4 AR5 AK4 AK3 AT4 AK5
AJ5 AJ3
U43E
SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63
Calistoga
AT24
SB_BS_0
AV23
SB_BS_1
AY28
SB_BS_2
AR24
SB_CAS# SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
SB_WE#
AK36 AR38 AT36 BA31 AL17 AH8 BA5 AN4
AM39 AT39 AU35 AR29 AR16 AR10 AR7 AN5 AM40 AU39 AT35 AP29 AP16 AT10 AT7 AP5
AY23 AW24 AY24 AR28 AT27 AT28 AU27 AV28 AV27 AW27 AV24 BA27 AY27 AR23
AU23 AK16 AK18 AR27
M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13
TP_MB_RCVENIN# TP_MB_RCVENOUT#
PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
GMCH DDR(2 OF 6 )
2
Date: Sheet
M_B_BS#0 <12,13> M_B_BS#1 <12,13> M_B_BS#2 <12,13> M_B_CAS# <12,13> M_B_DM[7:0] <13>
M_B_DQS[7:0] <13>
M_B_DQS#[7:0] <13>
M_B_A[13:0] <12,13>
M_B_RAS# <12,13>
T39 T40
M_B_WE# <12,13>
750Friday, February 24, 2006
1
of
C
5
CLK_MCH_OE#
T25
MCH_RSVD_1
T33
MCH_RSVD_2
T32
MCH_RSVD_3
T92
MCH_RSVD_4
T94 T35
MCH_RSVD_5 MCH_RSVD_6
T34
MCH_RSVD_7
T23
MCH_RSVD_8
T28
TV_DCONSEL0
T29
TV_DCONSEL1
T24
MCH_RSVD_11
T86
MCH_RSVD_12
D D
C C
PM_EXTTS#1<13>
DELAY_VR_PWRGOOD
,16,43>
PLT_RST-R#<15>
SDVO_CTRLCLK<41>
SDVO_CTRLDATA<41>
+3V
B B
R167 10K/F_4 R184 *10K/F_4
PM_DPRSLPVR<16,43>
T91
MCH_RSVD_13
T90
MCH_RSVD_14
T21
MCH_RSVD_15
T85
MCH_BSEL0<2> MCH_BSEL1<2>
MCH_BSEL2<2>
PM_EXTTS#1<13> PM_BMBUSY#<16>
PM_EXTTS#0<13>
PM_THRMTRIP#<3,14>
MCH_ICH_SYNC<15>
T93 T97 T83 T110 T105 T109 T46 T47 T48 T87 T84 T41 T45 T104 T44 T96 T88 T89 T95
T10 T19
T15
T9 T30
T8
R736 *0_4
R508
PM_EXTTS#0 PM_EXTTS#1
MCH_CFG_3 MCH_CFG_4 MCH_CFG_5 MCH_CFG_6 MCH_CFG_7 MCH_CFG_8 MCH_CFG_9 MCH_CFG_10 MCH_CFG_11 MCH_CFG_12 MCH_CFG_13 MCH_CFG_14 MCH_CFG_15 MCH_CFG_16 MCH_CFG_17 MCH_CFG_18 MCH_CFG_19 MCH_CFG_20
R735 0_4
RST IN# MCH
100/F_4
TP_MCH_NC0 TP_MCH_NC1 TP_MCH_NC2 TP_MCH_NC3 TP_MCH_NC4 TP_MCH_NC5 TP_MCH_NC6 TP_MCH_NC7 TP_MCH_NC8 TP_MCH_NC9 TP_MCH_NC10 TP_MCH_NC11 TP_MCH_NC12 TP_MCH_NC13 TP_MCH_NC14 TP_MCH_NC15 TP_MCH_NC16 TP_MCH_NC17 TP_MCH_NC18
R737 0_4
EXTTS1
AG11 AF11
AH33 AH34
BA41 BA40 BA39
AY41
AW41
AW1
EXTTS1
U43B
H32
RSVD_0
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4 RSVD_5 RSVD_6
H7
RSVD_7
J19
RSVD_8
K30
RSVD_9
J29
RSVD_10
A41
RSVD_11
A35
RSVD_12
A34
RSVD_13
D28
RSVD_14
D27
RSVD_15
K16
CFG_0
K18
CFG_1
J18
CFG_2
F18
CFG_3
E15
CFG_4
F15
CFG_5
E18
CFG_6
D19
CFG_7
D16
CFG_8
G16
CFG_9
E16
CFG_10
D15
CFG_11
G15
CFG_12
K15
CFG_13
C15
CFG_14
H16
CFG_15
G18
CFG_16
H15
CFG_17
J25
CFG_18
K27
CFG_19
J26
CFG_20
G28
PM_BMBUSY#
F25
PM_EXTTS#_0
H26
PM_EXTTS#_1
G6
PM_THRMTRIP# PWROK RSTIN#
H28
SDVO_CTRLCLK
H27
SDVO_CTRLDATA
K28
LT_RESET#
D1
NC0
C41
NC1
C1
NC2 NC3 NC4 NC5
BA3
NC6
BA2
NC7
BA1
NC8
B41
NC9
B2
NC10 NC11
AY1
NC12 NC13 NC14
A40
NC15
A4
NC16
A39
NC17
A3
NC18
CFGRSVD
PM
MISC
NC
Calistoga
1.MCH_CFG_5 Low = DMI X2, High=DMIX4
2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)
3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU
4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility
5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility
6.MCH_CFG_11: Low=Calistoga, High=Reserved
7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled, High=Dynamic ODT Enabled.
8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V
A A
9.MCH_CFG_19 DMI LANE Reversal: Low=Normal,High=LANES Reversed.
10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only SDVO or PCIE x1 is operational (defaults) ,High=SDVO and PCIE x1 are operation simultaneously via the PEG port.
5
SM_CK#_0 SM_CK#_1 SM_CK#_2 SM_CK#_3
SM_CKE_0 SM_CKE_1 SM_CKE_2 SM_CKE_3
SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3
SM_OCDCOMP_0 SM_OCDCOMP_1
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
SM_RCOMP#
SM_RCOMP
DDR MUXINGCLKDMI
SM_VREF_0 SM_VREF_1
G_CLKIN#
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
4
AY35
SM_CK_0
AR1
SM_CK_1
AW7
SM_CK_2
AW40
SM_CK_3
AW35 AT1 AY7 AY40
AU20 AT20 BA29 AY29
AW13 AW12 AY21 AW21
AL20 AF10
BA13 BA12 AY20 AU21
AV9 AT9
SMDDR_VREF_MCH
AK1 AK41
AF33 AG33
G_CLKIN
A27 A26 C40 D41
DMI_TXN0
AE35
DMI_TXN1
AF39
DMI_TXN2
AG35
DMI_TXN3
AH39
DMI_TXP0
AC35
DMI_TXP1
AE39
DMI_TXP2
AF35
DMI_TXP3
AG39
DMI_RXN0
AE37
DMI_RXN1
AF41
DMI_RXN2
AG37
DMI_RXN3
AH41
DMI_RXP0
AC37
DMI_RXP1
AE41
DMI_RXP2
AF37
DMI_RXP3
AG41
< 0.1" . 15mils/15mils space use 1% R
M_OCDCOMP_0 M_OCDCOMP_1
M_RCOMP# M_RCOMP
M_CLK_DDR0 <13> M_CLK_DDR1 <13> M_CLK_DDR2 <13> M_CLK_DDR3 <13>
M_CLK_DDR#0 <13> M_CLK_DDR#1 <13> M_CLK_DDR#2 <13> M_CLK_DDR#3 <13>
M_CKE0 <12,13> M_CKE1 <12,13> M_CKE2 <12,13> M_CKE3 <12,13>
M_CS#0 <12,13> M_CS#1 <12,13> M_CS#2 <12,13> M_CS#3 <12,13>
M_ODT0 <12,13> M_ODT1 <12,13> M_ODT2 <12,13> M_ODT3 <12,13>
R237 0_6 R227 *10K_6 R705 *10K_6
CLK_PCIE_3GPLL# <2> CLK_PCIE_3GPLL <2> DREFCLK# <2> DREFCLK <2> DREFSSCLK# <2> DREFSSCLK <2>
GMCH Strap pin
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16
MCH_CFG_18 CFG_RSVD_0_R
MCH_CFG_19
MCH_CFG_20
4
R140 *2.2K_4
R145 *2.2K_4
R144 *2.2K_4
R169 *2.2K_4
R161 *2.2K_4
R141 *2.2K_4
R173 *2.2K_4
R188 *2.2K_4
R168 *2.2K_4
R179 *1K/F_4
R182 *1K/F_4
R183 *1K/F_4
+V1.5_PCIE +3V SMDDR_VREF +1.8VSUS
15mils/15mils
*40.2/F_4
Layout as short as passable
NC from WW45
DMI_TXN[3:0] <15>
INT_TV_COMP<25>
INT_TV_Y/G<25> INT_TV_C/R<25>
DMI_TXP[3:0] <15> DMI_RXN[3:0] <15>
INT_VGA_BLU<26> INT_VGA_GRN<26> INT_VGA_RED<26>
DMI_RXP[3:0] <15>
+3V
+3V
3
LVDS_BLON<20,25>
LVDS_DIGON<20,25>
R221
R214
*40.2/F_4
SMDDR_VREF +1.8VSUS
15mils/10mils
R471 IV@150/F_4 R470 IV@150/F_4 R469 IV@150/F_4
INT_DDCCLK<26> INT_DDCDAT<26>
INT_HSYNC<26>
INT_VSYNC<26>
R187
3
2
+V1.5_PCIE <10> +3V <2,5,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46> SMDDR_VREF <13,45> +1.8VSUS <9,13,20,44,45>
R170 IV@0_4 R180 IV@10K/F_4
+3V
R181 IV@10K/F_4
EDIDCLK<25> EDIDDATA<25>
T11
DISP_ON
L_IBG
R160 IV@1.5K/F_4
+1.8VSUS
R239
80.6/F_4
M_RCOMP#
M_RCOMP
R240
80.6/F_4
T20
EDIDCLK EDIDDATA
L_IBG L_VBG
R638 IV@0_4
L_VREFH L_VREFL
LA_CLK# LA_CLK LB_CLK# LB_CLK
LA_DATAN0 LA_DATAN1 LA_DATAN2
LA_DATAP0 LA_DATAP1 LA_DATAP2
LB_DATAN0 LB_DATAN1 LB_DATAN2
LB_DATAP0 LB_DATAP1 LB_DATAP2
TV_COMP1 TV_Y/G1 TV_C/R1
R186
IV@4.99K/F_6
L_CLKCTLA L_CLKCTLB
TVIREF
D32 H30
H29 G26 G25 B38 C35 F32 C33 C32
A33 A32 E27 E26
C37 B35 A37
B37 B34 A36
G30 D30 F29
F30 D29 F28
A16 C18 A19
B16 B18 B19
J30
J20
U43C
L_BKLTCTL L_BKLTEN L_CLKCTLA L_CLKCTLB L_DDC_CLK L_DDC_DATA L_IBG L_VBG L_VDDEN L_VREFH L_VREFL
LA_CLK# LA_CLK LB_CLK# LB_CLK
LA_DATA#_0 LA_DATA#_1 LA_DATA#_2
LA_DATA_0 LA_DATA_1 LA_DATA_2
LB_DATA#_0 LB_DATA#_1 LB_DATA#_2
LB_DATA_0 LB_DATA_1 LB_DATA_2
TV_DACA_OUT TV_DACB_OUT TV_DACC_OUT
TV_IREF TV_IRTNA TV_IRTNB TV_IRTNC
LVDS
TV
< 0.1" . 15mils/15mils space
R472 IV@150/F_4 R473 IV@150/F_4 R468 IV@150/F_4
R185
TXLCLKOUT-<20,25> TXLCLKOUT+<20,25>
TXUCLKOUT-<20,25> TXUCLKOUT+<20,25>
+3V
*0_4
CRT_BLUE CRT_GREEN CRT_RED
HSYNC1 CRTIREF
IV@255/F_6
VSYNC1
RP29 IV@0_4P2R_S
RP42 IV@0_4P2R_S
TXLOUT0-<20,25>
TXLOUT0+<20,25>
TXUOUT0-<20,25>
TXUOUT0+<20,25>
TXLOUT1+<20,25>
TXLOUT1-<20,25>
TXUOUT1+<20,25>
TXUOUT1-<20,25>
TXLOUT2-<20,25>
TXLOUT2+<20,25>
TXUOUT2-<20,25>
TXUOUT2+<20,25>
RP31 IV@0_4P2R_S
RP27 IV@0_4P2R_S
RP38 IV@0_4P2R_S
RP36 IV@0_4P2R_S
RP40 IV@0_4P2R_S
RP33 IV@0_4P2R_S
3 1
3 1
1 3
1 3
1 3
3 1
1 3
1 3
near conn.
E23 D23 C22 B22 A21 B21
C26 C25 G23
H23
4 2
4 2
2 4
2 4
2 4
4 2
2 4
2 4
J22
Calistoga
CRT_BLUE CRT_BLUE# CRT_GREEN CRT_GREEN# CRT_RED CRT_RED#
CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_IREF CRT_VSYNC
LA_CLK# LA_CLK
LB_CLK# LB_CLK
LA_DATAN0 LA_DATAP0
LB_DATAN0 LB_DATAP0
LA_DATAP1 LA_DATAN1
LB_DATAP1 LB_DATAN1
LA_DATAN2 LA_DATAP2
LB_DATAN2 LB_DATAP2
2
VGA
1
20mils/20mils space
EXP_A_COMPX
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0 EXP_A_RXN_1 EXP_A_RXN_2 EXP_A_RXN_3 EXP_A_RXN_4 EXP_A_RXN_5 EXP_A_RXN_6 EXP_A_RXN_7 EXP_A_RXN_8
EXP_A_RXN_9 EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12 EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12
PCI-EXPRESS GRAPHICS
EXP_A_TXN_13 EXP_A_TXN_14 EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8
PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15
Size Document Number Rev
GMCH DMI/VEDIO(3 OF 6 )
Date: Sheet
D40 D38
PEG_RXN0
F34
PEG_RXN1
G38
PEG_RXN2
H34
PEG_RXN3
J38
PEG_RXN4
L34
PEG_RXN5
M38
PEG_RXN6
N34
PEG_RXN7
P38
PEG_RXN8
R34
PEG_RXN9
T38
PEG_RXN10
V34
PEG_RXN11
W38
PEG_RXN12
Y34
PEG_RXN13
AA38
PEG_RXN14
AB34
PEG_RXN15
AC38
PEG_RXP0
D34
PEG_RXP1
F38
PEG_RXP2
G34
PEG_RXP3
H38
PEG_RXP4
J34
PEG_RXP5
L38
PEG_RXP6
M34
PEG_RXP7
N38
PEG_RXP8
P34
PEG_RXP9
R38
PEG_RXP10
T34
PEG_RXP11
V38
PEG_RXP12
W34
PEG_RXP13
Y38
PEG_RXP14
AA34
PEG_RXP15
AB38
C_PEG_TXN0
F36
C_PEG_TXN1
G40
C_PEG_TXN2
H36
C_PEG_TXN3
J40
C_PEG_TXN4
L36
C_PEG_TXN5
M40
C_PEG_TXN6
N36
C_PEG_TXN7
P40
C_PEG_TXN8
R36
C_PEG_TXN9
T40
C_PEG_TXN10
V36
C_PEG_TXN11
W40
C_PEG_TXN12
Y36
C_PEG_TXN13
AA40
C_PEG_TXN14
AB36
C_PEG_TXN15
AC40
C_PEG_TXP0
D36
C_PEG_TXP1
F40
C_PEG_TXP2
G36
C_PEG_TXP3
H40
C_PEG_TXP4
J36
C_PEG_TXP5
L40
C_PEG_TXP6
M36
C_PEG_TXP7
N40
C_PEG_TXP8
P36
C_PEG_TXP9
R40
C_PEG_TXP10
T36
C_PEG_TXP11
V40
C_PEG_TXP12
W36
C_PEG_TXP13
Y40
C_PEG_TXP14
AA36
C_PEG_TXP15 PEG_TXP15
AB40
PEG_TXP[15:0] <18,41>
PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
PROJECT : ZB1
Quanta Computer Inc.
R162 24.9/F_4
PEG_RXN[15:0] <18,41>
PEG_RXP[15:0] <18,41>
C220 CT_EV@.1U-10V_4 C747 CT_EV@.1U-10V_4 C210 CT_EV@.1U-10V_4 C749 CT_EV@.1U-10V_4 C230 EV@.1U-10V_4 C752 EV@.1U-10V_4 C237 EV@.1U-10V_4 C758 EV@.1U-10V_4 C246 EV@.1U-10V_4 C761 EV@.1U-10V_4 C253 EV@.1U-10V_4 C765 EV@.1U-10V_4 C262 EV@.1U-10V_4 C780 EV@.1U-10V_4 C273 EV@.1U-10V_4 C784 EV@.1U-10V_4
C222 CT_EV@.1U-10V_4 C745 CT_EV@.1U-10V_4 C214 CT_EV@.1U-10V_4 C748 CT_EV@.1U-10V_4 C227 EV@.1U-10V_4 C750 EV@.1U-10V_4 C233 EV@.1U-10V_4 C755 EV@.1U-10V_4 C245 EV@.1U-10V_4 C759 EV@.1U-10V_4 C252 EV@.1U-10V_4 C763 EV@.1U-10V_4 C258 EV@.1U-10V_4 C773 EV@.1U-10V_4 C265 EV@.1U-10V_4 C782 EV@.1U-10V_4
PEG_TXN[15:0] <18,41>
850Friday, February 24, 2006
1
+V1.5_PCIE
PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14
of
C
5
C194
+1.05V +1.05V
330U-2.5V_7343
+
D D
C C
B B
A A
5
AA33
W33
P33 N33
AA32
Y32
W32
V32 P32 N32 M32
AA31
W31
V31 T31 R31 P31 N31 M31
AA30
Y30
W30
V30 U30 T30 R30 P30 N30 M30
AA29
Y29
W29
V29 U29 R29 P29 M29
AB28 AA28
Y28 V28 U28 T28 R28 P28 N28 M28
P27 N27 M27
P26 N26
N25 M25
P24 N24
M24 AB23 AA23
Y23
P23
N23
M23 AC22
AB22
Y22
W22
P22
N22
M22 AC21
AA21
W21
N21
M21 AC20
AB20
Y20
W20
P20
N20
M20 AB19
AA19
Y19
N19
M19
N18
M18
P17
N17
M17
N16
M16
U43G
VCC_0 VCC_1 VCC_2 VCC_3
L33
VCC_4
J33
VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12
L32
VCC_13
J32
VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32
L30
VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41
L29
VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52
L28
VCC_53 VCC_54 VCC_55 VCC_56
L27
VCC_57 VCC_58 VCC_59
L26
VCC_60 VCC_61 VCC_62
L25
VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72
L23
VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80
L22
VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86
L21
VCC_87 VCC_88 VCC_89 VCC_90 VCC_91 VCC_92 VCC_93 VCC_94
L20
VCC_95 VCC_96 VCC_97 VCC_98 VCC_99 VCC_100
L19
VCC_101 VCC_102 VCC_103
L18
VCC_104 VCC_105 VCC_106 VCC_107 VCC_108 VCC_109
L16
VCC_110
VCC
Calistoga
VCC_SM_0 VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8
VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36 VCC_SM_37 VCC_SM_38 VCC_SM_39 VCC_SM_40 VCC_SM_41 VCC_SM_42 VCC_SM_43 VCC_SM_44 VCC_SM_45 VCC_SM_46 VCC_SM_47 VCC_SM_48 VCC_SM_49 VCC_SM_50 VCC_SM_51 VCC_SM_52 VCC_SM_53 VCC_SM_54 VCC_SM_55 VCC_SM_56 VCC_SM_57 VCC_SM_58 VCC_SM_59 VCC_SM_60 VCC_SM_61 VCC_SM_62 VCC_SM_63 VCC_SM_64 VCC_SM_65 VCC_SM_66 VCC_SM_67 VCC_SM_68 VCC_SM_69 VCC_SM_70 VCC_SM_71 VCC_SM_72 VCC_SM_73 VCC_SM_74 VCC_SM_75 VCC_SM_76 VCC_SM_77 VCC_SM_78 VCC_SM_79 VCC_SM_80 VCC_SM_81 VCC_SM_82 VCC_SM_83 VCC_SM_84 VCC_SM_85 VCC_SM_86 VCC_SM_87 VCC_SM_88 VCC_SM_89 VCC_SM_90 VCC_SM_91 VCC_SM_92 VCC_SM_93 VCC_SM_94 VCC_SM_95 VCC_SM_96 VCC_SM_97 VCC_SM_98 VCC_SM_99
VCC_SM_100 VCC_SM_101 VCC_SM_102 VCC_SM_103 VCC_SM_104 VCC_SM_105 VCC_SM_106 VCC_SM_107
4
AU41 AT41 AM41 AU40 BA34 AY34 AW34 AV34 AU34 AT34 AR34 BA30 AY30 AW30 AV30 AU30 AT30 AR30 AP30 AN30 AM30 AM29 AL29 AK29 AJ29 AH29 AJ28 AH28 AJ27 AH27 BA26 AY26 AW26 AV26 AU26 AT26 AR26 AJ26 AH26 AJ25 AH25 AJ24 AH24 BA23 AJ23 BA22 AY22 AW22 AV22 AU22 AT22 AR22 AP22 AK22 AJ22 AK21 AK20 BA19 AY19 AW19 AV19 AU19 AT19 AR19 AP19 AK19 AJ19 AJ18 AJ17 AH17 AJ16 AH16 BA15 AY15 AW15 AV15 AU15 AT15 AR15 AJ15 AJ14 AJ13 AH13 AK12 AJ12 AH12 AG12 AK11 BA8 AY8 AW8 AV8 AT8 AR8 AP8 BA6 AY6 AW6 AV6 AT6 AR6 AP6 AN6 AL6 AK6 AJ6 AV1 AJ1
25mils
4
25mils
VCC_SM1 VCC_SM2
VCC_SM106 VCC_SM107
C313 .47U-10V_6 C301 .47U-10V_6
+
C322
330U-2.5V_7343
10U/X5R-6.3V_8
C291 .47U-10V_6
C321 .47U-10V_6
25mils
C312 .47U-10V_6 C289 .47U-10V_6
C292
10U/X5R-6.3V_8
C293
C320 .47U-10V_6
330U-2.5V_7343
+1.8VSUS
C311 .47U-10V_6
+
3
C281
C316 .1U-10V_4
3
C269
10U/X5R-6.3V_8
10U/X5R-6.3V_8
120mils
C317 .1U-10V_4
+1.5V_AUX<10>
+1.05V<3,4,6,10,14,17,46>
+1.8VSUS<8,13,20,44,45>
C268
C266
1U-16V_6
C318 .1U-10V_4
+1.5V_AUX
C244
.1U-10V_4
+1.05V
+1.8VSUS
C242
.1U-10V_4
C272
.1U-10V_4
2
U43F
AD27
VCC_NCTF0
AC27
AB27 AA27
W27
AD26 AC26
AB26 AA26
W26
AD25 AC25
AB25 AA25
W25
AD24 AC24
AB24 AA24
W24
AD23
AD22
AD21
AD20
AD19
AD18 AC18
AB18 AA18
W18
Y27
V27 U27 T27 R27
Y26 V26
U26 T26 R26
Y25 V25
U25 T25 R25
Y24 V24
U24 T24 R24
V23 U23 T23 R23
V22 U22 T22 R22
V21 U21 T21 R21
V20 U20 T20 R20
V19 U19 T19
Y18 V18
U18 T18
VCC_NCTF1 VCC_NCTF2 VCC_NCTF3 VCC_NCTF4 VCC_NCTF5 VCC_NCTF6 VCC_NCTF7 VCC_NCTF8 VCC_NCTF9 VCC_NCTF10 VCC_NCTF11 VCC_NCTF12 VCC_NCTF13 VCC_NCTF14 VCC_NCTF15 VCC_NCTF16 VCC_NCTF17 VCC_NCTF18 VCC_NCTF19 VCC_NCTF20 VCC_NCTF21 VCC_NCTF22 VCC_NCTF23 VCC_NCTF24 VCC_NCTF25 VCC_NCTF26 VCC_NCTF27 VCC_NCTF28 VCC_NCTF29 VCC_NCTF30 VCC_NCTF31 VCC_NCTF32 VCC_NCTF33 VCC_NCTF34 VCC_NCTF35 VCC_NCTF36 VCC_NCTF37 VCC_NCTF38 VCC_NCTF39 VCC_NCTF40 VCC_NCTF41 VCC_NCTF42 VCC_NCTF43 VCC_NCTF44 VCC_NCTF45 VCC_NCTF46 VCC_NCTF47 VCC_NCTF48 VCC_NCTF49 VCC_NCTF50 VCC_NCTF51 VCC_NCTF52 VCC_NCTF53 VCC_NCTF54 VCC_NCTF55 VCC_NCTF56 VCC_NCTF57 VCC_NCTF58 VCC_NCTF59 VCC_NCTF60 VCC_NCTF61 VCC_NCTF62 VCC_NCTF63 VCC_NCTF64 VCC_NCTF65 VCC_NCTF66 VCC_NCTF67 VCC_NCTF68 VCC_NCTF69 VCC_NCTF70 VCC_NCTF71 VCC_NCTF72
NCTF
Calistoga
VSS_NCTF0 VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 VSS_NCTF8
VSS_NCTF9 VSS_NCTF10 VSS_NCTF11 VSS_NCTF12
VCCAUX_NCTF0 VCCAUX_NCTF1 VCCAUX_NCTF2 VCCAUX_NCTF3 VCCAUX_NCTF4 VCCAUX_NCTF5 VCCAUX_NCTF6 VCCAUX_NCTF7 VCCAUX_NCTF8
VCCAUX_NCTF9 VCCAUX_NCTF10 VCCAUX_NCTF11 VCCAUX_NCTF12 VCCAUX_NCTF13 VCCAUX_NCTF14 VCCAUX_NCTF15 VCCAUX_NCTF16 VCCAUX_NCTF17 VCCAUX_NCTF18 VCCAUX_NCTF19 VCCAUX_NCTF20 VCCAUX_NCTF21 VCCAUX_NCTF22 VCCAUX_NCTF23 VCCAUX_NCTF24 VCCAUX_NCTF25 VCCAUX_NCTF26 VCCAUX_NCTF27 VCCAUX_NCTF28 VCCAUX_NCTF29 VCCAUX_NCTF30 VCCAUX_NCTF31 VCCAUX_NCTF32 VCCAUX_NCTF33 VCCAUX_NCTF34 VCCAUX_NCTF35 VCCAUX_NCTF36 VCCAUX_NCTF37 VCCAUX_NCTF38 VCCAUX_NCTF39 VCCAUX_NCTF40 VCCAUX_NCTF41 VCCAUX_NCTF42 VCCAUX_NCTF43 VCCAUX_NCTF44 VCCAUX_NCTF45 VCCAUX_NCTF46 VCCAUX_NCTF47 VCCAUX_NCTF48 VCCAUX_NCTF49 VCCAUX_NCTF50 VCCAUX_NCTF51 VCCAUX_NCTF52 VCCAUX_NCTF53 VCCAUX_NCTF54 VCCAUX_NCTF55 VCCAUX_NCTF56 VCCAUX_NCTF57
AE27 AE26 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AC17 Y17 U17
AG27 AF27 AG26 AF26 AG25 AF25 AG24 AF24 AG23 AF23 AG22 AF22 AG21 AF21 AG20 AF20 AG19 AF19 R19 AG18 AF18 R18 AG17 AF17 AE17 AD17 AB17 AA17 W17 V17 T17 R17 AG16 AF16 AE16 AD16 AC16 AB16 AA16 Y16 W16 V16 U16 T16 R16 AG15 AF15 AE15 AD15 AC15 AB15 AA15 Y15 W15 V15 U15 T15 R15
1
+1.5V_AUX
100mils
PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
GMCH PW & STRAP(4 OF 6)
2
Date: Sheet
950Friday, February 24, 2006
1
C
of
5
+1.5V +V1.5_DPLLA
L69
10uH_8
+
C717
C729
+
C718
C284
C280
.1U-10V_4
R174 10_4
C737 10U/X5R-6.3V_8
R514 0_8
.1U-10V_4
C727 .1U-10V_4
C287 .1U-10V_4
C275
+
330U-2.5V_7343
L70
D D
C C
+V1.5_PCIE
B B
10uH_8
330U-2.5V_7343
L40
BK1608LL121_6
10U/X5R-6.3V_8
L39
BK1608LL121_6
10U/X5R-6.3V_8
L34 BK1608LL121_6
C740 10U/X5R-6.3V_8
R512
0.5/F_6
+1.5V_AUX +1.5V
C286 .1U-10V_4
30mils
V1_5SFOLLOW
+V3.3_TVDAC
A A
+1.05V +1.5V +V1.5_PCIE +2.5V +3V
R463 10_4
+1.05V <3,4,6,9,14,17,46> +1.5V <4,15,17,29,33,44,45> +V1.5_PCIE <8> +2.5V <19,20,25,41,44,45> +3V <2,5,8,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46>
5
+V3.3_TVDAC
+V1.5_DPLLB
+V1.5_HPLL
+V1.5_MPLL
25mils
VCCGFOLLOW
L73 100nH_8
C716 220U-6.3V_7343
L75 1uH_6
D20 PDZ5.6B
R455 0_8
L68
D10 PDZ5.6B
60mils
60mils60mils
3GPLL_FB_L3GPLL_FB_R
PCIE_L
21
10uH_8
C720
10U-10V_8
+1.05V+2.5V
21
+V2.5_CRTDAC
+3V
+1.5V
80mils
.1U-10V_4
.1U-10V_4
+1.5V
+1.5V+V1.5_3GPLL
C733
C735
C734 .1U-10V_4
4
+V3.3_ATVBG
+V3.3_ATVBG
C721
.022U-16V_4
+V3.3_ATVBG
+V3.3_ATVBG
C723 .022U-16V_4
+V3.3_ATVBG
+V3.3_ATVBG
C722 .022U-16V_4
+2.5V
+3V +1.5V
C715 10U/X5R-6.3V_8
+V1.5_TVDAC +1.5V
C201 .022U-16V_4
+V1.5_QTVDAC
C226 .022U-16V_4
4
C195 .1U-10V_4
C204 .1U-10V_4
C215 .1U-10V_4
+V1.5_3GPLL
C795
.1U-10V_4
10U/X5R-6.3V_8
+V2.5_CRTDAC
C225
.022U-16V_4
.1U-10V_4
C200
.1U-10V_4
.01U-16V_4
+V3.3_ATVBG
C726
.1U-10V_4
.022U-16V_4
C288
.1U-10V_4
L71
BK1608LL121_6
L72
BK1608LL121_6
C794
C218
C203
C725
C303
10U/X5R-6.3V_8
60mils
+2.5V
+2.5V
+2.5V
+V1.5_HPLL
+1.5V
+3V
40mils
+1.5V_AUX
3
C212
10U/X5R-6.3V_8
.1U-10V_4
+V1.5_PCIE
C221 .1U-10V_4
+V1.5_DPLLB
+V3.3_ATVBG
+V3.3_ATVBG
+V1.5_TVDAC
+V1.5_QTVDAC
3
C179
+V1.5_DPLLA
+V1.5_MPLL
+V3.3_ATVBG
H22 C30
B30 A30
AJ41 AB41
Y41 V41 R41 N41
L41
AC33
G41 H41
F21 E21 G21
B26 C39 AF1
A38 B39
AF2 H20
G20
E19 F19 C20 D20 E20 F20
AH1 AH2
A28 B28 C28
D21 A23
B23 B25
H19
AK31 AF31 AE31 AC31 AL30 AK30 AJ30 AH30 AG30 AF30 AE30 AD30 AC30 AG29 AF29 AE29 AD29 AC29 AG28 AF28 AE28 AH22 AJ21 AH21 AJ20 AH20 AH19
P19 P16
AH15
P15 AH14 AG14 AF14 AE14
Y14 AF13 AE13 AF12 AE12 AD12
U43H
VCCSYNC VCC_TXLVDS0
VCC_TXLVDS1 VCC_TXLVDS2
VCC3G0 VCC3G1 VCC3G2 VCC3G3 VCC3G4 VCC3G5 VCC3G6 VCCA_3GPLL VCCA_3GBG VSSA_3GBG
VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC
VCCA_DPLLA VCCA_DPLLB VCCA_HPLL
VCCA_LVDS VSSA_LVDS
VCCA_MPLL VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCD_HMPLL0 VCCD_HMPLL1
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCD_TVDAC VCC_HV0
VCC_HV1 VCC_HV2
VCCD_QTVDAC VCCAUX0
VCCAUX1 VCCAUX2 VCCAUX3 VCCAUX4 VCCAUX5 VCCAUX6 VCCAUX7 VCCAUX8 VCCAUX9 VCCAUX10 VCCAUX11 VCCAUX12 VCCAUX13 VCCAUX14 VCCAUX15 VCCAUX16 VCCAUX17 VCCAUX18 VCCAUX19 VCCAUX20 VCCAUX21 VCCAUX22 VCCAUX23 VCCAUX24 VCCAUX25 VCCAUX26 VCCAUX27 VCCAUX28 VCCAUX29 VCCAUX30 VCCAUX31 VCCAUX32 VCCAUX33 VCCAUX34 VCCAUX35 VCCAUX36 VCCAUX37 VCCAUX38 VCCAUX39 VCCAUX40
POWER
Calistoga
2
+1.05V
AC14
VTT_0
AB14
VTT_1
W14
VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8
VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25 VTT_26 VTT_27 VTT_28 VTT_29 VTT_30 VTT_31 VTT_32 VTT_33 VTT_34 VTT_35 VTT_36 VTT_37 VTT_38 VTT_39 VTT_40 VTT_41 VTT_42 VTT_43 VTT_44 VTT_45 VTT_46 VTT_47 VTT_48 VTT_49 VTT_50 VTT_51 VTT_52 VTT_53 VTT_54 VTT_55 VTT_56 VTT_57 VTT_58 VTT_59 VTT_60 VTT_61 VTT_62 VTT_63 VTT_64 VTT_65 VTT_66 VTT_67 VTT_68 VTT_69 VTT_70 VTT_71 VTT_72 VTT_73 VTT_74 VTT_75 VTT_76
V14 T14 R14 P14 N14 M14 L14 AD13 AC13 AB13 AA13 Y13 W13 V13 U13 T13 R13 N13 M13 L13 AB12 AA12 Y12 W12 V12 U12 T12 R12 P12 N12 M12 L12 R11 P11 N11 M11 R10 P10 N10 M10 P9 N9 M9 R8 P8 N8 M8 P7 N7 M7 R6 P6 M6 A6 R5 P5 N5 M5 P4 N4 M4 R3 P3 N3 M3 R2 P2 M2 D2 AB1 R1 P1 N1 M1
+
C216
330U-2.5V_7343
.22U-6.3V_4
4.7U-10V_8
C241
C270
2.2U-6.3V_6
.22U-6.3V_4
C238
.1U-10V_4
1
C240
.1U-10V_4
.47U-10V_6
+2.5V
C224
4.7U-10V_8
C243
C239
.47U-10V_6
C173
+1.05V
C267
10U/X5R-6.3V_8
+1.05V
C271
PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
GMCH POWER (5 OF 6)
2
Date: Sheet of
10 50Friday, February 24, 2006
1
C
5
4
3
2
1
U43I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
D D
C C
B B
A A
5
AP40 AN40 AK40
AJ40 AH40 AG40
AF40
AE40
AY39
AW39
AV39 AR39 AN39
AJ39 AC39 AB39 AA39
W39
R39 N39
M39
H39 G39
D39
AT38 AM38 AH38 AG38
AF38 AE38
C38 AK37 AH37 AB37 AA37
W37
R37
N37
M37
H37
G37
D37
AY36
AW36
AN36 AH36 AG36
AF36 AE36 AC36
C36
BA35 AV35 AR35 AH35 AB35 AA35
W35
R35 N35
M35
H35 G35
D35
AN34
B40
Y39 V39
T39 P39
L39 J39
F39
Y37 V37
T37 P37
L37 J37
F37
B36
Y35 V35
T35 P35
L35 J35
F35
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96
Calistoga
VSS
VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179
4
AK34 AG34 AF34 AE34 AC34 C34 AW33 AV33 AR33 AE33 AB33 Y33 V33 T33 R33 M33 H33 G33 F33 D33 B33 AH32 AG32 AF32 AE32 AC32 AB32 G32 B32 AY31 AV31 AN31 AJ31 AG31 AB31 Y31 AB30 E30 AT29 AN29 AB29 T29 N29 K29 G29 E29 C29 B29 A29 BA28 AW28 AU28 AP28 AM28 AD28 AC28 W28 J28 E28 AP27 AM27 AK27 J27 G27 F27 C27 B27 AN26 M26 K26 F26 D26 AK25 P25 K25 H25 E25 D25 A25 BA24 AU24 AL24 AW23
3
AT23 AN23 AM23 AH23 AC23
W23
K23
C23
AA22
K22 G22
E22 D22
A22 BA21 AV21
AR21 AN21
AL21 AB21
P21
K21
H21
C21
AW20
AR20 AM20
AA20
K20
B20
A20
AN19 AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18 AY17
AR17
AP17
AM17
AK17 AV16
AN16
AL16
C16
AN15 AM15
AK15
N15
M15
B15
A15 BA14 AT14 AK14
AD14
AA14
U14
K14
H14
E14 AV13
AR13 AN13 AM13
AL13
AG13
P13
D13
B13 AY12
AC12
K12
H12
E12
AD11
AA11
J23 F23
F22
Y21
J21
J16 F16
L15
F13
Y11
U43J
VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_213 VSS_214 VSS_215 VSS_216 VSS_217 VSS_218 VSS_219 VSS_220 VSS_221 VSS_222 VSS_223 VSS_224 VSS_225 VSS_226 VSS_227 VSS_228 VSS_229 VSS_230 VSS_231 VSS_232 VSS_233 VSS_234 VSS_235 VSS_236 VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272
VSS
Calistoga
VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325 VSS_326 VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350 VSS_351 VSS_352 VSS_353 VSS_354 VSS_355 VSS_356 VSS_357 VSS_358 VSS_359 VSS_360
J11 D11 B11 AV10 AP10 AL10 AJ10 AG10 AC10 W10 U10 BA9 AW9 AR9 AH9 AB9 Y9 R9 G9 E9 A9 AG8 AD8 AA8 U8 K8 C8 BA7 AV7 AP7 AL7 AJ7 AH7 AF7 AC7 R7 G7 D7 AG6 AD6 AB6 Y6 U6 N6 K6 H6 B6 AV5 AF5 AD5 AY4 AR4 AP4 AL4 AJ4 Y4 U4 R4 J4 F4 C4 AY3 AW3 AV3 AL3 AH3 AG3 AF3 AD3 AC3 AA3 G3 AT2 AR2 AP2 AK2 AJ2 AD2 AB2 Y2 U2 T2 N2 J2 H2 F2 C2 AL1
PROJECT : ZB1
Quanta Computer Inc.
Size Document Number Rev
GMCH GND(6 OF 6)
2
Date: Sheet
11 50Tuesday, February 07, 2006
1
of
C
1
2
3
4
5
6
7
8
DDRII DUAL CHANNEL A,B.
A A
DDRII A CHANNEL DDRII B CHANNEL
SMDDR_VTERM
C404 .1U-10V_4
C423 .1U-10V_4
SMDDR_VTERM
C437
C420
.1U-10V_4
.1U-10V_4
M_A_A[13..0] SMDDR_VTERM
C421
C441
.1U-10V_4
.1U-10V_4
C440 .1U-10V_4
C422 .1U-10V_4
M_A_A[13..0] <7,13> SMDDR_VTERM <44,45>
C425
C439
.1U-10V_4
.1U-10V_4
C438 .1U-10V_4
C409 .1U-10V_4
C408 .1U-10V_4
SMDDR_VTERM
C407 .1U-10V_4
C406 .1U-10V_4
C405 .1U-10V_4
C379 .1U-10V_4
C376 .1U-10V_4
C374 .1U-10V_4
C378 .1U-10V_4
C375 .1U-10V_4
C436 .1U-10V_4
C442 .1U-10V_4
C424 .1U-10V_4
C410 .1U-10V_4
C380 .1U-10V_4
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
B B
M_ODT0<8,13>
M_CKE1<8,13>
M_A_BS#0<7,13>
M_A_BS#1<7,13>
C C
M_A_CAS#<7,13>
M_CS#1<8,13>
M_ODT0 M_A_A13 M_A_A7 M_A_A5 M_A_A3 M_A_A1
M_A_A11 M_CKE1 M_A_A10 M_A_BS#0 M_A_A8 M_A_A6 M_A_A2 M_A_A4
M_A_A0 M_A_BS#1 M_A_A12 M_A_A9 M_A_CAS# M_CS#1
M_B_A[13..0] +1.8VSUS +3V
RP83 56_4P2R_S
1 3
RP75 56_4P2R_S
1 3
RP71 56_4P2R_S
1 3
RP78 56_4P2R_S
1 3
RP72 56_4P2R_S
1 3
RP79 56_4P2R_S
1 3
RP80 56_4P2R_S
1 3
RP81 56_4P2R_S
1 3
RP70 56_4P2R_S
1 3
RP73 56_4P2R_S
1 3
M_B_A[13..0] <7,13> +1.8VSUS <8,9,13,20,44,45> +3V <2,5,8,10,13,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46>
2 4 2 4 2 4
2 4 2 4 2 4 2 4
2 4 2 4 2 4
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
M_B_BS#1<7,13>
M_CKE2<8,13>
M_B_BS#2<7,13>
M_CS#3<8,13>
M_B_RAS#<7,13>
M_B_WE#<7,13>
M_B_CAS#<7,13>
M_B_BS#0<7,13>
M_A_RAS#<7,13>
M_A_BS#2<7,13>
M_CS#0<8,13> M_ODT2<8,13>
M_ODT3<8,13>
M_A_WE#<7,13>
M_ODT1<8,13> M_CKE3<8,13>
M_CS#2<8,13>
M_CKE0<8,13>
M_B_A0 M_B_BS#1 M_B_A3 M_B_A1 M_B_A12 M_B_A5
M_B_A2 M_B_A4 M_B_A8 M_B_A9 M_B_A6 M_B_A11 M_CKE2 M_B_BS#2
M_CS#3 M_B_RAS# M_B_WE# M_B_CAS# M_B_A10 M_B_BS#0
RP99 56_4P2R_S
1 3
RP88 56_4P2R_S
1 3
RP87 56_4P2R_S
1 3
RP98 56_4P2R_S
1 3
RP86 56_4P2R_S
1 3
RP97 56_4P2R_S
1 3
RP85 56_4P2R_S
1 3
RP100 56_4P2R_S
1 3
RP91 56_4P2R_S
1 3
RP89 56_4P2R_S
1 3
M_A_RAS# M_CS#0 M_ODT2 M_B_A13 M_ODT3 M_CS#2 M_A_WE# M_ODT1 M_B_A7 M_CKE3 M_A_BS#2 M_CKE0
2 4 2 4 2 4
2 4 2 4 2 4 2 4
2 4 2 4 2 4
RP82 56_4P2R_S
1 3
RP101 56_4P2R_S
1 3
RP90 56_4P2R_S
1 3
RP74 56_4P2R_S
1 3
RP96 56_4P2R_S
1 3
RP76 56_4P2R_S
1 3
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
2 4 2 4 2 4 2 4 2 4 2 4
SMDDR_VTERM
D D
1
2
3
4
5
6
Size Document Number Rev
DDR RES. ARRAY
Date: Sheet
PROJECT : ZB1
Quanta Computer Inc.
7
of
12 50Friday, February 24, 2006
8
C
1
+3V +1.8VSUS SMDDR_VREF_DIMM
A A
B B
C C
D D
+3V <2,5,8,10,14,15,16,17,18,19,20,24,25,26,27,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,46> +1.8VSUS <8,9,20,44,45>
M_CKE0<8,12>
M_A_BS#2<7,12>
M_A_BS#0<7,12>
M_A_WE#<7,12>
M_A_CAS#<7,12>
M_CS#1<8,12> M_ODT1<8,12>
+3V
1
M_A_DQ1 M_A_DQ5
M_A_DQS#0 M_A_DQS0
M_A_DQ2 M_A_DQ3
M_A_DQ12 M_A_DQ8 M_A_DM1
M_A_DQS#1 M_A_DQS1
M_A_DQ9 M_A_DQ15
M_A_DQ21
M_A_DQ17 M_A_DQS#2
M_A_DQS2 M_A_DQ23
M_A_DQ19 M_A_DQ24
M_A_DQ25 M_A_DM3
M_A_DQ26 M_A_DQ27
M_CKE0
M_A_BS#2 M_A_A12
M_A_A9 M_A_A8
M_A_A5 M_A_A3 M_A_A1
M_A_A10 M_A_WE# M_A_CAS#
M_CS#1 M_ODT1 M_A_DQ35
M_A_DQS#4 M_A_DQS4
M_A_DQ38 M_A_DQ39
M_A_DQ40 M_A_DQ41
M_A_DM5 M_A_DQ42
M_A_DQ46 M_A_DQ48
M_A_DQ49
M_A_DQS#6 M_A_DQS6
M_A_DQ50
M_A_DQ56 M_A_DQ60
M_A_DM7 M_A_DQ62
CGDAT_SMB CGCLK_SMB
SMDDR_VREF_DIMM
+1.8VSUS
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
1 3 5 7 9
2
+1.8VSUS +1.8VSUS +1.8VSUS
CN36
VREF VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50
VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD)
DDR2_SODIMM
CLOCK 0,1 CLOCK 3,4
2
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
PC4800 DDR2
SDRAM SO-DIMM
(200P)
VDD8
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
M_A_DQ4 M_A_DQ0
M_A_DM0 M_A_DQ7
M_A_DQ6 M_A_DQ13
M_A_DQ14
M_CLK_DDR0 M_CLK_DDR#0
M_A_DQ10 M_A_DQ11
M_A_DQ20 M_A_DQ16
PM_EXTTS#0 M_A_DM2
M_A_DQ18 M_A_DQ22
M_A_DQ29 M_A_DQ28
M_A_DQS#3 M_A_DQS3
M_A_DQ30 M_A_DQ31
M_A_A11 M_A_A7 M_A_A6
M_A_A4 M_A_A2 M_A_A0
M_A_BS#1 M_A_RAS# M_CS#0
M_ODT0 M_A_A13
M_A_DQ32 M_A_DQ36M_A_DQ37
M_A_DM4 M_A_DQ33
M_A_DQ34 M_A_DQ44
M_A_DQ45 M_A_DQS#5
M_A_DQS5 M_A_DQ43
M_A_DQ47 M_A_DQ52
M_A_DQ53
M_CLK_DDR1 M_CLK_DDR#2 M_CLK_DDR#1
M_A_DM6 M_A_DQ54
M_A_DQ55M_A_DQ51 M_A_DQ61
M_A_DQ57 M_A_DQS#7
M_A_DQS7 M_A_DQ59M_A_DQ58
M_A_DQ63
R305 10K_4 R319 10K_4 R306 10K_4
H 5.2 H 9.2
M_CKE1
3
M_A_DM[0..7] <7> M_A_DQ[0..63] <7> M_A_DQS[0..7] <7> M_A_DQS#[0..7] <7>
M_CLK_DDR0 <8> M_CLK_DDR#0 <8>
PM_EXTTS#0 <8>
M_CKE1 <8,12>
M_A_BS#1 <7,12> M_A_RAS# <7,12> M_CS#0 <8,12>
M_ODT0 <8,12>
M_CLK_DDR1 <8> M_CLK_DDR#2 <8> M_CLK_DDR#1 <8>
4
SMDDR_VREF_DIMM
CN37
1
VREF
3
M_B_DQ0 M_B_DQ5
M_B_DQS#0 M_B_DQS0
M_B_DQ7 M_B_DQ3
M_B_DQ9 M_B_DQ8 M_B_DM1
M_B_DQS#1 M_B_DQS1
M_B_DQ11 M_B_DQ10
M_B_DQ20 M_B_DQ17
M_B_DQS#2 M_B_DQS2
M_B_DQ19 M_B_DQ23
M_B_DQ29 M_B_DQ28
M_B_DM3
M_B_DQ31 M_B_DQ30
M_CKE2<8,12> M_CKE3 <8,12>
M_B_BS#2<7,12>
M_B_BS#0<7,12>
M_B_WE#<7,12>
M_B_CAS#<7,12>
M_CS#3<8,12>
M_ODT3<8,12>
CGDAT_SMB<2> CGCLK_SMB<2>
M_CKE2
M_B_BS#2 M_B_A12
M_B_A9 M_B_A8
M_B_A5 M_B_A3 M_B_A1
M_B_A10 M_B_BS#0 M_B_WE#
M_B_CAS# M_CS#3
M_ODT3 M_B_DQ37
M_B_DQ33 M_B_DQS#4
M_B_DQS4 M_B_DQ39
M_B_DQ35 M_B_DQ41
M_B_DQ40 M_B_DM5 M_B_DQ46
M_B_DQ43
M_B_DQS#6 M_B_DQS6
M_B_DQ54 M_B_DQ60
M_B_DQ57 M_B_DM7 M_B_DQ58
M_B_DQ59 CGDAT_SMB
CGCLK_SMB
+3V
5
7
9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50
VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD)
2-1734073-2
CKE 2,3CKE 0,1
3
4
5
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
PC4800 DDR2
SDRAM SO-DIMM
(200P)
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
5
M_B_DQ4 M_B_DQ1
M_B_DM0 M_B_DQ2
M_B_DQ6 M_B_DQ12
M_B_DQ13
M_CLK_DDR3 M_CLK_DDR#3
M_B_DQ14 M_B_DQ15
M_B_DQ16 M_B_DQ21
PM_EXTTS#1 M_B_DM2
M_B_DQ18 M_B_DQ22
M_B_DQ24 M_B_DQ25
M_B_DQS#3 M_B_DQS3
M_B_DQ26 M_B_DQ27
M_CKE3
M_B_A11 M_B_A7 M_B_A6
M_B_A4 M_B_A2 M_B_A0
M_B_BS#1 M_B_RAS# M_CS#2
M_ODT2 M_B_A13
M_B_DQ32 M_B_DQ36
M_B_DM4 M_B_DQ34
M_B_DQ38 M_B_DQ44
M_B_DQ45 M_B_DQS#5
M_B_DQS5 M_B_DQ47
M_B_DQ42 M_B_DQ52M_B_DQ53
M_B_DQ48M_B_DQ49
M_CLK_DDR2
M_B_DM6 M_B_DQ55M_B_DQ51
M_B_DQ50 M_B_DQ56
M_B_DQ61 M_B_DQS#7
M_B_DQS7 M_B_DQ62
M_B_DQ63
R320 10K_4
+3V
SMbus address A4SMbus address A0
6
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
PM_EXTTS#1 <8>
M_B_BS#1 <7,12> M_B_RAS# <7,12>
M_CS#2 <8,12>
M_ODT2 <8,12>
M_CLK_DDR2 <8>
6
M_B_DM[0..7] <7> M_B_DQ[0..63] <7> M_B_DQS[0..7] <7> M_B_DQS#[0..7] <7> M_B_A[0..13] <7,12>M_A_A[0..13] <7,12>
SMDDR_VREF_DIMM
R322
*10K/F_4
7
+1.8VSUS
Place these Caps near So-Dimm1.
C358
2.2U-6.3V_6
C849 .1U-10V_4
C381
2.2U-6.3V_6
C855
2.2U-6.3V_6
C851 .1U-10V_4
+3V
C359
2.2U-6.3V_6
+1.8VSUS
Place these Caps near So-Dimm1.
C362 .1U-10V_4
SMDDR_VREF_DIMM
C411 .1U-10V_4
C363 .1U-10V_4
C373
2.2U-6.3V_6
8
C389 .1U-10V_4
Place these Caps near So-Dimm1. No Vias Between the Trace of PIN to
CAP.
+1.8VSUS
Place these Caps near So-Dimm2.
C850
C852
C360
2.2U-6.3V_6
+1.8VSUS
Place these Caps near So-Dimm1.
C364 .1U-10V_4
SMDDR_VREF_DIMM
C430 .1U-10V_4
2.2U-6.3V_6
C853 .1U-10V_4
C418
2.2U-6.3V_6
2.2U-6.3V_6
C848 .1U-10V_4
+3V
C319 .1U-10V_4
C419
2.2U-6.3V_6
C427 .1U-10V_4
Place these Caps near So-Dimm2. No Vias Between the Trace of PIN to
CAP.
R293 0_4
R321 *10K/F_4
Size Document Number Rev
DDR SO-DIMM(200P)
Date: Sheet
7
+1.8VSUS
PROJECT : ZB1
Quanta Computer Inc.
SMDDR_VREF <8,45>
of
13 50Friday, February 24, 2006
8
C
5
CH500H-40
D12
CH500H-40
R529
CKL:1n ~ 20nF
R289
8.2K_4
INTVRMEN
1
0
5
VCCRTC
R301
1M/F_6
R288
4.7K_4
VCCRTC
R308
VCCRTC_2VCCRTC_1
1K_4
SATA_RXN0<34> SATA_RXP0<34>
SATA_TXN0<34> SATA_TXP0<34>
SATA_RXN2<35> SATA_RXP2<35>
SATA_TXN2<35> SATA_TXP2<35>
VCCRTC
C415
1U-16V_6
20K_6
1U-16V_6
CLK_PCIE_SATA#<2> CLK_PCIE_SATA<2>
25mils/15mils
PIORDY
IRQ14
R309 330K_6
ICH_INTVRMEN
R300 *0_4
C414
Internal PU
Q36
13
MMBT3904
2
Internal PU
SATA_LED#<40>
C834 SH@.01U-16V_4 C833 SH@.01U-16V_4 C835 SH@.01U-16V_4 C836 SH@.01U-16V_4
C823 HS@.01U-16V_4 C824 HS@.01U-16V_4 C826 HS@.01U-16V_4 C825 HS@.01U-16V_4
R294 24.9/F_4
Place within 500 mils of ICH7
RTC
+3VPCU
D D
+5VPCU
R519
R518
4.7K_4
R522 15K_4
C C
B B
A A
D11
VCCRTC_3
R310 1K_4
CN35
1 2
FI_S2P_HF_JAE_RTC BAT
20MIL 20MIL
1.2K_6
+3V
ICH7 internal VR enable strap
Enable (default)
Disable
PDDACK#<35> PIORDY<35>
PDDREQ<35>
ACZ_SDIN0<36> ACZ_SDIN1<36>
PDIOR#<35> PDIOW#<35>
IRQ14<35>
4
CKL:C1/C2: 18pF -> CL:12.5pF C1/C: 10pF -> CL Value =
8.5pF
C843
CLK_32KX1
18P-50V_4
Y9
32.768KHZ
C831 18P-50V_4
T127
4
2 1
CLK_32KX2
RTCRST#
SM_INTRUDER# ICH_INTVRMEN
ACZ_BCLK ACZ_SYNC
ACZ_RST# ACZ_SDIN0
ACZ_SDIN1 ACZ_SDIN2
ACZ_SDOUT
SATA_LED#
SATA_RXN0_C SATA_RXP0_C SATA_TXN0_C SATA_TXP0_C
SATA_RXN2_C SATA_RXP2_C SATA_TXN2_C SATA_TXP2_C
SATA_BIAS
IRQ14
PIORDY
R571 10M_6
AB1 AB2
AA3
AF18
AF3
AE3 AG2 AH2
AF7
AE7 AG6 AH6
AF1
AE1
AH10 AG10
AF15
AH15
AF16 AH16 AG16 AE15
W4 W1
W3
U49A
RTXC1 RTCX2
RTCRST#
Y5
INTRUDER# INTVRMEN
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT EE_DIN
V3
LAN_CLK
U3
LAN_RSTSYNC
U5
LAN_RXD0
V4
LAN_RXD1
T5
LAN_RXD2
U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2
U1
ACZ_BIT_CLK
R6
ACZ_SYNC
R5
ACZ_RST#
T2
ACZ_SDIN0
T3
ACZ_SDIN1
T1
ACZ_SDIN2
T4
ACZ_SDOUT SATALED# SATA0RXN
SATA0RXP SATA0TXN SATA0TXP
SATA2RXN SATA2RXP SATA2TXN SATA2TXP
SATA_CLKN SATA_CLKP
SATARBIASN SATARBIASP
DIOR# DIOW# DDACK# IDEIRQ IORDY DDREQ
ICH7-M
LPCCPU
RTCLAN
AC-97/AZALIA
SATA
IDE
3
LAD0 LAD1 LAD2 LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME# A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
GPIO49/CPUPWRGD
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
SMI#
STPCLK#
THERMTRIP#
DD10 DD11 DD12 DD13 DD14 DD15
DCS1# DCS3#
3
NMI
DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9
DA0 DA1 DA2
AA6 AB5 AC4 Y6
AC3 AA5
AB3 AE22
AH28 AG27 AF24
AH25 AG26 AG24
AG22 AG21 AF22 AF25
AG23 AH24
AF23 AH22 AF26
AB15 AE14 AG13 AF13 AD14 AC13 AD12 AC12 AE12 AF12 AB13 AC14 AF14 AH13 AH14 AC15
AH17 AE17 AF17
AE16 AD16
LDRQ#0 LDRQ#1
GATEA20
TP_H_CPUSLP# H_DPRSTP#_R
H_DPSLP#_R
T118
RCIN#
H_SMI#_R
H_THERMTRIP_R
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
PDA0 PDA1 PDA2
LAD0 <38,39> LAD1 <38,39> LAD2 <38,39> LAD3 <38,39>
LDRQ#0 <38>
T60
LFRAME# <38,39> GATEA20 <39>
H_A20M# <3>
R256 *0_4 R248 0_4
R247 0_4
R259 0_4
R262 0_4
PDD[15:0] <35>
PDA[2:0] <35>
PDCS1# <35> PDCS3# <35>
2
H_CPUSLP# <3,6>
H_PWRGD <3>
H_IGNNE# <3> H_INIT# <3>
H_INTR <3> RCIN# <39> H_NMI <3>
H_SMI# <3> H_STPCLK# <3>
2
1
+3V
+3V
R275
R261
10K_4
RCIN#
+1.05V
R244 *56.2/F_4
Should be 2" close ICH7
ACZ_SDOUT
ACZ_SYNC
ACZ_BCLK
ACZ_RST#
Size Document Number Rev
Date: Sheet
GATEA20
R245 *56.2/F_4
ICH_DPRSTP# <3> H_DPSLP# <3>
R249 24.9/F_4
R311 39_4
R317 39_4
R314 39_4
R316 39_4
ICH7-M HOST (1 OF 4)
10K_4
+1.05V
R263
56.2/F_4
H_FERR# <3>
+1.05V
R246
56.2/F_4
PM_THRMTRIP# <3,8>
ACZ_SDOUT_AUDIO <36>
C832 *10P-50V_4
ACZ_SYNC_AUDIO <36>
C841 *10P-50V_4
BIT_CLK_AUDIO <36>
C837 *10P-50V_4
ACZ_RST#_AUDIO <36>
PROJECT : ZB1
Quanta Computer Inc.
1
14 50Wednesday, March 01, 2006
C
of
5
PCIE_RXN0<33>
New card
MINI CARD
D D
EZ4
EZ4
+3V
R318
R312
R313 10K_4
T123PAD T124PAD
C C
10K_4
10K_4
PCIE_RXN5<27> PCIE_RXP5<27>
PCIE_TXN5<27> PCIE_TXP5<27>
SPI_SCLK SPI_CE# SPI_ARB
SPI_SI SPI_SO
PCIE_RXP0<33>
PCIE_TXN0<33> PCIE_TXP0<33>
PCIE_RXN4<29> PCIE_RXP4<29>
PCIE_TXN4<29> PCIE_TXP4<29>
PCIE_RXN1<42> PCIE_RXP1<42>
PCIE_TXN1<42> PCIE_TXP1<42>
PCIE_RXN2<42> PCIE_RXP2<42>
PCIE_TXN2<42> PCIE_TXP2<42>
C799 NZ_PCIEGL@.1U-10V_4
C812 NZ_PCIEGL@.1U-10V_4
EZ@.1U-10V_4
GLAN
4
C798 .1U-10V_4
C811 .1U-10V_4
C806 .1U-10V_4
C807 .1U-10V_4 EZ@0_4P2R_S
EZ@.1U-10V_4
EZ@.1U-10V_4
EZ@.1U-10V_4
C801 C800
C802 C803
3 1
3 1
PCIE_TXN0_C PCIE_TXP0_C
PCIE_TXN4_C PCIE_TXP4_C
RP130
4 2
RP132
4 2
NZ_PCIEGL@0_4P2R_S
USBOC#0 USBOC#1 USBOC#2 USBOC#3 USBOC#4 USBOC#5 USBOC#6 USBOC#7
G28 G27
K26 K25
M26 M25
P26 P25 N28 N27
T25 T24 R28 R27
F26 F25 E28 E27
H26 H25
J28 J27
L28 L27
R2 P6 P1
P5 P2
D3 C4 D5 D4 E5 C3 A2 B3
U49D
PERn1 PERp1 PETn1 PETp1
PERn2 PERp2 PETn2 PETp2
PERn3 PERp3 PETn3 PETp3
PERn4 PERp4 PETn4 PETp4
PERn5 PERp5 PETn5 PETp5
PERn6 PERp6 PETn6 PETp6
SPI_CLK SPI_CS# SPI_ARB
SPI_MOSI SPI_MISO
OC0# OC1# OC2# OC3# OC4# OC5#/GPIO29 OC6#/GPIO30 OC7#/GPIO31
ICH7-M
3
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP
PCI-Express
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
USB
DMI_CLKN DMI_CLKP
USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P
USBRBIAS#
USBRBIAS
AE28 AE27
C25 D25
F1 F2 G4 G3 H1 H2 J4 J3 K1 K2 L4 L5 M1 M2 N4 N3
D2
USB_RBIAS_PN
D1
Place within 500 mils of ICH7
DMI_RXN0 <8> DMI_RXP0 <8> DMI_TXN0 <8> DMI_TXP0 <8>
DMI_RXN1 <8> DMI_RXP1 <8> DMI_TXN1 <8> DMI_TXP1 <8>
DMI_RXN2 <8> DMI_RXP2 <8> DMI_TXN2 <8> DMI_TXP2 <8>
DMI_RXN3 <8> DMI_RXP3 <8> DMI_TXN3 <8> DMI_TXP3 <8>
CLK_PCIE_ICH# <2> CLK_PCIE_ICH <2>
DRI_IRCOMP_R
USBP0- <29> USBP0+ <29> USBP1- <29> USBP1+ <29> USBP2- <29> USBP2+ <29> USBP3- <29> USBP3+ <29> USBP4- <29> USBP4+ <29> USBP5- <33> USBP5+ <33> USBP6- <29> USBP6+ <29> USBP7- <29> USBP7+ <29>
R307
22.6/F_6
15/15mils
Docking Bluetooth Module Mini PCI-E NEW CARD
25mils/15mils
2
+1.5V
R265
24.9/F_4
Place within 500 mils of ICH7
+3V_S5
REQ2# REQ1#
STOP#
+3V
INTE# LOCK# SERR# PERR#
+3V
INTF# REQ5#
REQ0# IRDY# INTC#
+3V
USBOC#5 USBOC#7 USBOC#6
6 7 8 9
10
6 7 8 9
10
6 7 8 9
10
6 7 8 9
10
RP126
8.2K_10P8R
RP68
8.2K_10P8R
RP77
8.2K_10P8R
RP84
8.2K_10P8R
CKL use 10Kohm
1
+3V
5
TRDY#
4
REQ4#FRAME#
3
DEVSEL#
2
REQ3#
1
+3V
5
LOCK#
4
INTH#
3 2
INTG#
1
+3V
5
INTA#
4
INTB#
3 2
INTD#
1
+3V_S5
5
USBOC#4
4
USBOC#2
3
USBOC#3USBOC#1
2
USBOC#0
1
ICH7 Boot BIOS select
AD[0..31]<27,29,30>
B B
INTB#<27> INTC#<29>
A A
INTD#<29>
T59PAD T58PAD T121PAD T122PAD T55PAD
5
INTA# INTB# INTC# INTD#
TP_ICH_RSVD1 TP_ICH_RSVD2 TP_ICH_RSVD3 TP_ICH_RSVD4 TP_ICH_RSVD5
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
U49B
E18
AD0
C18 A16 F18 E16 A18 E17 A17 A15 C14 E14 D14 B12 C13 G15 G13 E12 C11 D11 A11 A10 F11 F10
E9 D9 B9 A8 A6 C7 B6 E6 D6
A3 B4 C5 B5 G7
AE5
AD5 AG4 AH4 AD9 AH20
PCI
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
PIRQA# PIRQB# PIRQC# PIRQD# GPIO5/PIRQH#
RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5] MCH_SYNC#
ICH7-M
MISC
REQ4#/GPIO22 GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
GPIO2/PIRQE# GPIO3/PIRQF#
GPIO4/PIRQG#
REQ0# GNT0# REQ1# GNT1# REQ2# GNT2# REQ3# GNT3#
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR# STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PME#
RSVD[6] RSVD[7] RSVD[8] RSVD[9]
D7 E7 C16 D16 C17 D17 E13 F13 A13 A14 C8 D8
B15 C12 D12 C15
A7 E10 B18 A12 C9 E11 B10 F15 F14 F16
C26 A9 B19
G8 F7 F8
AE9 AG8 AH8 F21
4
REQ0# GNT0# REQ1# GNT1# REQ2#
REQ3# REQ4# REQ5#
IRDY#
DEVSEL# PERR# LOCK# SERR# STOP# TRDY# FRAME#
PLT_RST-R# PCLK_ICH
R752 *0_4
INTE# INTF# INTG# INTH#
TP_ICH_RSVD6 TP_ICH_RSVD7 TP_ICH_RSVD8
RSVD9
CBE0# <27,29,30> CBE1# <27,29,30> CBE2# <27,29,30> CBE3# <27,29,30>
INTE# <30> INTF# <30> INTG# <30>
T54 PAD T56 PAD
T57 PAD T120 PAD
R276 *1K/F_4
REQ0# <30> GNT0# <30> REQ1# <27> GNT1# <27> REQ2# <29> GNT2# <29>
IRDY# <27,29,30> PAR <27,29,30> PCIRST# <27,29,30,38> DEVSEL# <27,29,30> PERR# <27,29,30>
SERR# <27,29,30> STOP# <27,29,30> TRDY# <27,29,30> FRAME# <27,29,30>
PCLK_ICH <2> PCI_PME# <27,29,30,38>
MCH_ICH_SYNC <8> PLTRST# <16,18,27,29,31,33,34,35,36,39,41,42>
PLT_RST-R#
TC7SH08FU
U46
2 1
PLT_RST-R# <8>
+3V
C386
.1U-10V_4
3 5
4
Don't connect to PCI device / Express card
3
2
LPC (default)
PCI UNSTUFF10 STUFF
PCI7411
Relteck Lan
Size Document Number Rev
ICH7-M PCI E (2 OF 4)
Date: Sheet
STRAP GNT5#
R1
GNT4# R2
UNSTUFF11 UNSTUFF
01 STUFFSPI UNSTUFF
REQ# / GNT#PCI DEVICE InterruptsIDSEL#
AD25 REQ0# / GNT0# INT E/F/G#
AD16 REQ1# / GNT1# INT B#
AD19 REQ2# / GNT2# INT C/D#MINI PCI
PROJECT : ZB1
Quanta Computer Inc.
15 50Friday, February 24, 2006
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