Acer aspire 5600 Schematics
1
2
3
4
5
6
7
8
CPU CORE
SENTECH
SC451ITSTR
Page:32
A A
CLOCK GEN
ICS954310BG
SYSTEM 3V/5V
MAXIM
MAX1999
+3VPCU
+3V_S5
+3VSUS
+3V
+5VPCU
+5VSUS
+5V
DDR-II SODIMM1
Page: 12
Page:4
X'TAL
14.318MHZ
DDR-II
ZB2
Yonah/Merom
INTEL Mobile_479 CPU
HOST BUS 533/667 MHz
CALISTOGA-GM
1466 FCBGA
Page:2, 3
PCIE
VRAM x4
DDR2
16Mx16
32Mx16
ATi
M52P
/M52PG
/M54P
Page: 17,
18,19, 20
RGB
LVDS
CRT
Page: 22
LVDS
Page: 22
UMA(option)
+15V
B B
Page:33
+1.8VSUS
+1.8V
+0.9VSUS
+0.9V
+1.5V
+1.05V
Page:34
+2.5V
+1.2V
VGA_CORE
C C
Page:36
BATTERY CHARGER
MAXIM
MAX8724
Page:35 Page: 25
DDR-II SODIMM2
Page: 12
SATA HDD
Page: 23
PATA HDD
Page: 23
IDE-ODD
Page: 23
AUDIO CODEC
Realtek
ALC883 (ALC260)
MAX9755
Page: 29
Page: 28
MODEMAMP
Page: 28
ATA 66/100
ATA 66/100
HD Audio
Page: 5, 6 , 7, 8, 9, 10
Page: 13,14,15,16
X'TAL
32.768KHZ
X'TAL
32.768K
DMI I/F
ICH7-M
652 BGA
LPC 33MHZ
KBC
NS
PC97551/541V
Page: 30
PCI-E BUS
PCI BUS 33MHZ
USB 2.0
X'TAL
25M
OSC
48MHZ
MINI-Card slot
Wireless LAN
Page: 24
TI PCI7412
AD25
REQ0#
GNT0#
INTE#
INTF#
INTG#
MINI-PCI
Wireless LAN
AD19
REQ2# / GNT2#
INTC# , INTD#
REALTEK
RTL8100CL
AD16
REQ1#
GNT1#
INTB#
Page: 26
Page: 24
TYPE II
SLOT
Page: 26
6 IN 1
Cardreader
Page: 27
RJ45
Page: 25
Connector
D D
SPEAKER LINE OUTMIC IN
RJ11
Page: 25
Page: 29Page: 29 Page: 29
Touchpad
Page: 29
Keyboard
Page: 31
FLASH
Page: 30
FAN
Page: 31
SYSTEM
USB PORT *3
Page:24
Bluetooth
USB
interface
Page:24
PROJECT : ZB2
Quanta Computer Inc.
Size Document Number Rev
BLOCK DIAGRAM
1
2
3
4
5
6
Date: Sheet
7
137Thursday, February 09, 2006
8
1A
of
5
H_A#[16:3][5]
D D
H_ADSTB0#[5]
H_REQ#[4:0][5]
H_A#[31:17][5]
H_ADSTB1#[5]
H_A20M#[13]
C C
H_STPCLK#[13]
XDP_DBRESET#
XDP_TMS
B B
XDP_TDI
XDP_BPM#5
H_FERR#[13]
H_IGNNE#[13]
R131 0_4
H_INTR[13]
H_NMI[13]
H_SMI#[13]
T105
T103
T102
T104
T109
T108
T107
T106
T111 R12427.4/F_6
T38
T138
R186 *54.9/F_4
R133 39.2/F_4
R132 150_4
R134 54.9/F_4
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_STPCLK_R#
TP_A32#
TP_A33#
TP_A34#
TP_A35#
TP_A36#
TP_A37#
TP_A38#
TP_A39#
TP_APM0#
TP_APM1#
TP_HFPLL
U29A
H_A#3
J4
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
A[3]#
L4
A[4]#
M3
A[5]#
K5
A[6]#
M1
N2
N3
P5
P2
P4
P1
R1
K3
H2
K2
U5
R3
W6
U4
U2
R4
W3
W5
W2
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
V3
B2
C3
B25
+1.05V
XDP_TCK PD 27.4/1%
XDP_TRST PD 680ohm /5%
XDP_TDI PU 150ohm /1.05V
XDP_TMS PU 39.2/1%
A[7]#
A[8]#
J1
A[9]#
A[10]#
A[11]#
A[12]#
L1
A[13]#
A[14]#
A[15]#
A[16]#
L2
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
J3
REQ[3]#
L5
REQ[4]#
Y2
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
Y5
A[22]#
A[23]#
A[24]#
T5
A[25]#
T3
A[26]#
A[27]#
A[28]#
Y4
A[29]#
A[30]#
Y1
A[31]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]#
RSVD[02]#
RSVD[03]#
RSVD[04]#
RSVD[05]#
RSVD[06]#
T2
RSVD[07]#
RSVD[08]#
RSVD[09]#
RSVD[10]#
RSVD[11]#
PZ47903-2741-01
ADDR GROUP 0
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
CONTROL
INIT#
LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
XDP/ITP SIGNALS
PROCHOT
THERMDA
THERMDC
THERMTRIP#
THERMH CLK
BCLK[0]
BCLK[1]
RSVD[12]#
RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#
RESERVED
RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#
H/W MONITOR
R213
10K_4
SLAVE ADDRESS: 98
+3V +3V
R212 47_6
A A
THERMDC
THERMDA
10 mil trace /
10 mil space
15 MIL
3V_THM
C260
.1U/10V_4
C261
2200P_4
U8
1
VCC
3
DXN
2
DXP
4 5
-OVT GND
G781
5
-ALT
SMDATA
SMCLK
R215
10K_4
6
7
8
R438
*10K_4
KBSMDAT
KBSMCLK
R209
10K_4
MAX6648_OV# [31]
To FAN
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
D21
A24
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
+3V
1
1
4
H_RS#0
H_RS#1
H_RS#2
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
H_PROCHOT_R#
THERMDA
THERMDC
THERMTRIP#_PWR
T131
T130
TP_EXTBREF
TP_SPARE0
TP_SPARE1
TP_SPARE2
TP_SPARE3
TP_SPARE4
TP_SPARE5
TP_SPARE6
TP_SPARE7
XDP_TCK
XDP_TRST#
+3V
2
Q20
3
2N7002
+3V
2
Q21
3
2N7002
4
T22
H_ADS# [5]
H_BNR# [5]
H_BPRI# [5]
H_DEFER# [5]
H_DRDY# [5]
H_DBSY# [5]
H_BREQ#0 [5]
H_INIT# [13]
H_LOCK# [5]
H_CPURST# [5]
H_RS#0 [5]
H_RS#1 [5]
H_RS#2 [5]
H_TRDY# [5]
H_HIT# [5]
H_HITM# [5]
T18
T19
T99
T14
T100
T101
R241 *0_4
CLK_CPU_BCLK [4]
CLK_CPU_BCLK# [4]
T58
T25
T40
T39
T110
T98
T52
T51
T137
R136 27.4/F_4
R135 680_4
CPU_MBDATA
CPU_MBCLK
To SB
+1.05V
T129
T16
XDP PU_R < 0.2"
+1.05V
R194
68_4
PM_THRMTRIP# [7,13]
Close CPU
CPU_MBDATA [30]
CPU_MBCLK [30]
THERM_ALERT# [15]
R190
56.2/F_4
+1.05V
R205
1K/F_4
R206
2K/F_6
+1.05V [3,4,5,8,9,13,16,33,34]
Near to MCH <500mils
H_D#[15:0][5]
H_DSTBN#0[5]
H_DSTBP#0[5]
H_DINV#0[5]
H_D#[31:16][5]
+1.05V
20/15mils
3
H_DSTBN#1[5]
H_DSTBP#1[5]
H_DINV#1[5]
CPU_BSEL0[4]
CPU_BSEL1[4]
CPU_BSEL2[4]
3
H_GTLREF
R446
R445
To EC
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
*1K/F_4
51/F_4
AD26
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
H26
F26
K22
H25
H23
G22
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
C26
D25
B22
B23
C21
J24
J23
J26
U29B
D[0]#
D[1]#
D[2]#
DATA GRP 0 DATA GRP 1
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
MISC
TEST1
TEST2
BSEL[0]
BSEL[1]
BSEL[2]
PZ47903-2741-01
Q27 MMBT3904
R196 *0_4
DATA GRP 2
DSTBN[2]#
DSTBP[2]#
DINV[2]#
DATA GRP 3
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
R526
330_6
2
13
THERMTRIP#_PWR
2
H_D#32
AA23
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
SLP#
PSI#
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
REV_2A/12-13 Add
2
H_DSTBN#3 [5]
H_DSTBP#3 [5]
H_DINV#3 [5]
27.4/F_6
ICH_DPRSTP# [13,32]
H_DPSLP# [13]
H_CPUSLP# [5,13]
PSI# [32]
TO VRD
R419
56_4
R245 330_4
1
CPU
H_D#[47:32] [5]
H_DSTBN#2 [5]
H_DSTBP#2 [5]
H_DINV#2 [5]
H_D#[63:48] [5]
Close CPU
R208
R20754.9/F_4
25/25mils
R12554.9/F_4
XDP_DBRESET#H_PROCHOT_R#
C274
*4.7U-10V_8
Size Document Number Rev
CPU(1 OF 2 )
Date: Sheet
+1.05V
R129
*200/F_6
T136T21
H_DPWR# [5]
H_PWRGD [13]
H_PWRGD is CMOS driving by ICH
+1.05V+1.05V
R428
*330_6
2
Q17
1 3
*MMBT3904
R431 0_4
VCC_CORE+1.05V+1.05V
D2*CH500H-40
R243
R242
330_4
*330_4
2
1 3
Q9 MMBT3904
PROJECT : ZB2
Quanta Computer Inc.
SYS_RST# [15]H_PROCHOT#[30]
1999_SHT# [33]
237Thursday, February 09, 2006
of
1
2A
5
U29D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
D D
C C
B B
A A
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
P3
VSS[081]
PZ47903-2741-01
5
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
+1.05V
VCC_CORE
+1.5V
VCC_CORE
4
+1.05V [2,4,5,8,9,13,16,33,34]
VCC_CORE [2,32]
+1.5V [7,9,14,16,24,28,33,34]
C237
10U-6.3V_8
C213
10U-6.3V_8
C185
10U-6.3V_8
C220
10U-6.3V_8
C263
10U-6.3V_8
C613
10U-6.3V_8
C608
10U-6.3V_8
C624
10U-6.3V_8
C189
10U-6.3V_8
C217
10U-6.3V_8
C191
10U-6.3V_8
C236
10U-6.3V_8
C264
10U-6.3V_8
C612
10U-6.3V_8
C609
10U-6.3V_8
C623
10U-6.3V_8
C193
10U-6.3V_8
C230
10U-6.3V_8
C197
10U-6.3V_8
C244
10U-6.3V_8
C265
10U-6.3V_8
C611
10U-6.3V_8
C626
10U-6.3V_8
C621
10U-6.3V_8
C199
10U-6.3V_8
C238
10U-6.3V_8
C214
10U-6.3V_8
C262
10U-6.3V_8
C266
10U-6.3V_8
C610
10U-6.3V_8
C625
10U-6.3V_8
C622
10U-6.3V_8
change to 0805
REV_3A/02-09 Change to 10U
4
3
U29C
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
PZ47903-2741-01
3
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
2
VCC_COREVCC_CORE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
+1.05V
+1.05V
R162 100/F_4
Size Document Number Rev
VCC_CORE
REV_3A/02-09 Change to 10U
C144
330U-2.5V_7343
+
C200
10U-6.3V_8
C186
C187
.1U/10V_4
.1U/10V_4
CPU_VID0 [32]
CPU_VID1 [32]
CPU_VID2 [32]
CPU_VID3 [32]
CPU_VID4 [32]
CPU_VID5 [32]
CPU_VID6 [32]
C211
10U-6.3V_8
+1.5V
C216
10U-6.3V_8
reserve dummy cap--Allen
C243
C242
.1U/10V_4
.1U/10V_4
+1.5V
C637
.01U/16V_4
Close CPU B26
VCC_CORE
R164
100/F_4
VCCSENSE [32]
VSSSENSE [32]
PROJECT : ZB2
Quanta Computer Inc.
CPU(2 OF 2 )
Date: Sheet of
2
1
C225
10U-6.3V_8
C149
.1U/10V_4
C639
10U/X5R-6.3V_8
337Thursday, February 09, 2006
1
CPU
C153
.1U/10V_4
3A
A
B
Note : If Use Internal VGA Please NC "EV@xxx" Parts
Close to IC <500mils
C
D
E
CLK
L21
ACB2012L-120-T_8
+3V
120 ohms@100Mhz
4 4
L22
+3V
ACB2012L-120-T_8
3 3
VR_PWRGD_CK410#[15,32]
VR_PWRGD_CK410_R#[15]
2 2
MINI_CLKREQ3#[24]
1 1
PDAT_SMB[15,24]
PCLK_SMB[15,24]
25 mils
VDD_SRC_CPU
C182
C235
.1U/10V_4
.1U/10V_4
R187 2.2/F_6
VDD_A
.1U/10V_4
25 mils
VDD_PCI
R153 2.2/F_6
R189 1_6
REQ3 Latched Select
"0" : CLK Enable
"1" : CLK Disable
Control : PCIE 2,4
MINI_CLKREQ3#
PEREQ Control Pair
PEREQ1
PEREQ2
PEREQ3
PEREQ4
Q18
RHU002N06
3
Q19
RHU002N06
3
A
C180
.1U/10V_4
VDD_48
VDD_REF
R540 0_4
R541 *0_4
R169 10K_4
PECLK Pair0, 6
PECLK Pair1, 8
PECLK Pair2, 4
PECLK Pair3, 5, 7
+3V
R430
2
10K_4
+3V
2
C179
C233
.1U/10V_4
.1U/10V_4
C231
C247
10U/10V_8
VR_PWRGD_CK410#_C
C724
.1U/10V_4
REV_3A/02-05 Add
C192
C194
.1U/10V_4
10U/10V_8
C181
C169
.1U/10V_4
10U/10V_8
C234
.1U/10V_4
C245
10U/10V_8
VR_PWRGD_CK410#_C
REV_3A/02-09 Add
+3V
R432
10K_4
SMBDT
1
SMBCK
1
C183
10U/10V_8
CG_XIN
21
Y4
14.318MHZ
CG_XOUT
R420 *10K_4
+3V
CLKUSB_48_R
R414 4.7K_4
R181 4.7K_4
IREF
R_DOT96
2
R_DOT96#
4
T47
INTERNAL PULL HIGH
CLK_BSEL0
FSA
CLK_BSEL1
FSB
VDD_A
U6
58
X1
57
X2
10
Vtt_PwrGd#/PD
62
CPU_STOP#
63
PCI/PCIE_STOP#
54
SCLK
55
SDATA
FSA/USB_48MHz
16
FSB/TEST_MODE
61
REF1/FSLC/TEST_SEL
56
VDD_REF
50
VDDCPU
1
VDD_PCI_1
7
VDD_PCI_2
21
VDD_PCIE
28
VDDPCIE
42
VDD_PCIE
11
VDD_48
32
REQ3(PCIE)
33
REQ4(PCIE)
47
IREF
14
DOT96MHz
15
DOT96MHz#
34
PWRSAVE#
53
R409 1K_4
R418 1K_4
GND
GND_48
59
13
CK-410M
GND
PM_STPCPU#[15]
PM_STPPCI#[15]
CLKUSB_48[15]
C627 33P_4
CL=20pF
C629 33P_4
VR_PWRGD_CK410#_C
PM_STPCPU#
PM_STPPCI#
DREFCLK
DREFCLK#
+1.05V
+1.05V
SMBCK
SMBDT
R421 33_4
CLK_BSEL0
CLK_BSEL1
CLK_BSEL2
VDD_REF
VDD_SRC_CPU
VDD_PCI
VDD_SRC_CPU
VDD_48
MINI_CLKREQ3#
R182 475/F_6
RP18
1
3
33_4P2R_S
R412 *56.2/F_4
R410 0_4
R411 *1K_4
R413 *1K_4
R415 0_4
R424 *0_4
SMBCK[12]
SMBDT[12]
Iref=5mA,
Ioh=4*Iref
DREFCLK[7]
DREFCLK#[7]
BSEL strappings need to be set for 533MHz Moby Dick (Intel?915GM - Calistoga Interposer)
(if Calistoga is designed for 667MHz board).
CPU_BSEL0[2]
CPU_BSEL1[2]
Stuff 0 ohm for 533MHz, NC for 667MHz
R179 *1K_4
+1.05V
CPU_BSEL2[2] MCH_BSEL2 [7]
B
R188 0_4
R183 *0_4
CLK_BSEL2
R185 1K_4
FSC
C
46
GNDA
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPUCLKC1
CPUCLKT2/PCIET8
CPUCLKC2/PCIEC8
REQ1#/PCIET7
REQ2#/PCIEC7
PCIET6
PCIEC6
PCIET5
PCIEC5
PCIET4
PCIEC4
SATA_CKT
SATA_CKC
PCIET3
PCIEC3
PCIET2
PCIEC2
PCIET1
PCICLK2/REQ_SEL
PCIF1/selLCD_27#
PCIF0/ITP_EN
GND
ICS954310BGLF
MCH_BSEL0 [7]
MCH_BSEL1 [7]
PCIEC1
27Mfix/LCD_SSCGT/PCIE0T
27SS/LCD_SSCGC/PCIE0C
selPCIEX0_LCD#/PCI5
GND_PCI_2
GND_SRC VDDA
GND_PCI_1
37126
29 4592
Place these termination to close CK410M.
14M_REF
60
REF0
RHCLK_CPU
52
RHCLK_CPU#
51
RHCLK_MCH
49
RHCLK_MCH#
48
44
43
41
40
39
38
RSRC_MCH
36
RSRC_MCH#
35
30
31
RSRC_SATA
26
RSRC_SATA#
27
PECLK_VGA_R
24
PECLK_VGA_R#
25
R_CLK_PCIE_MINI
22
R_CLK_PCIE_MINI#
23
RSRC_ICH CLK_PCIE_ICH
19
RSRC_ICH#
20
R_DREFSSCLK
17
R_DREFSSCLK#
18
R_PCLK_SIO
5
R_PCLK_LAN
4
PCI4
R_PCLK_PCM
3
PCI3
PCLK_MINI_LPC
64
R_PCLK_ICH
R_PCLK_591
8
C162
.1U/10V_4
3
1
3
1
1
3
1
3
3
1
1
3
3
1
1
3
R177 *10K_4
R417 10K_4
R416 10K_4
+5V +1.8V
.1U/10V_4
REV_02/11-21 Modify
FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 200 100 33
4
2
4
2
2
4
2
4
4
2
2
4
4
2
2
4
R159 10K_4
R160 33_4
R161 33_4
R176 33_4
R423 33_4
R422 33_4
C630
D
RP57
33_4P2R_S
RP58
33_4P2R_S
RP19
33_4P2R_S
RP55
33_4P2R_S
RP16
EV@33_4P2R_S
RP56
33_4P2R_S
RP17
33_4P2R_S
RP54
33_4P2R_S
+3V
C601
*10P/50V_4
C600
*10P/50V_4
REV_3A/02-06 Modify
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_MINI
CLK_PCIE_MINI#
CLK_PCIE_ICH#
DREFSSCLK
DREFSSCLK#
C209
*10P/50V_4
R180 22_4
CLK_CPU_BCLK [2]
CLK_CPU_BCLK# [2]
CLK_MCH_BCLK [5]
CLK_MCH_BCLK# [5]
CLK_PCIE_3GPLL [7]
CLK_PCIE_3GPLL# [7]
CLK_PCIE_SATA [13]
CLK_PCIE_SATA# [13]
CLK_PCIE_VGA [17]
CLK_PCIE_VGA# [17]
CLK_PCIE_MINI [24]
CLK_PCIE_MINI# [24]
CLK_PCIE_ICH [14]
CLK_PCIE_ICH# [14]
DREFSSCLK [7]
DREFSSCLK# [7]
PCLK_LAN [25]
PCLK_PCM [26]
PCLK_MINI [24]
PCLK_ICH [14]
PCLK_591 [30]
C166
*10P/50V_4
C165
*10P/50V_4
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_MCH_BCLK#
CLK_MCH_BCLK
CLK_PCIE_MINI#
CLK_PCIE_MINI
CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_VGA
CLK_PCIE_VGA#
DREFSSCLK#
DREFSSCLK
DREFCLK
DREFCLK#
CLK_PCIE_SATA#
Default
Size Document Number Rev
Date: Sheet
CLK_PCIE_SATA
Quanta Computer Inc.
CLOCK GENERATOR
RP59 49.9_4P2R_S
RP60 49.9_4P2R_S
RP53 49.9_4P2R_S
RP20 49.9_4P2R_S
RP13 49.9_4P2R_S
RP15 EV@49.9_4P2R_S
RP51 IV@49.9_4P2R_S
RP14 49.9_4P2R_S
RP52 49.9_4P2R_S
PROJECT : ZB2
C246
*10P/50V_4
2
1
4
3
2
1
4
3
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
437Thursday, February 09, 2006
E
14M_ICH [15]
3A
of
5
H_XRCOMP
R128
24.9/F_4
D D
C C
B B
+1.05V
+1.05V
+1.05V
+1.05V
R140
54.9/F_4
R122
221/F_4
R123
100/F_4
R165
54.9/F_4
R167
221/F_4
R170
100/F_4
R172
24.9/F_4
15 mils/10mils
H_XSCOMP
H_XSWING
C143
.1U/10V_4
H_YSCOMP
H_YSWING
C196
.1U/10V_4
H_YRCOMP
15 mils/10mils
A A
5
CLK_MCH_BCLK[4]
CLK_MCH_BCLK#[4]
H_D#[63:0][2]
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
Short Stub < 100mils
extract from same point
4
K11
T10
W11
U11
T11
AB7
AA9
Y10
AB8
AA4
AA7
AA2
AA6
AA10
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
AG2
AG1
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
G4
T3
U7
U9
W9
T1
T8
T4
W7
U5
T9
W6
T5
W4
W3
Y3
Y7
W5
W2
Y8
E1
E2
E4
Y1
U1
W1
U28A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
Calistoga
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
4
3
H_ADSTB#_0
H_ADSTB#_1
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
R402 0_4
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
2
H_A#[31:3] [2]
H_ADS# [2]
H_ADSTB0# [2]
H_ADSTB1# [2]
H_BNR# [2]
H_BPRI# [2]
H_BREQ#0 [2]
H_CPURST# [2]
H_DBSY# [2]
H_DEFER# [2]
H_DPWR# [2]
H_DRDY# [2]
H_DINV#[3:0] [2]
H_DSTBN#[3:0] [2]
H_DSTBP#[3:0] [2]
H_HIT# [2]
H_HITM# [2]
H_LOCK# [2]
H_REQ#[4:0] [2]
H_RS#[2:0] [2]
H_CPUSLP# [2,13]
H_TRDY# [2]
2
1
+1.05V
C164
.1U/10V_4
C167
.1U/10V_4
+1.05V
+1.05V [2,3,4,8,9,13,16,33,34]
R155
100/F_4
R156
200/F_4
H_VREF :10 mils/20 mils space
H_VREF
H_VREF
P/NCOMPONENTS
945GM
945PM
Size Document Number Rev
GMCH HOST(1 OF 6 )
Date: Sheet
PROJECT : ZB2
Quanta Computer Inc.
AJ009450T04
AJ009450T12
537Thursday, February 09, 2006
1
CLG
1A
of
5
4
3
2
1
CLG
R_B_MD[0..63][12]
D D
R_A_MD[0..63][12]
C C
B B
A A
5
R_A_MD0
R_A_MD1
R_A_MD2
R_A_MD3
R_A_MD4
R_A_MD5
R_A_MD6
R_A_MD7
R_A_MD8
R_A_MD9
R_A_MD10
R_A_MD11
R_A_MD12
R_A_MD13
R_A_MD14
R_A_MD15
R_A_MD16
R_A_MD17
R_A_MD18
R_A_MD19
R_A_MD20
R_A_MD21
R_A_MD22
R_A_MD23
R_A_MD24
R_A_MD25
R_A_MD26
R_A_MD27
R_A_MD28
R_A_MD29
R_A_MD30
R_A_MD31
R_A_MD32
R_A_MD33
R_A_MD34
R_A_MD35
R_A_MD36
R_A_MD37
R_A_MD38
R_A_MD39
R_A_MD40
R_A_MD41
R_A_MD42
R_A_MD43
R_A_MD44
R_A_MD45
R_A_MD46
R_A_MD47
R_A_MD48
R_A_MD49
R_A_MD50
R_A_MD51
R_A_MD52
R_A_MD53
R_A_MD54
R_A_MD55
R_A_MD56
R_A_MD57
R_A_MD58
R_A_MD59
R_A_MD60
R_A_MD61
R_A_MD62
R_A_MD63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
U28D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
Calistoga
R_A_BS0#
AU12
SA_BS_0
SA_BS_1
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
SA_WE#
4
AV14
BA20
AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
R_A_BS1#
R_A_BS2#
R_A_SCASA#
R_A_DM0
R_A_DM1
R_A_DM2
R_A_DM3
R_A_DM4
R_A_DM5
R_A_DM6
R_A_DM7
R_A_DQS0
R_A_DQS1
R_A_DQS2
R_A_DQS3
R_A_DQS4
R_A_DQS5
R_A_DQS6
R_A_DQS7
R_A_DQS#0
R_A_DQS#1
R_A_DQS#2
R_A_DQS#3
R_A_DQS#4
R_A_DQS#5
R_A_DQS#6
R_A_DQS#7
R_A_MA0
R_A_MA1
R_A_MA2
R_A_MA3
R_A_MA4
R_A_MA5
R_A_MA6
R_A_MA7
R_A_MA8
R_A_MA9
R_A_MA10
R_A_MA11
R_A_MA12
R_A_MA13
R_A_SRASA#
SA_RCVENIN#
SA_RCVENOUT#
R_A_BMWEA#
R_A_BS0# [11,12]
R_A_BS1# [11,12]
R_A_BS2# [11,12]
R_A_SCASA# [11,12]
R_A_DM[0..7] [12]
R_A_DQS[0..7] [12]
R_A_DQS#[0..7] [12]
R_A_MA[0..13] [11,12]
R_A_SRASA# [11,12]
T46
T45
R_A_BMWEA# [11,12]
3
R_B_MD0
R_B_MD1 R_B_BS0#
R_B_MD2
R_B_MD3
R_B_MD4
R_B_MD5
R_B_MD6
R_B_MD7
R_B_MD8
R_B_MD9
R_B_MD10
R_B_MD11
R_B_MD12
R_B_MD13
R_B_MD14
R_B_MD15
R_B_MD16
R_B_MD17
R_B_MD18
R_B_MD19
R_B_MD20
R_B_MD21
R_B_MD22
R_B_MD23
R_B_MD24
R_B_MD25
R_B_MD26
R_B_MD27
R_B_MD28
R_B_MD29
R_B_MD30
R_B_MD31
R_B_MD32
R_B_MD33
R_B_MD34
R_B_MD35
R_B_MD36
R_B_MD37
R_B_MD38
R_B_MD39
R_B_MD40
R_B_MD41
R_B_MD42
R_B_MD43
R_B_MD44
R_B_MD45
R_B_MD46
R_B_MD47
R_B_MD48
R_B_MD49
R_B_MD50
R_B_MD51
R_B_MD52
R_B_MD53
R_B_MD54
R_B_MD55
R_B_MD56
R_B_MD57
R_B_MD58
R_B_MD59
R_B_MD60
R_B_MD61
R_B_MD62
R_B_MD63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AN10
AK13
AH11
AK10
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AK5
AJ9
AJ8
AT4
AJ5
AJ3
U28E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
Calistoga
AT24
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
SB_WE#
AV23
AY28
AR24
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AU23
AK16
AK18
AR27
R_B_BS1#
R_B_BS2#
R_B_SCASA#
R_B_DM0
R_B_DM1
R_B_DM2
R_B_DM3
R_B_DM4
R_B_DM5
R_B_DM6
R_B_DM7
R_B_DQS0
R_B_DQS1
R_B_DQS2
R_B_DQS3
R_B_DQS4
R_B_DQS5
R_B_DQS6
R_B_DQS7
R_B_DQS#0
R_B_DQS#1
R_B_DQS#2
R_B_DQS#3
R_B_DQS#4
R_B_DQS#5
R_B_DQS#6
R_B_DQS#7
R_B_MA0
R_B_MA1
R_B_MA2
R_B_MA3
R_B_MA4
R_B_MA5
R_B_MA6
R_B_MA7
R_B_MA8
R_B_MA9
R_B_MA10
R_B_MA11
R_B_MA12
R_B_MA13
R_B_SRASA#
SB_RCVENIN#
SB_RCVENOUT#
R_B_BMWEA#
PROJECT : ZB2
Quanta Computer Inc.
Size Document Number Rev
GMCH DDR(2 OF 6 )
2
Date: Sheet
R_B_BS0# [11,12]
R_B_BS1# [11,12]
R_B_BS2# [11,12]
R_B_SCASA# [11,12]
R_B_DM[0..7] [12]
R_B_DQS[0..7] [12]
R_B_DQS#[0..7] [12]
R_B_MA[0..13] [11,12]
R_B_SRASA# [11,12]
T48
T49
R_B_BMWEA# [11,12]
of
637Thursday, February 09, 2006
1
1A
5
CLK_MCH_OE#
T29
MCH_RSVD_1
T42
MCH_RSVD_2
T41
T124
MCH_RSVD_3
MCH_RSVD_4
T123
MCH_RSVD_5
T44
T43
MCH_RSVD_6
MCH_RSVD_7
T30
MCH_RSVD_8
T35
TV_DCONSEL0
T36
TV_DCONSEL1
T33
MCH_RSVD_11
T116
T121
MCH_RSVD_12
MCH_RSVD_13
T120
T17
D D
CFG[17:3] Internal Pull-up
MCH_BSEL0[4]
MCH_BSEL1[4]
MCH_BSEL2[4]
CFG[2:0]=011
FSB=667M
CFG[2:0]=001
FSB=533M
CFG[18,19] Internal
Pull-down
PM_BMBUSY#[15]
PM_EXTTS#0[12]
PM_EXTTS#1[12]
PM_THRMTRIP#[2,13]
C C
B B
IMVP_PWRGD[15,32]
PLT_RST-R#[14]
MCH_ICH_SYNC[14]
+3V
R130 10K/F_4
R151 *10K/F_4
T127
T10
T24
T13
T11
T37
T9
R427 100/F_4
T32
T12
T122
T128
T112
T135
T132
T134
T55
T56
T57
T115
T113
T50
T54
T133
T53
T126
T117
T114
T125
MCH_RSVD_14
MCH_RSVD_15
MCH_CFG_3
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20
PM_EXTTS#0
PM_EXTTS#1
RST IN# MCH
TP_MCH_NC0
TP_MCH_NC1
TP_MCH_NC2
TP_MCH_NC3
TP_MCH_NC4
TP_MCH_NC5
TP_MCH_NC6
TP_MCH_NC7
TP_MCH_NC8
TP_MCH_NC9
TP_MCH_NC10
TP_MCH_NC11
TP_MCH_NC12
TP_MCH_NC13
TP_MCH_NC14
TP_MCH_NC15
TP_MCH_NC16
TP_MCH_NC17
TP_MCH_NC18
PM_EXTTS#0
PM_EXTTS#1
AG11
AF11
AH33
AH34
BA41
BA40
BA39
AY41
AW41
AW1
H32
T32
R32
F3
F7
H7
J19
K30
J29
A41
A35
A34
D28
D27
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
G28
F25
H26
G6
H28
H27
K28
D1
C41
C1
BA3
BA2
BA1
B41
B2
AY1
A40
A4
A39
A3
U28B
RSVD_0
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#
SDVO_CTRLCLK
SDVO_CTRLDATA
LT_RESET#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
CFGRSVD
PM
MISC
NC
Calistoga
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
DDR MUXINGCLKDMI
SM_VREF_0
SM_VREF_1
G_CLKIN#
G_CLKIN
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
CFG[17:3] Internal Pull-up
1.MCH_CFG_5 DMI Select : Low = DMI X2, High=DMIX4 (Default "1")
2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)
3.MCH_CFG_7 CPU Strap : Low=RSVD, High=Mobile CPU (Default "1")
4.MCH_CFG_9 PCI Exp Graphics Lane : Low =Reserved, High=Mobility (Default "1")
5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility
6.MCH_CFG_11: PSB 4x CLK ENABLE Low=Reserved, High=Calistoga
7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled,
High=Dynamic ODT Enabled. (Default "1")
A A
8.MCH_CFG_18 VCC Select : LOW=1.05V, High=1.5V (Default "0")
9.MCH_CFG_19 DMI Lane Reversal : 0=Normal operation
1=Reverse Lane (Default "0")
10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only
SDVO or PCIE x1 is operational (defaults) ,High=SDVO and
PCIE x1 are operation simultaneously via the PEG port.
5
4
AY35
AR1
AW7
AW40
AW35
AT1
AY7
AY40
AU20
AT20
BA29
AY29
AW13
AW12
AY21
AW21
M_OCDCOMP_0
AL20
M_OCDCOMP_1
AF10
BA13
BA12
AY20
AU21
M_RCOMP#
AV9
AT9
AK1
AK41
AF33
AG33
A27
A26
C40
D41
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
R197 80.6/F_4
M_RCOMP
R193 80.6/F_4
SMDDR_VREF_MCH
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
< 0.1" . 15mils/15mils space
use 1% R
GMCH Strap pin
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_16
MCH_CFG_18
CFG[18,19]
Internal
Pull-down
MCH_CFG_19
MCH_CFG_20
4
CLK_SDRAM0 [12]
CLK_SDRAM1 [12]
CLK_SDRAM3 [12]
CLK_SDRAM4 [12]
CLK_SDRAM0# [12]
CLK_SDRAM1# [12]
CLK_SDRAM3# [12]
CLK_SDRAM4# [12]
CKE0 [11,12]
CKE1 [11,12]
CKE2 [11,12]
CKE3 [11,12]
SM_CS0# [11,12]
SM_CS1# [11,12]
SM_CS2# [11,12]
SM_CS3# [11,12]
R184 *40.2/F_4
R174 *40.2/F_4
M_ODT0 [11,12]
M_ODT1 [11,12]
M_ODT2 [11,12]
M_ODT3 [11,12]
R195 0_6
CLK_PCIE_3GPLL# [4]
CLK_PCIE_3GPLL [4]
DREFCLK# [4]
DREFCLK [4]
DREFSSCLK# [4]
DREFSSCLK [4]
DMI_TXN0 [14]
DMI_TXN1 [14]
DMI_TXN2 [14]
DMI_TXN3 [14]
DMI_TXP0 [14]
DMI_TXP1 [14]
DMI_TXP2 [14]
DMI_TXP3 [14]
DMI_RXN0 [14]
DMI_RXN1 [14]
DMI_RXN2 [14]
DMI_RXN3 [14]
DMI_RXP0 [14]
DMI_RXP1 [14]
DMI_RXP2 [14]
DMI_RXP3 [14]
R121 *2.2K_4
R127 *2.2K_4
R126 *2.2K_4
R141 *2.2K_4
R138 *2.2K_4
R120 *2.2K_4
R145 *2.2K_4
R154 *2.2K_4
R142 *2.2K_4
R146 *1K/F_4
R149 *1K/F_4
R150 *1K/F_4
Layout as short as passable
NC from WW45
15mils/15mils
15mils/10mils
+1.8VSUS
+0.9VSUS
TXLCLKOUT-[19,22]
TXLCLKOUT+[19,22]
TXLOUT0-[19,22]
TXLOUT0+[19,22]
TXLOUT1-[19,22]
TXLOUT1+[19,22]
TXLOUT2-[19,22]
TXLOUT2+[19,22]
+3V
+3V
+3V
LCD_POWER_ON[19,22]
UMA@0_4P2R_S
UMA@0_4P2R_S
UMA@0_4P2R_S
UMA@0_4P2R_S
3
+3V
BLON[19,22]
EDIDCLK[17,22]
EDIDDATA[17,22]
RP3
4
2
RP5
4
2
RP6
4
2
RP9
4
2
VGA_BLU[17,22]
VGA_GRN[17,22]
VGA_RED[17,22]
DDCCLK[17,22]
DDCDAT[17,22]
HSYNC[17,20,22]
VSYNC[17,20,22]
R398 UMA@150_4
R401 UMA@150_4
R400 UMA@150_4
3
R147 10K/F_4
R148 10K/F_4
R139 1.5K/F_4
R143 UMA@0_4
R48 UMA@0_4
R46 UMA@0_4
R68 UMA@0_4
TXLCLKOUT-_NB
3
TXLCLKOUT+_NB
1
TXLOUT0-_NB
3
TXLOUT0+_NB
1
TXLOUT1-_NB
3
TXLOUT1+_NB
1
TXLOUT2-_NB
3
TXLOUT2+_NB
1
R113 UMA@0_4
R110 UMA@0_4
R106 UMA@0_4
R90 UMA@0_4
R88 UMA@0_4
R100 UMA@0_4
R152 255/F_6
R97 UMA@0_4
L_CLKCTLA
L_CLKCTLB
L_IBG
T28
T26
+1.5V
R399 0_4
VGA_BLU_NB
VGA_GRN_NB
VGA_RED_NB
2
Note : If Use Internal VGA Please NC "UMA@xxx" Parts
BLON_NB
EDIDCLK_NB
EDIDDATA_NB
DISP_ON
TXLCLKOUT-_NB
TXLCLKOUT+_NB
T20
T15
T34
T119
T23
T27
T118
T31
VGA_BLU_NB
VGA_GRN_NB
VGA_RED_NB
DDCCLK_NB
DDCDAT_NB
HSYNC_NB
CRTIREF
VSYNC_NB
L_CLKCTLA
L_CLKCTLB
L_IBG
L_VBG
L_VREFH
L_VREFL
TXUCLKOUTÂTXUCLKOUT+
TXLOUT0-_NB
TXLOUT1-_NB
TXLOUT2-_NB
TXLOUT0+_NB
TXLOUT1+_NB
TXLOUT2+_NB
TXUOUT0ÂTXUOUT1ÂTXUOUT2-
TXUOUT0+
TXUOUT1+
TXUOUT2+
GMCHEXP_TXP0
GMCHEXP_TXP1
GMCHEXP_TXP2
GMCHEXP_TXP3
GMCHEXP_TXP4
GMCHEXP_TXP5
GMCHEXP_TXP6
GMCHEXP_TXP7
GMCHEXP_TXP8
GMCHEXP_TXP9
GMCHEXP_TXP10
GMCHEXP_TXP11
GMCHEXP_TXP12
GMCHEXP_TXP13
GMCHEXP_TXP14
GMCHEXP_TXP15
D32
J30
H30
H29
G26
G25
B38
C35
F32
C33
C32
A33
A32
E27
E26
C37
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
J20
B16
B18
B19
E23
D23
C22
B22
A21
B21
C26
C25
G23
J22
H23
+V1.5_PCIE
+3V
+0.9VSUS
+1.8VSUS
U28C
Calistoga
L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LB_CLK#
LB_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
2
+V1.5_PCIE [9]
+3V [2,4,9,12,13,14,15,16,17,19,20,22,23,24,25,26,27,28,29,30,31,32,33,34,36]
+0.9VSUS [12,34]
+1.8VSUS [8,12,33,34]
20mils/20mils space
EXP_A_COMPX
D40
D38
GMCHEXP_RXN0
F34
GMCHEXP_RXN1
G38
GMCHEXP_RXN2
H34
GMCHEXP_RXN3
J38
GMCHEXP_RXN4
L34
GMCHEXP_RXN5
M38
GMCHEXP_RXN6
N34
GMCHEXP_RXN7
P38
GMCHEXP_RXN8
R34
GMCHEXP_RXN9
T38
GMCHEXP_RXN10
V34
GMCHEXP_RXN11
W38
GMCHEXP_RXN12
Y34
GMCHEXP_RXN13
AA38
GMCHEXP_RXN14
AB34
GMCHEXP_RXN15
AC38
GMCHEXP_RXP0
D34
GMCHEXP_RXP1
F38
GMCHEXP_RXP2
G34
GMCHEXP_RXP3
H38
GMCHEXP_RXP4
J34
GMCHEXP_RXP5
L38
GMCHEXP_RXP6
M34
GMCHEXP_RXP7
N38
GMCHEXP_RXP8
P34
GMCHEXP_RXP9
R38
GMCHEXP_RXP10
T34
GMCHEXP_RXP11
V38
GMCHEXP_RXP12
W34
GMCHEXP_RXP13
Y38
GMCHEXP_RXP14
AA34
GMCHEXP_RXP15
AB38
CGMCHEXP_TXN0
F36
CGMCHEXP_TXN1
G40
CGMCHEXP_TXN2
H36
CGMCHEXP_TXN3
J40
CGMCHEXP_TXN4
L36
CGMCHEXP_TXN5
M40
CGMCHEXP_TXN6
N36
CGMCHEXP_TXN7
P40
CGMCHEXP_TXN8
R36
CGMCHEXP_TXN9
T40
CGMCHEXP_TXN10
V36
CGMCHEXP_TXN11
W40
CGMCHEXP_TXN12
Y36
CGMCHEXP_TXN13
AA40
CGMCHEXP_TXN14
AB36
CGMCHEXP_TXN15
AC40
CGMCHEXP_TXP0
D36
CGMCHEXP_TXP1
F40
CGMCHEXP_TXP2
G36
CGMCHEXP_TXP3
H40
CGMCHEXP_TXP4
J36
CGMCHEXP_TXP5
L40
CGMCHEXP_TXP6
M36
CGMCHEXP_TXP7
N40
CGMCHEXP_TXP8
P36
CGMCHEXP_TXP9
R40
CGMCHEXP_TXP10
T36
CGMCHEXP_TXP11
V40
CGMCHEXP_TXP12
W36
CGMCHEXP_TXP13
Y40
CGMCHEXP_TXP14
AA36
CGMCHEXP_TXP15
AB40
GMCHEXP_TXN[0..15] [17]
Size Document Number Rev
GMCH DMI/VEDIO(3 OF 6 )
Date: Sheet
LVDS
TV
VGA
GMCHEXP_TXP[0..15] [17]
GMCHEXP_TXN0
GMCHEXP_TXN1
GMCHEXP_TXN2
GMCHEXP_TXN3
GMCHEXP_TXN4
GMCHEXP_TXN5
GMCHEXP_TXN6
GMCHEXP_TXN7
GMCHEXP_TXN8
GMCHEXP_TXN9
GMCHEXP_TXN10
GMCHEXP_TXN11
GMCHEXP_TXN12
GMCHEXP_TXN13
GMCHEXP_TXN14
GMCHEXP_TXN15
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
PCI-EXPRESS GRAPHICS
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
1
CLG
+V1.5_PCIE
R137 24.9/F_4
GMCHEXP_RXN[0..15] [17]
GMCHEXP_RXP[0..15] [17]
UMA@.1U_4C155
UMA@.1U_4C587
UMA@.1U_4C159
UMA@.1U_4C593
UMA@.1U_4C163
UMA@.1U_4C597
UMA@.1U_4C170
UMA@.1U_4C599
UMA@.1U_4C184
UMA@.1U_4C603
UMA@.1U_4C190
UMA@.1U_4C606
UMA@.1U_4C198
UMA@.1U_4C614
UMA@.1U_4C210
UMA@.1U_4C619
UMA@.1U_4C150
UMA@.1U_4C586
UMA@.1U_4C156
UMA@.1U_4C588
UMA@.1U_4C161
UMA@.1U_4C596
UMA@.1U_4C168
UMA@.1U_4C598
UMA@.1U_4C178
UMA@.1U_4C602
UMA@.1U_4C188
UMA@.1U_4C604
UMA@.1U_4C195
UMA@.1U_4C607
UMA@.1U_4C201
UMA@.1U_4C617
0.1u Capacitors place at
first 1/3 of trace
PROJECT : ZB2
Quanta Computer Inc.
1
GMCHEXP_TXN0
GMCHEXP_TXN1
GMCHEXP_TXN2
GMCHEXP_TXN3
GMCHEXP_TXN4
GMCHEXP_TXN5
GMCHEXP_TXN6
GMCHEXP_TXN7
GMCHEXP_TXN8
GMCHEXP_TXN9
GMCHEXP_TXN10
GMCHEXP_TXN11
GMCHEXP_TXN12
GMCHEXP_TXN13
GMCHEXP_TXN14
GMCHEXP_TXN15
GMCHEXP_TXP0
GMCHEXP_TXP1
GMCHEXP_TXP2
GMCHEXP_TXP3
GMCHEXP_TXP4
GMCHEXP_TXP5
GMCHEXP_TXP6
GMCHEXP_TXP7
GMCHEXP_TXP8
GMCHEXP_TXP9
GMCHEXP_TXP10
GMCHEXP_TXP11
GMCHEXP_TXP12
GMCHEXP_TXP13
GMCHEXP_TXP14
GMCHEXP_TXP15
737Thursday, February 09, 2006
of
1A
5
+1.05V +1.05V
+
220U/2.5V_3528
6/22 330U 7343 chagne to 220U 3528
package
D D
C C
B B
A A
C151
5
AA33
W33
N33
AA32
W32
N32
M32
AA31
W31
R31
N31
M31
AA30
W30
U30
R30
N30
M30
AA29
W29
U29
R29
M29
AB28
AA28
U28
R28
N28
M28
N27
M27
N26
N25
M25
N24
M24
AB23
AA23
N23
M23
AC22
AB22
W22
N22
M22
AC21
AA21
W21
N21
M21
AC20
AB20
W20
N20
M20
AB19
AA19
N19
M19
N18
M18
N17
M17
N16
M16
U28G
VCC_0
VCC_1
P33
VCC_2
VCC_3
L33
VCC_4
J33
VCC_5
VCC_6
Y32
VCC_7
VCC_8
V32
VCC_9
P32
VCC_10
VCC_11
VCC_12
L32
VCC_13
J32
VCC_14
VCC_15
VCC_16
V31
VCC_17
T31
VCC_18
VCC_19
P31
VCC_20
VCC_21
VCC_22
VCC_23
Y30
VCC_24
VCC_25
V30
VCC_26
VCC_27
T30
VCC_28
VCC_29
P30
VCC_30
VCC_31
VCC_32
L30
VCC_33
VCC_34
Y29
VCC_35
VCC_36
V29
VCC_37
VCC_38
VCC_39
P29
VCC_40
VCC_41
L29
VCC_42
VCC_43
VCC_44
Y28
VCC_45
V28
VCC_46
VCC_47
T28
VCC_48
VCC_49
P28
VCC_50
VCC_51
VCC_52
L28
VCC_53
P27
VCC_54
VCC_55
VCC_56
L27
VCC_57
P26
VCC_58
VCC_59
L26
VCC_60
VCC_61
VCC_62
L25
VCC_63
P24
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
Y23
VCC_69
P23
VCC_70
VCC_71
VCC_72
L23
VCC_73
VCC_74
VCC_75
Y22
VCC_76
VCC_77
P22
VCC_78
VCC_79
VCC_80
L22
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
L21
VCC_87
VCC_88
VCC_89
Y20
VCC_90
VCC_91
P20
VCC_92
VCC_93
VCC_94
L20
VCC_95
VCC_96
VCC_97
Y19
VCC_98
VCC_99
VCC_100
L19
VCC_101
VCC_102
VCC_103
L18
VCC_104
P17
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
L16
VCC_110
VCC
Calistoga
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
4
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
25mils
4
25mils
VCC_SM1
VCC_SM2
VCC_SM106
VCC_SM107
C250 .47U/10V_6
C239 .47U/10V_6
+
C229
C259
10U/X5R-6.3V_8
150U/4V_3528
6/22 330U 7343 chagne to 150U 3528
package
C248
.47U/10V_6
C257
.47U/10V_6
C227
10U/X5R-6.3V_8
C256
.47U/10V_6
25mils
C249 .47U/10V_6
C224 .47U/10V_6
3
+
C145
C205
10U/X5R-6.3V_8
220U/2.5V_3528
+1.8VSUS
C226
.47U/10V_6
10U/X5R-6.3V_8
6/22 330U 7343 chagne to 220U 3528
package
120mils
C254
.1U/10V_4
+1.5V_AUX[9]
+1.05V[2,3,4,5,9,13,16,33,34]
+1.8VSUS[7,12,33,34]
3
C206
C253
.1U/10V_4
C172
1U/16V_6
C255
.1U/10V_4
+1.5V_AUX
C174
.1U/10V_4
+1.05V
+1.8VSUS
C171
.1U/10V_4
C176
.1U/10V_4
2
U28F
AD27
VCC_NCTF0
AC27
AB27
AA27
W27
AD26
AC26
AB26
AA26
W26
AD25
AC25
AB25
AA25
W25
AD24
AC24
AB24
AA24
W24
AD23
AD22
AD21
AD20
AD19
AD18
AC18
AB18
AA18
W18
Y27
V27
U27
T27
R27
Y26
V26
U26
T26
R26
Y25
V25
U25
T25
R25
Y24
V24
U24
T24
R24
V23
U23
T23
R23
V22
U22
T22
R22
V21
U21
T21
R21
V20
U20
T20
R20
V19
U19
T19
Y18
V18
U18
T18
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
NCTF
Calistoga
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
1
CLG
+1.5V_AUX
100mils
PROJECT : ZB2
Quanta Computer Inc.
Size Document Number Rev
GMCH PW & STRAP(4 OF 6)
2
Date: Sheet
837Thursday, February 09, 2006
1
1A
of
5
+1.5V +V1.5_DPLLA
L50
10uH_8
+
C574
C567
330U-2.5V_7343
L51
D D
C C
+V1.5_PCIE
B B
A A
10uH_8
330U-2.5V_7343
L25
BK1608LL121_6
10U/X5R-6.3V_8
L23
BK1608LL121_6
10U/X5R-6.3V_8
L20 BK1608LL121_6
C582
10U/X5R-6.3V_8
10U/X5R-6.3V_8
+1.5V_AUX +1.5V
C221
.1U/10V_4
+1.05V
+1.5V
+V1.5_PCIE
+2.5V
+3V
.1U/10V_4
+V1.5_DPLLB
+
C568
C576
.1U/10V_4
+V1.5_HPLL
C222
C219
.1U/10V_4
+V1.5_MPLL
C212
C215
.1U/10V_4
R144
10_4
25mils
REV_3A/02-05 Modify
+
5
C571
220U/2.5V_3528
L56
1uH_6
C579
60mils
R434 0_8
+1.05V [2,3,4,5,8,13,16,33,34]
+1.5V [3,7,14,16,24,28,33,34]
+V1.5_PCIE [7]
+2.5V [17,19,33,36]
+3V [2,4,7,12,13,14,15,16,17,19,20,22,23,24,25,26,27,28,29,30,31,32,33,34,36]
D1
PDZ5.6B
60mils
L53
0_8
6/22 chagne to 3528 package
60mils
+1.05V+2.5V
21
+V2.5_CRTDAC
+1.5V
+1.5V+V1.5_3GPLL
4
+3V +1.5V
C566
10U/X5R-6.3V_8
4
C122
.1U/10V_4
+V1.5_3GPLL
C631
.1U/10V_4
+V2.5_CRTDAC
C157
.1U/10V_4
+2.5V
C152
.01U/16V_4
C223
.1U/10V_4
C628
10U/X5R-6.3V_8
C154
.022U/16V_4
C158
.1U/10V_4
+1.5V
L52
BK1608LL121_6
C241
10U/X5R-6.3V_8
+2.5V
+V1.5_HPLL
+V1.5_MPLL
40mils
+1.5V_AUX
+2.5V
+1.5V
+3V
C146
.1U/10V_4
+V1.5_PCIE
C147
.1U/10V_4
+V1.5_DPLLB
TV_POWER
3
+2.5V
C140
10U/X5R-6.3V_8
+V1.5_DPLLA
TV_POWER
TV_POWER
3
AJ41
AB41
AC33
AH1
AH2
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
AH15
AH14
AG14
AF14
AE14
AF13
AE13
AF12
AE12
AD12
H22
C30
B30
A30
Y41
V41
R41
N41
L41
G41
H41
F21
E21
G21
B26
C39
AF1
A38
B39
AF2
H20
G20
E19
F19
C20
D20
E20
F20
A28
B28
C28
D21
A23
B23
B25
H19
P19
P16
P15
Y14
U28H
VCCSYNC
VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS
VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCD_TVDAC
VCC_HV0
VCC_HV1
VCC_HV2
VCCD_QTVDAC
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
POWER
Calistoga
2
+1.05V
1
CLG
C173
.1U/10V_4
.47U/10V_6
+2.5V
C160
4.7U-10V_8
1
+1.05V
C177
C202
.47U/10V_6
C141
937Thursday, February 09, 2006
C204
10U/X5R-6.3V_8
+1.05V
C207
3A
AC14
VTT_0
AB14
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
+
220U/2.5V_3528
6/22 330U 7343 chagne to 220U 3528
package
C218
4.7U-10V_8
.22U-6.3V_4
C203
2.2U/6.3V_6
C175
.22U-6.3V_4
C208
.1U/10V_4
PROJECT : ZB2
Quanta Computer Inc.
Size Document Number Rev
GMCH POWER (5 OF 6)
2
Date: Sheet of
5
4
3
2
1
U28I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
D D
C C
B B
A A
5
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
R39
P39
N39
M39
H39
G39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
R37
P37
N37
M37
H37
G37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
R35
P35
N35
M35
H35
G35
D35
AN34
T39
L39
J39
F39
T37
L37
J37
F37
T35
L35
J35
F35
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
Calistoga
VSS
4
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
3
AT23
AN23
AM23
AH23
AC23
W23
K23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
F16
C16
AN15
AM15
AK15
N15
M15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
U28J
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
J23
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
J21
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
J16
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
L15
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS
Calistoga
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
PROJECT : ZB2
CLG
Quanta Computer Inc.
Size Document Number Rev
GMCH GND(6 OF 6)
2
Date: Sheet
10 37Thursday, February 09, 2006
1
of
1A
1
2
3
4
5
6
7
8
DDR
A A
+0.9V
+
C383
*470U/10V_7343
C379
.1U/10V_4
C356
.1U/10V_4
C342
.1U/10V_4
C380
.1U/10V_4
C318
.1U/10V_4
C344
.1U/10V_4
C343
.1U/10V_4
C377
.1U/10V_4
C316
.1U/10V_4
C376
.1U/10V_4
C360
.1U/10V_4
C339
.1U/10V_4
C340
.1U/10V_4
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V
+0.9V
C358
R_A_MA[0..13] [6,12]
R_B_MA[0..13] [6,12]
B B
C C
R_B_BS1#[6,12]
R_A_BS2#[6,12]
R_B_SRASA#[6,12]
SM_CS3#[7,12]
R_A_BMWEA#[6,12]
SM_CS1#[7,12]
R_A_SCASA#[6,12]
M_ODT2[7,12]
R_B_BS1#
R_B_MA0
R_A_BS2#
CKE0
CKE0[7,12]
R_A_MA4
R_A_MA2
R_B_SRASA#
SM_CS3#
R_A_BMWEA#
SM_CS1#
R_A_MA10
R_A_SCASA#
M_ODT2
R_B_MA13
CKE1
CKE1[7,12]
R_A_MA11
R_B_MA11
R_B_MA6
R_B_MA3
R_B_MA4
R_B_MA2
R_B_MA9
R_B_MA8
2
RP48 56_4P2R_S
RP29 56_4P2R_S
RP33 56_4P2R_S
RP49 56_4P2R_S
RP26 56_4P2R_S
RP25 56_4P2R_S
RP50 56_4P2R_S
RP31 56_4P2R_S
RP46 56_4P2R_S
RP41 56_4P2R_S
RP47 56_4P2R_S
RP39 56_4P2R_S
1
4
3
4
3
2
1
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
C359
.1U/10V_4
C317
.1U/10V_4
.1U/10V_4
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V
+0.9V
+0.9V
+0.9V
C382
.1U/10V_4
C357
.1U/10V_4
C361
.1U/10V_4
C378
.1U/10V_4
C381
.1U/10V_4
R_B_SCASA#[6,12]
R_B_BMWEA#[6,12]
R_B_BS2#[6,12]
R_A_BS0#[6,12]
R_B_BS0#[6,12]
C313
.1U/10V_4
SM_CS2#[7,12]
M_ODT3[7,12]
CKE3[7,12]
CKE2[7,12]
M_ODT1[7,12]
C315
.1U/10V_4
R_A_MA9
R_A_MA12
SM_CS2#
M_ODT3
R_B_SCASA#
R_B_BMWEA#
R_B_MA7
CKE3
CKE2
R_B_BS2#
R_A_MA1
R_A_MA3
R_A_MA6
R_A_MA8
M_ODT1
R_A_BS0#
R_B_MA5
R_B_MA12R_B_MA1
R_B_BS0#
R_B_MA10
C345
.1U/10V_4
C341
C314
.1U/10V_4
.1U/10V_4
2
RP23 56_4P2R_S
4
2
RP43 56_4P2R_S
4
2
RP44 56_4P2R_S
4
4
RP45 56_4P2R_S
2
4
RP38 56_4P2R_S
2
2
RP24 56_4P2R_S
4
2
RP32 56_4P2R_S
4
2
RP27 56_4P2R_S
4
2
RP40 56_4P2R_S
4
2
RP42 56_4P2R_S
4
1
3
1
3
1
3
3
1
3
1
1
3
1
3
1
3
1
3
1
3
+0.9V
+0.9V
+0.9V
R_A_MA5
R_A_MA7
R_A_MA13
M_ODT0[7,12]
SM_CS0#[7,12]
R_A_SRASA#[6,12]
R_A_BS1#[6,12]
D D
1
2
M_ODT0
SM_CS0#
R_A_SRASA#
R_A_BS1#
R_A_MA0
2
RP28 56_4P2R_S
RP36 56_4P2R_S
RP35 56_4P2R_S
RP34 56_4P2R_S
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
3
+0.9V
Size Document Number Rev
DDR2 TERMINATION
4
5
6
Date: Sheet
7
PROJECT : ZB2
Quanta Computer Inc.
11 37Thursday, February 09, 2006
of
8
1A
1
VREF_DIMM2
R247
*0_6
R248
+0.9VSUS
A A
B B
C C
D D
VREF_DIMM1
0_6
R_A_MD5
R_A_DQS#0
R_A_DQS0
R_A_MD2
R_A_MD3
R_A_MD12
R_A_MD8
R_A_DQS#1
R_A_DQS1
R_A_MD9
R_A_MD15
R_A_MD21
R_A_MD17
R_A_DQS#2
R_A_DQS2
R_A_MD23
R_A_MD19
R_A_MD24
R_A_MD25
R_A_DM3
R_A_MD26
R_A_MD27
CKE0
+3V
R_A_BS2#
R_A_MA12
R_A_MA9
R_A_MA8
R_A_MA5
R_A_MA3
R_A_MA1
R_A_MA10
R_A_BS0#
R_A_BMWEA#
R_A_SCASA#
SM_CS1#
M_ODT1
R_A_MD32
R_A_MD36
R_A_DQS#4
R_A_DQS4
R_A_MD38
R_A_MD39
R_A_MD40
R_A_MD41
R_A_DM5
R_A_MD42
R_A_MD46
R_A_MD49
R_A_DQS#6
R_A_DQS6
R_A_MD51
R_A_MD56
R_A_MD60
R_A_DM7
R_A_MD62
R_A_MD58
SMBDT
SMBCK
R_A_BS2#[6,11]
R_A_BS0#[6,11]
R_A_BMWEA#[6,11]
R_A_SCASA#[6,11]
SM_CS1#[7,11]
M_ODT1[7,11]
SMbus address A0
1
+1.8VSUS
2
VREF_DIMM1
CN25
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
DDR2_SODIMM
CLOCK 0,1,2
CKE 0,1
2
+1.8VSUS
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
PC4800 DDR2
SDRAM SO-DIMM
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
R_A_MD4
4
6
8
10
12
R_A_MD7
14
16
18
R_A_MD13
20
R_A_MD14
22
24
26
28
CLK_SDRAM0
30
CLK_SDRAM0#
32
34
36
38
40
42
R_A_MD20
44
R_A_MD16
46
48
PM_EXTTS#0
50
52
54
56
58
60
R_A_MD29
62
R_A_MD28
64
66
68
70
72
R_A_MD30
74
76
78
80
82
(200P)
84
86
88
90
92
94
96
98
100
102
104
R_A_BS1#
106
R_A_SRASA#
108
110
112
114
116
118
120
122
124
R_A_MD35
126
128
130
132
R_A_MD33
134
R_A_MD34
136
138
140
142
144
146
148
150
R_A_MD43
152
154
156
158
160
162
164
166
168
170
172
174
176
178
R_A_MD61
180
182
184
186
188
190
192
R_A_MD63
194
196
198
200
3
R_A_MD0R_A_MD1
R_A_DM0
R_A_MD6
R_A_DM1
R_A_MD10
R_A_MD11
R_A_DM2
R_A_MD18
R_A_MD22
R_A_DQS#3
R_A_DQS3
R_A_MD31
CKE1
R_A_MA11
R_A_MA7
R_A_MA6
R_A_MA4
R_A_MA2
R_A_MA0
SM_CS0#
M_ODT0
R_A_MA13
R_A_MD37
R_A_DM4
R_A_MD44
R_A_MD45
R_A_DQS#5
R_A_DQS5
R_A_MD47
R_A_MD52R_A_MD48
R_A_MD53
CLK_SDRAM1
CLK_SDRAM1#
R_A_DM6
R_A_MD54R_A_MD50
R_A_MD55
R_A_MD57
R_A_DQS#7
R_A_DQS7
R_A_MD59
R262
10K_4
3
CLK_SDRAM0 [7]
CLK_SDRAM0# [7]
PM_EXTTS#0 [7]
CKE1 [7,11]CKE0[7,11]
R_A_BS1# [6,11]
R_A_SRASA# [6,11]
SM_CS0# [7,11]
M_ODT0 [7,11]
R261
10K_4
R_A_DM[0..7] [6]
R_A_MD[0..63] [6]
R_A_DQS[0..7] [6]
R_A_DQS#[0..7] [6]
R_A_MA[0..13] [6,11]
+0.9VSUS
CLK_SDRAM1 [7]
CLK_SDRAM1# [7]
R272
0_6
R_B_BMWEA#[6,11]
R_B_SCASA#[6,11]
SMBDT[4]
SMBCK[4]
4
+1.8VSUS
R_B_BS2#[6,11]
SM_CS3#[7,11]
M_ODT3[7,11]
4
R271
*10K_6
VREF_DIMM2
R273
*10K_6
R_B_MD5
R_B_DQS#0
R_B_DQS0
R_B_MD3
R_B_MD9
R_B_MD8
R_B_DQS#1
R_B_DQS1
R_B_MD11
R_B_MD17
R_B_DQS#2
R_B_DQS2
R_B_MD23
R_B_MD29
R_B_MD28
R_B_DM3
R_B_MD30
+3V
CKE2
R_B_BS2#
R_B_MA12
R_B_MA9
R_B_MA8
R_B_MA5
R_B_MA3
R_B_MA1
R_B_MA10
R_B_BS0#
R_B_BMWEA#
R_B_SCASA#
SM_CS3#
M_ODT3
R_B_MD37
R_B_MD33
R_B_DQS#4
R_B_DQS4
R_B_MD35
R_B_MD41
R_B_MD40
R_B_MD43
R_B_MD49
R_B_DQS#6
R_B_DQS6
R_B_MD54
R_B_MD60
R_B_MD57
R_B_DM7
SMBDT
SMBCK
CKE2[7,11]
SMbus address A1
R_B_MD0
R_B_MD7
R_B_MD10
R_B_MD20
R_B_MD19
R_B_MD31
R_B_MD39
R_B_MD46
R_B_MD53
R_B_MD51
R_B_MD58
R_B_MD59
5
VREF_DIMM2
CN26
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
2-1734073-2
CLOCK 3,4,5
CKE 2,3
5
+1.8VSUS+1.8VSUS
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
PC4800 DDR2
SDRAM SO-DIMM
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
R_B_MD4
4
R_B_MD1
6
8
R_B_DM0
10
12
R_B_MD2
14
R_B_MD6
16
18
R_B_MD12
20
R_B_MD13
22
24
R_B_DM1
26
28
CLK_SDRAM4
30
CLK_SDRAM4#
32
34
R_B_MD14
36
R_B_MD15
38
40
42
R_B_MD16
44
R_B_MD21
46
48
PM_EXTTS#1
50
R_B_DM2
52
54
R_B_MD18
56
R_B_MD22
58
60
R_B_MD24
62
R_B_MD25
64
66
R_B_DQS#3
68
R_B_DQS3
70
72
R_B_MD26
74
R_B_MD27
76
78
CKE3
80
82
84
86
88
R_B_MA11
90
(200P)
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
R_B_MA7
R_B_MA6
R_B_MA4
R_B_MA2
R_B_MA0
R_B_BS1#
R_B_SRASA#
SM_CS2#
M_ODT2
R_B_MA13
R_B_MD32
R_B_MD36
R_B_DM4
R_B_MD34
R_B_MD38
R_B_MD44
R_B_MD45
R_B_DQS#5
R_B_DQS5R_B_DM5
R_B_MD47
R_B_MD42
R_B_MD52
R_B_MD48
CLK_SDRAM3
CLK_SDRAM3#
R_B_DM6
R_B_MD55
R_B_MD50
R_B_MD56
R_B_MD61
R_B_DQS#7
R_B_DQS7
R_B_MD62
R_B_MD63
+3V
R274
10K_4
6
PM_EXTTS#1 [7]
CKE3 [7,11]
R_B_BS1# [6,11]
R_B_SRASA# [6,11]R_B_BS0#[6,11]
SM_CS2# [7,11]
CLK_SDRAM3 [7]
CLK_SDRAM3# [7]
R276
10K_4
6
CLK_SDRAM4 [7]
CLK_SDRAM4# [7]
M_ODT2 [7,11]
R_B_DM[0..7] [6]
R_B_MD[0..63] [6]
R_B_DQS[0..7] [6]
R_B_DQS#[0..7] [6]
R_B_MA[0..13] [6,11]
+1.8VSUS
C655
2.2U/6.3V_6
+1.8VSUS
C301
.1U/10V_4
+1.8VSUS
C656
2.2U/6.3V_6
+1.8VSUS
C653
.1U/10V_4
+0.9VSUS
C346
.1U/10V_4
2.2U/6.3V_6
7
8
DDR
C297
C298
2.2U/6.3V_6
2.2U/6.3V_6
C660
.1U/10V_4
C659
2.2U/6.3V_6
C661
.1U/10V_4
C350
<OrgName>
<OrgAddr1>
<OrgAddr2>
<OrgAddr3>
<OrgAddr4>
Size Document Number Rev
DDR2 SO-DIMM ( 200P )
Date: Sheet
7
C302
.1U/10V_4
C658
2.2U/6.3V_6
C305
.1U/10V_4
2.2U/6.3V_6
C654
.1U/10V_4
2.2U/6.3V_6
C306
.1U/10V_4
+0.9VSUS
C300
C299
2.2U/6.3V_6
+3V
C312
2.2U/6.3V_6
+3V
C355
2.2U/6.3V_6
2.2U/6.3V_6
C363
.1U/10V_4
C657
C330
.1U/10V_4
C320
2.2U/6.3V_6
C310
C329
.1U/10V_4
PROJECT : ZB2
Quanta Computer Inc.
12 37Thursday, February 09, 2006
of
8
1A
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