Acer ASPIRE 5553 Schematics

1

2

3

4

5

6

7

8

SGN@---->Internal CLK GEN.

3&%67$&.83

/$<(5723 /$<(5*1' /$<(5,1

A A

/$<(5,1 /$<(59&& /$<(5,1 /$<(5*1'

GN@ ---->External CLK GEN. IV@ -----> iGPU SW@ -----> dGPU SP@ -----> iGPU & dGPU notice SPE@ ----->Only for dGPU notice SIDE@ ----> Side port

DDR3-SODIMM1

P5

DDR3-SODIMM2

P6

/$<(5%27

/$1

$WKHURV 3&,(/$1

B B

$5

(10/100/1000)

P26

5-

P26

Charger (ISL88731A)

P35

DC/DC ( 3VPCU / 5VPCU ) RT8206B

C C

CPU_VCORE ( VCORE ) ISL6265A

DC/DC ( +1.1V_S5 ) UP6111AQD

P36

P37

P38

6$7$+''

P28

6$7$2''

P28

DC/DC ( NB_CORE ) UP6111AQD

P39

DC/DC ( +1.5VSUS ) RT8207A

DC/DC ( GPU_CORE ) MAX8792ETD+T

D D

DC/DC (+1.8V/+1V/+2.5V ) HPA00835RTER / RT9018A / RT9025-25PSP

DC/DC ( CPU_VDDR ) RT9025-25PSP

1

P40

P41

P43

P42

.H\ERDUG 7RXFK3DG

2

3

http://hobi-elektronika.net

ZR8 SYSTEM DIAGRAM

DDR3 channel A

AMD Champlain

DDR3 channel B

PCI-E

638P (PGA)45W/35W

NORTH BRIDGE

0LQL3&,( &DUG

:LUHOHVV/$1

P27

6$7$0%

6$7$0%

:LQERQG.%&

P33 P31 P33 P34

)$1 63,

RS880 A12

PP;PPSLQ%*$

ALINK X4

SOUTH BRIDGE

PP;PPSLQ%*$

13&(/

P34

4

35mm X 35mm S1G4 Processor

P2 ~ 4

HT3

P7 ~ 10

SB820

P11 ~ 14

/3&

4.5W(Ext)

4.3W(Int)

$]DOLD

&RGHF 57/$/&;

P29

'LJLWDO0,& $8',2&211

5

CPU THERMAL SENSOR

&57 /9'6

86%

86%

86%3RUWV

;

3KRQH0,&

P4

CPU_CLK

NBGFX_CLK

NBGPP_CLK

SBLINK_CLK

3&,([SUHVV;

6,'(SRUW

P7

%7

P31

:HEFDP

P31 P24

6SHDNHU

P29P29P24

6

CLOCK GEN

)URP6%

P11

$7, 0DGLVRQ/3 ELW03NJ

29mm X 29mm

P16 ~ 20

0+]''5

95$0

0;;ELW

0;;ELW

P22,23

&DUG5HDGHU $8$8

P30

7

ZDW

+'0,

&57

08;V

/9'6

6*

P24

86%%2$5'

86%3RUWV[

P31

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Block Diagram

Wednesday, May 27, 2009

+'0,

P25

&57

P24

/9'6

P24

of

149

of

149

of

149

8

1A

5

L40

C447

4.7u/6.3V_6

+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT

CNTR_VREF [4]

CPU_LDT_RST#

L40 PBY201209T-221Y-N

PBY201209T-221Y-N

D1 D2 D3 D4

E3 E2 E1

F1 G3 G2 G1

H1

J1

K1

L3

L2

L1 M1

N3

N2

E5

F5

F3

F4 G5

H5

H3

H4

K3

K4

L5 M5 M3 M4

N5

P5

J3

J2

J5

K5

N1

P1

P3

P4

CNTR_VREF

+2.5V

+1.1V +1.1V_VLDT

1.1V@1.5A

R124 *SHORT_PADR124 *SHORT_PAD R121 *SHORT_PADR121 *SHORT_PAD

P/N: DG0^8000004 DG0^8000005

D D

C C

B B

DG0^8000009 DG0^80000013 DG0^80000014

HT_CADINP[15..0][7] HT_CADINN[15..0][7] HT_CLKINP[1..0][7] HT_CLKINN[1..0][7] HT_CTLINP[1..0][7] HT_CTLINN[1..0][7] HT_CADOUTP[15..0][7] HT_CADOUTN[15..0][7] HT_CLKOUTP[1..0][7] HT_CLKOUTN[1..0][7] HT_CTLOUTP[1..0][7] HT_CTLOUTN[1..0][7]

FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

R256 20K/F_4R 256 20K/F_4

+3V

CPU_LDT_REQ#_CPU

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

HT_CADINP[15..0] HT_CADINN[15..0]

HT_CLKINP[1..0]

HT_CLKINN[1..0]

HT_CTLINP[1..0]

HT_CTLINN[1..0] HT_CADOUTP[15..0] HT_CADOUTN[15..0]

HT_CLKOUTP[1..0]

HT_CLKOUTN[1..0]

HT_CTLOUTP[1..0]

HT_CTLOUTN[1..0]

Q35 *BSS138_NL/SOT23Q35 *BSS138_NL/SOT23

1

R462 *0_4R462 *0_4

C414 10U/6.3V_8C414 10U/6.3V_8 C265 10U/6.3V_8C265 10U/6.3V_8 C376 0.22u/6.3V_4C376 0.22u/6.3V_4 C274 180P/50V_4C274 180P/50V_4

C446 0.1u/10V_4C446 0.1u/10V_4

R251 34.8K/F_4R251 34.8K/F_4

2

3

2.5V@250mA

HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7 HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15

HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1

HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1

CPU_LDT_REQ# [9,11]

S1g4 does not support MEMHOT#

+1.5VSUS

+1.5VSUS +1.5VSUS

A A

+1.5VSUS +1.5VSUS

R101 *10K_4R101 *10K_4

R100 *1K_4R100 *1K_4

CPU_MEMHOT_L#

R417 *10K_4R417 *10K_4 R425 1K_4R425 1K_4

CPU_THERMTRIP_L#

R420 *10K_4R420 *10K_4

R424 300_4R424 300_4

A62

CPU_PROCHOT_L#

C01

S1G4

2

Q12

Q12 *MMBT3904

*MMBT3904

13

2

Q32

Q32 MMBT3904

MMBT3904

1 3

2

Q31

1 3

*MMBT3904

*MMBT3904 R138 0_4R138 0_4

5

CPU_MEMHOT# [5,6,11]

R155 *0_4R155 *0_4 R309 *Short_4R309 *Short_4

C01

CPU_THERMTRIP# [12] SYS_SHDN# [4,36,43,44]

PM_THERM# [4,12,33] CPU_PROCHOT# [11]

4

A41

U29A

HT LINK

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

SOCKET_638_PIN

12

G1

G1 *SHORT_PAD1

*SHORT_PAD1

for debug only

HWPG[34]

R8191 1K_4R8191 1K_4

D12

4

C436

4.7u/6.3V_6

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

2

1

+1.5VSUS

2

C01

+CPUVDDA

C428

0.22u/6.3V_4

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

+3V

3

Q23

Q23 BSS138_NL/SOT23

BSS138_NL/SOT23

3

Q8008

Q8008 FDV301N

FDV301N

1

R8189

R8189 100K_6

100K_6

3

W/S= 15 mil/20mil

http://hobi-elektronika.net

C432

C432 3300P/50V_4

3300P/50V_4

+1.1V_VLDT

AE2

+1.1V_VLDT

AE3

+1.1V_VLDT

AE4

+1.1V_VLDT

AE5

HT_CADOUTP0

AD1

HT_CADOUTN0

AC1

HT_CADOUTP1

AC2

HT_CADOUTN1

AC3

HT_CADOUTP2

AB1

HT_CADOUTN2

AA1

HT_CADOUTP3

AA2

HT_CADOUTN3

AA3

HT_CADOUTP4

W2

HT_CADOUTN4

W3

HT_CADOUTP5

V1

HT_CADOUTN5

U1

HT_CADOUTP6

U2

HT_CADOUTN6

U3

HT_CADOUTP7

T1

HT_CADOUTN7

R1

HT_CADOUTP8

AD4

HT_CADOUTN8

AD3

HT_CADOUTP9

AD5

HT_CADOUTN9

AC5

HT_CADOUTP10

AB4

HT_CADOUTN10

AB3

HT_CADOUTP11

AB5

HT_CADOUTN11

AA5

HT_CADOUTP12

Y5

HT_CADOUTN12

W5

HT_CADOUTP13

V4

HT_CADOUTN13

V3

HT_CADOUTP14

V5

HT_CADOUTN14

U5

HT_CADOUTP15

T4

HT_CADOUTN15

T3

HT_CLKOUTP0

Y1

HT_CLKOUTN0

W1

HT_CLKOUTP1

Y4

HT_CLKOUTN1

Y3

HT_CTLOUTP0

R2

HT_CTLOUTN0

R3

HT_CTLOUTP1

T5

HT_CTLOUTN1

R5

S1G4

R262

4.7K_4

CPU_LDT_RST_HTPA#

C440

C440 *10U/6.3V_8

*10U/6.3V_8

C39710U/6.3V_8 C39710U/6.3V_8 C2730.22u/6.3V_4 C2730.22u/6.3V_4 C387180P/50V_4 C387180P/50V_4

Serial VID

CLK_CPU_BCLKP_PR[11] CLK_CPU_BCLKN_PR[11]

Keep trace from resisor to CPU w ithin 0.6" keep trace from caps to CPU wi t hin 1.2"

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

R464 169/F_4R464 169/F_4

C704 3900P/25V_4C704 3900P/25V_4 C703 3900P/25V_4C703 3900P/25V_4

CPU_PWRGD_SVID_REG[11,37]

SideBand Temp sense I2C

S1G4

+1.1V_VLDT

CPU_VDD0_FB_H[37] CPU_VDD0_FB_L[37]

CPU_VDD1_FB_H[37] CPU_VDD1_FB_L[37]

+1.5VSUS

R422 1K/F_4R422 1K/F_4

+1.5VSUS

R430 *300/F_4R430 *300/F_4

+1.5VSUS[3,4,5,6,37,40,42,43,44,46]

+1.5V[7,10,27,29,40,43] +1.1V[7,8,9,10,14,38,44] +2.5V[42]

+1.5VSUS +1.5V

CPU_SVC CPU_SVD CPU_PWRGD_SVID_REG

+1.5VSUS +1.5V +1.1V +2.5V

R238 1K/F_4R238 1K/F_4 R235 *1K/F_4R235 *1K/F_4

R240 1K/F_4R240 1K/F_4 R237 *1K/F_4R237 *1K/F_4

R231 *220_4R231 *220_4 R232 *220_4R232 *220_4 R244 *220_4R244 *220_4

HDT Connector

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

KEY

CN7

+1.5VSUS

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

C398 *0.1u/10V_4C398 *0.1u/10V_4

3

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

CPU_LDT_RST#[11]

CPU_LDT_STOP#[9,11]

CPU_SIC[4] CPU_SID[4]

CPU_ALERT[4]

R207 44.2/F_4R207 44.2/F_4 R208 44.2/F_4R208 44.2/F_4

R245 510/F_4R245 510/F_4 R241 510/F_4R241 510/F_4

25

*HDT_CONN

2

SB check list tide to CPUVDDIO (+1.5VSUS)

CPU_PWRGD_SVID_REG CPU_LDT_RST# CPU_LDT_STOP# CPU_LDT_REQ#_CPU

+CPUVDDA

250mA

W/S= 15 mil/20mil

+CPUVDDA +CPUVDDA

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

CPU_LDT_RST# CPU_PWRGD_SVID_REG CPU_LDT_STOP# CPU_LDT_REQ#_CPU

CPU_HTREF0 CPU_HTREF1

place them to CPU within 1.5"

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPUTEST23 CPUTEST18

CPUTEST19 CPUTEST25H

CPUTEST25L

place them to CPU within 1.5"

CPUTEST21 CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12 CPUTEST27

CPU_SVC [37] CPU_SVD [37] CPU_PWRGD_SVID_REG [11,37]

CPU_LDT_RST_HTPA#

2

AE6

AB6 G10

AA9 AC9 AD9 AF9

AD7 H10

AB8 AF7 AE7 AE8 AC8 AF8

AA6

F8 F9

A9 A8

B7 A7

F10

C6

AF4 AF5

R6 P6

F6 E6

Y6

G9

E9 E8

C2

A3 A5

B3

B5

C1

R236300/F_4 R236300/F_4 R261300/F_4 R261300/F_4 R249300/F_4 R249300/F_4 R463*300/F_4 R463*300/F_4

U29D

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19 TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

SOCKET_638_PIN

VFIX MODE

THERMTRIP_L

PROCHOT_L

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

VSS

RSVD11

SVC SVD

MEMHOT_L

THERMDC THERMDA

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

M11 W18

A6 A4

AF6 AC7 AA8

W7 W8

W9 Y9

H6 G6

E10 AE9

J7 H8

D7 E7 F7 C7

C3 K8

C4

C9 C8

H18 H19 AA7 D5 C5

VID Override Circuit

SVC SVD Voltage Output

00 0

1 0

1 1

1

CPUTEST24 CPUTEST23 CPUTEST20 CPUTEST22 CPUTEST12 CPUTEST15 CPUTEST14 CPUTEST19 CPUTEST18 CPUTEST21

R428 1K/F_4R428 1K/F_4 R426 1K/F_4R426 1K/F_4 R427 1K/F_4R427 1K/F_4 R429 1K/F_4R429 1K/F_4 R188 1K/F_4R188 1K/F_4 R227 *300/F_4R227 *300/F_4 R243 *300/F_4R243 *300/F_4 R233 1K/F_4R233 1K/F_4 R230 1K/F_4R230 1K/F_4 R139 1K/F_4R139 1K/F_4

S1G4

1

+1.5V

03

S1G4

CPU_SVC CPU_SVD

CPU_THERMTRIP_L# CPU_PROCHOT_L# CPU_MEMHOT_L#

H_THRMDC [4] H_THRMDA [4]

VDDIO_FB_H VDDIO_FB_L

CPU_DBREQ# CPU_TDO

CPUTEST17 CPUTEST16 CPUTEST15 CPUTEST14

CPUTEST29H

CPUTEST29L

VDDIO_FB_H [40] VDDIO_FB_L [40]

CPU_VDDNB_FB_H [37] CPU_VDDNB_FB_L [37]

R247 *300/F_4R247 *300/F_4 R246 300/F_4R246 300/F_4

PV stage:add +1.8VSUS opt ion R3114 for Caspian CPU power leakage issue

R250

80.6/F_4

+1.5V +1.5VSUS

T28T28 T27T27 T26T26 T29T29

T30T30

T31T31

S1G4

1.1V

1.0V

0.9V

0.8V

S1G4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

S1G4 HT,CTL I/F 1/3

Wednesday, May 27, 2009

1

of

249

of

249

of

249

1A

A

VDDR=>1.75A

+1.5VSUS CPU_VDDR

PLACE THEM CLOSE TO CPU WITHIN 1"

R415

R415 0_4

0_4

4 4

C660

C660 10U/6.3V_8

10U/6.3V_8

S1G4

3 3

2 2

CPU_VDDR

C431

C431 1000P/50V_4

1000P/50V_4

1 1

R432 39.2/F_4R432 39.2/F_4 R431 39.2/F_4R431 39.2/F_4

M_A_RST#[5,46] M_A_ODT0[46]

M_A_ODT1[46] M_A1_ODT0[5] M_A1_ODT1[5]

M_A_CS#0[46]

M_A_CS#1[46] M_A1_CS#0[5] M_A1_CS#1[5]

M_A_CKE0[5,46]

M_A_CKE1[5,46] M_A_CLKP1[46]

M_A_CLKN1[46] M_A_CLKP3[5] M_A_CLKN3[5] M_A_CLKP4[5] M_A_CLKN4[5] M_A_CLKP2[46] M_A_CLKN2[46]

M_A_A[0..15][5,46] M_B_A[0..15] [6]

M_A_BANK0[5,46] M_A_BANK1[5,46] M_A_BANK2[5,46]

M_A_RAS#[5,46] M_A_CAS#[5,46] M_A_WE#[5,46]

CPU_VDDR

C434

C434 1000P/50V_4

1000P/50V_4

+1.5VSUS

R206

R206 1K/F_4

1K/F_4

R204

R204 1K/F_4

1K/F_4

A

C439

4.7u/6.3V_6

C345

C345 1000P/50V_4

1000P/50V_4

C352

C352 *0.47u/10V_4

*0.47u/10V_4

1 2

M_ZP M_ZN

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

U29B

D10

VDDR1

MEM:CMD/CTRL/CLK

VDDR2 VDDR3 VDDR4

MEMZP MEMZN

MA_RESET_L MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1

6

MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

SOCKET_638_PIN

MEM:CMD/CTRL/CLK

C10 B10

AD10 AF10

AE10

H16 T19

V22 U21 V19

T20 U19 U20 V20

N19 N20 E16 F16 Y1

AA16

P19 P20

N21 M20 N22 M19 M22

M24

K22 R21

K20 V24 K24 K19

R20 R23

R19 T22 T24

J22 J20

L20 L21

L19

L22

J21

Place close to socket

C282

4.7u/6.3V_6

C275

C275 1000P/50V_4

1000P/50V_4

C427

180P/50V_4

+3VPCU

52

U14

3

+

4

-

*OPA343NA/3K

R194 *0_4R194 *0_4 R193 *0_4R193 *0_4

C442

4.7u/6.3V_6

R201 0_4R201 0_4

C339

C339 *.1u_4

*.1u_4

1

VDDR_SENSE

MEMVREF

MB_RESET_L

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C281

4.7u/6.3V_6

C435

180P/50V_4

R197 *10_4R197 *10_4

VDDR5 VDDR6 VDDR7 VDDR8 VDDR9

B

VDDR=> 0.9V support 1066 / 800 DDR VDDR= >1.05V support 1333 / 1066 / 800 DDR

CPU_VDDR

W1

0 AC10 AB10 AA10 A10

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

M_B_A0

P24

M_B_A1

N24

M_B_A2

P26

M_B_A3

N23

M_B_A4

N26

M_B_A5

L23

M_B_A6

N25

M_B_A7

L24

M_B_A8

M26

M_B_A9

K26

M_B_A10

T26

M_B_A11

L26

M_B_A12

L25

M_B_A13

W2

4

M_B_A14

J23

M_B_A15

J24 R24

U26 J26

U25 U24 U23

C278

0.22u/6.3V_4

C437

180P/50V_4

C279

0.22u/6.3V_4

C430

180P/50V_4

http://hobi-elektronika.net

D01

CPU_VDDR

C18

R189

R189 *0_4

*0_4

M_B_RST# [6] M_B_ODT0 [6]

M_B_ODT1 [6]

M_B_CS#0 [6] M_B_CS#1 [6]

M_B_CKE0 [6] M_B_CKE1 [6]

M_B_CLKP1 [6] M_B_CLKN1 [6]

M_B_CLKP2 [6] M_B_CLKN2 [6]

M_B_BANK0 [6] M_B_BANK1 [6] M_B_BANK2 [6]

M_B_RAS# [6] M_B_CAS# [6] M_B_WE# [6]

C276

0.22u/6.3V_4

Reserved for AMD suggest

MEMVREF_CPU

R182

R182 *10K/F_4

*10K/F_4

B

C15

C277

0.22u/6.3V_4

D01

+SMDDR_VREF

C347

0.1u/10V_4

C

R184

R184 *0_4

*0_4

C346

1000P/50V_4

+0.75V_DDR_VTT +SMDDR_VREF[5,6,40]

CPU_VDDR[43] +1.5VSUS[2,4,5,6,37,40,42,43,44,46]

C

M_B_DQ[0..63][6]

+0.75V_DDR_VTT +SMDDR_VREF CPU_VDDR +1.5VSUS

M_B_DM[0..7][6]

M_B_DQSP0[6] M_B_DQSN0[6] M_B_DQSP1[6] M_B_DQSN1[6] M_B_DQSP2[6] M_B_DQSN2[6] M_B_DQSP3[6] M_B_DQSN3[6] M_B_DQSP4[6] M_B_DQSN4[6] M_B_DQSP5[6] M_B_DQSN5[6] M_B_DQSP6[6] M_B_DQSN6[6] M_B_DQSP7[6] M_B_DQSN7[6]

D

Processor Memory Interface

U29C

MEM:DATA M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23

G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

A12

B16

A22

E25 AB26 AE22 AC16 AD12

C12

B12

D16

C16

A24

A23

E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

Y11

F26

D

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MEM:DATA

SOCKET_638_PIN

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

E

04

M_A_DQ0

G12

M_A_DQ1

F12

M_A_DQ2

H14

M_A_DQ3

G14

M_A_DQ4

H11

M_A_DQ5

H12

M_A_DQ6

C13

M_A_DQ7

E13

M_A_DQ8

H15

M_A_DQ9

E15

M_A_DQ10

E17

M_A_DQ11

H17

M_A_DQ12

E14

M_A_DQ13

F14

M_A_DQ14

C17

M_A_DQ15

G17

M_A_DQ16

G18

M_A_DQ17

C19

M_A_DQ18

D22

M_A_DQ19

E20

M_A_DQ20

E18

M_A_DQ21

F18

M_A_DQ22

B22

M_A_DQ23

C23

M_A_DQ24

F20

M_A_DQ25

F22

M_A_DQ26

H24

M_A_DQ27

J19

M_A_DQ28

E21

M_A_DQ29

E22

M_A_DQ30

H20

M_A_DQ31

H22

M_A_DQ32

Y2

4

M_A_DQ33

AB24

M_A_DQ34

AB22

M_A_DQ35

AA21

M_A_DQ36

W2

2

M_A_DQ37

W2

1

M_A_DQ38

Y22

M_A_DQ39

AA22

M_A_DQ40

Y2

0

M_A_DQ41

AA20

M_A_DQ42

AA18

M_A_DQ43

AB18

M_A_DQ44

AB21

M_A_DQ45

AD21

M_A_DQ46

AD19

M_A_DQ47

Y1

8

M_A_DQ48

AD17

M_A_DQ49

W1

6

M_A_DQ50

W1

4

M_A_DQ51

Y1

4

M_A_DQ52

Y1

7

M_A_DQ53

AB17

M_A_DQ54

AB15

M_A_DQ55

AD15

M_A_DQ56

AB13

M_A_DQ57

AD13

M_A_DQ58

Y12

M_A_DQ59

W11

M_A_DQ60

AB14

M_A_DQ61

AA14

M_A_DQ62

AB12

M_A_DQ63

AA12

M_A_DM0

E12

M_A_DM1

C15

M_A_DM2

E19

M_A_DM3

F24

M_A_DM4

AC24

M_A_DM5

Y1

9

M_A_DM6

AB16

M_A_DM7

Y1

3

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y1

5

W1

5

W1

2

W13

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

S1G4 DDRIII MEMORY I/F 2/3

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet

M_A_DQ[0..63] [5,46]

M_A_DM[0..7] [5,46]

M_A_DQSP0 [5,46] M_A_DQSN0 [5,46] M_A_DQSP1 [5,46] M_A_DQSN1 [5,46] M_A_DQSP2 [5,46] M_A_DQSN2 [5,46] M_A_DQSP3 [5,46] M_A_DQSN3 [5,46] M_A_DQSP4 [5,46] M_A_DQSN4 [5,46] M_A_DQSP5 [5,46] M_A_DQSN5 [5,46] M_A_DQSP6 [5,46] M_A_DQSN6 [5,46] M_A_DQSP7 [5,46] M_A_DQSN7 [5,46]

E

of

349

1A

5

U29E

G4

VDD_1

H2

VDD_2

J9

VDD_3

J11

VDD_4

J13

VDD_5

3

J15

VDD_6

K6

VDD_7

K10

VDD_8

K12

VDD_9

K14

VDD_10

L4

VDD_11

L7

VDD_12

L9

VDD_13

L11

VDD_14

L13

VDD_15

L15

VDD_16

M2

VDD_17

M6

VDD_18

M8

VDD_19

M10

VDD_20

N7

VDD_21

N9

VDD_22

N11

VDD_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SOCKET_638_PIN

2

Q19

1

3

BSS138_NL/SOT23

D D

CPU_VDDNB_CORE

3A

+1.5VSUS

C C

CNTR_VREF[2]

CPU_SMBCLK

BSS138_NL/SOT23

CPU_SMBDATA

B B

PM_THERM#

C17

BSS138_NL/SOT23

VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

2

C17

Q18

1

2

3

+VCORE+VCORE +VCORE

P8 P10 R4 R7 R9 R11 T2 T6

R421

1K/F_4

Q17

T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

+1.5VSUS

1

Place under CPU bracket side.

+1.5VSUS

R423

R252

1K/F_4

+3V

4

B2-TEST

PC54

PC54 *330u/2V_7343

*330u/2V_7343

+

1.5V@2A

CPU_SIC [2]

CPU_SID [2]

CPU_ALERT [2]

3

http://hobi-elektronika.net

U29F

AA4 AA11 AA13 AA15 AA17 AA19

AB2

AB7

AB9 AB23 AB25

AC11 AC13 AC15 AC17 AC19 AC21

AD6

AD8

AD25

AE11 AE13 AE15 AE17 AE19 AE21 AE23

B11

B13

B15

B17

B19

B21

B23

B25

D11

D13

D15

D17

D19

D21

D23

D25

H21

H23

B4 B6 B8 B9

D6 D8 D9

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7 H9

J4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

SOCKET_638_PIN

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y2 N6

BOTTOM SIDE DECOUPLI NG

C360

10U/6.3V_8

+VCORE

CPU_VDDNB_CORE

C357

10U/6.3V_8

C358

10U/6.3V_8

C351

10U/6.3V_8

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.5VSUS

C394

4.7u/6.3V_6

+1.5VSUS

0.22u/6.3V_4

3

0.22u/6.3V_4

C377

4.7u/6.3V_6

0.22u/6.3V_4

C388

C406

C361

C425

C371

10U/6.3V_8

C364

10U/6.3V_8

C366

10U/6.3V_8

4.7u/6.3V_6

C408

0.01U/25V_4

10U/6.3V_8

+1.5VSUS

C426

2

C413

C399

10U/6.3V_8

C415

C415 10U/6.3V_8

10U/6.3V_8

4.7u/6.3V_6

C407

0.01u/25V_4

C354

0.22u/6.3V_4

C372

10U/6.3V_8

C405

C385

180P/50V_4

C370

0.22u/6.3V_4

C384

PROCESSOR POWER AND GROUND

C355

0.01U/25V_4

C378

0.01U/25V_4

C367

C356

180P/50V_4

C404

0.22u/6.3V_4

C359

0.22u/6.3V_4

C383

180P/50V_4

C368

0.01U/25V_4

C369

180P/50V_4

C396

180P/50V_4

1

05

+3V

R267

D05

*10K/F_4

U16

CPU_SMBCLK[34] CPU_SMBDATA[34]

PM_THERM#[2,12,33]

A A

CPU_SMBCLK CPU_SMBDATA

PM_THERM#

C17

5

R479

R479 *0_4

*0_4

8 7 6 4

U16

SCLK SDA ALERT# OVERT#

*G786P8

C17

MSOP

VCC DXP DXN GND

R254

R254 *200/F_6

*200/F_6

1 2 3 5

C17

C450

C450 *0.1u/10V_4

*0.1u/10V_4

D05

H_THRMDA [2]

C344

C344 *1000P/50V_4

*1000P/50V_4

H_THRMDC [2] PWROK_EC [15,34]

SMBALERT#

*2N7002K

4

Q22

1 3

3

1

C02

PWROK_EC_3904

2

Q21

Q21 *MMBT3904

*MMBT3904

R264 *10K/F_4R264 *10K/F_4

2

ADD VGA TEMP_ FAIL function M93 is active Hi

2 1

R255 *10K/F_4R255 *10K/F_4

D14

D14 *CH501H-40PT

*CH501H-40PT

3

SYS_SHDN# [2,36,43,44]

+3V

TEMP_FAIL [17]

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

S1G4 PWR & GND 3/3

Wednesday, May 27, 2009

449

1

449

1A

of

5

M_A_A[15:0][3,46]

D D

M_A_BANK[0..2][3,46]

M_A1_CS#0[3] M_A1_CS#1[3] M_A_CLKP3[3] M_A_CLKN3[3] M_A_CLKP4[3] M_A_CLKN4[3] M_A_CKE0[3,46] M_A_CKE1[3,46]

A08

R198 10K_4R198 10K_4 R199 10K_4R199 10K_4

+3V

C C

+1.5VSUS

M_A_CAS#[3,46] M_A_RAS#[3,46] M_A_WE#[3,46]

PCLK_SMB[6,12,26,27,46]

PDAT_SMB[6,12,26,27,46]

M_A1_ODT0[3] M_A1_ODT1[3]

D08

R0_CKE0 R0_CKE1

M_A_DM[7:0][3,46]

M_A_DQSP[7:0][3,46]

M_A_DQSN[7:0][3,46]

R584

R259

*10K_4

B B

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BANK0 M_A_BANK1 M_A_BANK2

R585 *Short_4R585 *Short_4 R588 *Short_4R588 *Short_4

DIMM0_SA0 DIMM0_SA1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

R0_CKE0 R0_CKE1

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

4

CN15A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM0_H=4.0_RVS

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

3

http://hobi-elektronika.net

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQ[63:0] [3,46]

+1.5VSUS

+0.75VSMVREF_SUSA

+SMDDR_VREF

R203 *Short_4R203 *Short_4

R589

R589 1K/F_4

1K/F_4

R590

R590 1K/F_4

1K/F_4

+0.75VSMVREF_SUSA

+VREF_CA_A

+1.5VSUS

MEMHOT_MA#[46]

M_A_RST#[3,46]

+VREF_CA_A

+1.5VSUS

R257

*2K/F_4

R258

*2K/F_4

R123 *2.2K_4R123 *2.2K_4

R122 *2.2K_4R122 *2.2K_4

MEMHOT_MA#

2.48A

+3V

2

+1.5VSUS

MEMHOT_MA#

1 3

D12

2

75 76 81 82 87 88 93 94

99 100 105 106 111 112 117 118 123 124

199

77 122 125

198

30

1

126

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

Q10

Q10 *MMBT3904

*MMBT3904

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

CN15B

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DDR3-DIMM0_H=4.0_RVS

A51

CPU_MEMHOT# [2,6,11]

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

1

+0.75V_DDR_VTT

Place these Caps near So-Dimm0.

+1.5VSUS

C417

C402

C402 *.1u/16V_4

*.1u/16V_4

C9224

C9224 1U/6.3V_4

1U/6.3V_4

C417 .1u/16V_4

.1u/16V_4

C829

10u/6.3V_6

C455

C455 *.1u/16V_4

*.1u/16V_4

C400

C400 10u/6.3V_6

10u/6.3V_6

C390

10u/6.3V_6

A A

C379

C379 10u/6.3V_6

10u/6.3V_6

C411

C411 10u/6.3V_6

10u/6.3V_6

5

C380

C380 10u/6.3V_6

10u/6.3V_6

C401

C401 10u/6.3V_6

10u/6.3V_6

C416

C416 *.1u/16V_4

*.1u/16V_4

+0.75V_DDR_VTT

C224

C224 1U/6.3V_4

1U/6.3V_4

C686

C686 .1u/16V_4

.1u/16V_4

C348

.1u/16V_4

+VREF_CA_A

2.2u/6.3V_6

4

C260

.1u/16V_4

+0.75VSMVREF_SUSA

C826

C825

C826

2.2u/6.3V_6

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

DDR2 SODIMMS: A/B CHANNEL

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

3

2

Wednesday, May 27, 2009

549

1

1A

of

5

4

3

2

1

M_B_A[15:0][3]

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7

D D

M_B_BANK[0..2][3]

M_B_CS#0[3] M_B_CS#1[3] M_B_CLKP1[3] M_B_CLKN1[3] M_B_CLKP2[3] M_B_CLKN2[3] M_B_CKE0[3]

A08

R131 10K_4R131 10K_4

+3V

R130 10K_4R130 10K_4

C C

B B

M_B_CKE1[3] M_B_CAS#[3] M_B_RAS#[3] M_B_WE#[3]

PCLK_SMB[5,12,26,27,46]

PDAT_SMB[5,12,26,27,46]

M_B_ODT0[3] M_B_ODT1[3]

M_B_DM[7:0][3]

M_B_DQSP[7:0][3]

M_B_DQSN[7:0][3]

M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_BANK0 M_B_BANK1 M_B_BANK2

DIMM1_SA0 DIMM1_SA1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

CN25A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3-DIMM1_H=4.0_Standard

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

http://hobi-elektronika.net

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQ[63:0] [3]

+1.5VSUS

MEMHOT_MB#

+0.75VSMVREF_SUSB

+SMDDR_VREF

R117 *Short_4R117 *Short_4

R202 *2.2K_4R202 *2.2K_4 R195 *2.2K_4R195 *2.2K_4

+1.5VSUS

R591

R591 1K/F_4

1K/F_4

R592

R592 1K/F_4

1K/F_4

+VREF_CA_B

D12

M_B_RST#[3]

+0.75VSMVREF_SUSB

+VREF_CA_B

+1.5VSUS

R118

*2K/F_4

R110

*2K/F_4

2

Q14

Q14 *MMBT3904

*MMBT3904

1 3

+1.5VSUS

2.48A

+3V

MEMHOT_MB#

CPU_MEMHOT# [2,5,11]

CN25B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_Standard

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

A50

2DIMM--->P/N:DGMK4000109

+0.75V_DDR_VTT

+1.5VSUS

C817

C817 10u/6.3V_6

10u/6.3V_6

A A

Place these Caps near So-Dimm1.

C821

C409

C409 10u/6.3V_6

10u/6.3V_6

C690

C690 10u/6.3V_6

10u/6.3V_6

C819

C819 10u/6.3V_6

10u/6.3V_6

C821 10u/6.3V_6

10u/6.3V_6

C818

C818 10u/6.3V_6

10u/6.3V_6

+0.75V_DDR_VTT

5

C822

C822 *.1u/16V_4

*.1u/16V_4

C8158

C8158 1u/6.3V_4

1u/6.3V_4

C689

C689 .1u/16V_4

.1u/16V_4

C231

C231 1u/6.3V_4

1u/6.3V_4

C418

C418 *.1u/16V_4

*.1u/16V_4

C820

C820 .1u/16V_4

.1u/16V_4

10u/6.3V_6

C454

C454 *.1u/16V_4

*.1u/16V_4

C830

+VREF_CA_B

C230

.1u/16V_4

4

+0.75VSMVREF_SUSB

C259

2.2u/6.3V_6

C828

C828 .1u/16V_4

.1u/16V_4

C827

2.2u/6.3V_6

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

DDR2 SODIMMS: A/B CHANNEL

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

3

2

Wednesday, May 27, 2009

649

1

1A

of

5

SIDE PORT

11/4

C9789

C9791

E4 F8 F3 F9 H4 H9 G3 H8

D8 C4 C9 C3 A8 A3 B9 A4

B3 D10 G8 K3 K9 N2 N10 R2 R10

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10

B2 B10 D2 D9 E3 E9 F10 G2 G10

+1.5V_MEM_VDDQ+1.5V_MEM_VDDQ

SPM_DQ5 SPM_DQ3 SPM_DQ4 SPM_DQ0 SPM_DQ6 SPM_DQ1 SPM_DQ7 SPM_DQ2

SPM_DQ14 SPM_DQ9 SPM_DQ15 SPM_DQ8 SPM_DQ10 SPM_DQ11 SPM_DQ13 SPM_DQ12

D D

C9788

SIDE@0.1u/10V_4

C9790

SIDE@0.1u/10V_4

C C

R593 *SIDE@100/F_4R593 *SIDE@100/F_4

B B

+1.5V_MEM_VDDQ

R603 SIDE@10K/F_4R603 SIDE@10K/F_4

SP_DDR3_RST#[12]

A A

SPM_VREFCA SPM_VREFDQ

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_CLKP SPM_CLKN SPM_CKE

SPM_ODT SPM_CS# SPM_RAS# SPM_CAS# SPM_WE#

SPM_DQS0P SPM_DQS1P

SPM_DM0 SPM_DM1

SPM_DQS0N SPM_DQS1N

VMA_ZQ

R604

R604 SIDE@240/F_4

SIDE@240/F_4

5

R599

R599 SI

SI

DE@1K/F_4

R601

R601 SIDE@1K/F_4

SIDE@1K/F_4

M9

H2 N4

P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8

M8

M3

N9

M4

J8 K8

K10

K2 L3 J4 K4 L4

F4 C8

E8 D4

G4

B8

T3 L9

J2 L2

J10

L10

SIDE@0.1u/10V_4

SPM_VREFCASPM_VREFDQ

SIDE@0.1u/10V_4

U39

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#H3

VDDQ#H10

VSSQ#B10

VSSQ#F10

VSSQ#G10

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3 VDD#K9 VDD#N2

VDD#N10

VDD#R2

VDD#R10

VDDQ#A2 VDDQ#A9

VDDQ#F2

VSS#A10

VSS#B4 VSS#E2 VSS#G9

VSS#J3 VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2 VSSQ#D2

VSSQ#D9 VSSQ#E3 VSSQ#E9

VSSQ#G2

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ

NC#J2 NC#L2 NC#J10 NC#L10

SIDE@H5TQ1G63AFR-14C

4

R600

R600 SI

SI

DE@1K/F_4

R602

R602 SIDE@1K/F_4

SIDE@1K/F_4

+1.5V_MEM_VDDQ

4

3

U28A

http://hobi-elektronika.net

R183 301/F_4R183 301/F_4

HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5 HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7

HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15

HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1

HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1

HT_RXCALP HT_TXCALP HT_RXCALN

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25 AB25 AB24 AA24 AA25

Y22

Y23 W2 W2

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22

M23

R21

R20

C23

A24

U28A

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N

1

HT_RXCAD12P

0

HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

RS880M_A11

PART 1 OF 6

This block is for UMA only , Discrete can remove all component

U28D

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

SI

DE@0.1u/10V_4

C9783

U28D

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

RS880M_A11

SIDE@10u/6.3V_6

A09

+1.5V_MEM_VDDQ

R597 SIDE@40.2/F_4R597 SIDE@40.2/F_4 R607 SIDE@40.2/F_4R607 SIDE@40.2/F_4

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_RAS# SPM_CAS# SPM_WE# SPM_CS# SPM_CKE SPM_ODT

SPM_CLKP SPM_CLKN

SPM_COMPP SPM_COMPN

C9782

SIDE@0.1u/10V_4

3

2

HT_CADINP0

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

PAR 4 OF 6

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCKN(NC)

SBD_MEM/DVO_I/F

D24

HT_CADINN0

D25

HT_CADINP1

E24

HT_CADINN1

E25

HT_CADINP2

F24

HT_CADINN2

F25

HT_CADINP3

F23

HT_CADINN3

F22

HT_CADINP4

H23

HT_CADINN4

H22

HT_CADINP5

J25

HT_CADINN5

J24

HT_CADINP6

K24

HT_CADINN6

K25

HT_CADINP7

K23

HT_CADINN7

K22

HT_CADINP8

F21

HT_CADINN8

G21

HT_CADINP9

G20

HT_CADINN9

H21

HT_CADINP10

J20

HT_CADINN10

J21

HT_CADINP11

J18

HT_CADINN11

K17

HT_CADINP12

L19

HT_CADINN12

J19

HT_CADINP13

M19

HT_CADINN13

L18

HT_CADINP14

M21

HT_CADINN14

P21

HT_CADINP15

P18

HT_CADINN15

M18

HT_CLKINP0

H24

HT_CLKINN0

H25

HT_CLKINP1

L21

HT_CLKINN1

L20

HT_CTLINP0

M24

HT_CTLINN0

M25

HT_CTLINP1

P19

HT_CTLINN1

R18 B24

HT_TXCALN

B25

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)

MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS1P(NC)

MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

R192 301/F_4R192 301/F_4

AA18

AA20 AA19 Y19

V17 AA17 AA15 Y15 AC20 AD19

AE22

AC18

AB20

AD22

AC22

AD21

Y17

W18

AD20

AE21

W17

AE19

IOPLLVDD18_SIDE_PORT

AE23

IOPLLVDD_SIDE_PORT

AE24

AD23

SPM_VREF1

AE18

40 mil~50 mil

SI

DE@1u/6.3V_4

C9784

+1.5V_MEM_VDDQ

C9785

SIDE@1u/6.3V_4

C9786

R598 SIDE@0_6R598 SIDE@0_6

C9787

C9787 SIDE@10u/6.3V_6

SIDE@10u/6.3V_6

2

HT_CADOUTP[15..0] HT_CADOUTN[15..0] HT_CLKOUTP[1..0] HT_CLKOUTN[1..0] HT_CTLOUTP[1..0] HT_CTLOUTN[1..0] HT_CADINP[15..0] HT_CADINN[15..0] HT_CLKINP[1..0] HT_CLKINN[1..0] HT_CTLINP[1..0] HT_CTLINN[1..0]

RbRa

SPM_DQ0 SPM_DQ1 SPM_DQ2 SPM_DQ3 SPM_DQ4 SPM_DQ5 SPM_DQ6 SPM_DQ7 SPM_DQ8 SPM_DQ9 SPM_DQ10 SPM_DQ11 SPM_DQ12 SPM_DQ13 SPM_DQ14 SPM_DQ15

SPM_DQS0P SPM_DQS0N SPM_DQS1P SPM_DQS1N

SPM_DM0 SPM_DM1

C9781

SIDE@2.2u/6.3V_6

+1.5V

1

HT_CADOUTP[15..0] [2]

HT_CADOUTN[15..0] [2]

HT_CLKOUTP[1..0] [2]

HT_CLKOUTN[1..0] [2]

HT_CTLOUTP[1..0] [2]

HT_CTLOUTN[1..0] [2]

HT_CADINP[15..0] [2]

HT_CADINN[15..0] [2]

HT_CLKINP[1..0] [2]

HT_CLKINN[1..0] [2]

HT_CTLINP[1..0] [2]

HT_CTLINN[1..0] [2]

signals

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18

RS880 RX880

Ra 301 ohm 1%

Rb 301 ohm 1%

+1.8V[9,10,15,24,37,42,43,44] +1.1V[2,8,9,10,14,38,44]

C9792

SIDE@0.1u/10V_4

SPM_VREF1

C9793

SIDE@0.1u/10V_4

Ra

1.21k ohm 1%

Rb

1.21k ohm 1%

+1.8V +1.1V

+1.5V_MEM_VDDQ

R605

R605 SIDE@1K/F_4

SIDE@1K/F_4

R606

R606 SP@

SP@

1K/F_4

R606 W/O side port

-->change to 0 Ohm CS00002JB38

A41

L75 PBY160808T-221Y-NL75 PBY160808T-221Y-N L73 PBY160808T-221Y-NL73 PBY160808T-221Y-N

C9794

C9794 SIDE@2.2u/6.3V_6

SIDE@2.2u/6.3V_6

Size Document Number Rev

Date: Sheet of

Date: Sheet

IOPLLVDD18 - memory PLL not applicable to RX881

352-(&7=5

4XDQWD&RPSXWHU,QF

RS880M-HT LINK I/F 1/5

Wednesday, May 27, 2009

1

08

15mA

+1.8V

26mA

+1.1V

1A

of

749

5

4

3

2

1

http://hobi-elektronika.net

09

U28B PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13

D D

PCIE_RX1+[26]

C C

PCIE_RX1-[26]

PCIE_RXP2[27] PCIE_RXN2[27]

A_RXP0[11] A_RXN0[11] A_RXP1[11] A_RXN1[11] A_RXP2[11] A_RXN2[11] A_RXP3[11] A_RXN3[11]

PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

U28B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS880M_A11

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)

PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N

PCIE I/F GFX

GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C PEG_TXP11_C PEG_TXN11_C PEG_TXP10_C PEG_TXN10_C PEG_TXP9_C PEG_TXN9_C PEG_TXP8_C PEG_TXN8_C PEG_TXP7_C PEG_TXN7_C PEG_TXP6_C PEG_TXN6_C PEG_TXP5_C PEG_TXN5_C PEG_TXP4_C PEG_TXN4_C PEG_TXP3_C PEG_TXN3_C PEG_TXP2_C PEG_TXN2_C PEG_TXP1_C PEG_TXN1_C PEG_TXP0_C PEG_TXN0_C

PCIE_TXP0_C PCIE_TXN0_C

PCIE_TXP2_C PCIE_TXN2_C

A_TXP0_C A_TXN0_C A_TXP1_C A_TXN1_C A_TXP2_C A_TXN2_C A_TXP3_C A_TXN3_C

NB_PCIECALRP NB_PCIECALRN

C669 SW@0.1u/10V_4C669 SW@0.1u/10V_4 C672 SW@0.1u/10V_4C672 SW@0.1u/10V_4 C662 SW@0.1u/10V_4C662 SW@0.1u/10V_4 C666 SW@0.1u/10V_4C666 SW@0.1u/10V_4 C657 SW@0.1u/10V_4C657 SW@0.1u/10V_4 C659 SW@0.1u/10V_4C659 SW@0.1u/10V_4 C652 SW@0.1u/10V_4C652 SW@0.1u/10V_4 C654 SW@0.1u/10V_4C654 SW@0.1u/10V_4 C641 SW@0.1u/10V_4C641 SW@0.1u/10V_4 C640 SW@0.1u/10V_4C640 SW@0.1u/10V_4 C643 SW@0.1u/10V_4C643 SW@0.1u/10V_4 C642 SW@0.1u/10V_4C642 SW@0.1u/10V_4 C645 SW@0.1u/10V_4C645 SW@0.1u/10V_4 C644 SW@0.1u/10V_4C644 SW@0.1u/10V_4 C625 SW@0.1u/10V_4C625 SW@0.1u/10V_4 C624 SW@0.1u/10V_4C624 SW@0.1u/10V_4 C647 SW@0.1u/10V_4C647 SW@0.1u/10V_4 C646 SW@0.1u/10V_4C646 SW@0.1u/10V_4 C627 SW@0.1u/10V_4C627 SW@0.1u/10V_4 C626 SW@0.1u/10V_4C626 SW@0.1u/10V_4 C649 SW@0.1u/10V_4C649 SW@0.1u/10V_4 C648 SW@0.1u/10V_4C648 SW@0.1u/10V_4 C631 SW@0.1u/10V_4C631 SW@0.1u/10V_4 C628 SW@0.1u/10V_4C628 SW@0.1u/10V_4 C630 SW@0.1u/10V_4C630 SW@0.1u/10V_4 C629 SW@0.1u/10V_4C629 SW@0.1u/10V_4 C638 SW@0.1u/10V_4C638 SW@0.1u/10V_4 C637 SW@0.1u/10V_4C637 SW@0.1u/10V_4 C633 SW@0.1u/10V_4C633 SW@0.1u/10V_4 C621 SW@0.1u/10V_4C621 SW@0.1u/10V_4 C650 SW@0.1u/10V_4C650 SW@0.1u/10V_4 C639 SW@0.1u/10V_4C639 SW@0.1u/10V_4

C658 0.1u/10V_4C658 0.1u/10V_4 C655 0.1u/10V_4C655 0.1u/10V_4

C651 0.1u/10V_4C651 0.1u/10V_4 C653 0.1u/10V_4C653 0.1u/10V_4

T107T107 T108T108

C676 0.1u/10V_4C676 0.1u/10V_4 C677 0.1u/10V_4C677 0.1u/10V_4 C673 0.1u/10V_4C673 0.1u/10V_4 C674 0.1u/10V_4C674 0.1u/10V_4 C668 0.1u/10V_4C668 0.1u/10V_4 C670 0.1u/10V_4C670 0.1u/10V_4 C661 0.1u/10V_4C661 0.1u/10V_4 C665 0.1u/10V_4C665 0.1u/10V_4

R154 1.27K/F_4R154 1.27K/F_4 R147 2K/F_4R147 2K/F_4

+1.1V

PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0

PCIE_TX1+ [26]

PCIE_TX1- [26]

PCIE_TXP2 [27] PCIE_TXN2 [27]

A_TXP0 [11] A_TXN0 [11] A_TXP1 [11] A_TXN1 [11] A_TXP2 [11] A_TXN2 [11] A_TXP3 [11] A_TXN3 [11]

PEG_RXN[15:0][16] PEG_RXP[15:0][16]

PEG_RXN[15:0] PEG_RXP[15:0]

Close to North Bridge

INT. HDMI

PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C

To LAN

TO WLAN-2

PEG_TXN[15:0] PEG_TXP[15:0]

PEG_TXP15_C [25] PEG_TXN15_C [25] PEG_TXP14_C [25] PEG_TXN14_C [25] PEG_TXP13_C [25] PEG_TXN13_C [25] PEG_TXP12_C [25] PEG_TXN12_C [25]

PEG_TXN[15:0] [16] PEG_TXP[15:0] [16]

B B

RS880 Display Port Support (muxed on GFX)

DP0

DP1

A A

5

GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet

RS880M-PCIE I/F 2/5

Wednesday, May 27, 2009

849

1

849

1A

of

5

hDƵƐĞϭϰϬŽŚŵϭй ŝƐĐƌĞƚĞƵƐĞϭϯϯŽŚŵϭй EŽƚĞKŶůǇĨŽƌZ^ϴϴϬƐĞƌŝĞƐϭϭ^/ĞƌƌĂƚĂ

R126 4.7K_4R126 4.7K_4 R127 4.7K_4R127 4.7K_4

D D

For Check list JTAG

R434 *4.7K_4R434 *4.7K_4 R153 *4.7K_4R153 *4.7K_4

+3V

R433 *4.7K_4R433 *4.7K_4 R141 *4.7K_4R141 *4.7K_4

+3V

NBGFX_CLKP NBGFX_CLKN

NB_PWRGD_IN INT_EDIDDATA INT_EDIDCLK HDMI_DDC_DATA

Only for UMA

VGA (Not applicable to RX881)

For A11 version

INT_CRT_VSYNC

INT_CRT_HSYNC

+NB_CORE_ON

RS880_AUX_CAL

CLK_SBLINKP

CLK_SBLINKN

R158 3K_4R158 3K_4

R168 *SP@3K_4R168 *SP@3K_4 R166 SIDE@3K_4R166 SIDE@3K_4

RS780/RX780/RS880

R436 2K/F_4R436 2K/F_4

R145 *150/F_4R145 *150/F_4

+3V

A09

R119 *SP_A11@49.9/F_4R119 *SP_A11@49.9/F_4 R116 *SP_A11@49.9/F_4R116 *SP_A11@49.9/F_4

B2-TEST

C C

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. RS880M

1 Disable

B B

A A

0 Enable

RS880M: Enables Side port memory

RS880M:INT_CRT_HSYNC Selects if Memory SIDE PORT is avai lable or not

1 = Memory Side port Not available 0 = Memory Side port av ailable Register Readback of strap: NB_CLKCFG: CLK_TOP_SPARE_D[1]

For extrnal EEPROM Debug only

Display Port interface from PCIeGraphics (RS880/rs880M only)

5

4

+3V_AVDD_NB

110mA

http://hobi-elektronika.net

C05

INT_CRT_RED[24] INT_CRT_GRE[24] INT_CRT_BLU[24]

NB_PWRGD_IN[12,15]

B2-TEST D06

RS880M --- ADD

+3V

PBY160808T-221Y-N

+3V

4

+1.8V

R579

R579 300_4

300_4

PBY160808T-221Y-N

+1.8V

A41

L36

+1.8V

PBY160808T-221Y-N

R438 IV@140/F_4R438 IV@140/F_4 R440 150/F_4R440 150/F_4 R442 150/F_4R442 150/F_4

INT_CRT_HSYNC[24] INT_CRT_VSYNC[24]

INT_DDCDATA[24] INT_DDCCLK[24]

R160 715/F_6R160 715/F_6

A_RST# _SB[11,24,34]

CLK_NB_HTREFP_PR[11] CLK_NB_HTREFN_PR[11]

CLK_NB_REF_CLKP[11] CLK_NB_REF_CLKN[11]

CLK_SBLINKP[11] CLK_SBLINKN[11]

INT_EDIDDATA[24] INT_EDIDCLK[24]

HDMI_DDC_DATA[25]

HDMI_DDC_CLK[25]

A10

+NB_CORE_ON[39]

A41

L27

C300

2.2u/6.3V_6

R174 *Short_4R174 *Short_4

C312

0.1u/10V_4

C335

2.2u/6.3V_6

A41

L22

A41

L34

+1.8V_AVDDDI_NB

20mA

+1.8V_AVDDQ_N B

4mA

B03

INT_CRT_RED INT_CRT_GRE INT_CRT_BLU

INT_CRT_HSYNC INT_CRT_VSYNC

DAC_RSET_NB +1.1V_PLLVDD

+1.8V_PLLVDD18

+1.8V_VDDA18HTPLL

65mA

+1.8V_VDDA18PCIEPLL

20mA

NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP

NBGFX_CLKP NBGFX_CLKN

GPP_REFCLKP

T69T69

GPP_REFCLKN

T70T70

CLK_SBLINKP CLK_SBLINKN

INT_EDIDDATA INT_EDIDCLK

HDMI_DDC_DATA

AUX1P

T96T96

AUX1N

T72T72

+NB_CORE_ON

RS880_AUX_CAL

T17T17

AVDD-DAC Analog not applicable to RX780

+3V_AVDD_NB

C03

C485

C485 1u/6.3V_4

1u/6.3V_4

+1.8V_AVDDDI_NB

AVDDI-DAC Digital not applicable to RX780

+1.8V_AVDDQ_N B

AVDDQ-DAC Bandgap Reference not applicable to RX780

20mils width

+1.8V_VDDA18PCIEPLL

VDDA18PCIEPLL -PCIE PLL

C268

2.2u/6.3V_6

20mils width

+1.8V_VDDA18HTPLL

VDDA18HTPLL -HT LINK PLL

C329

2.2u/6.3V_6

3

U28C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PW M_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PW M_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_R EFCLKN)

A9

I2C_DATA

B9

I2C_CLK

B8

DDC_DATA/AUX0N(NC)

A8

DDC_CLK/AUX0P(NC)

B7

AUX1P(NC)

A7

AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS880M_A11

A41

L61

+1.1V

+1.8V

3

L61

PBY160808T-221Y-N

A41

L32

PBY160808T-221Y-N

C324

C324 10U/6.3V_8

10U/6.3V_8

CPU_LDT_STOP#[2,11]

CPU_LDT_REQ#[2,11]

ALLOW_LDTSTOP[2,11]

2

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

HPD(NC)

TESTMODE

4

A11

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

SUS_STAT#_NB

D12 AE8

AD8

TEST_EN

D13

+1.8V

R85

2.2K_4

NB_LDT_STOP#

R185 1K_4R185 1K_4

NB_ALLOW_LDTSTOP

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

R172

1.82K/F_4

A41

+1.8V

L33

PBY160808T-221Y-N

L62

PBY201209T-221Y-N

DDR3 based CPU : Level shifted to 1.8 V on the Northbridge side using an open-drain buffer and pulled up to 1.8V_S0 through a 2.2k Ohm 5% resistor on the Northbridge side.

+1.8V

2

PART 3 OF 6

TXOUT_U1P(PCIE_RESET _GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET _GPIO5)

CRT/TVOUT

PM

CLOCKs PLL PWR

MIS.

C679

2.2u/6.3V_6

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1 )

TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET _GPIO1)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC)

LVTM

+1.8V_PLLVDD18

VDDLT33_1(NC) VDDLT33_2(NC)

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

TMDS_HPD(NC)

TVCLKIN(PW M_GPIO5)

THERMALDIODE_P THERMALDIODE_N

+1.1V_PLLVDD

PLLVDD - Graphics PLL not applicable to RX780

PLLVDD18 - Graphics PLL not applicable to RX780

C327

2.2u/6.3V_6

+1.8V

+

U8

Open

2

Drain

-

74LVC07+-

74LVC07

3 5

LA_DATAP0 [24] LA_DATAN0 [24] LA_DATAP1 [24] LA_DATAN1 [24] LA_DATAP2 [24] LA_DATAN2 [24]

LA_CLK [24]

LA_CLK# [24]

INT_LVDS_DIGON [24] INT_DPST_PWM [24] INT_LVDS_BLON [24]

R88

R88 *3K_4

*3K_4

A41

15mA

300mA

2.2u/6.3V_6

4.7u/6.3V_6

C683

INT_HDMI_HPD [25]

SUS_STAT# [12]

VDDLTP18 - LVDS or DVI/HDMI PLL

C318

not applicable to RX780

C680

0.1u/10V_4

1

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

RS880M-SYSTEM I/F 3/5

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

1

10

1A

of

949

5

4

3

2

1

http://hobi-elektronika.net

J4

R7

L1

L2

L4

L7

M6

N4

P6

R1

R2

R4

V7

U4

V8

V6

W1

W2

W4

W7

W8

Y6

AA4

AB5

AB1

AB7

AC3

AC4

AE1

AE4

AB2

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

VSS20

VSS21

VSS22

VSS23

V12

U11

U15

W11

VSS24

W15

AE14

VSS1

VSS25

AC12

D11

VSS2

VSS26

AA14

VSS3G8VSS4

VSS27

Y18

D5

VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

J22

E22

H19

G22

G24

G25

H7

VSSAPCIE10

VSSAHT8

VSSAHT9

VSSAHT10

L17

L22

VSSAPCIE11

VSSAPCIE12

VSSAPCIE13

VSSAPCIE14

VSSAHT11

VSSAHT12

VSSAHT13

VSSAHT14

L24

L25

N22

M20

VSSAPCIE15

VSSAPCIE16

VSSAPCIE17

VSSAHT15

VSSAHT16

VSSAHT17

P20

R19

R22

R24

VSSAPCIE18

VSSAPCIE19

VSSAPCIE20

VSSAPCIE21

VSSAHT18

VSSAHT19

VSSAHT21

VSSAHT20

V19

R25

U22

H20

VSSAPCIE22

VSSAPCIE23

VSSAPCIE24

VSSAPCIE25

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

Y21

W22

W24

W25

VSSAPCIE26

VSSAPCIE27

VSSAPCIE28

VSSAPCIE29

VSSAHT26

VSSAHT27

VSS11

L12

M14

AD25

VSSAPCIE30

VSSAPCIE31

VSSAPCIE32

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

VSSAPCIE36

GROUND

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

T12

P12

P15

N13

R11

R14

VSSAPCIE37

VSS19

U14

U28F

D D

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4

PART 6/6

VSSAHT1

VSSAHT2

A25

D23

E14

VSS28

AB11

E15

VSS5

VSS29

AB15

J15

VSS6

VSS30

AB17

J12

VSS7

VSS31

AB19

K14

AE20

M11

VSS8

VSS9

VSS32

VSS33

AB21

L15

VSS10

VSS34

K11

PIN NAME

RX881/RS880 POWER DIFFERENCE TABLE

VDDHT VDDHTRX VDDHTTX VDDA18PCIE

VDD18_MEM VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18

RX881

+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 GND +1.1V +1.1V +1.8V +1.1V GND +3.3V

RS880

+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V

+1.1V

+1.8V/1.5V

+3.3V +1.8V+1.8V

PIN NAME IOPLLVDD

AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33

RX881 RS880

+1.1V

GND

+3.3VAVDD GND +1.8V GND +1.8V GND

+1.1V

+1.8V

GND

+1.8V

GND

+1.8V

GND

NC

+1.1V 2A for RS880M +1.1V 1.3A for RX881

+1.1V

C C

0.6A

0.7A

+1.1V 2A for RS880M +1.2V 0.4A for Rx881

+1.1V

L35 *Short_8L35 *Short_8

B2-TEST

+1.8V 1A for RS780M+SB700

B B

+1.8V 1A for RX881

+1.8V

PBY201209T-221Y-N

2A

L24

A41

0.7A

L31 *Short_8L31 *Short_8

L37 *Short_8L37 *Short_8

C333

4.7u/6.3V_6

C299

4.7u/6.3V_6

+1.8V

C331

0.1u/10V_4

C297

4.7u/6.3V_6

R136 *Short_6R136 *Short_6

C317

4.7u/6.3V_6

C362

4.7u/6.3V_6

C292

0.1u/10V_4

C321

0.1u/10V_4

C338

0.1u/10V_4

C337

0.1u/10V_4

C295

0.1u/10V_4

25mA

VDD18-RS880 I/O Transform

R171 SIDE@0_6R171 SIDE@0_6

A A

+1.8V

25mA

C322

0.1u/10V_4

C340

0.1u/10V_4

C332

0.1u/10V_4

C287

0.1u/10V_4

C286

C286 1U/10V_4

1U/10V_4

C835

C835 SP@1U/10V_4

SP@1U/10V_4

+1.1V_VDDHT

C323

0.1u/10V_4

+1.1V_VDDHTRX

C334

0.1u/10V_4

+1.1V_VDDHTTX

C341

0.1u/10V_4

+1.8V_VDDA18PCIE

C301

0.1u/10V_4

+1.8V_VDDG18_NB

+1.8V_VDD18_MEM

U28E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y2

0

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDDG18_1(VDD18_1)

G9

VDDG18_2(VDD18_2)

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS880M_A11

A09

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11

POWER

VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDDG33_1(NC) VDDG33_2(NC)

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

+1.1V_VDD_PCIE

C243

0.1u/10V_4

C315

0.1u/10V_4

C316

0.1u/10V_4

+1.5V_VDD_MEM

SIDE@0.1u/10V_4

+3V_VDDG33

C302

0.1u/10V_4

C291

0.1u/10V_4

C311

0.1u/10V_4

SIDE@0.1u/10V_4

C832

C303

0.1u/10V_4

2.5A

C293

C293 1U/10V_4

1U/10V_4

C310

0.1u/10V_4

C306

C308

0.1u/10V_4

C306

0.1u/10V_4

C831 W/O side port

-->stuff 0 Ohm CS00002JB38

C833

SP@0.1u/10V_4

R169 *Short_4R169 *Short_4

SP@0.1u/10V_4

VDD33 - 3.3V I/O Not applicable to RX780

C294

C294 1U/10V_4

1U/10V_4

C307

0.1u/10V_4

10U/6.3V_8

60mA

VDDPCIE - PCIE-E Main power

R115 *Short_8R115 *Short_8

C290

4.7u/6.3V_6

0.95~1.1V 10A

VDDC - Core Logic power

C314

10U/6.3V_8

C305

SIDE@0.1u/10V_4

C836

C831

C836

+3V

+1.1V

NB_CORE

A09

L74

SIDE@0_8

C834

C834 SIDE@4.7u/6.3V_6

SIDE@4.7u/6.3V_6

+1.5V

VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform

11

+1.1V +1.8V NB_CORE

+1.1V [2,7,8,9,14,38,44] +1.8V [7,9,15,24,37,42,43,44] NB_CORE [39,44]

5

C835 W/O side port

-->stuff 0 Ohm CS00002JB38

4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Date: Sheet of

3

2

Date: Sheet of

RS880M-POWER5/5

Wednesday, May 27, 2009

10 49

1

10 49

1A

of

5

4

3

2

1

C350 180P/50V_4C350 180P/50V_4

MINI-PCIE,Card reader

D D

NB & EC

PLACE THESE PCIE AC COUPLING CAPS CLOSE TO SB820

PCIE_RST#_SB_R[27,30]

A_RST#_SB[9,24,34]

A_RXP0[8] A_RXN0[8] A_RXP1[8] A_RXN1[8] A_RXP2[8] A_RXN2[8] A_RXP3[8] A_RXN3[8]

A_TXP0[8] A_TXN0[8] A_TXP1[8] A_TXN1[8] A_TXP2[8] A_TXN2[8] A_TXP3[8] A_TXN3[8]

+1.1V_PCIE_VDDR

+3V_S5

R580

R580 33_4

A_RST#_AND[16,26,27]

VGA,LAN& MINI-IPCIE

C C

33_4

CLK_PCIE_VGAP[16]

CLK_PCIE_VGAN[16]

C812 0.1u/10V_4C812 0.1u/10V_4

A_RST#_SB_AND

C813

100p/50V_4

5

U36

3

2 4

2 1

TC7SH08FU

4

RP11 SGN@0_4P2R_4RP11 SGN@0_4P2R_4

UMA don't stuff

B B

+3V

C533 0.1u/10V_4C533 0.1u/10V_4

MEM_1V5[13]

VDDR_1.05_EN

VDDR_1.05_EN: 1 : VDDR =1.05V 0 : VDDR = 0.9V (Default)

RTC_X1

23

Y8

32.768KHZ

A A

R546

R546 *20M_6

*20M_6

4

R547 20M_6R547 20M_6

C794

C794 18P/50V_4

18P/50V_4

RTC_X2

1

C795

C795 18P/50V_4

18P/50V_4

5

2 1

R303 *0_4R303 *0_4

GN_CLK_VGA_27M_NONSS[16]

A59

5

4

3

U18

TC7SH08FU

C730 SGN@22P/50V_4C730 SGN@22P/50V_4

Y5

SGN@25MHZ

C731 SGN@22P/50V_4C731 SGN@22P/50V_4

R345 33_4R345 33_4

C735 0.1u/10V_4C735 0.1u/10V_4 C736 0.1u/10V_4C736 0.1u/10V_4 C732 0.1u/10V_4C732 0.1u/10V_4 C733 0.1u/10V_4C733 0.1u/10V_4 C728 0.1u/10V_4C728 0.1u/10V_4 C729 0.1u/10V_4C729 0.1u/10V_4 C726 0.1u/10V_4C726 0.1u/10V_4 C727 0.1u/10V_4C727 0.1u/10V_4

R481 590/F_4R481 590/F_4 R279 2K/F_4R279 2K/F_4

A_RST#_SB

SB_GPIO_PCIE_RST# [12]

CLK_SBLINKP[9] CLK_SBLINKN[9]

CLK_NB_REF_CLKP[9] CLK_NB_REF_CLKN[9]

CLK_NB_HTREFP_PR[9] CLK_NB_HTREFN_PR[9]

CLK_CPU_BCLKP_PR[2] CLK_CPU_BCLKN_PR[2]

1 3

CLK_PCIE_LOM[26] CLK_PCIE_LOM#[26]

CLK_PCIE_WLANP_2[27] CLK_PCIE_WLANN_2[27]

R317

R317 33_4

33_4

A16

21

R480

R480 SGN@1M_4

SGN@1M_4

PCIE_RST#_SB A_RST#_SB

PCIE_CALRP_SB PCIE_CALRN_SB

SLT_GFX_CLKP SLT_GFX_CLKN

VDDR_OPT [43]

25M_X1

25M_X2

4

A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C

http://hobi-elektronika.net

U34A

P1

PCIE_RST#

L1

A_RST#

AD26

A_TX0P

AD27

A_TX0N

AC28

A_TX1P

AC29

A_TX1N

AB29

A_TX2P

AB28

A_TX2N

AB26

A_TX3P

AB27

A_TX3N

AE24

A_RX0P

AE23

A_RX0N

AD25

A_RX1P

AD24

A_RX1N

AC24

A_RX2P

AC25

A_RX2N

AB25

A_RX3P

AB24

A_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y2

9

GPP_TX1P

Y2

8

GPP_TX1N

Y2

6

GPP_TX2P

Y2

7

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y2

1

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W2

3

GPP_RX2P

V24

GPP_RX2N

W2

4

GPP_RX3P

W2

5

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

SB820M_A12

Part 1 of 5

SB800

PCICLK4/14M_OSC/GPO39

PCI CLKS

PCI EXPRESS INTERFACES

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT3#/CLK_REQ7#/GPIO46

LDRQ1#/CLK_REQ6#/GPIO49

CLOCK GENERATOR

ALLOW_LDTSTP/DMA_ACTIVE#

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

PCI INTERFACELPC

REQ1#/GPIO40

GNT1#/GPO44 GNT2#/GPO45

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

SERIRQ/GPIO48

PROCHOT#

CPU

RTC

INTRUDER_ALERT#

VDDBT_RTC_G

3

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

GNT0#

CLKRUN#

LOCK#

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

LDT_PG LDT_STP# LDT_RST#

32K_X1 32K_X2

RTCCLK

W2 W1 W3 W4 Y1

V2

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

C1 C2 D2

B2 B1

PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4

SB820_MEMHOT#

R594 *10K_4R594 *10K_4

CLKRUN#_R

LPC_CLK0 LPC_CLK1

LDRQ0#_SB LDRQ1#_SB

RTC_X1 RTC_X2

INTRUDER_ALERT#

T59T59

D23

*SW@RB501V-40

VDDR_1.05_EN

T46T46

T44T44 T55T55

R331 *8.2K_4R331 *8.2K_4

A58

R505 22_4R505 22_4 R499 22_4R499 22_4

T34T34 T42T42

12

G2

G2 *SHORT

*SHORT

_PAD1

PCI_CLK1 [15] PCI_CLK2 [15] PCI_CLK3 [15] PCI_CLK4 [15]

PE_GPIO2_R

21

BOARD_ID0 [13] BOARD_ID1 [13] BOARD_ID2 [13] BOARD_ID3 [13] BOARD_ID4 [13]

AD23 [15]

AD24 [15] AD25 [15] AD26 [15] AD27 [15]

D17

SW@RB501V-40

+3V

LPC_LAD0 [27,34] LPC_LAD1 [27,34] LPC_LAD2 [27,34] LPC_LAD3 [27,34]

LPC_LFRAME# [27,34]

IRQ_SERIRQ [34]

ALLOW_LDTSTOP [2,9]

CPU_PWRGD_SVID_REG [2,37]

CPU_LDT_STOP# [2,9]

CPU_LDT_RST# [2]

RTC_CLK [34]

+AVBAT

C793

0.1u/10V_4

+3V +3V

21

2

+AVBAT

20MIL

C792

1U/10V_4

Change from 0ohm to 1K for safty issue

A13

R339

R330

*2.2K_4

2.2K_4

2

Q26

*MMBT3904

1 3

+3V

R524

SW@2K/F_4

PE_GPIO2_R

PCH_ODD_EN [28] DGPU_VRON [12,40,41]

CLKRUN# [34]

dGPU_PWROK [19]

PE_GPIO0 [16]

C747

C747 *5.6p/50V_4

*5.6p/50V_4

INTRUDER_ALERT# Left not connected (Southbridge has 50-kohm internal pull-up to VBAT).

R545 *1M/F_4R545 *1M/F_4

20MIL

+BAT

CPU_MEMHOT# [2,5,6]

A26

A12

C750

C750 *22p/50V_4

*22p/50V_4

A62

R286*10K/F_4 R286*10K/F_4

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

R582 499/F_4R582 499/F_4

R573 10_4R573 10_4

20MIL

+3VRTC

BAT1

BAT_CONN

PE_GPIO2_R [24]

LPC_CLK0 [15] LPC_CLK1 [15] PCLK_DEBUG [27] CLK_PCI_775 [34]

for EMI suggestion

+3V_S5

CPU_PROCHOT# [2]

352-(&7=5

SB820-PCIE/PCI/CPU/LPC 1/4

R559

R559 1K/F_4

1K/F_4

12

+AVBAT

20MIL

+3VRTC_1

D30

D30 RB500V-40

RB500V-40 D28

D28 RB500V-40

RB500V-40

+VCCRTC_2

20MIL

1

12

+3VPCU

of

11 49

1A

5

+3V_S5

NC only ,Can't be install

R352 *2.2K_4R352 *2.2K_4 R350 *2.2K_4R350 *2.2K_4 R347 *2.2K_4R347 *2.2K_4

D D

C C

B B

A A

+3V

SCL0/SDATA0 is 3V tolerance AMD datasheet define it

R288 2.2K_4R288 2.2K_4 R287 2.2K_4R287 2.2K_4

+3V_S5

SCL1/SDATA1 is 3V/S5 tolerance AMD datasheet define it

R348 10K_4R348 10K_4 R346 10K_4R346 10K_4

+3V_S5

SCL2/SDATA2 is 3V/S5 tolerance AMD datasheet define it

R290 10K_4R290 10K_4 R283 10K_4R283 10K_4

+3V

R338 4.7K_4R338 4.7K_4

dGPU_VRON

2ms

MXM_PWR_EN

MXM_PWREN[19]

DGPU_VRON[11,40,41]

>1mS delay is required between all MXM power rail stable and MXM_PWREN(enables the module internal power)

+3V

A61

R474 8.2K_4R474 8.2K_4 R486 8.2K_4R486 8.2K_4

ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

ACZ_RST# ACZ_SDIN0

If the VDDIO_AZ_S power rail is configured for 1.5V_S5 then AZ_SDIN[3:0] can not be connected to 3.3-V devices.

SB_TEST0 SB_TEST1 SB_TEST2

PCLK_SMB PDAT_SMB

MXM_PWR_EN

CLK_PCIE_LAN_REQ# CLK_PCIE_2_REQ#

R570 33_4R570 33_4

R552 33_4R552 33_4

R569 33_4R569 33_4

R554 33_4R554 33_4

5

Clock gen/Robson/TV tuner /DDR2/DDR2 thermal/Accelerometer

SB_SMBCLK1 SB_SMBDATA1

SB_SCLK2 SB_SDATA2

SUS_STAT#

D19

SW@RB501V-40

D18

D18 *SW@RB501V-40

*SW@RB501V-40

C815 *10P/50V_4C815 *10P/50V_4

C800 *10P/50V_4C800 *10P/50V_4

C814 *10P/50V_4C814 *10P/50V_4

+3V

R307

R307 SW@4.7K_4

SW@4.7K_4

21

SW@0.1u/10V_4

21

A14

ACZ_SDOUT_AUDIO [29]

ACZ_SYNC_AUDIO [29]

ACZ_BITCLK_AUDIO [29]

ACZ_RST#_AUDIO [29]

ACZ_SDIN0 [29]

B2-TEST C04

C538

ACZ_SDOUT[15]

4

http://hobi-elektronika.net

SUSB#[34] SUSC#[34]

DNBSWON#[34]

SB_PWRGD_IN[15]

SUS_STAT#[9]

SIO_A20GATE[34]

SIO_RCIN#[34]

SIO_EXT_SMI#[34] SIO_EXT_SCI#[34]

PCIE_WAKE#[26] USBP12- [31]

CPU_THERMTRIP#[2]

NB_PWRGD_IN[9,15]

ICH_RSMRST#[34]

SB_GPIO_PCIE_RST#[11]

CLK_PCIE_LAN_REQ#[26]

SPKR[29] PCLK_SMB[5,6,26,27,46] PDAT_SMB[5,6,26,27,46]

CLK_PCIE_2_REQ#[27]

VGA_REQ#[17]

SP_DDR3_RST#[7]

OC_7#[31]

OC_6#[31]

PM_THERM#[2,4,33]

OC_4#[31]

R306 *0_4R306 *0_4

R149 *Short_4R149 *Short_4

HD audio interface is +3VS5 voltage

R555 *10K/F_4R555 *10K/F_4 R337 *10K/F_4R337 *10K/F_4

R336 *10K/F_4R336 *10K/F_4 R571 *10K/F_4R571 *10K/F_4 R327 *10K/F_4R327 *10K/F_4

+3V_S5

R553 10K_4R553 10K_4 R322 10K_4R322 10K_4

R558 10K_4R558 10K_4

D03

R343 10K_4R343 10K_4

R344 10K_4R344 10K_4

CN24

*S/W_JTAG_DEBUG

4

+3V_S5

1 2 3 4 5 6 7 8

SB_JTAG_TCK SB_JTAG_TDO SB_JTAG_TDI SB_TEST1

SB_JTAG_RST#

SB JTAG

T94T94

T95T95 T58T58

T37T37

T41T41

T35T35

SB_TEST0 SB_TEST1 SB_TEST2

LANLINK_STATE#

SYS_RST# PCIE_WAKE# IR_RX1 SB_THERMTRIP#

MXM_PWR_EN SB_GPIO59

PCLK_SMB PDAT_SMB SB_SMBCLK1 SB_SMBDATA1

VGA_REQ#_GPIO61

SB_JTAG_TDO SB_JTAG_TCK SB_JTAG_TDI SB_JTAG_RST#

ACZ_BCLK ACZ_SDOUT ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDIN3 ACZ_SYNC ACZ_RST#

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR ADP_PRES0

B2-TEST

DEL C816

AD21 AE21

AC19

AD19 AA16 AB21 AC18 AF20 AE19 AF19 AD22 AE22

AH21 AB18

AJ21

AA20

G29 D27

E27

J29

E23 E24 F21

F28 F29

3

+3V_S5[11,13,14,15,24,26,31,32,36,44] +3V[2,4,5,6,9,10,11,13,14,15,19,24,25,27,29,30,32,33,34,36,37,38,39,41,42,43,44,46]

U34D

J2

PCI_PME#/GEVENT4#

K1

RI#/GEVENT22#

D3

SPI_CS3#/GBE_STAT1/GEVENT21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_BTN#

H5

PWR_GOOD

G6

SUS_STAT#

B3

TEST0

C4

TEST1/TMS

F6

TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1#

K2

LPC_PME#/GEVENT3# LPC_SMI#/GEVENT23#

H2

GEVENT5#

J1

SYS_RESET#/GEVENT19#

H6

WAKE#/GEVENT8#

F3

IR_RX1/GEVENT20#

J6

THRMTRIP#/SMBALERT#/GEVENT2# NB_PWRGD

G1

RSMRST# CLK_REQ4#/SATA_IS0#/GPIO64

CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47

F5

SCL1/GPIO227

F4

SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61

E1

IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOWN#/GPIO51

H4

DDR3_RST#/GEVENT7#

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9#

G5

GBE_LED2/GEVENT10#

K3

GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN

H3

BLINK/USB_OC7#/GEVENT18#

D1

USB_OC6#/IR_TX1/GEVENT6#

E4

USB_OC5#/IR_TX0/GEVENT17#

D4

USB_OC4#/IR_RX0/GEVENT16#

E8

USB_OC3#/AC_PRES/TDO/GEVENT15#

F7

USB_OC2#/TCK/GEVENT14#

E7

USB_OC1#/TDI/GEVENT13#

F8

USB_OC0#/TRST#/GEVENT12#

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST#

V7

GBE_PHY_INTR PS2_DAT/SDA4/GPIO187

PS2_CLK/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 FC_RST#/GPO160

PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192

SB820M_A12

+3V_S5 +3V

SB800

Part 4 of 5

GBE LAN

3

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

GPIO

USB OC

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199

HD AUDIO

EC_PWM3/EC_TIMER3/GPIO200

EMBEDDED CTRL

USB_RCOMP

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB_HSD13P USB_HSD13N

USB 1.1 USB MISCEMBEDDED CTRL

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB 2.0

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSI_0/GPIO201

KSI_1/GPIO202

KSI_2/GPIO203

KSI_3/GPIO204

KSI_4/GPIO205

KSI_5/GPIO206

KSI_6/GPIO207

KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

USB_FSD1N

USB_FSD0N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

2

USBCLK/41M_25M_48M_OSC pin is CLK input pin when EXT CLKGEN mode. It is output CLK source when INT CLKGEN mode.

A10

USB_RCOMP_SB

G19

J10 H11

USB_FDS12P

H9

USB_FSD12N

J8 B12

A12 F11

E11 E14

E12 J12

J14

A13

B13

D13

C13

G12

G14

G16

G18

D16

C16

B14

A14

E18

E16

J16

J18

B17

A17

A16

B16

SB_SCLK2

D25

SB_SDATA2

F23

SB_GPIO195

B26

SB_GPIO196

E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

2

R293 11.8K/F_6R293 11.8K/F_6

USBP13+ [31] USBP13- [31]

USBP12+ [31]

USBP10+ [30] USBP10- [30]

USBP9+ [31] USBP9- [31]

USBP8+ [31] USBP8- [31]

USBP7+ [27] USBP7- [27]

T61T61 T105T105

USBP1+ [24] USBP1- [24]

USBP0+ [31] USBP0- [31]

SB_GPIO195 SB_GPIO196

T106T106

T47T47 T49T49

h^ďŽĂƌĚ

h^ĐĂƌĚƌĞĂĚĞƌ

>hdKKd,

h^ďŽĂƌĚ

t>ED/E/Z

B2-TEST

h^DZ

KŶďŽĂƌĚh^ĐŽŶŶĞĐƚ

GPIO199 [15] GPIO200 [15]

R489 10K_4R489 10K_4 R275 10K_4R275 10K_4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet

1

13

SB820-ACPI/GPIO/USB 2/4

1

12 49

1A

of

5

SATA PORT 0,1,2,3 can support AHCI mode

SATA_TX0+[28]

SATA1

D D

SATA ODD

SATA_TX0-[28]

SATA_RX0-[28] SATA_RX0+[28]

SATA_TX1+[28] SATA_TX1-[28]

SATA_RX1-[28] SATA_RX1+[28]

C777 0.01u/16V_4C777 0.01u/16V_4 C775 0.01u/16V_4C775 0.01u/16V_4

C774 0.01u/16V_4C774 0.01u/16V_4 C769 0.01u/16V_4C769 0.01u/16V_4

Signal Name Explanation

SB800 A11: 800 ohm 1% resistor to GND.

SATA_CALRP

P/N:CS18062FB00(806 Ohm) SB800 A12: 1k ohm 1% resistor to GND.

SB800 A11: 931-? 1% resistor to VDDAN_11_SATA.

SATA_CALRN

C C

B B

SB800 A12: TBD-? 1% resistor to VDDAN_11_SATA.

+1.1V_AVDD_SATA

PLACE SATA_CAL RES VERY CLOSE TO BALL OF SB820

R300 SP_A12@1K/F_4R300 SP_A12@1K/F_4 R298 SP_A12@931/F_4R298 SP_A12@931/F_4

SATA_ACT#[32]

C760 GN@22P/50V_4C760 GN@22P/50V_4

A60

C754 GN@22P/50V_4C754 GN@22P/50V_4

+3V_S5

B2-TEST

+3V

Y7

GN@25MHZ

T53T53 T60T60 T56T56 T45T45 T57T57

R302 10K_4R302 10K_4

21

R528 SP@10K_4R528 SP@10K_4 R437 *10K_4R437 *10K_4

SATA_TX0+_C SATA_TX0-_C

SATA_TX1+_C SATA_TX1-_C

SATA_CALRP SATA_CALRN

SB_GPIO164 SB_GPIO163 SB_GPIO162 SB_GPIO165 SB_GPIO161

A05

4

SATA_X1

R507

R507 GN@1M_4

GN@1M_4

SATA_X2

U34B

AH9

AJ9 AJ8

AH8

AH10

AJ10

AG10 AF10

AG12 AF12

AJ12

AH12 AH14

AJ14

AG14 AF14

AG17 AF17

AJ17

AH17

AJ18

AH18 AH19

AJ19

AB14 AA14

AD11

AD16

AC16

J5 E2 K4 K9

G2

SB820M_A12

SIDE_PORT_ID0 SIDE_PORT_ID1

3

http://hobi-elektronika.net

SB800

SATA_TX0P SATA_TX0N

SATA_RX0N SATA_RX0P

SATA_TX1P SATA_TX1N

SATA_RX1N SATA_RX1P

SATA_TX2P SATA_TX2N

SATA_RX2N SATA_RX2P

SATA_TX3P SATA_TX3N

SATA_RX3N SATA_RX3P

SATA_TX4P SATA_TX4N

SATA_RX4N SATA_RX4P

SATA_TX5P SATA_TX5N

SATA_RX5N SATA_RX5P

SATA_CALRP SATA_CALRN

SATA_ACT#/GPIO67

SATA_X1

SATA_X2

SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/GPIO161

R316 SP@10K_4R316 SP@10K_4 R320 10K_4R320 10K_4

SB800

Part 2 of 5

SERIAL ATA

TEMPIN3/TALERT#/GPIO174

HW MONITOR

SPI ROM

FC_FBCLKOUT

FC_FBCLKIN

FC_OE#/GPIOD145

FC_AVD#/GPIOD146

FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150

FC_INT1/GPIOD144 FC_INT2/GPIOD147

FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140

FLASH

FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMP_COMM VIN0/GPIO175

VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

HYX

FC_CLK

NC1 NC2

ID0ID1

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

G27 Y2

0

1SAM

WWAN_DET# CPPE_NC1# CRD_REQ1#

TEMPIN0 TEMPIN1 MB_THRMDA_SB SB_GPIO174

SB_GPIO175 SB_GPIO176 SIDE_PORT_ID0 SIDE_PORT_ID1

T80T80 T81T81 T78T78

T75T75 T77T77 T82T82 T76T76 T74T74 T79T79

IF THERE IS NO IDE, TEST

T84T84

POINTS FOR DEBUG BUS

T83T83

IS MANDATORY

T33T33 T86T86 T85T85 T90T90 T88T88 T91T91 T93T93 T92T92 T87T87 T89T89 T97T97 T98T98 T99T99 T101T101 T102T102

T52T52 T48T48 T54T54

MEM_1V5 [11]

A55

+3V

A04

2

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4

R311 10K_4R311 10K_4

R324 SW@10K_4R324 SW@10K_4

R517 SP@10K_4R517 SP@10K_4

R273 *SP@10K_4R273 *SP@10K_4

R272 *10K_4R272 *10K_4

+1.1V_AVDD_SATA[14]

+3V_S5[11,12,14,15,24,26,31,32,36,44]

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

+1.1V_AVDD_SATA +3V_S5

TEMPIN0 TEMPIN1 MB_THRMDA_SB SB_GPIO174 SB_GPIO175 SB_GPIO176

BOARD_ID0 [11] BOARD_ID1 [11] BOARD_ID2 [11] BOARD_ID3 [11] BOARD_ID4 [11]

R314 *10K_4R314 *10K_4

R323 *IV@10K_4R323 *IV@10K_4

R304 *SP@10K_4R304 *SP@10K_4

R274 SP@10K_4R274 SP@10K_4

R271 10K_4R271 10K_4

1

14

R519 10K_4R519 10K_4 R511 10K_4R511 10K_4 R521 10K_4R521 10K_4 R313 10K_4R313 10K_4 R526 10K_4R526 10K_4 R523 10K_4R523 10K_4

ATI0100

Board ID

DDR3 Sideport Memory Device

Vendor P/N

Hynix

A A

Samsung

5

H5TQ1G63BFR-12C

K4W1G1646E-HC12

STN B/S P/N

AKD5LZGTW04 (64M*16)

AKD5LGGT506 (64M*16)

4

SizeVendor

1GB

BOARD_ID2 GPIO12

0 (WO/Sideport)

1 (W/Sideport)

SIDE_PORT_ID1 GPIO178

0

SIDE_PORT_ID0 GPIO177

0

1

3

0

1

BOARD_ID4 GPIO14

N/A (Default)

N/A

BOARD_ID3 GPIO13

JV51-DN (3-DIMM) (Default)

JM51-DN (2-DIMM)

2

BOARD_ID2 GPIO12

WO/Sideport

W/Sideport (Default)

BOARD_ID1 GPIO11

UMA

Discrete (Default)

Size Document Number Rev

Date: Sheet

Date: Sheet of

BOARD_ID0 GPIO10

14"

15.6" (Default)

352-(&7=5

4XDQWD&RPSXWHU,QF

SATA/IDE/HWM/SPI 3/4

Wednesday, May 27, 2009

1

of

13 49

1A

5

VDDQ--3.3V I/O power

R325 *Short_8R325 *Short_8

+3V

C535

C543

C544

*10U/6.3V_8

D D

*10U/6.3V_8

C543

10U/6.3V_8

0.1u/10V_4

C534

0.1u/10V_4

A41

L46

A41

+3V

L45

+1.1V

UPB201212T-121Y-N_8

C C

+1.1V

+3V_S5

B B

If the VDDIO_AZ_S power rail is configured for

1.5V_S5 then AZ_SDIN[3:0] can not be connected to 3.3-V devices.

+3V_S5

C495

*10U/6.3V_8

A41

L49

L49 UPB201212T-121Y-N_8

UPB201212T-121Y-N_8

A41

L67

PBY160808T-221Y-N

For support USB wakeup-->3V_S5

+1.1V_S5

R315 *Short_6R315 *Short_6

+3V

+1.1V_AVDD_SATA

10U/6.3V_8

+3.3V_VDDAN_USB

L46

PBY160808T-221Y-N

+1.1V_PCIE_VDDR

C502

10U/6.3V_8

1U/10V_4

L54

PBY160808T-221Y-N

C510

C512

0.1u/10V_4

C753

C753 10U/6.3V_8

10U/6.3V_8

L52

PBY160808T-221Y-N

+VDDIO_AZ

C479

C541

2.2u/6.3V_6

C478

0.1u/10V_4

A41

C516

0.1u/10V_4

C531

C531 10U/6.3V_8

10U/6.3V_8

A41

+1.1V_VDDAN_USB

C490

2.2u/6.3V_6

C477

0.1u/10V_4

+3V_VDDPL_SATA

C523

2.2u/6.3V_6

C514

C514 1U/10V_4

1U/10V_4

C511

C511 1U/10V_4

1U/10V_4

C528

2.2u/6.3V_6

4

C539

0.1u/10V_4

43mA

C487

C487 *0.1u/10V_4

*0.1u/10V_4

600mA

C481

0.1u/10V_4

93mA

C524

*0.1u/10V_4

567mA

C513

C513 1U/10V_4

1U/10V_4

658mA

C518

C518 1U/10V_4

1U/10V_4

xx mA

C532

0.1u/10V_4

L53 0_6L53 0_6

AH1

V6

Y19

AE5

AC21

AA2 AB4 AC8 AA7 AA9

AF7

AA19

AF22 AE25 AF24 AC22

AE28

U26

V22

V26

V27

V28

V29

W22 W26

AD14

AJ20 AF18 AH20

AG19

AE18 AD18 AE16

A18 A19 A20 B18 B19

B20 C18 C20 D18 D19 D20

E19

C11 D11

C521

0.1u/10V_4

U34C

SB820M_A12

3

PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.

http://hobi-elektronika.net

VDD-- S/B CORE power

Part 3 of 5

SB800

POWER

+1.1V_USB_PHY_R+1.1V_S5

C520

0.1u/10V_4

SB800

VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12

VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4

VDDPL_33_PCIE

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDPL_33_SATA VDDAN_11_SATA_1

VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7

VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12

VDDAN_11_USB_S_1 VDDAN_11_USB_S_2

PCI/GPIO I/O

FLASH I/O

PCI EXPRESSSERIAL ATA

C530

10U/6.3V_8

Part 3 of 5

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7

CORE S03.3V_S5 I/O

VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDRF_GBE_S

VDDIO_33_GBE_S

VDDCR_11_GBE_S_1

GBE LAN

VDDCR_11_GBE_S_2

VDDIO_GBE_S_1 VDDIO_GBE_S_2

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

CORE S5

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

VDDPL_33_SYS

USB I/O

VDDPL_11_SYS_S

PLL CLKGEN I/O

VDDPL_33_USB_S

VDDAN_33_HWM_S

VDDXL_33_S

+3V

510mA131mA

N13 R15 N17 U13 U17 V12 V18 W12 W18

xx mA

K28 K29 J28 K26 J21 J20 K21 J22

V1 M10

L7 L9

M6 P8

32mA

A21 D21 B21 K10 L10 J9 T6 T8

113mA

F26 G26

xx mA

M8

197mA

A11 B11

M21 L22 F19 D6 L20

A41

L43

PBY160808T-221Y-N

+1.1V_VDDCR+3V_VDDIO_PCIGP

C526

0.1u/10V_4

+1.1V_VDDAN_CLK

C496

0.1u/10V_4

SB820 without GBE: Connected to GND plane.

+3V_VDDIO

+1.1V_VDDCR_11

+VDDIO_AZ

+1.1V_USB_PHY_R

+3V_VDDPL +1.1V_VDDPL VDDPL_33_USB_S +3V_HWM_VDDAN

C509

C509 *0.1u/10V_4

*0.1u/10V_4

C515

2.2u/6.3V_6

C527

0.1u/10V_4

C488

0.1u/10V_4

C505

C505 *0.1u/10V_4

*0.1u/10V_4

47mA 62mA 17mA 5mA

L51

L51 PBY160808T-221Y-N

PBY160808T-221Y-N

+3V_VDDPL

C507

C507 *0.1u/10V_4

*0.1u/10V_4

C522

C522 1U/10V_4

1U/10V_4

C497

C497 1U/10V_4

1U/10V_4

C504

2.2u/6.3V_6

C498

C498 1U/10V_4

1U/10V_4

A41

C468

2.2u/6.3V_6

C525

C525 1U/10V_4

1U/10V_4

C489

C489 1U/10V_4

1U/10V_4

C493

C493 1U/10V_4

1U/10V_4

C458

C458 10U/6.3V_8

10U/6.3V_8

C506

2.2u/6.3V_6

2

R295 *Short_6R295 *Short_6

C517

C517 10U/6.3V_8

10U/6.3V_8

A41

L48

UPB201212T-121Y-N_8

C457

C457 *10U/6.3V_8

*10U/6.3V_8

R292 *Short_6R292 *Short_6

R278 *Short_6R278 *Short_6

+3V_S5

+1.1V

+3V_S5

+1.1V_S5

U34E

Y14

VSSIO_SATA_1

Y16

VSSIO_SATA_2

AB16

VSSIO_SATA_3

AC14

VSSIO_SATA_4

AE12

VSSIO_SATA_5

AE14

VSSIO_SATA_6

AF9

VSSIO_SATA_7

AF11

VSSIO_SATA_8

AF13

VSSIO_SATA_9

AF16

VSSIO_SATA_10

AG8

VSSIO_SATA_11

AH7

VSSIO_SATA_12

AH11

VSSIO_SATA_13

AH13

VSSIO_SATA_14

AH16

VSSIO_SATA_15

AJ7

VSSIO_SATA_16

AJ11

VSSIO_SATA_17

AJ13

VSSIO_SATA_18

AJ16

VSSIO_SATA_19

A9

VSSIO_USB_1

B10

VSSIO_USB_2

K11

VSSIO_USB_3

B9

VSSIO_USB_4

D10

VSSIO_USB_5

D12

VSSIO_USB_6

D14

VSSIO_USB_7

D17

VSSIO_USB_8

E9

VSSIO_USB_9

F9

VSSIO_USB_10

F12

VSSIO_USB_11

F14

VSSIO_USB_12

F16

VSSIO_USB_13

C9

VSSIO_USB_14

G11

VSSIO_USB_15

F18

VSSIO_USB_16

D9

VSSIO_USB_17

H12

VSSIO_USB_18

H14

VSSIO_USB_19

H16

VSSIO_USB_20

H18

VSSIO_USB_21

J11

VSSIO_USB_22

J19

VSSIO_USB_23

K12

VSSIO_USB_24

K14

VSSIO_USB_25

K16

VSSIO_USB_26

K18

VSSIO_USB_27

H19

VSSIO_USB_28

Y4

EFUSE

D8

VSSAN_HWM

M19

VSSXL

P21

VSSIO_PCIECLK_1

P20

VSSIO_PCIECLK_2

M22

VSSIO_PCIECLK_3

M24

VSSIO_PCIECLK_4

M26

VSSIO_PCIECLK_5

P22

VSSIO_PCIECLK_6

P24

VSSIO_PCIECLK_7

P26

VSSIO_PCIECLK_8

T20

VSSIO_PCIECLK_9

T22

VSSIO_PCIECLK_10

T24

VSSIO_PCIECLK_11

V20

VSSIO_PCIECLK_12

J23

VSSIO_PCIECLK_13

SB820M_A12

SB800

Part 5 of 5

1

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43

GROUND

VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52

VSSPL_SYS

VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27

15

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W1

0 AJ28 B29 U4 Y1

8

Y1

0

Y1

2 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

A41

A A

+3V_S5 +3V_HWM_VDDAN

L56

PBY160808T-221Y-N

5

C553

0.1u/10V_4

C550

2.2u/6.3V_6

A41

L47

PBY160808T-221Y-N

4

+1.1V_VDDPL+1.1V_S5

C501

C501 *0.1u/10V_4

*0.1u/10V_4

C499

2.2u/6.3V_6

3

R289 0_4R289 0_4

D04

C623

0.1u/10V_4

VDDPL_33_USB_S+3V_S5

C469

2.2u/6.3V_6

2

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

+3V[2,4,5,6,9,10,11,12,13,15,19,24,25,27,29,30,32,33,34,36,37,38,39,41,42,43,44,46] +1.1V[2,7,8,9,10,38,44] +3V_S5[11,12,13,15,24,26,31,32,36,44]

+1.1V_S5[38]

SB820-PWR/DECOUPLING 4/4

1

+3V +1.1V +3V_S5 +1.1V_S5

of

14 49

1A

5

4

3

2

1

OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.

16

REQUIRED STRAPS

http://hobi-elektronika.net

For internal

SB820M is supported Gen1 mode only.

D D

GPIO199[12] GPIO200[12] LPC_CLK1[11] LPC_CLK0[11] PCI_CLK4[11] PCI_CLK3[11] PCI_CLK2[11] PCI_CLK1[11]

ACZ_SDOUT[12]

C C

D02

PULL HIGH

PULL LOW

This is required as the low power mode is not supported on the SB8xx

+3V_S5 +3V+3V +3V +3V +3V_S5+3V_S5

R342

AZ_SDOUT

PERFORMANCE MODE

DEFAULT

R556

R556 *10K_4

*10K_4

R557

R557 10K_4

10K_4

PCI_CLK1

ALLOW PCIE Gen2

FORCE PCIE Gen1

DEFAULT

R342 *10K_4

*10K_4

R334

R334 10K_4

10K_4

PCI_CLK2

Watchdog Timer Enable

Watchdog Timer Disable

DEFAULT

R550

R550 *10K_4

*10K_4

R551

R551 10K_4

10K_4

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

R340

R340 *10K_4

*10K_4

R332

R332 10K_4

10K_4

PCI_CLK4

non_Fusion CLOCK MODE

DEFAULT

Fusion CLOCK MODE

R341

R341 10K_4

10K_4

R333

R333 *10K_4

*10K_4

LPC_CLK0

EC ENABLED

EC DISABLED

DEFAULT

DEBUG STRAPS

clock GEN.

R501

R501 10K_4

10K_4

LPC_CLK1

INT. CLKGEN ENABLED

DEFAULT

EXT. CLKGEN ENABLE

A15

R500

R500 10K_4

10K_4

R498

R498 *GN@10K_4

*GN@10K_4

GPIO200 GPIO199

H, H=Reserved H, L=SPI ROM

L,H=LPC ROM L, L=FWH ROM

internal have pull Hi 10K

R294

2.2K_4

DEFAULT

R277

R277 10K_4

10K_4

R291

R291 *2.2K_4

*2.2K_4

+3V_S5[11,12,13,14,24,26,31,32,36,44] +1.8V[7,9,10,24,37,42,43,44]

+3V_S5 +1.8V

SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

B B

A A

AD23[11] AD24[11] AD25[11] AD26[11] AD27[11]

R312

R312 *2.2K_4

*2.2K_4

R305

R305 *2.2K_4

*2.2K_4

PCI_AD25 PCI_AD24

USE FC PLL

DEFAULT

BYPASS FC PLL

DISABLE I2C ROM

DEFAULT

ENABLE I2C ROM use REQ3# as SDA use GNT3# as SCL

4

R310

R310 *2.2K_4

*2.2K_4

R301

R301 *2.2K_4

*2.2K_4

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULT

ENABLE PCI MEM BOOT

+3V_S5

CPU_COREPG[37,39]

PWROK_EC[4,34]

R567 10K_4R567 10K_4

*2.2U/6.3V_6

B2-TEST

3

PULL HIGH

PULL LOW

5

R549

R549 *2.2K_4

*2.2K_4

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

NB_PWRGD_IN: RS880/RX881 = 1.8V; Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)

C809

A63

POWERGOOD_EC_CPU

D29*BAS316 D29*BAS316

D24BAS316 D24BAS316

ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)

U38

1

NC

VCC

2

A

3

GND

*NL17SZ17DFT2G

*NL17SZ17DFT2G SOT-353

IC(5P) NL17SZ17DFT2G(SOT-353)AL17SZ17000

R568 *Short_4R568 *Short_4

+1.8V

5

4

Y

C802 *0.1u/10V_4C802 *0.1u/10V_4

R581 *33_4R581 *33_4

SOT-353 SOT23-5

2

SB_PWRGD_IN [12]

NB/SB POWER GOOD CIRCUIT

NB_PWRGD_IN [9,12]

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet of

Date: Sheet

SB820-STRAPS

Wednesday, May 27, 2009

of

15 49

1

15 49

1A

5

4

3

2

1

http://hobi-elektronika.net

D D

Park XT P/N:AJ077400T08

PEG_TXP0[8] PEG_TXN0[8]

PEG_TXP1[8] PEG_TXN1[8]

PEG_TXP2[8] PEG_TXN2[8]

PEG_TXP3[8] PEG_TXN3[8]

PEG_TXP4[8] PEG_TXN4[8]

PEG_TXP5[8] PEG_TXN5[8]

PEG_TXP6[8]

C C

B B

For Broadway, Madis on and Park the PWRGOOD ball must be conne ccted to ground

PEG_TXN6[8]

PEG_TXP7[8] PEG_TXN7[8]

PEG_TXP8[8] PEG_TXN8[8]

PEG_TXP9[8] PEG_TXN9[8]

PEG_TXP10[8] PEG_TXN10[8]

PEG_TXP11[8] PEG_TXN11[8]

PEG_TXP12[8] PEG_TXN12[8]

PEG_TXP13[8] PEG_TXN13[8]

PEG_TXP14[8] PEG_TXN14[8]

PEG_TXP15[8] PEG_TXN15[8]

CLK_PCIE_VGAP[11]

CLK_PCIE_VGAN[11]

R38 SW@10K_4R38 SW@10K_4

dGPU_PCIE_RST#[ 24]

dGPU_PCIE_RST#

U23A

AA38

PCIE_R X0P

Y37

PCIE_R X0N

Y35

PCIE_R X1P

W36

PCIE_R X1N

W38

PCIE_R X2P

V37

PCIE_R X2N

V35

PCIE_R X3P

U36

PCIE_R X3N

U38

PCIE_R X4P

T37

PCIE_R X4N

T35

PCIE_R X5P

R36

PCIE_R X5N

R38

PCIE_R X6P

P37

PCIE_R X6N

P35

PCIE_R X7P

N36

PCIE_R X7N

N38

PCIE_R X8P

M37

PCIE_R X8N

M35

PCIE_R X9P

L36

PCIE_R X9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AJ21

NC#1

AK21

NC#2

AH16

PWRG OOD

AA30

PERSTB

SPE@Madison/Broadway_M2

PEG_RXP0_ C PEG_RXN0_C

PEG_RXP1_ C PEG_RXN1_C

PEG_RXP2_ C PEG_RXN2_C

PEG_RXP3_ C PEG_RXN3_C

PEG_RXP4_ C PEG_RXN4_C

PEG_RXP5_ C PEG_RXN5_C

PEG_RXP6_ C PEG_RXN6_C

PEG_RXP7_ C PEG_RXN7_C

PEG_RXP8_ C PEG_RXN8_C

PEG_RXP9_ C PEG_RXN9_C

PEG_RXP10_C PEG_RXN10_C

PEG_RXP11_C PEG_RXN11_C

PEG_RXP12_C PEG_RXN12_C

PEG_RXP13_C PEG_RXN13_C

PEG_RXP14_C PEG_RXN14_C

PEG_RXP15_C PEG_RXN15_C

C139 SW@0.1u/10V_4C139 SW@0.1u/10V_4 C155 SW@0.1u/10V_4C155 SW@0.1u/10V_4

C131 SW@0.1u/10V_4C131 SW@0.1u/10V_4 C137 SW@0.1u/10V_4C137 SW@0.1u/10V_4

C129 SW@0.1u/10V_4C129 SW@0.1u/10V_4 C120 SW@0.1u/10V_4C120 SW@0.1u/10V_4

C116 SW@0.1u/10V_4C116 SW@0.1u/10V_4 C111 SW@0.1u/10V_4C111 SW@0.1u/10V_4

C109 SW@0.1u/10V_4C109 SW@0.1u/10V_4

C99 SW@0.1u/10V_4C99 SW@0.1u/10V_4 C94 SW@0.1u/10V_4C94 SW@0.1u/10V_4

C89 SW@0.1u/10V_4C89 SW@0.1u/10V_4 C83 SW@0.1u/10V_4C83 SW@0.1u/10V_4

C82 SW@0.1u/10V_4C82 SW@0.1u/10V_4 C76 SW@0.1u/10V_4C76 SW@0.1u/10V_4

C70 SW@0.1u/10V_4C70 SW@0.1u/10V_4 C68 SW@0.1u/10V_4C68 SW@0.1u/10V_4

C67 SW@0.1u/10V_4C67 SW@0.1u/10V_4 C60 SW@0.1u/10V_4C60 SW@0.1u/10V_4

C58 SW@0.1u/10V_4C58 SW@0.1u/10V_4 C55 SW@0.1u/10V_4C55 SW@0.1u/10V_4

C53 SW@0.1u/10V_4C53 SW@0.1u/10V_4 C50 SW@0.1u/10V_4C50 SW@0.1u/10V_4

C43 SW@0.1u/10V_4C43 SW@0.1u/10V_4 C48 SW@0.1u/10V_4C48 SW@0.1u/10V_4

C40 SW@0.1u/10V_4C40 SW@0.1u/10V_4 C42 SW@0.1u/10V_4C42 SW@0.1u/10V_4

C34 SW@0.1u/10V_4C34 SW@0.1u/10V_4 C36 SW@0.1u/10V_4C36 SW@0.1u/10V_4

C38 SW@0.1u/10V_4C38 SW@0.1u/10V_4 C37 SW@0.1u/10V_4C37 SW@0.1u/10V_4

Y33

PCIE_TX0 P

Y32

PCIE_TX0 N

W33

PCIE_TX1 P

W32

PCIE_TX1 N

U33

PCIE_TX2 P

U32

PCIE_TX2 N

U30

PCIE_TX3 P

U29

PCIE_TX3 N

T33

PCIE_TX4 P

T32

PCI EXPRESS INTERFACE

PCIE_TX4 N

T30

PCIE_TX5 P

T29

PCIE_TX5 N

P33

PCIE_TX6 P

P32

PCIE_TX6 N

P30

PCIE_TX7 P

P29

PCIE_TX7 N

N33

PCIE_TX8 P

N32

PCIE_TX8 N

N30

PCIE_TX9 P

N29

PCIE_TX9 N

L33

PCIE_TX10P

L32

PCIE_TX1 0N

L30

PCIE_TX11P

L29

PCIE_TX1 1N

K33

PCIE_TX12P

K32

PCIE_TX1 2N

J33

PCIE_TX13P

J32

PCIE_TX1 3N

K30

PCIE_TX14P

K29

PCIE_TX1 4N

H33

PCIE_TX15P

H32

PCIE_TX1 5N

For M97, Broadway, Madison and Park PCIE_VDDC is 1.0V

CALIBRATION

PCIE_C ALRP PCIE_C ALRN

R26 SW@1.27K/F_4R26 SW@1.27K/F_4

Y30

R23 SW@2K/F_4R23 SW@2K/F_4

Y29

+1V

+1.0V

PEG_RXP0 [8] PEG_RXN0 [8]

PEG_RXP1 [8] PEG_RXN1 [8]

PEG_RXP2 [8] PEG_RXN2 [8]

PEG_RXP3 [8] PEG_RXN3 [8]

PEG_RXP4 [8] PEG_RXN4 [8]

PEG_RXP5 [8] PEG_RXN5 [8]

PEG_RXP6 [8] PEG_RXN6 [8]

PEG_RXP7 [8] PEG_RXN7 [8]

PEG_RXP8 [8] PEG_RXN8 [8]

PEG_RXP9 [8] PEG_RXN9 [8]

PEG_RXP10 [8] PEG_RXN1 0 [8]

PEG_RXP11 [8] PEG_RXN1 1 [8]

PEG_RXP12 [8] PEG_RXN1 2 [8]

PEG_RXP13 [8] PEG_RXN1 3 [8]

PEG_RXP14 [8] PEG_RXN1 4 [8]

PEG_RXP15 [8] PEG_RXN1 5 [8]

+3V_D +1V

+3V_D [17,19,21,24,25] +1V [ 17,19,20,42]

Add extra OSC for use SB clock.

B2-TEST

dGPU_PCIE_RST#

R62 *SPE@10K_4R62 *SPE@10K_4 R71 *SW@10K_4R71 *SW@10K_4 R109 *SPE@0_4R109 *SPE@0_4 R33 *SW@10K_4R33 *SW@10K_4C103 SW@0.1u/10V_4C103 SW@0.1u/10V_4

+3V_D

R73

R73 SW@10K_4

SW@10K_4

D2 BAS316D2 BAS316

2 1

D3 BAS316D3 BAS316

2 1

+3V_D

A_RST#_AND [11,26,27]

PE_GPIO0 [11]

B2-TEST FORM RB501 CHANGE TO BAS316

GPIO24_TRSTB[17] GPIO27_TMS[17]

GPIO26_TCK[17] GN_CLK_VGA_27M_NONSS [11] TESTEN[18]

JTAG SIGNAL STUFF OPTION FOR OPTION2

SIGNALS NORMAL MODE JTAG MODE (DEBUG)

GPIO24_TRSTB "0" (PD) "1" (PU)

GPIO27_TMS "1" (PU) "1" (PU)

GPIO26_TCK CLK "1" (PU)

TESTEN "1" (PU) "1" (PU)

17

A A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Docume n t Number Rev

Madison/Broadway-PCIE I/F

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

5

4

3

2

Wednesday, May 27, 2009

1

of

16 49

1A

5

+1.8V_GPU[19,20,21,43]

+1V[16,19,20,42]

+3V_D[16,19,21,24,25]

D D

GPU Power-on sequence

A17

1 => +3V_D 2 => +VGPU_CORE 3 => +VGPU_IO

1.8V GPIO

4 => +1V 5 => +1.5V_GPU 6 => +1.8V_GPU 7 => dGPU_PWROK

*SW@10K_4

+3V_D

C C

+3V_D

B B

JTAG DEBUG PORT

R78 *SW@10K_4R78 *SW@10K_4 R77 *SW@10K_4R77 *SW@10K_4 R75 *SW@10K_4R75 *SW@10K_4 R63 *SW@10K_4R63 *SW@10K_4 R76 *SW@10K_4R76 *SW@10K_4

R61 SW@10K_4R61 SW@10K_4

R65

*SW@10K_4

GPIO24_TRSTB GPIO26_TCK GPIO27_TMS GPIO25_TDI GPIO28_TDO

GPIO26_TCK

*SW@10K_4

R66

A41

120 ohm/300mA

+1.8V_GPU

SW@BLM15BB121SS1L10 SW @BLM15BB121SS1L10

C200

C200 SW@10U/6.3V_6

SW@10U/6.3V_6

A41

120 ohm/300mA

+1V

SW@BLM15BB121SS1L12 SW @BLM15BB121SS1L12

C205

C205 SW@10U/6.3V_6

SW@10U/6.3V_6

A41

120 ohm/300mA

+1.8V_GPU

A A

SW@BLM15BB121SS1L6 SW@BLM15BB121SS1L6

C180

C180 SW@10U/6.3V_6

SW@10U/6.3V_6

A36

+1.8V(75mA)

+1.0V(125mA)

+1.8V(5mA)

EV_LVDS_BLON

A21

VGA_REQ #[12]

C201

C201 SW@1U/10V_4

SW@1U/10V_4

C211

C211 SW@1U/10V_4

SW@1U/10V_4

C181

C181 SW@0.1u/10V_4

SW@0.1u/10V_4

+3V_D

DPLL_PVDD

C185

C185 SW@0.1u/10V_4

SW@0.1u/10V_4

DPLL_VDDC

C186

C186 SW@0.1u/10V_4

SW@0.1u/10V_4

TS_VDD

R409

R409 *SW@10K/F_4

*SW@10K/F_4

R403

R403 *SW@10K/F_4

*SW@10K/F_4

4

+1.8V_GPU +1V +3V_D

RAM_STRAP0[21] RAM_STRAP1[21] RAM_STRAP2[21]

GPU_GPIO0[21] GPU_GPIO1[21]

GPU_GPIO2[21] GPIO3_SMBDAT[21] GPIO4_SMBCLK[21]

EV_LVDS_BLON[24]

SOUT_GPIO8[21] SIN_GPIO9[21] SCLK_GPIO10[21] GPU_GPIO11[21] GPU_GPIO12[21] GPU_GPIO13[21]

GPU_VID1[41]

ALT#_GPIO17[21]

TEMP_FAIL[4] GPU_VID2[41]

SCS#_GPIO22[21]

GPIO24_TRSTB[16]

GPIO26_TCK[16]

GPIO27_TMS[16]

EXT_HDMI_HPD[25]

C617 SW@18P/50V_4C617 SW @18P/50V_4

SW@27MHZY3SW@27MHZ

C616 SW@18P/50V_4C616 SW @18P/50V_4

&ŽƌWĂƌŬͲDϮEƉŝŶ

&ŽƌWĂƌŬͲDϮEƉŝŶ sWdͺϭϳΕsWdͺϮϯ

+3V_D

R37

R37 SW@10K_4

SW@10K_4

T100T100

A18

T36T36

EV_LVDS_BLON

T10T10

A18

T14T14 T12T12

A18

T11T11

GPIO24_TRSTB GPIO25_TDI

T104T104

GPIO26_TCK GPIO27_TMS GPIO28_TDO

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+1.8V_GPU

R104

R104 SW@499/F_4

SW@499/F_4

R105

SW@249/F_4

21

R404

Y3

SW@1M/F_4

GPU_D+[21] GPU_D-[21]

T7T7

3

U23B

http://hobi-elektronika.net

T16T16

R57

R57 SW@10K_4

SW@10K_4

VREFG

C226

C226 SW@0.1u/10V_4

SW@0.1u/10V_4

DPLL_PVDD

DPLL_VDDC

XTALI_27M XTALO_27M

TS_VDD

MUTI GFX

AR8

DVPCNTL_ MVP_0

AU8

DVPCNTL_ MVP_1

AP8

DVPCNTL_ 0

AW8

DVPCNTL_ 1

AR3

DVPCNTL_ 2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

I2C

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16_SSIN

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF

AH24

GENERICG

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AJ32

TSVDD

AJ33

TSVSS

SPE@Madison/Broadway_M2

PLL/CLOCK

THERMAL

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

DPD

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

DAC1

DAC2

A2VDDQ

DDC/AUX

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

HSYNC VSYNC

RSET AVDD

AVSSQ

VDD1DI VSS1DI

COMP

H2SYNC V2SYNC

VDD2DI VSS2DI

A2VDD

A2VSSQ

R2SET

AUX1P AUX1N

AUX2P AUX2N

R

RB

G

GB

B

BB

R2

R2B

G2

G2B

B2

B2B

C Y

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39 AD37

AE36 AD35

AF37 AE38

AC36 AC38

R34 SW@499/F_4R34 SW@499/F _4

AB34 AD34

AE34 AC33

AC34

AC30 AC31

AD30 AD31

AF30 AF31

AC32

32

AD AF32

AD29 AC29

AG31 AG32

AG33

A2VDDQ

AD33 AF33

R29

AA29

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30 AM30

AL29 AM29

AN21 AM21

AJ30 AJ31

AK30 AK29

EXT_HDMICLK+ [25] EXT_HDMICLK- [25]

EXT_HDMITX0P [25] EXT_HDMITX0N [25]

EXT_HDMITX1P [25] EXT_HDMITX1N [25]

EXT_HDMITX2P [25] EXT_HDMITX2N [25]

T64T64 T62T62

T65T65 T63T63

T66T66 T67T67

T68T68 T71T71

WŚĂŶŶĞůŝƐEŽŶWZ<

EXT_HSYNC [21,24] EXT_VSYNC [21,24]

AVDD

VDD1DI

T5T5

V2SYNC [21]

VDD1DI

C158

C158 SW@0.1u/10V_4

SW@0.1u/10V_4

SW@715/F_4

EV_HDMI_DDCCK [25]

EV_HDMI_DDCDAT [25]

T13T13 T15T15

yyͺhyϰyŝƐEŽŶWZ<

EV_LVDS_DDCCLK [24] EV_LVDS_DDCDAT [24]

EV_CRTDCLK [24]

EV_CRTDDAT [24]

yyͺhyϳyŝƐEŽŶWZ<ĂŶĚDϵy

(3.3V@130mA A2VDD)

+3V_D

CRT

R399

R399 SW@150/F_4

SW@150/F_4

HDMI

LVDS

2

U23G

LVDS CONTROL

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

DPF

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

LVTMDP

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

DPE

TXOUT_L1N_DPE1N TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

SPE@Madison/Broadway_M2

R398

R398 SW@150/F_4

SW@150/F_4

AVDD

C184

C184 SW@0.1u/10V_4

SW@0.1u/10V_4

VDD1DI

C134

C134 SW@0.1u/10V_4

SW@0.1u/10V_4

A2VDDQ

VARY_BL

DIGON

TXOUT_U3P TXOUT_U3N

TXOUT_L3P

TXOUT_L3N

R397

R397 SW@150/F_4

SW@150/F_4

(1.8V@100mA VDD1DI)

(1.8V@2mA A2VDDQ)

C135

C135 SW@0.1u/10V_4

SW@0.1u/10V_4

R44

R44 R51

R51

AK27 AJ27

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

EXT_CRT_RED [24]

EXT_CRT_GRE [24]

EXT_CRT_BLU [24]

(1.8V@70mA AVDD )

C178

SW@1U/6.3V_4

C119

SW@1U/6.3V_4

SW@10K_4

SW@10K_4 SW@10K_4

SW@10K_4

&ŽƌĚƵĂůůŝŶŬƉĂŶĞů

EV_TXLCLKOUT+ [24] EV_TXLCLKOUT- [24]

EV_TXLOUT0+ [24] EV_TXLOUT0- [24]

EV_TXLOUT1+ [24] EV_TXLOUT1- [24]

EV_TXLOUT2+ [24] EV_TXLOUT2- [24]

A41

120 ohm/300mA

C169

C169 SW@10U/6.3V_6

SW@10U/6.3V_6

A41

120 ohm/300mA

C102

C102 SW@10U/6.3V_6

SW@10U/6.3V_6

A41

120 ohm/300mA

C187

C187 SW@1U/6.3V_4

SW@1U/6.3V_4

EV_LVDS_BRIGHT [24] EV_LVDS_VDDEN [24]

SW@BLM15BB121SS1L8 SW@BLM15BB121SS1L8

SW@BLM15BB121SS1L3 SW@BLM15BB121SS1L3

SW@BLM15BB121SS1L7 SW@BLM15BB121SS1L7

1

18

&Žƌ^ŝŶŐĂůůŝŶŬƉĂŶĞů

+1.8V_GPU

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Docume n t Number Rev

Madison/Broadway-HOST I/F

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

5

4

3

2

Wednesday, May 27, 2009

1

of

17 49

1A

5

4

3

2

1

http://hobi-elektronika.net

+1.5V_GPU

R379

R379 SW@40.2/F_4

SW@40.2/F_4

VMA_DQ[63..0] VMA_DM[7..0] VMA_RDQS[7..0] VMA_WDQS[7..0]

VMA_MA[13..0]

C575

SW@0.1u/10V_4

+1.5V_GPU

VMA_DQ 0 VMA_DQ 1 VMA_DQ 2 VMA_DQ 3 VMA_DQ 4 VMA_DQ 5 VMA_DQ 6 VMA_DQ 7 VMA_DQ 8 VMA_DQ 9 VMA_DQ 10 VMA_DQ 11 VMA_DQ 12 VMA_DQ 13 VMA_DQ 14 VMA_DQ 15 VMA_DQ 16 VMA_DQ 17 VMA_DQ 18 VMA_DQ 19 VMA_DQ 20 VMA_DQ 21 VMA_DQ 22 VMA_DQ 23 VMA_DQ 24 VMA_DQ 25 VMA_DQ 26 VMA_DQ 27 VMA_DQ 28 VMA_DQ 29 VMA_DQ 30 VMA_DQ 31 VMA_DQ 32 VMA_DQ 33 VMA_DQ 34 VMA_DQ 35 VMA_DQ 36 VMA_DQ 37 VMA_DQ 38 VMA_DQ 39 VMA_DQ 40 VMA_DQ 41 VMA_DQ 42 VMA_DQ 43 VMA_DQ 44 VMA_DQ 45 VMA_DQ 46 VMA_DQ 47 VMA_DQ 48 VMA_DQ 49 VMA_DQ 50 VMA_DQ 51 VMA_DQ 52 VMA_DQ 53 VMA_DQ 54 VMA_DQ 55 VMA_DQ 56 VMA_DQ 57 VMA_DQ 58 VMA_DQ 59 VMA_DQ 60 VMA_DQ 61 VMA_DQ 62 VMA_DQ 63

MVREFDA MVREFSA

R16 SPE@243/F_4R16 SPE@243/F_4 R22 *SPE@243/F_4R22 *SPE@243/F_4 R36 SPE@243/F_4R36 SPE@243/F_4

R17 *SPE@243/F_4R17 *SPE@243/F_4 R20 SPE@243/F_4R20 SPE@243/F_4 R81 SPE@243/F_4R81 SPE@243/F_4

Default Madison

U23C

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C37

DQA0_0/DQA_0

C35

DQA0_1/DQA_1

A35

DQA0_2/DQA_2

E34

DQA0_3/DQA_3

G32

DQA0_4/DQA_4

D33

DQA0_5/DQA_5

F32

DQA0_6/DQA_6

E32

DQA0_7/DQA_7

D31

DQA0_8/DQA_8

F30

DQA0_9/DQA_9

C30

DQA0_10/DQA_10

A30

DQA0_11/DQA_11

F28

DQA0_12/DQA_12

C28

DQA0_13/DQA_13

A28

DQA0_14/DQA_14

E28

DQA0_15/DQA_15

D27

DQA0_16/DQA_16

F26

DQA0_17/DQA_17

C26

DQA0_18/DQA_18

A26

DQA0_19/DQA_19

F24

DQA0_20/DQA_20

C24

DQA0_21/DQA_21

A24

DQA0_22/DQA_22

E24

DQA0_23/DQA_23

C22

DQA0_24/DQA_24

A22

DQA0_25/DQA_25

F22

DQA0_26/DQA_26

D21

DQA0_27/DQA_27

A20

DQA0_28/DQA_28

F20

DQA0_29/DQA_29

D19

DQA0_30/DQA_30

E18

DQA0_31/DQA_31

C18

DQA1_0/DQA_32

A18

DQA1_1/DQA_33

F18

DQA1_2/DQA_34

D17

DQA1_3/DQA_35

A16

DQA1_4/DQA_36

F16

DQA1_5/DQA_37

D15

DQA1_6/DQA_38

E14

DQA1_7/DQA_39

F14

DQA1_8/DQA_40

D13

DQA1_9/DQA_41

F12

DQA1_10/DQA_42

A12

DQA1_11/DQA_43

D11

DQA1_12/DQA_44

F10

DQA1_13/DQA_45

A10

DQA1_14/DQA_46

C10

DQA1_15/DQA_47

G13

DQA1_16/DQA_48

H13

DQA1_17/DQA_49

J13

DQA1_18/DQA_50

H11

DQA1_19/DQA_51

G10

DQA1_20/DQA_52

G8

DQA1_21/DQA_53

K9

DQA1_22/DQA_54

K10

DQA1_23/DQA_55

G9

DQA1_24/DQA_56

A8

DQA1_25/DQA_57

C8

DQA1_26/DQA_58

E8

DQA1_27/DQA_59

A6

DQA1_28/DQA_60

C6

DQA1_29/DQA_61

E6

DQA1_30/DQA_62

A5

DQA1_31/DQA_63

L18

MVREFDA

L20

MVREFSA

L27

MEM_CALRN0

N12

MEM_CALRN1

AG12

MEM_CALRN2

M12

MEM_CALRP1

M27

MEM_CALRP0

AH12

MEM_CALRP2

AL31

RSVD

SPE@Madison/Broadway_M2

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

G24

MAA0_0/MAA_0

J23

MAA0_1/MAA_1

H24

MAA0_2/MAA_2

J24

MAA0_3/MAA_3

H26

MAA0_4/MAA_4

J26

MAA0_5/MAA_5

H21

MAA0_6/MAA_6

G21

MAA0_7/MAA_7

H19

MAA1_0/MAA_8

H20

MAA1_1/MAA_9

L13

MAA1_2/MAA_10

G16

MAA1_3/MAA_11

J16

MAA1_4/MAA_12

ADBIA0/ODTA0 ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B RASA0B

RASA1B CASA0B

CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0 CKEA1

WEA0B WEA1B

MAA0_8 MAA1_8

GDDR5

H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21 G19

H27 G27

J14 H14

K23 K19

K20 K17

K24 K27

M13 K16

K21 J20

K26 L15

H23 J19

MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0

MAA1_7/MAA_A15_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

MEMORY INTERFACE A

WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7

DDBIA0_0/QSA_0B/WDQSA_0 DDBIA0_1/QSA_1B/WDQSA_1 DDBIA0_2/QSA_2B/WDQSA_2 DDBIA0_3/QSA_3B/WDQSA_3 DDBIA1_0/QSA_4B/WDQSA_4 DDBIA1_1/QSA_5B/WDQSA_5 DDBIA1_2/QSA_6B/WDQSA_6 DDBIA1_3/QSA_7B/WDQSA_7

VMB_DQ[63..0][23]

VMB_DM[7..0][23]

VMB_RDQS[7..0][23]

Ra

Rb

VMB_WDQS[7..0][23]

+1.5V_GPU

R28

R28 SW@40.2/F_4

SW@40.2/F_4

R27

R27 SW@100/F_4

SW@100/F_4

VMB_MA [13.. 0][23]

+1.5V_GPU

VMA_MA 0 VMA_MA 1 VMA_MA 2 VMA_MA 3 VMA_MA 4 VMA_MA 5 VMA_MA 6 VMA_MA 7 VMA_MA 8 VMA_MA 9 VMA_MA 10 VMA_MA 11 VMA_MA 12 VMA_BA2 VMA_BA0 VMA_BA1

VMA_DM 0 VMA_DM 1 VMA_DM 2 VMA_DM 3 VMA_DM 4 VMA_DM 5 VMA_DM 6 VMA_DM 7

VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7

VMA_W DQS0 VMA_W DQS1 VMA_W DQS2 VMA_W DQS3 VMA_W DQS4 VMA_W DQS5 VMA_W DQS6 VMA_W DQS7

VMA_MA 13 VMB_MA 13

VMA_BA2 [22] VMA_BA0 [22] VMA_BA1 [22]

QSA[7..0]

QSA#[7..0]

VMA_ODT0 [22] VMA_OD T1 [22 ]

VMA_CLKP0 [22] VMA_CLKN0 [22]

VMA_CLKP1 [22] VMA_CLKN1 [22]

VMA_RAS0# [22] VMA_RAS1# [22]

VMA_CAS0# [22] VMA_CAS1# [22]

VMA_CS 0# [2 2]

VMA_CS 1# [2 2]

VMA_CKE0 [22] VMA_CKE1 [22]

VMA_W E0# [2 2] VMA_W E1# [2 2]

Ra

VMA_DQ[63..0][22]

VMA_DM[7..0][22]

VMA_RDQS[7..0][22]

VMA_WDQS[7..0][22]

D D

C C

B B

Ra

Rb

+1.5V_GPU

R382

R382 SW@40.2/F_4

SW@40.2/F_4

R381

R381 SW@100/F_4

SW@100/F_4

VMA_MA[13..0][22]

Ra

For MadisonFor PARK

C574

R380

Rb

SW@100/F_4

C574 SW@0.1u/10V_4

SW@0.1u/10V_4

MEM_CALRNP0

MEM_CALRNP1

MEM_CALRNP2

For M97,Broadway,madison & PARK only.

stuff

Rb

R102

R102 SW@40.2/F_4

SW@40.2/F_4

R103

R103 SW@100/F_4

SW@100/F_4

VMB_DQ[63..0] VMB_DM[7..0] VMB_RDQS[7..0] VMB_WDQS[7..0]

VMB_MA[13..0]

C118

C118 SW@0.1u/10V_4

SW@0.1u/10V_4

TESTEN[16]

C225

C225 SW@0.1u/10V_4

SW@0.1u/10V_4

B2-TEST

MVREFSB

A19

R30

R30 SW@10K_4

SW@10K_4

R83

*SW@0_4

VMB_DQ 0 VMB_DQ 1 VMB_DQ 2 VMB_DQ 3 VMB_DQ 4 VMB_DQ 5 VMB_DQ 6 VMB_DQ 7 VMB_DQ 8 VMB_DQ 9 VMB_DQ 10 VMB_DQ 11 VMB_DQ 12 VMB_DQ 13 VMB_DQ 14 VMB_DQ 15 VMB_DQ 16 VMB_DQ 17 VMB_DQ 18 VMB_DQ 19 VMB_DQ 20 VMB_DQ 21 VMB_DQ 22 VMB_DQ 23 VMB_DQ 24 VMB_DQ 25 VMB_DQ 26 VMB_DQ 27 VMB_DQ 28 VMB_DQ 29 VMB_DQ 30 VMB_DQ 31 VMB_DQ 32 VMB_DQ 33 VMB_DQ 34 VMB_DQ 35 VMB_DQ 36 VMB_DQ 37 VMB_DQ 38 VMB_DQ 39 VMB_DQ 40 VMB_DQ 41 VMB_DQ 42 VMB_DQ 43 VMB_DQ 44 VMB_DQ 45 VMB_DQ 46 VMB_DQ 47 VMB_DQ 48 VMB_DQ 49 VMB_DQ 50 VMB_DQ 51 VMB_DQ 52 VMB_DQ 53 VMB_DQ 54 VMB_DQ 55 VMB_DQ 56 VMB_DQ 57 VMB_DQ 58 VMB_DQ 59 VMB_DQ 60 VMB_DQ 61 VMB_DQ 62 VMB_DQ 63

MVREFDB MVREFSB

R82

R82 *SW@0_4

*SW@0_4

AA12

AD28 AK10

AL10

C5 C3

G4

M6 M1 M3 M5

R4

AA4 AB6 AB1

AB3 AD6 AD1 AD3 AD5

AF1

AF3

AF6 AG4 AH5 AH6

AJ4

AK3

AF8

AF9 AG8 AG7

AK9

AL7 AM8 AM7

AK1

AL4 AM6 AM1 AN4

AP3

AP1

AP5

Y12

U23D

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

DQB0_0/DQB_0 DQB0_1/DQB_1

E3

DQB0_2/DQB_2

E1

DQB0_3/DQB_3

F1

DQB0_4/DQB_4

F3

DQB0_5/DQB_5

F5

DQB0_6/DQB_6 DQB0_7/DQB_7

H5

DQB0_8/DQB_8

H6

DQB0_9/DQB_9

J4

DQB0_10/DQB_10

K6

DQB0_11/DQB_11

K5

DQB0_12/DQB_12

L4

DQB0_13/DQB_13 DQB0_14/DQB_14 DQB0_15/DQB_15 DQB0_16/DQB_16 DQB0_17/DQB_17

N4

DQB0_18/DQB_18

P6

DQB0_19/DQB_19

P5

DQB0_20/DQB_20 DQB0_21/DQB_21

T6

DQB0_22/DQB_22

T1

DQB0_23/DQB_23

U4

DQB0_24/DQB_24

V6

DQB0_25/DQB_25

V1

DQB0_26/DQB_26

V3

DQB0_27/DQB_27

Y6

DQB0_28/DQB_28

Y1

DQB0_29/DQB_29

Y3

DQB0_30/DQB_30

Y5

DQB0_31/DQB_31 DQB1_0/DQB_32 DQB1_1/DQB_33 DQB1_2/DQB_34 DQB1_3/DQB_35 DQB1_4/DQB_36 DQB1_5/DQB_37 DQB1_6/DQB_38 DQB1_7/DQB_39 DQB1_8/DQB_40 DQB1_9/DQB_41 DQB1_10/DQB_42 DQB1_11/DQB_43 DQB1_12/DQB_44 DQB1_13/DQB_45 DQB1_14/DQB_46 DQB1_15/DQB_47 DQB1_16/DQB_48 DQB1_17/DQB_49 DQB1_18/DQB_50 DQB1_19/DQB_51 DQB1_20/DQB_52 DQB1_21/DQB_53 DQB1_22/DQB_54 DQB1_23/DQB_55 DQB1_24/DQB_56 DQB1_25/DQB_57 DQB1_26/DQB_58 DQB1_27/DQB_59 DQB1_28/DQB_60 DQB1_29/DQB_61 DQB1_30/DQB_62 DQB1_31/DQB_63

MVREFDB MVREFSB

TESTEN CLKTESTA

CLKTESTB

SPE@Madison/Broadway_M2

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8

MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

MEMORY INTERFACE B

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7

ADBIB0/ODTB0 ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B RASB0B

RASB1B CASB0B

CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB0_8 MAB1_8

GDDR5

DRAM_RST

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8

AH11

VMB_MA 0 VMB_MA 1 VMB_MA 2 VMB_MA 3 VMB_MA 4 VMB_MA 5 VMB_MA 6 VMB_MA 7 VMB_MA 8 VMB_MA 9 VMB_MA 10 VMB_MA 11 VMB_MA 12 VMB_BA2 VMB_BA0 VMB_BA1

VMB_DM 0 VMB_DM 1 VMB_DM 2 VMB_DM 3 VMB_DM 4 VMB_DM 5 VMB_DM 6 VMB_DM 7

VMB_RD QS0 VMB_RD QS1 VMB_RD QS2 VMB_RD QS3 VMB_RD QS4 VMB_RD QS5 VMB_RD QS6 VMB_RD QS7

VMB_W DQS0 VMB_W DQS1 VMB_W DQS2 VMB_W DQS3 VMB_W DQS4 VMB_W DQS5 VMB_W DQS6 VMB_W DQS7

DRAM_RST

Ca

VMB_BA2 [23] VMB_BA0 [23] VMB_BA1 [23]

QSB[7..0]

QSB#[7..0]

VMB_OD T0 [23 ] VMB_ODT1 [23]

VMB_CLKP0 [23] VMB_CLKN0 [23]

VMB_CLKP1 [23] VMB_CLKN1 [23]

VMB_RAS0# [23] VMB_RAS1# [23]

VMB_CAS0# [23] VMB_CAS1# [23]

VMB_CS0# [23]

VMB_CS1# [23]

VMB_CKE0 [23] VMB_CKE1 [23]

VMB_WE0# [23] VMB_WE1# [23]

A19

Rd

R107 SPE@51/F_4R107 SPE@51/F_4

C229

C229 SPE@68P/50V_4

SPE@68P/50V_4

+1.5V_GPU

R106

R106 SW@10K/F_4

SW@10K/F_4

Re

R108

R108 *SW@4.7K_4

*SW@4.7K_4

Rc

Default Madison

MEM_RST# [22,23]

19

DDR3/GDDR3 Memory Stuff Option

GDDR5

+1.5V_VGA

Ra 40.2R

Rb

For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1.

A A

For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1.

Broadway no daul rank support for GDDR5

5

1.5V

40.2R

100R

GDDR3

1.8V/1.5V

100R

DDR3(Default)

1.5V

40.2R

100R

4

+1.5V_GPU

3

+1.5V_GPU [19,22,23, 40,43]

2

Designator

This basic topology should be used for DRAM_RST for DDR3/GDDR3/GDDR5.These Capacitors and Resistor values are an example only. The Series R and || Cap values will depend on the DRAM load and will have to be calculated for different Memory ,DRAM Load and board to pass Reset Signal Spec.

For M97-M2

Rc

Rd

Re

Ca

For Mannhatton

10K

0R/Short

DNI

2.2nF

10K

51R

DNI

68pF

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Docume n t Number Rev

Madison/Broadway-MEM I/F

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

1

of

18 49

1A

+1.5V_GPU +1.8V_GPU +1V

+VGPU_CORE +3V

+1.5V_GPU

D D

For DDR3, MVDDQ = 1.5V ( 7.5A)

C591

C591 SW@10U/6.3V_6

SW@10U/6.3V_6

C56

C56 SW@1U/6.3V_4

SW@1U/6.3V_4

C54

C54 SW@1U/6.3V_4

SW@1U/6.3V_4

C136

C136 SW@1U/6.3V_4

SW@1U/6.3V_4

5

+1.5V_GPU [18,22,23,40,43] +1.8V_GPU [17,20,21,43] +1V [16,17,20,42]

+VGPU_CORE [41,44] +3V [2,4,5,6,9,10,11,12,13,14,15,24,25,27,29,30,32,33, 34,36,37,38,39,41,42,43,44,46]

C66

C66 SW@10U/6.3V_6

SW@10U/6.3V_6

C49

C49 SW@1U/6.3V_4

SW@1U/6.3V_4

C149

C149 SW@1U/6.3V_4

SW@1U/6.3V_4

C51

C51 SW@0.1u/10V_4

SW@0.1u/10V_4

C590

C590 SW@10U/6.3V_6

SW@10U/6.3V_6

C62

C62 SW@1U/6.3V_4

SW@1U/6.3V_4

C150

C150 SW@1U/6.3V_4

SW@1U/6.3V_4

C24

C24 SW@0.1u/10V_4

SW@0.1u/10V_4

C594

C594 SW@10U/6.3V_6

SW@10U/6.3V_6

C165

C165 SW@1U/6.3V_4

SW@1U/6.3V_4

C25

C25 SW@1U/6.3V_4

SW@1U/6.3V_4

C81

SW@0.1u/10V_4

C593

C593 SW@10U/6.3V_6

SW@10U/6.3V_6

C157

C157 SW@1U/6.3V_4

SW@1U/6.3V_4

C64

C64 SW@1U/6.3V_4

SW@1U/6.3V_4

C47

C47 SW@0.1u/10V_4

SW@0.1u/10V_4

C57

C57 SW@1U/6.3V_4

SW@1U/6.3V_4

C63

C63 SW@1U/6.3V_4

SW@1U/6.3V_4

A41

120 ohm/300mA

L58

+3V_D

L58 SW@BLM15BB121SS1

SW@BLM15BB121SS1

R609

R609 SW@0_6

SW@0_6

(3.3V@60mA))

+1.8V_GPU

C C

C202

C202 SW@10U/6.3V_6

SW@10U/6.3V_6

A41

L17

SW@BLM15BB121SS1

(1.8V@110mA VDD_CT)

C615

C615 SW@10U/6.3V_6

SW@10U/6.3V_6

+3V_D_VDDR3

C161

C161 SW@1U/6.3V_4

SW@1U/6.3V_4

120 ohm/300mA

C228

C228 SW@1U/6.3V_4

SW@1U/6.3V_4

C166

C166 SW@1U/6.3V_4

SW@1U/6.3V_4

C191

C191 SW@1U/6.3V_4

SW@1U/6.3V_4

VDDC_CT

C153

C153 SW@0.1u/10V_4

SW@0.1u/10V_4

C198

C198 SW@1U/6.3V_4

SW@1U/6.3V_4

VDDR4

C227

SW@0.1u/10V_4

T2T2 T1T1

T4T4 T3T3

A41

120 ohm/300mA

L57

+1.8V_GPU

SW@BLM15BB121SS1

A41

B B

+1.8V_GPU

120 ohm/300mA

L1

L1 SW@BLM15BB121SS1

SW@BLM15BB121SS1

A41

120 ohm/300mA

L13

+1.8V_GPU

SW@BLM15BB121SS1

A41

120 ohm/300mA

L14

+1V

SW@BLM15BB121SS1

A A

+1.8V_GPU

(1.8V@40mA PCIE_PVDD )

C610

C610 SW@10U/6.3V_6

SW@10U/6.3V_6

(1.8V@150mA MPV18)

C44

C44 SW@10U/6.3V_6

SW@10U/6.3V_6

(1.8V@75mA SPV18)

(1.0V@120mA SPV10)

R97

R97 SW@10K_4

SW@10K_4

Q7

2

SW@PDTC143TT

1 3

5

C_G

C608

C608 SW@1U/6.3V_4

SW@1U/6.3V_4

C52

C52 SW@1U/6.3V_4

SW@1U/6.3V_4

C213

C213 SW@10U/6.3V_6

SW@10U/6.3V_6

C214

C214 SW@10U/6.3V_6

SW@10U/6.3V_6

+3V

R95

R95 SW@10K_4

SW@10K_4

3

2

1

C606

C606 SW@0.1u/10V_4

SW@0.1u/10V_4

C46

C46 SW@0.1u/10V_4

SW@0.1u/10V_4

C208

C208 SW@0.1u/10V_4

SW@0.1u/10V_4

C209

C209 SW@0.1u/10V_4

SW@0.1u/10V_4

GPU all PWROK

dGPU_PWROK [11]

Q9

Q9 SW@2N7002K

SW@2N7002K

PCIE_PVD D MPV18

SPV18 SPV10

T9T9

T6T6

T8T8

4

U23E

MEM I/O

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

LEVEL TRANSLATION

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

I/O

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR4#4

AF15

VDDR4#5

AG13

VDDR4#7

AG15

VDDR4#8

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#6

M20

NC_VDDRHA

M21

NC_VSSRHA

V12

NC_VDDRHB

U12

NC_VSSRHB

PLL

AB37

PCIE_PVD D

H7

MPV18#1

H8

MPV18#2

AM10

SPV18

AN9

SPV10

AN10

SPVSS

VOLTAGE

VOLTAGE SENESE

SENESE

AF28

FB_VDDC

AG28

FB_VDDCI

AH29

FB_GND

SPE@Madison/Broadway_M2

4

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

VDDC#1

CORE

VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15

POWER

VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8 VDDCI#9

VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15

ISOLATED

VDDCI#16

CORE I/O

VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22

3

http://hobi-elektronika.net

(1.8V@400mA PCIE_VDDR)

C108

C112

C112 SW@1U/6.3V_4

SW@1U/6.3V_4

C133

C133 SW@1U/6.3V_4

SW@1U/6.3V_4

(1.0V@1.1A PCIE_VDDC)

C65

SW@1U/6.3V_4

C88

C113

C113 SW@1U/6.3V_4

SW@1U/6.3V_4

C140

C140 SW@1U/6.3V_4

SW@1U/6.3V_4

C125

C125 SW@1U/6.3V_4

SW@1U/6.3V_4

BIF_VDDC should be connected to VDDC if B ACO feature not used. For BACO, refer to the databook (Separate Core power for PCIe bus macros Connector to VDDCin non-ower-Xpress desingns

C88

C115

SW@1U/6.3V_4

C167

C123

SW@1U/6.3V_4

C144

C168

SW@1U/6.3V_4

C106

C124

C124 SW@10U/6.3V_6

SW@10U/6.3V_6

PIN different between Broadway and Madison

C106 SW@10U/6.3V_6

SW@10U/6.3V_6

VDDC#32 / BIF_VDDC (N27)

C59

SW@1U/6.3V_4

C138

C152

SW@1U/6.3V_4

C146

C159

SW@1U/6.3V_4

C100

C104

SW@1U/6.3V_4

C77

C77 SW@10U/6.3V_6

SW@10U/6.3V_6

ZR8

Broadway Madison

VDDC BIF_VDDC

C95

C221

C65

VDDC#42 / BIF_VDDC (T27) VDDC BIF_VDDC

GND#61 / PX_EN (AL21)

(AL31)

(GDDR5 1.12V@16A VDDCI) (DDR3 1.12V@4A VDDCI) or more

C114

C92

SW@1U/6.3V_4

C117

C117 SW@10U/6.3V_6

SW@10U/6.3V_6

+3V +3V

R133

R133 SW@4.7K_4

SW@4.7K_4

2

Q11

1 3

3

C130

C130 SW@10U/6.3V_6

SW@10U/6.3V_6

2

SW@10u/6.3V_6

C71

C71 SW@1U/6.3V_4

SW@1U/6.3V_4

1

Q13

SW@AO3413

3

C248

C248 SW@10U/6.3V_6

SW@10U/6.3V_6

2

C9778

GND PX_EN

TS_A NC_TS_A

C148

C148 SW@1U/6.3V_4

SW@1U/6.3V_4

C73

C73 SW@1U/6.3V_4

SW@1U/6.3V_4

R113

R113 *SW@0_6

*SW@0_6

C261

C261 SW@1U/10V_4

SW@1U/10V_4

+3V

1

SW@AO3413

SW@AO3413 Q37

Q37

3

+VGPU_CORE

C91

C91 SW@1U/6.3V_4

SW@1U/6.3V_4

GPU +3V power

R596

R596 *SW@0_6

*SW@0_6

0.5A

C9779

C9779 SW@1u/10V_4

SW@1u/10V_4

MXM_PWREN[12]

+1.5V_GPU

AA31 AA32 AA33 AA34 V28 W29 W30 Y31

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

R98 SW@0_4R98 SW@0_4

R111 *SW@0_4R111 *SW @0_4

PCIE_VDDR

C122

C122 SW@0.1u/10V_4

SW@0.1u/10V_4

C84

C84 SW@1U/6.3V_4

SW@1U/6.3V_4

C87

C87 SW@1U/6.3V_4

SW@1U/6.3V_4

C176

C176 SW@1U/6.3V_4

SW@1U/6.3V_4

C132

C132 SW@1U/6.3V_4

SW@1U/6.3V_4

C126

C126 SW@10U/6.3V_6

SW@10U/6.3V_6

C79

C79 SW@1U/6.3V_4

SW@1U/6.3V_4

C151

C151 SW@10U/6.3V_6

SW@10U/6.3V_6

C223

*SW@1U/10V_4

C97

C97 SW@0.1u/10V_4

SW@0.1u/10V_4

C194

C194 SW@1U/6.3V_4

SW@1U/6.3V_4

C90

SW@1U/6.3V_4

C175

SW@1U/6.3V_4

C154

SW@1U/6.3V_4

C105

C105 SW@10U/6.3V_6

SW@10U/6.3V_6

DTC144EUA

B2-TEST

+1.8V_GPU

180 ohm/1.5A

L4

SW@HCB1608KF-181T15_6

C96

C98

SW@1U/6.3V_4

C80

C80 SW@1U/6.3V_4

SW@1U/6.3V_4

(30A or more)

C85

SW@1U/6.3V_4

C101

SW@1U/6.3V_4

C127

SW@1U/6.3V_4

C107

C107 SW@10U/6.3V_6

SW@10U/6.3V_6

C78

C78 SW@1U/6.3V_4

SW@1U/6.3V_4

C75

C75 SW@1U/6.3V_4

SW@1U/6.3V_4

0.5A

C262

C262 SW@0.1u/10V_4

SW@0.1u/10V_4

R595

R595 *SW@0_6

*SW@0_6

C9780

C9780 SW@.1u/10V_4

SW@.1u/10V_4

C86

C86 SW@1U/6.3V_4

SW@1U/6.3V_4

C145

C145 SW@1U/6.3V_4

SW@1U/6.3V_4

C110

C110 SW@1U/6.3V_4

SW@1U/6.3V_4

A34

+3V_D

+3V_D_EXT

C121

C121 SW@10U/6.3V_6

SW@10U/6.3V_6

+1V

C199

C199 SW@10U/6.3V_6

SW@10U/6.3V_6

+VGPU_CORE

C72

C72 SW@1U/6.3V_4

SW@1U/6.3V_4

A20

C128

SW@1U/6.3V_4

C160

SW@1U/6.3V_4

C93

SW@1U/6.3V_4

2

1

20

U23F

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

PCIE_VSS#10

J34

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

GND

F15 F17 F19 F21 F23 F25 F27 F29 F31 F33

F7 F9 G2 G6 H9

J2

J27

J6 J8

K14

K7 L11 L17

L2 L22 L24

L6 M17 M22 M24 N16 N18

N2 N21 N23 N26

N6 R15 R17

R2 R20 R22 R24 R27

R6 T11 T13 T16 T18 T21 T23 T26 U15 U17

U2 U20 U22 U24 U27

U6 V11 V16 V18 V21 V23 V26

W2

W6 Y15 Y17 Y20 Y22 Y24 Y27 U13 V13

2

GND

GND#100 GND#101 GND#102 GND#103 GND#104 GND#105 GND#106 GND#107 GND#108 GND#109 GND#110 GND#111 GND#112 GND#113 GND#114 GND#115 GND#116 GND#117 GND#118 GND#119 GND#120 GND#121 GND#122 GND#123 GND#124 GND#125 GND#126 GND#127 GND#128 GND#129 GND#130 GND#131 GND#132 GND#133 GND#134 GND#135 GND#136 GND#137 GND#138 GND#139 GND#140 GND#141 GND#142 GND#143 GND#144 GND#145 GND#146 GND#147 GND#148 GND#149 GND#150 GND#151 GND#153 GND#154 GND#155 GND#156 GND#157 GND#158 GND#159 GND#160 GND#161 GND#163 GND#164 GND#165 GND#166 GND#167 GND#168 GND#169 GND#170 GND#171 GND#172 GND#173 GND#174 GND#175 GND#152 GND#162

SPE@Madison/Broadway_M2

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 GND#99

VSS_MEC H#1 VSS_MEC H#2 VSS_MEC H#3

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26

AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 AW34 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

GND#61/ PX_EN PowerXpress control signal for Madsion and Park only If not used, can be disconnected. PX_EN = LOW, turn on PX_EN = HIGH, turn off PX_EN is used to turn ON/OFF some regulators for PowerXpress mode. An output high ‘3.3V’ will turn the regulators OFF. An output low ‘0V’ will turn the regulators ON. PX_EN outputs low (0V) by default. If this signal is unused, it can be NC (not connected) or connected to ground.

R64

R64 SPE@0_4

SPE@0_4

Pin AL21 to Ground for Broadway

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Docume n t Number Rev

Madison/Broadway (PWR/GND)

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

1

of

19 49

1A

5

4

3

2

1

http://hobi-elektronika.net

+1.8V_GPU +1V

D D

A41

+1.8V_GPU

120 ohm/300mA

L23

L23 SW@BLM15BB121SS1

SW@BLM15BB121SS1

R617 *Short_4R617 *Short_4

(1.8V@130mA DPA_VDD18)

C270

SW@10U/6.3V_6

(1.8V@130mA DPC_VDD18) (1.0V@110mA DPC_VDD10)

DPA_VDD18

C269

C271

C271 SW@0.1u/10V_4

SW@0.1u/10V_4

SW@1u/10V_6

DPC_VDD18 DPC_VDD10

B01 B01

C C

R410 SW@150/F_4R410 SW@150/F_4

DPE_VDD18

DPE_VDD10

+1.8V_GPU

L5

SW@HCB1608KF-181T15_6

B B

+1V

L9

SW@HCB1608KF-181T15_6

180 ohm/1.5A

(1.8V@400mA DPE/F_VDD18)

C163

C164

C164 SW@0.1u/10V_4

SW@0.1u/10V_4

C163

SW@1U/6.3V_4

(1.0V@400mA DPE/F_VDD10)

C193

C193 SW@0.1u/10V_4

SW@0.1u/10V_4

C183

C183 SW@1U/6.3V_4

SW@1U/6.3V_4

DPE_VDD18

C170

C170 SW@10U/6.3V_6

SW@10U/6.3V_6

DPE_VDD10

C192

C192 SW@10U/6.3V_6

SW@10U/6.3V_6

DPE_VDD18

DPE_VDD10

R54 SW@150/F_4R54 SW@150/F _4

DPC_VDD18

DPC_VDD10

DPC_VDD18

DPC_VDD10

DPCD_CALR

DPEF_CALR

+1.8V_GPU [17,19,21, 43] +1V [16,17,19,42]

U23H

AP20

DPC_VDD18#1

AP21

DPC_VDD18#2

AP13

DPC_VDD10#1

AT13

DPC_VDD10#2

AN17

DPC_VSSR#1

AP16

DPC_VSSR#2

AP17

DPC_VSSR#3

AW14

DPC_VSSR#4

AW16

DPC_VSSR#5

AP22

DPD_VDD18#1

AP23

DPD_VDD18#2

AP14

DPD_VDD10#1

AP15

DPD_VDD10#2

AN19

DPD_VSSR#1

AP18

DPD_VSSR#2

AP19

DPD_VSSR#3

AW20

DPD_VSSR#4

AW22

DPD_VSSR#5

AW18

DPCD_CALR

DP E/F POWER

AH34

DPE_VDD18#1

AJ34

DPE_VDD18#2

AL33

DPE_VDD10#1

AM33

DPE_VDD10#2

AN34

DPE_VSSR#1

AP39

DPE_VSSR#2

AR39

DPE_VSSR#3

AU37

DPE_VSSR#4

AW35

DPE_VSSR#5

AF34

DPF_VDD18#1

AG34

DPF_VDD18#2

AK33

DPF_VDD10#1

AK34

DPF_VDD10#2

AF39

DPF_VSSR#1

AH39

DPF_VSSR#2

AK39

DPF_VSSR#3

AL34

DPF_VSSR#4

AM34

DPF_VSSR#5

AM39

DPEF_CALR

SPE@Madison/Broadway_M2

D

E

F

DP A/B POWERDP C/D POWER

DPA_VDD18#1 DPA_VDD18#2

DPA_VDD10#1 DPA_VDD10#2

DPA_VSSR#1

ABC

DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5

DPB_VDD18#1 DPB_VDD18#2

DPB_VDD10#1 DPB_VDD10#2

DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5

DP PLL POWER

NC_DPF _PVDD NC_DPF _PVSS

DPAB_CALR

DPA_PVDD DPA_PVSS

DPB_PVDD DPB_PVSS

DPC_PVDD DPC_PVSS

DPD_PVDD DPD_PVSS

DPE_PVDD DPE_PVSS

AN24 AP24

AP31 AP32

AN27 AP27 AP28 AW24 AW26

AP25 AP26

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

AU28 AV27

AV29 AR28

AU18 AV17

AV19 AR18

AM37 AN38

AL38 AM35

DPA_VDD18

DPA_VDD10

DPA_VDD18

DPA_VDD10

DPAB_CALR DPA_PVDD

R402 SW@150/F_4R402 SW@150/F_4

C234

C234 SW@10U/6.3V_6

SW@10U/6.3V_6

DPB_PVDD

DPC_PVDD

DPD_PVDD

DPE_PVDD

C618

C618 SW@10U/6.3V_6

SW@10U/6.3V_6

DPA_VDD10

C204

C204 SW@10U/6.3V_6

SW@10U/6.3V_6

(1.8V@20mA DPA_PVDD)

C249

C249 SW@1U/6.3V_4

SW@1U/6.3V_4

(1.8V@40mA DPE/F_PVDD)

C634

C634 SW@1U/6.3V_4

SW@1U/6.3V_4

(1.0V@110mA DPA_VDD10)

C210

C210 SW@1U/6.3V_4

SW@1U/6.3V_4

120 ohm/300mA

L18

L18 SW@BLM15BB121SS1

C240

C240 SW@0.1u/10V_4

SW@0.1u/10V_4

C622

C622 SW@0.1u/10V_4

SW@0.1u/10V_4

SW@BLM15BB121SS1

R608 *SW@0_4R608 *SW @0_4

R612 *SW@0_4R612 *SW @0_4

R613 *SW@0_4R613 *SW @0_4

120 ohm/300mA

L59

L59 SW@BLM15BB121SS1

SW@BLM15BB121SS1

A41

120 ohm/300mA

L15

L15 SW@BLM15BB121SS1

SW@BLM15BB121SS1

C219

C219 SW@0.1u/10V_4

SW@0.1u/10V_4

+1V

R618 *Short_4R618 *Short_4

+1.8V_GPU

A42

+1.8V_GPU

21

A A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Docume n t Number Rev

Madison/Broadway (DP_PWR/GND)

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

5

4

3

2

Wednesday, May 27, 2009

1

of

20 49

1A

5

4

3

2

1

PIN STRAPS

+3V_D

SCS#_GPIO22

SIN_GPIO9

R55 *SPE@10K_4R55 *SPE@10K_4 R43 *SPE@10K_4R43 *SPE@10K_4

R39 *SW@10K_4R39 *SW@10K_4 R50 *SW@10K_4R50 *SW@10K_4

R148 *SPE@10K_4R148 *SPE@10K_4

R67 *SPE@10K_4R67 *SPE@10K_4 R80 **SPE@10K_4R80 **SPE@10K_4 R79 *SPE@10K_4R79 *SPE@10K_4

R416 *SPE@10K_4R416 *SPE@10K_4

R396 SW@10K_4R396 SW@10K_4 R395 SW@10K_4R395 SW@10K_4

R128 *SPE@10K_4R128 *SPE@10K_4 R418 *SPE@10K_4R418 *SPE@10K_4

GPU_GPIO0[17]

D D

GPU_GPIO1[17]

GPIO3_SMBDAT[17] GPIO4_SMBCLK[17]

Unconnected if no external BIOS ROM is used

GPU_GPIO13[17] GPU_GPIO12[17] GPU_GPIO11[17]

GPU_GPIO2[17]

EXT_HSYNC[17,24] EXT_VSYNC[17,24]

V2SYNC[17]

C C

Memory Aperture size

GPIO[13:11] Size

000

001

010

011

128MB

256MB

64MB

32MB

Function Table

EXT_HSYNC EXT_VSYNC

0 0 1

0 1 0

11

Discription

No Audio

Any one by dectec

DP only

Both DP & HDMI

SERIAL ROM

U12

SIN_GPIO9[17] SCLK_GPIO10[17] SCS#_GPIO22[17]

+3V_D_EXT

A20

B B

SIN_GPIO9

SCS#_GPIO22

R142 *SW@10K_4R142 *SW@10K_4

R134

*SW@10K_4

C283

C283 *SW@0.1U/10V_4

*SW@0.1U/10V_4

U12

5

D

6

C

1

S

7

HOLD

3

W

8

VCC

VSS

*SW@M25P10-AVMN6P

2

Q

4

SOUT_GPIO8 [17]

Thermal Sensor

A20

+3V_D_EXT

WINDBOND GMT AL000780003

A37

R611

R137

SW@10K_4

MXM_SMCLK12[34] MXM_SMDATA12[34]

A A

ALT#_GPIO17[17]

OVERT#

R611 *SW@10K_4

*SW@10K_4

U11

U11 8 7 6 4

SW@G780P81U

$''5(66$+

SCLK SDA ALERT# OVERT#

AL83L771K02

VCC DXP DXN

GND

P/NVendor

+3V_D_EXT

C244 SW@0.1u/10V_4C244 SW@0.1u/10V_4

1 2 3 5

A20

C252

C252 SW@2200P/50V_4

SW@2200P/50V_4

GPU_D+ [17]

GPU_D- [17]

http://hobi-elektronika.net

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CO NFLICT DURING RESET

STRAPS DESCRIPTION OF DEFAULT SET TINGSPIN

BIOS_ROM_EN

BIF_GEN2_EN_A

GPIO_8_ROMSO

GPIO_9_ROMSI

VIP_DEVICE_STRAP_ENA V2SYNC

DDR3 Memory Aperture size

C14 D10

+1.8V_GPU +3V_D

CONFIGURATION STRAPS

GPIO0TX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASI S EN ABLED

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

GPIO2

GPIO8 H2SYNCH2SYNC GPIO21GPIO_21_BB_EN

HSYNCAUD[1] VSYNCAUD[0]

GPIO9

Vendor P/N

Hynix

H5TQ1G63BFR-12C

K4W1G1646E-HC12

Samsung

AMD

23EY2387MA12-SZ AKD5LGGT700

+1.8V_GPU [17,19,20,43] +3V_D [16,17,19,24,25]

Samsung-1GB (Default)

RAM_STRAP2[17]

RAM_STRAP1[17]

RAM_STRAP0[17]

R406 *SPE@10K_4R406 *SPE@10K_4 R400

R400

R408 *SPE@10K_4R408 *SPE@10K_4 R405

R405

R407

R407 R401

R401

0 = 50% TX OUTPUT SW ING 1 = FULL TX OUTPUT SWING

0 = TX DE-EMPHASIS DISABLED 1 = TX DE-EMPHASIS ENABLED ENABLE EXTERNAL BIOS ROM 0 = DISABLE 1 = ENABLE

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT NUMONYX M25P10A : 101

0 = PCIE DEVICE AS 2.5GT/S CAPABLE 1 = PCIE DEVICE AS 5GT/S CAPABLE

Reserved Only

AUD[1:0] 00: NO AUDIO FUNCTION. 01: AUDIO FOR DISPLAYPORT AND HDMI IF ADAPTER IS DETECTED. 10: AUDIO FOR DISPLAYPORT ONLY.

11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.

0 = VGA controller capacity enable 1 = VGA controller capacity disenable (The device will not be recognized as the system's VGA controller.)

0 = DRIVER would ignore the value sample on VHAD_0 during RESET.

1 = DRIVER would use the value sample on VHAD_0 during RESET.

DDR3 Memory Aperture size

STN B/S P/N

AKD5LZGTW04 (64M*16)

AKD5LGGT506 (64M*16)

AKD5MGGT500K4W2G1646B-HC12

SPE@10K_4

*SPE@10K_4

*SPE@10K_4 SPE@10K_4

SPE@10K_4

GPUVendor

Park

Madison

2Gb Park

Madison

2Gb

Park

Madison

+1.8V_GPU

22

ZR8

DEFAULT

0

000

0

11

0

DVPDATA_2

101 1 11

00

01 1

RAM_STRAP2 SET DDR3 Vendor RAM_STRAP[1:0] SET SIZE.

REMARK

See ROM table

(Recommended setting as 5.0 GT/s capability will be controlled by software.)

See Audio table

RAM_STRAP1RAM_STRAP2

DVPDATA_1

RAM_STRAP0

DVPDATA_0

0

1

001 0

001

1

0

1

B2-TEST

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Strip/Thermal

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

21 49

1A

of

5

VMA_DQ[63..0][18]

VMA_DM[7..0][18]

VMA_RDQS[7..0][18]

VMA_WDQS[7..0][18]

D D

C C

VMA_DQ[63..0] VMA_DM[7..0] VMA_RDQS[7..0] VMA_WDQS[7..0]

VMA_MA0[18] VMA_MA1[18] VMA_MA2[18] VMA_MA3[18] VMA_MA4[18] VMA_MA5[18] VMA_MA6[18] VMA_MA7[18] VMA_MA8[18]

VMA_MA9[18] VMA_MA10[18] VMA_MA11[18] VMA_MA12[18] VMA_MA13[18]

VMA_BA0[18]

VMA_BA1[18]

VMA_BA2[18]

VMA_CLKP0[18]

VMA_CLKN0[18]

VMA_CKE0[18]

VMA_ODT0[18]

VMA_CS0#[18] VMA_RAS0#[18] VMA_CAS0#[18] VMA_WE0#[18]

MEM_RST#[18,23]

QSA[7..0] QSA#[7..0]

VREFC_VMA1 VREFD_VMA1

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13 VMA_MA13 VMA_MA13 VMA_MA13

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLKP0 VMA_CLKN0 VMA_CKE0

VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#

VMA_RDQS2

VMA_DM1 VMA_DM2

VMA_WDQS1 VMA_WDQS6 VMA_WDQS2

MEM_RST#

VMA_ZQ1

R376

R376 SW@243/F_4

SW@243/F_4

U19

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

SPE@VRAM_DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9

VDD#G7

VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_DQ10

E3

VMA_DQ11

F7

VMA_DQ9

F2

VMA_DQ12

F8

VMA_DQ13

H3

VMA_DQ15 VMA_DQ2

H8

VMA_DQ8

G2

VMA_DQ14

H7

VMA_DQ20

D7

VMA_DQ19

C3

VMA_DQ23

C8

VMA_DQ18

C2

VMA_DQ22

A7

VMA_DQ16

A2

VMA_DQ21

B8

VMA_DQ17

A3

+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

TOP Left

4

http://hobi-elektronika.net

CHANNEL A: 512MB DDR3 (64M*16*4pcs)

U1

R1

R1 SW@243/F_4

SW@243/F_4

U1

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

SPE@VRAM_DDR3

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9

VSS#B3

VSS#E1

VSS#G8

VSS#J2

VSS#J8

VSS#M1

VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_DQ6

E3

VMA_DQ0

F7

VMA_DQ7

F2

VMA_DQ1

F8

VMA_DQ4

H3 H8

VMA_DQ5

G2

VMA_DQ3

H7

VMA_DQ25

D7

VMA_DQ31

C3

VMA_DQ27

C8

VMA_DQ28

C2

VMA_DQ24

A7

VMA_DQ30

A2

VMA_DQ26

B8

VMA_DQ29

A3

+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU +1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA2 VREFD_VMA2

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLKP0 VMA_CLKN0 VMA_CKE0

VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#

VMA_RDQS0 VMA_RDQS3

VMA_DM0 VMA_DM5 VMA_DM3

VMA_WDQS0 VMA_WDQS3

MEM_RST#

VMA_ZQ2 VMA_ZQ3

3

U20

R369

R369 SW@243/F_4

SW@243/F_4

U20

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

SPE@VRAM_DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2

VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_DQ54

E3

VMA_DQ53

F7

VMA_DQ55

F2

VMA_DQ50

F8

VMA_DQ49

H3

VMA_DQ48

H8

VMA_DQ52

G2

VMA_DQ51

H7

VMA_DQ63

D7

VMA_DQ59

C3

VMA_DQ62

C8

VMA_DQ56

C2

VMA_DQ60

A7

VMA_DQ58

A2

VMA_DQ61

B8

VMA_DQ57

A3

+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA3 VREFD_VMA3

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLKP1[18]

VMA_CLKN1[18]

VMA_CKE1[18]

VMA_ODT1[18]

VMA_CS1#[18] VMA_RAS1#[18] VMA_CAS1#[18] VMA_WE1#[18]

VMA_CLKP1 VMA_CLKN1 VMA_CKE1

VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#

VMA_RDQS6 VMA_RDQS7

VMA_DM6 VMA_DM7

VMA_WDQS7

MEM_RST#

BOT Right

2

1

23

U2

R10

R10 SW@243/F_4

SW@243/F_4

U2

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

SPE@VRAM_DDR3

TOP RightBOT Left

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2

VDDQ#E9

VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

VMA_DQ40

E3

VMA_DQ44

F7

VMA_DQ45

F2

VMA_DQ42

F8

VMA_DQ46

H3

VMA_DQ41

H8

VMA_DQ47

G2

VMA_DQ43

H7

VMA_DQ32

D7

VMA_DQ36

C3

VMA_DQ33

C8

VMA_DQ39

C2

VMA_DQ35

A7

VMA_DQ37

A2

VMA_DQ34

B8

VMA_DQ38

A3

+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMA4 VREFD_VMA4

VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12

VMA_BA0 VMA_BA1 VMA_BA2

VMA_CLKP1 VMA_CLKN1 VMA_CKE1

VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#

VMA_RDQS5VMA_RDQS1 VMA_RDQS4

VMA_DM4

VMA_WDQS5 VMA_WDQS4

MEM_RST#

VMA_ZQ4

Group-A1 VREFGroup-A0 VREF

R5

SW@4.99K/F_4

+1.5V_GPU+1.5V_GPU+1.5V_GPU +1.5V_GPU+1.5V_GPU +1.5V_GPU+1.5V_GPU +1.5 V_GPU

R4

R4 SW@4.99K/F_4

SW@4.99K/F_4

C13

C13 SW@0.1u/10V_4

SW@0.1u/10V_4

B B

SW@4.99K/F_4

R377

R378

R378 SW@4.99K/F_4

SW@4.99K/F_4

VREFC_VMA1

C573

C573 SW@0.1u/10V_4

SW@0.1u/10V_4

R366

SW@4.99K/F_4

R365

R365 SW@4.99K/F_4

SW@4.99K/F_4

VREFD_VMA1

C565

C565 SW@0.1u/10V_4

SW@0.1u/10V_4

R2

SW@4.99K/F_4

R3

R3 SW@4.99K/F_4

SW@4.99K/F_4

C3

C3 SW@0.1u/10V_4

SW@0.1u/10V_4

R6

SW@4.99K/F_4

R7

R7 SW@4.99K/F_4

SW@4.99K/F_4

C22

C22 SW@0.1u/10V_4

SW@0.1u/10V_4

SW@4.99K/F_4

R368

R367

R367 SW@4.99K/F_4

SW@4.99K/F_4

VREFC_VMA3 VREFD_VMA3

C566

C566 SW@0.1u/10V_4

SW@0.1u/10V_4

SW@4.99K/F_4

R375

R383

R383 SW@4.99K/F_4

SW@4.99K/F_4

C576

C576 SW@0.1u/10V_4

SW@0.1u/10V_4

R9

SW@4.99K/F_4

R8

R8 SW@4.99K/F_4

SW@4.99K/F_4

VREFC_VMA4 VREFD_VMA4VREFC_VMA2 VREFD_VMA2

C28

C28 SW@0.1u/10V_4

SW@0.1u/10V_4

MEM_A0 CLK

VMA_CLKP0 VMA_CLKN0

R363

R364

SW@56.2/F_4

A A

SW@56.2/F_4

C558

C558 SW@0.01u/25V_4

SW@0.01u/25V_4

5

Group-A0 decoupling CAP

C578

C578 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C579

C579 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C562

C562 SW@10U/6.3V_6

SW@10U/6.3V_6

C569

C569 SW@1U/6.3V_4

SW@1U/6.3V_4

C9

C9 SW@1U/6.3V_4

SW@1U/6.3V_4

C18

C18 SW@10U/6.3V_6

SW@10U/6.3V_6

C564

C564 SW@1U/6.3V_4

SW@1U/6.3V_4

C21

C21 SW@1U/6.3V_4

SW@1U/6.3V_4

C2

C2 SW@10U/6.3V_6

SW@10U/6.3V_6

C571

C571 SW@1U/6.3V_4

SW@1U/6.3V_4

C572

C572 SW@1U/6.3V_4

SW@1U/6.3V_4

C5

C5 SW@10U/6.3V_6

SW@10U/6.3V_6

C561

C561 SW@1U/6.3V_4

SW@1U/6.3V_4

C30

C30 SW@1U/6.3V_4

SW@1U/6.3V_4

4

C8

C8 SW@1U/6.3V_4

SW@1U/6.3V_4

C23

C23 SW@1U/6.3V_4

SW@1U/6.3V_4

C17

C17 SW@10U/6.3V_6

SW@10U/6.3V_6

C560

C560 SW@1U/6.3V_4

SW@1U/6.3V_4

C7

C7 SW@1U/6.3V_4

SW@1U/6.3V_4

C559

C559 SW@1U/6.3V_4

SW@1U/6.3V_4

C20

C20 SW@1U/6.3V_4

SW@1U/6.3V_4

Group-A1 decoupling CAP MEM_A1 CLK

+1.5V_GPU+1.5V_GPU

C567

C567 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C12

C12 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C4

C4 SW@10U/6.3V_6

SW@10U/6.3V_6

3

C563

C563 SW@1U/6.3V_4

SW@1U/6.3V_4

C15

C15 SW@1U/6.3V_4

SW@1U/6.3V_4

C570

C570 SW@10U/6.3V_6

SW@10U/6.3V_6

C14

C14 SW@1U/6.3V_4

SW@1U/6.3V_4

C11

C11 SW@1U/6.3V_4

SW@1U/6.3V_4

C1

C1 SW@10U/6.3V_6

SW@10U/6.3V_6

C27

C27 SW@1U/6.3V_4

SW@1U/6.3V_4

C10

C10 SW@1U/6.3V_4

SW@1U/6.3V_4

C556

C556 SW@10U/6.3V_6

SW@10U/6.3V_6

C31

C31 SW@1U/6.3V_4

SW@1U/6.3V_4

C26

C26 SW@1U/6.3V_4

SW@1U/6.3V_4

C557

C557 SW@10U/6.3V_6

SW@10U/6.3V_6

C29

C29 SW@1U/6.3V_4

SW@1U/6.3V_4

C6

C6 SW@1U/6.3V_4

SW@1U/6.3V_4

2

C16

C16 SW@1U/6.3V_4

SW@1U/6.3V_4

C19

C19 SW@1U/6.3V_4

SW@1U/6.3V_4

C568

C568 SW@1U/6.3V_4

SW@1U/6.3V_4

C580

C580 SW@1U/6.3V_4

SW@1U/6.3V_4

VMA_CLKP1 VMA_CLKN1

R370

SW@56.2/F_4

R371

R371 SW@56.2/F_4

SW@56.2/F_4

C555

C555 SW@0.01u/25V_4

SW@0.01u/25V_4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Docum ent Number Rev

ize Document Num ber Rev

S

MEMORY 1 channel A

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

1

22 49

1A

of

5

VMB_DQ[63..0][18]

VMB_DM[7..0][18]

VMB_RDQS[7..0][18]

VMB_WDQS[7..0][18]

D D

C C

VMB_DQ[63..0] VMB_DM[7..0] VMB_RDQS[7..0] VMB_WDQS[7..0]

VMB_MA0[18] VMB_MA1[18] VMB_MA2[18] VMB_MA3[18] VMB_MA4[18] VMB_MA5[18] VMB_MA6[18] VMB_MA7[18] VMB_MA8[18]

VMB_MA9[18] VMB_MA10[18] VMB_MA11[18] VMB_MA12[18] VMB_MA13[18]

VMB_BA0[18]

VMB_BA1[18]

VMB_BA2[18]

VMB_CLKP0[18] VMB_CLKN0[18] VMB_CKE0[1 8 ]

VMB_ODT0[18]

VMB_CS0#[18] VMB_RAS0#[18] VMB_CAS0#[18] VMB_WE0#[18]

MEM_RST#[18,22]

QSA[7..0] QSA#[7..0]

VREFC_VMB1 VREFD_VMB1

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA13 VMB_MA13 VMB_MA13

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP0 VMB_CLKN0 VMB_CKE0

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

VMB_RDQS0 VMB_RDQS3

VMB_DM0 VMB_DM3

VMB_WDQS0 VMB_WDQS3

MEM_RST#

VMB_ZQ1

R15

R15 SW@243/F_4

SW@243/F_4

U3

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

SPE@VRAM_DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2

VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9

VSS#B3

VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMB_DQ4

E3

VMB_DQ2

F7

VMB_DQ6

F2

VMB_DQ0

F8

VMB_DQ7

H3

VMB_DQ1 VMB_DQ48

H8

VMB_DQ5

G2

VMB_DQ3

H7

VMB_DQ24

D7

VMB_DQ31

C3

VMB_DQ28

C8

VMB_DQ30

C2

VMB_DQ26

A7

VMB_DQ27

A2

VMB_DQ25

B8

VMB_DQ29

A3

+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

BOT Down

4

CHANNEL B: 512MB DDR3 (64M*16*4pcs)

U22

VREFC_VMB2 VREFD_VMB2

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP0 VMB_CLKN0 VMB_CKE0

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

VMB_RDQS2 VMB_RDQS1

VMB_DM2 VMB_DM4 VMB_DM1

VMB_WDQS2 VMB_WDQS1

MEM_RST#

U22

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

R386

R386 SW@243/F_4

SW@243/F_4

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

SPE@VRAM_DDR3

VMB_ZQ2 VMB_ZQ3

http://hobi-elektronika.net

VMB_DQ17

E3

DQL0

VMB_DQ21

F7

DQL1

VMB_DQ18

F2

DQL2

VMB_DQ16

F8

DQL3

VMB_DQ20

H3

DQL4

VMB_DQ22

H8

DQL5

VMB_DQ19

G2

DQL6

VMB_DQ23

H7

DQL7

VMB_DQ15

D7

DQU0

VMB_DQ10

C3

DQU1

VMB_DQ14

C8

DQU2

VMB_DQ11

C2

DQU3

VMB_DQ12

A7

DQU4

VMB_DQ9

A2

DQU5

VMB_DQ13

B8

DQU6

VMB_DQ8

A3

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU +1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

3

VREFC_VMB3 VREFD_VMB3

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP1[18]

VMB_CLKN1[18]

VMB_CKE1[18]

VMB_ODT1[18]

VMB_CS1#[18] VMB_RAS1#[18] VMB_CAS1#[18] VMB_WE1#[18]

VMB_CLKP1 VMB_CLKN1 VMB_CKE1

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

VMB_RDQS4 VMB_RDQS7

VMB_DM7

VMB_WDQS4 VMB_WDQS7

MEM_RST#

R393

R393 SW@243/F_4

SW@243/F_4

TOP Down TOP Up

U24

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

SPE@VRAM_DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

2

1

24

U5

VMB_ZQ4

R59

R59 SW@243/F_4

SW@243/F_4

U5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

SPE@VRAM_DDR3

BOT Up

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9

VSS#B3

VSS#E1

VSS#G8

VSS#J2

VSS#J8

VSS#M1

VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMB_DQ54

E3

VMB_DQ51

F7

VMB_DQ53

F2

VMB_DQ50

F8

VMB_DQ52

H3 H8

VMB_DQ55

G2

VMB_DQ49

H7

VMB_DQ40

D7

VMB_DQ46

C3

VMB_DQ41

C8

VMB_DQ42

C2

VMB_DQ44

A7

VMB_DQ45

A2

VMB_DQ43

B8

VMB_DQ47

A3

+1.5V_GPU+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VMB_DQ36

E3

VMB_DQ39

F7

VMB_DQ33

F2

VMB_DQ34

F8

VMB_DQ35

H3

VMB_DQ37

H8

VMB_DQ38

G2

VMB_DQ32

H7

VMB_DQ60

D7

VMB_DQ59

C3

VMB_DQ63

C8

VMB_DQ56

C2

VMB_DQ62

A7

VMB_DQ57

A2

VMB_DQ61

B8

VMB_DQ58

A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VREFC_VMB4 VREFD_VMB4

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP1 VMB_CLKN1 VMB_CKE1

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

VMB_RDQS6 VMB_RDQS5

VMB_DM6 VMB_DM5

VMB_WDQS6 VMB_WDQS5

MEM_RST#

Group-B0 VREF Group-B1 VREF

R58

SW@4.99K/F_4

VMB_CLKP1 VMB_CLKN1

SW@56.2/F_4

+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU

R69

R69 SW@4.99K/F_4

SW@4.99K/F_4

R45

C195

C195 SW@0.1u/10V_4

SW@0.1u/10V_4

R52

R52 SW@56.2/F_4

SW@56.2/F_4

C179

C179 SW@0.01u/25V_4

SW@0.01u/25V_4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Docum ent Number Rev

ize Document Num ber Rev

S

MEMORY 2 channel B

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

1

of

23 49

of

23 49

of

23 49

1A

B B

R19

R19 SW@4.99K/F_4

SW@4.99K/F_4

VREFC_VMB1 VREFD_VMB1

R18

SW@4.99K/F_4

C61

SW@0.1u/10V_4

SW@4.99K/F_4

MEM_B0 CLK MEM_B1 CLK

VMB_CLKP0 VMB_CLKN0

R11

R13

SW@56.2/F_4

A A

SW@56.2/F_4

C41

C41 SW@0.01u/25V_4

SW@0.01u/25V_4

5

R12

+1.5V_GPU

C588

C588 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C35

C35 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C589

C589 SW@10U/6.3V_6

SW@10U/6.3V_6

R14

R14 SW@4.99K/F_4

SW@4.99K/F_4

C45

SW@0.1u/10V_4

C69

C69 SW@1U/6.3V_4

SW@1U/6.3V_4

C595

C595 SW@1U/6.3V_4

SW@1U/6.3V_4

C141

C141 SW@10U/6.3V_6

SW@10U/6.3V_6

R387

SW@4.99K/F_4

C583

C583 SW@1U/6.3V_4

SW@1U/6.3V_4

C603

C603 SW@1U/6.3V_4

SW@1U/6.3V_4

C32

C32 SW@10U/6.3V_6

SW@10U/6.3V_6

R388

R388 SW@4.99K/F_4

SW@4.99K/F_4

VREFC_VMB2VREFC_VMB2

C577

C577 SW@1U/6.3V_4

SW@1U/6.3V_4

C581

C581 SW@1U/6.3V_4

SW@1U/6.3V_4

C39

C39 SW@10U/6.3V_6

SW@10U/6.3V_6

C592

SW@0.1u/10V_4

C215

C215 SW@1U/6.3V_4

SW@1U/6.3V_4

C596

C596 SW@1U/6.3V_4

SW@1U/6.3V_4

4

R384

SW@4.99K/F_4

C587

C587 SW@1U/6.3V_4

SW@1U/6.3V_4

C173

C173 SW@1U/6.3V_4

SW@1U/6.3V_4

C74

C74 SW@10U/6.3V_6

SW@10U/6.3V_6

R385

R385 SW@4.99K/F_4

SW@4.99K/F_4

C33

C33 SW@1U/6.3V_4

SW@1U/6.3V_4

C143

C143 SW@1U/6.3V_4

SW@1U/6.3V_4

C584

C584 SW@0.1u/10V_4

SW@0.1u/10V_4

C582

C582 SW@1U/6.3V_4

SW@1U/6.3V_4

R41

SW@4.99K/F_4

Group-B1 decoupling CAPGroup-B0 decoupling CAP

+1.5V_GPU

C597

C597 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C609

C609 SW@1U/6.3V_4

SW@1U/6.3V_4

+1.5V_GPU

C142

C142 SW@10U/6.3V_6

SW@10U/6.3V_6

R391

R392

SW@4.99K/F_4

C620

C620 SW@1U/6.3V_4

SW@1U/6.3V_4

C605

C605 SW@1U/6.3V_4

SW@1U/6.3V_4

R391 SW@4.99K/F_4

SW@4.99K/F_4

C599

C599 SW@10U/6.3V_6

SW@10U/6.3V_6

R32

R32 SW@4.99K/F_4

SW@4.99K/F_4

VREFC_VMB3 VREFD_VMB3

C172

C172 SW@0.1u/10V_4

SW@0.1u/10V_4

C632

C217

C217 SW@10U/6.3V_6

SW@10U/6.3V_6

C632 SW@1U/6.3V_4

SW@1U/6.3V_4

C601

C601 SW@1U/6.3V_4

SW@1U/6.3V_4

C600

C600 SW@10U/6.3V_6

SW@10U/6.3V_6

C604

C604 SW@1U/6.3V_4

SW@1U/6.3V_4

C177

C177 SW@1U/6.3V_4

SW@1U/6.3V_4

3

C602

C602 SW@0.1u/10V_4

SW@0.1u/10V_4

C598

C598 SW@1U/6.3V_4

SW@1U/6.3V_4

C611

C611 SW@1U/6.3V_4

SW@1U/6.3V_4

C636

C636 SW@10U/6.3V_6

SW@10U/6.3V_6

C614

C614 SW@1U/6.3V_4

SW@1U/6.3V_4

C171

C171 SW@1U/6.3V_4

SW@1U/6.3V_4

R53

SW@4.99K/F_4

C216

C216 SW@1U/6.3V_4

SW@1U/6.3V_4

C607

C607 SW@1U/6.3V_4

SW@1U/6.3V_4

2

R40

R40 SW@4.99K/F_4

SW@4.99K/F_4

VREFC_VMB4 VREFD_VMB4VREFD_VMB2

C156

C156 SW@1U/6.3V_4

SW@1U/6.3V_4

C182

C182 SW@0.1u/10V_4

SW@0.1u/10V_4

1

C612

SW@.22u_4

EXT_VSYNC[17,21] EXT_HSYNC[17,21]

A22

B02

C06

PE_GPIO2

C613

CONTRAST[34]

EV_CRTDDAT EV_CRTDCLK

INT_DDCDATA INT_DDCCLK

+5V

U25

VCC16GND

2

IA0

5

IB0

11

IC0

14

ID0

3

IA1

6

IB1 IC110YD

13

ID1

1

S

SW@SN74CBT3257CPWR

+5V

PE_GPIO2

SW@SN74CBT3257CPWR

R263 SW@0_4R263 SW @0_4

R159 *SW@0_4R159 *SW@0_4

U26

VCC16GND

2

IA0

5

IB0

11

IC0

14

ID0

3

IA1

6

IB1 IC110YD

13

ID1

1

S

C254

C254 SW@.22u_4

SW@.22u_4

INT_DPST_PWM

CRT

SW@.22u_4

EXT_CRT_RED[17] EXT_CRT_GRE[17] EXT_CRT_BLU[17]

INT_CRT_RED[9] INT_CRT_GRE[9]

S

0

1

INT_CRT_BLU[9]

Yn

SW(EV)

IV

EV_CRTDDAT[17] EV_CRTDCLK[17]

INT_DDCDATA[9 ] INT_DDCCLK[9 ]

INT_CRT_VSYNC[9] INT_CRT_HSYNC[9]

EV_LVDS_BRIGHT[17]

INT_DPST_PWM[9]

A A

B B

OPTION DPST SIGNAL FROM NB to LVDS for UM A

INT_DPST_PWM LVDS_BRIGHT

R239 *IV@0_4R239 *IV@0_4

C C

D D

DGPU_Channel-A

IGPU_Channel-A

R90 *Short_6R90 *Short_6

+1.8V

SW@2.2u/6.3V_6

1

EV_TXLOUT2+[17] EV_TXLOUT2-[17]

EV_TXLOUT1+[17] EV_TXLOUT1-[17]

EV_TXLOUT0+[17] EV_TXLOUT0-[17]

EV_TXLCLKOUT+[17] EV_TXLCLKOUT-[17]

LA_DATAP2[9] LA_DATAN2[9]

LA_DATAP1[9] LA_DATAN1[9]

LA_DATAP0[9] LA_DATAN0[9]

LA_CLK[9] LA_CLK#[9]

C218

SW@0.1u/10V_4

2~3pin share one cap

+1.8V_LVDS

C189

8

4

YA

7

YB

9

YC

12

15

OE

YA YB YC

OE

C206

SW@0.1u/10V_4

L

2

VGA_RED_SYS VGA_GRN_SYS VGA_BLU_SYS

8

CRTDDAT

4

CRTDCLK

7

VSYNC

9

HSYNC

12

15

+3V

5

3

1

SW@74LVC1G3157GW

2

OPTION SIGNAL FROM NB to LVDS/CRT for UMA

+3V_D

dGPU_PCIE_RST#[16]

U4

S6VCC

4

YA

B0

2

B1

GND

RP19 *IV@0_4P2R_4RP19 *IV@0_4P2R_4 INT_DDCCLK INT_DDCDATA

INT_EDIDCLK INT_EDIDDATA

&ŽůůŽǁDƌĞĨĞƌĞŶĐĞƐĐŚĞŵĂƚŝĐĐŚĂŶŐĞ ĨŽƌƌĞĚƵĐĞůĞĂŬĂŐĞƚŽsZϯh^

3 1

1 3

RP1 *IV@0_4P2R_4RP1 *IV@0_4P2R_4

R414 SW@4.7K_4R414 SW @4.7K_4 R92 SW@4.7K_4R92 SW@4.7K_4

+3V

R86

R86 *SW@10K_4

*SW@10K_4

PE_GPIO2_SW

3

2

1

PE_GPIO2 PE_GPIO2_SW

PE_GPIO2

LVDS_BRIGHT

Q2

Q2 *SW@2N7002E

*SW@2N7002E

S

0

SW(EV)

1YnIV

U6

46

A2P

45

A2N

44

A1P

43

A1N

41

A0P

40

A0N

39

ACLKP

38

ACLKN

35

B2P

34

B2N

33

B1P

32

B1N

30

B0P

29

B0N

28

BCLKP

27

BCLKN

48

VDD

36

VDD

25

VDD

23

VDD

21

VDD

12

VDD

4

VDD

2

VDD

SW@PI3HDMI412

OutputPE_GPIO2

EV_LVDS

INT_LVDSH

IN_A

IN_B

6

C2P

7

C2N

9

C1P

10

C1N

OUT_C

15

C0P

16

C0N

18

CCLKP

19

CCLKN

13

SEL

1

VSS

3

VSS

5

VSS

8

VSS

11

VSS

14

VSS

17

VSS

20

VSS

22

VSS

24

VSS

26

VSS

31

VSS

37

VSS

42

VSS

47

VSS

OPTION SIGNAL FROM NB to LVDS for UM A

LA_CLK# LA_CLK LA_DATAN0 LA_DATAP0 LA_DATAN1 LA_DATAP1 LA_DATAN2 LA_DATAP2

RP5 *IV@0_4P2R_4RP5 *IV@0_4P2R_4 RP4 *IV@0_4P2R_4RP4 *IV@0_4P2R_4 RP3 *IV@0_4P2R_4RP3 *IV@0_4P2R_4 RP2 *IV@0_4P2R_4RP2 *IV@0_4P2R_4

3

CRTDCLK

4

CRTDDAT

2

LCD_EDIDCLK

2

LCD_EDIDDATA

4

EV_CRTDDAT EV_CRTDCLK

C188

SW@.22u_4

EV_LVDS_BLON[17]

EV_LVDS_VDDEN[17]

EV_LVDS_DDCDAT[17]

EV_LVDS_DDCCLK[17]

INT_LVDS_BLON[9]

INT_LVDS_DIGON[9]

INT_EDIDDATA[9]

INT_EDIDCLK[9 ]

R87 SW @0_4R87 SW@0 _ 4

VIN +3V

R282

*SW@0_4

PE_GPIO2_R[11]

TXLOUT2 + TXLOUT2 -

TXLOUT1 + TXLOUT1 -

TXLOUT0 + TXLOUT0 -

TXLCLK OUT+ TXLCLK OUT-

R47

SW@8.25K/F_4

R74

R74 SW@10K/F_4

SW@10K/F_4

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

4

OPTION SIGNAL FROM NB to CRT for UMA

http://hobi-elektronika.net

INT_CRT_RED INT_CRT_GRE INT_CRT_BLU

INT_CRT_HSYNC INT_CRT_VSYNC

R412 *IV@0_4R412 *IV@0_4 R411 *IV@0_4R411 *IV@0_4 R394 *IV@0_4R394 *IV@0_4

RP17 *IV@0_4P2R_4RP17 *IV@0_4P2R_4

3 1

VGA_RED_SYS VGA_GRN_SYS VGA_BLU_SYS

HSYNC

4

VSYNC

2

OPTION Back Light SIGNAL FROM NB to LVDS for UM A

INT_LVDS_BLON LVDS_BLON

R93 *IV@0_4R93 *IV@0_4

hDƵƐĞϭϰϬŽŚŵϭй ŝƐĐƌĞƚĞƵƐĞϭϱϬŽŚŵϭй EŽƚĞKŶůǇĨŽƌZ^ϴϴϬƐĞƌŝĞƐϭϭ^/ĞƌƌĂƚĂ

VGA_RED_SYS VGA_GRN_SYS VGA_BLU_SYS

OPTION LCDVCC SIGNAL FROM NB to LVDS for UMA

C147

4.7u/25V_8

2

PE_GPIO2PE_GPIO2_SEL

INT_LVDS_DIGON LVDS_VDDEN

R419 SW@4.7K_4R419 SW @4.7K_4

+5V

R413 SW@4.7K_4R413 SW @4.7K_4

+5V

2

5 11 14

3

6 13

1

SW@SN74CBT3257CPWR

C162

C162 1000p/50V_4

1000p/50V_4

+3V

R285

R285 SW@10K/F_4

SW@10K/F_4

PE_GPIO2

3

Q24

Q24 SW@2N7002E

SW@2N7002E

1

U7

VCC16GND

IA0 IB0 IC0 ID0

IA1 IB1 IC110YD ID1

S

R94 *IV@0_4R94 *IV@0_4

8

4

YA

LVDS_VDDEN_YB

7

YB

9

YC

12

15

OE

C233

C233 .1u/50V_6

.1u/50V_6

PANEL_COLOR[34]

DMIC_CLK_R[29] DMIC_DAT_R[29]

LVDS_BLON

C222

C222 1000p/50V_4

1000p/50V_4

PANEL_ENG[34]

VIN

INT_DDCDATA INT_DDCCLK

+3V

R42

2.2K_4

LCDVCC

LCD_EDIDCLK LCD_EDIDDATA

TXLOUT0TXLOUT0+

TXLOUT1TXLOUT1+

TXLOUT2TXLOUT2+

TXLCLK OUTTXLCLK OUT+

LVDS_BRIGHT BL_ON

R31 *SHORT_PADR31 *SHORT_PAD

R21 *Short_6R21 *Short_6

+3V

R536 BEAD_4R536 BEAD_4 R525 BEAD_4R525 BEAD_4

R56

2.2K_4

+3V

LCD_EDIDDATA LCD_EDIDCLK

INVCC0

LVD-A30SFYG+

CCD_POWER

DMIC_CLK DMIC_DAT

22p/50V_4

140ohm P/N: CS11402FB19

+3V

0.1u/10V_4

+3V

CN5

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

USBP1-_R USBP1+_R

C787

A24

CAMERA Module(CCD)

TXLCLK OUTTXLCLK OUT+ TXLOUT0TXLOUT0+ TXLOUT1TXLOUT1+ TXLOUT2TXLOUT2+

USBP1+[12] USBP1-[12]

4

R24 *Short_4R24 *Short_4 R25 *Short_4R25 *Short_4

USBP1+_R USBP1-_R

5

R163

IV@140/F_4

C667

C664 .22u/25V_6C6 6 4 .22u/25V_6

C678

0.1u/10V_4

G_0

G_1

G_2

G_4

G_3

CN3

789 6 5 4 3 2 1

8P CON

C776

C776 22p/50V_4

22p/50V_4

5

10

A35

A25

B03

6

C05

+5V

R143

R143 150/F_4

150/F_4

CRT_BYP

CRT_R1 CRT_G1

CRT_B1

C304

R132

10p/50V_4

150/F_4

U27

1

VCC_SYNC

7

VCC_DDC

8

BYP

2

VCC_VIDEO

3

VIDEO_1

4

VIDEO_2

5

VIDEO_3

6

GND

CM2009-02QR

CRT DDCCLK ,DDCDATA pull high resistor to +3v or +5v. Due to RS880M and Madison DDC can support 5V tolerance

LCD Power

C174

C174 1U/10V_4

1U/10V_4

LVDS_VDDEN

A_RST#_SB[9,11,34]

B2-TEST

F1

SMD1206P100TF

SMD1206P100TF L26 BLM18BA470SN1_6L26 BLM18BA470SN1_6 L25 BLM18BA470SN1_6L25 BLM18BA470SN1_6 L21 BLM18BA470SN1_6L21 BLM18BA470SN1_6

C285

C264

10p/50V_4

CRT_VSYNC1CRTVDD5

16

SYNC_OUT2 SYNC_OUT1

SYNC_IN2 SYNC_IN1

DDC_OUT1 DDC_OUT2

+3V

14

15 13

10

DDC_IN1

11

DDC_IN2

9 12

6 4 3

R96

R96 100K_4

100K_4

LVDS_VDDEN_YB

CRT_HSYNC1

U10

IN IN ON/OFF

IC(5P)_G5243T11U

12

VSYNC HSYNC

CRTDCLK CRTDDAT

DDCCLK_1 DDCDAT_1

2 1

R91 SW @0_4R91 SW@0_4

Backlight Control

+3V

R114

R114 10K_4

10K_4

BL#

2

3

Q6

LVDS_BLON

2

R70

R70 100K_4

100K_4

6

2N7002KQ62N7002K

Q1 2N7002KQ12N7002K

1

+3V_S5

3

1

VIN[35,37,38,39,40,41,44]

5

R120

R120 10K_4

10K_4

1A/30V

D5

2 1

RSX101M-30

C266

C266 10p/50V_4

10p/50V_4

R165 *Short_4R165 *Short_4 R164 *Short_4R164 *Short_4

R135

2.7K_4

1

OUT

2

GND

5

GND

C238

*SW@0.1u/10V_4

4

3

U9

*SW@TC7SH08FU

BL_ON

1 3

7

C246 .22u_4C246 .22u_4

CRTVDD5

CRT_R1 CRT_G1 CRT_B1 CRTHSYNC

C298

C284

10p/50V_4

CRTVSYNC CRTHSYNC

+3V

A23

CRTVDD5

R144

2.7K_4

2.7K_4 R129

R129

4.7K_4

C256

C257

*.1u_4

1U/10V_4

LVDS_VDDEN

D4 BAS316D4 BAS316

2 1

2

Q8 DTC144EUAQ8DTC144EUA

VIN

7

R140

4.7K_4

LCDVCC_R

8

1617

CN13

CN13 CRT

CRT

6 7

2 8 3 9 4

10

5

C255

0.01u/25V_4

LID591# [31,34]

EC_FPBACK# [34]

CRT_11

111 12 13 14 15

C245 *.1u_4C245 *.1u_4 C656 *10p/50V_4C656 *10p/50V_4 C663 *10p/50V_4C663 *10p/50V_4 C671 10p/50V_4C671 10p/50V_4 C675 10p/50V_4C675 10p/50V_4

R112 *Short_8R112 *Short_8

C237

22u_8

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Docum ent Number Rev

ize Document Num ber Rev

S

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

DDCDAT_1

CRTVSYNC DDCCLK_1

CRTVDD5 CRTVSYNC CRTHSYNC DDCCLK_1 DDCDAT_1

LCDVCC

CRT/LVDS/LID

T73T73

8

25

of

24 49

of

24 49

of

24 49

1A

5

4

3

2

1

http://hobi-elektronika.net

UMA use +3V for the detect pin Dis use +3V_DELAY for the detect pin

UMA/DISCRETE select for HDMI

D D

C C

From RS880M

PEG_TXN15_C[8] PEG_TXP15_C[8]

PEG_TXN14_C[8] PEG_TXP14_C[8]

PEG_TXN13_C[8] PEG_TXP13_C[8]

PEG_TXN12_C[8] PEG_TXP12_C[8]

From dGPU

EXT_HDMITX2N[17] EXT_HDMITX2P[17]

EXT_HDMITX1N[17] EXT_HDMITX1P[17]

EXT_HDMITX0N[17] EXT_HDMITX0P[17]

EXT_HDMICLK-[17] EXT_HDMICLK+[17]

+5V

Q34

2N7002K

R460

100K/F_4

for Layout concern ,placement close north bridge

C280 *IV@0.1U/10V_4C280 *IV@0.1U/10V_4 C272 *IV@0.1U/10V_4C272 *IV@0.1U/10V_4

C267 *IV@0.1U/10V_4C267 *IV@0.1U/10V_4 C263 *IV@0.1U/10V_4C263 *IV@0.1U/10V_4

C253 *IV@0.1U/10V_4C253 *IV@0.1U/10V_4 C247 *IV@0.1U/10V_4C247 *IV@0.1U/10V_4

C239 *IV@0.1U/10V_4C239 *IV@0.1U/10V_4 C232 *IV@0.1U/10V_4C232 *IV@0.1U/10V_4

3

2

1

C698 SW@0.1u/10V_4C698 SW@0.1u/10V_4 C697 SW@0.1u/10V_4C697 SW@0.1u/10V_4

C696 SW@0.1u/10V_4C696 SW@0.1u/10V_4 C695 SW@0.1u/10V_4C695 SW@0.1u/10V_4

C694 SW@0.1u/10V_4C694 SW@0.1u/10V_4 C693 SW@0.1u/10V_4C693 SW@0.1u/10V_4

C692 SW@0.1u/10V_4C692 SW@0.1u/10V_4 C691 SW@0.1u/10V_4C691 SW@0.1u/10V_4

R457 SP_715@499/F_4R457 SP_715@499/F_4 R459 SP_715@499/F_4R459 SP_715@499/F_4 R454 SP_715@499/F_4R454 SP_715@499/F_4 R456 SP_715@499/F_4R456 SP_715@499/F_4 R451 SP_715@499/F_4R451 SP_715@499/F_4 R453 SP_715@499/F_4R453 SP_715@499/F_4 R448 SP_715@499/F_4R448 SP_715@499/F_4 R450 SP_715@499/F_4R450 SP_715@499/F_4

TX2_HDMI-L TX2_HDMI+L

TX1_HDMI-L TX1_HDMI+L

TX0_HDMI-L TX0_HDMI+L

TXC_HDMI-L TXC_HDMI+L

for Layout concern ,placement close HDMI conn

RP10 *IV@0_4P2R_4RP10 *IV@0_4P2R_4

RP9 *IV@0_4P2R_4RP9 *IV@0_4P2R_4

RP8 *IV@0_4P2R_4RP8 *IV@0_4P2R_4

RP7 *IV@0_4P2R_4RP7 *IV@0_4P2R_4

TX2_HDMITX2_HDMI+

TX1_HDMITX1_HDMI+

TX0_HDMITX0_HDMI+

TXC_HDMITXC_HDMI+

TX2_HDMI+ TX2_HDMITX1_HDMI+ TX1_HDMITX0_HDMI+ TX0_HDMITXC_HDMI+ TXC_HDMI-

2

1

4

3

2

1

4

3

2

1

4

3

2

1

4

3

UMA RS880M

ՂՂՂՂ

715 ohm CS17152FB17

DIS Park-M2

ՂՂՂՂ

499 ohm CS14992FB24

TX2_HDMITX2_HDMI+

TX1_HDMITX1_HDMI+

TX0_HDMITX0_HDMI+

TXC_HDMITXC_HDMI+

for Layout concern ,placement close HDMI co nn

Close to HDMI Connector

EMI reserve for HDMI(HDM)

B B

A A

Close connector

TX2_HDMI+

TX2_HDMITX1_HDMI+

TX1_HDMITX0_HDMI+

TX0_HDMITXC_HDMI+

TXC_HDMI-

R458

R458 *100/F_4

*100/F_4

R455

R455 *100/F_4

*100/F_4

R452

R452 *100/F_4

*100/F_4

R449

R449 *100/F_4

*100/F_4

+5V

EXT_HDMI_HPD[17]

INT_HDMI_HPD[9]

B2-TEST

F2

12

SMD1206P100TF

EV_HDMI_DDCCK[17]

EV_HDMI_DDCDAT[17]

D6

D6 RSX101M-30

RSX101M-30

2 1

HDMI_DET

+3V_D

R444

R444 SW@10K_4

SW@10K_4

3

Q33

Q33 SW@2N7002K

SW@2N7002K

2

+3V

1

Q15

2N7002K

Close to HDMI Connector

HDMI_DDC_DATA[9]

HDMI_DDC_CLK[9]

+3V

R443

SW@4.7K_4

+3V

R614

SW@4.7K_4

+'0,3257

TX2_HDMI+ TX2_HDMI-

TX1_HDMI+ TX1_HDMI-

TX0_HDMI+ TX0_HDMI-

TXC_HDMI+ TXC_HDMI-

HDMI_SCLK HDMI_SDATA

+5V_HDMI

C363

0.22u/6.3V_4

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19

P/N: AOP---->DFHD19MR083 LTS---->DFHD19MR085

HDMI HPD SENSE

R186

R186 10K_4

10K_4

3

2

1

*IV@0_4P2R_4

RP20

3 1

UMA

+5V

2

3

1

Q41

Q41 SW@2N7002K

SW@2N7002K

R445

R445 *SW@0_4

*SW@0_4

+5V

2

3

1

Q42

Q42 SW@2N7002K

SW@2N7002K

R534

R534 *SW@0_4

*SW@0_4

CN17

D2+ D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND +5V HP DET

SP@HDMI

SHELL1

GND GND

SHELL2

20

23 22

21

26

+3V

R187

R187 10K/F_4

10K/F_4

3

Q16

Q16 2N7002K

2N7002K

2

1

HDMI_SDATA

4

HDMI_SCLK

2

DIS

R177

200K/F_4

HDMI_HPD_EC# [34]

HDMI_SCLK

A54

HDMI_SDATA

D21

CH501H-40PT

HDMI_SCLK HDMI_SDATA

HDMI_DETHDMI_DET_R

R176

R176 200K/F_4

200K/F_4

21

R446

R446 2K/F_4

2K/F_4

+5V+5V

21

D22

D22 CH501H-40PT

CH501H-40PT

R447

R447 2K/F_4

2K/F_4

A49

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Docum ent Number Rev

ize Document Num ber Rev

S

HDMI

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

of

25 49

of

25 49

of

25 49

1A

5

4

3

2

1

Giga-LAN AR8151

+3V_S5

R270 *Short_6R270 *Short_6

D D

+3V_LAN

CLK_PCIE_LAN_REQ#[12 ]

C482

C482 10U/6.3V_8

10U/6.3V_8

C460 1u/6.3V_4C460 1u/6.3V_4

C718 1u/6.3V_4C718 1u/6.3V_4

Wake# and CLKREQ# PU at SB side already

33p/50V_4C719 33p/50V_4C719

1.2H

C C

33p/50V_4C712 33p/50V_4C712

TRANSFORMER(LAN)

TX0P

TX0N

R473 49.9/F_4R473 49.9/F_4

R472 49.9/F_4R472 49.9/F_4

B B

LAN_N1

C708

Closed to LAN chip

A A

C708

0.1u/10V_4

TX2P

R470 49.9/F_4R470 49.9/F_4

C706

0.1u/10V_4

TX2N

R471 49.9/F_4R471 49.9/F_4

LAN_N3

close Pin1

U31

C474

C471

C483

1u/6.3V_4

1u/6.3V_4 0.1u/10V_4C713 0.1u/10V_4C71 3

10U/6.3V_8

A_RST#_AND[11,16,27]

PCIE_WAKE#[12]

0.1u/10V_4C459 0.1u/10V_4C459

0.1u/10V_4C714 0.1u/10V_4C714

R475 2.37K/F_4R475 2.37K/F_4

XTLO

12

Y4 25MHzY425MHz

XTLI

TX1P

TX1N

R469 49.9/F_4R469 49.9/F_4

R468 49.9/F_4R468 49.9/F_4

0.1u/10V_4

0.1u/10V_4C721 0.1u/10V_4C721

0.1u/10V_4C462 0.1u/10V_4C462

0.1u/10V_4C463 0.1u/10V_4C463

0.1u/10V_4C461 0.1u/10V_4C461

C473

C473 *1000p/50V_4

*1000p/50V_4

+VDDCT AVDDL XTLO XTLI AVDDH

RBIAS_LAN

TX0P TX0N AVDDL TX1P TX1N AVDDH TX2P TX2N AVDDL TX3P TX3N

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21

U31

VDD33 PERSTn WAKEn CLKREQn VDDCT AVDDL_REG XTLO XTLI AVDDH_REG RBIAS TRXP0 TRXN0 NC/AVDDL TRXP1 TRXN1 NC/AVDDH NC/TRXP2 NC/TRXN2 NC/AVDDL NC/TRXP3 NC/TRXN3

AR8151-AL1A-R1

AR8151

5X5mm

40-Pin QFN

B05

AVDDH

CLKREQn/LED2

DVDDL SMCLK

SMDATA

TESTMODE

TEST_RST

TX_N TX_P

AVDDL REFCLK_N REFCLK_P

AVDDL

RX_P RX_N

DVDDL_REG

LED0 LED1

GND

AVDDH

22

LED2

23

DVDDL

24

SMCLK_8151

25

SMDATA_8151

26 27 28

PCIE_RXN6_C

29

PCIE_RXP6_C

30

AVDDL

31 32 33

AVDDL

34 35 36

DVDDL

37

LAN_ACTLED

38

LAN_LINKLED#

39

LX

40

LX

41

T32T32

0.1u/10V_4C717 0.1u/10V_4C71 7 R476 *0_4R476 *0_4 R477 *0_4R477 *0_4

C734 0.1u/10V_4C734 0.1u/10V_4 C737 0.1u/10V_4C737 0.1u/10V_4

0.1u/10V_4C484 0.1u/10V_4C48 4

0.1u/10V_4C470 0.1u/10V_4C47 0

R487 5.1K_4R487 5.1K_4

L65 4.7uH/1A_2X2L65 4.7uH/1A_2X2

PCLK_SMB [5,6,12,27,46]

PDAT_SMB [5,6,12,27,46]

PCIE_RX1- [8]

PCIE_RX1+ [8]

CLK_PCIE_LOM# [11]

CLK_PCIE_LOM [11]

PCIE_TX1+ [8]

PCIE_TX1- [8]

1u/6.3V_4C4 7 5 1u/6.3V_4C475

0.1u/10V_4C476 0.1u/10V_4C476

C741

C741 *1000p/50V_4

*1000p/50V_4

C742

0.1u/10V_4

+VDDCT

C743

C743 10U/6.3V_8

10U/6.3V_8

RJ45(LAN)

+3V_LAN

R465 220_8R465 220_8

C699

C699 *0.1u//50V_8

*0.1u//50V_8

R221 220_8R221 220_8

LAN_ACTLED_R

LAN_LINKLED#

C709

*0.1u//50V_8

LAN_ACTLED_RLAN_ACTLED

X-TX0P

X-TX0N X-TX1P

X-TX2P

X-TX2N X-TX1N

X-TX3P

X-TX3N

LAN_LINKLED# LAN_LNK_LED_PWR

9

10

1 2 3 4 5 6 7 8

11 12

CN18

YELLOW_N YELLOW_P

0+ 01+ 2+ 213+ 3-

GREEN_N GREEN_P

RJ45

GND2 GND1

14 13

Close Transformer

A41

24 23 22

21 20 19

18 17 16

15 14 13

R228

R228 75/F_8

75/F_8

R234

R234 75/F_8

75/F_8

R242

R242 75/F_8

75/F_8

+VDDCT

R253

R253 75/F_8

75/F_8

X-TX0P X-TX0N

X-TX1P X-TX1N

X-TX2P X-TX2N

X-TX3P X-TX3N

TX3P

R466 49.9/F_4R466 49.9/F_4

C705

0.1u/10V_4

AVDD_CEN

LAN_N2

TX3N

R467 49.9/F_4R467 49.9/F_4

reverse 1000p*4 for EMI

0.1u/10V_4C429 0.1u/10V_4C429

C433 *1000p/50V_4C433 *1000p/50V_4

0.1u/10V_4C438 0.1u/10V_4C438

C700 *1000p/50V_4C700 *1000p/50V_4

0.1u/10V_4C444 0.1u/10V_4C444

C701 *1000p/50V_4C701 *1000p/50V_4

0.1u/10V_4C449 0.1u/10V_4C449

C702 *1000p/50V_4C702 *1000p/50V_4

TX0P TX0N

TX1P TX1N

TX2P TX2N

TX3P TX3N

U30

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

TRANSFORMER

L41

PBY160808T-181Y-N_6

C448 1U/10V_4C448 1U/10V_4

MCT1

MX1+

MX1-

MCT2

MX2+

MX2-

MCT3

MX3+

MX3-

MCT4

MX4+

MX4-

A01

Delta LFE9276D-R (DB0ZY8LAN00)

C707

0.1u/10V_4

LAN_N4

C452

C452 1500p/3KV_18

1500p/3KV_18

27

http://hobi-elektronika.net

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Docum ent Number Rev

ize Document Num ber Rev

S

LAN (AR8151)

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

26 49

1A

of

5

4

3

2

1

http://hobi-elektronika.net

28

D D

MINI-CARD WLAN(MPC)

9 7 5 3 1

CN23

CN23 Reserved

Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND UIM_C4 UIM_C8

GND REFCLK+ REFCLKGND CLKREQ# Reserved Reserved WAKE#

H=5.6mm

LTS_AAA-PCI-046-K01

LED_WPAN#

LED_WLAN#

LED_WWAN#

USB_D+

USB_D-

SMB_DATA

SMB_CLK

+3.3Vaux

PERST#

W_DISABLE#

UIM_VPP

UIM_RST

UIM_CLK

UIM_DATA

UIM_PWR

GND54GND

53

+3.3V

GND

+1.5V

GND

+1.5V

GND

+1.5V

GND

+3.3V

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

16 14 12 10 8 6 4 2

A01

+WL_VDD

+1.5V_WL

RP32 *0_4P2R_4RP32 *0_4P2R_4

+1.5V_WL +WL_VDD

2 4

R89 *Short_4R89 *Short_4 R190 *Short_4R190 *Short_4 R191 *Short_4R191 *Short_4 R226 *Short_4R226 *Short_4 R229 *Short_4R229 *Short_4

R527 *10K_4R527 *10K_4

1 3

C16

B2-TEST, C10

ၦၦၦၦขขขข৵৵৵৵٦٦٦٦ஞஞஞஞൾൾൾൾ

RF_LED# [32,34]

USBP7+ [12] USBP7- [12]

PDAT_SMB [5,6,12,26,46]

PCLK_SMB [5,6,12,26,46]

A_RST#_AND [11,16,26] RF_EN [34]

LPC_LFRAME# [11,34] LPC_LAD3 [11,34] LPC_LAD2 [11,34] LPC_LAD1 [11,34] LPC_LAD0 [11,34]

+3.3V: 1000mA +3.3Vaux:330mA +1.5V:500mA

PCIE_RST#_SB_R[11,30]

PCLK_DEBUG[11]

PCIE_TXP2[8] PCIE_TXN2[8]

PCIE_RXP2[8] PCIE_RXN2[8]

C C

CLK_PCIE_WLANP_2[11] CLK_PCIE_WLANN_2[11]

CLK_PCIE_2_REQ#[12]

A33

+WL_VDD

51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17

15 13 11

+3V

R530 *Short_8R530 *Short_8

+WL_VDD

C785

C785 10u/10V_8

10u/10V_8

+1.5V_WL

C782

C782 1000p/50V_4

1000p/50V_4

C779

0.1u/10V_4

C780

0.1u/10V_4

C781

*0.1u/10V_4

+1.5V

C789

C789 10U/6.3V_8

10U/6.3V_8

R99

R99 *Short_6

*Short_6

C783

C783 *0.1u/10V_4

*0.1u/10V_4

B B

A A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Mini-Card/WL/3G/SIM

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

27 49

1A

of

1

SATA HDD(HDD) SATA ODD (ODD)

2

http://hobi-elektronika.net

3

4

29

CN20

23

GND23

1

GND1

2

RXP

3

RXN

A A

MAIN_SATA

B B

GND2

TXN TXP

GND3

3.3V

3.3V GND GND GND

GND

RSVD

GND

12V 12V 12V

GND24

4 5 6 7

8 9 10 11 12 13 14

5V

15

5V

16

5V

17 18 19 20 21 22

24

SATA_RX0-_C SATA_RX0+_C

+5V_HDD

C752 0.01u/16V_4C752 0.01u/16V_4 C751 0.01u/16V_4C751 0.01u/16V_4

R478 *Short_8R478 *Short_8

+

C480

100u/6.3V_3528

C725

C725 10u/6.3V_6

10u/6.3V_6

SATA_TX0+ [13] SATA_TX0- [13]

SATA_RX0- [13] SATA_RX0+ [13]

+5V

C715

0.1u/10V_4

C716

C716 *0.1u/10V_4

*0.1u/10V_4

+5V_HDD

C464

0.01u/16V_4

C465

0.01u/16V_4

HOLE(OTH)

CN14

SP@SATA_ODD

JM51(2-DIMM)-->CN14 P/N:DFHS13FR075 JV51(3-DIMM)-->CN14 P/N:DFHS13FR017 DFHS13FR022 DFHS13FR005 DFHS13FR006

GND14

GND

GND GND

GND15

14 1

2

A+

3

A-

4

B-

B+

DP

5V 5V

MD

SATA_RX1+_C

6 7

SATA_DP

8 9 10 11 12 13

15

SATA_RX1-_C

5

C688 0.01u/16V_4C688 0.01u/16V_4 C685 0.01u/16V_4C685 0.01u/16V_4

R179 1K/F_4R179 1K/F_4

C682

0.01u/16V_4

C681

0.01u/16V_4

SATA_TX1+ [13] SATA_TX1- [13]

SATA_RX1- [13] SATA_RX1+ [13]

C326

C326 *0.1u/10V_4

*0.1u/10V_4

C325

C325 *0.1u/10V_4

*0.1u/10V_4

C684

C684 *10U/6.3V_8

*10U/6.3V_8

+5V_ODD

+

C296

C296 100u/6.3V_3528

100u/6.3V_3528

ODD POWER(ODD)

A26

Q38

+5V +5V

AO6402A

3

R529

100K

6 5 2 1

2

AO6402A

12

3

MOD_EN_5V

3

1

+3VPCU

12

R531

C C

EC_ODD_EN[34]

PCH_ODD_EN[11]

D D

1

2

R532 0_4R532 0_4 R533 *0_4R533 *0_4

ODD_EN

12

R535

R535 *100K_4

*100K_4

R531

100K

+15V

3

2

Q40

Q40 DMN601K-7

DMN601K-7

1

4

Q39

Q39 DMN601K-7

DMN601K-7

+5V_ODD

12

R435

*0_8

C619

0.1u/25V_6

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

SATA-HDD/ODD

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet

4

28 49

1A

of

5

Codec(ADO)

ADOGND

C784

2.2u/6.3V_6

+3V_DVDD1

C772

CBN

C778

+

2.2u/6.3V_6

35

36

CBP

37 38 39 40 41 42 43 44 45 46 47 48 49

CBN

AVSS2 AVDD2 PVDD1 SPK-L+ SPK-L-

(Vista Premium Version)

PVSS1 PVSS2 SPK-RSPK-R+ PVDD2 SPDIFO2/EAPD SPDIFO PGND

DVDD11GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3PD#4SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP

C767

C767 10u/6.3V_6

10u/6.3V_6

PD#

D D

+5VA

C768

C773

10u/6.3V_6

0.1u/10V_4

ADOGND

Place next to pin 38

C761

C761 10u/6.3V_6

10u/6.3V_6

R512 *Short_6R512 *Short_6

C757

0.1u/10V_4

+5V

+5VPVDD1

C765

C765 10u/6.3V_6

10u/6.3V_6

Spilt by AGND

C770

0.1u/10V_4

Place next to pin 39

Spilt by PGND

+5VPVDD2

C771

C766

0.1u/10V_4

10u/6.3V_6

Place next to pin 46

Spilt by DGND

+3V

0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer

C762

C762 10u/6.3V_6

10u/6.3V_6

R513 *Short_6R513 *Short_6

C758

0.1u/10V_4

+5V

C C

ANALOG

GND_EARTH

R514 *Short_6R514 *Short_6

DMIC_DAT_R[24] DMIC_CLK_R[24]

ADOGND

L_SPK+ L_SPK-

R_SPKR_SPK+

EAPD# SPDIF_OUT_R

0.1u/10V_4

A41

B B

SPDIF_OUT

L68 BLM15BB121SS1L68 BLM15BB121SS1

C763

C763 *33p/50V_4

*33p/50V_4

SPDIF_OUT_R

Power (ADO)

Demodulation Filter

C806

+

10u/10V_3216

DIGITAL

+5V

C811

0.1u/10V_4

A A

C730, C787 close U37 pin3 and L65

L65 Place close to Codec

ANALOG

L71 TI201209U220/6A/22ohm_8L71 TI201209U220/6A/22ohm_8

U37

3 2 1

R509 *0_4R509 *0_4

5

4

OUT

IN GND

5

SET

SHDN

*G923-330T1UF

ADOGND

Vset =1.25V

Vout =Vset[1+AR(1,2)/AR(2,GND)]

R562 *29.4K/F_4R562 *29.4K/F_4

R561

R561 *10K/F_4

*10K/F_4

+

C801

C801 10u/10V_3216

10u/10V_3216

+5VA

ADOGND

C810

0.1u/10V_4

+

CPVEE

34

33

CPVEE

HP-OUT-R

4

HPR

R541 *0_4R541 *0_4

R539 *Short_4R539 *Short_4

MIC1-VREFO-L_R

32

30

31

HP-OUT-L

MIC1-VREFO-L

MIC1-VREFO-R

ACZ_BITCLK_AUDIO_R

8/17 reserve for EMI

HPL

MIC1-VREFO-R

R542 *0_4R542 *0_4

C790 10u/6.3V_6C790 10u/6.3V_6

MIC1-VREFO

ADOGND

29

27

28

26

VREF

AVSS1

LDO-CAP

MIC2-VREFO

09/30

ACZ_SDIN0_R

R543 22_4R543 22_4

R544 22_4R544 22_4

C788 *22p/50V_4C788 *22p/50V_4

ADOGND

VREF

25

AVDD1

LINE1-R

LINE1-L

MIC1-R MIC1-L

MONO-OUT

JDREF

Sense-B

MIC2-R MIC2-L

LINE2-R

LINE2-L

Sense A

ALC271X-GR

12

DIGITAL

C805 *100p/50V_4C805 *100p/50V_4

ACZ_RST#_AUDIO

http://hobi-elektronika.net

MIC1-VREFO-L

ADOGND

Place next to pin 27

C796

C799

C799 10u/6.3V_6

10u/6.3V_6

0.1u/10V_4

U35

24 23

MIC1_R1

22

MIC1_L1

21 20

R574 20K/F_4R574 20K/F_4

19 18 17

Placement near Audio Codec

16 15 14

SENSEA

13

ANALOG

PCBEEP dont coupling any signals if possible 8/17 separate PCBEEP to Digital from Realtek suggestion

1.6Vrms

BEEP_1PCBEEP

C808 1u/16V_6C808 1u/16V_6

C804

C804 100p/50V_4

100p/50V_4

ACZ_RST#_AUDIO [12] ACZ_SYNC_AUDIO [12] ACZ_SDIN0 [12] ACZ_SDOUT_AUDIO [12] ACZ_BITCLK_AUDIO [12]

Place next to pin 25

R575 39.2K/F_4R575 39.2K/F_4 R576 20K/F_4R576 20K/F_4

R577

4.7K_4

Near CODEC

0.1u/10V_4

ADOGND

GND_EARTH don't coupling AGND and SPK signals

A40

R355 0_6R355 0_6 R491 0_6R491 0_6

R508 0_6R508 0_6 R354 0_6R354 0_6

R353 0_6R353 0_6 R504 0_6R504 0_6 R506 0_6R506 0_6

C756 *1000p/50V_4C756 * 1000p/50V_4 C755 *1000p/50V_4C755 * 1000p/50V_4

ADOGND

GND_EARTH

Tied at one point only under the ALC269 or near the ALC269

ADOGND

Mute(ADO)

+3V

R540

R540 *10K_4

*10K_4

+5V

ramp change to +5V

R572

R572 1K_4

1K_4

D27BAS316 D27BAS316

D25*BAS316 D25*BAS316

D26BAS316 D26BAS316

ACZ_RST#_AUDIO

EAPD#

C07 C07 D11

PD#

4

3

+5VA

C807

C803

10u/6.3V_6

ADOGND

LINEOUT_JD MIC1_JD

R578 47K_4R578 47K_4

If either HDA device io power use +1.5V, all device IO power change to +1.5V

C797

0.1u/10V_4

SPKR [12]

R564 *0_6R564 *0_6

+1.5V

R565 0_6R565 0_6

SB side tide to +3.3V_SUS

C798

C798 10u/6.3V_6

10u/6.3V_6

+3V

Place next to pin 9

A40

R520 0_6R520 0_6 R522 0_6R522 0_6

R518 0_6R518 0_6

A40

D31

D31 VPORT_6

VPORT_6

1 2

D32

D32 VPORT_6

VPORT_6

1 2

D33

D33 VPORT_6

VPORT_6

1 2

+5VA

R653

R653 *10K_4

*10K_4

EAPD_HP

3

Q45

Q45 *2N7002K

*2N7002K

2

AMP_MUTE# [34]

1

ADOGND

3

2

LINE-OUT/SPDIFO(AMP)

A32

HPL HPR

B2-TEST C11

R538 68_4R538 68_4 R548 68_4R548 68_4

+5VA

HP_JD

R351

R351 22K_4

22K_4

HPL-1

R560

R560 *1K_4

*1K_4

2

A41

L69 SBK160808T-121Y-N_6L69 SBK160808T-121Y-N_6 L70 SBK160808T-121Y-N_6L70 SBK160808T-121Y-N_6

R537

R537 *1K_4

*1K_4

+5VA

R349

R349 10K_4

10K_4

3

1

ADOGND

MIC(AMP)

MIC1_L1 MIC1_R1

C546 4.7u/6.3V_6C546 4.7u/6.3V_6 C519 4.7u/6.3V_6C519 4.7u/6.3V_6

MIC1_L2 MIC1_R2

Max. 100mVrms input for Mic-IN

Internal Speaker(AMP)

2

1

+3V

HP_JD

HPL_SYS

HPR_SYSHPR-1

ADOGND

C786

C791

2200p/50V_4

LINE_JD#

Q27

Q27 2N7002K

2N7002K

2200p/50V_4

2

ADOGND

LINEOUT_JD

3

Q36

Q36 2N7002K

2N7002K

1

2200p/50V_4

ADOGND

SPDIF_OUT

C07

EAPD_HP

MIC1-VREFO-R MIC1-VREFO-L

R321

4.7K/F_4

R319 1K/F_4R319 1K/F_4 R296 1K/F_4R296 1K/F_4

MIC1_JD

12

D16

D16 *VPORT_6

*VPORT_6

ADOGND

R_SPK-

R225 0_6R225 0_6

R_SPK+

R224 0_6R224 0_6 R223 0_6R223 0_6

L_SPK+ L_SPK+_1

R222 0_6R222 0_6

2

ADOGND

2

ADOGND

R297

4.7K/F_4

A41

MIC1_L3

L55

L55 SBK160808T-121Y-N_6

SBK160808T-121Y-N_6 L50

L50 SBK160808T-121Y-N_6

SBK160808T-121Y-N_6

Close to JACK connect

C423

*0.22u/25V_6

2

HP_JD

Q25

Q25 ME2347

ME2347

HPL_SYS

Q46

Q46 *MMBT3904

*MMBT3904

1 3

HPR_SYS

Q47

Q47 *MMBT3904

*MMBT3904

1 3

*0.22u/25V_6

1

+3V_SPD

3

C554

0.22u/6.3V_4

ADOGND

CN22

CN22 1 2

3 4 5

7

LED

Drive

8

IC

6

SPDIF_BLACK

Close to JACK connect

12

D20

B2-TEST

VPORT_6

ADOGND

B2-TEST

CN21

1

MIC1_L

2 6

MIC1_RMIC1_R3

3

MIC1_JD

4 5

MIC

C508

C508 470p/50V_4

470p/50V_4

C424

*0.22u/25V_6

MIC

C537

C537 470p/50V_4

470p/50V_4

C422

Size Docume n t Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet

Normal OPEN Jack

ADOGNDADOGND

R_SPK-_1 R_SPK+_1 L_SPK-_1L_SPK-

C421

*0.22u/25V_6

352-(&7=5

4XDQWD&RPSXWHU,QF

ALC271X / AMP / SPK

Wednesday, May 27, 2009

1

29

CHANGE TO BLACK

BLACK

7

8

CN8

1 2

5

3

6

4

SPEAKER-CONN

of

29 49

1A

A

B

C

D

E

http://hobi-elektronika.net

4 4

XD_RDY XD_RE# XD_CE# XD_CLE XD_ALE XD_WE# XD_WP# XD_D0 XD_D1

SD_DAT3 SD_CMD

VCC_XD

MS_SCLK MS_DATA3 MS_INS# MS_DATA2 MS_DATA0

3 3

+1.8V_VDD

C552

+3V_VDD

*0.47u/10V_4C547 *0.47u/10V_4C547

R516 330_4R516 330_4

C551

C551 *5p/50V_4

*5p/50V_4

+1.8V_VDD

XI

XO

pin13 output 20mils

CAP close PIN11,12

R308 SP@0_4R308 SP@0_4

Clock input selection '1' for 48MHz input [Default] '0' for 12MHz input

PCIE_RST#_SB_R[11,27]

R515 *Short_6R515 *Short_6

+3V

2 2

XTALSEL

C764

4.7u/10V_6

R326 0_4R326 0_4

+3V_VDD

USBP10+[12]

USBP10-[12]

R329 *100K_4R329 *100K_4

*5p/50V_4

crystal trace width needs at least 10 mils.

C548 18p/50V_4C548 18p/50V_4

Y2

R328

R328 270K_4

270K_4

12M

Hz

C549 18p/50V_4C549 18p/50V_4

Hz

A01

+3V_VDD

C540

0.1u/16V_4

U17

1

GPON7

2

EXT48IN

3

RSTN

4

REXT

5

VD33P

6

DP

7

DM

8

VS33P

XI

9

XI

XO

10

XO

11

VDD

12

VDD

C545

4.7u/10V_6

pin14 output 15mils

C542

0.1u/16V_4

C536

4.7u/10V_6

48

47

VDDHM

V1813CF_V33

14

XTALSEL

46

VDD

GND

VCC33

15

VCC_XD

45

AU6437-GBL

T50T50

T51T51

DATA1

DATA0

CTRL3

CRMD_N

NBMD

CTRL1

44

39

40

43

41

TRIST

NBMD

CTRL142CTRL3

DATA1

XTALSEL

V3317VDD20SDWPEN

GND

VDDHM18AGND5V16XDCDN22EEPCLK

CTRL4

19

21

C529

0.1u/16V_4

CN10

1

XD-R/B

2

XD-RE

3

XD-CE

4

XD-CLE

5

XD-ALE

6

XD-WE

7

XD-WP

8

XD-D0

9

XD-D1

10

SD-DAT2

11

SD-DAT3

12

SD-CMD

13

4IN1-GND1

14

MS-VCC

15

MS-SCLK

16

MS-DATA3

17

MS-INS

18

MS-DATA2

19

MS-DATA0

CONN_CARDREADER

DATA7

DATA6

38

37

DATA0

DATA7

DATA6

CTRL0 DATA5 CTRL2

GPI4 DATA4 DATA3 DATA2

XDWPN

GPI2

XDCEN

EEPDATA

GPI1

23

24

EEPCLK

XD_CD# CTRL4

+1.8V_VDD +3V_VDD

4 IN 1 CARD READER (MMC)

MS_DATA1

20

MS-DATA1 4IN1-GND2

XD-CD-SW

SD-WP-SW

SD-CD-SW

SHIELD1-GND SHIELD2-GND SHIELD3-GND SHIELD4-GND

CTRL0, CRTL 1 trace length shorter , and surround with GND.

CTRL0

36

DATA5

35

CTRL2

34 33

DATA4

32

DATA3

31

DATA2

30

XD_WP#

29

GPI2

28

XD_CE#

27

EEPDATA

26

GPI1

25

T43T43

R299*SP@0_4 R299*SP@0_4

SD write protect 1:decided by SDWP[Default] 0:letting SD always write-able

MS_BS

21

MS-BS

22 23

SD-VCC SD-CLK

SD-DAT0

XD-D2 XD-D3 XD-D4

SD-DAT1

XD-D5 XD-D6 XD-D7

XD-VCC

SD_CLK

24

SD_DAT0

25

XD_D2

26

XD_D3

27

DATA4

28

SD_DAT1SD_DAT2

29

DATA5

30

DATA6

31

DATA7

32 33

XD_CD#

34

SD_WP

35

SD_CD#

36

37 38 41 42

Main DFHD36MS006

Second DFHD36MS012

T40T40 T39T39

T38T38

VCC_XD

Close to Connect pin 14 & pin23

4.7u CAP close to pin23

VCC_XD

R280

C486

*5.1K_4

4.7u/10V_6

C492

0.1u/16V_4

DATA0

DATA1

DATA2

DATA3

CTRL0

CTRL1

CTRL2

SD_DAT0 MS_DATA0 XD_D0 SD_DAT1 MS_DATA1 XD_D1 SD_DAT2 MS_DATA2 XD_D2 SD_DAT3 MS_DATA3 XD_D3

Close to connector

R276 *Short_4R276 *Short_4

R281 *Short_4R281 *Short_4

SD_CLK XD_ALE MS_BS SD_WP XD_CLE MS_SCLK SD_CMD XD_RDY SD_CD# XD_WE#CTRL3 MS_INS# XD_RE#CTRL4

C494

C494 *10p/50V_4

*10p/50V_4

C491

C491 *10p/50V_4

*10p/50V_4

30

1 1

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Docum ent Number Rev

ize Document Num ber Rev

S

AU6437 CardReader

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

A

B

C

D

Date: Sheet

E

of

30 49

of

30 49

of

30 49

1A

5

4

3

2

1

http://hobi-elektronika.net

USB PORT(USB)

+5V_S5

C738

D D

USBON#[34]

C C

C738 1u/10V_6

1u/10V_6

USBON#

2

4 1

OC_6#[12]

U33

IN1

OUT3

IN23OUT2

OUT1 EN# GND

G547F2P81U

OC#

USBPWR1

8 7 6

5

USBP0-[12]

USBP0+[12]

R269 *Short_4R269 *Short_4 R268 *Short_4R268 *Short_4

BLUETOOTH CONN(BTM)

BT_POWER

2

3

Q20

Q20 AO3413

AO3413

BT_POWER USBP9+_R

USBP9-_R

+

C443

2.2u/6.3V_6

C451

C451 *0.01u/16V_4

*0.01u/16V_4

+3V_S5

C445

.33u/10V_6

B B

USBP9+[12] USBP9-[12]

A A

.33u/10V_6

BT_POWERON#[34]

5

1

R248

R248 47K_4

47K_4

R265 *Short_4R265 *Short_4

R266 *Short_4R266 *Short_4

BT_LED

30mil

C441

C441 1000p/50V_4

1000p/50V_4

CN9

CN9 5

4 3 2

7

1

6

BT_CONN

4

A25

USBPWR1

C723

100u/6.3V_3528

USBP0-_R USBP0+_R

TPDATA[34]

TPCLK[34]

+

CN19

CN19 1 2 3

12

RV1

RV2

4.7P_0402

1 2 3 445

USB_MB

8

7

6

5

TOUCHPAD BOARD CONN(TPD)

+5V+5V

R161

LEFT#

RIGHT#

R161 10K_4

10K_4

R162

R162 10K_4

10K_4

L29 LZA10-2ACB104MT/100mA_6L29 LZA10-2ACB104MT/100mA_6 L30 LZA10-2ACB104MT/100mA_6L30 LZA10-2ACB104MT/100mA_6

A02

SW3

3 1 4

SWITCH_1.5

SW2

3 1 4

SWITCH_1.5

3

2

USB BOARD CONN(USB)

A41

C320

*0.01u/16V_4

+TPVDD

TPDATA_R TPCLK_R

RIGHT#

LEFT#

L28 PBY201209T-300Y-N_8L28 PBY201209T-300Y-N_8

C328

0.1u/10V_4

C319

*0.01u/16V_4

31

+5V_S5

C837

C837 1u/10V_6

1u/10V_6

OC_7#[12] OC_4#[12]

LID591#[24,34]

USBP12-[12]

USBP12+[12]

USBP8-[12]

USBP8+[12]

USBP13-[12] USBP13+[12]

USBON#

+3VPCU

20mil

CN6

CN6 1 2 3 4 5 6 7 8 9

10

13

11

14

12

POWER/B

Size Document Number Rev

Date: Sheet

2

Date: Sheet

CN11

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Aces_88501-240N

352-(&7=5

4XDQWD&RPSXWHU,QF

eSATA/USB

Wednesday, May 27, 2009

1

of

31 49

of

31 49

of

31 49

1A

5

POWER BOARD CONN(UIF) LED(UIF)

D D

ACPRN[34]

+3V

C C

SATA_ACT#[13]

+3VPCU

A27

1

Q30

Q30 *BSS84

*BSS84

3

53

4

U21

U21 *TC7SH08FU

*TC7SH08FU

SUSLED#

R372

R372 *100K_4

*100K_4

2

SB side have pull-up

R374

R374 *10K_4

*10K_4

1 2

R373 0_4R373 0_4

+3V_S5

1

2

3

NBSWON#[34] NUMLED#[34]

CAPSLED#[34]

SATA_LED#_R

Q29

Q29 *BSS84

*BSS84

4

PWRLED#

2

D1 BAS316D1 BAS316

NUMLED# CAPSLED#

SATA_LED#_R

12

+3V_S5

1

Q28

Q28 BSS84

BSS84

3

D35

D35 *VPORT_6

*VPORT_6

PWR_LED SUS_LED PIPE_LED

NUMLED#CAPSLED#

3

http://hobi-elektronika.net

Power LED

+3V

CN1

CN1 12 11 10

9 8 7 6 5 4 3 2 1

14 13

POWER/B

12

D34

D34 *VPORT_6

*VPORT_6

LED BOARD CONNECTOR(UIF)

Battery LED

Communcation LED

RF_LED#[27,34]

RF_LED_EN#[34]

R645 *0_4R645 *0_4

2

1

+3V_S5

Amber

D09

SUSLED#[34]

PWRLED#[34]

R362 715_4R362 715_4 R361 20_4R361 20_4

SUSLED#_R PWRLED#_R

LED3

4 3 1

LED_A/B

2

32

Blue

3

R646 0_4R646 0_4

2

+3VPCU

2

*BSS84

*BSS84 Q43

Q43

1

C197

0.1u/10V_4

+3V

R358 *1M_4R358 *1M_4 R357 *1M_4R357 *1M_4

BATLED1#[34] BATLED0#[34]

R359 715_4R359 715_4 R356 20_4R356 20_4

D09

B04

+3VPCU

BATLED1#_R BATLED0#_R

Amber

LED1

4 3 1

LED_A/B

Blue

RF_LED_EN#

A56

R360 715_4R360 715_4

D09

WL AN / Am ber

WLAN_LED#_R

LED4

LED

B2-TEST

SATA_LED#_R

B B

B2-TEST

A A

5

4

12

D36

D36 *VPORT_6

*VPORT_6

+3V +3V

CN4

D09

R84 2.2K_4R84 2.2K_4

2

Q5 BSS84Q5BSS84

3

ODD_EJ[34]

POWER_SAVE[34]

1

P_SAVE_LED#[34]

P_SAVE_LED

ODD_EJ POWER_SAVE

R643

R644

100K_4

A27

ODD_EJ POWER_SAVE

12

D37

D37 *VPORT_6

*VPORT_6

R643 100K_4

100K_4

1 2 3 4 5 6

CN4

1 2 3 4 5 6

SW/LED

12

D38

D38 *VPORT_6

*VPORT_6

7

8

B2-TEST

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

3

2

Date: Sheet

POWER/USB/BT/TP/MDC

Wednesday, May 27, 2009

1

32 49

1A

of

5

K/B(KBC)

7 8 5 3 1

CP6 *100p/50V_8P4CCP6 *100p/50V_8P4C 7 8 5

D D

C C

3 1

CP5 *100p/50V_8P4CCP5 *100p/50V_8P4C 7 8 5 3 1

CP1 *100p/50V_8P4CCP1 *100p/50V_8P4C 7 8 5 3 1

CP2 *100p/50V_8P4CCP2 *100p/50V_8P4C 7 8 5 3 1

CP3 *100p/50V_8P4CCP3 *100p/50V_8P4C 7 8 5 3 1

CP4 *100p/50V_8P4CCP4 *100p/50V_8P4C

C585 *100p/50V_4C585 *100p/50V_4

C586 *100p/50V_4C586 *100p/50V_4

MX3 MX2

6

MX1

4

MX0

2

MX7 MX6

6

MX5

4

MX4

2

MY0 MY1

6

MY2

4

MY3

2

MY4 MY5

6

MY6

4

MY7

2

MY8 MY9

6

MY10

4

MY11

2

MY12 MY13

6

MY14

4

MY15

2

MY16 MY17

MY0[34] MY1[34] MY2[34] MY3[34] MY4[34] MY5[34] MY6[34] MY7[34] MY8[34] MY9[34] MY10[34] MY11[34] MY12[34] MY13[34] MY14[34] MY15[34] MY16[34] MY17[34] MX7[34] MX6[34] MX5[34] MX4[34] MX3[34] MX2[34] MX1[34] MX0[34]

MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17 MX7 MX6 MX5 MX4 MX3 MX2 MX1 MX0

CN2KBCN2 1 2 3 4 5 6 7 8 9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

KB

4

3

2

1

http://hobi-elektronika.net

+3VPCU

RP16 10K_10P8RRP16 10K_10P8R

10

MX4 MX2

9

MX5

8

MX6

7 4

MX7

27 28

MX3

1 2

MX1

3

MX0

56

CPU FAN(THM )

PM_THERM#[2,4,12]

CPUFAN#[34]

R72

*10K_4

+3V +3V

R68

R68 10K_4

10K_4

FAN_PWM_E

Q4

2

MMBT3904

1 3

2

1 3

Q3

Q3 MMBT3904

MMBT3904

R60

R60 10K_4

10K_4

+5V

R389

R389 10K_4

10K_4

FANSIG[34]

FAN_PWM_CN

30mil

+3V

R390

R390 10K_4

10K_4

+5V

+5V_FAN

R610

R610 *Short_6

*Short_6

33

CN12

CN12 1

2 3 4

FAN_CONN

B B

A A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

KB/FAN/EE RETURN CAP

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

33 49

1A

of

5

4

3

2

1

A41

EC(KBC)

L38 PBY160808T-220Y-N_6L38 PBY160808T-220Y-N_6

30mil

+3VPCU

R209

2.2/F_6

C374

4.7u/10V_6

D D

CLK_PCI_775 CLK_PCI_775

R205

R205 *22_4

*22_4

C365

C365 *10p/50V_4

*10p/50V_4

NOCIR#

R210

R210 *10K_4

*10K_4

With CIR module – floating

C C

B B

Without CIR module – pull down 10K

ϭΖƐƚ^Dh^ĨŽƌ^ŵĂƌƚĂƚƚĞƌǇŚĂƌŐĞƌ

ϮŶĚ^Dh^ĨŽƌWhƚŚĞƌŵĂůƐĞŶƐŽƌ

4.7u/10V_6

RTC_CLK[11]

Palm Rest Therma l Sensor(THM)

A A

TPD_TRI P

5

+3VPCU_EC

t

R175 781@0_4R175 781@0_4

+3V

0.03A(30mils)

C313

C373

0.1u/10V_4

*0.1u/10V_4

LPC_LFRAME#[11,27]

LPC_LAD0[11,27] LPC_LAD1[11,27] LPC_LAD2[11,27] LPC_LAD3[11,27]

CLK_PCI_775[11]

CLKRUN#[11]

SIO_A20GATE[12 ]

SIO_RCIN#[12]

SIO_EXT_SCI#[12]

EC_FPBACK#[2 4 ]

A_RST#_SB[9,11,24] USBON#[31]

IRQ_SERIRQ[11]

SIO_EXT_SMI#[12 ]

CPU_SMBCLK[4]

CPU_SMBDATA[4]

BT_POWERON#[31]

E775_32KX1

R178 *775@20M_6R178 *775@20M_6

C330

*775@15P/50V_4

E775AGND

EĞĂƌdWŽŶdKWƐŝĚĞĂŶĚ

R284

ŽŶůǇĨŽƌDƉůĂƚĨŽƌŵ

47K_6

WĂůŵZĞƐƚƵƐĞ

RT1

RT1 100K/F/NTC_4

100K/F/NTC_4

E775AGND

C349

0.1u/10V_4

MBDATA[35]

TPDATA[31]

1.2V_ON[38] MAINON[40,42,43]

1 4

MX0[3 3 ] MX1[3 3 ] MX2[3 3 ] MX3[3 3 ] MX4[3 3 ] MX5[3 3 ] MX6[3 3 ] MX7[3 3 ]

MY0[3 3 ] MY1[3 3 ] MY2[3 3 ] MY3[3 3 ] MY4[3 3 ] MY5[3 3 ] MY6[3 3 ] MY7[3 3 ] MY8[3 3 ] MY9[3 3 ] MY10[3 3 ] MY11[3 3 ] MY12[3 3 ] MY13[3 3 ] MY14[3 3 ] MY15[3 3 ] MY16[3 3 ] MY17[3 3 ]

MBCLK[35]

TPCLK[31]

Y1

*32.768KHzY1*32.768KHz

E775AGND

C288

C309

0.1u/10V_4

*0.1u/10V_4

NOCIR#

MY0

MBCLK MBDATA CPU_SMBCLK CPU_SMBDATA

1.2V_ON

E775_32KX2

R180

R180 *775@33K/F_4

*775@33K/F_4

T103T103

C336

C336 *775@15P/50V_4

*775@15P/50V_4

POWER-ON Sw itch(KBC)

C382

C375

4.7u/10V_6

0.1u/10V_4

19

46

U13

VCC1

VCC2

3

LFRAME

126

LAD0

127

LAD1

128

LAD2

1

LAD3

2

LCLK

8

GPIO11/CLKRUN

121

GPIO85/GA20

122

KBRST/GPIO86

29

ECSCI/GPIO54

6

GPIO24/LDRQ

124

GPIO10/LPCPD

7

LREST

123

GPIO67/PWUREQ

125

SERIRQ

9

GPIO65/SMI

54

KBSIN0

55

KBSIN1

56

KBSIN2

57

KBSIN3

58

KBSIN4

59

KBSIN5

60

KBSIN6

61

KBSIN7

53

KBSOUT0/JENK

52

KBSOUT1/TCK

51

KBSOUT2/TMS

50

KBSOUT3/TDI

49

KBSOUT4/JEN0

48

KBSOUT5/TDO

47

KBSOUT6/RDY

43

KBSOUT7

42

KBSOUT8

41

KBSOUT9/SDP_VIS

40

KBSOUT10/P80_CLK

39

KBSOUT11/P80_DAT

38

KBSOUT12/GPIO64

37

KBSOUT13/GPIO63

36

KBSOUT14/GPIO62

35

KBSOUT15/GPIO61/XOR_OUT

34

GPIO60/KBSOUT16

33

GPIO57/KBSOUT17

70

GPIO17/SCL1

69

GPIO22/SDA1

67

GPIO73/SCL2

68

GPIO74/SDA2

72

GPIO37/PSCLK1

71

GPIO35/PSDAT1

10

GPIO26/PSCLK2

11

GPIO27PSDAT2

12

GPIO25/PSCLK3

13

GPIO12/PSDAT3

77

GPIO00/32KCLKIN

79

GPIO02

NPCE781

NBSWON#

12

G3

G3 *SHORT_PAD1

*SHORT_PAD1

4

+A3VPCU

76

88

115

102

VCC3

VCC4

VCC5

AVCC

LPC

KB

SMB

PS/2

GND1

GND2

GND3

GND4

5

18

45

78

89

L39 PBY160808T-220Y-N_6L39 PBY160808T-220Y-N_6

E775AGND

GND5

http://hobi-elektronika.net

+3V

A/D

D/A

GPIO

TIMER

SPI

IR

GPIO87/CIRRXM/SIN_CR

GPO83/SOUT_CR/XORTR

FIU

GPIO55/CLKOUT/IOX_DIN

AGND

GND6

103

116

A41

D7

BAS316D7BAS316

GPIO90/AD0 GPIO91/AD1 GPIO92/AD2 GPIO93/AD3

GPIO05 GPIO04

GPIO94/DA0

GPI95/DA1 GPI96/DA2

GPI97

GPIO01/TB2

GPIO03

GPIO06/IOX_DOUT

GPIO07

GPIO23/SCL3

GPIO30/CIRTX2

GPIO31/SDA3 GPIO32/D_PWM GPIO33/H_PWM

GPIO36

GPIO40/F_PWM

GPIO42/TCK GPIO43/TMS

GPIO44/TDI

GPIO45/E_PWM

GPIO46/CIRRXM/TRST

GPO47/SCL4 GPIO50/TDO

GPIO51

GPIO52/CIRTX2/RDY

GPIO53/SDA4

GPIO81

GPO82/TEST

GPO84/TRIST

GPIO41

GPIO56/TA1

GPIO20/TA2/IOX_DIN

GPIO14/TB1

GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO66/G_PWM

GPIO77/SPI_DI

GPO76/SPI_DO/SHBM

GPIO75/SPI_SCK

GPIO72/IRRX1/SIN2

GPIO70/IRRX2_IRSL0

GPIO71/IRTX/SOUT 2

GPIO34/CIRRXL

GPIO16/CIRTX

F_SDI

F_SDO

F_CS0 F_SCK

VCC_POR

VREF

VCORF

44

VCORF_uR

C289

1u/6.3V_4

4

VDD

C343

C342

0.1u/10V_4

4.7u/10V_6

97 98 99 100 108 96

101 105 106 107

64 95 93 94 119 109 120 65 66 15 16 17 20 21 22 23 24 25 26 27 28 91 110 112 80

31 117 63

32 118 62 81

84 83 82

75 73 74 113 14 114 111

86 87 90 92

30 85 104

WL_SW TPD_TRI P

TP_LE D# TP_SW #

AC_OFF

EC_GPIO82

ODDLED

ODD_EJ SHBM_R RF_LED_R

RSMRST#_uR PWROK_EC_uR CIRR_X2

HWPG

SPI_SDI_uR SPI_CS0#_uR

SPI_SCK_uR_R ECDB_CLOCK VCC_POR# VREF_uR

Take care of power side

C392 10U/6.3V_8C392 10U/6.3V_8 C391 0.01u/16V_4C391 0.01u/16V_4

T22T22

T23T23 T25T25

T20T20

EC_ODD_EN

T24T24

T18T18

R615 *0_4R615 *0_4

R173 *Short_4R173 *Short_4 R167 *Short_4R167 *Short_4

T21T21

R212 22_4R212 22_4 R213 22_4R213 22_4

T19T19

R216 47K/F_4R216 47K/F_4

R211 *Short_4R211 *Short_4

ICMNT

NBSWON#

ICMNTE775AGND

SPI_SDO_uRSPI_SDO_uR_R SPI_SCK_uR

+A3VPCU

TEMP_MBAT [35]

ICMNT [35]

POWER_SAVE [32]

ACIN [35] NBSWON# [32] LID591# [24,31] SUSB# [12] MXM_SMCLK12 [21]

MXM_SMDATA12 [21] BATLED0# [32] BATLED1# [32] VRON [37,43] SUSLED# [32]

AMP_MUTE# [29] VR2.5_ON [42] CPUFAN# [33] PANEL_COLOR [24] VIN_ON [35] D/C# [35]

S5_ON [36,38,43,44]

HDMI_HPD_EC# [25] EC_ODD_EN [28] DNBSWON# [12]

RF_LED_EN# [32]

PANEL_ENG [24]

FANSIG [33] CONTRAST [24]

NUMLED# [32 ] PWRLED# [32] CAPSLED# [32]

ODD_EJ [32]

SUSC# [12] PWROK_EC [4,15]

RF_EN [27]

P_SAVE_LED# [32]

+3VPCU

SM BUS ARRANGEMENT TABLE

SM Bus 1

SM Bus 2

SM Bus 3

SM Bus 4

INTERNAL KEYBOARD STRIP SE T( KBC)

MY0

3

ACPRN [32]

SUSON [40]

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A56

B04

A56

RF_LED# [27,32]

ICH_RSMRST# [12]

Battery

PCH

MMB3 and EEPROM

HDMI Controller, MMB1, MMB2 a nd VGA The rmal

R146 10K_4R146 10K_4

+3VPCU

I/O ADDRESS SETTING(KBC)

SHBM=0: Enable s hared memory with host BIOS

SHBM

1/13 Comfirm by vendor mail : Disabled ('1') if using FWH device on LPC. Enabled ('0' ) if using SPI flash for both syst em BIOS and EC firmware

SM BUS PU(KBC)

SPI FLASH(KBC)

U15 Change to 1M ==>AKE5GFK0Z09 / AKE3GZN0N00 / AKE3GZP0801

SPI_SDI_uR

R219 100K_4R219 100K_4

R218 10K_4R218 10K_4

+3VPCU

1/13 Comfirm by vendor mail : If the Southbridge enables 'Long Wait Abort' by default, the flash device should be 50MHz (or faster)

HWPG(KBC)

HWPG_1.5V[40]

HWPG_0.95V[39]

SYS_HWPG[36] HWPG_1.1V[38] HWPG_1.8V[38,42]

HWPG[2]

C01

2

SHBM_R

MBCLK MBDATA

MXM_SMCLK12 MXM_SMDATA12

CPU_SMBCLK CPU_SMBDATA EC_ODD_EN

1.2V_ON

R220 22_4R220 22_4

R196 10K_4R196 10K_4

R156 2.2K_4R156 2.2K_4 R150 2.2K_4R150 2.2K_4

R214 SW @2.2K_4R214 SW @2.2K_4 R215 SW @2.2K_4R215 SW @2.2K_4

R151 10K_4R151 10K_4 R157 10K_4R157 10K_4 R170 10K_4R170 10K_4 R181 *10K_4R181 *10K_4

B2-TEST

+3VPCU +3V_D_EXT

+3V

A26

U15

SPI_SDI_uR_R SPI_SDO_uR SPI_SCK_uR SPI_CS0#_uR

U15

2

SO

5

SI

6

SCK

1

CE

W25X16AVSSIG

D12 BAS316D12 BAS316 D13 *BAS316D13 *BAS316

D11 BAS316D11 BAS316 D10 BAS316D10 BAS316 D9 BAS316D9 BAS316

4XDQWD&RPSXWHU,QF

Size Docum ent Number Rev

ize Document Num ber Rev

S

WPCE775C_0DG & FLASH

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

+3VPCU

8

VDD

7

HOLD

3

WP

4

VSS

+3V

R217

R217 10K_4

10K_4

352-(&7=5

1

A20

C420

0.1u/10V_4

HWPGHWPGHWPGHWPG

34

of

34 49

of

34 49

of

34 49

1A

5

4

3

2

1

http://hobi-elektronika.net

D D

PJ2

POWER_JACK

C13

1 2 3 4

PC118

PC116

0.1u/50V_6

VA

EC54

EC54 22U/25V_1210

22U/25V_1210

PC118

2200p/50V_6

EC55

EC55 22U/25V_1210

22U/25V_1210

CLOSE TO PJ2 PIN 1,2

C C

PC4

0.1u/50V_6

PC2

100p/50V_6

1 2 3 4 5 6 7 89

PU1

PU1 CM1293A-04SO

CM1293A-04SO

1

CH1

2

VN CH23CH3

MBAT+

CH4

TEMP_MBAT_C

PR1

PR1 *Short_4

*Short_4

PC1

47p/50V_6

PR178

PR178 100_4

100_4

MBDATA

6 5

VP

MBCLKTEMP_MBAT_C

4

+3VPCU

PR177

PR177 100_4

100_4

A53

PJ1

B B

A A

PJ1

10

Batt_Conn

Add ESD diode base on EC FAE suggestion

A41

UPB201212T-121Y-N_8

VA VA2VA2VA2VA2

UPB201212T-121Y-N_8

B2-TEST

PR30

100K_6

ACIN[34]

12

PR4

PR4 100_4

100_4

PC3

PC3 47p/50V_6

47p/50V_6

MBCLK [34]

MBDATA [34]

PL4

PL3

+3VPCU

A41

PL1

UPB201212T-121Y-N_8

PL2

UPB201212T-121Y-N_8

PR10

PR10 100K/F_6

100K/F_6

VA1

PC115

0.1u/50V_6

PD1

PD1 SW1010CPT

SW1010CPT

BAT-V

TEMP_MBAT [34]

MBDATA[34]

MBCLK[34]

+3VPCU

PR43

49.9/F_6

PR40

82.5K_6

PR39

PR39 22K/F_6

22K/F_6

PD6

SBR1045SP5-13

1 2

88731ACSET88731ACSET88731ACSET88731ACSET

PC27

*1u/16V_6

DCINDCIN

3

+3VPCU

PC21

0.1u/50V_6

PC26

0.01u/50V_6

2 1

PD7

PD7 SMAJ20A

SMAJ20A

PC33

0.1u/50V_6

PC24

PC24 *0.01u/50V_6

*0.01u/50V_6

PC109

0.1u/50V_6

VIN_SRC

CSIP_1

11

VDDSMB

9

SDA

10

SCL

13

ACOK

22

DCIN

2

ACIN

3

VREF

4

ICOMP

5

NC

6

VCOMP

PR34

2.21K/F_6

PC22

0.01u/50V_6

1

VA2VA2

NC

PR44

PR44 10/F_6

10/F_6

GND33GND32GND31GND

PR186

PR186 220K/F_6

220K/F_6

PR174

PR174 220K/F_6

220K/F_6

0.1u/50V_6

CSIP

28

30

CSSP

NC

7

PC31

ISL88731A

CSIN 27

PU4

ICM

8

A01

1 6 2 3

PQ36

IMD2AT108

PR45

PR45 10/F_6

10/F_6

26

VCC

CSSN

NC

14

PQ37

PQ37 FDD6685

FDD6685

43

1

5 4

PC32

1u/16V_6

PR41

4.7_6

4.7_6 ISL88731_VDDP

21

PR42

VDDP

2.7_6

88731B_2

25

BOOT

ISL88731_UGATE

24

UGATE

ISL88731_PHASE

23

PHASE

ISL88731_LGATEISL88731_LGATEISL88731_LGATEISL88731_LGATE

20

LGATE

19

PGND

CSOP

18

CSOP

CSON

17

CSON

PR33

16

NC

*Short_4

15

VBF

29

GND GND

12

ISL88731 thermal pad tie to Pin12

ICMNT [34]

PR197

0.01/F_7520

1 2

PC29

PC29 1u/16V_6

1u/16V_6

PD8

PD8 *RB500V-40

*RB500V-40

0.1u/50V_8

88731B_1

PR38

PR38 10/F_6

10/F_6

PC23

0.1u/50V_6

PR36

PR36 10/F_6

10/F_6

PC127

PR32

PR32 100_4

100_4

A01

CSOP_1

BAT-V

VIN_SRC

CSIP_1

PR2 *Short_6PR2 *Short_6

578

3 6

241

578

3 6

241

BAT-V

PQ45

PQ45 AO4468

AO4468

PQ46

PQ46 AO4710

AO4710

D/C# [34]

PC35

PC35 2200p/50V_6

2200p/50V_6

PR46

2.2_6

PC34

PC34 2200p/50V_6

2200p/50V_6

A39

PC124

0.1u/50V_6

EC4

0.1u/50V_6

PL7

6.8uH/6.5A

B2-TEST

CSOP_1

BAT-V

PC111

1U/25V_6

A46 A47

VIN_ON[34]

VIN_SRC

PC117

PC117 2200p/50V_6

2200p/50V_6

VIN_SRC

B2-TEST

PC129

EC41

4.7u/25V_8

*22U/25V_1210

PR200

0.01_3720

1 2

PC8

2200p/50V_6

VIN_SRC VIN

PR37

PR37 150K_6

150K_6

1 3

PQ5

PQ5 DMN601K-7

DMN601K-7

PQ42

AOL1413

2

4

3

1

PR27

PR27 33K_6

33K_6

PQ6

PQ6 DMN601K-7

DMN601K-7

52

PR35

PR35 39K_6

39K_6

A48

2

EC53

EC53 *22U/25V_1210

*22U/25V_1210

PC126

10u/25V_1206

PQ39

PQ39 FDD6685

FDD6685

1

PR28

PR28 10K_6

10K_6

3

1

43

BAT-V

PC125

10u/25V_1206

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

CHARGER (ISL88731)

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

of

35 49

of

35 49

of

35 49

1A

5

4

3

2

1

http://hobi-elektronika.net

MAIND

MAIND [40,43]

PR241

*Short_4

PR147

*Short_4

578

PQ67

PQ67 AO4468

AO4468

3 6

241

578

PQ68

PQ68 AO4710

AO4710

3 6

241

+15V

D D

OCP: 10A

6.15A

+5VPCU

VIN_SRC

A29

+

PC193

100u/25V_6.3*5.8

PC101

2200p/50V_6

A28

B2-TEST

PC187

4.7u/25V_8

SYS_SHDN#[2,4,43,44]

EC19

0.1u/50V_6

A28

PL16

2R2uH-5.8mR/14A

PR252

+

PC198

PC203

C C

*10u/25V_1206

PC203 330u/6.3V_6X5.7

330u/6.3V_6X5.7

PR252

*0_4

PC105

0.1u/50V_6

PR250

0_4

OCP:10A

L(ripple current) =(19-5)*5/(2.2u*0.4M*19) ~4.18A

Iocp=10-(4.18/2)=7.91A Vth=7.91A*14.2mOhm=112.322mV R(Ilim)=(112.322mV*10)/5uA ~220K

PR163

2.2_6

PC103

2200p/50V_6

B2-TEST

PD14

PD14 SX34

SX34

+5VPCU_FB

VL

PR138

PR138 39K/F_4

39K/F_4

3V5V_EN

3V_EN

5V_EN

5V_DH

5V_LX SKIP

5V_DL

PC100

0.1u/50V_6

+15V_ALWP

PR258

PR258 22_8

22_8

PR146

PR146 *Short_4

*Short_4

1PS302

PD5

PD13

PR156

PR156 220K/F_6

220K/F_6

2

1

2

1

PC190

0.1u/50V_6

2 1

PD12

PD12 *ZD5.6V

*ZD5.6V

PR257

PR257 390K/F_4

390K/F_4

PR161

PR161 150K/F_4

150K/F_4

3

DDPWRGD_R

PC88

0.1u/50V_6

PC102

0.1u/50V_6

0.1u/50V_6 PC189

PC189

0.1u/50V_6

PR259

PR259 *200K/F_4

*200K/F_4

D07

PR181

PR181 0_4

0_4

8206_ONLDO

5V_EN

PR137

PR137 1/F_6

1/F_6

0.1u/50V_6

PC99

4.7u/10V_8

9

BYP

10

OUT1

11

FB1

12

ILIM1

13

PGOOD1

14

EN1

15

DH1

16

LX1

37

Pad5

36

Pad4

PR234

PR234 *0_6

*0_6

RT8206B_PIN20

PC98

35

1u/16V_6

VL

8

LDOREFIN

BST117DL118PVCC19NC220GND121PGND22DL223BST2

Pad133Pad234Pad3

VL

PC83

7

6

VIN

LDO

RT8206B

PC186

0.01u/16V_4

4

5

3

NC1

ONLDO

PU10

PR133 *Short_4PR133 *Short_4

PR233 *Short_4PR233 *Short_4

PR242

PR242 *39K/F_4

*39K/F_4

1u/16V_6

1

TON2VCC

24

PC97

REF

REFIN2

OUT2 SKIP#

PGOOD2

REF

PC96

0.1u/50V_6

ILIM2

EN2 DH2

LX2

32 31 30

28 27 26

29

25

PR132

PR132 1/F_6

1/F_6

PR253

PR253 *0_6

*0_6

PR256

*Short_4

PR255

PR255 *0_4

*0_4

PR160

PR160 *Short_4

*Short_4

PR158

REFIN2

191K/F_6

DDPWRGD_R

3V_EN

PC86

0.1u/50V_6

OCP:8A

L(ripple current) =(19-3.3)*3.3/(2.2u*0.5M*19) ~2.48A

Iocp=8-(2.48/2)=6.67A Vth=6.67A*15mOhm=94.714mV R(Ilim)=(94.714mV*10)/5uA ~191K

578

3V_DH

3 6

578

3 6

+3VPCU_OUT

PR159

PR159 *0_6

*0_6

PR162

PR162 0_6

0_6

241

3V_LX

3V_DL

SKIP

PQ66

PQ66 AO4468

AO4468

PD11

PD11 SX34

SX34

PQ65

PQ65 AO4710

AO4710

REF

EC17

0.1u/50V_6

B2-TEST

PR155 *Short_4PR155 *Short_4

DDPWRGD_R

PC95

2200p/50V_4

PL14

PL14 2R2uH-5.8mR/14A

2R2uH-5.8mR/14A

PR154

2.2_6

PC92

PC92 2200p/50V_6

2200p/50V_6

PR157

PR157 *0_4

*0_4

+3VPCU

PR135

*100K_4

PC185

4.7u/25V_8

PR152

*Short_4

A28

+

PC188

*100u/25V_6.3*5.8

PR254

PR254 0_6

0_6

PR251

PR251 *0_6

*0_6

VIN_SRC

B2-TEST

OCP : 8A

5.03A

PC89

0.1u/50V_6

SYS_HWPG [34]

+3VPCU

+

A28

PC183

PC183 330u/6.3V_6X5.7

330u/6.3V_6X5.7

B B

+15VVIN_SRC

3

PQ32

1

DMN601K-7

PR165

PR165 1M_6

1M_6

VIN_SRC

PR164

PR164 *1M_6

*1M_6

S5D

PQ30

AO4468

PC104

PC104 *2200p/50V_4

*2200p/50V_4

578

3 6

MAIND MAIND

241

+5V_S5

3A

+5V_S5+3V_S5

PR166

PQ35

PQ35 DMN601K-7

DMN601K-7

PR166 22_8

22_8

3

2

PQ33

PQ33 DMN601K-7

DMN601K-7

1

4

PR167

PR170

1M_6

22_8

3

S5_ON[34,38,43,44]

A A

5

2

PQ34

DTC144EUA

2

PR171

1 3

1M_6

1

PQ31

AO4468

+5VPCU

578

3 6

241

+5V

3.15A 3.2A

3

PQ62

AO4468

+3VPCU

578

+3VPCU+5VPCU

3

S5D

2

PQ64

AO3404

1

3 6

241

+3V

2

+3V_S5

1.3A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

SYSTEM 5V/3V (RT8206)

Wednesday, May 27, 2009

Date: Sheet

1

of

36 49

of

36 49

of

36 49

1A

A

GND

+5V

PQ63

PQ63 *DTC144EU

*DTC144EU

Offset & Droop

SVD

0

1

0

SVD

0

1

CPU_COREPG[15,39]

1 3

PR243 0_4PR243 0_4

OFS/VFIXEN

+3.3V

CPU_PWRGD_SVID_REG[2,11]

Metal VID Codes

SVC

0

1

1 1 0.8

VFIXEN VID Codes

SVC

0

1

6265_EN

PR153

PR153 100K_4

100K_4

4 4

3 3

A43

B2-TEST

2 2

+VCORE

CPU_VDD0_FB_H[2] CPU_VDD0_FB_L[2]

D14

CPU_VDD1_FB_L[2] CPU_VDD1_FB_H[2]

1 1

+VCORE

SVI

OX

X

Output

1.1

1.0

0.9

Output

1.4

1.21

1.0

0.8

+3V+1.8V

2

VDIFF_RC

PR150

PR150 255/F_4

255/F_4

PR141

PR141 1K/F_4

1K/F_4

ISL6265A_COMP_R

PR151

54.9K/F_4

54.9K/F_4 PC90

PC90

180p/50V_4

Close to

PR134

CPU socket

10/F_6

PR239

PR239 10/F_6

10/F_6

Close to CPU socket

PR237

PR237 *10/F_6

*10/F_6

PR129

PR129 10/F_6

10/F_6

O

X

O

B2-TEST

PR144

PR144 *Short_4

*Short_4

PR245

PR245 *10K/F_6

*10K/F_6

PC93

4700p/25V_4

1200p/50V_4

VFIX

O

X

+3V

+5VPCU

PR265

PR265 10K_4

10K_4

CPU_SVD[2]

CPU_SVC[2]

VRON[34,43]

HWPG_2.5V[42,43]

PC94

PC184

1000p/50V_6

ISP_0 ISP_0_R

ISN_0

+3V

PR148 *0_4PR148 *0_4 PR179 0_4PR179 0_4

PR149

19.6K/F_4

FB_ISL6265A

ISL6265A_COMP

6.81K/F_4

18.2K/F_4

Parallel

PR247 0_4PR247 0_4

PR248 *0_4PR248 *0_4

PR249 *10K/F_4PR249 *10K/F_4

PR145 *Short_4PR145 *Short_4

PR142 *Short_4PR142 *Short_4

PR143 *Short_4PR143 *Short_4

VDIFF

PR244

PR139

+5VPCU

12

VIN

6265_EN

A31

PR140

97.6K/F_4

ISL6265A_VW

PR238

3.92K/F_4

+1.5VSUS

B

PR240

PR240 10/F_6

10/F_6

PR128 *Short_8PR128 *Short_8

PR246

PR246 10/F_6

10/F_6

PC91

0.1u/50V_6

1

2

3

4

5

6

7

RBIAS

OCSET

8

9

10

11

12

CPU_VDDNB_FB_H[2]

CPU_VDDNB_FB_L[2]

49

GND

OFS/VFIXEN

PGOOD

PWROK

SVD

SVC

ENABLE

RBIAS

OCSET

VDIFF_0

FB_0

COMP_0

VW_0

PC87

0.1u/50V_6

PC182

PC182 1u/25V_8

1u/25V_8

PR232

PR232 1K/F_4

1K/F_4

C

3A

http://hobi-elektronika.net

CPU_VDDNB_CORE

12

PR127

PR127 10/F_6

10/F_6

PR126

PR126 10/F_6

10/F_6

PC168

330u/2V_7343

PC82

45

COMP_NB

PC85

PC85 1200p/50V_4

1200p/50V_4

PR136

44.2K/F_4

44

FSET_NB

PC82 1000p/50V_6

1000p/50V_6

43

VSEN_NB

42

RTN_NB

41

OCSET_NB

PR123

11.3K/F_4

40

PGND_NB

PR235

22.1K/F_4

PC84

33p/50V_4

46

47

48

VIN

VCC

FB_NB

PC167

+

10u/25V_1206

LGATE_NB

PHASE_NB

UGATE_NB

39

37

38

LGATE_NB

PHASE_NB

UGATE_NB

BOOT_NB

Pin 49 is GND Pin

PU9

ISL6265A

RTN_1

RTN_0

16

*4700p/25V_4

17

PC81

PR125

PR125 *1K/F_4

*1K/F_4

PR124

PR124 *255/F_4

*255/F_4

VSEN_1

18

VDIFF_119FB_120COMP_1

21

VW_122ISP_123ISN_1

PC181

PC181 *1000p/50V_6

*1000p/50V_6

PR231

PR231 *6.81K/F_4

*6.81K/F_4

D14

PC79

PC79 *1200p/50V_4

*1200p/50V_4

PC80

PC80 *180p/50V_4

*180p/50V_4

PR122

PR122 *54.9K/F_4

*54.9K/F_4

24

ISN_0

ISP_0

VSEN_0

14

13

15

PR236

PR236 *0_4

*0_4

BOOT_0

UGATE_0

PHASE_0

PGND_0

LGATE_0

PVCC

LGATE_1

PGND_1

PHASE_1

UGATE_1

BOOT_1

PC77

0.1u/50V_6

PL13

2.2uH/8A

A01

36

35

34

33

32

31

30

29

28

27

26

25

B2-TEST

UGATE_0

PHASE_0

LGATE_0

LGATE_1

PHASE_1

UGATE_1

PR119

PR119 1/F_6

1/F_6

PR116

3.92K/F_4

18.2K/F_4

PC78

0.1u/50V_6

PR117

PR117 1/F_6

1/F_6

PR118

PR118 1/F_6

1/F_6

PR121

LGATE_NB

0.1u/50V_6

PC73

2.2u/10V_8

PC76

0.1u/50V_6

PC75

ISN_1

ISP_1

+5VPCU

4

S2

5

UGATE_0

UGATE_1

LGATE_1

D1 S1/D2

G2

123

D1

G1

876

4

PQ57

PQ57 AO4932

AO4932

UGATE_NB

D

B2-TEST

+

100u/25V_6.3*5.8

PC173

PC175

PC175 *10u/25V_1206

*10u/25V_1206

PC69

0.1u/50V_6

B2-TEST

PC176

4.7u/25V_8

PQ56

PQ56 AOL1448

AOL1448

PQ54

PQ54 AOL1718

AOL1718

PQ58

PQ58 AOL1448

AOL1448

PQ55

PQ55 AOL1718

AOL1718

4.7u/25V_8

4

PC171

4.7u/25V_8

4

PC172

*10u/25V_1206

5

PQ70

213

AOL1718

B2-TEST

PC174

*10u/25V_1206

5

PQ71

213

AOL1718

A06

0.1u/50V_6

A45

0.1u/50V_6

PC178

PR94

PR94 1_6

1_6

PC65

PC65 1000p/50V_4

1000p/50V_4

PC177

PR95

PR95 1_6

1_6

PC64

PC64 1000p/50V_4

1000p/50V_4

A45

ISP_1

ISN_1

ISP_0 ISN_0

*Short_6

*2200p/50V_4

*Short_6

*2200p/50V_4

PR120

5

213

5

213

5

213

5

213

EC13

0.36uH/25A

1 2

PR131

EC25

PL12

0.36uH/25A

1 2

3

100u/25V_6.3*5.8

PL11

3

4

100u/25V_6.3*5.8

4

PR115

*Short_6

+

PC179

PR130

PR130 *Short_6

*Short_6

+

PC180

VIN

A30

+

PC56

330u/2V_7343

B2-TEST

+

PC55

*330u/2V_7343

E

VIN

20A

+

PC58

330u/2V_7343

VIN

+

PC204

330u/2V_7343

+

PC59

*330u/2V_7343

B2-TEST

20A

+

PC205

330u/2V_7343

+VCORE

A06

+VCORE

A06

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

CPU_CORE

Wednesday, May 27, 2009

Date: Sheet

A

B

C

D

Date: Sheet

E

of

37 49

of

37 49

of

37 49

1A

5

4

3

2

1

http://hobi-elektronika.net

D D

B2-TEST

VIN

OCP: 10A

6A

+1.1V_S5

+5VPCU

PC156

PC151

*10u/10V_8

PC156

4.7u/25V_8

PC150

0.1u/50V_6

PR215

PR215 10/F_6

10/F_6

PR218

BOOT

UGATE

PHASE

VDDP

LGATE

PGND

TPAD

PR218

2.2/F_6

13 12 11 10

OC

9 8 7 17

PR67

PR67 1M_6

1M_6

PU6

PU6 UP6111AQDD

S5_ON[34,36,43,44]

HWPG_1.1V[34]

C C

PR73 *Short_4PR73 *Short_4

+3V

PR68

PR68 *10K/F_6

*10K/F_6

PC149

*0.1u/50V_6

PC41

1u/16V_6

S5_ON_+1.1V_S5

PC148

*1000p/50V_6

15 16

1 2 3 4 6 5

14

UP6111AQDD

EN/DEM TON VOUT VDD FB PGOOD GND NC NC

PR77

*Short_6

PC44

PC44 1u/16V_6

1u/16V_6

PD2

PD2 RB500V-40

RB500V-40

PC45

0.1u/50V_6

0.1u/50V_6 UGATE-1.1V PHASE-1.1V PR78

PR78

7.15K/F_6

LGATE-1.1V

PC42

PC42 1u/16V_6

1u/16V_6

B2-TEST

PR66

5.1K/F_6

1.1V_FB

TON=3.85p*RTON*Vout/(Vin-0.5)

Frequency=Vout/(Vin*TON)

TON=3.85p*1M*1/(Vin-0.5)

Frequency=1/(0.0036767)=272K

B B

AO4710 Rdson=11.7~14.2mOhm L(ripple current) =(19-1.1)*1.1/(1u*272k*19) ~3.81A

14.2m*10=RILIM*20uA RILIM=7.1K--- 7.15K

R1

PR216

PR216 10K/F_6

10K/F_6

R2

578

PQ51

PQ51 AO4468

AO4468

3 6

241

578

PQ50

PQ50 AO4710

AO4710

3 6

241

Rds*OCP=RILIM*20uA

PC147

PC147 *33p/50V_6

*33p/50V_6

VOUT=(1+R1/R2)*0.75

PR75

PR75 0_6

0_6

1R0uH-3mR/15A

PR80

PR80 1_6

1_6

PC47

PC47 1000p/50V_4

1000p/50V_4

A45

EC9

0.1u/50V_6

PL9

560u/2.5V_6X5.7

PC157

PC48

2200p/50V_4

+

PC39

PC39 *2200p/50V_4

*2200p/50V_4

+1.1V_S5

578

3 6

PQ19

PQ19 AO4468

AO4468

241

+1.1V

5.5A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

VCCP 1.1V(UP6111A)

Wednesday, May 27, 2009

Date: Sheet

2

Date: Sheet

1

of

38 49

of

38 49

of

38 49

1A

VIN_SRC

HWPG_0.9V[43]

1.2V_ON[34]

HWPG_1.8V[34,42]

A A

5

4

PR99 *0_4PR99 *0_4

PR86 *0_4PR86 *0_4

PR87 0_4PR87 0_4

"HWPG_0.9V"=CPU_COREPG

B2-TEST

2

PR60

PR60 100K_6

100K_6

3

1

PQ8

PQ8 DMN601K-7

DMN601K-7

PR57

PR57 1M_6

1M_6

PR52

PR52 1M_6

1M_6

+1.1V +15V

PR65

PR65 22_8

22_8

3

2

PQ13

PQ13 DMN601K-7

DMN601K-7

1

3

PR62

PR62 1M_6

1M_6

3

2

PQ7

PQ7 DMN601K-7

DMN601K-7

1

5

4

3

2

1

http://hobi-elektronika.net

D D

+5V_S5

PC158

PC159

*10u/10V_8

PC158

4.7u/25V_8

PC52

0.1u/50V_6

PR91

PR91 10/F_6

10/F_6

PR221

PR221 1M_6

1M_6

CPU_COREPG[15,37]

C C

HWPG_0.95V[34]

PR220 *Short_4PR220 *Short_4

+3V

PC160

*0.1u/50V_6

PR227

PR227 *10K/F_6

*10K/F_6

PC163

1u/16V_6

PC161

*1000p/50V_6

UP6111AQDD_PIN16 UGATE-NB

UP6111AQDD_PIN2

PR266

PR266 100K_4

100K_4

B2-TEST

15 16

1 2 3 4 6 5

14

PU14

PU14 UP6111AQDD

UP6111AQDD

EN/DEM TON VOUT VDD FB PGOOD GND NC NC

BOOT UGATE PHASE

VDDP

LGATE

PGND

TPAD

PR93

2.2/F_6

13 12 11 10

OC

9 8 7 17

PR222

PR222 *Short_6

*Short_6

PC166

PC166 1u/16V_6

1u/16V_6

PD3

PD3 RB500V-40

RB500V-40

PC162

0.1u/50V_6

PHASE-NB

PR224

7.15K/F_6

LGATE-NB

PC53

PC53 1u/16V_6

1u/16V_6

578

3 6

578

3 6

EC10

PC50

0.1u/50V_6

2200p/50V_4

+

PC164

560u/2.5V_6X5.7

2200p/50V_4

PQ53

PQ53 AO4468

AO4468

241

PQ52

PQ52 AO4710

AO4710

241

PL10

1R0uH-3mR/15A

PR89

PR89 1_6

1_6

PC51

PC51 1000p/50V_4

1000p/50V_4

A45

B2-TEST

OCP: 10A

VIN

7.5A

NB_CORE

VOUT=(1+R1/R2)*0.75 Rds*OCP=RILIM*20uA

PC165

PR225

PR226

*Short_6

B B

TON=3.85p*RTON*Vout/(Vin-0.5)

Frequency=Vout/(Vin*TON)

TON=3.85p*1M*1/(Vin-0.5)

Frequency=1/(0.0036767)=272K

AO4710 Rdson=11.7~14.2mOhm L(ripple current) =(19-1.05)*1.05/(1u*272k*19) ~3.646A

14.2m*10=RILIM*20uA RILIM=7.1K--- 7.15K

NB_CORE_FB NB_CORE_FB

R1

R2

2.74K/F_4

PR223

PR223 10K/F_6

10K/F_6

*33p/50V_6

PR92

13.3K/F_4

PQ21

DMN601K-7

3

1

2

0.01u/25V_4

PC49

PQ20

DMN601K-7

+5VPCU

3

1

PR85

PR85 10K/F_4

10K/F_4

PR90

PR90 100_4

100_4

PR84

PR84 *0_4

*0_4

2

PR88

PR88 *100K_4

*100K_4

HI --- 0.95V LOW ---1.1V

+NB_CORE_ON [9]

A A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

NB_CORE(UP6111A)

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

of

39 49

of

39 49

of

39 49

1A

5

[PWM]

PC132

PC132 10u/10V_8

FOR DDR III

PC38

*33p/50V_6

PR51 SW@0_6PR51 SW@0_6

PR56 *SW@0_6PR56 *SW@0_6

1

2

3

4

5

6

10u/10V_8

25

VTTGND

VTTSNS

GND

MODE

VTTREF

COMP

8207A_SET

GND

PR205

PR205 10K/F_4

10K/F_4

PR58

PR58 10K/F_4

10K/F_4

SW@100K_4

D D

+0.75V_DDR_VTT

1.71A

PC131

PC131 10u/10V_8

10u/10V_8

PC135

PC135 10u/10V_8

10u/10V_8

C15

+1.5VSUS

+SMDDR_VREF

0.75A

C C

VDDIO_FB_H[2]

VDDIO_FB_L[2]

B B

PR202

*Short_6

PC138

0.033u/50V_6

+5V_S5

PR206

PR206 *0_4

*0_4

PR61

PR61 *0_4

*0_4

PG_1.5V_EN[42,43]

DGPU_VRON[11,12,41]

4

8207A_VBST

PU11

20

21

22

LL

VBST

DRVH

S5_1.8V

S3_1.8V

PR59

PR59 *0_6

*0_6

24

23

VTT

VLDOIN

RT8207A

NC7VDDQSNS8VDDQSET9S310S511NC

Vout = (PR150/PR149) X 0.75 + 0.75

PR53

B2-TEST

2

3

SW@DMN601K-7

1

CS_GND

PQ10

PR201

19

DRVL

PGND

V5FILT

PGOOD

12

0_6

CS

V5IN

+5V_S5

PR54

PR54 0_6

0_6

VIN_SRC

DGPU_1.5V_ON_R

18

17

16

4.02K/F_6

15

14

13

PR49

PR49 620K/F_4

620K/F_4 PR207

PR207 0_6

0_6 PR208

PR208 *0_6

*0_6

PR50

PR50 SW@1M/F_6

SW@1M/F_6

PR55

PR55 SW@1M/F_6

SW@1M/F_6

3

http://hobi-elektronika.net

PC133

0.1u/50V_6

8207A_DH

PR48

PC37

PC37 1u/6.3V_4

1u/6.3V_4

PR204

PR204 100K/F_6

100K/F_6

(For RT8207A 400KHZ )

VIN

SUSON [34]

MAINON [34,42,43]

S3_1.8VS5_1.8V

+1.5V_GPU

PR64

PR64 SW@22_8

SW@22_8

3

2

PQ11

SW@DMN601K-7

1

PR203

5.1/F_6

+3VPCU

HWPG_1.5V [34]

+15V

3

2

SW@DMN601K-7

1

8207A_LX 8207A_DL

PR63

PR63 SW@1M/F_6

SW@1M/F_6

PQ12

+5V_S5

PC137

PC137 1u/6.3V_4

1u/6.3V_4

PC40

*SW@2200p/50V_4

+1.5VSUS

578

3 6

241

5

4

PQ49

213

AOL1448

5

4

AO1718 Rdson=3.8~4.3mOhm L(ripple current) =(9-1.5)*1.5/(0.56u*400k*9) ~5.58A

Vtrip= (22-2.79)(*4.3mohm/2)=0.0413V RILIM=Vtrip/10uA~4.13K

PQ9

PQ9 SW@AO4468

SW@AO4468

+1.5V_GPU

4

PQ47

213

AOL1718

5.63A

2

1

A28

B2-TEST

OCP 22A

VIN

18A

+1.5VSUS

PL8

0.56uH/25A

EC5

0.1u/50V_6

PC130

2200p/50V_6

+

PC134

PC134 *100u/25V_6.3*5.8

*100u/25V_6.3*5.8

PC136

4.7u/25V_8

A28

5

213

PQ48

PQ48 AOL1718

AOL1718

PR47

PR47 1_6

1_6

PC36

PC36 1000p/50V_4

1000p/50V_4

A45

PC139

10u/10V_8

MAIND[36,43]

+

PC143

560u/2.5V_6X5.7

PC144

*560u/2.5V_6X5.7

MAIND

PQ29

AO4468

OK

+

+1.5VSUS

578

3 6

241

+1.5V

3.62A

A A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

DDR 1.5V(TPS51116)

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

of

40 49

of

40 49

of

40 49

1A

1

2

3

4

5

http://hobi-elektronika.net

A A

PC20

SW@2200p/50V_4

PL6

SW@0.36uH/25A

SW@0.1u/50V_6

D13

2

PQ4

*SW@DTC144EU

B2-TEST

PC30

1 3

PC119

*SW@10u/25V_1206

PC25

*SW@330u/2V_7343

VIN_SRC

PR3

PR3 *SW@1M_6

*SW@1M_6

PR12

PR12 *SW@1M_6

*SW@1M_6

PC120

SW@10u/25V_1206

+

PC121

SW@10u/25V_1206

+

PC128

SW@330u/2V_7343

+VGPU_CORE

PR5

PR5 *SW@22_8

*SW@22_8

3

2

PQ3

PQ3 *DMN601K-7

*DMN601K-7

1

+

PC28

SW@330u/2V_7343

OCP=33A

22.5A

+VGPU_CORE

VIN

+5V_S5

C08

+3V

A21

B2-TEST

PR14

*SW@10K_4

PG_GPUIO_EN[42]

DGPU_VRON[11,12,40]

+3V_D_EXT

A20

B B

SW@10K_4

PR7

PR7 *SW@0_4

*SW@0_4

PR185

PR185 SW@0_4

SW@0_4

PR13

+3V_D_EXT

PR187

PR187 SW@100K_4

SW@100K_4

A20

PC108 SW@1u/10V_6PC108 SW@1u/10V_6

PC7 SW@1u/10V_6PC7 SW@1u/10V_6

PC6

SW@0.1u/10V_4

Ra

PR173

3

SPE@470K/F_4

PC106

SW@0.01u/16V_4

PC107

SW@0.01u/16V_4

2

PQ1

PQ1 SW@DMN601K-7

SW@DMN601K-7

1

Rb

PR172

3

SPE@220K/F_4

2

PQ2

PQ2 SW@DMN601K-7

SW@DMN601K-7

1

GPU_VID1[17]

PR175

SW@100K_4

GPU_VID2[17]

PR176

SW@100K_4

C C

Madison -Pro

GPU_VID1 (GPIO15)

0 1 0 11

Ra

D D

GPU_VID2 (GPIO20)

0 0 1

Rb Rc Rd

49.9K

+VGPU_CORE

1.05V

1.0V

0.95V

0.9V

VREF

2V44.2K220K470K

PR190

PR190 *SW@0_4

*SW@0_4

8792_EN

Rc

Rd

PR188

REF-2V

A03

8792VCC

8792SKIP#

8792REFIN

8792REF

PR193

PR193 SPE@44.2K/F_4

SPE@44.2K/F_4

PC9

SW@1000p/50V_4

PR195

PR195 SPE@49.9K/F_4

SPE@49.9K/F_4

GPU_VID1 (GPIO15)

PU3

SW@MAX8792ETD+T

2

VDD

13

VCC

14

PGOOD

1

EN

12

SKIP#

10

REFIN

11

REF

PR18

PR18 SW@75K/F_4

SW@75K/F_4

EP

15

8792TON

7

TON

8792DH

5

DH

8792BST

6

BST

8792LX

4

LX

8792DL

3

DL

8

FB

8792ILIM

9

ILIM

PR22

PR22 SW@0_6

SW@0_6

Place near GND pin15

PR19

PR19 SW@100K_4

SW@100K_4

Frequency(PR220=200K) 300K

Park -XT

0 1 0

Ra

Rc --> 39.2K/F_4 (CS33922FB15)

Ra --> 332K/F_4 (CS43322FB15)

Rb --> 130K/F_4 (CS41302FB00)

GPU_VID2 (GPIO20)0+VGPU_CORE

0 1 11

Rb RdRc

PR21

SW@200K/F_4

PC110

PR196

SW@0.22u/25V_6

SW@1_6

PC15

*SW@4700p/25V_4

1.12V

1.05V

0.95V

0.9V

VREF

49.9K39.2K332K 130K

2V

4

5

213

5

213

PQ40

SW@AOL1718

PQ44

SW@AOL1448

4

5

213

PQ41

SW@AOL1718

*SW@100K_4

EC1

SW@0.1u/50V_6

8792_EN

PR16

PR31

PR31 SW@1_6

SW@1_6

PC19

PC19 SW@1000p/50V_4

SW@1000p/50V_4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

GPU CORE(MAX8792)

Wednesday, May 27, 2009

Date: Sheet

1

2

3

4

Date: Sheet

5

of

41 49

of

41 49

of

41 49

1A

5

4

3

2

1

http://hobi-elektronika.net

D D

A28

+3VPCU

PC197

PC201

*100p/50V_4

PC197

0.1u/25V_4

PR264

PR264 15K/F_6

15K/F_6

PC202

PC202 1200p/50V_4

1200p/50V_4

54418-1.8_VFB

COMP_PIN7

PR263

PR263 182K/F_4

182K/F_4

PU15 HPA00835RTERPU15 HPA00835RTER

16

VIN

1

VIN

2

VIN

15

EN

6

VSNS

7

COMP

8

RT/CLK

9

SS

PC200

0.01u/25V_4

PH10_11_12

10

PH

11

PH

12

PH

PR262 *Short_6PR262 *Short_6

13

BOOT

14

PWRGD

3

GND

4

GND

5

AGND

PAD17PAD18PAD19PAD20PAD21PAD

22

PC199

0.1u/50V_6

PR260

100K/F_4

A01

PL15

1uH_7X7X3/11A

HWPG_1.8V [34,38]

+3V

54418-1.8_VFB

PR168

R1

100K/F_4

PC194

0.1u/25V_4

V0=0.8*(R1+R2)/R2

PR169

R2

78.7K/F_4

PC195

PC195 10u/10V_8

10u/10V_8

MAINON[34,40,43]

C C

PR261 *Short_4PR261 *Short_4

PC196

1000p/50V_4

PC191

10u/10V_8

1.95A

+1.8V

PC192

10u/10V_8

A28

PC74

B2-TEST

+3VPCU

PC74

*0.1u/50V_6

C12

PR113 0_4PR113 0_4

PR114 *0_4PR114 *0_4

PC68

1u/16V_6

PC70

PC71

0.1u/50V_6

10u/10V_8

Vout =0.8(1+R1/R2) =2.5V

+5VPCU

PU8

PU8 RT9025-25PSP

RT9025-25PSP

4

VPP

2

VEN

3

VIN

8

GND

9

GND

PGOOD

7

2

VO

NC

ADJ

+3V

PR213

PR213 SW@9.1K/F_6

SW@9.1K/F_6

PR214

PR214 SW@34K/F_6

SW@34K/F_6

B2-TEST

PR217

PR217 SW@10K_4

SW@10K_4

PC145

PC145 SW@22u/10V_1206

SW@22u/10V_1206

PG_1.5V_EN [40,43]

1.5A

+1V

VGA

A44

MAINON[34,40,43]

VR2.5_ON[34]

3

B2-TEST

DEL PR189

PG_GPUIO_EN[41]

B B

A A

5

PC154

SW@0.1u/50V_6

PR219

SW@100K_4

+1.5VSUS

PC155

SW@10u/10V_8

+5VPCU

PC152

SW@0.1u/50V_6

PC153

SW@0.1u/50V_6

Vout =0.8(1+R1/R2) =1V

4 2 3

8 9

4

PU13

PU13 SW@RT9018A

SW@RT9018A

PGOOD

VPP VEN VIN

GND GND

1 6

VO

5

NC

ADJ

7

0.8V

1V_ADJ

1 6

5

0.8V

R1

R2

B2-TEST

PR108

73.2K/F_4

PR109

PR109 34K/F_6

34K/F_6

PR112

PR112 10K_4

10K_4

HWPG_2.5V=VRON

+3V

HWPG_2.5V [37,43]

PC67

10u/10V_8

+2.5V

0.2A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Discharge (2.5V/1.8V)

Wednesday, May 27, 2009

Date: Sheet

1

of

42 49

of

42 49

of

42 49

1A

5

4

3

2

1

http://hobi-elektronika.net

1 6

5

2

3

1

0.8V

+15V

PR104

PR104 22_8

22_8

+3V

PR98

PR98 100K_4

100K_4

PR96

4.02K/F_6

PR97

30.1K/F_6

Vout =0.8(1+R1/R2) =0.9V

PR79

PR79 SW@1M/F_6

SW@1M/F_6

3

PQ18

SW@DMN601K-7

1

+1.5V

3

2

PQ26

PQ26 DMN601K-7

DMN601K-7

1

CPU_VDDR (0.9V)

HWPG_0.9V [38]

PC61

PC61 10u/10V_8

10u/10V_8

+1.8VVIN_SRC

3

2

PQ15

PQ15 SW@AO3404

SW@AO3404

1

PC46

PC46 *SW@2200p/50V_4

*SW@2200p/50V_4

+15V+5V+3V +1.8V

PR102

PR102 22_8

22_8

PQ27

PR101

PR101 1M_6

1M_6

3

2

1

CPU_VDDR

0.75A

MAINDMAINON_ON_G

PQ28

PQ28 DMN601K-7

DMN601K-7

+1.8V_GPU

0.96A

VGA

PC66

PC66 *2200p/50V_4

*2200p/50V_4

MAIND [36,40]

S5_ON

THERMISTOR_10K_6(NTC)

3

2

PQ14

PQ14 DMN601K-7

DMN601K-7

1

PR72

C09

VIN_SRC

PD4

PD4 SW1010CPT

SW1010CPT

PR228

1

1M_6

S5_ON

S5_ON[34,36,38,44]

PR69

PR69 680/F_4

680/F_4

LM393_PIN2

2

PQ59

1 3

DTC144EUA

VLVL

3 2

5 6

LM393_PIN8

84

+

-

+

-

PU5A

PU5A LM393

LM393

PR70

PR70 200K/F_4

200K/F_4

2.469V

PR71

PR71 200K/F_4

200K/F_4

PU5B

PU5B LM393

LM393

1

7

2

PC169

0.1u/50V_6

PQ61

PQ61 AO3409

AO3409

3

PR229

PR229 *Short_6

*Short_6

PR230

PR230 200K_6

200K_6

PC170

0.1u/50V_6

For EC control thermal protection (output 3.3V)

Thermal protection

SYS_SHDN# [2,4,36,44]

3

2

PQ60

PQ60 DMN601K-7

DMN601K-7

1

VRON=HWPG_2.5V

PC63

*0.1u/50V_6

D D

C C

VRON[34,37]

HWPG_2.5V[37,42]

PR83 *0_4PR83 *0_4

PR100 0_4PR100 0_4

+1.5VSUS

PC62

10u/10V_8

VDDR_OPT[11]

B2-TEST

PR180

PR180 SW@0_4

PR74

PR74 *SW@0_4

*SW@0_4

PC43

*SW@1U/10V_4

2

PR111

PR111 *100K_6

*100K_6

SW@0_4

PQ22

PQ22 DTC144EUA

DTC144EUA

1 3

B2-TEST

VIN_SRC

PR106

PR106 1M_6

1M_6

PR110

PR110 1M_6

1M_6

2

PG_1.5V_EN[40,42]

+1.5V_GPU

B B

MAINON[34,40,42]

PC57

0.1u/50V_6

PC60

0.1u/50V_6

3

1

PQ16

PQ16 SW@DMN601K-7

SW@DMN601K-7

2

3

1

+5VPCU

PR82

PR82 SW@1M/F_6

SW@1M/F_6

PR81

PR81 SW@1M/F_6

SW@1M/F_6

PR105

PR105 22_8

22_8

PQ24

PQ24 DMN601K-7

DMN601K-7

2

PU7

PU7 RT9025-25PSP

RT9025-25PSP

4

VPP

2

VEN

3

VIN

8

GND

9

GND

2

PC72

PC72 220P/50V_4

220P/50V_4

+1.8V_GPU

2

3

1

PGOOD

ADJ

7

PR107

22.1K/F_4

3

1

PR76

PR76 SW@22_8

SW@22_8

3

PQ17

SW@DMN601K-7

1

PR103

PR103 22_8

22_8

PQ25

PQ25 DMN601K-7

DMN601K-7

VO

NC

PQ23

PQ23 DMN601K-7

DMN601K-7

2

B2-TEST

A A

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Discharge /Thermal protection

Wednesday, May 27, 2009

Date: Sheet

5

4

3

2

Date: Sheet

1

43

1A

of

49

1

*H-C276D110P2-8

8 9

HOLE26

123

67 5 4

2

HOLE21

*H-CT236B315D110P2

67 5

8

4

9

123

HOLE7

*O-ZR8-10

8 9

123

3

67 5 4

HOLE17

*H-C276D110P2-8

8 9

123

4

HOLE1

http://hobi-elektronika.net

*H-C276D110P2-8

123

67 5 4

67

8

5

9

4

HOLE27

*HG-C315D110P2

8 9

123

67 5 4

5

6

7

8

44

EC11

*0.1u/25V_4

EC20

EC20 *0.1u/25V_4

*0.1u/25V_4

EC23

*0.1u/25V_4

+VGPU_CORE

*0.1u/25V_4

EC12

*0.1u/25V_4

EC14

*0.1u/25V_4

EC3

+1.8V

+1.5VSUS

EC32

*0.1u/25V_4

EC31

*0.1u/25V_4

EC7

*0.1u/25V_4

+5VPCU+5VA

EC18

*0.1u/25V_4

EC21

*0.1u/10V_4

EC22

*0.1u/10V_4

EC43

*0.1u/10V_4

+3V+3V_S5 +3V_S5

*0.1u/10V_4

+3V+3V

*0.1u/10V_4

EC6

EC42

NB_CORE

HOLE16

1

HOLE16 *H-C236D142PB

*H-C236D142PB

1

HOLE18

HOLE18 *H-C236D161PB

*H-C236D161PB

1

HOLE5

HOLE5 *H-TC197BC122D122P2

*H-TC197BC122D122P2

HOLE3

*H-C276D110P2-8

8 9

123

HOLE14

*hg-c355d110p2

8 9

123

67 5 4

HOLE2

*HG-C315D110P2

8 9

123

HOLE28

*hg-c394d110p2

8 9

123

VINVIN

EC51

0.1u/25V_4

For EMI

EC26

*0.1u/25V_4

VIN_SRC

+1.1V

HOLE22

*H-C91D91N 67 5 4

67 5 4

*H-C91D91N

HOLE30

*hg-c236d110p2

8 9

123

1

67 5 4

B2-TEST

EC52

0.1u/25V_4

HOLE15

HOLE11

A A

HOLE11 *H-C236D142PB

*H-C236D142PB

HOLE12

HOLE12 *H-C236D142PB

*H-C236D142PB

HOLE15 *H-C236D142PB

*H-C236D142PB

CPU

HOLE25

* H-C276D110P2-8

67 5

8

4

9

123

1

HOLE19

HOLE19 *H-C236D161PB

*H-C236D161PB

1

HOLE9

HOLE9 *H-C236D157P2

*H-C236D157P2

1

HOLE13

HOLE13 *H-C236D161PB

*H-C236D161PB

HOLE4

HOLE10

HOLE10 *H-TC197BC122D122P2

*H-TC197BC122D122P2

HOLE4 *H-C197D122PB

*H-C197D122PB

VGA

B B

1

EC8

*0.1u/25V_4

B2-TEST

HOLE20

1

HOLE32

*H-C276D110P2-8

8 9

123

HOLE20 *H-C91D91N

*H-C91D91N

1

67 5 4

HOLE6

HOLE6 * H-C236D142P2

* H-C236D142P2

1

EC50

0.1u/10V_4

EC49

0.1u/10V_4

EC48

0.1u/10V_4

EC47

0.1u/10V_4

EC46

0.1u/10V_4

EC45

0.1u/10V_4

+5V+5V+5V+5V+5V+5V+5V

0.1u/10V_4

EC44

*0.1u/25V_4

EC16

*0.1u/25V_4

EC40

*0.1u/25V_4

EC15

*0.1u/25V_4

EC30

+5V +3VPCU

EC35

EC38

*0.1u/25V_4

EC24

*0.1u/25V_4

EC36

EC28

*0.1u/25V_4

EC34

EC35

*0.1u/25V_4

EC27

*0.1u/25V_4

EC39

*0.1u/25V_4

EC37

EC29

*0.1u/25V_4

+3V

EC33

*0.1u/25V_4

HOLE23

HOLE23 *H-C236D161PB

*H-C236D161PB

1

HOLE29

HOLE29 *H-C157D79PT

*H-C157D79PT

1

HOLE31

HOLE31 *H-TC236BC161D161P2

C C

*H-TC236BC161D161P2

1

HOLE8

HOLE8 *H-C236D157P2

*H-C236D157P2

HOLE24

HOLE24 *H-C157D102PT

*H-C157D102PT

POWER TEST

2

PD10

PD9

PD9 *SW1010CPT

*SW1010CPT

PR212

PR212 *1.2K/F_4

*1.2K/F_4

+5VPCU

1

VCC

2

GND TMSNS3-OT

4

TMGND

PU12

PU12 *RT9025-25PSP

*RT9025-25PSP

3

CLK

-CLK

PC140

PC140 *0.1u/25V_4

*0.1u/25V_4

8 7 6

S5_ON_EN

5

EN

+5VPCU

PC146

PC146 *0.1u/25V_4

D D

1

2

*0.1u/25V_4

PR210

*THERMISTOR_10K_6(NTC)

3

*1PS302

PC141

PC141 *0.1u/25V_4

*0.1u/25V_4

PR209 *0_4PR209 *0_4

4

PR211

+15V

*22_8

1

PC142

PC142 *0.1u/25V_4

*0.1u/25V_4

SYS_SHDN# [2,4,36,43]

S5_ON [34,36,38,43]

5

6

7

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Hole, Nuts

Wednesday, May 27, 2009

Date: Sheet

of

44 49

of

44 49

of

44 49

8

1A

5

ZR8 Power tree

D D

ADAPTER

BATTERY

C C

Smart Charger

ISL88731A

PU1 AO3404

RT8206B

PU0001

VIN_SRC

--<EC>-<VIN_ON>

AO1413

--<EC>--

<SUSON>

PU9

RT8207A

VIN

4

<S5_ON--->S5D>

<S5D>

<MAINON--->MAIND>

<MAIND>

<S5_ON--->S5D>

<S5D>

<MAINON--->MAIND>

<MAIND>

--<EC>--

DNI<VR2.5_ON>

--<EC>--

<PG_1V_EN--->PG_1.5V_EN>

<PG_1.5V_EN>

+1.5VSUS

<PG_GPUIO_EN-->PG_1V_EN>

<VR2.5_ON-->HWPG_2.5V>

<PG_1V_EN>

<HWPG_2.5V>

--<EC>--

DNI<VRON>

--<EC>--

3

http://hobi-elektronika.net

+5VPCU

(6.15A)

+5V_S5

+5V

(4.72A)

(18.71A)

(3A)

(3.15A)

+3V_S5

DNI<+1.5V_GPU>

+2.5V

DNI<dGPU_VRON>

+1.5V

(1.287A)

--<EC>--

<dGPU_VRON>

(0.1875A)

<+1.5V_GPU>

+1.5V_GPU

(1.5A)

+1V

(0.75A)

(7.87A)

+3V

+1.5VSUS

(3.22A)

AO3413

AO3404

(2.42A)

USB/B

BT

LAN

+3V_D

+1.8V

+1.8V_GPU

(3.15A)

(1.95A)

(0.96A)

AO4468

+3VPCU

AO4468

RT9025

PU7005

HPA00835RTER

PU7004

AO3404

G9018A

PU7002

RT9025 CPU_VDDR

PU7003

AO4468

2

1

B B

+0.75V_DDR_VTT

+SMDDR_VREF (0.75V)

--<EC>--

<S5_ON>

UP6111A

PU7000

<MAINON--->HWPG_1.8V>

<HWPG_2.5V--->HWPG_0.9V>

<VRON-->CPU_COREPG>

<CPU_COREPG>

--<EC>--

<dGPU_VRON>

A A

5

<dGPU_VRON-->PG_GPUIO_EN>

<PG_GPUIO_EN>

<VR2.5_ON-->HWPG_2.5V>

<HWPG_2.5V>

--<EC>--

<VRON>

UP6111A

PU6000

MAX8792

PU7001

ISL62872

PU5000

ISL6265 PU1001

CPU_VDDNB_CORE

4

(1.71A)

(0.75A)

+1.1V_S5

DNI<HWPG_1.8V>

--<EC>--

DNI<1.2V_ON>

<HWPG_0.9V>

NB_CORE

+VGPU_CORE

+VGPU_IO

+VCC_CORE

(5.92A)

(7.5A)

(22.5A)

(4.5A)

(27A)

(3.54A)

AO4468

+1.1V

(5.54A)

3

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Power Tree

Date: Sheet

Wednesday, May 27, 2009

2

Date: Sheet

1

of

45

of

45

of

45

49

1A

5

4

3

2

1

DDR3 (DDR)

http://hobi-elektronika.net

17

D D

+1.5VSUS

R583

R583 *10K_4

*10K_4

A08

C C

B B

M_A_A[15:0][3,5]

M_A_BANK[0..2][3,5]

R200 10K_4R200 10K_4 R125 10K_4R125 10K_4

D08

R586

R586 *10K_4

*10K_4

R1_CKE0 R1_CKE1

M_A_DQSP[7:0][3,5]

M_A_DQSN[7:0][3,5]

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BANK0 M_A_BANK1

M_A_CS#0[3] M_A_CS#1[3] M_A_CLKP1[3] M_A_CLKN1[3] M_A_CLKP2[3] M_A_CLKN2[3] M_A_CKE0[3,5] M_A_CKE1[3,5] M_A_CAS#[3,5] M_A_RAS#[3,5] M_A_WE#[3,5]

PCLK_SMB[5,6,12,26,27]

PDAT_SMB[5,6,12,26,27]

M_A_ODT0[3] M_A_ODT1[3]

M_A_DM[7:0][3,5]

M_A_BANK2

R260 *Short_4R260 *Short_4 R587 *Short_4R587 *Short_4

DIMM2_SA0 DIMM2_SA1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

R1_CKE0 R1_CKE1

CN16A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM1_H=8.0_RVS

PC2100 DDR3 SDRAM SO-DIMM

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQ[63:0] [3,5]

MEMHOT_MA#[5]

M_A_RST#[3,5]

+0.75VSMVREF_SUSA

+VREF_CA_A

+1.5VSUS

+3V

CN16B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=8.0_RVS

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205

206

+0.75V_DDR_VTT

Place these Caps near So-Dimm0.

+1.5VSUS

C419

C687

10u/6.3V_6

C410

C410 10u/6.3V_6

10u/6.3V_6

5

10u/6.3V_6

C395

C395 10u/6.3V_6

10u/6.3V_6

C456

10u/6.3V_6

A A

C386

C386 10u/6.3V_6

10u/6.3V_6

C389

C389 *.1u/16V_4

*.1u/16V_4

+0.75V_DDR_VTT

C9775

C9775 1U/6.3V_4

1U/6.3V_4

C403

C403 .1u/16V_4

.1u/16V_4

C393

C393 *.1u/16V_4

*.1u/16V_4

C258

C258 1U/6.3V_4

1U/6.3V_4

C412

C412 .1u/16V_4

.1u/16V_4

C453

C453 *.1u/16V_4

*.1u/16V_4

C9777

10u/6.3V_6

4

C381

.1u/16V_4

+VREF_CA_A

C353

2.2u/6.3V_6

+0.75VSMVREF_SUSA

C824

.1u/16V_4

C823

2.2u/6.3V_6

3

A52

2DIMM--->P/N:DGMK4000145

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet of

2

Date: Sheet

DDR3 DIMM-1(H=9.2)

Wednesday, May 27, 2009

1

of

46 49

1A

5

ZR8 Schematic EC Tracking Record A ( For A TEST ) Nov.17 , 2009 EC / Page / Item / Description

4

3

2

1

http://hobi-elektronika.net

A01 Change footprint , due to SMT open i ssue highlight.Page25/27/28/31/32/36/38/44

Page32A02 Page42A03

A04 Page14

D D

Page14A05

A06 Page44

Change T/P switch P/N, due to SMT open issue highlight. Modify Madison-Pro & Park-XT VID table. Modify board ID table and R517,R304 suppor t Side-port function. Add R528 support different Side-port VRAM type.

Support CPU 45W solution. Page02A07 Change clock gen to no stuff, due to use internal clock source. Page06/07/48 Change SO-DIMM SMBUS address.A08

A09 Add Side-port function.Page08/10/11 A10 Page10 Chane HDMI DDC CLK/DATA port. A11 Stuff R190.Page10

Page12 Change dGPU_PWROK fr om GPIO1 to GPIO32.A12 Page12A13 Change board ID GPIO pin.

A14 1. Stuff D19,R307,C538 and no stuff D18. 2. Change pull high power rail from +3V_D to +3V.Page13

Change R500 from 0ohm to 10k.A15 Page16

Connect 25Mhz for GPU workaround design.A16 Page12

Modify GPU Power-on sequence table.A17 Page18 Page18A18 Remove GPU_IO VID contron pin and change GPU_CORE GPIO pin to GPIO15/20.

A19 Change R107 from 680ohm to 51 ohm and modify design of MEM_RST#. Also change R30 to no stuff.Page19

C C

A20 Page20/22/35/42 Reserve +3V_D_ZR8 power rail for GPU l eakage issue. A21 Reserve VGA_REQ# pin.Page18 A22 Page25 Delete brightness swi tch IC control and change to 0ohm soluti on.

Stuff R135,R144 ,due to some CRT monitor can't display.Page25A23

A24 Page25 Stuff C776,C787 for EMI request.

Page25/32A25 Change connect footprint and P/N.

Add ODD power switch design and stuff R170.A26 Page29/35

Page33A27 Change Q29,Q30 to no stuff.

Remove jmuper.A28 Page37/41/44

A29 Page37 Change PC193 P/N to low highlimit, due to ME thermal door impact.

Change PC179,PC180 from 22uF/25V to 100uF/25V.Page38A30 Page38 Change CPU_CORE enable from VRON to HWPG_2.5V.A31

A32 Change R538,R548 from 48ohm to 68ohm for audio performance.Page30

B B

Page28 Change R572,R563 t o short pad for debug use.A33

A34 Change +VGPU_IO power rail to +VGPU_CORE.Page20

Page25 Connect CN5 LCD connect shielding pin to GND for ESD issue.A35

Change R65 to no stuff.Page18A36

A37 Page22 Reserve OVERT# pull high resi stor prevent noise.

Add pull low 100k ohm for ODD_EJ,POWER_SAVE signal.Page33A38

Reserve cap for power team request.A39 Page36

Stuff 0 ohm resistor for ESD protect use.Page30A40 Page02/03/10/11/15/18/20/21/27/ 30/32/35/36 Change bead P/N for EMI request, the reason is cost down and not STD parts.A41

A42 Reserve 0 ohm for PLL power use.Page21

Page38 Remove PR153 & change to 0402 packageA43

A44 Change PR113 from 0 to 10K Ohm & Change enable source to +3V Page44

Page38/39/40/41 Stuff PR80,PR89,PR94,PR95,PR47 to 1 Ohm & PC47,PC51,PC64,PC65,PC36 of value to 1000p f or EMI requestA45

A46 Change PC111 of value to 1U/25VPage36 A47 Change PR37 of value, from 33K to 150KPage36

A A

A48 Change PR35 of value, from 10K to 39KPage36 A49 Change HDMI connector PNPage26

Page7

A50 Change P/N for 3-DIMM H=4.0 STD A51 Change P/N for 3-DIMM H=4.0 RVSPage6 A52 Change P/N for 3-DIMM H=8.0 RVSPage48 A53 Change battery connector P/N to DFHD08MR099Page36 A54 Modify HDMI's I2C for DIS.Page26

5

4

3

2

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

A Change List - 1

1

of

47 49

of

47 49

of

47 49

1A

5

4

3

2

1

ZR8 Schematic EC Tracking Record A ( For A TEST ) Nov.17 , 2009

http://hobi-elektronika.net

EC / Page / Item / Description

Page14A55 Change board ID power rail from +3V_S5 to +3V.

Modify WLAN RF_LED control design.A56 Page33/35

A57

D D

A58 Remove R331 only for A11 version.Page12 A59 Add U18,C533 & remove R303 for power sequence.Page12 A60 Remove C760,C754,R507& Y7, due to it's for external clock use.Page14 A61 Stuff R474,R486 for LAN & WLAN of REQ#.Page2 A62 Page3/12

Stuff R424 and no stuff R286, due to CPU_PRPCHOT# i s +1.5VSUS level.

A63 Change D29 package & Add D24.Page16

Note : Change 0ohm to short pad R276,R281,R415,R443,R445,R531,R532,R533,R534,R535,R539,R566,R174,R512,R513,R263,R437,R439,R441,R99

ZR8 Schematic EC Tracking Record B1 ( For B1 TEST ) Dec.09 , 2009 EC / Page / Item / Description

C C

Page21B01 Remove DP/TMDS Output Driver Analog Supply from port C&D. Due to it's don't to use.

B02 Page25 Stuff R48 for Di screte platform use.

Modify R signal pull low resistor value to 140ohm, due to keep 70 ohm trace impedance.Page/10/25B03

Modify WLAN LED design and change from GPIO82 to GPIO84.B04 Page33

B05 Change LAN layout footprint for "SAW" new package.Page27

Page13/25 Reserve CCD USB host from for Port2, due to CCD issue.B06

B07 Reserve blue LED power source to 5V, due to White/Blue LED max Vf is more than Green/Orange LED.Page33

ZR8 Schematic EC Tracking Record C ( For C TEST ) Jan.28 , 2010 EC / Page / Item / Description

B B

A A

Page02/34C01 Remove "CPU_THERMTRIP#" control from SB820, due to BIOS don't suppor t this function. Add another "SYS_SHDN#" for H/W shutdown function and add HWPG shutdown design. Page04 No stuf f Q21,D14,R255 for thermal sensor Alert fnction and change to EC or H/W shutdown function.C02

C03 Add 1uF for monitor test noise issue.Page09 C04 Page12 Add 0ohm to separate VGA_REQ function, due to it's don't support the function and cause by leakage current concern.

Modify VGA note text for R si gnal impedance control.Page24C05 Page24 Add bri ghtness switch control by iGPU switch mode. Due to BIOS for C test already support.C06

C07 Reserve EAPD# audio design for "Bo" sound.Page29

Page41 Change PG_GPUIO_EN pul l high power rail from +3V to +3V_D_EXT. For Park GPU SG mode hang up issue.C08

C09 Change PR69 FROM 1.2K to 680ohm , the reason is for SDA high temperature (40 degree/20% humidity) auto shutdown issue.Page43 C10 Page27 Short LPC signal for debug card use. C11 Change R538,R548 from 56ohm to 68ohm for audio performance test FSOV spec requirement.Page29

Page42 Change PR113 fr om 10k to 0ohm.C12 Page35C13 Change EC54,EC55 to stuff for ISN issue.

Modify DDR3 Memory Aperture size table.C14 Page21 Page03/40C15 Reserve VDDR_SENSE signal to controller IC.

Change RP32 to no stuff.C16 Page27 Page04C17 Modify CPU thermal control design from EC or BIOS control and change U16,R254 to no stuff ,Q17,Q18, Q19 to stuff.

No stuff R189.C18 Page03

Note : Change 0ohm to short pad R124,R121,R174,L31,L37,L35,R136,R115,R169,R325,R315,R295,R292,R278,R31,R90,R21,R112,R24,R25,R270,R530,R99,R478,R512,R513,R514,R326,R269,R268,R265,R266,R610,PR73,PR220,PR261 ,PR229

5

4

3

2

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet

A Change List - 2

1

of

48 49

of

48 49

of

48 49

1A

5

4

3

2

1

ZR8 Schematic EC Tracking Record A ( For Ramp ) Feb.25 , 2010

http://hobi-elektronika.net

EC / Page / Item / Description

Page03 Change CPU VDDR_SENSE pull high power rail to CPU_VDDR and remove t race connect to controller IC.

D01 D02

D D

D03 Page12 Change "GBE_COL" ,"GBE_CRS" ,"GBE_RXERR" to GND follow SCL V1.04 version.

Page14D04 Change USB PLL power rail source to separate VDDPL_33_USB_S follow SCL V1.04 version.

D06 Delete R149,R152 layout pad.Page09 D07 Page36 No stuff PD12 and add PR181, change PR257 fr om 1k to 390k. The purpose is for panasonic battery low power protect issue.

Page05/46D08 No stuff R584, R259,R583,R586 for CKE signal.

Page21D10 Modify VRAM table. D11 Change R123,R122,Q10,R202,R195,Q14 to no stuff, due to S1g4 don't support MEMHOT function.Page05/06 D12 Page02 Reserve prochot# for FAN control.

D14 Page37 Change some component to no stuff , dut to for S1g4 use the same VDD power don't need to compensation differ ence voltage.

Note : Change 0ohm to hort pad.

C C

R203,117,R585,R588,R260,R587,PR1,PR2,PR33,PR241,PR147,PR146,PR160,PR256,PR133,PR233,PR152,PR155,PR128,PR142,PR143,PR144,PR145,PR130,PR131,PR115,PR120,PR77,PR226,PR222,PR202,PR262.

Modify text note.Page15

No stuff R267,C450,C344.D05 Page04

Change LED current sense resistor val ue for LED light measure requirement. (Follow ZR7B)D09 Page32

No stuff PR16,PQ4,PR3,PR12,PR5,PQ3. Due to MAX8792 had integrate discharge design.Page41D13

B B

A A

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Size Document Number Rev

Date: Sheet

Wednesday, May 27, 2009

5

4

3

2

Date: Sheet

A Change List - 2

1

49 49

1A

of

Acer ASPIRE 5553 Schematics

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