Acer ASPIRE 5553 Schematics

1

2

3

4

5

6

7

8

SGN@---->Internal CLK GEN.

3&%67$&.83

/$<(5723 /$<(5*1' /$<(5,1

A A

/$<(5,1 /$<(59&& /$<(5,1 /$<(5*1'

GN@ ---->External CLK GEN. IV@ -----> iGPU SW@ -----> dGPU SP@ -----> iGPU & dGPU notice SPE@ ----->Only for dGPU notice SIDE@ ----> Side port

DDR3-SODIMM1

P5

DDR3-SODIMM2

P6

/$<(5%27

/$1

$WKHURV 3&,(/$1

B B

$5

(10/100/1000)

P26

5-

P26

Charger (ISL88731A)

P35

DC/DC ( 3VPCU / 5VPCU ) RT8206B

C C

CPU_VCORE ( VCORE ) ISL6265A

DC/DC ( +1.1V_S5 ) UP6111AQD

P36

P37

P38

6$7$+''

P28

6$7$2''

P28

DC/DC ( NB_CORE ) UP6111AQD

P39

DC/DC ( +1.5VSUS ) RT8207A

DC/DC ( GPU_CORE ) MAX8792ETD+T

D D

DC/DC (+1.8V/+1V/+2.5V ) HPA00835RTER / RT9018A / RT9025-25PSP

DC/DC ( CPU_VDDR ) RT9025-25PSP

1

P40

P41

P43

P42

.H\ERDUG 7RXFK3DG

2

3

http://hobi-elektronika.net

ZR8 SYSTEM DIAGRAM

DDR3 channel A

AMD Champlain

DDR3 channel B

PCI-E

638P (PGA)45W/35W

NORTH BRIDGE

0LQL3&,( &DUG

:LUHOHVV/$1

P27

6$7$0%

6$7$0%

:LQERQG.%&

P33 P31 P33 P34

)$1 63,

RS880 A12

PP;PPSLQ%*$

ALINK X4

SOUTH BRIDGE

PP;PPSLQ%*$

13&(/

P34

4

35mm X 35mm S1G4 Processor

P2 ~ 4

HT3

P7 ~ 10

SB820

P11 ~ 14

/3&

4.5W(Ext)

4.3W(Int)

$]DOLD

&RGHF 57/$/&;

P29

'LJLWDO0,& $8',2&211

5

CPU THERMAL SENSOR

&57 /9'6

86%

86%

86%3RUWV

;

3KRQH0,&

P4

CPU_CLK

NBGFX_CLK

NBGPP_CLK

SBLINK_CLK

3&,([SUHVV;

6,'(SRUW

P7

%7

P31

:HEFDP

P31 P24

6SHDNHU

P29P29P24

6

CLOCK GEN

)URP6%

P11

$7, 0DGLVRQ/3 ELW03NJ

29mm X 29mm

P16 ~ 20

0+]''5

95$0

0;;ELW

0;;ELW

P22,23

&DUG5HDGHU $8$8

P30

7

ZDW

+'0,

&57

08;V

/9'6

6*

P24

86%%2$5'

86%3RUWV[

P31

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Block Diagram

Wednesday, May 27, 2009

+'0,

P25

&57

P24

/9'6

P24

of

149

of

149

of

149

8

1A

5

L40

C447

4.7u/6.3V_6

+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT

CNTR_VREF [4]

CPU_LDT_RST#

L40 PBY201209T-221Y-N

PBY201209T-221Y-N

D1 D2 D3 D4

E3 E2 E1

F1 G3 G2 G1

H1

J1

K1

L3

L2

L1 M1

N3

N2

E5

F5

F3

F4 G5

H5

H3

H4

K3

K4

L5 M5 M3 M4

N5

P5

J3

J2

J5

K5

N1

P1

P3

P4

CNTR_VREF

+2.5V

+1.1V +1.1V_VLDT

1.1V@1.5A

R124 *SHORT_PADR124 *SHORT_PAD R121 *SHORT_PADR121 *SHORT_PAD

P/N: DG0^8000004 DG0^8000005

D D

C C

B B

DG0^8000009 DG0^80000013 DG0^80000014

HT_CADINP[15..0][7] HT_CADINN[15..0][7] HT_CLKINP[1..0][7] HT_CLKINN[1..0][7] HT_CTLINP[1..0][7] HT_CTLINN[1..0][7] HT_CADOUTP[15..0][7] HT_CADOUTN[15..0][7] HT_CLKOUTP[1..0][7] HT_CLKOUTN[1..0][7] HT_CTLOUTP[1..0][7] HT_CTLOUTN[1..0][7]

FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

R256 20K/F_4R 256 20K/F_4

+3V

CPU_LDT_REQ#_CPU

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

HT_CADINP[15..0] HT_CADINN[15..0]

HT_CLKINP[1..0]

HT_CLKINN[1..0]

HT_CTLINP[1..0]

HT_CTLINN[1..0] HT_CADOUTP[15..0] HT_CADOUTN[15..0]

HT_CLKOUTP[1..0]

HT_CLKOUTN[1..0]

HT_CTLOUTP[1..0]

HT_CTLOUTN[1..0]

Q35 *BSS138_NL/SOT23Q35 *BSS138_NL/SOT23

1

R462 *0_4R462 *0_4

C414 10U/6.3V_8C414 10U/6.3V_8 C265 10U/6.3V_8C265 10U/6.3V_8 C376 0.22u/6.3V_4C376 0.22u/6.3V_4 C274 180P/50V_4C274 180P/50V_4

C446 0.1u/10V_4C446 0.1u/10V_4

R251 34.8K/F_4R251 34.8K/F_4

2

3

2.5V@250mA

HT_CADINP0 HT_CADINN0 HT_CADINP1 HT_CADINN1 HT_CADINP2 HT_CADINN2 HT_CADINP3 HT_CADINN3 HT_CADINP4 HT_CADINN4 HT_CADINP5 HT_CADINN5 HT_CADINP6 HT_CADINN6 HT_CADINP7 HT_CADINN7 HT_CADINP8 HT_CADINN8 HT_CADINP9 HT_CADINN9 HT_CADINP10 HT_CADINN10 HT_CADINP11 HT_CADINN11 HT_CADINP12 HT_CADINN12 HT_CADINP13 HT_CADINN13 HT_CADINP14 HT_CADINN14 HT_CADINP15 HT_CADINN15

HT_CLKINP0 HT_CLKINN0 HT_CLKINP1 HT_CLKINN1

HT_CTLINP0 HT_CTLINN0 HT_CTLINP1 HT_CTLINN1

CPU_LDT_REQ# [9,11]

S1g4 does not support MEMHOT#

+1.5VSUS

+1.5VSUS +1.5VSUS

A A

+1.5VSUS +1.5VSUS

R101 *10K_4R101 *10K_4

R100 *1K_4R100 *1K_4

CPU_MEMHOT_L#

R417 *10K_4R417 *10K_4 R425 1K_4R425 1K_4

CPU_THERMTRIP_L#

R420 *10K_4R420 *10K_4

R424 300_4R424 300_4

A62

CPU_PROCHOT_L#

C01

S1G4

2

Q12

Q12 *MMBT3904

*MMBT3904

13

2

Q32

Q32 MMBT3904

MMBT3904

1 3

2

Q31

1 3

*MMBT3904

*MMBT3904 R138 0_4R138 0_4

5

CPU_MEMHOT# [5,6,11]

R155 *0_4R155 *0_4 R309 *Short_4R309 *Short_4

C01

CPU_THERMTRIP# [12] SYS_SHDN# [4,36,43,44]

PM_THERM# [4,12,33] CPU_PROCHOT# [11]

4

A41

U29A

HT LINK

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

SOCKET_638_PIN

12

G1

G1 *SHORT_PAD1

*SHORT_PAD1

for debug only

HWPG[34]

R8191 1K_4R8191 1K_4

D12

4

C436

4.7u/6.3V_6

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

2

1

+1.5VSUS

2

C01

+CPUVDDA

C428

0.22u/6.3V_4

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

+3V

3

Q23

Q23 BSS138_NL/SOT23

BSS138_NL/SOT23

3

Q8008

Q8008 FDV301N

FDV301N

1

R8189

R8189 100K_6

100K_6

3

W/S= 15 mil/20mil

http://hobi-elektronika.net

C432

C432 3300P/50V_4

3300P/50V_4

+1.1V_VLDT

AE2

+1.1V_VLDT

AE3

+1.1V_VLDT

AE4

+1.1V_VLDT

AE5

HT_CADOUTP0

AD1

HT_CADOUTN0

AC1

HT_CADOUTP1

AC2

HT_CADOUTN1

AC3

HT_CADOUTP2

AB1

HT_CADOUTN2

AA1

HT_CADOUTP3

AA2

HT_CADOUTN3

AA3

HT_CADOUTP4

W2

HT_CADOUTN4

W3

HT_CADOUTP5

V1

HT_CADOUTN5

U1

HT_CADOUTP6

U2

HT_CADOUTN6

U3

HT_CADOUTP7

T1

HT_CADOUTN7

R1

HT_CADOUTP8

AD4

HT_CADOUTN8

AD3

HT_CADOUTP9

AD5

HT_CADOUTN9

AC5

HT_CADOUTP10

AB4

HT_CADOUTN10

AB3

HT_CADOUTP11

AB5

HT_CADOUTN11

AA5

HT_CADOUTP12

Y5

HT_CADOUTN12

W5

HT_CADOUTP13

V4

HT_CADOUTN13

V3

HT_CADOUTP14

V5

HT_CADOUTN14

U5

HT_CADOUTP15

T4

HT_CADOUTN15

T3

HT_CLKOUTP0

Y1

HT_CLKOUTN0

W1

HT_CLKOUTP1

Y4

HT_CLKOUTN1

Y3

HT_CTLOUTP0

R2

HT_CTLOUTN0

R3

HT_CTLOUTP1

T5

HT_CTLOUTN1

R5

S1G4

R262

4.7K_4

CPU_LDT_RST_HTPA#

C440

C440 *10U/6.3V_8

*10U/6.3V_8

C39710U/6.3V_8 C39710U/6.3V_8 C2730.22u/6.3V_4 C2730.22u/6.3V_4 C387180P/50V_4 C387180P/50V_4

Serial VID

CLK_CPU_BCLKP_PR[11] CLK_CPU_BCLKN_PR[11]

Keep trace from resisor to CPU w ithin 0.6" keep trace from caps to CPU wi t hin 1.2"

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

R464 169/F_4R464 169/F_4

C704 3900P/25V_4C704 3900P/25V_4 C703 3900P/25V_4C703 3900P/25V_4

CPU_PWRGD_SVID_REG[11,37]

SideBand Temp sense I2C

S1G4

+1.1V_VLDT

CPU_VDD0_FB_H[37] CPU_VDD0_FB_L[37]

CPU_VDD1_FB_H[37] CPU_VDD1_FB_L[37]

+1.5VSUS

R422 1K/F_4R422 1K/F_4

+1.5VSUS

R430 *300/F_4R430 *300/F_4

+1.5VSUS[3,4,5,6,37,40,42,43,44,46]

+1.5V[7,10,27,29,40,43] +1.1V[7,8,9,10,14,38,44] +2.5V[42]

+1.5VSUS +1.5V

CPU_SVC CPU_SVD CPU_PWRGD_SVID_REG

+1.5VSUS +1.5V +1.1V +2.5V

R238 1K/F_4R238 1K/F_4 R235 *1K/F_4R235 *1K/F_4

R240 1K/F_4R240 1K/F_4 R237 *1K/F_4R237 *1K/F_4

R231 *220_4R231 *220_4 R232 *220_4R232 *220_4 R244 *220_4R244 *220_4

HDT Connector

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

KEY

CN7

+1.5VSUS

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

C398 *0.1u/10V_4C398 *0.1u/10V_4

3

CLK_CPU_BCLKP_PR CLK_CPU_BCLKN_PR

CPU_LDT_RST#[11]

CPU_LDT_STOP#[9,11]

CPU_SIC[4] CPU_SID[4]

CPU_ALERT[4]

R207 44.2/F_4R207 44.2/F_4 R208 44.2/F_4R208 44.2/F_4

R245 510/F_4R245 510/F_4 R241 510/F_4R241 510/F_4

25

*HDT_CONN

2

SB check list tide to CPUVDDIO (+1.5VSUS)

CPU_PWRGD_SVID_REG CPU_LDT_RST# CPU_LDT_STOP# CPU_LDT_REQ#_CPU

+CPUVDDA

250mA

W/S= 15 mil/20mil

+CPUVDDA +CPUVDDA

CLK_CPU_BCLKP_C CLK_CPU_BCLKN_C

CPU_LDT_RST# CPU_PWRGD_SVID_REG CPU_LDT_STOP# CPU_LDT_REQ#_CPU

CPU_HTREF0 CPU_HTREF1

place them to CPU within 1.5"

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPUTEST23 CPUTEST18

CPUTEST19 CPUTEST25H

CPUTEST25L

place them to CPU within 1.5"

CPUTEST21 CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12 CPUTEST27

CPU_SVC [37] CPU_SVD [37] CPU_PWRGD_SVID_REG [11,37]

CPU_LDT_RST_HTPA#

2

AE6

AB6 G10

AA9 AC9 AD9 AF9

AD7 H10

AB8 AF7 AE7 AE8 AC8 AF8

AA6

F8 F9

A9 A8

B7 A7

F10

C6

AF4 AF5

R6 P6

F6 E6

Y6

G9

E9 E8

C2

A3 A5

B3

B5

C1

R236300/F_4 R236300/F_4 R261300/F_4 R261300/F_4 R249300/F_4 R249300/F_4 R463*300/F_4 R463*300/F_4

U29D

VDDA1 VDDA2

CLKIN_H CLKIN_L

RESET_L PWROK LDTSTOP_L LDTREQ_L

SIC SID ALERT_L

HT_REF0 HT_REF1

VDD0_FB_H VDD0_FB_L

VDD1_FB_H VDD1_FB_L

DBRDY TMS TCK TRST_L TDI

TEST23 TEST18

TEST19 TEST25_H

TEST25_L TEST21

TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5

SOCKET_638_PIN

VFIX MODE

THERMTRIP_L

PROCHOT_L

VDDIO_FB_H VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

VSS

RSVD11

SVC SVD

MEMHOT_L

THERMDC THERMDA

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

M11 W18

A6 A4

AF6 AC7 AA8

W7 W8

W9 Y9

H6 G6

E10 AE9

J7 H8

D7 E7 F7 C7

C3 K8

C4

C9 C8

H18 H19 AA7 D5 C5

VID Override Circuit

SVC SVD Voltage Output

00 0

1 0

1 1

1

CPUTEST24 CPUTEST23 CPUTEST20 CPUTEST22 CPUTEST12 CPUTEST15 CPUTEST14 CPUTEST19 CPUTEST18 CPUTEST21

R428 1K/F_4R428 1K/F_4 R426 1K/F_4R426 1K/F_4 R427 1K/F_4R427 1K/F_4 R429 1K/F_4R429 1K/F_4 R188 1K/F_4R188 1K/F_4 R227 *300/F_4R227 *300/F_4 R243 *300/F_4R243 *300/F_4 R233 1K/F_4R233 1K/F_4 R230 1K/F_4R230 1K/F_4 R139 1K/F_4R139 1K/F_4

S1G4

1

+1.5V

03

S1G4

CPU_SVC CPU_SVD

CPU_THERMTRIP_L# CPU_PROCHOT_L# CPU_MEMHOT_L#

H_THRMDC [4] H_THRMDA [4]

VDDIO_FB_H VDDIO_FB_L

CPU_DBREQ# CPU_TDO

CPUTEST17 CPUTEST16 CPUTEST15 CPUTEST14

CPUTEST29H

CPUTEST29L

VDDIO_FB_H [40] VDDIO_FB_L [40]

CPU_VDDNB_FB_H [37] CPU_VDDNB_FB_L [37]

R247 *300/F_4R247 *300/F_4 R246 300/F_4R246 300/F_4

PV stage:add +1.8VSUS opt ion R3114 for Caspian CPU power leakage issue

R250

80.6/F_4

+1.5V +1.5VSUS

T28T28 T27T27 T26T26 T29T29

T30T30

T31T31

S1G4

1.1V

1.0V

0.9V

0.8V

S1G4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

S1G4 HT,CTL I/F 1/3

Wednesday, May 27, 2009

1

of

249

of

249

of

249

1A

A

VDDR=>1.75A

+1.5VSUS CPU_VDDR

PLACE THEM CLOSE TO CPU WITHIN 1"

R415

R415 0_4

0_4

4 4

C660

C660 10U/6.3V_8

10U/6.3V_8

S1G4

3 3

2 2

CPU_VDDR

C431

C431 1000P/50V_4

1000P/50V_4

1 1

R432 39.2/F_4R432 39.2/F_4 R431 39.2/F_4R431 39.2/F_4

M_A_RST#[5,46] M_A_ODT0[46]

M_A_ODT1[46] M_A1_ODT0[5] M_A1_ODT1[5]

M_A_CS#0[46]

M_A_CS#1[46] M_A1_CS#0[5] M_A1_CS#1[5]

M_A_CKE0[5,46]

M_A_CKE1[5,46] M_A_CLKP1[46]

M_A_CLKN1[46] M_A_CLKP3[5] M_A_CLKN3[5] M_A_CLKP4[5] M_A_CLKN4[5] M_A_CLKP2[46] M_A_CLKN2[46]

M_A_A[0..15][5,46] M_B_A[0..15] [6]

M_A_BANK0[5,46] M_A_BANK1[5,46] M_A_BANK2[5,46]

M_A_RAS#[5,46] M_A_CAS#[5,46] M_A_WE#[5,46]

CPU_VDDR

C434

C434 1000P/50V_4

1000P/50V_4

+1.5VSUS

R206

R206 1K/F_4

1K/F_4

R204

R204 1K/F_4

1K/F_4

A

C439

4.7u/6.3V_6

C345

C345 1000P/50V_4

1000P/50V_4

C352

C352 *0.47u/10V_4

*0.47u/10V_4

1 2

M_ZP M_ZN

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

U29B

D10

VDDR1

MEM:CMD/CTRL/CLK

VDDR2 VDDR3 VDDR4

MEMZP MEMZN

MA_RESET_L MA0_ODT0

MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1

6

MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

SOCKET_638_PIN

MEM:CMD/CTRL/CLK

C10 B10

AD10 AF10

AE10

H16 T19

V22 U21 V19

T20 U19 U20 V20

N19 N20 E16 F16 Y1

AA16

P19 P20

N21 M20 N22 M19 M22

M24

K22 R21

K20 V24 K24 K19

R20 R23

R19 T22 T24

J22 J20

L20 L21

L19

L22

J21

Place close to socket

C282

4.7u/6.3V_6

C275

C275 1000P/50V_4

1000P/50V_4

C427

180P/50V_4

+3VPCU

52

U14

3

+

4

-

*OPA343NA/3K

R194 *0_4R194 *0_4 R193 *0_4R193 *0_4

C442

4.7u/6.3V_6

R201 0_4R201 0_4

C339

C339 *.1u_4

*.1u_4

1

VDDR_SENSE

MEMVREF

MB_RESET_L

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C281

4.7u/6.3V_6

C435

180P/50V_4

R197 *10_4R197 *10_4

VDDR5 VDDR6 VDDR7 VDDR8 VDDR9

B

VDDR=> 0.9V support 1066 / 800 DDR VDDR= >1.05V support 1333 / 1066 / 800 DDR

CPU_VDDR

W1

0 AC10 AB10 AA10 A10

CPU_VTT_SENSE

Y10

MEMVREF_CPU

W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

M_B_A0

P24

M_B_A1

N24

M_B_A2

P26

M_B_A3

N23

M_B_A4

N26

M_B_A5

L23

M_B_A6

N25

M_B_A7

L24

M_B_A8

M26

M_B_A9

K26

M_B_A10

T26

M_B_A11

L26

M_B_A12

L25

M_B_A13

W2

4

M_B_A14

J23

M_B_A15

J24 R24

U26 J26

U25 U24 U23

C278

0.22u/6.3V_4

C437

180P/50V_4

C279

0.22u/6.3V_4

C430

180P/50V_4

http://hobi-elektronika.net

D01

CPU_VDDR

C18

R189

R189 *0_4

*0_4

M_B_RST# [6] M_B_ODT0 [6]

M_B_ODT1 [6]

M_B_CS#0 [6] M_B_CS#1 [6]

M_B_CKE0 [6] M_B_CKE1 [6]

M_B_CLKP1 [6] M_B_CLKN1 [6]

M_B_CLKP2 [6] M_B_CLKN2 [6]

M_B_BANK0 [6] M_B_BANK1 [6] M_B_BANK2 [6]

M_B_RAS# [6] M_B_CAS# [6] M_B_WE# [6]

C276

0.22u/6.3V_4

Reserved for AMD suggest

MEMVREF_CPU

R182

R182 *10K/F_4

*10K/F_4

B

C15

C277

0.22u/6.3V_4

D01

+SMDDR_VREF

C347

0.1u/10V_4

C

R184

R184 *0_4

*0_4

C346

1000P/50V_4

+0.75V_DDR_VTT +SMDDR_VREF[5,6,40]

CPU_VDDR[43] +1.5VSUS[2,4,5,6,37,40,42,43,44,46]

C

M_B_DQ[0..63][6]

+0.75V_DDR_VTT +SMDDR_VREF CPU_VDDR +1.5VSUS

M_B_DM[0..7][6]

M_B_DQSP0[6] M_B_DQSN0[6] M_B_DQSP1[6] M_B_DQSN1[6] M_B_DQSP2[6] M_B_DQSN2[6] M_B_DQSP3[6] M_B_DQSN3[6] M_B_DQSP4[6] M_B_DQSN4[6] M_B_DQSP5[6] M_B_DQSN5[6] M_B_DQSP6[6] M_B_DQSN6[6] M_B_DQSP7[6] M_B_DQSN7[6]

D

Processor Memory Interface

U29C

MEM:DATA M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23

G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

A12

B16

A22

E25 AB26 AE22 AC16 AD12

C12

B12

D16

C16

A24

A23

E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

Y11

F26

D

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MEM:DATA

SOCKET_638_PIN

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

E

04

M_A_DQ0

G12

M_A_DQ1

F12

M_A_DQ2

H14

M_A_DQ3

G14

M_A_DQ4

H11

M_A_DQ5

H12

M_A_DQ6

C13

M_A_DQ7

E13

M_A_DQ8

H15

M_A_DQ9

E15

M_A_DQ10

E17

M_A_DQ11

H17

M_A_DQ12

E14

M_A_DQ13

F14

M_A_DQ14

C17

M_A_DQ15

G17

M_A_DQ16

G18

M_A_DQ17

C19

M_A_DQ18

D22

M_A_DQ19

E20

M_A_DQ20

E18

M_A_DQ21

F18

M_A_DQ22

B22

M_A_DQ23

C23

M_A_DQ24

F20

M_A_DQ25

F22

M_A_DQ26

H24

M_A_DQ27

J19

M_A_DQ28

E21

M_A_DQ29

E22

M_A_DQ30

H20

M_A_DQ31

H22

M_A_DQ32

Y2

4

M_A_DQ33

AB24

M_A_DQ34

AB22

M_A_DQ35

AA21

M_A_DQ36

W2

2

M_A_DQ37

W2

1

M_A_DQ38

Y22

M_A_DQ39

AA22

M_A_DQ40

Y2

0

M_A_DQ41

AA20

M_A_DQ42

AA18

M_A_DQ43

AB18

M_A_DQ44

AB21

M_A_DQ45

AD21

M_A_DQ46

AD19

M_A_DQ47

Y1

8

M_A_DQ48

AD17

M_A_DQ49

W1

6

M_A_DQ50

W1

4

M_A_DQ51

Y1

4

M_A_DQ52

Y1

7

M_A_DQ53

AB17

M_A_DQ54

AB15

M_A_DQ55

AD15

M_A_DQ56

AB13

M_A_DQ57

AD13

M_A_DQ58

Y12

M_A_DQ59

W11

M_A_DQ60

AB14

M_A_DQ61

AA14

M_A_DQ62

AB12

M_A_DQ63

AA12

M_A_DM0

E12

M_A_DM1

C15

M_A_DM2

E19

M_A_DM3

F24

M_A_DM4

AC24

M_A_DM5

Y1

9

M_A_DM6

AB16

M_A_DM7

Y1

3

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y1

5

W1

5

W1

2

W13

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

S1G4 DDRIII MEMORY I/F 2/3

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet

M_A_DQ[0..63] [5,46]

M_A_DM[0..7] [5,46]

M_A_DQSP0 [5,46] M_A_DQSN0 [5,46] M_A_DQSP1 [5,46] M_A_DQSN1 [5,46] M_A_DQSP2 [5,46] M_A_DQSN2 [5,46] M_A_DQSP3 [5,46] M_A_DQSN3 [5,46] M_A_DQSP4 [5,46] M_A_DQSN4 [5,46] M_A_DQSP5 [5,46] M_A_DQSN5 [5,46] M_A_DQSP6 [5,46] M_A_DQSN6 [5,46] M_A_DQSP7 [5,46] M_A_DQSN7 [5,46]

E

of

349

1A

5

U29E

G4

VDD_1

H2

VDD_2

J9

VDD_3

J11

VDD_4

J13

VDD_5

3

J15

VDD_6

K6

VDD_7

K10

VDD_8

K12

VDD_9

K14

VDD_10

L4

VDD_11

L7

VDD_12

L9

VDD_13

L11

VDD_14

L13

VDD_15

L15

VDD_16

M2

VDD_17

M6

VDD_18

M8

VDD_19

M10

VDD_20

N7

VDD_21

N9

VDD_22

N11

VDD_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SOCKET_638_PIN

2

Q19

1

3

BSS138_NL/SOT23

D D

CPU_VDDNB_CORE

3A

+1.5VSUS

C C

CNTR_VREF[2]

CPU_SMBCLK

BSS138_NL/SOT23

CPU_SMBDATA

B B

PM_THERM#

C17

BSS138_NL/SOT23

VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

2

C17

Q18

1

2

3

+VCORE+VCORE +VCORE

P8 P10 R4 R7 R9 R11 T2 T6

R421

1K/F_4

Q17

T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

+1.5VSUS

1

Place under CPU bracket side.

+1.5VSUS

R423

R252

1K/F_4

+3V

4

B2-TEST

PC54

PC54 *330u/2V_7343

*330u/2V_7343

+

1.5V@2A

CPU_SIC [2]

CPU_SID [2]

CPU_ALERT [2]

3

http://hobi-elektronika.net

U29F

AA4 AA11 AA13 AA15 AA17 AA19

AB2

AB7

AB9 AB23 AB25

AC11 AC13 AC15 AC17 AC19 AC21

AD6

AD8

AD25

AE11 AE13 AE15 AE17 AE19 AE21 AE23

B11

B13

B15

B17

B19

B21

B23

B25

D11

D13

D15

D17

D19

D21

D23

D25

H21

H23

B4 B6 B8 B9

D6 D8 D9

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7 H9

J4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

SOCKET_638_PIN

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y2 N6

BOTTOM SIDE DECOUPLI NG

C360

10U/6.3V_8

+VCORE

CPU_VDDNB_CORE

C357

10U/6.3V_8

C358

10U/6.3V_8

C351

10U/6.3V_8

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.5VSUS

C394

4.7u/6.3V_6

+1.5VSUS

0.22u/6.3V_4

3

0.22u/6.3V_4

C377

4.7u/6.3V_6

0.22u/6.3V_4

C388

C406

C361

C425

C371

10U/6.3V_8

C364

10U/6.3V_8

C366

10U/6.3V_8

4.7u/6.3V_6

C408

0.01U/25V_4

10U/6.3V_8

+1.5VSUS

C426

2

C413

C399

10U/6.3V_8

C415

C415 10U/6.3V_8

10U/6.3V_8

4.7u/6.3V_6

C407

0.01u/25V_4

C354

0.22u/6.3V_4

C372

10U/6.3V_8

C405

C385

180P/50V_4

C370

0.22u/6.3V_4

C384

PROCESSOR POWER AND GROUND

C355

0.01U/25V_4

C378

0.01U/25V_4

C367

C356

180P/50V_4

C404

0.22u/6.3V_4

C359

0.22u/6.3V_4

C383

180P/50V_4

C368

0.01U/25V_4

C369

180P/50V_4

C396

180P/50V_4

1

05

+3V

R267

D05

*10K/F_4

U16

CPU_SMBCLK[34] CPU_SMBDATA[34]

PM_THERM#[2,12,33]

A A

CPU_SMBCLK CPU_SMBDATA

PM_THERM#

C17

5

R479

R479 *0_4

*0_4

8 7 6 4

U16

SCLK SDA ALERT# OVERT#

*G786P8

C17

MSOP

VCC DXP DXN GND

R254

R254 *200/F_6

*200/F_6

1 2 3 5

C17

C450

C450 *0.1u/10V_4

*0.1u/10V_4

D05

H_THRMDA [2]

C344

C344 *1000P/50V_4

*1000P/50V_4

H_THRMDC [2] PWROK_EC [15,34]

SMBALERT#

*2N7002K

4

Q22

1 3

3

1

C02

PWROK_EC_3904

2

Q21

Q21 *MMBT3904

*MMBT3904

R264 *10K/F_4R264 *10K/F_4

2

ADD VGA TEMP_ FAIL function M93 is active Hi

2 1

R255 *10K/F_4R255 *10K/F_4

D14

D14 *CH501H-40PT

*CH501H-40PT

3

SYS_SHDN# [2,36,43,44]

+3V

TEMP_FAIL [17]

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

S1G4 PWR & GND 3/3

Wednesday, May 27, 2009

449

1

449

1A

of

5

M_A_A[15:0][3,46]

D D

M_A_BANK[0..2][3,46]

M_A1_CS#0[3] M_A1_CS#1[3] M_A_CLKP3[3] M_A_CLKN3[3] M_A_CLKP4[3] M_A_CLKN4[3] M_A_CKE0[3,46] M_A_CKE1[3,46]

A08

R198 10K_4R198 10K_4 R199 10K_4R199 10K_4

+3V

C C

+1.5VSUS

M_A_CAS#[3,46] M_A_RAS#[3,46] M_A_WE#[3,46]

PCLK_SMB[6,12,26,27,46]

PDAT_SMB[6,12,26,27,46]

M_A1_ODT0[3] M_A1_ODT1[3]

D08

R0_CKE0 R0_CKE1

M_A_DM[7:0][3,46]

M_A_DQSP[7:0][3,46]

M_A_DQSN[7:0][3,46]

R584

R259

*10K_4

B B

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BANK0 M_A_BANK1 M_A_BANK2

R585 *Short_4R585 *Short_4 R588 *Short_4R588 *Short_4

DIMM0_SA0 DIMM0_SA1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

R0_CKE0 R0_CKE1

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

4

CN15A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM0_H=4.0_RVS

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

3

http://hobi-elektronika.net

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQ[63:0] [3,46]

+1.5VSUS

+0.75VSMVREF_SUSA

+SMDDR_VREF

R203 *Short_4R203 *Short_4

R589

R589 1K/F_4

1K/F_4

R590

R590 1K/F_4

1K/F_4

+0.75VSMVREF_SUSA

+VREF_CA_A

+1.5VSUS

MEMHOT_MA#[46]

M_A_RST#[3,46]

+VREF_CA_A

+1.5VSUS

R257

*2K/F_4

R258

*2K/F_4

R123 *2.2K_4R123 *2.2K_4

R122 *2.2K_4R122 *2.2K_4

MEMHOT_MA#

2.48A

+3V

2

+1.5VSUS

MEMHOT_MA#

1 3

D12

2

75 76 81 82 87 88 93 94

99 100 105 106 111 112 117 118 123 124

199

77 122 125

198

30

1

126

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

Q10

Q10 *MMBT3904

*MMBT3904

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

CN15B

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

PC2100 DDR3 SDRAM SO-DIMM

DDR3-DIMM0_H=4.0_RVS

A51

CPU_MEMHOT# [2,6,11]

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

1

+0.75V_DDR_VTT

Place these Caps near So-Dimm0.

+1.5VSUS

C417

C402

C402 *.1u/16V_4

*.1u/16V_4

C9224

C9224 1U/6.3V_4

1U/6.3V_4

C417 .1u/16V_4

.1u/16V_4

C829

10u/6.3V_6

C455

C455 *.1u/16V_4

*.1u/16V_4

C400

C400 10u/6.3V_6

10u/6.3V_6

C390

10u/6.3V_6

A A

C379

C379 10u/6.3V_6

10u/6.3V_6

C411

C411 10u/6.3V_6

10u/6.3V_6

5

C380

C380 10u/6.3V_6

10u/6.3V_6

C401

C401 10u/6.3V_6

10u/6.3V_6

C416

C416 *.1u/16V_4

*.1u/16V_4

+0.75V_DDR_VTT

C224

C224 1U/6.3V_4

1U/6.3V_4

C686

C686 .1u/16V_4

.1u/16V_4

C348

.1u/16V_4

+VREF_CA_A

2.2u/6.3V_6

4

C260

.1u/16V_4

+0.75VSMVREF_SUSA

C826

C825

C826

2.2u/6.3V_6

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

DDR2 SODIMMS: A/B CHANNEL

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

3

2

Wednesday, May 27, 2009

549

1

1A

of

5

4

3

2

1

M_B_A[15:0][3]

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7

D D

M_B_BANK[0..2][3]

M_B_CS#0[3] M_B_CS#1[3] M_B_CLKP1[3] M_B_CLKN1[3] M_B_CLKP2[3] M_B_CLKN2[3] M_B_CKE0[3]

A08

R131 10K_4R131 10K_4

+3V

R130 10K_4R130 10K_4

C C

B B

M_B_CKE1[3] M_B_CAS#[3] M_B_RAS#[3] M_B_WE#[3]

PCLK_SMB[5,12,26,27,46]

PDAT_SMB[5,12,26,27,46]

M_B_ODT0[3] M_B_ODT1[3]

M_B_DM[7:0][3]

M_B_DQSP[7:0][3]

M_B_DQSN[7:0][3]

M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_BANK0 M_B_BANK1 M_B_BANK2

DIMM1_SA0 DIMM1_SA1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

CN25A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3-DIMM1_H=4.0_Standard

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

http://hobi-elektronika.net

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQ[63:0] [3]

+1.5VSUS

MEMHOT_MB#

+0.75VSMVREF_SUSB

+SMDDR_VREF

R117 *Short_4R117 *Short_4

R202 *2.2K_4R202 *2.2K_4 R195 *2.2K_4R195 *2.2K_4

+1.5VSUS

R591

R591 1K/F_4

1K/F_4

R592

R592 1K/F_4

1K/F_4

+VREF_CA_B

D12

M_B_RST#[3]

+0.75VSMVREF_SUSB

+VREF_CA_B

+1.5VSUS

R118

*2K/F_4

R110

*2K/F_4

2

Q14

Q14 *MMBT3904

*MMBT3904

1 3

+1.5VSUS

2.48A

+3V

MEMHOT_MB#

CPU_MEMHOT# [2,5,11]

CN25B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_Standard

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

(204P)

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

A50

2DIMM--->P/N:DGMK4000109

+0.75V_DDR_VTT

+1.5VSUS

C817

C817 10u/6.3V_6

10u/6.3V_6

A A

Place these Caps near So-Dimm1.

C821

C409

C409 10u/6.3V_6

10u/6.3V_6

C690

C690 10u/6.3V_6

10u/6.3V_6

C819

C819 10u/6.3V_6

10u/6.3V_6

C821 10u/6.3V_6

10u/6.3V_6

C818

C818 10u/6.3V_6

10u/6.3V_6

+0.75V_DDR_VTT

5

C822

C822 *.1u/16V_4

*.1u/16V_4

C8158

C8158 1u/6.3V_4

1u/6.3V_4

C689

C689 .1u/16V_4

.1u/16V_4

C231

C231 1u/6.3V_4

1u/6.3V_4

C418

C418 *.1u/16V_4

*.1u/16V_4

C820

C820 .1u/16V_4

.1u/16V_4

10u/6.3V_6

C454

C454 *.1u/16V_4

*.1u/16V_4

C830

+VREF_CA_B

C230

.1u/16V_4

4

+0.75VSMVREF_SUSB

C259

2.2u/6.3V_6

C828

C828 .1u/16V_4

.1u/16V_4

C827

2.2u/6.3V_6

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

DDR2 SODIMMS: A/B CHANNEL

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

3

2

Wednesday, May 27, 2009

649

1

1A

of

5

SIDE PORT

11/4

C9789

C9791

E4 F8 F3 F9 H4 H9 G3 H8

D8 C4 C9 C3 A8 A3 B9 A4

B3 D10 G8 K3 K9 N2 N10 R2 R10

A2 A9 C2 C10 D3 E10 F2 H3 H10

A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10

B2 B10 D2 D9 E3 E9 F10 G2 G10

+1.5V_MEM_VDDQ+1.5V_MEM_VDDQ

SPM_DQ5 SPM_DQ3 SPM_DQ4 SPM_DQ0 SPM_DQ6 SPM_DQ1 SPM_DQ7 SPM_DQ2

SPM_DQ14 SPM_DQ9 SPM_DQ15 SPM_DQ8 SPM_DQ10 SPM_DQ11 SPM_DQ13 SPM_DQ12

D D

C9788

SIDE@0.1u/10V_4

C9790

SIDE@0.1u/10V_4

C C

R593 *SIDE@100/F_4R593 *SIDE@100/F_4

B B

+1.5V_MEM_VDDQ

R603 SIDE@10K/F_4R603 SIDE@10K/F_4

SP_DDR3_RST#[12]

A A

SPM_VREFCA SPM_VREFDQ

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_CLKP SPM_CLKN SPM_CKE

SPM_ODT SPM_CS# SPM_RAS# SPM_CAS# SPM_WE#

SPM_DQS0P SPM_DQS1P

SPM_DM0 SPM_DM1

SPM_DQS0N SPM_DQS1N

VMA_ZQ

R604

R604 SIDE@240/F_4

SIDE@240/F_4

5

R599

R599 SI

SI

DE@1K/F_4

R601

R601 SIDE@1K/F_4

SIDE@1K/F_4

M9

H2 N4

P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8

M8

M3

N9

M4

J8 K8

K10

K2 L3 J4 K4 L4

F4 C8

E8 D4

G4

B8

T3 L9

J2 L2

J10

L10

SIDE@0.1u/10V_4

SPM_VREFCASPM_VREFDQ

SIDE@0.1u/10V_4

U39

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#H3

VDDQ#H10

VSSQ#B10

VSSQ#F10

VSSQ#G10

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3 VDD#K9 VDD#N2

VDD#N10

VDD#R2

VDD#R10

VDDQ#A2 VDDQ#A9

VDDQ#F2

VSS#A10

VSS#B4 VSS#E2 VSS#G9

VSS#J3 VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2 VSSQ#D2

VSSQ#D9 VSSQ#E3 VSSQ#E9

VSSQ#G2

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15

BA0 BA1 BA2

CK CK CKE

ODT CS RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ

NC#J2 NC#L2 NC#J10 NC#L10

SIDE@H5TQ1G63AFR-14C

4

R600

R600 SI

SI

DE@1K/F_4

R602

R602 SIDE@1K/F_4

SIDE@1K/F_4

+1.5V_MEM_VDDQ

4

3

U28A

http://hobi-elektronika.net

R183 301/F_4R183 301/F_4

HT_CADOUTP0 HT_CADOUTN0 HT_CADOUTP1 HT_CADOUTN1 HT_CADOUTP2 HT_CADOUTN2 HT_CADOUTP3 HT_CADOUTN3 HT_CADOUTP4 HT_CADOUTN4 HT_CADOUTP5 HT_CADOUTN5 HT_CADOUTP6 HT_CADOUTN6 HT_CADOUTP7 HT_CADOUTN7

HT_CADOUTP8 HT_CADOUTN8 HT_CADOUTP9 HT_CADOUTN9 HT_CADOUTP10 HT_CADOUTN10 HT_CADOUTP11 HT_CADOUTN11 HT_CADOUTP12 HT_CADOUTN12 HT_CADOUTP13 HT_CADOUTN13 HT_CADOUTP14 HT_CADOUTN14 HT_CADOUTP15 HT_CADOUTN15

HT_CLKOUTP0 HT_CLKOUTN0 HT_CLKOUTP1 HT_CLKOUTN1

HT_CTLOUTP0 HT_CTLOUTN0 HT_CTLOUTP1 HT_CTLOUTN1

HT_RXCALP HT_TXCALP HT_RXCALN

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25 AB25 AB24 AA24 AA25

Y22

Y23 W2 W2

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22

M23

R21

R20

C23

A24

U28A

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N

1

HT_RXCAD12P

0

HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

RS880M_A11

PART 1 OF 6

This block is for UMA only , Discrete can remove all component

U28D

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

SI

DE@0.1u/10V_4

C9783

U28D

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

RS880M_A11

SIDE@10u/6.3V_6

A09

+1.5V_MEM_VDDQ

R597 SIDE@40.2/F_4R597 SIDE@40.2/F_4 R607 SIDE@40.2/F_4R607 SIDE@40.2/F_4

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_RAS# SPM_CAS# SPM_WE# SPM_CS# SPM_CKE SPM_ODT

SPM_CLKP SPM_CLKN

SPM_COMPP SPM_COMPN

C9782

SIDE@0.1u/10V_4

3

2

HT_CADINP0

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

PAR 4 OF 6

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCKN(NC)

SBD_MEM/DVO_I/F

D24

HT_CADINN0

D25

HT_CADINP1

E24

HT_CADINN1

E25

HT_CADINP2

F24

HT_CADINN2

F25

HT_CADINP3

F23

HT_CADINN3

F22

HT_CADINP4

H23

HT_CADINN4

H22

HT_CADINP5

J25

HT_CADINN5

J24

HT_CADINP6

K24

HT_CADINN6

K25

HT_CADINP7

K23

HT_CADINN7

K22

HT_CADINP8

F21

HT_CADINN8

G21

HT_CADINP9

G20

HT_CADINN9

H21

HT_CADINP10

J20

HT_CADINN10

J21

HT_CADINP11

J18

HT_CADINN11

K17

HT_CADINP12

L19

HT_CADINN12

J19

HT_CADINP13

M19

HT_CADINN13

L18

HT_CADINP14

M21

HT_CADINN14

P21

HT_CADINP15

P18

HT_CADINN15

M18

HT_CLKINP0

H24

HT_CLKINN0

H25

HT_CLKINP1

L21

HT_CLKINN1

L20

HT_CTLINP0

M24

HT_CTLINN0

M25

HT_CTLINP1

P19

HT_CTLINN1

R18 B24

HT_TXCALN

B25

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)

MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS1P(NC)

MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

R192 301/F_4R192 301/F_4

AA18

AA20 AA19 Y19

V17 AA17 AA15 Y15 AC20 AD19

AE22

AC18

AB20

AD22

AC22

AD21

Y17

W18

AD20

AE21

W17

AE19

IOPLLVDD18_SIDE_PORT

AE23

IOPLLVDD_SIDE_PORT

AE24

AD23

SPM_VREF1

AE18

40 mil~50 mil

SI

DE@1u/6.3V_4

C9784

+1.5V_MEM_VDDQ

C9785

SIDE@1u/6.3V_4

C9786

R598 SIDE@0_6R598 SIDE@0_6

C9787

C9787 SIDE@10u/6.3V_6

SIDE@10u/6.3V_6

2

HT_CADOUTP[15..0] HT_CADOUTN[15..0] HT_CLKOUTP[1..0] HT_CLKOUTN[1..0] HT_CTLOUTP[1..0] HT_CTLOUTN[1..0] HT_CADINP[15..0] HT_CADINN[15..0] HT_CLKINP[1..0] HT_CLKINN[1..0] HT_CTLINP[1..0] HT_CTLINN[1..0]

RbRa

SPM_DQ0 SPM_DQ1 SPM_DQ2 SPM_DQ3 SPM_DQ4 SPM_DQ5 SPM_DQ6 SPM_DQ7 SPM_DQ8 SPM_DQ9 SPM_DQ10 SPM_DQ11 SPM_DQ12 SPM_DQ13 SPM_DQ14 SPM_DQ15

SPM_DQS0P SPM_DQS0N SPM_DQS1P SPM_DQS1N

SPM_DM0 SPM_DM1

C9781

SIDE@2.2u/6.3V_6

+1.5V

1

HT_CADOUTP[15..0] [2]

HT_CADOUTN[15..0] [2]

HT_CLKOUTP[1..0] [2]

HT_CLKOUTN[1..0] [2]

HT_CTLOUTP[1..0] [2]

HT_CTLOUTN[1..0] [2]

HT_CADINP[15..0] [2]

HT_CADINN[15..0] [2]

HT_CLKINP[1..0] [2]

HT_CLKINN[1..0] [2]

HT_CTLINP[1..0] [2]

HT_CTLINN[1..0] [2]

signals

HT_TXCALP

HT_TXCALN

HT_RXCALP

HT_RXCALN

RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18

RS880 RX880

Ra 301 ohm 1%

Rb 301 ohm 1%

+1.8V[9,10,15,24,37,42,43,44] +1.1V[2,8,9,10,14,38,44]

C9792

SIDE@0.1u/10V_4

SPM_VREF1

C9793

SIDE@0.1u/10V_4

Ra

1.21k ohm 1%

Rb

1.21k ohm 1%

+1.8V +1.1V

+1.5V_MEM_VDDQ

R605

R605 SIDE@1K/F_4

SIDE@1K/F_4

R606

R606 SP@

SP@

1K/F_4

R606 W/O side port

-->change to 0 Ohm CS00002JB38

A41

L75 PBY160808T-221Y-NL75 PBY160808T-221Y-N L73 PBY160808T-221Y-NL73 PBY160808T-221Y-N

C9794

C9794 SIDE@2.2u/6.3V_6

SIDE@2.2u/6.3V_6

Size Document Number Rev

Date: Sheet of

Date: Sheet

IOPLLVDD18 - memory PLL not applicable to RX881

352-(&7=5

4XDQWD&RPSXWHU,QF

RS880M-HT LINK I/F 1/5

Wednesday, May 27, 2009

1

08

15mA

+1.8V

26mA

+1.1V

1A

of

749

5

4

3

2

1

http://hobi-elektronika.net

09

U28B PEG_RXP15 PEG_RXN15 PEG_RXP14 PEG_RXN14 PEG_RXP13

D D

PCIE_RX1+[26]

C C

PCIE_RX1-[26]

PCIE_RXP2[27] PCIE_RXN2[27]

A_RXP0[11] A_RXN0[11] A_RXP1[11] A_RXN1[11] A_RXP2[11] A_RXN2[11] A_RXP3[11] A_RXN3[11]

PEG_RXN13 PEG_RXP12 PEG_RXN12 PEG_RXP11 PEG_RXN11 PEG_RXP10 PEG_RXN10 PEG_RXP9 PEG_RXN9 PEG_RXP8 PEG_RXN8 PEG_RXP7 PEG_RXN7 PEG_RXP6 PEG_RXN6 PEG_RXP5 PEG_RXN5 PEG_RXP4 PEG_RXN4 PEG_RXP3 PEG_RXN3 PEG_RXP2 PEG_RXN2 PEG_RXP1 PEG_RXN1 PEG_RXP0 PEG_RXN0

U28B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS880M_A11

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP)

PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N

PCIE I/F GFX

GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C PEG_TXP11_C PEG_TXN11_C PEG_TXP10_C PEG_TXN10_C PEG_TXP9_C PEG_TXN9_C PEG_TXP8_C PEG_TXN8_C PEG_TXP7_C PEG_TXN7_C PEG_TXP6_C PEG_TXN6_C PEG_TXP5_C PEG_TXN5_C PEG_TXP4_C PEG_TXN4_C PEG_TXP3_C PEG_TXN3_C PEG_TXP2_C PEG_TXN2_C PEG_TXP1_C PEG_TXN1_C PEG_TXP0_C PEG_TXN0_C

PCIE_TXP0_C PCIE_TXN0_C

PCIE_TXP2_C PCIE_TXN2_C

A_TXP0_C A_TXN0_C A_TXP1_C A_TXN1_C A_TXP2_C A_TXN2_C A_TXP3_C A_TXN3_C

NB_PCIECALRP NB_PCIECALRN

C669 SW@0.1u/10V_4C669 SW@0.1u/10V_4 C672 SW@0.1u/10V_4C672 SW@0.1u/10V_4 C662 SW@0.1u/10V_4C662 SW@0.1u/10V_4 C666 SW@0.1u/10V_4C666 SW@0.1u/10V_4 C657 SW@0.1u/10V_4C657 SW@0.1u/10V_4 C659 SW@0.1u/10V_4C659 SW@0.1u/10V_4 C652 SW@0.1u/10V_4C652 SW@0.1u/10V_4 C654 SW@0.1u/10V_4C654 SW@0.1u/10V_4 C641 SW@0.1u/10V_4C641 SW@0.1u/10V_4 C640 SW@0.1u/10V_4C640 SW@0.1u/10V_4 C643 SW@0.1u/10V_4C643 SW@0.1u/10V_4 C642 SW@0.1u/10V_4C642 SW@0.1u/10V_4 C645 SW@0.1u/10V_4C645 SW@0.1u/10V_4 C644 SW@0.1u/10V_4C644 SW@0.1u/10V_4 C625 SW@0.1u/10V_4C625 SW@0.1u/10V_4 C624 SW@0.1u/10V_4C624 SW@0.1u/10V_4 C647 SW@0.1u/10V_4C647 SW@0.1u/10V_4 C646 SW@0.1u/10V_4C646 SW@0.1u/10V_4 C627 SW@0.1u/10V_4C627 SW@0.1u/10V_4 C626 SW@0.1u/10V_4C626 SW@0.1u/10V_4 C649 SW@0.1u/10V_4C649 SW@0.1u/10V_4 C648 SW@0.1u/10V_4C648 SW@0.1u/10V_4 C631 SW@0.1u/10V_4C631 SW@0.1u/10V_4 C628 SW@0.1u/10V_4C628 SW@0.1u/10V_4 C630 SW@0.1u/10V_4C630 SW@0.1u/10V_4 C629 SW@0.1u/10V_4C629 SW@0.1u/10V_4 C638 SW@0.1u/10V_4C638 SW@0.1u/10V_4 C637 SW@0.1u/10V_4C637 SW@0.1u/10V_4 C633 SW@0.1u/10V_4C633 SW@0.1u/10V_4 C621 SW@0.1u/10V_4C621 SW@0.1u/10V_4 C650 SW@0.1u/10V_4C650 SW@0.1u/10V_4 C639 SW@0.1u/10V_4C639 SW@0.1u/10V_4

C658 0.1u/10V_4C658 0.1u/10V_4 C655 0.1u/10V_4C655 0.1u/10V_4

C651 0.1u/10V_4C651 0.1u/10V_4 C653 0.1u/10V_4C653 0.1u/10V_4

T107T107 T108T108

C676 0.1u/10V_4C676 0.1u/10V_4 C677 0.1u/10V_4C677 0.1u/10V_4 C673 0.1u/10V_4C673 0.1u/10V_4 C674 0.1u/10V_4C674 0.1u/10V_4 C668 0.1u/10V_4C668 0.1u/10V_4 C670 0.1u/10V_4C670 0.1u/10V_4 C661 0.1u/10V_4C661 0.1u/10V_4 C665 0.1u/10V_4C665 0.1u/10V_4

R154 1.27K/F_4R154 1.27K/F_4 R147 2K/F_4R147 2K/F_4

+1.1V

PEG_TXP15 PEG_TXN15 PEG_TXP14 PEG_TXN14 PEG_TXP13 PEG_TXN13 PEG_TXP12 PEG_TXN12 PEG_TXP11 PEG_TXN11 PEG_TXP10 PEG_TXN10 PEG_TXP9 PEG_TXN9 PEG_TXP8 PEG_TXN8 PEG_TXP7 PEG_TXN7 PEG_TXP6 PEG_TXN6 PEG_TXP5 PEG_TXN5 PEG_TXP4 PEG_TXN4 PEG_TXP3 PEG_TXN3 PEG_TXP2 PEG_TXN2 PEG_TXP1 PEG_TXN1 PEG_TXP0 PEG_TXN0

PCIE_TX1+ [26]

PCIE_TX1- [26]

PCIE_TXP2 [27] PCIE_TXN2 [27]

A_TXP0 [11] A_TXN0 [11] A_TXP1 [11] A_TXN1 [11] A_TXP2 [11] A_TXN2 [11] A_TXP3 [11] A_TXN3 [11]

PEG_RXN[15:0][16] PEG_RXP[15:0][16]

PEG_RXN[15:0] PEG_RXP[15:0]

Close to North Bridge

INT. HDMI

PEG_TXP15_C PEG_TXN15_C PEG_TXP14_C PEG_TXN14_C PEG_TXP13_C PEG_TXN13_C PEG_TXP12_C PEG_TXN12_C

To LAN

TO WLAN-2

PEG_TXN[15:0] PEG_TXP[15:0]

PEG_TXP15_C [25] PEG_TXN15_C [25] PEG_TXP14_C [25] PEG_TXN14_C [25] PEG_TXP13_C [25] PEG_TXN13_C [25] PEG_TXP12_C [25] PEG_TXN12_C [25]

PEG_TXN[15:0] [16] PEG_TXP[15:0] [16]

B B

RS880 Display Port Support (muxed on GFX)

DP0

DP1

A A

5

GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet of

4

3

2

Date: Sheet

RS880M-PCIE I/F 2/5

Wednesday, May 27, 2009

849

1

849

1A

of

5

hDƵƐĞϭϰϬŽŚŵϭй ŝƐĐƌĞƚĞƵƐĞϭϯϯŽŚŵϭй EŽƚĞKŶůǇĨŽƌZ^ϴϴϬƐĞƌŝĞƐϭϭ^/ĞƌƌĂƚĂ

R126 4.7K_4R126 4.7K_4 R127 4.7K_4R127 4.7K_4

D D

For Check list JTAG

R434 *4.7K_4R434 *4.7K_4 R153 *4.7K_4R153 *4.7K_4

+3V

R433 *4.7K_4R433 *4.7K_4 R141 *4.7K_4R141 *4.7K_4

+3V

NBGFX_CLKP NBGFX_CLKN

NB_PWRGD_IN INT_EDIDDATA INT_EDIDCLK HDMI_DDC_DATA

Only for UMA

VGA (Not applicable to RX881)

For A11 version

INT_CRT_VSYNC

INT_CRT_HSYNC

+NB_CORE_ON

RS880_AUX_CAL

CLK_SBLINKP

CLK_SBLINKN

R158 3K_4R158 3K_4

R168 *SP@3K_4R168 *SP@3K_4 R166 SIDE@3K_4R166 SIDE@3K_4

RS780/RX780/RS880

R436 2K/F_4R436 2K/F_4

R145 *150/F_4R145 *150/F_4

+3V

A09

R119 *SP_A11@49.9/F_4R119 *SP_A11@49.9/F_4 R116 *SP_A11@49.9/F_4R116 *SP_A11@49.9/F_4

B2-TEST

C C

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. RS880M

1 Disable

B B

A A

0 Enable

RS880M: Enables Side port memory

RS880M:INT_CRT_HSYNC Selects if Memory SIDE PORT is avai lable or not

1 = Memory Side port Not available 0 = Memory Side port av ailable Register Readback of strap: NB_CLKCFG: CLK_TOP_SPARE_D[1]

For extrnal EEPROM Debug only

Display Port interface from PCIeGraphics (RS880/rs880M only)

5

4

+3V_AVDD_NB

110mA

http://hobi-elektronika.net

C05

INT_CRT_RED[24] INT_CRT_GRE[24] INT_CRT_BLU[24]

NB_PWRGD_IN[12,15]

B2-TEST D06

RS880M --- ADD

+3V

PBY160808T-221Y-N

+3V

4

+1.8V

R579

R579 300_4

300_4

PBY160808T-221Y-N

+1.8V

A41

L36

+1.8V

PBY160808T-221Y-N

R438 IV@140/F_4R438 IV@140/F_4 R440 150/F_4R440 150/F_4 R442 150/F_4R442 150/F_4

INT_CRT_HSYNC[24] INT_CRT_VSYNC[24]

INT_DDCDATA[24] INT_DDCCLK[24]

R160 715/F_6R160 715/F_6

A_RST# _SB[11,24,34]

CLK_NB_HTREFP_PR[11] CLK_NB_HTREFN_PR[11]

CLK_NB_REF_CLKP[11] CLK_NB_REF_CLKN[11]

CLK_SBLINKP[11] CLK_SBLINKN[11]

INT_EDIDDATA[24] INT_EDIDCLK[24]

HDMI_DDC_DATA[25]

HDMI_DDC_CLK[25]

A10

+NB_CORE_ON[39]

A41

L27

C300

2.2u/6.3V_6

R174 *Short_4R174 *Short_4

C312

0.1u/10V_4

C335

2.2u/6.3V_6

A41

L22

A41

L34

+1.8V_AVDDDI_NB

20mA

+1.8V_AVDDQ_N B

4mA

B03

INT_CRT_RED INT_CRT_GRE INT_CRT_BLU

INT_CRT_HSYNC INT_CRT_VSYNC

DAC_RSET_NB +1.1V_PLLVDD

+1.8V_PLLVDD18

+1.8V_VDDA18HTPLL

65mA

+1.8V_VDDA18PCIEPLL

20mA

NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP

NBGFX_CLKP NBGFX_CLKN

GPP_REFCLKP

T69T69

GPP_REFCLKN

T70T70

CLK_SBLINKP CLK_SBLINKN

INT_EDIDDATA INT_EDIDCLK

HDMI_DDC_DATA

AUX1P

T96T96

AUX1N

T72T72

+NB_CORE_ON

RS880_AUX_CAL

T17T17

AVDD-DAC Analog not applicable to RX780

+3V_AVDD_NB

C03

C485

C485 1u/6.3V_4

1u/6.3V_4

+1.8V_AVDDDI_NB

AVDDI-DAC Digital not applicable to RX780

+1.8V_AVDDQ_N B

AVDDQ-DAC Bandgap Reference not applicable to RX780

20mils width

+1.8V_VDDA18PCIEPLL

VDDA18PCIEPLL -PCIE PLL

C268

2.2u/6.3V_6

20mils width

+1.8V_VDDA18HTPLL

VDDA18HTPLL -HT LINK PLL

C329

2.2u/6.3V_6

3

U28C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PW M_GPIO6)

E8

DAC_SDA(PCE_TCALRN)

F8

DAC_SCL(PCE_RCALRN)

G14

DAC_RSET(PW M_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_R EFCLKN)

A9

I2C_DATA

B9

I2C_CLK

B8

DDC_DATA/AUX0N(NC)

A8

DDC_CLK/AUX0P(NC)

B7

AUX1P(NC)

A7

AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS880M_A11

A41

L61

+1.1V

+1.8V

3

L61

PBY160808T-221Y-N

A41

L32

PBY160808T-221Y-N

C324

C324 10U/6.3V_8

10U/6.3V_8

CPU_LDT_STOP#[2,11]

CPU_LDT_REQ#[2,11]

ALLOW_LDTSTOP[2,11]

2

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

HPD(NC)

TESTMODE

4

A11

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

SUS_STAT#_NB

D12 AE8

AD8

TEST_EN

D13

+1.8V

R85

2.2K_4

NB_LDT_STOP#

R185 1K_4R185 1K_4

NB_ALLOW_LDTSTOP

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

R172

1.82K/F_4

A41

+1.8V

L33

PBY160808T-221Y-N

L62

PBY201209T-221Y-N

DDR3 based CPU : Level shifted to 1.8 V on the Northbridge side using an open-drain buffer and pulled up to 1.8V_S0 through a 2.2k Ohm 5% resistor on the Northbridge side.

+1.8V

2

PART 3 OF 6

TXOUT_U1P(PCIE_RESET _GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET _GPIO5)

CRT/TVOUT

PM

CLOCKs PLL PWR

MIS.

C679

2.2u/6.3V_6

The RS880 family does not support CLMC architecture The LDTREQ# connection from the CPU to ALLOW_LDTSTOP of the Northbridge is no longer required.

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1 )

TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET _GPIO1)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC)

LVTM

+1.8V_PLLVDD18

VDDLT33_1(NC) VDDLT33_2(NC)

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

TMDS_HPD(NC)

TVCLKIN(PW M_GPIO5)

THERMALDIODE_P THERMALDIODE_N

+1.1V_PLLVDD

PLLVDD - Graphics PLL not applicable to RX780

PLLVDD18 - Graphics PLL not applicable to RX780

C327

2.2u/6.3V_6

+1.8V

+

U8

Open

2

Drain

-

74LVC07+-

74LVC07

3 5

LA_DATAP0 [24] LA_DATAN0 [24] LA_DATAP1 [24] LA_DATAN1 [24] LA_DATAP2 [24] LA_DATAN2 [24]

LA_CLK [24]

LA_CLK# [24]

INT_LVDS_DIGON [24] INT_DPST_PWM [24] INT_LVDS_BLON [24]

R88

R88 *3K_4

*3K_4

A41

15mA

300mA

2.2u/6.3V_6

4.7u/6.3V_6

C683

INT_HDMI_HPD [25]

SUS_STAT# [12]

VDDLTP18 - LVDS or DVI/HDMI PLL

C318

not applicable to RX780

C680

0.1u/10V_4

1

+1.8V_VDDLTP18_NB

+1.8V_VDDLT_18_NB

VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

RS880M-SYSTEM I/F 3/5

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

1

10

1A

of

949

5

4

3

2

1

http://hobi-elektronika.net

J4

R7

L1

L2

L4

L7

M6

N4

P6

R1

R2

R4

V7

U4

V8

V6

W1

W2

W4

W7

W8

Y6

AA4

AB5

AB1

AB7

AC3

AC4

AE1

AE4

AB2

VSSAPCIE38

VSSAPCIE39

VSSAPCIE40

VSS20

VSS21

VSS22

VSS23

V12

U11

U15

W11

VSS24

W15

AE14

VSS1

VSS25

AC12

D11

VSS2

VSS26

AA14

VSS3G8VSS4

VSS27

Y18

D5

VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9

VSSAHT3

VSSAHT4

VSSAHT5

VSSAHT6

VSSAHT7

J22

E22

H19

G22

G24

G25

H7

VSSAPCIE10

VSSAHT8

VSSAHT9

VSSAHT10

L17

L22

VSSAPCIE11

VSSAPCIE12

VSSAPCIE13

VSSAPCIE14

VSSAHT11

VSSAHT12

VSSAHT13

VSSAHT14

L24

L25

N22

M20

VSSAPCIE15

VSSAPCIE16

VSSAPCIE17

VSSAHT15

VSSAHT16

VSSAHT17

P20

R19

R22

R24

VSSAPCIE18

VSSAPCIE19

VSSAPCIE20

VSSAPCIE21

VSSAHT18

VSSAHT19

VSSAHT21

VSSAHT20

V19

R25

U22

H20

VSSAPCIE22

VSSAPCIE23

VSSAPCIE24

VSSAPCIE25

VSSAHT22

VSSAHT23

VSSAHT24

VSSAHT25

Y21

W22

W24

W25

VSSAPCIE26

VSSAPCIE27

VSSAPCIE28

VSSAPCIE29

VSSAHT26

VSSAHT27

VSS11

L12

M14

AD25

VSSAPCIE30

VSSAPCIE31

VSSAPCIE32

VSSAPCIE33

VSSAPCIE34

VSSAPCIE35

VSSAPCIE36

GROUND

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

T12

P12

P15

N13

R11

R14

VSSAPCIE37

VSS19

U14

U28F

D D

VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4

PART 6/6

VSSAHT1

VSSAHT2

A25

D23

E14

VSS28

AB11

E15

VSS5

VSS29

AB15

J15

VSS6

VSS30

AB17

J12

VSS7

VSS31

AB19

K14

AE20

M11

VSS8

VSS9

VSS32

VSS33

AB21

L15

VSS10

VSS34

K11

PIN NAME

RX881/RS880 POWER DIFFERENCE TABLE

VDDHT VDDHTRX VDDHTTX VDDA18PCIE

VDD18_MEM VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18

RX881

+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 GND +1.1V +1.1V +1.8V +1.1V GND +3.3V

RS880

+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V

+1.1V

+1.8V/1.5V

+3.3V +1.8V+1.8V

PIN NAME IOPLLVDD

AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33

RX881 RS880

+1.1V

GND

+3.3VAVDD GND +1.8V GND +1.8V GND

+1.1V

+1.8V

GND

+1.8V

GND

+1.8V

GND

NC

+1.1V 2A for RS880M +1.1V 1.3A for RX881

+1.1V

C C

0.6A

0.7A

+1.1V 2A for RS880M +1.2V 0.4A for Rx881

+1.1V

L35 *Short_8L35 *Short_8

B2-TEST

+1.8V 1A for RS780M+SB700

B B

+1.8V 1A for RX881

+1.8V

PBY201209T-221Y-N

2A

L24

A41

0.7A

L31 *Short_8L31 *Short_8

L37 *Short_8L37 *Short_8

C333

4.7u/6.3V_6

C299

4.7u/6.3V_6

+1.8V

C331

0.1u/10V_4

C297

4.7u/6.3V_6

R136 *Short_6R136 *Short_6

C317

4.7u/6.3V_6

C362

4.7u/6.3V_6

C292

0.1u/10V_4

C321

0.1u/10V_4

C338

0.1u/10V_4

C337

0.1u/10V_4

C295

0.1u/10V_4

25mA

VDD18-RS880 I/O Transform

R171 SIDE@0_6R171 SIDE@0_6

A A

+1.8V

25mA

C322

0.1u/10V_4

C340

0.1u/10V_4

C332

0.1u/10V_4

C287

0.1u/10V_4

C286

C286 1U/10V_4

1U/10V_4

C835

C835 SP@1U/10V_4

SP@1U/10V_4

+1.1V_VDDHT

C323

0.1u/10V_4

+1.1V_VDDHTRX

C334

0.1u/10V_4

+1.1V_VDDHTTX

C341

0.1u/10V_4

+1.8V_VDDA18PCIE

C301

0.1u/10V_4

+1.8V_VDDG18_NB

+1.8V_VDD18_MEM

U28E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y2

0

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDDG18_1(VDD18_1)

G9

VDDG18_2(VDD18_2)

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

RS880M_A11

A09

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11

POWER

VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDDG33_1(NC) VDDG33_2(NC)

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

+1.1V_VDD_PCIE

C243

0.1u/10V_4

C315

0.1u/10V_4

C316

0.1u/10V_4

+1.5V_VDD_MEM

SIDE@0.1u/10V_4

+3V_VDDG33

C302

0.1u/10V_4

C291

0.1u/10V_4

C311

0.1u/10V_4

SIDE@0.1u/10V_4

C832

C303

0.1u/10V_4

2.5A

C293

C293 1U/10V_4

1U/10V_4

C310

0.1u/10V_4

C306

C308

0.1u/10V_4

C306

0.1u/10V_4

C831 W/O side port

-->stuff 0 Ohm CS00002JB38

C833

SP@0.1u/10V_4

R169 *Short_4R169 *Short_4

SP@0.1u/10V_4

VDD33 - 3.3V I/O Not applicable to RX780

C294

C294 1U/10V_4

1U/10V_4

C307

0.1u/10V_4

10U/6.3V_8

60mA

VDDPCIE - PCIE-E Main power

R115 *Short_8R115 *Short_8

C290

4.7u/6.3V_6

0.95~1.1V 10A

VDDC - Core Logic power

C314

10U/6.3V_8

C305

SIDE@0.1u/10V_4

C836

C831

C836

+3V

+1.1V

NB_CORE

A09

L74

SIDE@0_8

C834

C834 SIDE@4.7u/6.3V_6

SIDE@4.7u/6.3V_6

+1.5V

VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform

11

+1.1V +1.8V NB_CORE

+1.1V [2,7,8,9,14,38,44] +1.8V [7,9,15,24,37,42,43,44] NB_CORE [39,44]

5

C835 W/O side port

-->stuff 0 Ohm CS00002JB38

4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Date: Sheet of

3

2

Date: Sheet of

RS880M-POWER5/5

Wednesday, May 27, 2009

10 49

1

10 49

1A

of

5

4

3

2

1

C350 180P/50V_4C350 180P/50V_4

MINI-PCIE,Card reader

D D

NB & EC

PLACE THESE PCIE AC COUPLING CAPS CLOSE TO SB820

PCIE_RST#_SB_R[27,30]

A_RST#_SB[9,24,34]

A_RXP0[8] A_RXN0[8] A_RXP1[8] A_RXN1[8] A_RXP2[8] A_RXN2[8] A_RXP3[8] A_RXN3[8]

A_TXP0[8] A_TXN0[8] A_TXP1[8] A_TXN1[8] A_TXP2[8] A_TXN2[8] A_TXP3[8] A_TXN3[8]

+1.1V_PCIE_VDDR

+3V_S5

R580

R580 33_4

A_RST#_AND[16,26,27]

VGA,LAN& MINI-IPCIE

C C

33_4

CLK_PCIE_VGAP[16]

CLK_PCIE_VGAN[16]

C812 0.1u/10V_4C812 0.1u/10V_4

A_RST#_SB_AND

C813

100p/50V_4

5

U36

3

2 4

2 1

TC7SH08FU

4

RP11 SGN@0_4P2R_4RP11 SGN@0_4P2R_4

UMA don't stuff

B B

+3V

C533 0.1u/10V_4C533 0.1u/10V_4

MEM_1V5[13]

VDDR_1.05_EN

VDDR_1.05_EN: 1 : VDDR =1.05V 0 : VDDR = 0.9V (Default)

RTC_X1

23

Y8

32.768KHZ

A A

R546

R546 *20M_6

*20M_6

4

R547 20M_6R547 20M_6

C794

C794 18P/50V_4

18P/50V_4

RTC_X2

1

C795

C795 18P/50V_4

18P/50V_4

5

2 1

R303 *0_4R303 *0_4

GN_CLK_VGA_27M_NONSS[16]

A59

5

4

3

U18

TC7SH08FU

C730 SGN@22P/50V_4C730 SGN@22P/50V_4

Y5

SGN@25MHZ

C731 SGN@22P/50V_4C731 SGN@22P/50V_4

R345 33_4R345 33_4

C735 0.1u/10V_4C735 0.1u/10V_4 C736 0.1u/10V_4C736 0.1u/10V_4 C732 0.1u/10V_4C732 0.1u/10V_4 C733 0.1u/10V_4C733 0.1u/10V_4 C728 0.1u/10V_4C728 0.1u/10V_4 C729 0.1u/10V_4C729 0.1u/10V_4 C726 0.1u/10V_4C726 0.1u/10V_4 C727 0.1u/10V_4C727 0.1u/10V_4

R481 590/F_4R481 590/F_4 R279 2K/F_4R279 2K/F_4

A_RST#_SB

SB_GPIO_PCIE_RST# [12]

CLK_SBLINKP[9] CLK_SBLINKN[9]

CLK_NB_REF_CLKP[9] CLK_NB_REF_CLKN[9]

CLK_NB_HTREFP_PR[9] CLK_NB_HTREFN_PR[9]

CLK_CPU_BCLKP_PR[2] CLK_CPU_BCLKN_PR[2]

1 3

CLK_PCIE_LOM[26] CLK_PCIE_LOM#[26]

CLK_PCIE_WLANP_2[27] CLK_PCIE_WLANN_2[27]

R317

R317 33_4

33_4

A16

21

R480

R480 SGN@1M_4

SGN@1M_4

PCIE_RST#_SB A_RST#_SB

PCIE_CALRP_SB PCIE_CALRN_SB

SLT_GFX_CLKP SLT_GFX_CLKN

VDDR_OPT [43]

25M_X1

25M_X2

4

A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C

http://hobi-elektronika.net

U34A

P1

PCIE_RST#

L1

A_RST#

AD26

A_TX0P

AD27

A_TX0N

AC28

A_TX1P

AC29

A_TX1N

AB29

A_TX2P

AB28

A_TX2N

AB26

A_TX3P

AB27

A_TX3N

AE24

A_RX0P

AE23

A_RX0N

AD25

A_RX1P

AD24

A_RX1N

AC24

A_RX2P

AC25

A_RX2N

AB25

A_RX3P

AB24

A_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y2

9

GPP_TX1P

Y2

8

GPP_TX1N

Y2

6

GPP_TX2P

Y2

7

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y2

1

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W2

3

GPP_RX2P

V24

GPP_RX2N

W2

4

GPP_RX3P

W2

5

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

SB820M_A12

Part 1 of 5

SB800

PCICLK4/14M_OSC/GPO39

PCI CLKS

PCI EXPRESS INTERFACES

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT3#/CLK_REQ7#/GPIO46

LDRQ1#/CLK_REQ6#/GPIO49

CLOCK GENERATOR

ALLOW_LDTSTP/DMA_ACTIVE#

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

PCI INTERFACELPC

REQ1#/GPIO40

GNT1#/GPO44 GNT2#/GPO45

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

SERIRQ/GPIO48

PROCHOT#

CPU

RTC

INTRUDER_ALERT#

VDDBT_RTC_G

3

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

GNT0#

CLKRUN#

LOCK#

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

LDT_PG LDT_STP# LDT_RST#

32K_X1 32K_X2

RTCCLK

W2 W1 W3 W4 Y1

V2

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19

G21 H21 K19 G22 J24

C1 C2 D2

B2 B1

PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4

SB820_MEMHOT#

R594 *10K_4R594 *10K_4

CLKRUN#_R

LPC_CLK0 LPC_CLK1

LDRQ0#_SB LDRQ1#_SB

RTC_X1 RTC_X2

INTRUDER_ALERT#

T59T59

D23

*SW@RB501V-40

VDDR_1.05_EN

T46T46

T44T44 T55T55

R331 *8.2K_4R331 *8.2K_4

A58

R505 22_4R505 22_4 R499 22_4R499 22_4

T34T34 T42T42

12

G2

G2 *SHORT

*SHORT

_PAD1

PCI_CLK1 [15] PCI_CLK2 [15] PCI_CLK3 [15] PCI_CLK4 [15]

PE_GPIO2_R

21

BOARD_ID0 [13] BOARD_ID1 [13] BOARD_ID2 [13] BOARD_ID3 [13] BOARD_ID4 [13]

AD23 [15]

AD24 [15] AD25 [15] AD26 [15] AD27 [15]

D17

SW@RB501V-40

+3V

LPC_LAD0 [27,34] LPC_LAD1 [27,34] LPC_LAD2 [27,34] LPC_LAD3 [27,34]

LPC_LFRAME# [27,34]

IRQ_SERIRQ [34]

ALLOW_LDTSTOP [2,9]

CPU_PWRGD_SVID_REG [2,37]

CPU_LDT_STOP# [2,9]

CPU_LDT_RST# [2]

RTC_CLK [34]

+AVBAT

C793

0.1u/10V_4

+3V +3V

21

2

+AVBAT

20MIL

C792

1U/10V_4

Change from 0ohm to 1K for safty issue

A13

R339

R330

*2.2K_4

2.2K_4

2

Q26

*MMBT3904

1 3

+3V

R524

SW@2K/F_4

PE_GPIO2_R

PCH_ODD_EN [28] DGPU_VRON [12,40,41]

CLKRUN# [34]

dGPU_PWROK [19]

PE_GPIO0 [16]

C747

C747 *5.6p/50V_4

*5.6p/50V_4

INTRUDER_ALERT# Left not connected (Southbridge has 50-kohm internal pull-up to VBAT).

R545 *1M/F_4R545 *1M/F_4

20MIL

+BAT

CPU_MEMHOT# [2,5,6]

A26

A12

C750

C750 *22p/50V_4

*22p/50V_4

A62

R286*10K/F_4 R286*10K/F_4

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

R582 499/F_4R582 499/F_4

R573 10_4R573 10_4

20MIL

+3VRTC

BAT1

BAT_CONN

PE_GPIO2_R [24]

LPC_CLK0 [15] LPC_CLK1 [15] PCLK_DEBUG [27] CLK_PCI_775 [34]

for EMI suggestion

+3V_S5

CPU_PROCHOT# [2]

352-(&7=5

SB820-PCIE/PCI/CPU/LPC 1/4

R559

R559 1K/F_4

1K/F_4

12

+AVBAT

20MIL

+3VRTC_1

D30

D30 RB500V-40

RB500V-40 D28

D28 RB500V-40

RB500V-40

+VCCRTC_2

20MIL

1

12

+3VPCU

of

11 49

1A

5

+3V_S5

NC only ,Can't be install

R352 *2.2K_4R352 *2.2K_4 R350 *2.2K_4R350 *2.2K_4 R347 *2.2K_4R347 *2.2K_4

D D

C C

B B

A A

+3V

SCL0/SDATA0 is 3V tolerance AMD datasheet define it

R288 2.2K_4R288 2.2K_4 R287 2.2K_4R287 2.2K_4

+3V_S5

SCL1/SDATA1 is 3V/S5 tolerance AMD datasheet define it

R348 10K_4R348 10K_4 R346 10K_4R346 10K_4

+3V_S5

SCL2/SDATA2 is 3V/S5 tolerance AMD datasheet define it

R290 10K_4R290 10K_4 R283 10K_4R283 10K_4

+3V

R338 4.7K_4R338 4.7K_4

dGPU_VRON

2ms

MXM_PWR_EN

MXM_PWREN[19]

DGPU_VRON[11,40,41]

>1mS delay is required between all MXM power rail stable and MXM_PWREN(enables the module internal power)

+3V

A61

R474 8.2K_4R474 8.2K_4 R486 8.2K_4R486 8.2K_4

ACZ_SDOUT

ACZ_SYNC

ACZ_BCLK

ACZ_RST# ACZ_SDIN0

If the VDDIO_AZ_S power rail is configured for 1.5V_S5 then AZ_SDIN[3:0] can not be connected to 3.3-V devices.

SB_TEST0 SB_TEST1 SB_TEST2

PCLK_SMB PDAT_SMB

MXM_PWR_EN

CLK_PCIE_LAN_REQ# CLK_PCIE_2_REQ#

R570 33_4R570 33_4

R552 33_4R552 33_4

R569 33_4R569 33_4

R554 33_4R554 33_4

5

Clock gen/Robson/TV tuner /DDR2/DDR2 thermal/Accelerometer

SB_SMBCLK1 SB_SMBDATA1

SB_SCLK2 SB_SDATA2

SUS_STAT#

D19

SW@RB501V-40

D18

D18 *SW@RB501V-40

*SW@RB501V-40

C815 *10P/50V_4C815 *10P/50V_4

C800 *10P/50V_4C800 *10P/50V_4

C814 *10P/50V_4C814 *10P/50V_4

+3V

R307

R307 SW@4.7K_4

SW@4.7K_4

21

SW@0.1u/10V_4

21

A14

ACZ_SDOUT_AUDIO [29]

ACZ_SYNC_AUDIO [29]

ACZ_BITCLK_AUDIO [29]

ACZ_RST#_AUDIO [29]

ACZ_SDIN0 [29]

B2-TEST C04

C538

ACZ_SDOUT[15]

4

http://hobi-elektronika.net

SUSB#[34] SUSC#[34]

DNBSWON#[34]

SB_PWRGD_IN[15]

SUS_STAT#[9]

SIO_A20GATE[34]

SIO_RCIN#[34]

SIO_EXT_SMI#[34] SIO_EXT_SCI#[34]

PCIE_WAKE#[26] USBP12- [31]

CPU_THERMTRIP#[2]

NB_PWRGD_IN[9,15]

ICH_RSMRST#[34]

SB_GPIO_PCIE_RST#[11]

CLK_PCIE_LAN_REQ#[26]

SPKR[29] PCLK_SMB[5,6,26,27,46] PDAT_SMB[5,6,26,27,46]

CLK_PCIE_2_REQ#[27]

VGA_REQ#[17]

SP_DDR3_RST#[7]

OC_7#[31]

OC_6#[31]

PM_THERM#[2,4,33]

OC_4#[31]

R306 *0_4R306 *0_4

R149 *Short_4R149 *Short_4

HD audio interface is +3VS5 voltage

R555 *10K/F_4R555 *10K/F_4 R337 *10K/F_4R337 *10K/F_4

R336 *10K/F_4R336 *10K/F_4 R571 *10K/F_4R571 *10K/F_4 R327 *10K/F_4R327 *10K/F_4

+3V_S5

R553 10K_4R553 10K_4 R322 10K_4R322 10K_4

R558 10K_4R558 10K_4

D03

R343 10K_4R343 10K_4

R344 10K_4R344 10K_4

CN24

*S/W_JTAG_DEBUG

4

+3V_S5

1 2 3 4 5 6 7 8

SB_JTAG_TCK SB_JTAG_TDO SB_JTAG_TDI SB_TEST1

SB_JTAG_RST#

SB JTAG

T94T94

T95T95 T58T58

T37T37

T41T41

T35T35

SB_TEST0 SB_TEST1 SB_TEST2

LANLINK_STATE#

SYS_RST# PCIE_WAKE# IR_RX1 SB_THERMTRIP#

MXM_PWR_EN SB_GPIO59

PCLK_SMB PDAT_SMB SB_SMBCLK1 SB_SMBDATA1

VGA_REQ#_GPIO61

SB_JTAG_TDO SB_JTAG_TCK SB_JTAG_TDI SB_JTAG_RST#

ACZ_BCLK ACZ_SDOUT ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 ACZ_SDIN3 ACZ_SYNC ACZ_RST#

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR ADP_PRES0

B2-TEST

DEL C816

AD21 AE21

AC19

AD19 AA16 AB21 AC18 AF20 AE19 AF19 AD22 AE22

AH21 AB18

AJ21

AA20

G29 D27

E27

J29

E23 E24 F21

F28 F29

3

+3V_S5[11,13,14,15,24,26,31,32,36,44] +3V[2,4,5,6,9,10,11,13,14,15,19,24,25,27,29,30,32,33,34,36,37,38,39,41,42,43,44,46]

U34D

J2

PCI_PME#/GEVENT4#

K1

RI#/GEVENT22#

D3

SPI_CS3#/GBE_STAT1/GEVENT21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_BTN#

H5

PWR_GOOD

G6

SUS_STAT#

B3

TEST0

C4

TEST1/TMS

F6

TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1#

K2

LPC_PME#/GEVENT3# LPC_SMI#/GEVENT23#

H2

GEVENT5#

J1

SYS_RESET#/GEVENT19#

H6

WAKE#/GEVENT8#

F3

IR_RX1/GEVENT20#

J6

THRMTRIP#/SMBALERT#/GEVENT2# NB_PWRGD

G1

RSMRST# CLK_REQ4#/SATA_IS0#/GPIO64

CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47

F5

SCL1/GPIO227

F4

SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61

E1

IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOWN#/GPIO51

H4

DDR3_RST#/GEVENT7#

D5

GBE_LED0/GPIO183

D7

GBE_LED1/GEVENT9#

G5

GBE_LED2/GEVENT10#

K3

GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN

H3

BLINK/USB_OC7#/GEVENT18#

D1

USB_OC6#/IR_TX1/GEVENT6#

E4

USB_OC5#/IR_TX0/GEVENT17#

D4

USB_OC4#/IR_RX0/GEVENT16#

E8

USB_OC3#/AC_PRES/TDO/GEVENT15#

F7

USB_OC2#/TCK/GEVENT14#

E7

USB_OC1#/TDI/GEVENT13#

F8

USB_OC0#/TRST#/GEVENT12#

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0/GPIO167

M2

AZ_SDIN1/GPIO168

M1

AZ_SDIN2/GPIO169

M4

AZ_SDIN3/GPIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL/RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL/TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST#

V7

GBE_PHY_INTR PS2_DAT/SDA4/GPIO187

PS2_CLK/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 FC_RST#/GPO160

PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192

SB820M_A12

+3V_S5 +3V

SB800

Part 4 of 5

GBE LAN

3

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

GPIO

USB OC

EC_PWM0/EC_TIMER0/GPIO197 EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2/EC_TIMER2/GPIO199

HD AUDIO

EC_PWM3/EC_TIMER3/GPIO200

EMBEDDED CTRL

USB_RCOMP

USB_FSD1P/GPIO186

USB_FSD0P/GPIO185

USB_HSD13P USB_HSD13N

USB 1.1 USB MISCEMBEDDED CTRL

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB 2.0

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSI_0/GPIO201

KSI_1/GPIO202

KSI_2/GPIO203

KSI_3/GPIO204

KSI_4/GPIO205

KSI_5/GPIO206

KSI_6/GPIO207

KSI_7/GPIO208

KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217

KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226

USB_FSD1N

USB_FSD0N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

2

USBCLK/41M_25M_48M_OSC pin is CLK input pin when EXT CLKGEN mode. It is output CLK source when INT CLKGEN mode.

A10

USB_RCOMP_SB

G19

J10 H11

USB_FDS12P

H9

USB_FSD12N

J8 B12

A12 F11

E11 E14

E12 J12

J14

A13

B13

D13

C13

G12

G14

G16

G18

D16

C16

B14

A14

E18

E16

J16

J18

B17

A17

A16

B16

SB_SCLK2

D25

SB_SDATA2

F23

SB_GPIO195

B26

SB_GPIO196

E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

2

R293 11.8K/F_6R293 11.8K/F_6

USBP13+ [31] USBP13- [31]

USBP12+ [31]

USBP10+ [30] USBP10- [30]

USBP9+ [31] USBP9- [31]

USBP8+ [31] USBP8- [31]

USBP7+ [27] USBP7- [27]

T61T61 T105T105

USBP1+ [24] USBP1- [24]

USBP0+ [31] USBP0- [31]

SB_GPIO195 SB_GPIO196

T106T106

T47T47 T49T49

h^ďŽĂƌĚ

h^ĐĂƌĚƌĞĂĚĞƌ

>hdKKd,

h^ďŽĂƌĚ

t>ED/E/Z

B2-TEST

h^DZ

KŶďŽĂƌĚh^ĐŽŶŶĞĐƚ

GPIO199 [15] GPIO200 [15]

R489 10K_4R489 10K_4 R275 10K_4R275 10K_4

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet

1

13

SB820-ACPI/GPIO/USB 2/4

1

12 49

1A

of

5

SATA PORT 0,1,2,3 can support AHCI mode

SATA_TX0+[28]

SATA1

D D

SATA ODD

SATA_TX0-[28]

SATA_RX0-[28] SATA_RX0+[28]

SATA_TX1+[28] SATA_TX1-[28]

SATA_RX1-[28] SATA_RX1+[28]

C777 0.01u/16V_4C777 0.01u/16V_4 C775 0.01u/16V_4C775 0.01u/16V_4

C774 0.01u/16V_4C774 0.01u/16V_4 C769 0.01u/16V_4C769 0.01u/16V_4

Signal Name Explanation

SB800 A11: 800 ohm 1% resistor to GND.

SATA_CALRP

P/N:CS18062FB00(806 Ohm) SB800 A12: 1k ohm 1% resistor to GND.

SB800 A11: 931-? 1% resistor to VDDAN_11_SATA.

SATA_CALRN

C C

B B

SB800 A12: TBD-? 1% resistor to VDDAN_11_SATA.

+1.1V_AVDD_SATA

PLACE SATA_CAL RES VERY CLOSE TO BALL OF SB820

R300 SP_A12@1K/F_4R300 SP_A12@1K/F_4 R298 SP_A12@931/F_4R298 SP_A12@931/F_4

SATA_ACT#[32]

C760 GN@22P/50V_4C760 GN@22P/50V_4

A60

C754 GN@22P/50V_4C754 GN@22P/50V_4

+3V_S5

B2-TEST

+3V

Y7

GN@25MHZ

T53T53 T60T60 T56T56 T45T45 T57T57

R302 10K_4R302 10K_4

21

R528 SP@10K_4R528 SP@10K_4 R437 *10K_4R437 *10K_4

SATA_TX0+_C SATA_TX0-_C

SATA_TX1+_C SATA_TX1-_C

SATA_CALRP SATA_CALRN

SB_GPIO164 SB_GPIO163 SB_GPIO162 SB_GPIO165 SB_GPIO161

A05

4

SATA_X1

R507

R507 GN@1M_4

GN@1M_4

SATA_X2

U34B

AH9

AJ9 AJ8

AH8

AH10

AJ10

AG10 AF10

AG12 AF12

AJ12

AH12 AH14

AJ14

AG14 AF14

AG17 AF17

AJ17

AH17

AJ18

AH18 AH19

AJ19

AB14 AA14

AD11

AD16

AC16

J5 E2 K4 K9

G2

SB820M_A12

SIDE_PORT_ID0 SIDE_PORT_ID1

3

http://hobi-elektronika.net

SB800

SATA_TX0P SATA_TX0N

SATA_RX0N SATA_RX0P

SATA_TX1P SATA_TX1N

SATA_RX1N SATA_RX1P

SATA_TX2P SATA_TX2N

SATA_RX2N SATA_RX2P

SATA_TX3P SATA_TX3N

SATA_RX3N SATA_RX3P

SATA_TX4P SATA_TX4N

SATA_RX4N SATA_RX4P

SATA_TX5P SATA_TX5N

SATA_RX5N SATA_RX5P

SATA_CALRP SATA_CALRN

SATA_ACT#/GPIO67

SATA_X1

SATA_X2

SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/GPIO161

R316 SP@10K_4R316 SP@10K_4 R320 10K_4R320 10K_4

SB800

Part 2 of 5

SERIAL ATA

TEMPIN3/TALERT#/GPIO174

HW MONITOR

SPI ROM

FC_FBCLKOUT

FC_FBCLKIN

FC_OE#/GPIOD145

FC_AVD#/GPIOD146

FC_WE#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150

FC_INT1/GPIOD144 FC_INT2/GPIOD147

FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136

FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140

FLASH

FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143

FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173

TEMP_COMM VIN0/GPIO175

VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

HYX

FC_CLK

NC1 NC2

ID0ID1

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

G27 Y2

0

1SAM

WWAN_DET# CPPE_NC1# CRD_REQ1#

TEMPIN0 TEMPIN1 MB_THRMDA_SB SB_GPIO174

SB_GPIO175 SB_GPIO176 SIDE_PORT_ID0 SIDE_PORT_ID1

T80T80 T81T81 T78T78

T75T75 T77T77 T82T82 T76T76 T74T74 T79T79

IF THERE IS NO IDE, TEST

T84T84

POINTS FOR DEBUG BUS

T83T83

IS MANDATORY

T33T33 T86T86 T85T85 T90T90 T88T88 T91T91 T93T93 T92T92 T87T87 T89T89 T97T97 T98T98 T99T99 T101T101 T102T102

T52T52 T48T48 T54T54

MEM_1V5 [11]

A55

+3V

A04

2

BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4

R311 10K_4R311 10K_4

R324 SW@10K_4R324 SW@10K_4

R517 SP@10K_4R517 SP@10K_4

R273 *SP@10K_4R273 *SP@10K_4

R272 *10K_4R272 *10K_4

+1.1V_AVDD_SATA[14]

+3V_S5[11,12,14,15,24,26,31,32,36,44]

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

+1.1V_AVDD_SATA +3V_S5

TEMPIN0 TEMPIN1 MB_THRMDA_SB SB_GPIO174 SB_GPIO175 SB_GPIO176

BOARD_ID0 [11] BOARD_ID1 [11] BOARD_ID2 [11] BOARD_ID3 [11] BOARD_ID4 [11]

R314 *10K_4R314 *10K_4

R323 *IV@10K_4R323 *IV@10K_4

R304 *SP@10K_4R304 *SP@10K_4

R274 SP@10K_4R274 SP@10K_4

R271 10K_4R271 10K_4

1

14

R519 10K_4R519 10K_4 R511 10K_4R511 10K_4 R521 10K_4R521 10K_4 R313 10K_4R313 10K_4 R526 10K_4R526 10K_4 R523 10K_4R523 10K_4

ATI0100

Board ID

DDR3 Sideport Memory Device

Vendor P/N

Hynix

A A

Samsung

5

H5TQ1G63BFR-12C

K4W1G1646E-HC12

STN B/S P/N

AKD5LZGTW04 (64M*16)

AKD5LGGT506 (64M*16)

4

SizeVendor

1GB

BOARD_ID2 GPIO12

0 (WO/Sideport)

1 (W/Sideport)

SIDE_PORT_ID1 GPIO178

0

SIDE_PORT_ID0 GPIO177

0

1

3

0

1

BOARD_ID4 GPIO14

N/A (Default)

N/A

BOARD_ID3 GPIO13

JV51-DN (3-DIMM) (Default)

JM51-DN (2-DIMM)

2

BOARD_ID2 GPIO12

WO/Sideport

W/Sideport (Default)

BOARD_ID1 GPIO11

UMA

Discrete (Default)

Size Document Number Rev

Date: Sheet

Date: Sheet of

BOARD_ID0 GPIO10

14"

15.6" (Default)

352-(&7=5

4XDQWD&RPSXWHU,QF

SATA/IDE/HWM/SPI 3/4

Wednesday, May 27, 2009

1

of

13 49

1A

5

VDDQ--3.3V I/O power

R325 *Short_8R325 *Short_8

+3V

C535

C543

C544

*10U/6.3V_8

D D

*10U/6.3V_8

C543

10U/6.3V_8

0.1u/10V_4

C534

0.1u/10V_4

A41

L46

A41

+3V

L45

+1.1V

UPB201212T-121Y-N_8

C C

+1.1V

+3V_S5

B B

If the VDDIO_AZ_S power rail is configured for

1.5V_S5 then AZ_SDIN[3:0] can not be connected to 3.3-V devices.

+3V_S5

C495

*10U/6.3V_8

A41

L49

L49 UPB201212T-121Y-N_8

UPB201212T-121Y-N_8

A41

L67

PBY160808T-221Y-N

For support USB wakeup-->3V_S5

+1.1V_S5

R315 *Short_6R315 *Short_6

+3V

+1.1V_AVDD_SATA

10U/6.3V_8

+3.3V_VDDAN_USB

L46

PBY160808T-221Y-N

+1.1V_PCIE_VDDR

C502

10U/6.3V_8

1U/10V_4

L54

PBY160808T-221Y-N

C510

C512

0.1u/10V_4

C753

C753 10U/6.3V_8

10U/6.3V_8

L52

PBY160808T-221Y-N

+VDDIO_AZ

C479

C541

2.2u/6.3V_6

C478

0.1u/10V_4

A41

C516

0.1u/10V_4

C531

C531 10U/6.3V_8

10U/6.3V_8

A41

+1.1V_VDDAN_USB

C490

2.2u/6.3V_6

C477

0.1u/10V_4

+3V_VDDPL_SATA

C523

2.2u/6.3V_6

C514

C514 1U/10V_4

1U/10V_4

C511

C511 1U/10V_4

1U/10V_4

C528

2.2u/6.3V_6

4

C539

0.1u/10V_4

43mA

C487

C487 *0.1u/10V_4

*0.1u/10V_4

600mA

C481

0.1u/10V_4

93mA

C524

*0.1u/10V_4

567mA

C513

C513 1U/10V_4

1U/10V_4

658mA

C518

C518 1U/10V_4

1U/10V_4

xx mA

C532

0.1u/10V_4

L53 0_6L53 0_6

AH1

V6

Y19

AE5

AC21

AA2 AB4 AC8 AA7 AA9

AF7

AA19

AF22 AE25 AF24 AC22

AE28

U26

V22

V26

V27

V28

V29

W22 W26

AD14

AJ20 AF18 AH20

AG19

AE18 AD18 AE16

A18 A19 A20 B18 B19

B20 C18 C20 D18 D19 D20

E19

C11 D11

C521

0.1u/10V_4

U34C

SB820M_A12

3

PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.

http://hobi-elektronika.net

VDD-- S/B CORE power

Part 3 of 5

SB800

POWER

+1.1V_USB_PHY_R+1.1V_S5

C520

0.1u/10V_4

SB800

VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12

VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4

VDDPL_33_PCIE

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDPL_33_SATA VDDAN_11_SATA_1

VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7

VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12

VDDAN_11_USB_S_1 VDDAN_11_USB_S_2

PCI/GPIO I/O

FLASH I/O

PCI EXPRESSSERIAL ATA

C530

10U/6.3V_8

Part 3 of 5

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7

CORE S03.3V_S5 I/O

VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDRF_GBE_S

VDDIO_33_GBE_S

VDDCR_11_GBE_S_1

GBE LAN

VDDCR_11_GBE_S_2

VDDIO_GBE_S_1 VDDIO_GBE_S_2

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDCR_11_S_1 VDDCR_11_S_2

VDDIO_AZ_S

CORE S5

VDDCR_11_USB_S_1 VDDCR_11_USB_S_2

VDDPL_33_SYS

USB I/O

VDDPL_11_SYS_S

PLL CLKGEN I/O

VDDPL_33_USB_S

VDDAN_33_HWM_S

VDDXL_33_S

+3V

510mA131mA

N13 R15 N17 U13 U17 V12 V18 W12 W18

xx mA

K28 K29 J28 K26 J21 J20 K21 J22

V1 M10

L7 L9

M6 P8

32mA

A21 D21 B21 K10 L10 J9 T6 T8

113mA

F26 G26

xx mA

M8

197mA

A11 B11

M21 L22 F19 D6 L20

A41

L43

PBY160808T-221Y-N

+1.1V_VDDCR+3V_VDDIO_PCIGP

C526

0.1u/10V_4

+1.1V_VDDAN_CLK

C496

0.1u/10V_4

SB820 without GBE: Connected to GND plane.

+3V_VDDIO

+1.1V_VDDCR_11

+VDDIO_AZ

+1.1V_USB_PHY_R

+3V_VDDPL +1.1V_VDDPL VDDPL_33_USB_S +3V_HWM_VDDAN

C509

C509 *0.1u/10V_4

*0.1u/10V_4

C515

2.2u/6.3V_6

C527

0.1u/10V_4

C488

0.1u/10V_4

C505

C505 *0.1u/10V_4

*0.1u/10V_4

47mA 62mA 17mA 5mA

L51

L51 PBY160808T-221Y-N

PBY160808T-221Y-N

+3V_VDDPL

C507

C507 *0.1u/10V_4

*0.1u/10V_4

C522

C522 1U/10V_4

1U/10V_4

C497

C497 1U/10V_4

1U/10V_4

C504

2.2u/6.3V_6

C498

C498 1U/10V_4

1U/10V_4

A41

C468

2.2u/6.3V_6

C525

C525 1U/10V_4

1U/10V_4

C489

C489 1U/10V_4

1U/10V_4

C493

C493 1U/10V_4

1U/10V_4

C458

C458 10U/6.3V_8

10U/6.3V_8

C506

2.2u/6.3V_6

2

R295 *Short_6R295 *Short_6

C517

C517 10U/6.3V_8

10U/6.3V_8

A41

L48

UPB201212T-121Y-N_8

C457

C457 *10U/6.3V_8

*10U/6.3V_8

R292 *Short_6R292 *Short_6

R278 *Short_6R278 *Short_6

+3V_S5

+1.1V

+3V_S5

+1.1V_S5

U34E

Y14

VSSIO_SATA_1

Y16

VSSIO_SATA_2

AB16

VSSIO_SATA_3

AC14

VSSIO_SATA_4

AE12

VSSIO_SATA_5

AE14

VSSIO_SATA_6

AF9

VSSIO_SATA_7

AF11

VSSIO_SATA_8

AF13

VSSIO_SATA_9

AF16

VSSIO_SATA_10

AG8

VSSIO_SATA_11

AH7

VSSIO_SATA_12

AH11

VSSIO_SATA_13

AH13

VSSIO_SATA_14

AH16

VSSIO_SATA_15

AJ7

VSSIO_SATA_16

AJ11

VSSIO_SATA_17

AJ13

VSSIO_SATA_18

AJ16

VSSIO_SATA_19

A9

VSSIO_USB_1

B10

VSSIO_USB_2

K11

VSSIO_USB_3

B9

VSSIO_USB_4

D10

VSSIO_USB_5

D12

VSSIO_USB_6

D14

VSSIO_USB_7

D17

VSSIO_USB_8

E9

VSSIO_USB_9

F9

VSSIO_USB_10

F12

VSSIO_USB_11

F14

VSSIO_USB_12

F16

VSSIO_USB_13

C9

VSSIO_USB_14

G11

VSSIO_USB_15

F18

VSSIO_USB_16

D9

VSSIO_USB_17

H12

VSSIO_USB_18

H14

VSSIO_USB_19

H16

VSSIO_USB_20

H18

VSSIO_USB_21

J11

VSSIO_USB_22

J19

VSSIO_USB_23

K12

VSSIO_USB_24

K14

VSSIO_USB_25

K16

VSSIO_USB_26

K18

VSSIO_USB_27

H19

VSSIO_USB_28

Y4

EFUSE

D8

VSSAN_HWM

M19

VSSXL

P21

VSSIO_PCIECLK_1

P20

VSSIO_PCIECLK_2

M22

VSSIO_PCIECLK_3

M24

VSSIO_PCIECLK_4

M26

VSSIO_PCIECLK_5

P22

VSSIO_PCIECLK_6

P24

VSSIO_PCIECLK_7

P26

VSSIO_PCIECLK_8

T20

VSSIO_PCIECLK_9

T22

VSSIO_PCIECLK_10

T24

VSSIO_PCIECLK_11

V20

VSSIO_PCIECLK_12

J23

VSSIO_PCIECLK_13

SB820M_A12

SB800

Part 5 of 5

1

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43

GROUND

VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52

VSSPL_SYS

VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27

15

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W1

0 AJ28 B29 U4 Y1

8

Y1

0

Y1

2 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

A41

A A

+3V_S5 +3V_HWM_VDDAN

L56

PBY160808T-221Y-N

5

C553

0.1u/10V_4

C550

2.2u/6.3V_6

A41

L47

PBY160808T-221Y-N

4

+1.1V_VDDPL+1.1V_S5

C501

C501 *0.1u/10V_4

*0.1u/10V_4

C499

2.2u/6.3V_6

3

R289 0_4R289 0_4

D04

C623

0.1u/10V_4

VDDPL_33_USB_S+3V_S5

C469

2.2u/6.3V_6

2

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

Date: Sheet of

Wednesday, May 27, 2009

+3V[2,4,5,6,9,10,11,12,13,15,19,24,25,27,29,30,32,33,34,36,37,38,39,41,42,43,44,46] +1.1V[2,7,8,9,10,38,44] +3V_S5[11,12,13,15,24,26,31,32,36,44]

+1.1V_S5[38]

SB820-PWR/DECOUPLING 4/4

1

+3V +1.1V +3V_S5 +1.1V_S5

of

14 49

1A

5

4

3

2

1

OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.

16

REQUIRED STRAPS

http://hobi-elektronika.net

For internal

SB820M is supported Gen1 mode only.

D D

GPIO199[12] GPIO200[12] LPC_CLK1[11] LPC_CLK0[11] PCI_CLK4[11] PCI_CLK3[11] PCI_CLK2[11] PCI_CLK1[11]

ACZ_SDOUT[12]

C C

D02

PULL HIGH

PULL LOW

This is required as the low power mode is not supported on the SB8xx

+3V_S5 +3V+3V +3V +3V +3V_S5+3V_S5

R342

AZ_SDOUT

PERFORMANCE MODE

DEFAULT

R556

R556 *10K_4

*10K_4

R557

R557 10K_4

10K_4

PCI_CLK1

ALLOW PCIE Gen2

FORCE PCIE Gen1

DEFAULT

R342 *10K_4

*10K_4

R334

R334 10K_4

10K_4

PCI_CLK2

Watchdog Timer Enable

Watchdog Timer Disable

DEFAULT

R550

R550 *10K_4

*10K_4

R551

R551 10K_4

10K_4

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

R340

R340 *10K_4

*10K_4

R332

R332 10K_4

10K_4

PCI_CLK4

non_Fusion CLOCK MODE

DEFAULT

Fusion CLOCK MODE

R341

R341 10K_4

10K_4

R333

R333 *10K_4

*10K_4

LPC_CLK0

EC ENABLED

EC DISABLED

DEFAULT

DEBUG STRAPS

clock GEN.

R501

R501 10K_4

10K_4

LPC_CLK1

INT. CLKGEN ENABLED

DEFAULT

EXT. CLKGEN ENABLE

A15

R500

R500 10K_4

10K_4

R498

R498 *GN@10K_4

*GN@10K_4

GPIO200 GPIO199

H, H=Reserved H, L=SPI ROM

L,H=LPC ROM L, L=FWH ROM

internal have pull Hi 10K

R294

2.2K_4

DEFAULT

R277

R277 10K_4

10K_4

R291

R291 *2.2K_4

*2.2K_4

+3V_S5[11,12,13,14,24,26,31,32,36,44] +1.8V[7,9,10,24,37,42,43,44]

+3V_S5 +1.8V

SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

B B

A A

AD23[11] AD24[11] AD25[11] AD26[11] AD27[11]

R312

R312 *2.2K_4

*2.2K_4

R305

R305 *2.2K_4

*2.2K_4

PCI_AD25 PCI_AD24

USE FC PLL

DEFAULT

BYPASS FC PLL

DISABLE I2C ROM

DEFAULT

ENABLE I2C ROM use REQ3# as SDA use GNT3# as SCL

4

R310

R310 *2.2K_4

*2.2K_4

R301

R301 *2.2K_4

*2.2K_4

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULT

ENABLE PCI MEM BOOT

+3V_S5

CPU_COREPG[37,39]

PWROK_EC[4,34]

R567 10K_4R567 10K_4

*2.2U/6.3V_6

B2-TEST

3

PULL HIGH

PULL LOW

5

R549

R549 *2.2K_4

*2.2K_4

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

NB_PWRGD_IN: RS880/RX881 = 1.8V; Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)

C809

A63

POWERGOOD_EC_CPU

D29*BAS316 D29*BAS316

D24BAS316 D24BAS316

ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)

U38

1

NC

VCC

2

A

3

GND

*NL17SZ17DFT2G

*NL17SZ17DFT2G SOT-353

IC(5P) NL17SZ17DFT2G(SOT-353)AL17SZ17000

R568 *Short_4R568 *Short_4

+1.8V

5

4

Y

C802 *0.1u/10V_4C802 *0.1u/10V_4

R581 *33_4R581 *33_4

SOT-353 SOT23-5

2

SB_PWRGD_IN [12]

NB/SB POWER GOOD CIRCUIT

NB_PWRGD_IN [9,12]

352-(&7=5

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Date: Sheet of

Date: Sheet

SB820-STRAPS

Wednesday, May 27, 2009

of

15 49

1

15 49

1A