Acer Aspire 5541G Schematics
A
B
C
D
E
1 1
ZZZ
ZZZ
PCB
PCB
2 2
Compal Confidential
HM51_TR/HM70_TR Discrete
NDWG2/NDWH1 LA5992 Schematic Document
Mobile AMD S1G3/RS880M/SB710
3 3
2009/12/02 Rev 1.0
4 4
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
155Thursday, March 18, 2010
155Thursday, March 18, 2010
155Thursday, March 18, 2010
E
C
C
C
5
4
3
2
1
Compal confidential
Project Code: NDWG2/NDWH1
File Name : LA-5992P
D D
VRAM 512MB
64M16 x 4
page 21
AMD S1G3 CPU
638P PGA
H_A#(3..31)
page 6,7,8,9
H_D#(0..63)
HT 16x16 1000MHZ
DDRII DDRII-SO-DIMM X2
DDR2 500MHz
LCD Conn.
page 30
page 17,18,19,20,21,22
PCI-Express 16xATI M92-S2 XT
ATI-RS880M
465 BGA
page 12,13,14,15
CRT Conn.
page 29
PCIE X1
A-Link Express II
4 x PCIE
C C
Mini card WLAN
10/100 LAN
AR8114 / AR8132
page 31page 37
ATI-SB710
549 BGA
USB 2.0
SATA0
RJ45 CONN
page 32
page 23,24,25,26,27
SATA2
667/800
Dual Channel
Thermal Sensor
ADM1032ARM
Int. Camera
HDD Conn.
ODD Conn.
page 10,11
page 8
USB conn X2
page 30 page 38
page 28
page 28
Clock Generator
SLG8SP626
ICS9LPRS488BKLFT
page 16
CardReader
RTS5159
page 33
B B
Power On/Off CKT / LID switch / Power OK CKT
page 39
DC/DC Interface CKT.
page 43
LED
page 40
RTC CKT.
page 23
Debug Port
LPC BUS
page 34
page 35
3.3V 33 MHz
ENE KB926 D3
Int.KBDTouch Pad
page 34
page 35
SPI ROM
page 36
HDA Codec ALC272
AMPLIFIER
TPA6017
page 42
page 41
MIC CONN
page 42
HP CONN
page 42
Power Circuit DC/DC
page 43-53
A A
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
SPK CONN
Deciphered Date
Deciphered Date
Deciphered Date
page 42
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
255Thursday, March 18, 2010
255Thursday, March 18, 2010
255Thursday, March 18, 2010
1
C
C
C
5
4
3
2
1
Voltage Rails
Power Plane Description
VIN
B+
D D
C C
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9V 0.9V switched power rail for DDR terminator
+1.1VS
+1.2V_HT 1.25V switched power rail ON OFF OFF
+1.5VS
+1.8V
+1.8VS 1.8V switched power rail
+2.5VS
+3VALW
+3V_LAN 3.3V power rail for LAN ON ON ON
+3VS
+5VALW
+5VS
+VSB VSB always on power rail ON ON*
+RTCVCC RTC power
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V)
AC or battery power rail for power circuit.
1.05V switched power rail
1.5V power rail for PCIE Card
1.8V power rail for CPU VDDIO and DDR
2.5V for CPU_VDDA and MXM/B
3.3V always on power rail
3.3V switched power rail
5V always on power rail
5V switched power rail
S1 S3 S5
N/A N/A N/A
N/AN/AN/A
ON
ON
ON OFF OFF
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF OFF
OFF
ON
OFF
OFF
OFF
OFF
ON ON*
OFF
OFF
ON
ON*
OFF
OFFON
ONON
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0
1
2
3
4
5
6
7N
SIGNAL
SLP_S1# SLP_S3#
HIGH HIGH HIGH HIGH
LOW
LOW
LOW
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
C
SLP_S4# SLP_S5# +VALW +V +VS Clock
LOW
HIGH
LOWLOWLOW
LOW LOW LOW
min
AD_BID
0 V
HIGHHIGHHIGH
HIGH
HIGH
V typ
AD_BID
ON
ON
ON
ON
ON
0 V
ON
ON
ON
OFF
OFF
V
AD_BID
ON ON
ON
OFF
OFF
OFF
max
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
0.503 V
0.819 V
0.538 V
0.875 V
1.185 V 1.264 V
1.650 V 1.759 V
2.200 V
3.300 V
2.341 V
3.300 V
LOW
OFF
OFF
OFF
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
BTO Option Table
BOARD ID Table
Board ID
0
1
2
3
EC SM Bus1 address
B B
Device
Smart Battery
Address Address
EC SM Bus2 address
Device
ADM1032
GMT G781-1 (GPU)
1001 100X b0001 011X b
1001 100X b
4
5
6
7
PCB Revision
No Support VaryBright
Support VaryBright
BTO Item BOM Structure
10/100 Lan
8114@
GIGA Lan 8132@
17" ID 17@
15" ID 15@
PROJECT ID Table
SKU ID
0
SB710 SM Bus 1 address
Device
Clock Generator
DDR DIMM0
DDR DIMM2
A A
Wireless Lan
Address
1101 001Xb
1001 000Xb
1001 010Xb
SB710 SM Bus 2 address
Device Address
New Card
1
2
3
4
5
6
7
SKU
NDWG2
NDWH1
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
355Thursday, March 18, 2010
355Thursday, March 18, 2010
355Thursday, March 18, 2010
1
C
C
C
5
4
3
2
1
DIMMA
DDR_A_CLK[1..2]
D D
C C
14.31818MHz
EXTERNAL
CLK GEN.
SLG8SP626 / ICS9LPRS488
CLK_48M_SD
48MHZ
Cardreader
B B
RTS5159
100MHZ
CLK_PCIE
100MHZ
CLK_PCIE
_VGA
27M
27MHZ
_SSC
_MINI
100MHZ
CLK_PCI
E_LAN
CPU CLK
200MHZ
CK_SBLINK_BCLK
100MHZ
CLK_NBHT
66MHZ
CLK_NB_14.318M
14.318MHZ
CLK_NBGFX
100MHZ
CLK_14M_SB
14.318MHZ
CLK_SBSRC_BCLK
100MHZ
CLK_48M_USB
48MHZ
CPU
S1G3
SOCKET
H_CLKO[1:0]H_CLKI[1:0] Host Bus
ATI
NB
RS880M
ATI
SB
SB710
RTC SATA
DDR_B_CLK[1..2]
CLK_PCI_LPC
33MHZ
EC
ENE
KB926D3
DIMMB
Graphics
A A
M92 S2 XT
Mini PCI Socket
Mini card
5
LAN
Atheros
AR8114/AR8132
4
32.768K Hz
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
25M Hz
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
32.768K Hz
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
455Thursday, March 18, 2010
455Thursday, March 18, 2010
455Thursday, March 18, 2010
1
C
C
C
5
+CPU_CORE
AC ADAPTOR
19V 65W
BATTERY
11.1V
D D
2.2Ah/6-cell
VIN
BATT+
PU16
ISL6265IRZ-T
PU10
TPS51117RGYR
+CPU_CORE_NB
+1.2VALW
PU17
BATTERY CHARGER
BQ24751ARHDR
PU12
TPS51117RGYR
B+
PU9
TPS51117RGYR
PU3
C C
+USB_VCCA
U4
TPS2061DRG4
B+
B B
FAN Control
APL5607
+5VS 500mA
Audio AMP
TPA6017A2
+5VS 600mA
USB X2
+5V
Dual
1.5A
A A
LCD panel
15.6"
B+ 850mA
ISL6237IRZ-T
+5VALW
PU17
ISL6268CAZ-T
U7
AO4468
Realtek
RTS5159
+3.3VS 43mA
+3.3VS 455mA
5
+NB_CORE
+1.8V
+3VALW
+5VS
+VGA_CORE
Audio Codec
ALC272
+5VS 45mA
+3.3VS 25mA
4
U41
AO4468
EC
ENE KB926
+3.3VALW 20mA
+3.3VS 3mA
4
+3VS
+5VS
SATA
+5VS 3A
+3.3VS
+3VS
3
+3VS
+1.8V
+1.8V +1.8VS
+2.5VS
PU7
APL5508-25DC-TRL
+0.9V
PU6
RT9173DPSP
U37
AO4430
+1.5VS
PU8
APL5915KAI
+1.2VALW
+1.2VALW
+VGA_BBP
U46
AO4430
PU15
APL5912
KAC-TRL
Q43
SI2301BDS
+1.2V_HT
+1.1VS
+1.2V_HT
+3VALW
DP[B:A]_VDD10
DP[F:E]_VDD10
Q41
SI2301BDS
+3V_DELAY
DPLL_VDDC
PCIE_VDDC
VDDC+VDDCI
SPV10
BBP
VDDR1+VDDRHx
VDD_CT
DPE_PVDD
DP[B:A]_PVDD
DP[F:E]_VDD18
DPLL_PVDD
PCIE_PVDD
LAN
Atheros AR8114
+3.3VALW 300mA
+1.2V_HT
PCIE_VDDR
TSVDD
AVDD
VDD1DI
VDD2DI
A2VDDQ
Mini Card
+1.5VS 500mA
+3.3VS 1A
+3.3VALW 330mA
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
CLK GEN
SLG8SP626VTR
+3.3VS 400mA
+1.2V_HT 250mA
Compal Secret Data
Compal Secret Data
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
VDDR4
VDDR5
VDDR3
A2VDD
2
VDD
VDDNB 0.8V
VDDA
VDDIO
VLDT
VTT
M92-S2 XTVGA
2
CPU
AMD
S1G3 socket
0.7V
1.2V
1.1V
2.5V
1.8V
1.2V
0.9V
200 mA
170 mA
150 mA
1.1V
1400 mA
11500 mA
120 mA
1.2V
22 mA
1200 mA
110 mA
20 mA
20 mA
200 mA
1.8V
120 mA
40 mA
362 mA
20 mA
70 mA
45 mA
40 mA
7 mA
170 mA
170 mA
50 mA
3.3V
65 mA
1
36 A
4 A
250 mA
3.6 A
1.5 A
1.75 A
DDRII SODIMMX2
VDD_MEM
VTT_MEM
1.8V
0.9V
7 A
430 mA
NB RS880MN
VDDC
0.95-1.1V
VDDHT
PLLVDD
VDDPCIE
1.1V
VDDHTRX
IOPLLVDD
VDDHTTX
1.2V
AVDDDI
AVDDQ
IOPLLVDD18
PLLVDD18
1.8V
VDD18
VDDA18PCIE
VDDA18HTPLL
VDDA18PCIEPLL
VDDLT18
VDDLTP18
VDD33
AVDD
SB
3.3V
SB710
S5_1.2V
USB_PHY_1.2V
VDD
AVDDCK_1.2V
CKVDD_1.2V
1.2V
AVDD_SATA
PLLVDD_SATA
PCIE_VDDR
PCIE_PVDD
S5_3.3V
AVDD TX/RX
AVDDC
VDDQ
3.3V
VDD33_18
AVDDCK_3.3V
XTLVDD_SATA
V5_VREF 5V
RTC
Bettary
VBAT
HYB18T256161BF x4
VRAM
VDD
VDDL
2.5~3.6V
1.8V
VDDQ
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
555Thursday, March 18, 2010
555Thursday, March 18, 2010
555Thursday, March 18, 2010
1
10 A
680 mA
65 mA
2.5 A
680 mA
400 mA
20 mA
4 mA
20 mA
10 mA
700 mA
20 mA
120 mA
300 mA
15 mA
60 mA
110 mA
510mA
113 mA
197 mA
62 mA
43 mA
600 mA
567 mA
93 mA
32 mA
17 mA
658 mA
131 mA
71 mA
47 mA
6 mA
1 mA
1208mA
C
C
C
5
4
3
2
1
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
H_CADOP[0..15]
H_CADON[0..15]
+1.2V_HT+1.2V_HT
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
1 2
C84 10U_0805_10V4Z C84 10U_0805_10V4Z
H_CADOP[0..15] 12
H_CADON[0..15] 12H_CADIN[0..15]12
Change as 10U
for Tigris
close CPU
H_CLKOP0 12
H_CLKON0 12
H_CLKOP1 12
H_CLKON1 12
H_CTLOP0 12
H_CTLON0 12H_CTLIN012
H_CTLON1 12
FAN Control Circuit
+5VS
R247
R247
0_0603_5%
0_0603_5%
@
@
+VCC_FAN1
EN_DFAN134
1 2
1 2
R733 0_0402_5%R733 0_0402_5%
@
@
1
2
FANPWM34
C92 10U_0805_10V4Z
C92 10U_0805_10V4Z
U1
U1
1
EN
2
VIN
3
VOUT
4
VSET
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
C760
C760
0.01U_0402_25V4Z
0.01U_0402_25V4Z
FAN_SPEED134
1 2
GND
GND
GND
GND
+3VS
12
R40
R40
10K_0402_5%
10K_0402_5%
@
@
8
7
6
5
+3VS
12
R37
R37
10K_0402_5%
10K_0402_5%
1
C91
C91
1000P_0402_50V7K
1000P_0402_50V7K
2
FANPWN
+5VS
40mil
+VCC_FAN1
+VCC_FAN1
Reserve when PVT
for cos down
12
D13
D13
1SS355_SOD323-2@
1SS355_SOD323-2@
D4 BAS16_SOT23-3@D4 BAS16_SOT23-3@
1 2
C97
C97
10U_0805_10V4Z
10U_0805_10V4Z
1 2
C96
C96
1000P_0402_50V7K
1000P_0402_50V7K
1 2
JP12
JP12
1
2
3
CONN@
CONN@
ACES_85205-03001
ACES_85205-03001
LDO FAN
JP38
JP38
1
1
2
2
3
3
4
4
CONN@
CONN@
ACES_85205-0400
ACES_85205-0400
PWM FAN
H_CADIP[0..15]12
D D
VLDT=1500mA for HT3
C C
H_CLKIP012
H_CLKIN012
H_CLKIP112
H_CLKIN112
H_CTLIP012
H_CTLIP112 H_CTLOP1 12
H_CTLIN112
B B
H_CADIP[0..15]
H_CADIN[0..15]
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
Athlon 64 S1
Processor Socket
JCPU1A
JCPU1A
6090022100G_B
6090022100G_B
HT LINK
HT LINK
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
+1.2V_HT
250 mil
2
1
Change as 10U
for Tigris
A A
VLDT CAP.
C86
C86
10U_0805_10V4Z
10U_0805_10V4Z
5
2
C82
C82
10U_0805_10V4Z
10U_0805_10V4Z
1
1
C90
C90
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C89
C89
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
Near CPU Socket
1
C83
C83
180P_0402_50V8J
180P_0402_50V8J
2
4
1
C85
C85
180P_0402_50V8J
180P_0402_50V8J
2
Security Classification
Security Classification
Security Classification
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
1
655Thursday, March 18, 2010
655Thursday, March 18, 2010
655Thursday, March 18, 2010
C
C
C
A
B
C
D
E
W10
AC10
AB10
AA10
A10
Y10
W17
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
+0.9V+0.9V
+MCH_REF
DDRB_ODT0
DDRB_ODT1
DDRB_SCS1#
DDRB_CKE0
DDRB_CKE1
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#DDRA_CLK1#
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
@
@
T2PAD@T2PAD
T17PAD@T17PAD
DDRB_ODT0 11
DDRB_ODT1 11
DDRB_SCS1# 11
DDRB_CKE0 11
DDRB_CKE1 11
DDRB_CLK0 11
DDRB_CLK0# 11
DDRB_CLK1 11
DDRB_CLK1# 11
DDRB_SBS0# 11
DDRB_SBS1# 11
DDRB_SBS2# 11
DDRB_SRAS# 11
DDRB_SCAS# 11
DDRB_SWE# 11
JCPU1B
JCPU1B
D10
VTT1
MEM:CMD/CTRL/CLK
Place them close to CPU within 1"
R6 39.2_0402_1%R6 39.2_0402_1%
1 2
4 4
3 3
2 2
1 1
+1.8V
DDRA_ODT010
DDRA_ODT110
DDRA_SCS0#10
DDRA_SCS1#10 DDRB_SCS0# 11
DDRA_CKE010
DDRA_CKE110
DDRA_CLK010
DDRA_CLK0#10
DDRA_CLK110
DDRA_CLK1#10
DDRA_SMA[15..0]10 DDRB_SMA[15..0] 11
DDRA_SBS0#10
DDRA_SBS1#10
DDRA_SBS2#10
DDRA_SRAS#10
DDRA_SCAS#10
DDRA_SWE#10
R4
R4
1K_0402_1%
1K_0402_1%
R5
R5
1K_0402_1%
1K_0402_1%
1 2
R7 39.2_0402_1%R7 39.2_0402_1%
+1.8V
1 2
+MCH_REF
1
2
1 2
DDRA_ODT0
DDRA_ODT1
DDRA_SCS0#
DDRA_SCS1# DDRB_SCS0#
DDRA_CKE0
DDRA_CKE1
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
1
C16
C16
C100
C100
2
_0402_16V4Z
_0402_16V4Z
0.1U
0.1U
1000P_0402_25V8J
1000P_0402_25V8J
C10
B10
AD10
AF10
AE10
H16
T19
V22
U21
V19
T20
U19
U20
V20
N19
N20
E16
F16
Y16
AA16
P19
P20
N21
M20
N22
M19
M22
M24
K22
R21
K20
V24
K24
K19
R20
R23
R19
T22
T24
J22
J20
L20
L21
L19
L22
J21
MEM:CMD/CTRL/CLK
VTT2
VTT3
VTT4
MEMZP
MEMZN
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CLK_H2
MA_CLK_L2
MA_CLK_H3
MA_CLK_L3
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
Athlon 64 S1
Processor
Socket
DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
VTT5
VTT6
VTT7
VTT8
VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
1
2
1
2
1
2
1
2
C104
C104
1.5P_0402_50V8C
1.5P_0402_50V8C
C102
C102
1.5P_0402_50V8C
1.5P_0402_50V8C
C105
C105
1.5P_0402_50V8C
1.5P_0402_50V8C
C17
C17
1.5P_0402_50V8C
1.5P_0402_50V8C
DDRB_SDQ[63..0]11
DDRB_SDM[7..0]11 DDRA_SDM[7..0] 10
DDRB_SDQS011
DDRB_SDQS0#11
DDRB_SDQS111
DDRB_SDQS1#11
DDRB_SDQS211
DDRB_SDQS2#11
DDRB_SDQS311
DDRB_SDQS3#11
DDRB_SDQS411
DDRB_SDQS4#11
DDRB_SDQS511
DDRB_SDQS5#11
DDRB_SDQS611
DDRB_SDQS6#11
DDRB_SDQS711
DDRB_SDQS7#11
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21 DDRA_SDQ21
DDRB_SDQ22 DDRA_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
Processor DDR2 Memory Interface
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
AE14
AF14
AF11
AD11
AB26
AE22
AC16
AD12
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
Y11
A12
B16
A22
E25
C12
B12
D16
C16
A24
A23
F26
E26
JCPU1C
JCPU1C
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
6090022100G_B
6090022100G_B
MEM:DATA
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
Athlon 64 S1
Processor Socket
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56DDRB_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQ[63..0] 10
DDRA_SDQS0 10
DDRA_SDQS0# 10
DDRA_SDQS1 10
DDRA_SDQS1# 10
DDRA_SDQS2 10
DDRA_SDQS2# 10
DDRA_SDQS3 10
DDRA_SDQS3# 10
DDRA_SDQS4 10
DDRA_SDQS4# 10
DDRA_SDQS5 10
DDRA_SDQS5# 10
DDRA_SDQS6 10
DDRA_SDQS6# 10
DDRA_SDQS7 10
DDRA_SDQS7# 10
A
B
Security Classification
Security Classification
Security Classification
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
755Thursday, March 18, 2010
755Thursday, March 18, 2010
755Thursday, March 18, 2010
E
C
C
C
5
L4
+2.5VS
1
C113
D D
LDT_RST#23 CPU_VDDNB_FB_H 53
C C
H_PWRGD23
B B
LDT_STOP#13,23
A A
change to polymer
CLK_CPU_BCLK16
CLK_CPU_BCLK#16
+1.8VS
R334
R334
300_0402_5%
300_0402_5%
1 2
LDT_RST#
1
C721
C721
0.01U_0402_25V4Z
0.01U_0402_25V4Z
@
@
2
+1.8VS
R346
R346
300_0402_5%
300_0402_5%
1 2
H_PWRGD
1
C720
C720
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
+1.8VS
R342
R342
300_0402_5%
300_0402_5%
1 2
LDT_STOP#
1
C719
C719
0.01U_0402_25V4Z
0.01U_0402_25V4Z
@
@
2
+3VS
1
C119
C119
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C120
C120
1 2
3300P_0402_50V7K
3300P_0402_50V7K
C120 3300p for tigris
2200p change to
1000p for ADT7421
5
THERMDA_CPU
THERMDC_CPU
C113
+
+
150U_D2_6.3VM
150U_D2_6.3VM
2
1 2
C109
C109
1 2
C23 3900P_0402_50V7KC23 3900P_0402_50V7K
+1.8V
+CPU_CORE_0
R204 10_0402_5%@R204 10_0402_5%@
R205 10_0402_5%@R205 10_0402_5%@
+CPU_CORE_1
+1.8V +1.8V
U3
U3
1
VDD
2
D+
3
DÂTHERM#4GND
ADM1032ARMZ_MSOP8
ADM1032ARMZ_MSOP8
Address:100_1101
L4
1 2
FCM2012CF-800T06_2P
FCM2012CF-800T06_2P
3900P_0402_50V7K
3900P_0402_50V7K
12
R22
R22
169_0402_1%
169_0402_1%
R216 2.2K_0402_5%
R216 2.2K_0402_5%
12
R217 2.2K_0402_5%
R217 2.2K_0402_5%
12
1 2
1 2
R206
R206
10K_0402_5%
10K_0402_5%
@
@
1 2
@
@
1 2
10K_0402_5%
10K_0402_5%
R209
R209
R212, R211 pop for Tigris
12
R210
R210
510_0402_5%@
510_0402_5%@
TEST25_H TEST25_L
12
R211
R211
510_0402_5%
510_0402_5%
SCLK
SDATA
ALERT#
4
4.7U_0805_10V4Z
4.7U_0805_10V4Z
CPU_SID
CPU_SIC
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_VDD1_FB_H
CPU_VDD1_FB_L
12
R212
R212
510_0402_5%
510_0402_5%
12
R213
R213
510_0402_5%@
510_0402_5%@
FDV301N, the Vgs is:
min = 0.65V
Typ = 0.85V
Max = 1.5V
EC_SMB_CK2
8
EC_SMB_DA2
7
6
5
4
+2.5VDDA
1
2
+1.2V_HT
3300P_0402_50V7K
3300P_0402_50V7K
1
1
C118
C116
C116
C118
2
2
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_LDT_REQ#13
R16 44.2_0402_1%R16 44.2_0402_1%
1 2
R61 44.2_0402_1%R61 44.2_0402_1%
1 2
CPU_VDD0_FB_H53
CPU_VDD0_FB_L53
CPU_VDD1_FB_H53
CPU_VDD1_FB_L53
T3 PADT3 PAD
T8 PADT8 PAD
T12 PADT12 PAD
T4 PADT4 PAD
T24 PADT24 PAD
T26 PADT26 PAD
T25 PADT25 PAD
T7 PADT7 PAD R160 300_0402_5%R160 300_0402_5%
T27 PADT27 PAD
T22 PADT22 PAD
EC_SMB_CK2 22,34
EC_SMB_DA2 22,34
3
+1.8V
C22
C22
0.22U_0603_16V4Z
0.22U_0603_16V4Z
JCPU1D
JCPU1D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
LDT_RST#
H_PWRGD
LDT_STOP#
CPU_LDT_REQ#
CPU_SIC
CPU_SID
CPU_HTREF0
CPU_HTREF1
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_VDD1_FB_H
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST23 CPU_SVC
CPU_TEST18
CPU_TEST19
TEST25_H
TEST25_L
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27
R214 0_0402_5%R214 0_0402_5%
1 2
CPU_TEST6
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
6090022100G_B
6090022100G_B
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
3
THERMTRIP_L
PROCHOT_L
MEMHOT_L
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
+1.8V
R33220_0402_5%
R33220_0402_5%
12
@
@
M11
KEY1
W18
KEY2
A6
SVC
A4
SVD
AF6
AC7
AA8
W7
THERMDC
W8
THERMDA
W9
Y9
H6
G6
E10
DBREQ_L
AE9
TDO
J7
TEST28_H
H8
TEST28_L
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
C3
TEST7
K8
TEST10
C4
TEST8
C9
TEST29_H
C8
TEST29_L
H18
RSVD10
H19
RSVD9
AA7
RSVD8
D5
RSVD7
C5
RSVD6
R34220_0402_5%
R34220_0402_5%
R36300_0402_5%
R38220_0402_5%
R38220_0402_5%
12
@
@
R36300_0402_5%
R35220_0402_5%
R35220_0402_5%
12
12
12
@
@
@
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
CPU_SVC
CPU_SVD
THERMDC_CPU
THERMDA_CPU
CPU_VDDNB_FB_H
CPU_VDDNB_FB_LCPU_VDD1_FB_L
CPU_DBREQ#
CPU_TDO
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
CPU_TEST7
CPU_TEST10
CPU_TEST8
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
CPU_SVC 53
CPU_SVD 53
CPU_THERMTRIP#_R
H_PROCHOT#
@
@
12
R218 300_0402_5%
R218 300_0402_5%
T5PAD T5PAD
T6PAD T6PAD
2
1 2
R18 10K_0402_5%R18 10K_0402_5%
1 2
R8 300_0402_5%R8 300_0402_5%
CPU_THERMTRIP#_R
+1.8V
+1.8V
CPU_VDDNB_FB_L 53
JP3
JP3
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
2423
26
SAMTEC_ASP-68200-07
@SAMTEC_ASP-68200-07
@
2
E
E
3 1
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
1 2
R20 300_0402_5%R20 300_0402_5%
H_PROCHOT#
T9PAD T9PAD
T10PAD T10PAD
T20PAD T20PAD
T19PAD T19PAD
T11PAD T11PAD
T21PAD T21PAD
T13PAD T13PAD
T14PAD T14PAD
T28PAD T28PAD
T18PAD T18PAD
T16PAD T16PAD
HDT_RST#
1
B
B
2
Q3
Q3
C
C
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
R2
1 2
0_0402_5%@R20_0402_5%@
R17
R17
1 2
0_0402_5%
0_0402_5%
R52
R52
1 2
0_0402_5%
0_0402_5%
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_TEST10
CPU_SVD
CPU_TEST21
CPU_TEST24
CPU_TEST20
CPU_TEST23
CPU_TEST18
CPU_TEST19
CPU_TEST22
R25 0_0402_5%@R25 0_0402_5%@
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
401836
401836
401836
R201 10_0402_5%@R201 10_0402_5%@
1 2
1 2
R202 10_0402_5%@R202 10_0402_5%@
R151 0_0402_5%
R151 0_0402_5%
1 2
R152 1K_0402_5%R152 1K_0402_5%
1 2
R153 1K_0402_5%R153 1K_0402_5%
1 2
R154 300_0402_5%R154 300_0402_5%
R155 300_0402_5%R155 300_0402_5%
R162 300_0402_5%R162 300_0402_5%
1 2
R220 300_0402_5% @R220 300_0402_5% @
1 2
R221 300_0402_5% @R221 300_0402_5% @
1 2
R222 300_0402_5% @R222 300_0402_5% @
LDT_RST#
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
@
@
12
12
12
12
1
MAINPWON 45,47,52
H_THERMTRIP# 24
H_PROCHOT_R# 23
+CPU_CORE_NB
+1.2V_HT
+1.8V
of
855Thursday, March 18, 2010
855Thursday, March 18, 2010
855Thursday, March 18, 2010
C
C
C
5
VDD(+CPU_CORE) decoupling.
+CPU_CORE_0
1
+
+
C26
D D
C26
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
+
+
C32
C32
330U_X_2VM_R6M
330U_X_2VM_R6M
2
+CPU_CORE_0
1
C33
C33
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE_0
1
C128
C128
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
C C
+1.8V
1
C170
C170
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C36
C36
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C129
C129
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
1
C34
C34
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C151
C151
180P_0402_50V8J
180P_0402_50V8J
2
1
2
VDDIO decoupling.
1
C181
C181
22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
1
C124
C124
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
+
+
2
Near CPU Socket
C35
C35
22U_0805_6.3V6M
22U_0805_6.3V6M
Under CPU Socket
1
C147
C147
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
C45
C45
330U_X_2VM_R6M@
330U_X_2VM_R6M@
4
+CPU_CORE_1
+CPU_CORE_1
1
C178
C178
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C6
C6
180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C27
C27
330U_X_2VM_R6M
330U_X_2VM_R6M
2
+CPU_CORE_1
1
C7
C7
180P_0402_50V8J
180P_0402_50V8J
2
1
C41
C41
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C122
C122
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
+
+
C28
C28
330U_X_2VM_R6M
330U_X_2VM_R6M
2
1
C190
C190
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C47
C47
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
3
1
C39
C39
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C5
C5
180P_0402_50V8J
180P_0402_50V8J
2
VDD0 = 18A VDD1 =18A
+CPU_CORE_0
VDDNB=4A
(For Tigris)
VDDNB=3A
+CPU_CORE_NB
VDDIO=3A
+1.8V
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
K16
M16
P16
T16
V16
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
6090022100G_B
6090022100G_B
Athlon 64 S1
Processor Socket
JCPU1E
JCPU1E
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
+CPU_CORE_NB decoupling.
+CPU_CORE_NB
1
C8
C8
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C9
C9
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C11
C11
22U_0805_6.3V6M
22U_0805_6.3V6M
2
2
JCPU1F
JCPU1F
AA4
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+CPU_CORE_1
+1.8V
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
D11
D13
D15
D17
D19
D21
D23
D25
H21
H23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
J4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
6090022100G_B
6090022100G_B
Athlon 64 S1
Processor Socket
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
1
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
B B
A A
+1.8V
1
C157
C157
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+1.8V +1.8V
1
C175
C175
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
+1.8V
1
2
Between CPU Socket and DIMM
1
C68
C68
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
1
C189
C189
180P_0402_50V8J
180P_0402_50V8J
2
1
C187
C187
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
C76
C76
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C182
C182
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C159
C159
0.01U_0402_25V4Z
0.01U_0402_25V4Z
2
1
C167
C167
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C188
C188
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C136
C136
180P_0402_50V8J
180P_0402_50V8J
2
1
C132
C132
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C156
C156
180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C162
C162
220U_Y_4VM
220U_Y_4VM
2
NBO CAP
1
2
1
+
+
C12
C12
220U_Y_4VM
220U_Y_4VM
@
@
2
C158
C158
180P_0402_50V8J
180P_0402_50V8J
VTT decoupling.
change to polymer
+0.9V
1
C155
C155
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+0.9V
1
C73
C73
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C146
C146
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Near CPU Socket Right side.
1
C70
C70
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C184
C184
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C127
C127
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+0.9V
Near Power Supply
1
C66
C66
+
+
220U_D2_4VM_R15
220U_D2_4VM_R15
2
1
C173
C173
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C185
C185
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C14
C14
22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C72
C72
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C164
C164
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C145
C145
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C163
C163
1000P_0402_25V8J
1000P_0402_25V8J
2
1
C180
C180
180P_0402_50V8J
180P_0402_50V8J
2
1
C152
C152
180P_0402_50V8J
180P_0402_50V8J
2
1
C121
C121
180P_0402_50V8J
180P_0402_50V8J
2
1
C179
C179
180P_0402_50V8J
180P_0402_50V8J
2
Near CPU Socket Left side.
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
955Thursday, March 18, 2010
955Thursday, March 18, 2010
955Thursday, March 18, 2010
1
C
C
C
A
+1.8V +1.8V
JDIMM1
JDIMM1
+V_DDR_MCH_REF
DDRA_SDQS0#7
DDRA_SDQS07
1 1
DDRA_SDQS1#7
DDRA_SDQS17
DDRA_SDQS2#7
DDRA_SDQS27
2 2
3 3
4 4
DDRA_CKE07
DDRA_SBS2#7
DDRA_SBS0#7
DDRA_SWE#7
DDRA_SCAS#7
DDRA_SCS1#7
DDRA_ODT17
DDRA_SDQS4#7
DDRA_SDQS47
DDRA_SDQS6#7
DDRA_SDQS67
SB_CK_SDAT11,16,24,37
SB_CK_SCLK11,16,24,37
C448
C448
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
+3VS
1
2
A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQS1#
DDRA_SDQS1
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQS2#
DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25 DDRA_SDQ29
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
DDRA_SBS2#
DDRA_SMA12
DDRA_SMA9
DDRA_SMA8
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SCS1#
DDRA_ODT1
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
SB_CK_SDAT
SB_CK_SCLK
+3VS
1
C310
C310
2
DIMM1 REV H:5.2mm (BOT)
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
203
GND
FOX_AS0A426-M2RN-7F
FOX_AS0A426-M2RN-7F
CONN@
CONN@
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
VDD
VDD
BA1
RAS#
VDD
ODT0
NC/A13
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
NC
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
A11
92
A7
94
A6
96
98
A4
100
A2
102
A0
104
106
108
110
S0#
112
114
116
118
120
NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
B
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDM0
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDM1
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDM2
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ28
DDRA_SDQS3#
DDRA_SDQS3
DDRA_SDQ30
DDRA_SDQ31
DDRA_CKE1DDRA_CKE0
DDRA_SMA15
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_SMA13
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDM6
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQ62
DDRA_SDQ63
R12 10K_0402_5%R12 10K_0402_5%
1 2
R10 10K_0402_5%R10 10K_0402_5%
1 2
DDRA_CLK0 7
DDRA_CLK0# 7
DDRA_SDQS3# 7
DDRA_SDQS3 7
DDRA_CKE1
7
DDRA_SBS1# 7
DDRA_SRAS# 7
DDRA_SCS0# 7
DDRA_ODT0 7
DDRA_SDQS5# 7
DDRA_SDQS5 7
DDRA_CLK1 7
DDRA_CLK1# 7
DDRA_SDQS7# 7
DDRA_SDQS7 7
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
RESERVE
+V_DDR_MCH_REF BUFFER CIRCUIT
+1.8V
R398
R398
1K_0402_1%
1K_0402_1%
+V_DDR_MCH_REF
8J
8J
1
C507
C507
2
1000P_0402_25V
1000P_0402_25V
C
1 2
1
C503
C503
2
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C60
C60
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
R397
R397
1K_0402_1%
1K_0402_1%
+1.8V
1
2
+V_DDR_MCH_REF
1
C63
C63
C64
C64
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Compal Secret Data
Compal Secret Data
Compal Secret Data
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C65
C65
2
Deciphered Date
Deciphered Date
Deciphered Date
D
DDRA_SMA4
DDRA_SMA14
DDRA_SMA15
DDRA_CKE1
DDRA_CKE0
DDRA_SBS2#
DDRA_SMA6
DDRA_SMA2
DDRA_SMA0
DDRA_SBS1#
DDRA_SMA11
DDRA_SMA7
DDRA_SMA5
DDRA_SMA8
DDRA_SMA9
DDRA_SMA12
DDRA_SBS0#
DDRA_SMA10
DDRA_SMA1
DDRA_SMA3
DDRA_SCS1#
DDRA_ODT1
DDRA_SWE#
DDRA_SCAS#
DDRA_ODT0
DDRA_SMA13
DDRA_SCS0#
DDRA_SRAS#
0.1U_0402_16V4Z@
0.1U_0402_16V4Z@
D
E
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SMA[0..15]
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
+0.9V
0.1U_0402_16V4Z@
0.1U_0402_16V4Z@
1
1
C67
C67
2
1
C69
C69
2
2
0.1U_0402_16V4Z@
0.1U_0402_16V4Z@
DDRA_SDQ[0..63] 7
DDRA_SDM[0..7] 7
DDRA_SMA[0..15] 7
+0.9V
RP1
RP1
1 8
2 7
3 6
4 5
R40747_0402_5% R40747_0402_5%
1 2
R40847_0402_5% R40847_0402_5%
1 2
R41147_0402_5% R41147_0402_5%
1 2
R41247_0402_5% R41247_0402_5%
1 2
RP3
RP3
1 8
2 7
3 6
4 5
RP4
RP4
RP5
RP5
RP6
RP6
RP7
RP7
1 8
2 7
3 6
4 5
1
C71
C71
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
C81 0.1U_0402_16V4ZC81 0.1U_0402_16V4Z
1 2
C139 0.1U_0402_16V4ZC139 0.1U_0402_16V4Z
1 2
C192 0.1U_0402_16V4ZC192 0.1U_0402_16V4Z
1 2
C88 0.1U_0402_16V4ZC88 0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C117
C117
1 2
C144 0.1U_0402_16V4ZC144 0.1U_0402_16V4Z
1 2
18
C114 0.1U_0402_16V4ZC114 0.1U_0402_16V4Z
27
36
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C95
C95
45
1 2
18
C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z
27
1 2
36
C125 0.1U_0402_16V4ZC125 0.1U_0402_16V4Z
45
18
1 2
C103 0.1U_0402_16V4ZC103 0.1U_0402_16V4Z
27
36
1 2
C99 0.1U_0402_16V4ZC99 0.1U_0402_16V4Z
45
1 2
C107 0.1U_0402_16V4ZC107 0.1U_0402_16V4Z
1 2
C98 0.1U_0402_16V4ZC98 0.1U_0402_16V4Z
0.1U_0402_16V4Z@
0.1U_0402_16V4Z@
C75
C75
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
+1.8V
10 55Thursday, March 18, 2010
10 55Thursday, March 18, 2010
10 55Thursday, March 18, 2010
E
C
C
C
A
+1.8V
JDIMM2
JDIMM2
+V_DDR_MCH_REF
DDRB_SDQS0#7
1 1
2 2
3 3
4 4
DDRB_SDQS07
DDRB_SDQS1#7
DDRB_SDQS17
DDRB_SDQS2#7
DDRB_SDQS27
DDRB_CKE07
DDRB_SBS2#7
DDRB_SBS0#7
DDRB_SWE#7
DDRB_SCAS#7
DDRB_SCS1#7
DDRB_ODT17
DDRB_SDQS4#7
DDRB_SDQS47
DDRB_SDQS6#7
DDRB_SDQS67
SB_CK_SDAT10,16,24,37
SB_CK_SCLK10,16,24,37
A
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQS0#
DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26 DDRB_SDQ30
DDRB_SDQ27
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#
DDRB_SCAS#
DDRB_SCS1#
DDRB_ODT1
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
SB_CK_SDAT
SB_CK_SCLK
1
+3VS
C313
C313
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
DIMM1 REV H:9.2mm (BOT)
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
GND
FOX_AS0A426-MARG-7F
FOX_AS0A426-MARG-7F
CONN@
CONN@
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
VDD
VDD
BA1
RAS#
VDD
ODT0
NC/A13
VDD
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
B
+1.8V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
NC
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
A11
92
A7
94
A6
96
98
A4
100
A2
102
A0
104
106
108
110
S0#
112
114
116
118
120
NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
B
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDM0
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDM1
DDRB_CLK0 7
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDM2
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQ31
DDRB_CKE1
DDRB_SMA15
DDRB_SMA14
DDRB_SMA11
DDRB_SMA7
DDRB_SMA6
DDRB_SMA4
DDRB_SMA2
DDRB_SMA0
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDM6
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
DDRB_SDQ62
DDRB_SDQ63
R11 10K_0402_5%R11 10K_0402_5%
1 2
R9 10K_0402_5%R9 10K_0402_5%
1 2
DDRB_CLK0# 7
DDRB_CKE1 7
DDRB_SBS1# 7
DDRB_SRAS# 7
DDRB_SCS0# 7
DDRB_ODT0 7
DDRB_CLK1 7
DDRB_CLK1# 7
DDRB_SDQS3# 7
DDRB_SDQS3 7
DDRB_SDQS5# 7
DDRB_SDQS5 7
DDRB_SDQS7# 7
DDRB_SDQS7 7
+3VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
330U_X_2VM_R6M
330U_X_2VM_R6M
Place near to DIMM2
+V_DDR_MCH_REF
8J
8J
1
1
C202
C202
C198
1000P_0402_25V
1000P_0402_25V
C198
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
AMD recommend
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
C
C212
C212
@
@
+1.8V
1
C25
C25
2
@
@
1
+
+
2
+V_DDR_MCH_REF
22U_0805_6.3V6M
22U_0805_6.3V6M
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SMA[0..15]
DDRB_SMA4
DDRB_SMA0
DDRB_SMA2
DDRB_SRAS#
DDRB_SMA14
DDRB_SMA7
DDRB_SMA11
DDRB_SMA6
DDRB_SBS2#
DDRB_CKE0
DDRB_SMA15
DDRB_CKE1
DDRB_SMA3
DDRB_SMA8
DDRB_SMA9
DDRB_SMA12
DDRB_SBS0#
DDRB_SMA10
DDRB_SMA1
DDRB_SMA5
DDRB_SCAS#
DDRB_ODT1
DDRB_SCS1#
DDRB_SWE#
DDRB_SBS1#
DDRB_SCS0#
DDRB_ODT0
DDRB_SMA13
D
RP9
RP9
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP10
RP10
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP11
RP11
47_0804_8P4R_5%
47_0804_8P4R_5%
RP12
RP12
47_0804_8P4R_5%
47_0804_8P4R_5%
RP13
RP13
47_0804_8P4R_5%
47_0804_8P4R_5%
RP14
RP14
47_0804_8P4R_5%
47_0804_8P4R_5%
RP15
RP15
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
E
DDRB_SDQ[0..63] 7
DDRB_SDM[0..7] 7
DDRB_SMA[0..15]
+0.9V
18
27
36
45
18
27
36
45
18
27
36
45
18
27
36
45
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
12
C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z
1 2
C209 0.1U_0402_16V4ZC209 0.1U_0402_16V4Z
12
C197 0.1U_0402_16V4ZC197 0.1U_0402_16V4Z
1 2
C211 0.1U_0402_16V4ZC211 0.1U_0402_16V4Z
12
C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z
1 2
C213 0.1U_0402_16V4ZC213 0.1U_0402_16V4Z
12
C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z
1 2
C200 0.1U_0402_16V4ZC200 0.1U_0402_16V4Z
12
C206 0.1U_0402_16V4ZC206 0.1U_0402_16V4Z
1 2
C201 0.1U_0402_16V4ZC201 0.1U_0402_16V4Z
12
C210 0.1U_0402_16V4ZC210 0.1U_0402_16V4Z
1 2
C208 0.1U_0402_16V4ZC208 0.1U_0402_16V4Z
12
C194 0.1U_0402_16V4ZC194 0.1U_0402_16V4Z
1 2
C207 0.1U_0402_16V4ZC207 0.1U_0402_16V4Z
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
+1.8V
11 55Thursday, March 18, 2010
11 55Thursday, March 18, 2010
11 55Thursday, March 18, 2010
E
C
C
C
5
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
H_CADIN[0..15]
D D
C C
B B
Check AMD
H_CLKOP06
H_CLKON06
H_CLKOP16
H_CLKON16
A A
H_CTLOP06
H_CTLON06
H_CTLOP16
H_CTLON16 H_CTLIN1 6
1 2
301_0402_1%~D
Place within 1"
layout 4/8
301_0402_1%~D
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
U22A
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
H_CTLOP0
H_CTLON0
H_CTLOP1 H_CTLIP1
H_CTLON1
R67
R67
5
U22A
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
RS880M_FCBGA528
RS880M_FCBGA528
HT Link
When tune trace length, must
keep 1:4 on self-trace
H_CADOP[0..15] 6
H_CADON[0..15] 6
H_CADIP[0..15] 6
H_CADIN[0..15] 6
PCIE_GTX_C_MRX_P[0..15] 17
PCIE_GTX_C_MRX_N[0..15] 17
PCIE_MTX_C_GRX_P[0..15] 17
PCIE_MTX_C_GRX_N[0..15] 17
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
WLAN
LAN
4
PCIE_PTX_C_IRX_P037
PCIE_PTX_C_IRX_N037
PCIE_PTX_C_IRX_N131
SB_RX0P23
SB_RX0N23
SB_RX1P23
SB_RX1N23
SB_RX2P23
SB_RX2N23
SB_RX3P23
SB_RX3N23
H_CADIP0
D24
H_CADIN0
D25
H_CADIP1
E24
H_CADIN1
E25
H_CADIP2
F24
H_CADIN2
F25
H_CADIP3
F23
H_CADIN3
F22
H_CADIP4
H23
H_CADIN4
H22
H_CADIP5
J25
H_CADIN5
J24
H_CADIP6
K24
H_CADIN6
K25
H_CADIP7
K23
H_CADIN7
K22
H_CADIP8
F21
H_CADIN8
G21
H_CADIP9
G20
H_CADIN9
H21
H_CADIP10
J20
H_CADIN10
J21
H_CADIP11
J18
H_CADIN11
K17
H_CADIP12
L19
H_CADIN12
J19
H_CADIP13
M19
H_CADIN13
L18
H_CADIP14
M21
H_CADIN14
P21
H_CADIP15
P18
H_CADIN15
M18
H24
H25
L21
L20
H_CTLIP0
M24
H_CTLIN0
M25
P19
H_CTLIN1
R18
B24
B25
Place within 1"
layout 4/8
4
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
H_CLKIP0 6
H_CLKIN0 6
H_CLKIP1 6
H_CLKIN1 6
H_CTLIP0 6
H_CTLIN0 6
H_CTLIP1 6
R79
R79
1 2
301_0402_1%~D
301_0402_1%~D
3
U22B
U22B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS880M_FCBGA528
RS880M_FCBGA528
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
3
PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_P0
A5
B5
PCIE_MTX_GRX_P1
A4
PCIE_MTX_GRX_N1 PCIE_MTX_C_GRX_N1
B4
PCIE_MTX_GRX_P2
C3
PCIE_MTX_GRX_N2
B2
PCIE_MTX_GRX_P3
D1
PCIE_MTX_GRX_N3
D2
PCIE_MTX_GRX_P4
E2
PCIE_MTX_GRX_N4
E1
PCIE_MTX_GRX_P5
F4
PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_N5
F3
PCIE_MTX_GRX_P6
F1
PCIE_MTX_GRX_N6
F2
PCIE_MTX_GRX_P7
H4
PCIE_MTX_GRX_N7 PCIE_MTX_C_GRX_N7
H3
PCIE_MTX_GRX_P8
H1
PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_N8
H2
PCIE_MTX_GRX_P9
J2
PCIE_MTX_GRX_N9
J1
PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_P10
K4
PCIE_MTX_GRX_N10
K3
PCIE_MTX_GRX_P11
K1
PCIE_MTX_GRX_N11
K2
PCIE_MTX_GRX_P12
M4
PCIE_MTX_GRX_N12
M3
PCIE_MTX_GRX_P13
M1
PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N13
M2
PCIE_MTX_GRX_P14
N2
PCIE_MTX_GRX_N14
N1
PCIE_MTX_GRX_P15
P1
PCIE_MTX_GRX_N15 PCIE_MTX_C_GRX_N15
P2
PCIE_ITX_PRX_P0
AC1
PCIE_ITX_PRX_N0
AC2
PCIE_ITX_PRX_P1
AB4
PCIE_ITX_PRX_N1
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
SB_TX0P_C
AD7
SB_TX0N_C
AE7
SB_TX1P_C
AE6
SB_TX1N_C
AD6
SB_TX2P_C
AB6
SB_TX2N_C
AC6
SB_TX3P_C
AD5
SB_TX3N_C
AE5
AC8
AB8
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C646 0.1U_0402_16V7KC646 0.1U_0402_16V7K
C648 0.1U_0402_16V7KC648 0.1U_0402_16V7K
C650 0.1U_0402_16V7KC650 0.1U_0402_16V7K
C652 0.1U_0402_16V7KC652 0.1U_0402_16V7K
C655 0.1U_0402_16V7KC655 0.1U_0402_16V7K
C657 0.1U_0402_16V7KC657 0.1U_0402_16V7K
C660 0.1U_0402_16V7KC660 0.1U_0402_16V7K
C641 0.1U_0402_16V7KC641 0.1U_0402_16V7K
C636 0.1U_0402_16V7KC636 0.1U_0402_16V7K
C635 0.1U_0402_16V7KC635 0.1U_0402_16V7K
C633 0.1U_0402_16V7KC633 0.1U_0402_16V7K
C630 0.1U_0402_16V7KC630 0.1U_0402_16V7K
C627 0.1U_0402_16V7KC627 0.1U_0402_16V7K
C623 0.1U_0402_16V7KC623 0.1U_0402_16V7K
C624 0.1U_0402_16V7KC624 0.1U_0402_16V7K
C619 0.1U_0402_16V7KC619 0.1U_0402_16V7K
C600 0.1U_0402_16V7KC600 0.1U_0402_16V7K
C601 0.1U_0402_16V7KC601 0.1U_0402_16V7K
C602 0.1U_0402_16V7KC602 0.1U_0402_16V7K
C605 0.1U_0402_16V7KC605 0.1U_0402_16V7K
C259 0.1U_0402_16V7KC259 0.1U_0402_16V7K
C272 0.1U_0402_16V7KC272 0.1U_0402_16V7K
C254 0.1U_0402_16V7KC254 0.1U_0402_16V7K
C252 0.1U_0402_16V7KC252 0.1U_0402_16V7K
C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K
C261 0.1U_0402_16V7KC261 0.1U_0402_16V7K
C248 0.1U_0402_16V7KC248 0.1U_0402_16V7K
C275 0.1U_0402_16V7KC275 0.1U_0402_16V7K
R29 1.27K_0402_1%R29 1.27K_0402_1%
1 2
R32 2K_0402_1%R32 2K_0402_1%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2
2
C647 0.1U_0402_16V7KC647 0.1U_0402_16V7K
1 2
C649 0.1U_0402_16V7KC649 0.1U_0402_16V7K
1 2
C651 0.1U_0402_16V7KC651 0.1U_0402_16V7K
1 2
C653 0.1U_0402_16V7KC653 0.1U_0402_16V7K
1 2
C654 0.1U_0402_16V7KC654 0.1U_0402_16V7K
1 2
C656 0.1U_0402_16V7KC656 0.1U_0402_16V7K
1 2
C659 0.1U_0402_16V7KC659 0.1U_0402_16V7K
1 2
C642 0.1U_0402_16V7KC642 0.1U_0402_16V7K
1 2
C638 0.1U_0402_16V7KC638 0.1U_0402_16V7K
1 2
C637 0.1U_0402_16V7KC637 0.1U_0402_16V7K
1 2
C634 0.1U_0402_16V7KC634 0.1U_0402_16V7K
1 2
C631 0.1U_0402_16V7KC631 0.1U_0402_16V7K
1 2
C629 0.1U_0402_16V7KC629 0.1U_0402_16V7K
1 2
C625 0.1U_0402_16V7KC625 0.1U_0402_16V7K
1 2
C620 0.1U_0402_16V7KC620 0.1U_0402_16V7K
1 2
C621 0.1U_0402_16V7KC621 0.1U_0402_16V7K
1 2
PCIE_ITX_C_PRX_P0 37
PCIE_ITX_C_PRX_N0 37
PCIE_ITX_C_PRX_P1 31PCIE_PTX_C_IRX_P131
PCIE_ITX_C_PRX_N1 31
SB_TX0P 23
SB_TX0N 23
SB_TX1P 23
SB_TX1N 23
SB_TX2P 23
SB_TX2N 23
SB_TX3P 23
SB_TX3N 23
+1.1VS
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
1
PCIE_MTX_C_GRX_N0PCIE_MTX_GRX_N0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P15
WLAN
LAN
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
12 55Thursday, March 18, 2010
12 55Thursday, March 18, 2010
12 55Thursday, March 18, 2010
1
C
C
C
of
5
4
3
2
1
+NB_HTPVDD+1.8VS
L10
L10
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
C78
C78
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
D D
C C
For EMI request
B B
+1.8VS
+1.8VS
+1.1VS
CLK_NB_14.318M16
LDT_STOP#8,23
LDT_STP# (SB)
Output, OD
L24
L24
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
L5
L5
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
L50
L50
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
C400
C400
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
@
@
1 2
C691
C691
22P_0402_50V8J
22P_0402_50V8J
R85 0_0402_5%R85 0_0402_5%
1 2
<20mA>
1
2
+VDDA18HTPLL
<20mA>
1
C266
C266
2
+VDDA18PCIEPLL
<120mA>
1
C31
C31
2
+NB_PLLVDD
<65mA>
1
2
CLK_NB_14.318M
@
@
1 2
R637
R637
10_0402_5%
10_0402_5%
NB_LDTSTOP#
LDTSTOP# (NB)
In Lagcy mode: Input, 1.8V signal can be used
In CLMC mode: Output, OD
+1.1VS
1 2
R58
R58
4.7K_0402_5%
4.7K_0402_5%
+1.8VS
PLT_RST#15,17,23,31,34,37
NB_PWRGD24
NB_PGRGD (SB)
Output, OD
POWER_SEL48
+1.8VS
1 2
HCB1608KF-221T20_0603
HCB1608KF-221T20_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1 2
R43
R43
4.7K_0402_5%
4.7K_0402_5%
HIGH 0.95V
+3VS
L23
L23
1 2
HCB1608KF-221T20_0603
HCB1608KF-221T20_0603
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
L25
L25
1
C267
C267
2
GMCH_CRT_HSYNC15
GMCH_CRT_VSYNC15
10mil within 1 inch
R319 0_0402_5%R319 0_0402_5%
+1.8VS
CLK_SBLINK_BCLK16
CLK_SBLINK_BCLK#16
+3VS
R327 10K_0402_5%
R327 10K_0402_5%
POWER_SEL
POWER_SEL
1.1VLOW
L8
L8
1 2
HCB1608KF-221T20_0603
HCB1608KF-221T20_0603
+AVDD2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C265
C265
2
+AVDDQ
<4mA>
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
R59 715_0402_1%R59 715_0402_1%
+NB_PLLVDD
+NB_HTPVDD
+VDDA18HTPLL
+VDDA18PCIEPLL
1 2
1 2
R326 300_0402_5%R326 300_0402_5%
CLK_NBHT16
CLK_NBHT#16
CLK_NBGFX16
CLK_NBGFX#16
@
@
12
R552 2K_0402_1%R552 2K_0402_1%
+AVDD1
22U_0805_6.3V6M
22U_0805_6.3V6M
C74
C74
1 2
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
CLK_NB_14.318M
1 2
1 2
R320 0_0402_5%@R320 0_0402_5%@
AUX_CAL15
Strap pin
<110mA>
C40
C40
1
2
1
2
<20mA>
+NB_PLLVDD
+NB_HTPVDD
NB_RESET#
U22C
U22C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N(NC)
A8
DDC_CLK0/AUX0P(NC)
B7
DDC_CLK1/AUX1P(NC)
A7
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS880M_FCBGA528
RS880M_FCBGA528
PART 3 OF 6
PART 3 OF 6
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
LVTM
LVTM
PM
PM
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
SUS_STAT#(PWM_GPIO5)
+1.8VS
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L3P(NC)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
TMDS_HPD(NC)
HPD(NC)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
D9
D10
D12
AE8
AD8
D13
<15mA>
<300mA>
1.8K_0402_5%
1.8K_0402_5%
+VDDLTP18
+VDDLT18
T23PAD T23PAD
@
@
R328 10K_0402_5%
R328 10K_0402_5%
1 2
R48 0_0402_5%R48 0_0402_5%
1 2
R343
R343
+VDDLTP18
+VDDLT18
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
1
C115
C115
2
SUS_STAT# 24
SUS_STAT_R# 15
L68
L68
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
1
C449
C449
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
1
C455
C455
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Strap Pin
+1.8VS
L67
L67
+1.8VS
Change as 1K_5% ohm
R28
R28
for Tigris
1K_0402_5%
Unpop for Tigris
R3 0_0402_5%@R3 0_0402_5%@
CPU_LDT_REQ#8
A A
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ALLOW_LDTSTOP23
2009/09/25 2010/09/25
2009/09/25 2010/09/25
2009/09/25 2010/09/25
3
1 2
SB: I/ OD
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
1K_0402_5%
1 2
R553 0_0402_5%R553 0_0402_5%
1 2
ALLOW_LDTSTOP (NB)
In Lagcy mode: Output,OD
In CLMC mode: Input, 1.8Vsignal can be used
NB_ALLOW_LDTSTOP
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
1
of
13 55Thursday, March 18, 2010
13 55Thursday, March 18, 2010
13 55Thursday, March 18, 2010
C
C
C
5
U22F
U22F
A25
VSSAHT1
D23
E22
G22
G24
G25
H19
J22
L17
D D
C C
B B
A A
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
U22D
U22D
AB12
MEM_A0(NC)
AE16
MEM_A1(NC)
V11
MEM_A2(NC)
AE15
MEM_A3(NC)
AA12
MEM_A4(NC)
AB16
MEM_A5(NC)
AB14
MEM_A6(NC)
AD14
MEM_A7(NC)
AD13
MEM_A8(NC)
AD15
MEM_A9(NC)
AC16
MEM_A10(NC)
AE13
MEM_A11(NC)
AC14
MEM_A12(NC)
Y14
MEM_A13(NC)
AD16
MEM_BA0(NC)
AE17
MEM_BA1(NC)
AD17
MEM_BA2(NC)
W12
MEM_RASb(NC)
Y12
MEM_CASb(NC)
AD18
MEM_WEb(NC)
AB13
MEM_CSb(NC)
AB18
MEM_CKE(NC)
V14
MEM_ODT(NC)
V15
MEM_CKP(NC)
W14
MEM_CKN(NC)
AE12
MEM_COMPP(NC)
AD12
MEM_COMPN(NC)
RS880M_FCBGA528
RS880M_FCBGA528
RS880M_FCBGA528
RS880M_FCBGA528
PART 6/6
PART 6/6
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
PAR 4 OF 6
PAR 4 OF 6
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
GROUND
GROUND
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DM1/DVO_D8(NC)
IOPLLVDD18(NC)
MEM_VREF(NC)
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
MEM_DQ4(NC)
MEM_DM0(NC)
IOPLLVDD(NC)
IOPLLVSS(NC)
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
+1.8VS
1 2
R351 0_0402_5%R351 0_0402_5%
4
+1.1VS
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
C52
C52
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+1.8VS
+1.1VS
L14
L14
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
L22
L22
L21
L21
12
L9
L9
12
22U_0805_6.3V6M
22U_0805_6.3V6M
12
22U_0805_6.3V6M
22U_0805_6.3V6M
12
C154
C154
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
C53
C53
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C108
C108
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C257
C257
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C262
C262
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C37
C37
2
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C249
C249
C131
C131
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C219
C219
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C130
C130
C258
C258
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C58
C58
C55
C55
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VS
C398
C398
1U_0402_6.3V4Z
1U_0402_6.3V4Z
3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C253
C253
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C264
C264
C273
C273
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C171
C171
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C56
C56
2
2
1
2
+VDDHT
1
C126
C126
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VDDHTRX
0.68A
1
2
+VDDHTTX
1
C255
C255
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VDDA18PCIE
1
C62
C62
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
0_0402_5%
0_0402_5%
within 15mil
R82
R82
<680mA>
<680mA>
<700mA>
<10mA>
U22E
U22E
J17
VDDHT_1
K16
VDDHT_2
L16
VDDHT_3
M16
VDDHT_4
P16
VDDHT_5
R16
VDDHT_6
T16
VDDHT_7
H18
VDDHTRX_1
G19
VDDHTRX_2
F20
VDDHTRX_3
E21
VDDHTRX_4
D22
VDDHTRX_5
B23
VDDHTRX_6
A23
VDDHTRX_7
AE25
VDDHTTX_1
AD24
VDDHTTX_2
AC23
VDDHTTX_3
AB22
VDDHTTX_4
AA21
VDDHTTX_5
Y20
VDDHTTX_6
W19
VDDHTTX_7
V18
VDDHTTX_8
U17
VDDHTTX_9
T17
VDDHTTX_10
R17
VDDHTTX_11
P17
VDDHTTX_12
M17
VDDHTTX_13
J10
VDDA18PCIE_1
P10
VDDA18PCIE_2
K10
VDDA18PCIE_3
M10
VDDA18PCIE_4
L10
VDDA18PCIE_5
W9
VDDA18PCIE_6
H9
VDDA18PCIE_7
T10
VDDA18PCIE_8
R10
VDDA18PCIE_9
Y9
VDDA18PCIE_10
AA9
VDDA18PCIE_11
AB9
VDDA18PCIE_12
AD9
VDDA18PCIE_13
AE9
VDDA18PCIE_14
U10
VDDA18PCIE_15
F9
VDD18_1
G9
VDD18_2
AE11
VDD18_MEM1(NC)
AD11
VDD18_MEM2(NC)
RS880M_FCBGA528
RS880M_FCBGA528
PART 5/6
PART 5/6
2
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
POWER
POWER
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
<2.5A>
+VDDA11PCIE
<60mA>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
L16
L16
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
@ L7
@
L6
@L6
@
12
L7
12
12
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
C19 22U_0805_6.3V6M
C19 22U_0805_6.3V6M
C15 22U_0805_6.3V6M
C15 22U_0805_6.3V6M
C42 1U_0402_6.3V4ZC42 1U_0402_6.3V4Z
C59 1U_0402_6.3V4ZC59 1U_0402_6.3V4Z
C44 1U_0402_6.3V4ZC44 1U_0402_6.3V4Z
C38 1U_0402_6.3V4ZC38 1U_0402_6.3V4Z
C51 0.1U_0402_16V4ZC51 0.1U_0402_16V4Z
C43 0.1U_0402_16V4ZC43 0.1U_0402_16V4Z
+1.1VS +NB_CORE
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
+1.1VS
<10A>
C570.1U
C570.1U
1
1
C1100.1U_0402_16V4Z C1100.1U_0402_16V4Z
C1120.1U_0402_16V4Z C1120.1U_0402_16V4Z
2
2
_0402_16V4Z
_0402_16V4Z
1
C93
C93
2
1
1
C1230.1U_0402_16V4Z C1230.1U_0402_16V4Z
2
2
C61
C61
C800.1U_0402_16V4Z C800.1U_0402_16V4Z
1
1
C2560.1U_0402_16V4Z C2560.1U_0402_16V4Z
C2150.1U
C2150.1U
2
2
_0402_16V4Z
_0402_16V4Z
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
1
C2180.1U
C2180.1U
2
2
_0402_16V4Z
_0402_16V4Z
1
C2510.1U_0402_16V4Z C2510.1U_0402_16V4Z
2
+3VS
C2022U_0805_6.3V6M
C2022U_0805_6.3V6M
C1822U_0805_6.3V6M
C1822U_0805_6.3V6M
C10
C10
2
2
1
1
1
+
+
2
330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
5
4
Security Classification
Security Classification
Security Classification
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
14 55Thursday, March 18, 2010
14 55Thursday, March 18, 2010
14 55Thursday, March 18, 2010
1
C
C
C
5
4
3
2
1
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
D D
GMCH_CRT_VSYNC13
12
R341 3K_0402_5%R341 3K_0402_5%
12
R337 3K_0402_5%@R337 3K_0402_5%@
+3VS
Enables the Test Debug Bus using GPIO. (VSYNC)
1 : Disable (RS880)
0 : Enable (Rs880)
DFT_GPIO1: LOAD_EEPROM_STRAPS
AUX_CAL13
RS880M DFT_GPIO1
C C
SUS_STAT_R#13 PLT_RST# 13,17,23,31,34,37
1 2
R315 150_0402_1%@R315 150_0402_1%@
@
@
2 1
D22 CH751H-40PT_SOD323-2
D22 CH751H-40PT_SOD323-2
RS880 use HSYNC to enable SIDE PORT
GMCH_CRT_HSYNC13
12
R332 3K_0402_5%R332 3K_0402_5%
@
@
12
R331 3K_0402_5%
R331 3K_0402_5%
+3VS
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS740/RX780/RS880M: DFT_GPIO1 RS880M:SUS_STAT
RS880 use HSYNC to enable SIDE PORT
RS740/RS780/RS880M: Enables Side port memory ( RS880M use HSYNC#)
0. Enable (RS880M)
1 : Disable(RS880M)
B B
A A
5
4
Security Classification
Security Classification
Security Classification
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
15 55Thursday, March 18, 2010
15 55Thursday, March 18, 2010
15 55Thursday, March 18, 2010
1
of
C
C
C
5
+1.2V_HT
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
D D
27M_SEL
SEL_HTT66
SEL_SATA
C C
1 2
0 configure as SRC_7 output
0 configure as SRC_7 output
* default
1
*0
1*
0
* default
LAN request
MiniCard1 request
External 14MHz CLK
for SB710
B B
+VDDCLK_IO
L30
L30
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C260
C260
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
configure as 27M and 27M_SS outputSEL_27M 1
configure as 27M and 27M_SS output1*
configure as single-ended 66MHz output
configure as differential 100MHz output
SS 100M SATA SRC6 output
SS 100M SATA SRC6 output
LAN_CLKREQ#31
MINI1_CLKREQ#37
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
CLK_NB_14.318M13
1
C298
C142
C142
CLK_14M_SB23
C298
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS_CLK
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
8.2K_0402_5%
8.2K_0402_5%
1 2
R495
R495
+3VS_CLK
CLK_48M_SD33
CLK_48M_USB24
1
C293
C293
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
22U_0805_6.3V6M
22U_0805_6.3V6M
+3VS_CLK
+3VS_CLK
8.2K_0402_5%
8.2K_0402_5%
1 2
R490
R490
R223 8.2K_0402_5%R223 8.2K_0402_5%
1 2
R109 33_0402_5%R109 33_0402_5%
1 2
1 2
R178 90.9_0402_1%R178 90.9_0402_1%
NB CLOCK INPUT TABLE
NB CLOCKS
HT_REFCLKP
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLK
GPP_REFCLK
GPPSB_REFCLK 100M DIFF 100M DIFF
A A
RS740 RX780 RS780
66M SE(SINGLE END)
NC
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
NC NC vref
100M DIFF
NC
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF
100M DIFF(IN/OUT)*
NC
33P_0402_50V8J
33P_0402_50V8J
5
14.31818MHZ_20P_6X1430004201
14.31818MHZ_20P_6X1430004201
C290
C290
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
L36
L36
+3VS
FBM-L11-160808-800LMT_0603
FBM-L11-160808-800LMT_0603
Y4
Y4
1
2
1
C280
C280
C277
C277
C135
C135
2
+3VS_CLKVDDA
1
1
C161
C161
2
2
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VDDCLK_IO
+3VS_CLK
L35
L35
1 2
1 2
C282 2.2U_0603_6.3V4Z@C282 2.2U_0603_6.3V4Z@
1 2
C281 0.1U_0402_16V4ZC281 0.1U_0402_16V4Z
1 2
R179 158_0402_1%R179 158_0402_1%
R194 33_0402_5%R194 33_0402_5%
R193 33_0402_5%R193 33_0402_5%
CLK_XTAL_OUT
CLK_XTAL_IN
12
FUJICOM
1
C288
C288
33P_0402_50V8J
33P_0402_50V8J
2
4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C263
C263
2
C141
C141
0.1U_0402_16V4Z
0.1U_0402_16V4Z
27M_SEL
SEL_SATA
SEL_HT66
CLK_48M_0
12
CLK_48M_1
12
CLK_XTAL_IN
CLK_XTAL_OUT
3
+3VS
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
U15
U15
ICS 9LPRS488
49
48
62
66
12
18
28
37
53
3
17
29
38
44
54
61
69
24
51
50
43
42
63
64
65
71
70
67
68
6
11
19
27
36
47
52
58
72
73
ICS 9LPRS488
VDDA
GNDA
VDDREF
GNDREF
VDDSRC_IO
VDDSRC_IO
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO
VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDD48
CLKREQ0 #
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#
REF2/SEL_27
REF1/SEL_SATA
REF0/SEL_HTT66
48MHz_0
48MHz_1
X1
X2
GNDDOT
GNDSRC
GNDSRC
GNDATIG
GNDSB_SRC
GNDSATA
GNDCPU
GNDHTT
GND48
GNDPAD
ICS9LPRS488AKLFT_MLF72_10x10
ICS9LPRS488AKLFT_MLF72_10x10
+3VS_CLK
L31
L31
SMBCLK
SMBDAT
SB_SRC_SLOW#
CPUKG0T_LPRS
CPUKG0C_LPRS
HTT0T_LPRS / 66 M
HTT0C_LPRS / 66 M
SB_SRC0T_LPRS
SB_SRC0C_LPRS
SB_SRC1T_LPRS
SB_SRC1C_LPRS
ATIG0T_LPRS
ATIG0C_LPRS
ATIG1T_LPRS
ATIG1C_LPRS
ATIG2T_LPRS
ATIG2C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
SRC5T_LPRS
SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
SRC7T_LPRS/27MHz_SS
SRC7C_LPRS/27MHz_NS
Main--SLG8SP626VTR-SA00001Z310
1
C367
C367
22U_0805_6.3V6M
22U_0805_6.3V6M
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
41
56
55
60
59
40
39
35
34
33
32
31
30
26
25
23
22
21
20
16
15
14
13
10
9
8
7
46
45
5
4
57
PD#
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
1
2
1
C138
C138
SRC_SLOW
CLK_VGA
CLK_VGA#
C299
C299
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C278
C278
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CLK_CPU
CLK_CPU#
CLK_HTT
CLK_HTT#
CLK_ATIG0
CLK_ATIG0#
CLK_SRC0
CLK_SRC0#
CLK_SRC2
CLK_SRC2#
CLK_SRC4
CLK_SRC4#
CLK_SRC6
CLK_SRC6#
27M_SSC_R
27M_NSSC_R
R173 8.2K_0402_5%R173 8.2K_0402_5%
R170 0_0402_5%R170 0_0402_5%
R168 0_0402_5%R168 0_0402_5%
R175 0_0402_5%R175 0_0402_5%
R172 0_0402_5%R172 0_0402_5%
R174 0_0402_5%R174 0_0402_5%
R176 0_0402_5%R176 0_0402_5%
R177
R177
R203 0_0402_5%R203 0_0402_5%
R189 0_0402_5%R189 0_0402_5%
R190 0_0402_5%R190 0_0402_5%
R197 0_0402_5%R197 0_0402_5%
R196 0_0402_5%R196 0_0402_5%
R200 0_0402_5%R200 0_0402_5%
R199 0_0402_5%R199 0_0402_5%
R163 0_0402_5%R163 0_0402_5%
R164 0_0402_5%R164 0_0402_5%
R166 0_0402_5%
R166 0_0402_5%
R165 0_0402_5%R165 0_0402_5%
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C404
C404
2
SB_CK_SCLK 10,11,24,37
SB_CK_SDAT 10,11,24,37
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
@
@
1 2
1 2
+3VS_CLK
1
C295
C295
2
0_0402_5%
0_0402_5%
2
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Second--ICS9LPRS488CKLFT-SA000023H10
Security Classification
Security Classification
Security Classification
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C274
C274
2
R169
R169
261_0402_1%@
261_0402_1%@
1 2
CLK_NBHT 13
CLK_NBHT# 13
CLK_NBGFX 13
CLK_NBGFX# 13
CLK_PCIE_VGA 17
CLK_PCIE_VGA# 17
CLK_PCIE_LAN 31
CLK_PCIE_LAN# 31
CLK_PCIE_MINI1 37
CLK_PCIE_MINI1# 37
CLK_SBLINK_BCLK 13
CLK_SBLINK_BCLK# 13
CLK_SBSRC_BCLK 23
CLK_SBSRC_BCLK# 23
27M_SSC 18
27M_NSSC 18
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C160
C160
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
C140
C140
1
2
C268
C268
1
C294
C294
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C297
C297
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1U CLOSE PIN 69
+3VS_CLK
12
R161
R161
8.2K_0402_5%
CLK_CPU_BCLK 8
CLK_CPU_BCLK# 8
NB HTT
8.2K_0402_5%
CPU
8.2K_0402_5%
8.2K_0402_5%
R111
R111
12
@
@
+3VS_CLK
SRC_SLOW
NB GFX
VGA
R112
R112
8.2K_0402_5% @
8.2K_0402_5% @
R187
R187
@
@
8.2K_0402_5%
8.2K_0402_5%
1 2
1 2
LAN
R182
R182
8.2K_0402_5%
8.2K_0402_5%
@
@
8.2K_0402_5%
8.2K_0402_5%
1 2
1 2
MiniCard
NB A LINK
LANSRC 0
SRC 1
MINI1 (WLAN)
SB RCLK
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
401836
401836
401836
SRC 2
SRC 3
SRC 4
NB-Alink
SRC 5
SRC 6
SB-Alink
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
16 55Thursday, March 18, 2010
16 55Thursday, March 18, 2010
16 55Thursday, March 18, 2010
1
R188
R188
of
SEL_SATA
SEL_HT66
C
C
C
5
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PLT_RST#13,15,23,31,34,37
PCIE_GTX_C_MRX_P[0..15]12
D D
PCIE_GTX_C_MRX_N[0..15]12
PCIE_MTX_C_GRX_P[0..15]12
PCIE_MTX_C_GRX_N[0..15]12
C C
B B
4
U88A
U88A
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2 PEG_NRX_C_GTX_P2 PCIE_GTX_C_MRX_P2
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P0
CLK_PCIE_VGA16
CLK_PCIE_VGA#16
R578
R578
12
0_0402_5%
0_0402_5%
CLK_PCIE_VGA
CLK_PCIE_VGA#
For Future ASIC Pin
N10 need pull down
10K_0402_5%@
10K_0402_5%@
R468
R468
12
C645 10P_0402_50V8J@C645 10P_0402_50V8J@
AF30
PCIE_RX0P
AE31
PCIE_RX0N
AE29
PCIE_RX1P
AD28
PCIE_RX1N
AD30
PCIE_RX2P
AC31
PCIE_RX2N
AC29
PCIE_RX3P
AB28
PCIE_RX3N
AB30
PCIE_RX4P
AA31
PCIE_RX4N
AA29
PCIE_RX5P
Y28
PCIE_RX5N
Y30
PCIE_RX6P
W31
PCIE_RX6N
W29
PCIE_RX7P
V28
PCIE_RX7N
V30
PCIE_RX8P
U31
PCIE_RX8N
U29
PCIE_RX9P
T28
PCIE_RX9N
T30
PCIE_RX10P
R31
PCIE_RX10N
R29
PCIE_RX11P
P28
PCIE_RX11N
P30
PCIE_RX12P
N31
PCIE_RX12N
N29
PCIE_RX13P
M28
PCIE_RX13N
M30
PCIE_RX14P
L31
PCIE_RX14N
L29
PCIE_RX15P
K30
PCIE_RX15N
CLOCK
CLOCK
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
L9
NC#1
N9
12
NC#2
N10
NC_PWRGOOD
AL27
PERSTB
216-0728018 A12 M92-S2 XT FCBGA 0FA
216-0728018 A12 M92-S2 XT FCBGA 0FA
3
C595 0.1U_0402_16V7KC595 0.1U_0402_16V7K
AH30
PCIE_TX0P
AG31
PCIE_TX0N
AG29
PCIE_TX1P
AF28
PCIE_TX1N
AF27
PCIE_TX2P
AF26
PCIE_TX2N
AD27
PCIE_TX3P
AD26
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
AC25
AB25
Y23
Y24
AB27
AB26
PEG_NRX_C_GTX_N8 PCIE_GTX_C_MRX_N8
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
PEG_NRX_C_GTX_N1 PCIE_GTX_C_MRX_N1
P24
P23
PEG_NRX_C_GTX_N0 PCIE_GTX_C_MRX_N0
M27
PEG_NRX_C_GTX_P0 PCIE_GTX_C_MRX_P0
N26
R467 1.27K_0402_1%R467 1.27K_0402_1%
Y22
AA22
1 2
R469 2K_0402_1%R469 2K_0402_1%
1 2
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
1 2
C596 0.1U_0402_16V7KC596 0.1U_0402_16V7K
C597 0.1U_0402_16V7KC597 0.1U_0402_16V7K
1 2
C598 0.1U_0402_16V7KC598 0.1U_0402_16V7K
C599 0.1U_0402_16V7KC599 0.1U_0402_16V7K
1 2
C608 0.1U_0402_16V7KC608 0.1U_0402_16V7K
C609 0.1U_0402_16V7KC609 0.1U_0402_16V7K
1 2
C607 0.1U_0402_16V7KC607 0.1U_0402_16V7K
C613 0.1U_0402_16V7KC613 0.1U_0402_16V7K
1 2
C606 0.1U_0402_16V7KC606 0.1U_0402_16V7K
C700 0.1U_0402_16V7KC700 0.1U_0402_16V7K
1 2
C702 0.1U_0402_16V7KC702 0.1U_0402_16V7K
C696 0.1U_0402_16V7KC696 0.1U_0402_16V7K
1 2
C612 0.1U_0402_16V7KC612 0.1U_0402_16V7K
C697 0.1U_0402_16V7KC697 0.1U_0402_16V7K
1 2
C610 0.1U_0402_16V7KC610 0.1U_0402_16V7K
C611 0.1U_0402_16V7KC611 0.1U_0402_16V7K
1 2
C643 0.1U_0402_16V7KC643 0.1U_0402_16V7K
C615 0.1U_0402_16V7KC615 0.1U_0402_16V7K
1 2
C614 0.1U_0402_16V7KC614 0.1U_0402_16V7K
C699 0.1U_0402_16V7KC699 0.1U_0402_16V7K
1 2
C616 0.1U_0402_16V7KC616 0.1U_0402_16V7K
C617 0.1U_0402_16V7KC617 0.1U_0402_16V7K
1 2
C618 0.1U_0402_16V7KC618 0.1U_0402_16V7K
C622 0.1U_0402_16V7KC622 0.1U_0402_16V7K
1 2
C626 0.1U_0402_16V7KC626 0.1U_0402_16V7K
C701 0.1U_0402_16V7KC701 0.1U_0402_16V7K
1 2
C639 0.1U_0402_16V7KC639 0.1U_0402_16V7K
C640 0.1U_0402_16V7KC640 0.1U_0402_16V7K
1 2
C628 0.1U_0402_16V7KC628 0.1U_0402_16V7K
C698 0.1U_0402_16V7KC698 0.1U_0402_16V7K
1 2
C644 0.1U_0402_16V7KC644 0.1U_0402_16V7K
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
+1.1VS
1
PCIE LANE REVERSALPCIE LANE REVERSAL
PCIE_GTX_C_MRX_N15PEG_NRX_C_GTX_N15
PCIE_GTX_C_MRX_P15PEG_NRX_C_GTX_P15
PCIE_GTX_C_MRX_N14PEG_NRX_C_GTX_N14
PCIE_GTX_C_MRX_P14PEG_NRX_C_GTX_P14
PCIE_GTX_C_MRX_N13PEG_NRX_C_GTX_N13
PCIE_GTX_C_MRX_P13PEG_NRX_C_GTX_P13
PCIE_GTX_C_MRX_N12PEG_NRX_C_GTX_N12
PCIE_GTX_C_MRX_P12PEG_NRX_C_GTX_P12
PCIE_GTX_C_MRX_N11PEG_NRX_C_GTX_N11
PCIE_GTX_C_MRX_P11PEG_NRX_C_GTX_P11
PCIE_GTX_C_MRX_N10PEG_NRX_C_GTX_N10
PCIE_GTX_C_MRX_P10PEG_NRX_C_GTX_P10
PCIE_GTX_C_MRX_N9PEG_NRX_C_GTX_N9
PCIE_GTX_C_MRX_P9PEG_NRX_C_GTX_P9
PCIE_GTX_C_MRX_P8PEG_NRX_C_GTX_P8
PCIE_GTX_C_MRX_N7PEG_NRX_C_GTX_N7
PCIE_GTX_C_MRX_P7PEG_NRX_C_GTX_P7
PCIE_GTX_C_MRX_N6PEG_NRX_C_GTX_N6
PCIE_GTX_C_MRX_P6PEG_NRX_C_GTX_P6
PCIE_GTX_C_MRX_N5PEG_NRX_C_GTX_N5
PCIE_GTX_C_MRX_P5PEG_NRX_C_GTX_P5
PCIE_GTX_C_MRX_N4PEG_NRX_C_GTX_N4
PCIE_GTX_C_MRX_P4PEG_NRX_C_GTX_P4
PCIE_GTX_C_MRX_N3PEG_NRX_C_GTX_N3
PCIE_GTX_C_MRX_P3PEG_NRX_C_GTX_P3
PCIE_GTX_C_MRX_N2PEG_NRX_C_GTX_N2
PCIE_GTX_C_MRX_P1PEG_NRX_C_GTX_P1
For ESD Request
A A
5
4
Security Classification
Security Classification
Security Classification
2009/09/25 2010/09/25
2009/09/25 2010/09/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2009/09/25 2010/09/25
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC MB A5992
SCHEMATIC MB A5992
SCHEMATIC MB A5992
401836
401836
401836
1
17 55Thursday, March 18, 2010
17 55Thursday, March 18, 2010
17 55Thursday, March 18, 2010
C
C
C
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