Acer Aspire 5516, Aspire 5517, Aspire 5063, Aspire 5561, eMachines E625 Schematics

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ZZZ1
ZZZ1
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B
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PCB
PCB
2 2
Compal Confidential
KAWG0 Schematics Document
AMD S1g1 / RS690MC / SB600
2009 / 04 / 09
3 3
Rev:1.0
4 4
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2005/05/09 2009/06/11
2005/05/09 2009/06/11
2005/05/09 2009/06/11
C
Deciphered Date
Deciphered Date
Deciphered Date
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
E
of
146Friday, April 10, 2009
146Friday, April 10, 2009
146Friday, April 10, 2009
D
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1
Compal confidential
Project Code: KAWG0 File Name : LA-4861P
D D
Thermal Sensor ADM1032ARM
page 8 page 17
Clock Generator ICS951462
CRT
page 24
LCD CONN
page 25
PCIE X1
AMD S1g1 CPU
638P PGA
H_A#(3..31) H_D#(0..63)
page 6,7,8,9
HT 16x16 1000MHZ
ATI-RS690MC
465 BGA
page 12,13,14,15,16
A-Link Express
4 x PCIE
DDRII DDRII-SO-DIMM X2
533/667
page 10,11
Dual Channel
SIG1 : 35mm x 35mm x (2.20mm+2.11mm) 638pin AM2 : 40mm x 40mm x (4.56mm+2.11mm) 940pin
RS485 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin RS690 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin
SB460 : 27mm x 27mm (21.6mm x 21.6mm) x2.33mm 549pin SB600 : 23mm x 23mm (21.6mm x 21.6mm) x2.33mm 549pin
C C
BT Conn
HD Audio
page 38
HDA Codec ALC272
Mini card WLAN
10/100 LAN AR8114
page 26page 31
ATI-SB600
549 BGA
page 18,19,20,21,22
MDC Conn.
RJ45 CONN
page 27
SATA0
HDD Conn.
LPC BUS
B B
Camera
page 39
page 41
page 23
USB conn X2
AMP & Audio Jack
TPA6017
page 40
CardReader RT5159
HeadPhone Out
MIC In
SATA2
ODD Conn.
USB 2.0
page 23
Power On/Off CKT / LID switch / Power OK CKT
page 37
ENE KB926
Ver:D2
page 28
Second HDD/ODD
DC/DC Interface CKT.
page 41
CIR/LED
page 38
RTC CKT.
page 18
Int. KBD
page 29
SATA1
HDD Conn.
Touch Pad
Power Circuit DC/DC
page 42~48
CONN.
page 29
SPI BIOS
page 30
SATA3
ODD Conn.
A A
Security Classification
Security Classification
5
4
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/08 2009/06/11
2005/03/08 2009/06/11
2005/03/08 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
246Tuesday, April 14, 2009
246Tuesday, April 14, 2009
246Tuesday, April 14, 2009
1
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Voltage Rails
Power Plane Description
D D
C C
VIN B+ +CPU_CORE +0.9V 0.9V switched power rail for DDR terminator +1.2V_HT +1.5VS +1.8VALW 1.8V always on power rail ON ON ON* +1.8V 1.8V power rail for DDR +1.8VS 1.8V switched power rail +2.5VS +3VALW +3VS +5VALW +5VS
Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU
1.2V switched power rail
1.5V switched power rail
2.5V switched power rail
3.3V always on power rail
3.3V switched power rail 5V always on power rail 5V switched power rail
4
S1 S3 S5
N/A N/A N/A
ON OFF ON ON ON OFF OFF ON OFF OFF
ON ON OFF ON ON ON ON ON OFF ON ON+RTCVCC
ON OFF OFF ON OFF ON OFF
ONRTC power
N/AN/AN/A OFF OFF
OFF
OFF ON* OFF ON*
ON*ONVSB always on power rail+VSB ON
3
SIGNAL
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3#
HIGH HIGH HIGH HIGH
LOW
LOW
LOW LOW LOW LOW
SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH
LOW
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
Board ID
0 1 2 3 4 5 6 7NC
100K +/- 5%Ra/Rc/Re
Rb / Rd / Rf V min
0
8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%
AD_BID
0 V
0.216 V 0.250 V 0.289 V
0.436 V
0.712 V
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V
2
LOWLOWLOW
ON
ON
HIGHHIGHHIGH
HIGH
HIGH
V typ
AD_BID
ON
ON
ON
ON
OFF
ON
OFF
ON
V
0 V 0 V
0.503 V
0.819 V
1.185 V 1.264 V
2.200 V
3.300 V
ON ON
ON
OFF
OFF
OFF
AD_BID
0.538 V
0.875 V
2.341 V
3.300 V
1
LOW
OFF
OFF
OFF
max
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
BOARD ID Table
Board ID
0 1 2 3 4 5 6
PCB Revision
0.1
0.2
0.3
1.0
BTO Option Table
BTO Item BOM Structure NC Function NC@ 10/100 Lan 8114@ GIGA Lan 8132@ 17" ID 17@ 15" ID 15@
7
B B
EC SM Bus1 address
Device
Smart Battery
Address Address
EC SM Bus2 address
Device
ADM1032
1001 100X b0001 011X b
SKU ID Table
SKU ID
0
SKU
1 2 3 4 5
SB600 SM Bus 1 address
Device
Clock Generator
A A
(ICS951462) DDR DIMM0 DDR DIMM2 Wireless Lan
Address
1101 001Xb
1001 000Xb 1001 010Xb
5
SB600 SM Bus 2 address
Device Address
New Card
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
6 7
Compal Secret Data
Compal Secret Data
2005/03/08 2009/06/11
2005/03/08 2009/06/11
2005/03/08 2009/06/11
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
346Tuesday, April 14, 2009
346Tuesday, April 14, 2009
346Tuesday, April 14, 2009
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CPU CLK 200MHZ
CPU S1G1 SOCKET
DDR_A_CLK[1..2]
DDR_B_CLK[1..2]
DIMMA
DIMMB
H_CLKO[1:0]H_CLKI[1:0] Host Bus
C C
14.31818MHz
EXTERNAL CLK GEN. ICS951462
SBLINK_CLK 100MHZ
NBSRC_CLK 100MHZ
HTREFCLK 66MHZ
NB_OSC
14.318MHZ
ATI NB RS690
B B
CLK_PCIE_MINI
100MHZ
CLK_PCIE_LAN
100MHZ
SB_OSCIN
14.318MHZ
SBSRC_CLKP 100MHZ
CLK_48M_USB 48MHZ
ATI SB SB600
CLK_PCI_LPC
33MHZ
EC ENE KB926D2
Mini PCI Socket Mini card
A A
5
LAN Atheros AR8114
32.768K Hz
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
446Tuesday, April 14, 2009
446Tuesday, April 14, 2009
446Tuesday, April 14, 2009
1
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3
25M Hz
Compal Secret Data
Compal Secret Data
2005/10/10 2009/06/11
2005/10/10 2009/06/11
2005/10/10 2009/06/11
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
32.768K Hz
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
1
LDO Regulator
BATTERY
BATTERY
11.1V
2.2Ah/6-cell
D D
AC ADAPTOR 19V 65W
CHARGER MAX1908ETI
B+
CPU_B+
B+
C C
B+
CPU core PWM MAX8774GTL
+1.2VALW +1.8VALW PWM ISL6227CAZ-T
+3VALW +5VALW PWM MAX8734AEEI
+1.2VALW
+1.8VALW
+1.8VALW
+3VALW
+CPU_CORE
MOSFET SI4856ADY
MOSFET SI4856ADY
MOSFET SI4856ADY
MOSFET SI4800BDY
+1.2V_HT
+1.8V
+1.8VS
LDO Regulator APL5331KAC
+1.2VALW
+0.9V
+3VS
CM8562IS
+1.2V_HT
+1.8V
+1.8VS
+3VALW
+5VALW
SWITCH SI4800BDY
+5VS
+2.5VS
+CPU_CORE
+1.8V
+0.9V
+1.2V_HT
+1.8V
+0.9V
VDDA 2.5V 250mA
0.9V
VDD VDDIO VTT VLDT
0.95V
1.8V
0.9V
1.2V
18.89A 3A 750mA
0.5A
DDRII SODIMMX2
VDD_MEM
VTT_MEM
1.8V
0.9V
6.08A
0.5A
RS690MC
VDD_CORE VDDA_12 VDD_HT VDD_PLL PLLVDD12 AVDDQ AVDDDI VDD_18 VDDR LPVDD LVDDR18D PLLVDD18 HTPVDD AVDD VDDR3 LVDDR33
5A
2.5A 800mA 50mA 70mA 150mA 150mA 200mA 100mA 20mA 150mA 150mA 200mA 100mA 70mA 180mA
1.2V
1.8V
3.3V
CPU
SYSTEM MEMORY
NB
+5VALW
SB600
AMD S1G1 socket
B B
FAN Control APL5605
+5VS 500mA
+3VS
USB Power Switch G528
+5V
LDO Regulator CM8562IS
+1.5V
+4.75V
LDO Regulator G9191
+3VALW
VDD S5_1.2V
AVDDCK_1.2V
PCIE_PVDD PCIE_VDDR
AVDD_SATA PLLVDD_SATA USB_PHY_1.2V
VDDQ
S5_3.3V AVDDCK_3.3V XTLVDD_SATA
AVDDC
LCD panel
15.6"
A A
B+ 300mA +3.3 350mA
Mini Card
+1.5VS 500mA +3.3VS 1A +3.3VALW 330mA
Realtek RTS5159
+3.3VS 300mA
EC ENE KB926
+3.3VS 3mA +3.3VALW 30mA
Audio Codec ALC272
+4.75V 45mA +3.3VS 25mA
Audio AMP TPA6017A2
+5V 25mA
LAN Atheros AR8114
+3.3V 201mA
CLOCK GEN ICS951462
+3.3V 400mA
USB X2
+5V Dual
1.5A
SATA
+5V 3A +3.3V
RTC Bettary
AVDD TX/RX
CPU_PWR
VBAT
500mA 80mA 40mA 35mA 450mA 300mA 65mA 90mA 150mA 15mA 10mA 5mA 15mA
0.5A 10mA
1.2V
3.3V
1.8V
2.5~
3.3V
SB
Security Classification
Security Classification
5
4
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/10/10 2009/06/11
2005/10/10 2009/06/11
2005/10/10 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
546Tuesday, April 14, 2009
546Tuesday, April 14, 2009
546Tuesday, April 14, 2009
1
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D D
H_CADIP[0..15]12
H_CADIP[0..15] H_CADIN[0..15]
H_CADOP[0..15] H_CADON[0..15]
H_CADOP[0..15] 12 H_CADON[0..15] 12H_CADIN[0..15]12
+1.2V_HT
D4
VLDT_A3
H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0
H_CTLIP0
D3
VLDT_A2
D2
VLDT_A1
D1
VLDT_A0
N5
L0_CADIN_H15
P5
L0_CADIN_L15
M3
L0_CADIN_H14
M4
L0_CADIN_L14
L5
L0_CADIN_H13
M5
L0_CADIN_L13
K3
L0_CADIN_H12
K4
L0_CADIN_L12
H3
L0_CADIN_H11
H4
L0_CADIN_L11
G5
L0_CADIN_H10
H5
L0_CADIN_L10
F3
L0_CADIN_H9
F4
L0_CADIN_L9
E5
L0_CADIN_H8
F5
L0_CADIN_L8
N3
L0_CADIN_H7
N2
L0_CADIN_L7
L1
L0_CADIN_H6
M1
L0_CADIN_L6
L3
L0_CADIN_H5
L2
L0_CADIN_L5
J1
L0_CADIN_H4
K1
L0_CADIN_L4
G1
L0_CADIN_H3
H1
L0_CADIN_L3
G3
L0_CADIN_H2
G2
L0_CADIN_L2
E1
L0_CADIN_H1
F1
L0_CADIN_L1
E3
L0_CADIN_H0
E2
L0_CADIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
FOX_PZ63823-284S-41F
FOX_PZ63823-284S-41F CONN@
CONN@
VLDT=500mA
C C
H_CLKIP112 H_CLKIN112 H_CLKIP012
+1.2V_HT
B B
AMD : 49.9 1% ATI : 51 1%
H_CLKIN012
R2 51_0402_1%
R2 51_0402_1% R3 51_0402_1%
R3 51_0402_1%
12 12
H_CTLIP012 H_CTLOP0 12 H_CTLIN012
JCPU1A
JCPU1A
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0
HTT Interface
HTT Interface
L0_CADOUT_L0 L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0
Athlon 64 S1 Processor Socket
AE5 AE4 AE3 AE2
T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1
Y4 Y3 Y1 W1
T5 R5
R2 R3
C84 4.7U_0805_10V4Z
C84 4.7U_0805_10V4Z
H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8 H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0
H_CTLOP0 H_CTLON0H_CTLIN0
1 2
H_CLKOP1 12 H_CLKON1 12 H_CLKOP0 12 H_CLKON0 12
H_CTLON0 12
Reserve when PVT
40mil
+VCC_FAN1
+VCC_FAN1
+5VS
12
D13
D13 1SS355_SOD323-2@
1SS355_SOD323-2@
1 2
10U_0805_10V4Z
10U_0805_10V4Z
1000P_0402_50V7K
1000P_0402_50V7K
for cos down
D4 BAS16_SOT23-3@D4 BAS16_SOT23-3@
C97
C97 1 2
C96
C96 1 2
JP12
JP12
1 2 3
CONN@
CONN@
ACES_85205-03001
ACES_85205-03001
LDO FAN
JP38
JP38
1
1
2
2
3
3
4
4
CONN@
CONN@
ACES_85205-0400
ACES_85205-0400
1 2
GND GND GND GND
+3VS
12
FAN1 Conn
8 7 6 5
+3VS
12
R37
R37 10K_0402_5%
10K_0402_5%
1
C91
C91 1000P_0402_50V7K
1000P_0402_50V7K
2
R40
R40 10K_0402_5%
10K_0402_5% @
@
FANPWN
+5VS
R247
R247 0_0603_5%
0_0603_5% @
@
+VCC_FAN1
EN_DFAN128
1 2
1 2
R733 0_0402_5%R733 0_0402_5%
FANPWM28
1
C760
C760
0.01U_0402_16V7K@
0.01U_0402_16V7K@
2
FAN_SPEED128
C92 10U_0805_10V4Z
C92 10U_0805_10V4Z
U1
U1
1
EN
2
VIN
3
VOUT
4
VSET
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
PWM FAN
+1.2V_HT
250 mil
A A
5
VLDT CAP.
1
C86
C86
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
2
C82
C82
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C90
C90
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
4
1
C89
C89
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
Near CPU Socket
1
C83
C83 180P_0402_50V8J
180P_0402_50V8J
2
1
C85
C85 180P_0402_50V8J
180P_0402_50V8J
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet of
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
646Tuesday, April 14, 2009
646Tuesday, April 14, 2009
646Tuesday, April 14, 2009
1
D
D
D
of
of
A
B
C
D
E
Processor DDR2 Memory Interface
DDR_B_D[63..0]11
DDR_B_DM[7..0]11 DDR_A_DM[7..0] 10
DDR_B_DQS711 DDR_B_DQS#711 DDR_B_DQS611 DDR_B_DQS#611 DDR_B_DQS511 DDR_B_DQS#511 DDR_B_DQS411 DDR_B_DQS#411 DDR_B_DQS311 DDR_B_DQS#311 DDR_B_DQS211 DDR_B_DQS#211 DDR_B_DQS111 DDR_B_DQS#111 DDR_B_DQS011 DDR_B_DQS#011
R4
R4
1K_0402_1%
1K_0402_1%
R5
R5
1K_0402_1%
1K_0402_1%
+1.8V
+1.8V
1 2
1 2
DDR_CS3_DIMMA#10 DDR_CS2_DIMMA#10 DDR_CS1_DIMMA#10 DDR_CS0_DIMMA#10
DDR_CS3_DIMMB#11 DDR_CS2_DIMMB#11 DDR_CS1_DIMMB#11 DDR_CS0_DIMMB#11
DDR_CKE1_DIMMB11 DDR_CKE0_DIMMB11 DDR_CKE1_DIMMA10 DDR_CKE0_DIMMA10
DDR_A_MA[15..0]10
1
1
C16
C16
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R7
R7
1 2
R6
R6
DDR_A_BS#210 DDR_A_BS#110 DDR_A_BS#010
DDR_A_RAS#10 DDR_A_CAS#10 DDR_A_WE#10
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
DDR_A_CLK2
DDR_A_CLK#2 DDR_A_CLK1
DDR_A_CLK#1
C100
C100
1000P_0402_50V7K
1000P_0402_50V7K
+CPU_M_VREF
TP1TP1
39.2_0402_1%
39.2_0402_1%
12
39.2_0402_1%
39.2_0402_1%
+CPU_M_VREF
VTT_SENSE
M_ZN M_ZP
DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA#
DDR_CS3_DIMMB# DDR_CS2_DIMMB# DDR_CS1_DIMMB# DDR_CS0_DIMMB#
DDR_CKE1_DIMMB DDR_CKE0_DIMMB DDR_CKE1_DIMMA DDR_CKE0_DIMMA
DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0
DDR_A_BS#2 DDR_A_BS#1 DDR_A_BS#0
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
1
C102
C102
1.5P_0402_50V8C
1.5P_0402_50V8C
2
1
C104
C104
1.5P_0402_50V8C
1.5P_0402_50V8C
2
JCPU1B
W17
M_VREF
Y10
VTT_SENSE
AE10
M_ZN
AF10
M_ZP
V19
MA0_CS_L3
J22
MA0_CS_L2
V22
MA0_CS_L1
T19
MA0_CS_L0
Y26
MB0_CS_L3
J24
MB0_CS_L2
W24
MB0_CS_L1
U23
MB0_CS_L0
H26
MB_CKE1
J23
MB_CKE0
J20
MA_CKE1
J21
MA_CKE0
K19
MA_ADD15
K20
MA_ADD14
V24
MA_ADD13
K24
MA_ADD12
L20
MA_ADD11
R19
MA_ADD10
L19
MA_ADD9
L22
MA_ADD8
L21
MA_ADD7
M19
MA_ADD6
M20
MA_ADD5
M24
MA_ADD4
M22
MA_ADD3
N22
MA_ADD2
N21
MA_ADD1
R21
MA_ADD0
K22
MA_BANK2
R20
MA_BANK1
T22
MA_BANK0
T20
MA_RAS_L
U20
MA_CAS_L
U21
MA_WE_L
CONN@ FOX_PZ63823-284S-41F
CONN@ FOX_PZ63823-284S-41F
Athlon 64 S1 Processor Socket
JCPU1B
DDR_B_CLK2
DDR_B_CLK#2 DDR_B_CLK1
DDR_B_CLK#1
+0.9V
D10
VTT1
C10
VTT2
B10
VTT3
AD10
VTT4
W10
VTT5
AC10
VTT6
AB10
VTT7
AA10
VTT8
A10
VTT9
DDR_A_CLK2
MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0
MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10
MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_BANK2 MB_BANK1 MB_BANK0
MB_RAS_L MB_CAS_L
MB_WE_L
1
2
1
2
Y16
DDR_A_CLK#2
AA16
DDR_A_CLK1
E16
DDR_A_CLK#1
F16
DDR_B_CLK2
AF18
DDR_B_CLK#2
AF17
DDR_B_CLK1
A17
DDR_B_CLK#1
A18
DDR_B_ODT1
W23
DDR_B_ODT0
W26
DDR_A_ODT1
V20
DDR_A_ODT0
U19
DDR_B_MA15
J25
DDR_B_MA14
J26
DDR_B_MA13
W25
DDR_B_MA12
L23
DDR_B_MA11
L25
DDR_B_MA10
U25
DDR_B_MA9
L24
DDR_B_MA8
M26
DDR_B_MA7
L26
DDR_B_MA6
N23
DDR_B_MA5
N24
DDR_B_MA4
N25
DDR_B_MA3
N26
DDR_B_MA2
P24
DDR_B_MA1
P26
DDR_B_MA0
T24
DDR_B_BS#2
K26
DDR_B_BS#1
T26
DDR_B_BS#0
U26
DDR_B_RAS#
U24
DDR_B_CAS#
V26
DDR_B_WE#
U22
C17
C17
1.5P_0402_50V8C
1.5P_0402_50V8C
C105
C105
1.5P_0402_50V8C
1.5P_0402_50V8C
MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1
MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1
DDRII Cmd/Ctrl//Clk
DDRII Cmd/Ctrl//Clk
DDR_A_CLK2 10 DDR_A_CLK#2 10 DDR_A_CLK1 10 DDR_A_CLK#1 10
DDR_B_CLK2 11 DDR_B_CLK#2 11 DDR_B_CLK1 11 DDR_B_CLK#1 11
DDR_B_ODT1 11 DDR_B_ODT0 11 DDR_A_ODT1 10 DDR_A_ODT0 10
DDR_B_MA[15..0] 11
DDR_B_BS#2 11 DDR_B_BS#1 11 DDR_B_BS#0 11
DDR_B_RAS# 11 DDR_B_CAS# 11 DDR_B_WE# 11
4 4
3 3
2 2
1 1
DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0
DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0
DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0
AD11
MB_DATA63
AF11
MB_DATA62
AF14
MB_DATA61
AE14
MB_DATA60
Y11
MB_DATA59
AB11
MB_DATA58
AC12
MB_DATA57
AF13
MB_DATA56
AF15
MB_DATA55
AF16
MB_DATA54
AC18
MB_DATA53
AF19
MB_DATA52
AD14
MB_DATA51
AC14
MB_DATA50
AE18
MB_DATA49
AD18
MB_DATA48
AD20
MB_DATA47
AC20
MB_DATA46
AF23
MB_DATA45
AF24
MB_DATA44
AF20
MB_DATA43
AE20
MB_DATA42
AD22
MB_DATA41
AC22
MB_DATA40
AE25
MB_DATA39
AD26
MB_DATA38
AA25
MB_DATA37
AA26
MB_DATA36
AE24
MB_DATA35
AD24
MB_DATA34
AA23
MB_DATA33
AA24
MB_DATA32
G24
MB_DATA31
G23
MB_DATA30
D26
MB_DATA29
C26
MB_DATA28
G26
MB_DATA27
G25
MB_DATA26
E24
MB_DATA25
E23
MB_DATA24
C24
MB_DATA23
B24
MB_DATA22
C20
MB_DATA21
B20
MB_DATA20
C25
MB_DATA19
D24
MB_DATA18
A21
MB_DATA17
D20
MB_DATA16
D18
MB_DATA15
C18
MB_DATA14
D14
MB_DATA13
C14
MB_DATA12
A20
MB_DATA11
A19
MB_DATA10
A16
MB_DATA9
A15
MB_DATA8
A13
MB_DATA7
D12
MB_DATA6
E11
MB_DATA5
G11
MB_DATA4
B14
MB_DATA3
A14
MB_DATA2
A11
MB_DATA1
C11
MB_DATA0
AD12
MB_DM7
AC16
MB_DM6
AE22
MB_DM5
AB26
MB_DM4
E25
MB_DM3
A22
MB_DM2
B16
MB_DM1
A12
MB_DM0
AF12
MB_DQS_H7
AE12
MB_DQS_L7
AE16
MB_DQS_H6
AD16
MB_DQS_L6
AF21
MB_DQS_H5
AF22
MB_DQS_L5
AC25
MB_DQS_H4
AC26
MB_DQS_L4
F26
MB_DQS_H3
E26
MB_DQS_L3
A24
MB_DQS_H2
A23
MB_DQS_L2
D16
MB_DQS_H1
C16
MB_DQS_L1
C12
MB_DQS_H0
B12
MB_DQS_L0
CONN@ FOX_PZ63823-284S-41F
CONN@ FOX_PZ63823-284S-41F
Athlon 64 S1 Processor Socket
JCPU1C
JCPU1C
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14
DDRII Data
DDRII Data
MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12
Y13 AB16 Y19 AC24 F24 E19 C15 E12
W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13
DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0
DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0
DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0
DDR_A_D[63..0] 10
DDR_A_DQS7 10 DDR_A_DQS#7 10 DDR_A_DQS6 10 DDR_A_DQS#6 10 DDR_A_DQS5 10 DDR_A_DQS#5 10 DDR_A_DQS4 10 DDR_A_DQS#4 10 DDR_A_DQS3 10 DDR_A_DQS#3 10 DDR_A_DQS2 10 DDR_A_DQS#2 10 DDR_A_DQS1 10 DDR_A_DQS#1 10 DDR_A_DQS0 10 DDR_A_DQS#0 10
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Title
Title
Title
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
401650
401650
401650
of
of
of
746Friday, April 10, 2009
746Friday, April 10, 2009
746Friday, April 10, 2009
E
D
D
D
5
A:Need to re-Link "SGN00000200"
CPU_PWRGD17
D D
C C
2200P_0402_50V7K
2200P_0402_50V7K
B B
A A
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
LDT_STOP#14,17
LDT_RST#17
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
C120
C120
CPU_PWRGD
12
R54
R54
R23
R23
R21
R21
1
2
A:PA_IXP600AD12
LDT_STOP# CPU_SIC
1 2
A:PA_IXP600AD12
LDT_RST#
1 2
A:PA_IXP600AD12
+3VS
C119
C119
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
U3
U3
1 CPU_THERMDA CPU_THERMDC
VDD
2
D+
3
ALERT#
D­THERM#4GND
ADM1032ARMZ-2REEL_MSOP8
ADM1032ARMZ-2REEL_MSOP8
F75383M_MSOP8
SMBus Address: 1001110X (b)
AMD: suggest DBREQ need pull high
+1.8V
R35220_0402_5%@ R35220_0402_5%@
R34220_0402_5%@ R34220_0402_5%@
R33220_0402_5%@ R33220_0402_5%@
12
12
R36220_0402_5% R36220_0402_5%
R38220_0402_5%@ R38220_0402_5%@
12
12
12
5
+2.5VS
150U_D2_6.3VM
150U_D2_6.3VM
CPUCLK16
8
SCLK
7
SDATA
6 5
JP3
JP3
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
2423 26
SAMTEC_ASP-68200-07
@SAMTEC_ASP-68200-07
@
C113
C113
CPUCLK#16
HDT Connector
4
L4
L4
1 2
FCM2012CF-800T06_2P
FCM2012CF-800T06_2P
1
+
+
2
3900P_0402_50V7K
3900P_0402_50V7K
1 2
C109
C109
12
R22
R22 169_0402_1%
169_0402_1%
1 2
C23 3900P_0402_50V7K
C23 3900P_0402_50V7K
EC_SMB_CK2 28 EC_SMB_DA2 28
HDT_RST#
4
U51
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
U51
4
+2.5VDDA
1
C116
C116
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
+1.2V_HT
+3VS
5
P
B
Y
A
G
3
VDDA=300mA
3300P_0402_50V7K
3300P_0402_50V7K
1
1
C118
C118
C22
C22
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
2
LDT_RST# CPU_PWRGD LDT_STOP#
R13 300_0402_5%
R13 300_0402_5%
R61 44.2_0402_1%R61 44.2_0402_1%
1 2
R16 44.2_0402_1%R16 44.2_0402_1%
CPU_VCC_SENSE44
CPU_CLKIN_SC_P CPU_CLKIN_SC_N
LDT_RST#
2 1
1 2
R61&R16 close to CPU within 1"
CPU_DBRDY CPU_TMS
CPU_TCK CPU_TDO CPU_TRST# CPU_TDI
CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1
SB_PWROK 17,28,33
3
JCPU1D
F8
VDDA2
F9
VDDA1
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
12
TP26TP26 TP3TP3
TP5TP5 TP30TP30 TP8TP8 TP28TP28 TP31TP31
CPU_THERMDC CPU_THERMDA
AF4
SIC
AF5
CPU_HTREF1 CPU_HTREF0
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SID
P6
HTREF1
R6
HTREF0
F6
VDD_FB_H
E6
VDD_FB_L
W9
VDDIO_FB_H
Y9
VDDIO_FB_L
A9
CLKIN_H
A8
CLKIN_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI TEST25_HE9TEST29_H
E8
TEST25_L
G9
TEST19
H10
TEST18
AA7
TEST13
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
THERMDC
W8
THERMDA
Y6
TEST3
AB6
TEST2
P20
RSVD0
P19
RSVD1
N20
RSVD2
N19
RSVD3
R26
RSVD4
R25
RSVD5
P22
RSVD6
R22
RSVD7
FOX_PZ63823-284S-41F
FOX_PZ63823-284S-41F CONN@
CONN@
3
JCPU1D
THERMTRIP_L
PROCHOT_L
VID5 VID4 VID3 VID2 VID1 VID0
CPU_PRESENT_L
PSI_L
DBREQ_L
TDO
TEST29_L
TEST24 TEST23
MISC
MISC
TEST22 TEST21 TEST20
TEST28_H TEST28_L
TEST27 TEST26 TEST10
TEST8
RSVD8 RSVD9
RSVD10 RSVD11
RSVD12 RSVD13 RSVD14
RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
CPU_THERMTRIP#_R
AF6
CPU_PROCHOT#_1.8
AC7
A5 C6 A6 A4 C5 B5
CPU_PRESENT#
AC6 A3
CPU_DBREQ#
E10
AE9
CPU_TEST29_H_FBCLKOUT_P
C9
CPU_TEST29_L_FBCLKOUT_N
C8
ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"
AE7 AD7 AE8 AB8 AF7
J7 H8 AF8
CPU_TEST26_BURNIN#
AE6 K8 C4
H16 B18
B3 C1
H6 G6 D5
R24 W18 R23 AA8 H18 H19
Compal Secret Data
Compal Secret Data
Compal Secret Data
CPU_VID5 44 CPU_VID4 44 CPU_VID3 44 CPU_VID2 44 CPU_VID1 44 CPU_VID0 44
PSI_L 44CPU_VSS_SENSE44
TP6TP6 TP7TP7 TP9TP9
CPU_TEST21_SCANEN
TP29TP29
CPU_THERMTRIP#_R H_THERMTRIP#
Deciphered Date
Deciphered Date
Deciphered Date
R53
R53
80.6_0402_1%
80.6_0402_1%
1 2
+1.8V
R8
R8
300_0402_5%
300_0402_5%
2
12
R52
R52 300_0402_5%
300_0402_5%
CPU_PROCHOT#_1.8
2
+1.8V
12
R18
R18 1K_0402_5%
1K_0402_5%
B
B
2
Q3
Q3
E
E
3 1
C
C
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
+1.8V
12
1
+1.8V
VID1: For compatibility
CPU_VID1 CPU_PRESENT# CPU_TEST26_BURNIN#
CPU_TEST21_SCANEN
+1.8V
R65 510_0402_5%
R65 510_0402_5%
R68 510_0402_5%
R68 510_0402_5% R69 300_0402_5%
R69 300_0402_5% R66 300_0402_5%
R66 300_0402_5%
+3VALW
12
R17
R17 10K_0402_5%
10K_0402_5%
+1.8V
@
@
B
B
E
E
3 1
MMBT3904_NL_SOT23-3@
MMBT3904_NL_SOT23-3@
+3VS
12
R19
R19
12
10K_0402_5%
10K_0402_5%
2
Q4
Q4
C
C
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
401650
401650
401650
Date: Sheet
Date: Sheet
Date: Sheet
1 2
R24 300_0402_5%
R24 300_0402_5%
1 2
R64 1K_0402_5%
R64 1K_0402_5%
1 2
R27 300_0402_5%
R27 300_0402_5%
1 2
R47 300_0402_5%
R47 300_0402_5%
CPU_TEST25_H_BYPASSCLK_H
12
CPU_TEST25_L_BYPASSCLK_L
12 12 12
+3VALW
E
E
3 1
H_THERMTRIP# 17
R20
R20
4.7K_0402_5%@
4.7K_0402_5%@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
12
R25
R25
1K_0402_5%@
1K_0402_5%@
B
B
2
Q2
Q2 MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
C
C
@
@
EC_THERM# 18,28
MAINPWON 39,41
1
with future processors
846Friday, April 10, 2009
846Friday, April 10, 2009
846Friday, April 10, 2009
D
D
D
of
of
of
5
VDD(+CPU_CORE) decoupling.
D D
C C
+CPU_CORE
1
+
+
2
+CPU_CORE
1
2
+CPU_CORE
1
2
C26
C26 330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
C33
C33 22U_0805_6.3V6M
22U_0805_6.3V6M
C129
C129
0.22U_0603_16V4Z
0.22U_0603_16V4Z
1
+
+
C32
C32 330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M @
@
2
Near CPU Socket
1
C36
C36 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C151
C151
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C34
C34 22U_0805_6.3V6M
22U_0805_6.3V6M
2
+CPU_CORE +CPU_CORE
1
C122
C122
0.01U_0402_25V7K
0.01U_0402_25V7K
2
1
+
+
C27
C27 330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
2
1
C35
C35 22U_0805_6.3V6M
22U_0805_6.3V6M
2
VDDIO decoupling.
+1.8V
1
C170
C170 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C181
C181 22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
B B
+1.8V
1
C157
C157
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
+1.8V +1.8V
1
C175
C175
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+1.8V
1
A A
2
Between CPU Socket and DIMM
1
C182
C182
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C159
C159
0.01U_0402_25V7K
0.01U_0402_25V7K
C76
C76
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C167
C167
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+1.8V
1
C124
C124
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C68
C68
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
2
1
2
180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>
C189
C189 180P_0402_50V8J
180P_0402_50V8J
C187
C187
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C147
C147
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C188
C188
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C136
C136 180P_0402_50V8J
180P_0402_50V8J
2
1
C132
C132
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
4
1
+
+
C28
C28 330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
2
1
C178
C178 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C47
C47 180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
2
1
C41
C41 22U_0805_6.3V6M
22U_0805_6.3V6M
2
Under CPU Socket
1
C156
C156 180P_0402_50V8J
180P_0402_50V8J
2
1
+
+
C162
C162 220U_D2_4VM_R15
220U_D2_4VM_R15
2
C29
C29 330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M
1
C190
C190 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C158
C158 180P_0402_50V8J
180P_0402_50V8J
2
3
+CPU_CORE +CPU_CORE
1
+
+
C30
C30 330U_D2E_2.5VM_R9M
330U_D2E_2.5VM_R9M @
@
2
1
C39
C39 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C128
C128 22U_0805_6.3V6M
22U_0805_6.3V6M
2
VTT decoupling.
+0.9V
1
2
+0.9V
1
2
C155
C155
4.7U_0805_10V4Z
4.7U_0805_10V4Z
C73
C73
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1
C146
C146
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Near CPU Socket Right side.
1
C70
C70
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
Near CPU Socket Left side.
1
2
1
2
AC4
VDD1
AD2
VDD2
G4
VDD3
H2
VDD4
J9
VDD5
J11
VDD6
J13
VDD7
K6
VDD8
K10
VDD9
K12
VDD10
K14
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
L11
VDD15
L13
VDD16
M2
VDD17
M6
VDD18
M8
VDD19
M10
VDD20
N7
VDD21
N9
VDD22
N11
VDD23
P8
VDD24
P10
VDD25
R4
VDD26
R7
VDD27
R9
VDD28
R11
VDD29
T2
VDD30
T6
VDD31
T8
VDD32
T10
VDD33
T12
VDD34
T14
VDD35
U7
VDD36
U9
VDD37
U11
VDD38
U13
VDD39
V6
VDD40
V8
VDD41
V10
VDD42
FOX_PZ63823-284S-41F
FOX_PZ63823-284S-41F CONN@
CONN@
Athlon 64 S1 Processor Socket
C66
C66
150U_D2_6.3VM
150U_D2_6.3VM
C184
C184
0.22U_0603_16V4Z
0.22U_0603_16V4Z
C127
C127
0.22U_0603_16V4Z
0.22U_0603_16V4Z
JCPU1E
JCPU1E
VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9
VDDIO10
Power
Power
VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27
+0.9V
Near Power Supply
1
C: Change to NBO CAP
+
+
2
1
C173
C173
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
1
C185
C185
0.22U_0603_16V4Z
0.22U_0603_16V4Z
2
V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16
H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25
2
+1.8V
1
C72
C72 1000P_0402_50V7K
1000P_0402_50V7K
2
1
C164
C164 1000P_0402_50V7K
1000P_0402_50V7K
2
1
C145
C145 1000P_0402_50V7K
1000P_0402_50V7K
2
1
C163
C163 1000P_0402_50V7K
1000P_0402_50V7K
2
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
FOX_PZ63823-284S-41F
FOX_PZ63823-284S-41F CONN@
CONN@
Athlon 64 S1 Processor Socket
Ground
Ground
1
C180
C180 180P_0402_50V8J
180P_0402_50V8J
2
1
C152
C152 180P_0402_50V8J
180P_0402_50V8J
2
JCPU1F
JCPU1F
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
1
C121
C121 180P_0402_50V8J
180P_0402_50V8J
2
1
C179
C179 180P_0402_50V8J
180P_0402_50V8J
2
1
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
1
of
of
of
946Friday, April 10, 2009
946Friday, April 10, 2009
946Friday, April 10, 2009
D
D
D
5
JDIMM2
DDR_A_D0
D D
C C
DDR_CKE0_DIMMA7 DDR_CS2_DIMMA#7
DDR_A_BS#27
DDR_A_BS#07 DDR_A_WE#7
DDR_A_CAS#7 DDR_CS1_DIMMA#7
DDR_A_ODT17
B B
A A
SB_CK_SDAT11,16,18,31
SB_CK_SCLK11,16,18,31
DDR_A_D1 DDR_A_DQS#0
DDR_A_DQS0 DDR_A_D2
DDR_A_D3 DDR_A_D8
DDR_A_D9 DDR_A_DQS#1
DDR_A_DQS1 DDR_A_D10
DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D22 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0_DIMMA DDR_CS2_DIMMA#
DDR_A_BS#2 DDR_A_MA12
DDR_A_MA9
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#
DDR_A_CAS# DDR_CS1_DIMMA#
DDR_A_ODT1 DDR_A_D32
DDR_A_D33 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34
DDR_A_D35 DDR_A_D40
DDR_A_D41 DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D47 DDR_A_D48
DDR_A_D49 DDR_A_D53
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51 DDR_A_D55
DDR_A_D56 DDR_A_D57
DDR_A_DM7 DDR_A_D58
DDR_A_D59 SB_CK_SDAT
SB_CK_SCLK
+3VS
1
C448
C448
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
5
JDIMM2
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
203
GND
FOX_AS0A426-M2RN-7F
FOX_AS0A426-M2RN-7F CONN@
CONN@
JAWD0 used
DIMM1 REV H:5.2mm (BOT)
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0 CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD
BA1 RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1 CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SAO
SA1
GND
4
C507 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90
A11
92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110
S0#
112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 204
4
DDR_A_D4 DDR_A_D5
DDR_A_DM0 DDR_A_D6
DDR_A_D7 DDR_A_D12
DDR_A_D13 DDR_A_DM1 DDR_A_CLK1
DDR_A_CLK#1 DDR_A_D14
DDR_A_D15
DDR_A_D20 DDR_A_D21
DDR_A_DM2
DDR_A_D23 DDR_A_D28
DDR_A_D29 DDR_A_DQS#3
DDR_A_DQS3 DDR_A_D30
DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15
DDR_A_MA14 DDR_A_MA11
DDR_A_MA7 DDR_A_MA6DDR_A_MA8
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#
DDR_A_ODT0 DDR_A_MA13
DDR_CS3_DIMMA# DDR_A_D36
DDR_A_D37 DDR_A_DM4 DDR_A_D38
DDR_A_D39 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D46
DDR_A_D52
DDR_A_CLK2 DDR_A_CLK#2
DDR_A_DM6 DDR_A_D54
DDR_A_D60 DDR_A_D61
DDR_A_DQS#7 DDR_A_DQS7
DDR_A_D62 DDR_A_D63
R12 10K_0402_5%R12 10K_0402_5%
1 2
R10 10K_0402_5%R10 10K_0402_5%
1 2
C507
1
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
DDR_A_CLK1 7 DDR_A_CLK#1 7
DDR_A_D[0..63]7 DDR_A_DM[0..7]7
DDR_A_DQS[0..7]7 DDR_A_MA[0..15]7
DDR_A_DQS#[0..7]7
DDR_CKE1_DIMMA 7
DDR_A_BS#1 7 DDR_A_RAS# 7 DDR_CS0_DIMMA# 7
DDR_A_ODT0 7
DDR_CS3_DIMMA# 7
DDR_A_CLK2 7 DDR_A_CLK#2 7
3
+1.8V+DIMM_VREF+1.8V+1.8V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C503
C503
3
12
R398
R398
1K_0402_1%
1K_0402_1%
12
R397
R397
1K_0402_1%
1K_0402_1%
DDR_A_D[0..63] DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_MA[0..15] DDR_A_DQS#[0..7]
Compal Secret Data
Compal Secret Data
2005/10/11 2009/06/11
2005/10/11 2009/06/11
2005/10/11 2009/06/11
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA2
DDR_CKE0_DIMMA DDR_CS2_DIMMA# DDR_A_BS#2 DDR_A_MA12
DDR_A_MA4 DDR_A_MA0 DDR_A_BS#1 DDR_CS0_DIMMA#
DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3
DDR_A_MA1 DDR_A_MA10 DDR_A_BS#0
DDR_A_WE# DDR_A_CAS# DDR_CS1_DIMMA# DDR_A_ODT1
DDR_A_RAS# DDR_A_ODT0 DDR_A_MA13 DDR_CS3_DIMMA#
DDR_CKE1_DIMMA DDR_A_MA15 DDR_A_MA14
2
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
1
401650
401650
401650
+1.8V
1
+0.9V
RP1
RP1
18
1 2
C81 0.1U_0402_16V4Z
C81 0.1U_0402_16V4Z
27 36
1 2
C139 0.1U_0402_16V4Z
C139 0.1U_0402_16V4Z
45
RP2
RP2
18 27 36 45
RP3
RP3
18 27 36 45
RP4
RP4
18 27 36 45
RP5
RP5
18 27 36 45
RP6
RP6
18 27 36 45
RP7
RP7
18 27 36 45
RP8
RP8
18 27 36 45
1 2
C192 0.1U_0402_16V4Z
C192 0.1U_0402_16V4Z
1 2
C88 0.1U_0402_16V4Z
C88 0.1U_0402_16V4Z
1 2
C117 0.1U_0402_16V4Z
C117 0.1U_0402_16V4Z
1 2
C144 0.1U_0402_16V4Z
C144 0.1U_0402_16V4Z
1 2
C114 0.1U_0402_16V4Z
C114 0.1U_0402_16V4Z
1 2
C95 0.1U_0402_16V4Z
C95 0.1U_0402_16V4Z
1 2
C193 0.1U_0402_16V4Z
C193 0.1U_0402_16V4Z
1 2
C125 0.1U_0402_16V4Z
C125 0.1U_0402_16V4Z
1 2
C103 0.1U_0402_16V4Z
C103 0.1U_0402_16V4Z
1 2
C99 0.1U_0402_16V4Z
C99 0.1U_0402_16V4Z
1 2
C107 0.1U_0402_16V4Z
C107 0.1U_0402_16V4Z
1 2
C98 0.1U_0402_16V4Z
C98 0.1U_0402_16V4Z
1 2
C101 0.1U_0402_16V4Z
C101 0.1U_0402_16V4Z
1 2
C191 0.1U_0402_16V4Z
C191 0.1U_0402_16V4Z
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
D
D
D
of
of
of
10 46Tuesday, April 14, 2009
10 46Tuesday, April 14, 2009
10 46Tuesday, April 14, 2009
5
4
3
2
1
+DIMM_VREF+1.8V+1.8V
+0.9V
RP9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C202
4.7U_0805_10V4Z
C202
JDIMM1
DDR_B_D0
D D
C C
DDR_CKE0_DIMMB7 DDR_CS2_DIMMB#7
DDR_B_BS#27
DDR_B_BS#07 DDR_B_WE#7
DDR_B_CAS#7 DDR_CS1_DIMMB#7
DDR_B_ODT17
B B
A A
SB_CK_SDAT10,16,18,31
SB_CK_SCLK10,16,18,31
DDR_B_D1 DDR_B_DQS#0
DDR_B_DQS0 DDR_B_D2
DDR_B_D3 DDR_B_D8
DDR_B_D9 DDR_B_DQS#1
DDR_B_DQS1 DDR_B_D10
DDR_B_D11
DDR_B_D16 DDR_B_D17
DDR_B_DQS#2 DDR_B_DQS2
DDR_B_D18 DDR_B_D22 DDR_B_D19
DDR_B_D24 DDR_B_D25
DDR_B_DM3
DDR_B_D26 DDR_B_D27
DDR_CKE0_DIMMB DDR_CS2_DIMMB#
DDR_B_BS#2 DDR_B_MA12
DDR_B_MA9
DDR_B_MA5 DDR_B_MA3 DDR_B_MA1
DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#
DDR_B_CAS# DDR_CS1_DIMMB#
DDR_B_ODT1 DDR_B_D32
DDR_B_D33 DDR_B_DQS#4
DDR_B_DQS4 DDR_B_D34
DDR_B_D35 DDR_B_D40
DDR_B_D41 DDR_B_DM5 DDR_B_D42
DDR_B_D43 DDR_B_D47 DDR_B_D48
DDR_B_D49 DDR_B_D53
DDR_B_DQS#6 DDR_B_DQS6
DDR_B_D50 DDR_B_D51 DDR_B_D55
DDR_B_D56 DDR_B_D57
DDR_B_DM7 DDR_B_D58
DDR_B_D59 SB_CK_SDAT
SB_CK_SCLK
+3VS
1
C21
C21
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
5
JDIMM1
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
GND
FOX_AS0A426-MARG-7F
FOX_AS0A426-MARG-7F CONN@
CONN@
2
VSS
4
DQ4
6
DQ5
8
VSS
10
DM0
12
VSS
14
DQ6
16
DQ7
18
VSS
20
DQ12
22
DQ13
24
VSS
26
DM1
28
VSS
30
CK0
32
CK0#
34
VSS
36
DQ14
38
DQ15
40
VSS
42
VSS
44
DQ20
46
DQ21
48
VSS
50
NC
52
DM2
54
VSS
56
DQ22
58
DQ23
60
VSS
62
DQ28
64
DQ29
66
VSS
68
DQS3#
70
DQS3
72
VSS
74
DQ30
76
DQ31
78
VSS
80
NC/CKE1
82
VDD
84
NC/A15
86
NC/A14
88
VDD
90
A11
92
A7
94
A6
96
VDD
98
A4
100
A2
102
A0
104
VDD
106
BA1
108
RAS#
110
S0#
112
VDD
114
ODT0
116
NC/A13
118
VDD
120
NC
122
VSS
124
DQ36
126
DQ37
128
VSS
130
DM4
132
VSS
134
DQ38
136
DQ39
138
VSS
140
DQ44
142
DQ45
144
VSS
146
DQS5#
148
DQS5
150
VSS
152
DQ46
154
DQ47
156
VSS
158
DQ52
160
DQ53
162
VSS
164
CK1
166
CK1#
168
VSS
170
DM6
172
VSS
174
DQ54
176
DQ55
178
VSS
180
DQ60
182
DQ61
184
VSS
186
DQS7#
188
DQS7
190
VSS
192
DQ62
194
DQ63
196
VSS
198
SAO
200
SA1
202
GND
JAWD0 used
DIMM2 REV H:9.2mm (BOT)
4
DDR_B_D4 DDR_B_D5
DDR_B_DM0 DDR_B_D6
DDR_B_D7 DDR_B_D12
DDR_B_D13 DDR_B_DM1 DDR_B_CLK1
DDR_B_CLK#1 DDR_B_D14
DDR_B_D15
DDR_B_D20 DDR_B_D21
DDR_B_DM2
DDR_B_D23 DDR_B_D28
DDR_B_D29 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D30
DDR_B_D31 DDR_CKE1_DIMMB DDR_B_MA15
DDR_B_MA14 DDR_B_MA11
DDR_B_MA7 DDR_B_MA6DDR_B_MA8
DDR_B_MA4 DDR_B_MA2 DDR_B_MA0
DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#
DDR_B_ODT0 DDR_B_MA13
DDR_CS3_DIMMB# DDR_B_D36
DDR_B_D37 DDR_B_DM4 DDR_B_D38
DDR_B_D39 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5 DDR_B_D46
DDR_B_D52
DDR_B_CLK2 DDR_B_CLK#2
DDR_B_DM6 DDR_B_D54
DDR_B_D60 DDR_B_D61
DDR_B_DQS#7 DDR_B_DQS7
DDR_B_D62 DDR_B_D63
R11 10K_0402_5%R11 10K_0402_5%
1 2
R9 10K_0402_5%R9 10K_0402_5%
1 2
4.7U_0805_10V4Z 1
2
DDR_B_CLK1 7 DDR_B_CLK#1 7
DDR_B_D[0..63]7 DDR_B_DM[0..7]7
DDR_B_DQS[0..7]7 DDR_B_MA[0..15]7
DDR_B_DQS#[0..7]7
DDR_CKE1_DIMMB 7
DDR_B_BS#1 7 DDR_B_RAS# 7 DDR_CS0_DIMMB# 7
DDR_B_ODT0 7
DDR_CS3_DIMMB# 7
DDR_B_CLK2 7 DDR_B_CLK#2 7
+3VS
C198
C198
1
2
DDR_B_D[0..63] DDR_B_DM[0..7] DDR_B_DQS[0..7] DDR_B_MA[0..15] DDR_B_DQS#[0..7]
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/10/11 2009/06/11
2005/10/11 2009/06/11
2005/10/11 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
DDR_B_MA2 DDR_B_MA0 DDR_B_BS#1 DDR_B_RAS#
DDR_B_MA11 DDR_B_MA7 DDR_B_MA6 DDR_B_MA4
DDR_CS2_DIMMB# DDR_B_BS#2 DDR_CKE0_DIMMB
DDR_B_MA5 DDR_B_MA8 DDR_B_MA9 DDR_B_MA12
DDR_B_BS#0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA3
DDR_B_ODT1 DDR_CS1_DIMMB# DDR_B_CAS# DDR_B_WE#
DDR_CS0_DIMMB# DDR_B_ODT0 DDR_B_MA13 DDR_CS3_DIMMB#
DDR_CKE1_DIMMB DDR_B_MA15 DDR_B_MA14
2
RP9
47_0804_8P4R_5%
47_0804_8P4R_5%
RP10
RP10
47_0804_8P4R_5%
47_0804_8P4R_5%
RP11
RP11
47_0804_8P4R_5%
47_0804_8P4R_5%
RP12
RP12
47_0804_8P4R_5%
47_0804_8P4R_5%
RP13
RP13
47_0804_8P4R_5%
47_0804_8P4R_5%
RP14
RP14
47_0804_8P4R_5%
47_0804_8P4R_5%
RP15
RP15
47_0804_8P4R_5%
47_0804_8P4R_5%
RP16
RP16
47_0804_8P4R_5%
47_0804_8P4R_5%
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
12
C196 0.1U_0402_16V4Z
C196 0.1U_0402_16V4Z
1 2
C209 0.1U_0402_16V4Z
C209 0.1U_0402_16V4Z
12
C197 0.1U_0402_16V4Z
C197 0.1U_0402_16V4Z
1 2
C211 0.1U_0402_16V4Z
C211 0.1U_0402_16V4Z
12
C205 0.1U_0402_16V4Z
C205 0.1U_0402_16V4Z
1 2
C213 0.1U_0402_16V4Z
C213 0.1U_0402_16V4Z
12
C199 0.1U_0402_16V4Z
C199 0.1U_0402_16V4Z
1 2
C200 0.1U_0402_16V4Z
C200 0.1U_0402_16V4Z
12
C206 0.1U_0402_16V4Z
C206 0.1U_0402_16V4Z
1 2
C201 0.1U_0402_16V4Z
C201 0.1U_0402_16V4Z
12
C210 0.1U_0402_16V4Z
C210 0.1U_0402_16V4Z
1 2
C208 0.1U_0402_16V4Z
C208 0.1U_0402_16V4Z
12
C194 0.1U_0402_16V4Z
C194 0.1U_0402_16V4Z
1 2
C207 0.1U_0402_16V4Z
C207 0.1U_0402_16V4Z
12
C212 0.1U_0402_16V4Z
C212 0.1U_0402_16V4Z
1 2
C195 0.1U_0402_16V4Z
C195 0.1U_0402_16V4Z
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
+1.8V
401650
401650
401650
1
11 46Tuesday, April 14, 2009
D
D
D
of
of
of
11 46Tuesday, April 14, 2009
11 46Tuesday, April 14, 2009
5
4
3
2
1
U39A
D D
C C
H_CADOP156 H_CADON156 H_CADOP146 H_CADON146 H_CADOP136 H_CADON136 H_CADOP126 H_CADON126 H_CADOP116 H_CADON116 H_CADOP106 H_CADON106 H_CADOP96 H_CADON96 H_CADOP86 H_CADON86
H_CADOP76 H_CADON76 H_CADOP66 H_CADON66 H_CADOP56 H_CADON56 H_CADOP46 H_CADON46 H_CADOP36 H_CADON36 H_CADOP26 H_CADON26 H_CADOP16 H_CADON16 H_CADOP06 H_CADON06
H_CLKOP16 H_CLKON16
H_CLKOP06 H_CLKON06
H_CTLOP06 H_CTLON06
+VDDHT_PKG
R382 49.9_0402_1%R382 49.9_0402_1% R380 49.9_0402_1%R380 49.9_0402_1%
1 2 1 2
H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8
H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0
H_CLKOP1 H_CLKON1
H_CLKOP0 H_CLKON0
H_CTLOP0 H_CTLON0
HT_RXCALP HT_RXCALN
U39A
R19
HT_RXCAD15P
R18
HT_RXCAD15N
R21
HT_RXCAD14P
R22
HT_RXCAD14N
U22
HT_RXCAD13P
U21
HT_RXCAD13N
U18
HT_RXCAD12P
U19
HT_RXCAD12N
W19
HT_RXCAD11P
W20
HT_RXCAD11N
AC21
HT_RXCAD10P
AB22
HT_RXCAD10N
AB20
HT_RXCAD9P
AA20
HT_RXCAD9N
AA19
HT_RXCAD8P
Y19
HT_RXCAD8N
T24
HT_RXCAD7P
R25
HT_RXCAD7N
U25
HT_RXCAD6P
U24
HT_RXCAD6N
V23
HT_RXCAD5P
U23
HT_RXCAD5N
V24
HT_RXCAD4P
V25
HT_RXCAD4N
AA25
HT_RXCAD3P
AA24
HT_RXCAD3N
AB23
HT_RXCAD2P
AA23
HT_RXCAD2N
AB24
HT_RXCAD1P
AB25
HT_RXCAD1N
AC24
HT_RXCAD0P
AC25
HT_RXCAD0N
W21
HT_RXCLK1P
W22
HT_RXCLK1N
Y24
HT_RXCLK0P
W25
HT_RXCLK0N
P24
HT_RXCTLP
P25
HT_RXCTLN
A24
HT_RXCALP
C24
HT_RXCALN
216MQA6AVA11FG_FCBGA465_RS690M
216MQA6AVA11FG_FCBGA465_RS690M
PART 1 OF 5
PART 1 OF 5
HT_TXCAD15P HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N
HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N
HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP HT_TXCTLN
HT_TXCALP HT_TXCALN
HYPER TRANSPORT I/F
HYPER TRANSPORT I/F
P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22
N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25
L21 L22
J24 J25
N23 P23
C25 D24
H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8
H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0
H_CLKIP1 H_CLKIN1
H_CLKIP0 H_CLKIN0
H_CTLIP0 H_CTLIN0
HT_TXCALP HT_TXCALN
1 2
100_0402_1%
100_0402_1%
RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA
R379
R379
H_CADIP15 6 H_CADIN15 6 H_CADIP14 6 H_CADIN14 6 H_CADIP13 6 H_CADIN13 6 H_CADIP12 6 H_CADIN12 6 H_CADIP11 6 H_CADIN11 6 H_CADIP10 6 H_CADIN10 6 H_CADIP9 6 H_CADIN9 6 H_CADIP8 6 H_CADIN8 6
H_CADIP7 6 H_CADIN7 6 H_CADIP6 6 H_CADIN6 6 H_CADIP5 6 H_CADIN5 6 H_CADIP4 6 H_CADIN4 6 H_CADIP3 6 H_CADIN3 6 H_CADIP2 6 H_CADIN2 6 H_CADIP1 6 H_CADIN1 6 H_CADIP0 6 H_CADIN0 6
H_CLKIP1 6 H_CLKIN1 6
H_CLKIP0 6 H_CLKIN0 6
H_CTLIP0 6 H_CTLIN0 6
B B
A A
Security Classification
Security Classification
5
4
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/08 2009/06/11
2005/03/08 2009/06/11
2005/03/08 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc. SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
12 46Tuesday, April 14, 2009
12 46Tuesday, April 14, 2009
12 46Tuesday, April 14, 2009
1
D
D
D
of
of
of
5
D D
WLAN LAN
C C
PCIE_MRX_PTX_P231 PCIE_MRX_PTX_N231
PCIE_MRX_C_PTX_P325 PCIE_MRX_C_PTX_N325
A-Link
A_MRX_STX_P217 A_MRX_STX_N217
A_MRX_STX_P317 A_MRX_STX_N317
A_MRX_STX_P017 A_MRX_STX_N017
A_MRX_STX_P117 A_MRX_STX_N117
4
PCIE_MRX_PTX_P2 PCIE_MRX_PTX_N2
PCIE_MRX_C_PTX_P3 PCIE_MRX_C_PTX_N3
A_MRX_STX_P2 A_MRX_STX_N2
A_MRX_STX_P3 A_MRX_STX_N3
A_MRX_STX_P0 A_MRX_STX_N0
A_MRX_STX_P1 A_MRX_STX_N1
AA14, AB14 NC for RS690
U39B
U39B
G5
GFX_RX0P
G4
GFX_RX0N
J8
GFX_RX1P
J7
GFX_RX1N
J4
GFX_RX2P
J5
GFX_RX2N
L8
GFX_RX3P
L7
GFX_RX3N
L4
GFX_RX4P
L5
GFX_RX4N
M8
GFX_RX5P
M7
GFX_RX5N
M4
GFX_RX6P
M5
GFX_RX6N
P8
GFX_RX7P
P7
GFX_RX7N
P4
GFX_RX8P
P5
GFX_RX8N
R4
GFX_RX9P
R5
GFX_RX9N
R7
GFX_RX10P
R8
GFX_RX10N
U4
GFX_RX11P
U5
GFX_RX11N
W4
GFX_RX12P
W5
GFX_RX12N
Y4
GFX_RX13P
Y5
GFX_RX13N
V9
GFX_RX14P
W9
GFX_RX14N
AB7
GFX_RX15P
AB6
GFX_RX15N
Y7
GPP_RX2P
AA7
GPP_RX2N
AB9
GPP_RX3P
AA9
GPP_RX3N
W11
GPP_RX0P(SB_RX2P)
W12
GPP_RX0N(SB_RX2N)
AA11
GPP_RX1P(SB_RX3P)
AB11
GPP_RX1N(SB_RX3N)
W14
SB_RX0P
W15
SB_RX0N
AB12
SB_RX1P
AA12
SB_RX1N
AA14
PCE_ISET(NC)
AB14
PCE_TXISET(NC)
216MQA6AVA11FG_FCBGA465_RS690M
216MQA6AVA11FG_FCBGA465_RS690M
PART 2 OF 5
PART 2 OF 5
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
3
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P
PCIE GFX I/F
PCIE GFX I/F
GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX0P(SB_TX2P)
GPP_TX0N(SB_TX2N)
GPP_TX1P(SB_TX3P)
GPP_TX1N(SB_TX3N)
SB_TX0P SB_TX0N
SB_TX1P
PCE_PCAL(PCE_CALRP) PCE_NCAL(PCE_CALRN)
SB_TX1N
J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2 T2 U1 V2 V1 V3 W3 W1 W2 Y2 AA1 AA2 AB2 AB1 AC1 AE3 AE4
PCIE_MTX_PRX_P2
AD4
PCIE_MTX_PRX_N2
AE5
PCIE_MTX_PRX_P3
AD5
PCIE_MTX_PRX_N3
AD6 AD8
A_MTX_SRX_N2
AE8
AD7
A_MTX_SRX_N3
AE7
AE9
A_MTX_SRX_N0
AD10 AC8
A_MTX_SRX_N1
AD9
R375 562_0402_1%R375 562_0402_1%
AD11 AE11
1 2
R376 2K_0402_1%R376 2K_0402_1%
1 2
R375:
R376:
C457 0.1U_0402_16V7KC457 0.1U_0402_16V7K
1 2
C458 0.1U_0402_16V7KC458 0.1U_0402_16V7K
1 2
C466 0.1U_0402_16V7KC466 0.1U_0402_16V7K
1 2
C467 0.1U_0402_16V7KC467 0.1U_0402_16V7K
1 2
C659 0.1U_0402_16V7KC659 0.1U_0402_16V7K
1 2
C660 0.1U_0402_16V7KC660 0.1U_0402_16V7K
1 2
C661 0.1U_0402_16V7KC661 0.1U_0402_16V7K
1 2
C662 0.1U_0402_16V7KC662 0.1U_0402_16V7K
1 2
C465 0.1U_0402_16V7KC465 0.1U_0402_16V7K
1 2
C464 0.1U_0402_16V7KC464 0.1U_0402_16V7K
1 2
C468 0.1U_0402_16V7KC468 0.1U_0402_16V7K
1 2
C469 0.1U_0402_16V7KC469 0.1U_0402_16V7K
1 2
150 Ohm FOR RS485 562 Ohm FOR RS690
82.5 Ohm FOR RS485 2KOhm FOR RS690
2
PCIE_MTX_C_PRX_P2 PCIE_MTX_C_PRX_N2
PCIE_MTX_C_PRX_P3 PCIE_MTX_C_PRX_N3
A_MTX_C_SRX_P2A_MTX_SRX_P2 A_MTX_C_SRX_N2
A_MTX_C_SRX_P3A_MTX_SRX_P3 A_MTX_C_SRX_N3
A_MTX_C_SRX_P0A_MTX_SRX_P0 A_MTX_C_SRX_N0
A_MTX_C_SRX_P1A_MTX_SRX_P1 A_MTX_C_SRX_N1
+VDDA12_PKG2
PCIE_MTX_C_PRX_P2 31 PCIE_MTX_C_PRX_N2 31
PCIE_MTX_C_PRX_P3 25 PCIE_MTX_C_PRX_N3 25
A_MTX_C_SRX_P2 17 A_MTX_C_SRX_N2 17
A_MTX_C_SRX_P3 17 A_MTX_C_SRX_N3 17
A_MTX_C_SRX_P0 17 A_MTX_C_SRX_N0 17
A_MTX_C_SRX_P1 17 A_MTX_C_SRX_N1 17
1
WLAN LAN
A-Link
RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA
B B
A A
Security Classification
Security Classification
5
4
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/03/08 2009/06/11
2005/03/08 2009/06/11
2005/03/08 2009/06/11
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
13 46Tuesday, April 14, 2009
13 46Tuesday, April 14, 2009
13 46Tuesday, April 14, 2009
1
D
D
D
of
of
of
5
+1.8VS
MBK2012121YZF_2P
MBK2012121YZF_2P
D D
MBK2012121YZF_2P
MBK2012121YZF_2P
1
+
+
C183
C183
150U_D2_6.3VM
150U_D2_6.3VM
C C
+1.2V_HT +PLLVDD12
B B
A A
2
+1.8VS
MBK2012121YZF_2P
MBK2012121YZF_2P
1 2
MBC1608121YZF_0603
MBC1608121YZF_0603
LVDS_ENVDD
1 2
R746 2.2K_0402_5%R746 2.2K_0402_5%
NB_PWROK
LVDS_ENBKL
1 2
R747 2.2K_0402_5%R747 2.2K_0402_5%
LVDS_ENVDD
LVDS_ENBKL
+3VS
+NB_AVDDQ
L52
L52
1 2
L53
L53
1 2
L56
L56
1 2
L70
L70
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
R49 4.7K_0402_5%R49 4.7K_0402_5% R51 4.7K_0402_5%R51 4.7K_0402_5% R50 4.7K_0402_5%@R50 4.7K_0402_5%@ R576 4.7K_0402_5%R576 4.7K_0402_5% R575 4.7K_0402_5%R575 4.7K_0402_5% R41 10K_0402_5%R41 10K_0402_5% R39 10K_0402_5%@R39 10K_0402_5%@
STRP_DATA set PowerPlay mode PWM output: won't support
1
C495
C495
10U_0805_10V4Z
10U_0805_10V4Z
@
@
2
+NB_PLLVDD
1
C499
C499
10U_0805_10V4Z
10U_0805_10V4Z
@
@
2
+NB_HTPVDD
10U_0805_10V4Z
10U_0805_10V4Z
1
C493
@ C493
@
2
C690
C690
2 1
2 1
R744 0_0402_5%@R744 0_0402_5%@
1 2
R745 0_0402_5%@R745 0_0402_5%@
1 2
1 2 1 2 1 2 1 2
5
2.2U_0805_10V6K
2.2U_0805_10V6K C489
C489
1
C485
C485
2
1U_0603_10V4Z
1U_0603_10V4Z
1
C498
C498
2
1U_0603_10V4Z
1U_0603_10V4Z
PLLVDD12=70mA
1
2
+3VS
5
P
B
Y
A
G
3
5
P
B
Y
A
G
3
12 12 12
1
1
C484
C484 1U_0603_10V4Z
1U_0603_10V4Z
2
2
AVSSQ_GND
1
C492
C492
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C488
C488
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1
C691
C691 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
C763
C763
0.1U_0402_16V4Z
0.1U_0402_16V4Z
ENVDD
4
U48
U48 NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
ENBKL
4
U49
U49 NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
ENVDD 24
ENBKL 28
EDID_LCD_CLK EDID_LCD_DAT
DDC_DATA VGA_DDC_CLK VGA_DDC_DATA
STRP_DATA
R74~R76 CLOSE TO NB
CRT_R23 CRT_G23 CRT_B23
+1.8VS
LDT_STOP#8,17
150_0402_1%
150_0402_1%
R568
R568
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
RS690 A11: This clock is needed even if External Graphic slot is not supported
4
+1.8VS
C186
C186
150U_D2_6.3VM
150U_D2_6.3VM
CRT_R CRT_G CRT_B
150_0402_1%
150_0402_1%
12
12
R76
R76
R75
R75
+3VS
10K_0402_5%
10K_0402_5%
12
B
B
2
Q27
Q27
E
E
3 1
C
C
A12 solved
NBSRC_CLKP16 NBSRC_CLKN16
R540 0_0805_5%R540 0_0805_5%
1 2
R541 0_0805_5%R541 0_0805_5%
1 2
R542 0_0805_5%R542 0_0805_5%
1 2
4
L44 MBK2012121YZF_2PL44 MBK2012121YZF_2P
1 2
1
+
+
1U_0603_10V4Z
1U_0603_10V4Z
2
150_0402_1%
150_0402_1%
12
R46
R46 1K_0402_5%
1K_0402_5%
12
R74
R74
AMD review: use AVSSQ_GND (1006)
ALLOW_LDTSTOP17
HTREFCLK16
NB_OSC16
SBLINK_CLKP16 SBLINK_CLKN16
LPVSS_GND
+NB_AVDDQ
AVSSQ_GND
NB_PWROK28,33
AVSSQ_GND
LVSSR_GND
+3VS +NB_AVDD
L43
L43
1 2
MBK2012121YZF_2P
MBK2012121YZF_2P
1U_0603_10V4Z
1U_0603_10V4Z
1
C490
C490
2
VGA_DDC_CLK23 VGA_DDC_DATA23
NB_RST#18,25,28,30,31
1 C496
C496
2.2U_0805_10V6K
2.2U_0805_10V6K
2
VGA_CRT_VSYNC23 VGA_CRT_HSYNC23
AVSSQ_GND
R73 2.7K_0402_5%@R73 2.7K_0402_5%@ R78 2.7K_0402_5%@R78 2.7K_0402_5%@ R60 2.7K_0402_5%@R60 2.7K_0402_5%@ R57 2.7K_0402_5%@R57 2.7K_0402_5%@ R58 2.7K_0402_5%@R58 2.7K_0402_5%@ R59 2.7K_0402_5%@R59 2.7K_0402_5%@
1
1
2
C487
C487
C483
C483
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+NB_AVDDDI
R386 715_0402_1%R386 715_0402_1%
+NB_PLLVDD
+NB_HTPVDD
R62 0_0402_5%R62 0_0402_5%
R383 10K_0402_5%R383 10K_0402_5%
1 2 1 2 1 2 1 2 1 2 1 2
EDID_LCD_CLK24 EDID_LCD_DAT24
12
R377
R377
4.7K_0402_5%
4.7K_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
AVDD=100mA
AVDD=250mA
AVDDQ=200mA
VGA_CRT_VSYNC VGA_CRT_HSYNC
1 2
1 2
12
+PLLVDD12
DDC_DATA STRP_DATA
PULL HIGH (internally pulled high)
PULL LOW
3
2
U39C
U39C
B22 C22 G17 H17 A20 B20
A21 A22
C21 C20 D19
E19 F19 G19
C6
A5
B21
B6 A6
PLLVDD18=150mA
HTPVDD=200mA
LDT_STOP#_NB
PLLVDD12=70mA
DFT_GPIO0 DFT_GPIO1 DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5
EDID_LCD_CLK EDID_LCD_DAT
DFT_GPIO0
Memory side port not available
DEFAULT
Memory side port available
2005/03/08 2009/06/11
2005/03/08 2009/06/11
2005/03/08 2009/06/11
A10 B10
B24 B25
C10 C11
C5
B5
C23 B23
C2
B11 A11
F2 E1
G1 G2
D6 D7 C8 C7
B8 A8
B2 A2
B4 AA15 AB15
C14
B3
C3
A3
RS690 RS690 only
PART 3 OF 5
PART 3 OF 5
AVDD1 AVDD2 AVSSN1 AVSSN2 AVDDDI AVSSDI
AVDDQ AVSSQ
C Y COMP
RED GREEN BLUE DACVSYNC DACHSYNC
RSET DACSCL
DACSDA PLLVDD(PLLVDD18)
PLLVSS HTPVDD
HTPVSS SYSRESET#
POWERGOOD LDTSTOP# ALLOW_LDTSTOP
HTTSTCLK HTREFCLK
TVCLKIN OSCIN
OSCOUT(PLLVDD12) GFX_CLKP
GFX_CLKN SB_CLKP
SB_CLKN DFT_GPIO0
DFT_GPIO1 DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5
BMREQ# I2C_CLK I2C_DATA THERMALDIODE_P THERMALDIODE_N
TMDS_HPD DDC_DATA TESTMODE STRP_DATA
216MQA6AVA11FG_FCBGA465_RS690M
216MQA6AVA11FG_FCBGA465_RS690M
CRT/TVOUT
CRT/TVOUT
LVTM
LVTM
LVDDR18A_1(LVDDR33_1) LVDDR18A_2(LVDDR33_2)
PLL PWR
PLL PWR
PMCLOCKs
PMCLOCKs
DVO_D0(GPP_TX0P) DVO_D1(GPP_TX0N)
DVO_D2(DEBUG6)
DVO_D3(GPP_RX0P)
DVO_D4(GPP_RX0N)
DVO_D5(DEBUG9)
DVO_D6(DEBUG10)
DVO_D7(GPP_TX1N)
DVO_D8(GPP_TX1P)
DVO_D9(GPP_RX1N)
DVO_D10(GPP_RX1P)
DVO
DVO
MIS.
MIS.
DVO_D11(DEBUG15)
DVO_VSYNC(DEBUG0)
DVO_DE(DEBUG2)
DVO_HSYNC(DEBUG1) DVO_IDCKP(DEBUG14) DVO_IDCKN(DEBUG13)
DFT_GPIO1 DFT_GPIO[4:2] DFT_GPIO5
Bypass the loading of EEPROM straps and use Hardware default values
DEFAULT
I2C Master can load strap values from EEPROM if connected, or use default values if not connected
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
These pin straps are used to configure PCI-E GPP mode: 111: register defined (register default to Config E)
110: 4-0-0-0-0 Config A 101: 4-4 Config B 100: 4-2-2 Config C 011: 4-2-1-1 Config D
others: register defined (register default to Config E)
2
TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N
TXCLK_LP
TXCLK_LN TXCLK_UP TXCLK_UN
LPVDD LPVSS
LVDDR18D_1 LVDDR18D_2
LVSSR1 LVSSR3 LVSSR5 LVSSR6 LVSSR7 LVSSR8
LVSSR12 LVSSR13
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
LVDS_TXLP0
B14
LVDS_TXLN0
B15
LVDS_TXLP1
B13
LVDS_TXLN1
A13
LVDS_TXLP2
H14
LVDS_TXLN2
G14 D17 E17
LVDS_TXUP0
A15
LVDS_TXUN0
B16
LVDS_TXUP1
C17
LVDS_TXUN1
C18
LVDS_TXUP2
B17
LVDS_TXUN2
A17 A18 B18
LVDS_TXLCKP
E15
LVDS_TXLCKN
D15
LVDS_TXUCKP
H15
LVDS_TXUCKN
G15
+NB_LPVDD
D14
0.1U_0402_16V4Z
0.1U_0402_16V4Z
E14
+NB_LPVDDR18D
A12 B12
+NB_LPVDDR18A
C12 C13
LVDDR33=180mA
A16 A14 D12 C19 C15 C16
F14 F15
LVDS_ENVDD
E12
LVDS_ENBKL
G12
TP4 PADTP4 PAD
F12
PCIE_MTX_PRX_P0
AD14
PCIE_MTX_PRX_N0
AD15 AE15 AD16 AE16 AC17 AD18 AE19 AD19 AE20 AD20 AE21
AD13 AC13 AE13
RS690MC : SA00001I480 / S IC
AE17
216LQA6AVA12FG RS690MC BGA
AD17
465P 0FA
010: 4-1-1-1-1 Config E
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
LVDS_TXLP0 24 LVDS_TXLN0 24 LVDS_TXLP1 24 LVDS_TXLN1 24 LVDS_TXLP2 24 LVDS_TXLN2 24
LVDS_TXUP0 24 LVDS_TXUN0 24 LVDS_TXUP1 24 LVDS_TXUN1 24 LVDS_TXUP2 24 LVDS_TXUN2 24
LVDS_TXLCKP 24 LVDS_TXLCKN 24 LVDS_TXUCKP 24 LVDS_TXUCKN 24
1
1
C172
C172
C154
C154
2
2
1U_0603_10V4Z
1U_0603_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
C171
C171
1
1
C176
1U_0603_10V4Z
1U_0603_10V4Z
C527 0.1U_0402_16V7KC527 0.1U_0402_16V7K
C176
2
2
1 2
C528 0.1U_0402_16V7KC528 0.1U_0402_16V7K
1 2
PCIE_MRX_C_PTX_P0 30 PCIE_MRX_C_PTX_N0 30
DEFAULT
TX
TZ
L54
L54
1 2
1
MBK2012121YZF_2P
MBK2012121YZF_2P C177
C177
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1 2
L57 MBK2012121YZF_2PL57 MBK2012121YZF_2P
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C481
C481
2
Enable debug bus via the memory IO pads, if available in the package
use default values
use the memory data bus to output the debug bus
Compal Electronics, Inc.
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
SCHEMATIC,MB A4861
401650
401650
401650
1
+1.8VS
LPVSS_GND
C491
C491
1U_0603_10V4Z
1U_0603_10V4Z
1
1
C131
C131
2
2
PCIE_MTX_C_PRX_P0 30 PCIE_MTX_C_PRX_N0 30
NewCard
DEFAULT
14 46Tuesday, April 14, 2009
14 46Tuesday, April 14, 2009
14 46Tuesday, April 14, 2009
L55
L55
+1.8VS
4.7U_0805_10V4Z
4.7U_0805_10V4Z 1
2
LVSSR_GND
of
of
of
+3VS
1 2
MBK2012121YZF_2P
MBK2012121YZF_2P
C497
C497
D
D
D
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