1
5VPCU
5V / 3.3V / 12V
Page : 35
A A
1.8V / 0.9V
Page : 36
1.5V / 1.05V / 1.8V
B B
Page : 37
3V_ALWAYS
+12V
+5V
3V_S5
3VSUS
5VSUS
2.5VSUS
+2.5V
+1.8V
MVREF_DM
SMDDR_VTERM
1.5V_S5
+1.5V
AGP_VCC (+1.5V)
1.2VCCT
VTT
2
CLOCK GEN
ICS
ICS954217
Page : 2
DDR2-SODIMM1
Page:9~10
DDR2-SODIMM2
Page:9~10
3
400/533MHZ DDR2
400/533MHZ DDR2
4
Centrino
DOTHAN
CELEROM-M
INTEL Mobile_479 CPU
ALVISO
1257 BGA
Page : 5 ~ 8
Page : 3 , 4
HOST BUS 533MHz
HOST BUS 400MHz
5
6
CRANE3 ( ZL7 )
PCIE
LVDS
RGB
TVOUT
ATI
M26P/M24P
64M /
128M
Page : 11 ~ 14
EXT_LVDS
EXT_CRT
EXT_TV-OUT
INT_LVDS
INT_CRT
INT_TV-OUT
7
ED@ INT. VGA WITH DOCK
ID@ INT. VGA WITH DOCK
ND@ W/O DOCKING
要打
SWITCH
CIRCUIT
BOM MARK
E@ EXT VGA
I@ INTVGA
SA@ SATA
F@ FIXED ODD
SW@ SWAPPABLE ODD
3@ 3in1
N@ NEW CARD
4@ 4401
5@ 5788M
D@ DOCKING
8
要打
要打
要打
要打
要打
要打
要打
要打
要打
CRT
Page:17
LVDS
Page:16
TV-OUT
Page:16
要打
DVI
CH7307
DOCKING/DVI
SATA - HDD
Page:21
Page:15
Page: 33
IDE - HDD
CPU CORE
Page : 34
+1.2V
Page : 38
BATTERY
C C
CHARGER
Page : 39
VCC_CORE
VGA_CORE
2.5V_VGA
BATTERY
SELECT
Page : 40
Page:21
IDE-ODD
Page:21
MEDIA BAY
Page:21
AUDIO CODEC
CONEXANT
20468-31
Page:27
AMP
MAX9755
Page:28
CONEXANT
MODEM
20493-21
Page:27
SATA
ATA 66/100
AC97
DMI I/F
ICH6-M
609 BGA
Page : 18 ~ 20
LPC
NS
KBC(97551)
Page : 29
PCIE
PCI BUS
USB 2.0
NEW CARD
Page : 32
NS
SIO (87383)
Page : 31
TI
PCMCIA+1394
+3 IN 1
PCI7411
Page: 23
MINI-PCI
Wireless LAN
Modem/LAN
Page : 22
BROADCOM
10/100/1G LAN
4401 / 5705M
Page:25
TV-TUNER
Page : 22
BOTHHAND
TRANSFORMER
Page:26
3 IN 1
Page: 24
PCMCIA
Page: 24
1394
Page: 23
RJ45
Page:26
MIC IN
D D
Page:27
LINE
IN
SPEKER
Page:28Page:27
LINE
OUT
Page:28
RJ11
Page:27
PCI ROUTING TABLE
REQ0# / GNT0#
REQ2# / GNT2#
REQ1# / GNT1#
DOCKING
PS2
Page:33
Touchpad
IDSEL
AD24
AD19
AD17
Keyboard
Page:30Page:30
IrDA
Page:31
INTERUPT
INTA#
INTB# , INTD#
INTC#,INTD#,INTA#
DOCKING
Print Port
Page:33
DEVICE
BROADCOM LAN
MINI-PCI
TI 7411
DOCKING
COM Port
Page:33
CIR
Page:33
REQ3# / GNT3# AD18 INTB# , INTD# MINI-PCI(TV Tuner)
1
2
3
4
5
6
SYSTEM 3
USB PORT
Page : 22
USB2,3,5
REV.C
DOCKING 2
USB PORT
Page : 22
USB0,1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet
Date: Sheet
Date: Sheet
7
MINI-USB
Page: 22
USB4
PROJECT : ZL7
PROJECT : ZL7
Quanta Computer Inc.
Quanta Computer Inc.
140Thursday, June 23, 2005
140Thursday, June 23, 2005
140Thursday, June 23, 2005
8
C
C
C
of
of
of
1
2
3
4
5
6
7
8
Place these termination
R205
IREF
R205
2.2
2.2
U35
U35
50
XTAL_IN
49
XTAL_OUT
10
VTT_PWRGD#/PD
55
PCI/SRC_STOP#
54
CPU_STOP#
46
SCLK
47
SDATA
12
FSA/USB_48
16
FSB/TEST_MODE
53
FSC/TEST_SEL
48
VDD_REF
1
VDD_PCI_1
7
VDD_PCI_2
42
VDD_CPU
21
VDD_SRC0
28
VDD_SRC1
34
VDD_SRC2
11
VDD_48
39
IREF
*Internal Pull-Down Resistor
*Internal Pull-Down Resistor
14
DOT96
15
DOT96#
12
C722
C722
10U/10V_8
10U/10V_8
1 2
1 2
R4631R463
1
R212
R212
2.2
2.2
R468
R468
1K_4
1K_4
R470
R470
*0_4
*0_4
12
12
VDD_CKG_CPU
12
C368
C368
.047U_4
.047U_4
C366
C366
10U/10V_8
10U/10V_8
C373
C373
10U/10V_8
10U/10V_8
12
C361
C361
.047U_4
.047U_4
R489
R489
10K_4
10K_4
1 2
R488
R488
*10K_4
*10K_4
1 2
VDD_CKGREF
CLKVDD
12
C371
C371
.047U_4
.047U_4
12
C370
C370
.047U_4
.047U_4
SELPSB1_CLK<4,6>
SELPSB2_CLK<4,6>
12
CLK48_USB<19>
C369
C369
.047U_4
.047U_4
12
C372
C372
.047U_4
.047U_4
12
C707
C707
.047U_4
.047U_4
C706
C706
.047U_4
.047U_4
DOT96<6>
DOT96#<6>
C718
C718
33P_4
33P_4
12
12
C709
C709
33P_4
33P_4
12
CLK_EN#<34>
STP_PCI#<19>
STP_CPU#<19,34>
SMbus address D2
R482 33_4R482 33_4
1 2
12
Iref=5mA,
Ioh=4*Iref
VDD_CKG_CPU
R465 475/F_4R465 475/F_4
I@4P2R-S-33
I@4P2R-S-33
4
2
RP15
RP15
CG_XIN
Y4
Y4
14.318MHZ/20PF
14.318MHZ/20PF
CG_XOUT R_HCLK_CPU
CLK_EN#
SMBCK
SMBDT
SELPSB0_CLK
SELPSB1_CLK
SELPSB2_CLK
VDD_CKG_48
1 2
R_DOT96
3
R_DOT96#
1
+3V
A A
+3V
B B
1 2
L50 ACB2012L-120L50 ACB2012L-120
+VCCP +3V+VCCP
R203
R203
1K_4
1K_4
1 2
SELPSB2_CLK SELPSB0_CLKSELPSB1_CLK
R204
R204
*0_4
*0_4
1 2
1 2
L51 ACB2012L-120L51 ACB2012L-120
SMBUS ADDRESS: D2, D3
+3V
12
12
*10K_4
C C
+3V
2
3
Q40
3
Q40
2N7002
2N7002
Q41
Q41
2N7002
2N7002
+3V
2
D D
PCLK_SMB<19,25,32,33> SMBCK <9>
1
*10K_4
2
4
RP9
RP9
4P2R-S-10K
4P2R-S-10K
1
3
SMBDT
1
SMBCK
1
2
R106
R106
*10K_4
*10K_4
R109
R109
SMBDT <9>PDAT_SMB<19,25,32,33>
12
*10K_4
*10K_4
R111
R111
SMBUS ADDRESS: D4, D5
CLK_SSC_IN
SMBCK
SMBDT
SSCD_VDD
CLK_EN#
DOTHAN-A 400
DOTHAN-A 533
3
U9
U9
1
SSC_S3
SSC_S2
SSC_S1
1 2
R117 *10K_4R117 *10K_4
CLKIN
2
S3
3
S2
4
S1
7
SCLK
8
SDATA
5
PWRDWN
6
REFOUT/SEL
*MK1493-05GT
*MK1493-05GT
FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 RSVD 100 33
4
37
VDDA
CK-410M
CK-410M
GND_REF
GND_PCI_26GND_SRC29GND_CPU
GND_PCI_1
GND_48
2
51
13
VDDA
VDD
CLKOUT
CLKOUT#
IREF
VSSIREF
VSS
VSSA
VDDA_CKG
38
VSSA
CPU2_ITP/SRC5
CPU2#_ITP/SRC5#
*PERREQ1#
*PERREQ2#
PCIF0/ITP_EN
45
ICS954217
ICS954217
250mA ( MAX. )
16
9
12
11
14
13
10
15
12
C708
C708
.047U_4
.047U_4
REF
CPU0
CPU0#
CPU1
CPU1#
SRC4
SRC4#
SATACLK
SATACLK#
SRC3
SRC3#
SRC2
SRC2#
SRC1
SRC1#
SRC0
SRC0#
PCI5
PCI4
PCI3
PCI2
PCIF1
SSCD_VDD
R_DREFSSCLK
R_DREFSSCLK#
5
12
C355
C355
10U/10V_8
10U/10V_8
14M_REF
52
44
R_HCLK_CPU#
43
R_HCLK_MCH
41
R_HCLK_MCH#
40
R_MCH_3GPLL
36
R_MCH_3GPLL#
35
33
32
R_PCIE_VGA
31
R_PCIE_VGA#
30
R_PCIE_SATA
26
R_PCIE_SATA#
27
R_PCIE_EZ1
24
R_PCIE_EZ1#
25
R_PCIE_ICH
22
R_PCIE_ICH#
23
R_PCIE_EZ2
19
R_PCIE_EZ2#
20
R_PCIE_NEWC
17
R_PCIE_NEWC#
18
R_PCLK_591
5
R_PCLK_PCM
4
R_PCLK_LAN
3
R_PCLK_SIO
56
R_PCLK_MINI
9
R_PCLK_ICH
8
PULL HIGH TO SET PIN35,36 TO HOST CLK
C241
C241
4
2
R108
R108
*475/F_4
*475/F_4
1 2
12
C229
C229
*10U/10V_8
*10U/10V_8
RP2
RP2
*4P2R-S-33
*4P2R-S-33
12
*.1U_4
*.1U_4
to close CK410M.
R199 49.9/F_4R199 49.9/F_4
1 2
R198 49.9/F_4R198 49.9/F_4
1 2
R197 49.9/F_4R197 49.9/F_4
1 2
R196 49.9/F_4R196 49.9/F_4
1 2
R195 49.9/F_4R195 49.9/F_4
1 2
R194 49.9/F_4R194 49.9/F_4
1 2
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
R480 10K_4R480 10K_4
1 2
L23
L23
1 2
*ACB2012L-120
*ACB2012L-120
3
1
R110
R110
*49.9/F_4
*49.9/F_4
1 2
6
RP10
RP10
4P2R-S-33
4P2R-S-33
RP11
RP11
4P2R-S-33
4P2R-S-33
RP12
RP12
4P2R-S-33
4P2R-S-33
RP13
RP13
E@4P2R-S-33
E@4P2R-S-33
RP20
RP20
SA@4P2R-S-33
SA@4P2R-S-33
RP19
RP19
D@4P2R-S-33
D@4P2R-S-33
RP18
RP18
4P2R-S-33
4P2R-S-33
RP17
RP17
D@4P2R-S-33
D@4P2R-S-33
RP16
RP16
N@4P2R-S-33
N@4P2R-S-33
R478 33_4R478 33_4
1 2
R477 33_4R477 33_4
1 2
R476 33_4R476 33_4
1 2
R464 33_4R464 33_4
1 2
R481 33_4R481 33_4
1 2
R479 33_4R479 33_4
1 2
Define pin35,36 function
+3V
DREFSSCLK <6>
DREFSSCLK# <6>
R114
R114
*49.9/F_4
*49.9/F_4
1 2
R201 *12_4R201 *12_4
1 2
R200 12_4R200 12_4
1 2
R202 12_4R202 12_4
1 2
HCLK_CPU <3>
HCLK_CPU# <3>
HCLK_MCH <5>
HCLK_MCH# <5>
CLK_MCH_3GPLL <6>
CLK_MCH_3GPLL# <6>
NEW_CLKREQ# <32>
EZ_CLKREQ# <33>
CLK_PCIE_VGA <11>
CLK_PCIE_VGA# <11>
CLK_PCIE_SATA <18>
CLK_PCIE_SATA# <18>
CLK_PCIE_EZ1 <33>
CLK_PCIE_EZ1# <33>
CLK_PCIE_ICH <19>
CLK_PCIE_ICH# <19>
CLK_PCIE_EZ2 <33>
CLK_PCIE_EZ2# <33>
CLK_PCIE_NEWC <32>
CLK_PCIE_NEWC# <32>
PCLK_591 <29>
PCLK_PCM <23>
PCLK_LAN <25>
PCLK_SIO <31>
PCLK_MINI <22>
PCLK_ICH <18>
DOT96
DOT96#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_EZ2
CLK_PCIE_EZ2#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_EZ1
CLK_PCIE_EZ1#
CLK_PCIE_NEWC
CLK_PCIE_NEWC#
CLK_SSC_IN
14M_SIO
14M_SIO
PEREQ1# - SRC0, 2, SATA
PEREQ2# - SRC1, 3, 4
14M_SIO <31>
14M_ICH <19>
DEFALT OFF
DEFALT OFF
+3V
R615
R615
*1K_4
*1K_4
EZ_CLKREQ#
NEW_CLKREQ#
R490 I@49.9/F_4R490 I@49.9/F_4
1 2
R491 I@49.9/F_4R491 I@49.9/F_4
1 2
R193 E@49.9/F_4R193 E@49.9/F_4
1 2
R192 E@49.9/F_4R192 E@49.9/F_4
1 2
R486 SA@49.9/F_4R486 SA@49.9/F_4
1 2
R487 SA@49.9/F_4R487 SA@49.9/F_4
1 2
R492 D@49.9/F_4R492 D@49.9/F_4
1 2
R493 D@49.9/F_4R493 D@49.9/F_4
1 2
R209 49.9/F_4R209 49.9/F_4
1 2
R208 49.9/F_4R208 49.9/F_4
1 2
R207 D@49.9/F_4R207 D@49.9/F_4
1 2
R206 D@49.9/F_4R206 D@49.9/F_4
1 2
R211 N@49.9/F_4R211 N@49.9/F_4
1 2
R210 N@49.9/F_4R210 N@49.9/F_4
1 2
1 2
1 2
12
C915
C915
10P_4
10P_4
R616
R616
1K_4
1K_4
Place these termination
to close CK410M.
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
COMPUTER
CLOCK GENERATOR
CLOCK GENERATOR
CLOCK GENERATOR
ZL7 C
ZL7 C
ZL7 C
of
240Thursday, June 23, 2005
240Thursday, June 23, 2005
7
240Thursday, June 23, 2005
8
1
2
3
4
5
6
7
8
+3V
U31A
AA3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
A13
A12
C12
C11
B13
A16
A15
B10
A10
B18
A18
C17
B17
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
Y3
U3
R2
P3
T2
P1
T1
N2
A4
N4
J3
L1
J2
K3
K4
L4
C8
B8
A9
C9
M3
H1
K1
L2
C2
D3
A3
E4
B4
A7
D1
D4
C6
A6
B7
G1
U31A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB0#
ADSTB1#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADS#
IERR#
BREQ0#
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#
LINT0
LINT1
STPCLK#
SLP#
DPSLP#
DPRSTP#
THERMDA
THERMDC
THERMTRIP#
PROCHOT#
Dothan Processor
Dothan Processor
Dothan
Dothan
REQUEST
REQUEST
PHASE
PHASE
SIGNALS
SIGNALS
ERROR
ERROR
SIGNALS
SIGNALS
ARBITRATION
ARBITRATION
PHASE
PHASE
SIGNALS
SIGNALS
SNOOP PHASE
SNOOP PHASE
SIGNALS
SIGNALS
RESPONSE
RESPONSE
PHASE
PHASE
SIGNALS
SIGNALS
PC
PC
COMPATIBILITY
COMPATIBILITY
SIGNALS
SIGNALS
DIAGNOSTIC
DIAGNOSTIC
& TEST
& TEST
SIGNALS
SIGNALS
EXECUTION
EXECUTION
CONTROL
CONTROL
SIGNALS
SIGNALS
THERMAL DIODE
THERMAL DIODE
3
1 OF 3
1 OF 3
DATA
DATA
PHASE
PHASE
SIGNALS
SIGNALS
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
HD#0
A19
HD#1
A25
HD#2
A22
HD#3
B21
HD#4
A24
HD#5
B26
HD#6
A21
HD#7
B20
HD#8
C20
HD#9
B24
HD#10
D24
HD#11
E24
HD#12
C26
HD#13
B23
HD#14
E23
HD#15
C25
HD#16
H23
HD#17
G25
HD#18
L23
HD#19
M26
HD#20
H24
HD#21
F25
HD#22
G24
HD#23
J23
HD#24
M23
HD#25
J25
HD#26
L26
HD#27
N24
HD#28
M25
HD#29
H26
HD#30
N25
HD#31
K25
HD#32
Y26
HD#33
AA24
HD#34
T25
HD#35
U23
HD#36
V23
HD#37
R24
HD#38
R26
HD#39
R23
HD#40
AA23
HD#41
U26
HD#42
V24
HD#43
U25
HD#44
V26
HD#45
Y23
HD#46
AA26
HD#47
Y25
HD#48
AB25
HD#49
AC23
HD#50
AB24
HD#51
AC20
HD#52
AC22
HD#53
AC25
HD#54
AD23
HD#55
AE22
HD#56
AF23
HD#57
AD24
HD#58
AF20
HD#59
AE21
HD#60
AD21
HD#61
AF25
HD#62
AF22
HD#63
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
CPUINIT#
B5
CPURST#
B11
C19
4
HA#[3..31]<5>
A A
B B
C C
+VCCP
R429
R429
150_4
150_4
TDI
G1: NC for Dothan and
DPRSTP# for Yonah
D D
THERMTRIP#<6,18>
+VCCP
1
CPUPWRGD<18>
R441 *0_4R441 *0_4
R436 56_4R436 56_4
HA#[3..31]
HADSTB0#<5>
HADSTB1#<5>
HREQ#0<5>
HREQ#1<5>
HREQ#2<5>
HREQ#3<5>
HREQ#4<5>
ADS#<5>
HBREQ0#<5>
BPRI#<5>
BNR#<5>
HLOCK#<5>
HIT#<5>
HITM#<5>
DEFER#<5>
HTRDY#<5>
RS#0<5>
RS#1<5>
RS#2<5>
A20M#<18>
FERR#<18>
IGNNE#<18>
SMI#<18>
T180T180
T179T179
DBR#<19>
INTR<18>
NMI<18>
STPCLK#<18>
CPUSLP#<5,18>
DPSLP#<18>
DPRSLP#<18>
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
IERR#
BPM0#
BPM1#
BPM2#
BPM3#
A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#
TCK
TDO
TDI
TMS
TRST#
PREQ#
PRDY#
DBR#
STPCLK#
CPUSLP#
DPSLP#
THERMDA
THERMDC
THERMTRIP#_PWR
CPU_PROCHOT#
2
HD#[0..63]
CPU junction temp up to 125 degree C
output signal. shut down system
HDSTBN0# <5>
HDSTBP0# <5>
HDSTBN1# <5>
HDSTBP1# <5>
HDSTBN2# <5>
HDSTBP2# <5>
HDSTBN3# <5>
HDSTBP3# <5>
HDBI0# <5>
HDBI1# <5>
HDBI2# <5>
HDBI3# <5>
DBSY# <5>
DRDY# <5>
HCLK_CPU# <2>
HCLK_CPU <2>
CPUINIT# <18>
CPURST# <5>
DPWR# <5>
HD#[0..63] <5>
+3V
R439 47R439 47
THERMDC
10 mil trace /
10 mil space
THERMDA MAX6648_OV#
15 MIL
THERMTRIP#_PWR
TDI
TMS
TDO
TRST#
CPURST#
TCK
3V_THM
C661
C661
.1U_4
.1U_4
C674
C674
2200P
2200P
R422
R422
54.9/F_4
54.9/F_4
U33
U33
1
3
2
MAX6657
MAX6657
R618
R618
56_4
56_4
R619
R619
330_4
330_4
+VCCP +VCCP
R426
R426
*54.9/F_4
*54.9/F_4
R425 *22.6/F_4R425 *22.6/F_4
R421 *22.6/F_4R421 *22.6/F_4
VCC
DXN
DXP
-OVT4GND
1 3
Q53 MMBT3904Q53 MMBT3904
TCK NO STUB
close to ITP conn
TCK
R430 27.4/F_4R430 27.4/F_4
TRST#
R427 680_4R427 680_4
close to CPU
IERR#
CPUPWRGD
5
R393 56_4R393 56_4
R402 200/F_4R402 200/F_4
+VCCP
6
R442
R442
10K_4
10K_4
+3V
KBSMDAT
7
SMDATA
KBSMCLK
8
SMCLK
6
-ALT
5
R449
R449
*10K_4
*10K_4
+VCCP+VCCP
R617
R617
330_4
330_4
2
DEPOP R425, R426, R421, C640 WHEN NO JITP
R428
R428
39.2/F_4
39.2/F_4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
JITP CONN
T177T177
T173T173
T166T166
T176T176
T162T162
T178T178
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Dothan Processor (HOST)
Dothan Processor (HOST)
Dothan Processor (HOST)
ZL7 C
ZL7 C
ZL7 C
7
+3V
1
R435
R435
10K_4
10K_4
1
+3V
+3V
1999_SHT# <35>
T171T171
T157T157
T155T155
T156T156
T158T158
T160T160
T163T163
T161T161
2
+3V
2
R448
R448
10K_4
10K_4
Q38
Q38
2N7002
2N7002
Q37
Q37
2N7002
2N7002
MBDATA
3
Level shift
MBCLK
3
+VCCP
C640
C640
*.1U_4
*.1U_4
1 2
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
340Thursday, June 23, 2005
340Thursday, June 23, 2005
340Thursday, June 23, 2005
MBDATA <11,29,40>
MBCLK <11,29,40>
MAX6648_AL# <29>
+3V_S5
R409
R409
150_4
150_4
DBR#
of
8
1
2
3
4
5
6
7
8
+VCCP
T152T152
T153T153
T181T181
CPU_VCCA
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
VCC_CORE
COMP0
COMP1
COMP2
COMP3
A A
B B
C C
R458
R458
R457
R457
27.4/F_4
27.4/F_4
12
C262
C262
10U_6.3V
10U_6.3V
12
C325
C325
10U_6.3V
10U_6.3V
12
C672
C672
10U_6.3V
10U_6.3V
C660
C660
10U_6.3V
10U_6.3V
1 2
54.9/F_4
54.9/F_4
Place pulldown resistors within
0.5" of COMP pins
VCC_CORE
12
12
C250
C250
C328
C328
10U_6.3V
10U_6.3V
10U_6.3V
10U_6.3V
VCC_CORE
12
12
C320
C320
C281
C281
10U_6.3V
10U_6.3V
10U_6.3V
10U_6.3V
12
12
C301
C301
C309
C309
10U_6.3V
10U_6.3V
10U_6.3V
10U_6.3V
VCC_CORE
C292
C292
C666
C666
10U_6.3V
10U_6.3V
10U_6.3V
10U_6.3V
1 2
1 2
R132
R132
27.4/F_4
27.4/F_4
.01U/16V_4
.01U/16V_4
12
C286
C286
10U_6.3V
10U_6.3V
12
C294
C294
10U_6.3V
10U_6.3V
12
C671
C671
10U_6.3V
10U_6.3V
C279
C279
10U_6.3V
10U_6.3V
1 2
R124
R124
54.9/F_4
54.9/F_4
C704
C704
12
C298
C298
10U_6.3V
10U_6.3V
12
C300
C300
10U_6.3V
10U_6.3V
12
C653
C653
10U_6.3V
10U_6.3V
C299
C299
10U_6.3V
10U_6.3V
1 2
1 2
12
C702
C702
10U_6.3V
10U_6.3V
12
C255
C255
10U_6.3V
10U_6.3V
12
C313
C313
10U_6.3V
10U_6.3V
C663
C663
10U_6.3V
10U_6.3V
1 2
1K/F
1K/F
2K/F_4
2K/F_4
CPU_VCCA
12
C649
C649
10U_6.3V
10U_6.3V
12
C322
C322
10U_6.3V
10U_6.3V
C668
C668
10U_6.3V
10U_6.3V
1 2
R455
R455
R456
R456
VCC_CORE
VCC_CORE
VCC_COREVCC_CORE
+1.8V
+1.5V
12
C656
C656
10U_6.3V
10U_6.3V
12
C329
C329
10U_6.3V
10U_6.3V
C659
C659
10U_6.3V
10U_6.3V
1 2
Place voltage
divider within
0.5" of GTLREF
pin
R407
R407
*1K_4
*1K_4
T182T182
T128T128
T151T151
R461
R461
R462
R462
12
12
10U_6.3V
10U_6.3V
12
10U_6.3V
10U_6.3V
10U_6.3V
10U_6.3V
1 2
C310
C310
C321
C321
C305
C305
C683
C683
10U_6.3V
10U_6.3V
12
C684
C684
10U_6.3V
10U_6.3V
C657
C657
10U_6.3V
10U_6.3V
1 2
R459
R459
*1K_4
*1K_4
*0_8
*0_8
0_8
0_8
Total caps = 2633 uF
ESR = 15m ohm/5 // 5m ohm/25 // 5m ohm/15
D D
+VCCP
12
C351
C351
+
+
150U/4V
150U/4V
<Type>
<Type>
CC3528
CC3528
12
12
C304
C304
.1U_4
.1U_4
1
C681
C681
.1U_4
.1U_4
12
.1U_4
.1U_4
C327
C327
12
C652
C652
.1U_4
.1U_4
2
12
C651
C651
.1U_4
.1U_4
+VCCP
C285
C285
.1U_4
.1U_4
3
C307
C307
.1U_4
.1U_4
C650
C650
.1U_4
.1U_4
C678
C678
.1U_4
.1U_4
C682
C682
.1U_4
.1U_4
4
P25
P26
AB2
AB1
AD26
AF7
AC1
E26
AC26
D18
D20
D22
E17
E19
E21
G21
H22
K22
V22
W21
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
C5
F23
B2
C3
N1
B1
F26
D6
D8
E5
E7
E9
F6
F8
F18
F20
F22
G5
H6
J5
J21
U5
V6
W5
Y6
U31B
U31B
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
NC1
RSVD2
RSVD3
RSVD4
RSVD5
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Dothan Processor
Dothan Processor
Dothan
Dothan
2 OF 3
2 OF 3
POWER,
POWER,
GROUND,
GROUND,
RESERVED
RESERVED
SIGNALS
SIGNALS
A2
VSS00
A5
VSS01
A8
VSS02
A11
VSS03
A14
VSS04
A17
VSS05
A20
VSS06
A23
VSS07
A26
VSS08
B3
VSS09
B6
VSS10
B9
VSS11
B12
VSS12
B16
VSS13
B19
VSS14
B22
VSS15
B25
VSS16
C1
VSS17
C4
VSS18
C7
VSS19
C10
VSS20
C13
VSS21
C15
VSS22
C18
VSS23
C21
VSS24
C24
VSS25
D2
VSS26
D5
VSS27
D7
VSS28
D9
VSS29
D11
VSS30
D13
VSS31
D15
VSS32
D17
VSS33
D19
VSS34
D21
VSS35
D23
VSS36
D26
VSS37
E3
VSS38
E6
VSS39
E8
VSS40
E10
VSS41
E12
VSS42
E14
VSS43
E16
VSS44
E18
VSS45
E20
VSS46
E22
VSS47
E25
VSS48
F1
VSS49
F4
VSS50
F5
VSS51
F7
VSS52
F9
VSS53
F11
VSS54
F13
VSS55
F15
VSS56
F17
VSS57
F19
VSS58
F21
VSS59
F24
VSS60
G2
VSS61
G6
VSS62
G22
VSS63
G23
VSS64
G26
VSS65
H3
VSS66
H5
VSS67
H21
VSS68
H25
VSS69
J1
VSS70
J4
VSS71
J6
VSS72
J22
VSS73
J24
VSS74
K2
VSS75
K5
VSS76
K21
VSS77
K23
VSS78
K26
VSS79
L3
VSS80
L6
VSS81
L22
VSS82
L25
VSS83
M1
VSS84
M4
VSS85
M5
VSS86
M21
VSS87
M24
VSS88
N3
VSS89
N6
VSS90
N22
VSS91
N23
VSS92
N26
VSS93
P2
VSS94
P5
VSS95
P21
VSS96
P24
VSS97
R1
VSS98
R4
VSS99
5
CPU_VID0<34>
CPU_VID1<34>
CPU_VID2<34>
CPU_VID3<34>
CPU_VID4<34>
CPU_VID5<34>
T159T159
T154T154
SELPSB2_CLK<2,6>
SELPSB1_CLK<2,6>
SELPSB2_CLK
SELPSB1_CLK
1 2
1 2
T146T146
DOTHAN-A NC
DOTHAN-B POP
Bus speed select
6
+VCCP
Z0501
Z0502
0_4
0_4
BSEL0
R433
R433
BSEL1
R432
R432
0_4
0_4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
U31C
U31C
W23
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
VCCP5
E15
VCCP6
F10
VCCP7
F12
VCCP8
F14
VCCP9
F16
VCCP10
K6
VCCP11
L5
VCCP12
L21
VCCP13
M6
VCCP14
M22
VCCP15
N5
VCCP16
N21
VCCP17
P6
VCCP18
P22
VCCP19
R5
VCCP20
R21
VCCP21
T6
VCCP22
T22
VCCP23
U21
VCCP24
P23
VCCQ0
W4
VCCQ1
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AE7
VCCSENSE
AF6
VSSSENSE
C16
BSEL0
C14
BSEL1
E1
PSI
R6
VSS100
R22
VSS101
R25
VSS102
T3
VSS103
T5
VSS104
T21
VSS105
T23
VSS106
T26
VSS107
U2
VSS108
U6
VSS109
U22
VSS110
U24
VSS111
V1
VSS112
V4
VSS113
V5
VSS114
V21
VSS115
V25
VSS116
W3
VSS117
W6
VSS118
W22
VSS119
Dothan Processor
Dothan Processor
Dothan Processor (POWER)
Dothan Processor (POWER)
Dothan Processor (POWER)
ZL7 C
ZL7 C
ZL7 C
Dothan
Dothan
3 OF 3
3 OF 3
POWER, GROUND AND NC
POWER, GROUND AND NC
VID
VID
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
7
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
440Thursday, June 23, 2005
440Thursday, June 23, 2005
440Thursday, June 23, 2005
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
8
1
U34E
U34E
AF23
VSS136
H23
VSS137
AL22
VSS138
AH22
VSS139
J22
VSS140
E22
VSS141
D22
VSS142
A22
VSS143
AN21
VSS144
AF21
VSS145
F21
VSS146
C21
VSS147
A A
B B
C C
D D
1
AK20
AN19
AG19
AL18
AN17
AF17
AL16
AN14
AL14
AG14
AN11
AL11
AG11
AF11
AA11
AA10
AN24
AL24
VSS148
V20
VSS149
G20
VSS150
F20
VSS151
E20
VSS152
D20
VSS153
A20
VSS154
VSS155
VSS156
W19
VSS157
T19
VSS158
J19
VSS159
H19
VSS160
C19
VSS161
VSS162
U18
VSS163
B18
VSS164
A18
VSS165
VSS166
AJ17
VSS167
VSS168
G17
VSS169
C17
VSS170
VSS171
K16
VSS172
H16
VSS173
D16
VSS174
A16
VSS175
K15
VSS176
C15
VSS177
VSS178
VSS179
AJ14
VSS180
VSS181
K14
VSS182
J14
VSS183
F14
VSS184
B14
VSS185
A14
VSS186
J12
VSS187
D12
VSS188
B12
VSS189
VSS190
VSS191
AJ11
VSS192
VSS193
VSS194
VSS195
Y11
VSS196
H11
VSS197
F11
VSS198
VSS199
Y10
VSS200
L10
VSS201
D10
VSS202
AN9
VSS203
AH9
VSS204
AE9
VSS205
AC9
VSS206
AA9
VSS207
V9
VSS208
T9
VSS209
K9
VSS210
H9
VSS211
A9
VSS212
AL8
VSS213
Y8
VSS214
P8
VSS215
L8
VSS216
E8
VSS217
C8
VSS218
AN7
VSS219
AK7
VSS220
AG7
VSS221
AA7
VSS222
V7
VSS223
G7
VSS224
AJ6
VSS225
AE6
VSS226
AC6
VSS227
AA6
VSS228
T6
VSS229
P6
VSS230
L6
VSS231
J6
VSS232
B6
VSS233
AP5
VSS234
AL5
VSS235
W5
VSS236
E5
VSS237
AN4
VSS238
AF4
VSS239
Y4
VSS240
U4
VSS241
P4
VSS242
L4
VSS243
H4
VSS244
C4
VSS245
AJ3
VSS246
AC3
VSS247
AB3
VSS248
AA3
VSS249
C3
VSS250
A3
VSS251
AN2
VSS252
AL2
VSS253
AH2
VSS254
AE2
VSS255
AD2
VSS256
V2
VSS257
T2
VSS258
P2
VSS259
L2
VSS260
B27
VSS261
J26
VSS262
G26
VSS263
E26
VSS264
A26
VSS265
VSS266
VSS267
J2
VSS268
G2
VSS269
D2
VSS270
Y1
VSS271
B36
VSSALVDS
VSS
VSS
2
2
AG37
VSS0
Y37
VSS1
V37
VSS2
T37
VSS3
P37
VSS4
M37
VSS5
K37
VSS6
H37
VSS7
E37
VSS8
AN36
VSS9
AL36
VSS10
AJ36
VSS11
AF36
VSS12
AE36
VSS13
AD36
VSS14
AC36
VSS15
AB36
VSS16
AA36
VSS17
C36
VSS18
AE35
VSS19
Y35
VSS20
W35
VSS21
V35
VSS22
U35
VSS23
T35
VSS24
R35
VSS25
P35
VSS26
N35
VSS27
M35
VSS28
L35
VSS29
K35
VSS30
J35
VSS31
H35
VSS32
G35
VSS33
F35
VSS34
E35
VSS35
D35
VSS36
B35
VSS37
AN34
VSS38
AH34
VSS39
AD34
VSS40
AC34
VSS41
AB34
VSS42
AA34
VSS43
C34
VSS44
AL33
VSS45
AF33
VSS46
AD33
VSS47
W33
VSS48
V33
VSS49
U33
VSS50
T33
VSS51
R33
VSS52
P33
VSS53
N33
VSS54
M33
VSS55
L33
VSS56
K33
VSS57
J33
VSS58
H33
VSS59
G33
VSS60
F33
VSS61
E33
VSS62
D33
VSS63
AN32
VSS64
AJ32
VSS65
AD32
VSS66
AC32
VSS67
AB32
VSS68
AA32
VSS69
Y32
VSS70
C32
VSS71
A32
VSS72
AL31
VSS73
AG31
VSS74
AD31
VSS75
W31
VSS76
V31
VSS77
U31
VSS78
T31
VSS79
R31
VSS80
P31
VSS81
N31
VSS82
M31
VSS83
L31
VSS84
K31
VSS85
J31
VSS86
H31
VSS87
G31
VSS88
F31
VSS89
E31
VSS90
D31
VSS91
AP30
VSS92
AE30
VSS93
AC30
VSS94
AB30
VSS95
AA30
VSS96
Y30
VSS97
C30
VSS98
AM29
VSS99
AJ29
VSS100
AG29
VSS101
AD29
VSS102
AA29
VSS103
W29
VSS104
V29
VSS105
U29
VSS106
P29
VSS107
L29
VSS108
H29
VSS109
G29
VSS110
F29
VSS111
E29
VSS112
D29
VSS113
A29
VSS114
AC28
VSS115
AB28
VSS116
AA28
VSS117
W28
VSS118
E28
VSS119
AN27
VSS120
AL27
VSS121
AJ27
VSS122
AG27
VSS123
AF27
VSS124
AB27
VSS125
AA27
VSS126
W27
VSS127
G27
VSS128
E27
VSS129
AJ24
VSS130
AG24
VSS131
J24
VSS132
F24
VSS133
D24
VSS134
B24
VSS135
@ALVISO_GM/GML
@ALVISO_GM/GML
3
+VCCP
+VCCP
R438
R438
221/F_4
221/F_4
R437
R437
100/F_4
100/F_4
R454
R454
24.9/F_4
24.9/F_4
+VCCP
+VCCP
R453
R453
221/F_4
221/F_4
R452
R452
100/F_4
100/F_4
3
HXRCOMP
R434
R434
24.9/F_4
24.9/F_4
R150
R150
54.9/F_4
54.9/F_4
HXSCOMP
HYRCOMP
R451
R451
54.9/F_4
54.9/F_4
HYSCOMP
HXSWING
C665
C665
.1U_4
.1U_4
1 2
HYSWING
C690
C690
.1U_4
.1U_4
1 2
4
4
5
HD#[0..63]<3>
HD#[0..63]
HD#0
E4
HD#1
E1
HD#2
F4
HD#3
H7
HD#4
E2
HD#5
F1
HD#6
E3
HD#7
D3
HD#8
K7
HD#9
F2
HD#10
J7
HD#11
J8
HD#12
H6
HD#13
F3
HD#14
K8
HD#15
H5
HD#16
H1
HD#17
H2
HD#18
K5
HD#19
K6
HD#20
J4
HD#21
G3
HD#22
H3
HD#23
J1
HD#24
L5
HD#25
K4
HD#26
J5
HD#27
P7
HD#28
L7
HD#29
J3
HD#30
P5
HD#31
L3
HD#32
U7
HD#33
V6
HD#34
R6
HD#35
R5
HD#36
P3
HD#37
T8
HD#38
R7
HD#39
R8
HD#40
U8
HD#41
R4
HD#42
T4
HD#43
T5
HD#44
R1
HD#45
T3
HD#46
V8
HD#47
U6
HD#48
W6
HD#49
U3
HD#50
V5
HD#51
W8
HD#52
W7
HD#53
U2
HD#54
U1
HD#55
Y5
HD#56
Y2
HD#57
V4
HD#58
Y7
HD#59
W1
HD#60
W3
HD#61
Y3
HD#62
Y6
HD#63
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
5
W2
C1
C2
D1
T1
L1
P1
U34A
U34A
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
@ALVISO_GM/GML
@ALVISO_GM/GML
6
HA#3
G9
HA3#
HA#4
C9
HA4#
HA#5
E9
HA5#
HA#6
B7
HA6#
HA#7
A10
HA7#
HA#8
F9
HA8#
HA#9
D8
HA9#
HA#10
B10
HA10#
HA#11
E10
HA11#
HA#12
G10
HA12#
HA#13
D9
HA13#
HA#14
E11
HA14#
HA#15
F10
HA15#
HA#16
G11
HA16#
HA#17
G13
HA17#
HA#18
C10
HA18#
HA#19
C11
HA19#
HA#20
D11
HA20#
HA#21
C12
HA21#
HA#22
B13
HA22#
HA#23
A12
HA23#
HA#24
F12
HA24#
HA#25
G12
HA25#
HA#26
E12
HA26#
HA#27
C13
HA27#
HA#28
B11
HA28#
HA#29
D13
HA29#
HA#30
A13
HA30#
HA#31
F13
HA31#
F8
HADS#
B9
HADSTB0#
E13
HADSTB1#
J11
HVREF
A5
HBNR#
D5
HBPRI#
E7
BREQ0#
H10
HCPURST#
HOST
HOST
HCLKINN
HCLKINP
HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#
AB1
AB2
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5
HCPUSLP#_GMCH
HA#[3..31]
7
HA#[3..31] <3>
ADS# <3>
HADSTB0# <3>
HADSTB1# <3>
BNR# <3>
BPRI# <3>
HBREQ0# <3>
CPURST# <3>
HCLK_MCH# <2>
HCLK_MCH <2>
DBSY# <3>
DEFER# <3>
HDBI0# <3>
HDBI1# <3>
HDBI2# <3>
HDBI3# <3>
DPWR# <3>
DRDY# <3>
HDSTBN0# <3>
HDSTBN1# <3>
HDSTBN2# <3>
HDSTBN3# <3>
HDSTBP0# <3>
HDSTBP1# <3>
HDSTBP2# <3>
HDSTBP3# <3>
HIT# <3>
HITM# <3>
HLOCK# <3>
HREQ#0 <3>
HREQ#1 <3>
HREQ#2 <3>
HREQ#3 <3>
HREQ#4 <3>
RS#0 <3>
RS#1 <3>
RS#2 <3>
HTRDY# <3>
HVREF
R162
R162
1 2
0_4
0_4
T60
T60
*PAD
*PAD
T170
T170
*PAD
*PAD
+VCCP
R178
R178
100/F_4
100/F_4
R173
R173
200/F_4
200/F_4
8
C331
C331
.1U_4
.1U_4
1 2
CPUSLP# <3,18>
DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
7
COMPUTER
Alviso (Host)
Alviso (Host)
Alviso (Host)
ZL7 C
C
ZL7 C
C
ZL7 C
C
540Thursday, June 23, 2005
540Thursday, June 23, 2005
540Thursday, June 23, 2005
8
of
of
of
1
DMI_TXN0<19>
DMI_TXN1<19>
12
R184
R184
*40.2/F_4
*40.2/F_4
12
12
R190
R190
80.6/F_4
80.6/F_4
M_RCOMPN
M_RCOMPP
R188
R188
80.6/F_4
80.6/F_4
DMI_TXN2<19>
DMI_TXN3<19>
DMI_TXP0<19>
DMI_TXP1<19>
DMI_TXP2<19>
DMI_TXP3<19>
DMI_RXN0<19>
DMI_RXN1<19>
DMI_RXN2<19>
DMI_RXN3<19>
DMI_RXP0<19>
DMI_RXP1<19>
DMI_RXP2<19>
DMI_RXP3<19>
CLK_SDRAM0<9>
CLK_SDRAM1<9>
CLK_SDRAM3<9>
CLK_SDRAM4<9>
CLK_SDRAM0#<9>
CLK_SDRAM1#<9>
CLK_SDRAM3#<9>
CLK_SDRAM4#<9>
SM_CS0#<9,10>
SM_CS1#<9,10>
SM_CS2#<9,10>
SM_CS3#<9,10>
1
T79T79
T74T74
T78T78
T73T73
CKE0<9,10>
CKE1<9,10>
CKE2<9,10>
CKE3<9,10>
M_OCDCOMP0
M_OCDCOMP1
M_ODT0<9,10>
M_ODT1<9,10>
M_ODT2<9,10>
M_ODT3<9,10>
+0.9VSUS
It's point to point,
55ohm trace, keep as
short as possible.
CLK_SDRAM2
CLK_SDRAM5
CLK_SDRAM2#
CLK_SDRAM5#
CKE0
CKE1
CKE2
CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_RCOMPN
M_RCOMPP
SMXSLEW
SMYSLEW
+2.5V
A A
B B
12
R186
R186
*40.2/F_4
*40.2/F_4
Route as short
as possible.
Depop for SMVREF
C C
over current issue
+1.8VSUS
D D
2
CFG[0:2]=100 FOR FSB 533
CFG[0:2]=101 FOR FSB 400
U34C
U34C
AA31
DMIRXN0
AB35
DMIRXN1
AC31
DMIRXN2
AD35
DMIRXN3
Y31
DMIRXP0
AA35
DMIRXP1
AB31
DMIRXP2
AC35
DMIRXP3
AA33
DMITXN0
AB37
DMITXN1
AC33
DMITXN2
AD37
DMITXN3
Y33
DMITXP0
AA37
DMITXP1
AB33
DMITXP2
AC37
DMITXP3
AM33
SM_CK0
AL1
SM_CK1
AE11
SM_CK2
AJ34
SM_CK3
AF6
SM_CK4
AC10
SM_CK5
AN33
SM_CK0#
AK1
SM_CK1#
AE10
SM_CK2#
AJ33
SM_CK3#
AF5
SM_CK4#
AD10
SM_CK5#
AP21
SM_CKE0
AM21
SM_CKE1
AH21
SM_CKE2
AK21
SM_CKE3
AN16
SM_CS0#
AM14
SM_CS1#
AH15
SM_CS2#
AG16
SM_CS3#
AF22
SM_OCDCOMP0
AF16
SM_OCDCOMP1
AP14
SM_ODT0
AL15
SM_ODT1
AM11
SM_ODT2
AN10
SM_ODT3
AK10
SMRCOMPN
AK11
SMRCOMPP
AF37
SMVREF0
AD1
SMVREF1
AE27
SMXSLEWIN
AE28
SMXSLEWOUT
AF9
SMYSLEWIN
AF10
SMYSLEWOUT
@ALVISO_GM/GML
@ALVISO_GM/GML
R171 10K_4R171 10K_4
1 2
R170 10K_4R170 10K_4
1 2
PM_EXTTS#0
PM_EXTTS#1
2
DMIDDR MUXING
DMIDDR MUXING
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
CFG/RSVDPMLCKNC
CFG/RSVDPMLCKNC
RSVD26
RSVD27
BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSTIN#
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
3
CFG3
R168
R168
*1K_4
*1K_4
R174 4.7K_4R174 4.7K_4
CFG0
G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25
J23
J21
H22
F5
AD30
AE29
A24
A23
C37
D37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
3
1 2
R164 1K_4R164 1K_4
R167 1K_4R167 1K_4
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
CFG[17:3] have internal pullup resistors.
CFG[19:18] have internal pulldown resistors
PM_EXTTS#0
PM_EXTTS#1
DOT96#
DOT96
DREFSSCLK#
DREFSSCLK
TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
T56T56
R177 0_4R177 0_4
1 2
R460 100R460 100
T187T187
T183T183
T186T186
T185T185
T184T184
T188T188
T175T175
T167T167
T172T172
TXLCLKOUT-<11,16>
TXLCLKOUT+<11,16>
TXUCLKOUT-<11,16>
TXUCLKOUT+<11,16>
TXLOUT0-<11,16>
TXLOUT0+<11,16>
TXLOUT1-<11,16>
TXLOUT1+<11,16>
TXLOUT2-<11,16>
TXLOUT2+<11,16>
TXUOUT0-<11,16>
TXUOUT0+<11,16>
TXUOUT1-<11,16>
TXUOUT1+<11,16>
TXUOUT2-<11,16>
TXUOUT2+<11,16>
DISP_ON<11,16>
BLON<11,16>
R166 *1K_4R166 *1K_4
R157
R157
1K_4
1K_4
T50T50
T70T70
R153
R153
T58T58
R161
R161
T52T52
T63T63
T49T49
T72T72
T69T69
T67T67
T66T66
T59T59
T55T55
T64T64
T68T68
T71T71
T169T169
T168T168
T54T54
T51T51
PM_BMBUSY# <19>
IMVP_PWRGD <19,34>
PLTRST# <11,15,18,21,29,31,32,33>
4
FOR DDR533
+VCCP
SELPSB1_CLK <2,4>
SELPSB2_CLK <2,4>
*1K_4
*1K_4
1K_4
1K_4
THERMTRIP# <3,18>
DOT96# <2>
DOT96 <2>
DREFSSCLK# <2>
DREFSSCLK <2>
TXLCLKOUT+
TXUCLKOUTTXUCLKOUT+
TXLOUT0TXLOUT1-
TXLOUT1+
TXLOUT2TXLOUT2+
TXUOUT0TXUOUT0+
TXUOUT1TXUOUT1+
TXUOUT2TXUOUT2+
DISP_ON
BLON
4
CFG5 Low=DMIx2
High=DMIx4
CFG6 Low=DDR2
High=DDR
CFG9 Low=REVERSE LANE
High=NORMAL
CFG11 FOR CPU533
R147 150/F_4R147 150/F_4
1 2
R148 150/F_4R148 150/F_4
1 2
R151 150/F_4R151 150/F_4
1 2
R143 150/F_4R143 150/F_4
1 2
R152 150/F_4R152 150/F_4
1 2
R159 150/F_4R159 150/F_4
1 2
INT_DDCCLK<17>
INT_DDCDAT<17>
INT_VGA_BLU<17>
INT_VGA_GRN<17>
INT_VGA_RED<17>
INT_VSYNC<17>
INT_HSYNC<17>
241
241
241
241
241
241
241
241
R134I@0_4 R134I@0_4
R139I@0_4 R139I@0_4
CLK_MCH_3GPLL#<2>
CLK_MCH_3GPLL<2>
I_EDIDCLK<16>
I_EDIDDATA<16>
R156 1.5K/FR156 1.5K/F
INT_TV_C/R
INT_TV_COMP
INT_TV_Y/G
INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU
RN110I@4P2R-S-0 RN110I@4P2R-S-0
3
RN9I@4P2R-S-0 RN9I@4P2R-S-0
3
RN107I@4P2R-S-0 RN107I@4P2R-S-0
3
RN108I@4P2R-S-0 RN108I@4P2R-S-0
3
RN109I@4P2R-S-0 RN109I@4P2R-S-0
3
RN12I@4P2R-S-0 RN12I@4P2R-S-0
3
RN11I@4P2R-S-0 RN11I@4P2R-S-0
3
RN10I@4P2R-S-0 RN10I@4P2R-S-0
3
INT_DISP_ON
INT_BLON
5
SDVO_CTRLDATA<15>
SDVO_CTRLCLK<15>
INT_TV_COMP<16>
INT_TV_Y/G<16>
INT_TV_C/R<16>
INT_TXLCLKOUT-TXLCLKOUTINT_TXLCLKOUT+
INT_TXUCLKOUTINT_TXUCLKOUT+
INT_TXLOUT0-
INT_TXLOUT0+TXLOUT0+
INT_TXLOUT1-
INT_TXLOUT1+
INT_TXLOUT2-
INT_TXLOUT2+
INT_TXUOUT0-
INT_TXUOUT0+
INT_TXUOUT1-
INT_TXUOUT1+
INT_TXUOUT2-
INT_TXUOUT2+
5
R169 4.99K/FR169 4.99K/F
R176 255/F_4R176 255/F_4
INT_BLON
T47T47
T48T48
INT_DISP_ON
T53T53
T62T62
T61T61
INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXUCLKOUTINT_TXUCLKOUT+
INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
INT_TXUOUT0INT_TXUOUT1INT_TXUOUT2-
INT_TXUOUT0+
INT_TXUOUT1+
INT_TXUOUT2+
INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
TV_REFSET
REFSET
T57T57
H24
H25
AB29
AC29
A15
C16
A17
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
J18
J20
6
GMCHEXP_TXP[0..15]<11>
GMCHEXP_TXN[0..15]<11>
GMCHEXP_RXP[0..15]<11,15>
GMCHEXP_RXN[0..15]<11,15>
U34F
U34F
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LBCLKN
LBCLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
@ALVISO_GM/GML
@ALVISO_GM/GML
6
7
GMCHEXP_TXP[0..15]
GMCHEXP_TXN[0..15]
GMCHEXP_RXP[0..15]
GMCHEXP_RXN[0..15]
R158 24.9/F_4R158 24.9/F_4
MISC
MISC
TV VGA LVDS
TV VGA LVDS
CGMCHEXP_TXP0
CGMCHEXP_TXN0
CGMCHEXP_TXP1
CGMCHEXP_TXN1
CGMCHEXP_TXP2
CGMCHEXP_TXN2
CGMCHEXP_TXP3
CGMCHEXP_TXN3
EXP_COMPI
EXP_ICOMPO
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
Title
Title
Title
Size Document Number Rev
Custom
Size Document Number Rev
Custom
Size Document Number Rev
Custom
Date: Sheet
Date: Sheet
Date: Sheet
D36
D34
GMCHEXP_RXN0
E30
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
Alviso (VGA,DMI)
Alviso (VGA,DMI)
Alviso (VGA,DMI)
ZL7 C
ZL7 C
ZL7 C
7
GMCHEXP_RXN1
F34
GMCHEXP_RXN2
G30
GMCHEXP_RXN3
H34
GMCHEXP_RXN4
J30
GMCHEXP_RXN5
K34
GMCHEXP_RXN6
L30
GMCHEXP_RXN7
M34
GMCHEXP_RXN8
N30
GMCHEXP_RXN9
P34
GMCHEXP_RXN10
R30
GMCHEXP_RXN11
T34
GMCHEXP_RXN12
U30
GMCHEXP_RXN13
V34
GMCHEXP_RXN14
W30
GMCHEXP_RXN15
Y34
GMCHEXP_RXP0
D30
GMCHEXP_RXP1
E34
GMCHEXP_RXP2
F30
GMCHEXP_RXP3
G34
GMCHEXP_RXP4
H30
GMCHEXP_RXP5
J34
GMCHEXP_RXP6
K30
GMCHEXP_RXP7
L34
GMCHEXP_RXP8
M30
GMCHEXP_RXP9
N34
GMCHEXP_RXP10
P30
GMCHEXP_RXP11
R34
GMCHEXP_RXP12
T30
GMCHEXP_RXP13
U34
GMCHEXP_RXP14
V30
GMCHEXP_RXP15
W34
CGMCHEXP_TXN0
E32
CGMCHEXP_TXN1
F36
CGMCHEXP_TXN2
G32
CGMCHEXP_TXN3
H36
CGMCHEXP_TXN4
J32
CGMCHEXP_TXN5
K36
CGMCHEXP_TXN6
L32
CGMCHEXP_TXN7
M36
CGMCHEXP_TXN8
N32
CGMCHEXP_TXN9
P36
CGMCHEXP_TXN10
R32
CGMCHEXP_TXN11
T36
CGMCHEXP_TXN12
U32
CGMCHEXP_TXN13
V36
CGMCHEXP_TXN14
W32
CGMCHEXP_TXN15
Y36
CGMCHEXP_TXP0
D32
CGMCHEXP_TXP1
E36
CGMCHEXP_TXP2
F32
CGMCHEXP_TXP3
G36
CGMCHEXP_TXP4
H32
CGMCHEXP_TXP5
J36
CGMCHEXP_TXP6
K32
CGMCHEXP_TXP7
L36
CGMCHEXP_TXP8
M32
CGMCHEXP_TXP9
N36
CGMCHEXP_TXP10
P32
CGMCHEXP_TXP11
R36
CGMCHEXP_TXP12
T32
CGMCHEXP_TXP13
U36
CGMCHEXP_TXP14
V32
CGMCHEXP_TXP15
W36
C629ID@.1U_4 C629ID@.1U_4
12
C627ID@.1U_4 C627ID@.1U_4
12
C308ID@.1U_4 C308ID@.1U_4
12
C312ID@.1U_4 C312ID@.1U_4
12
C625ID@.1U_4 C625ID@.1U_4
12
C620ID@.1U_4 C620ID@.1U_4
12
C318ID@.1U_4 C318ID@.1U_4
12
C323ID@.1U_4 C323ID@.1U_4
12
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
1 2
SDVOB_R+
SDVOB_R-
SDVOB_G+
SDVOB_G-
SDVOB_B+
SDVOB_B-
SDVOB_CLK+
SDVOB_CLK-
8
VCC3G_PCIE
GMCHEXP_TXN0
C626E@.1U_4 C626E@.1U_4
GMCHEXP_TXN1
C667E@.1U_4 C667E@.1U_4
GMCHEXP_TXN2
C619E@.1U_4 C619E@.1U_4
GMCHEXP_TXN3
C673E@.1U_4 C673E@.1U_4
GMCHEXP_TXN4
C613E@.1U_4 C613E@.1U_4
GMCHEXP_TXN5
C685E@.1U_4 C685E@.1U_4
GMCHEXP_TXN6
C605E@.1U_4 C605E@.1U_4
GMCHEXP_TXN7
C689E@.1U_4 C689E@.1U_4
GMCHEXP_TXN8
C599E@.1U_4 C599E@.1U_4
GMCHEXP_TXN9
C692E@.1U_4 C692E@.1U_4
GMCHEXP_TXN10
C594E@.1U_4 C594E@.1U_4
GMCHEXP_TXN11
C695E@.1U_4 C695E@.1U_4
GMCHEXP_TXN12
C592E@.1U_4 C592E@.1U_4
GMCHEXP_TXN13
C698E@.1U_4 C698E@.1U_4
GMCHEXP_TXN14
C590E@.1U_4 C590E@.1U_4
GMCHEXP_TXN15
C587E@.1U_4 C587E@.1U_4
GMCHEXP_TXP0
C628E@.1U_4 C628E@.1U_4
GMCHEXP_TXP1
C664E@.1U_4 C664E@.1U_4
GMCHEXP_TXP2
C624E@.1U_4 C624E@.1U_4
GMCHEXP_TXP3
C669E@.1U_4 C669E@.1U_4
GMCHEXP_TXP4
C616E@.1U_4 C616E@.1U_4
GMCHEXP_TXP5
C679E@.1U_4 C679E@.1U_4
GMCHEXP_TXP6
C608E@.1U_4 C608E@.1U_4
GMCHEXP_TXP7
C686E@.1U_4 C686E@.1U_4
GMCHEXP_TXP8
C601E@.1U_4 C601E@.1U_4
GMCHEXP_TXP9
C691E@.1U_4 C691E@.1U_4
GMCHEXP_TXP10
C595E@.1U_4 C595E@.1U_4
GMCHEXP_TXP11
C693E@.1U_4 C693E@.1U_4
GMCHEXP_TXP12
C593E@.1U_4 C593E@.1U_4
GMCHEXP_TXP13
C697E@.1U_4 C697E@.1U_4
GMCHEXP_TXP14
C591E@.1U_4 C591E@.1U_4
GMCHEXP_TXP15
C588E@.1U_4 C588E@.1U_4
SDVOB_R+ <15>
SDVOB_R- <15>
SDVOB_G+ <15>
SDVOB_G- <15>
SDVOB_B+ <15>
SDVOB_B- <15>
SDVOB_CLK+ <15>
SDVOB_CLK- <15>
640Thursday, June 23, 2005
640Thursday, June 23, 2005
640Thursday, June 23, 2005
8
of
of
of
1
2
3
4
5
6
7
8
A A
B B
C C
R_A_MD[0..63]<9>
R_A_MD0
R_A_MD1
R_A_MD2
R_A_MD3
R_A_MD4
R_A_MD5
R_A_MD6
R_A_MD7
R_A_MD8
R_A_MD9
R_A_MD10
R_A_MD11
R_A_MD12
R_A_MD13
R_A_MD14
R_A_MD15
R_A_MD16
R_A_MD17
R_A_MD18
R_A_MD19
R_A_MD20
R_A_MD21
R_A_MD22
R_A_MD23
R_A_MD24
R_A_MD25
R_A_MD26
R_A_MD27
R_A_MD28
R_A_MD29
R_A_MD30
R_A_MD31
R_A_MD32
R_A_MD33
R_A_MD34
R_A_MD35
R_A_MD37
R_A_MD38
R_A_MD39
R_A_MD40
R_A_MD41
R_A_MD42
R_A_MD43
R_A_MD44
R_A_MD45
R_A_MD46
R_A_MD47
R_A_MD48
R_A_MD49
R_A_MD50
R_A_MD51
R_A_MD52
R_A_MD53
R_A_MD54
R_A_MD55
R_A_MD56
R_A_MD57
R_A_MD58
R_A_MD59
R_A_MD60
R_A_MD61
R_A_MD62
R_A_MD63
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
U34B
U34B
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
SA_BS0#
SA_BS1#
SA_BS2#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
@ALVISO_GM/GML
@ALVISO_GM/GML
AK15
AK16
AL21
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
AN15
AP16
AF29
AF28
AP15
R_A_BS0#
R_A_BS1#
R_A_BS2#
R_A_DM0
R_A_DM1
R_A_DM2
R_A_DM3
R_A_DM4
R_A_DM5
R_A_DM6
R_A_DM7
R_A_DQS0
R_A_DQS1
R_A_DQS2
R_A_DQS3
R_A_DQS4
R_A_DQS5
R_A_DQS6
R_A_DQS7
R_A_DQS#0
R_A_DQS#1
R_A_DQS#2
R_A_DQS#3
R_A_DQS#4
R_A_DQS#5
R_A_DQS#6
R_A_DQS#7
R_A_MA0
R_A_MA1
R_A_MA2
R_A_MA3
R_A_MA4
R_A_MA5
R_A_MA6
R_A_MA7
R_A_MA8
R_A_MA9
R_A_MA10
R_A_MA11
R_A_MA12
R_A_MA13
R_A_SCASA#
R_A_SRASA#
SA_RCVENIN#
SA_RCVENOUT#
R_A_BMWEA#
R_A_BS0# <9,10>
R_A_BS1# <9,10>
R_A_BS2# <9,10>
R_A_DM[0..7] <9>
R_A_DQS[0..7] <9>
R_A_DQS#[0..7] <9>
R_A_MA[0..13] <9,10>
R_A_SCASA# <9,10>
R_A_SRASA# <9,10>
R_A_BMWEA# <9,10>
R_B_MD[0..63]<9>
T77T77 T75T75
T80T80
R_B_MD0
R_B_MD1
R_B_MD2
R_B_MD3
R_B_MD4
R_B_MD5
R_B_MD6
R_B_MD7
R_B_MD8
R_B_MD9
R_B_MD10
R_B_MD11
R_B_MD12
R_B_MD13
R_B_MD14
R_B_MD15
R_B_MD16
R_B_MD17
R_B_MD18
R_B_MD19
R_B_MD20
R_B_MD21
R_B_MD22
R_B_MD23
R_B_MD24
R_B_MD25
R_B_MD26
R_B_MD27
R_B_MD28
R_B_MD29
R_B_MD30
R_B_MD31
R_B_MD32
R_B_MD33
R_B_MD34
R_B_MD35
R_B_MD36R_A_MD36
R_B_MD37
R_B_MD38
R_B_MD39
R_B_MD40
R_B_MD41
R_B_MD42
R_B_MD43
R_B_MD44
R_B_MD45
R_B_MD46
R_B_MD47
R_B_MD48
R_B_MD49
R_B_MD50
R_B_MD51
R_B_MD52
R_B_MD53
R_B_MD54
R_B_MD55
R_B_MD56
R_B_MD57
R_B_MD58
R_B_MD59
R_B_MD60
R_B_MD61
R_B_MD62
R_B_MD63
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
U34G
U34G
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
SB_BS0#
SB_BS1#
SB_BS2#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
@ALVISO_GM/GML
@ALVISO_GM/GML
AJ15
AG17
AG21
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
AH14
AK14
AF15
AF14
AH16
R_B_BS0#
R_B_BS1#
R_B_BS2#
R_B_DM0
R_B_DM1
R_B_DM2
R_B_DM3
R_B_DM4
R_B_DM5
R_B_DM6
R_B_DM7
R_B_DQS0
R_B_DQS1
R_B_DQS2
R_B_DQS3
R_B_DQS4
R_B_DQS5
R_B_DQS6
R_B_DQS7
R_B_DQS#0
R_B_DQS#1
R_B_DQS#2
R_B_DQS#3
R_B_DQS#4
R_B_DQS#5
R_B_DQS#6
R_B_DQS#7
R_B_MA0
R_B_MA1
R_B_MA2
R_B_MA3
R_B_MA4
R_B_MA5
R_B_MA6
R_B_MA7
R_B_MA8
R_B_MA9
R_B_MA10
R_B_MA11
R_B_MA12
R_B_MA13
R_B_SCASA#
R_B_SRASA#
SB_RCVENIN#
SB_RCVENOUT#
R_B_BMWEA#
R_B_BS0# <9,10>
R_B_BS1# <9,10>
R_B_BS2# <9,10>
R_B_DM[0..7] <9>
R_B_DQS[0..7] <9>
R_B_DQS#[0..7] <9>
R_B_MA[0..13] <9,10>
R_B_SCASA# <9,10>
R_B_SRASA# <9,10>
R_B_BMWEA# <9,10>
T76T76
D D
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
1
2
3
4
5
6
Date: Sheet of
COMPUTER
Alviso (DDR)
Alviso (DDR)
Alviso (DDR)
ZL7 C
ZL7 C
ZL7 C
of
740Thursday, June 23, 2005
740Thursday, June 23, 2005
7
740Thursday, June 23, 2005
8
5
+VCCP
3900mA
12
12
C340
C340
C687
C687
.1U_4
.1U_4
.1U_4
.1U_4
D D
C332
C332
.1U_4
.1U_4
C334
C334
10U_6.3V
10U_6.3V
C330
C330
10U_6.3V
10U_6.3V
12
C336
C336
10U_6.3V
10U_6.3V
12
12
12
DEPOP C259, C248, C306, C303 WHEN NO EXT.VGA
L31
L31
VCCA_DPLLA
R14210R142
10
10UH
10UH
10UH
10UH
1UH
1UH
L69
L69
1UH
1UH
L28
L28
L70
L70
VCCGFOLLOW
12
12
12
12
12
C293
C293
I@.022U_4
I@.022U_4
12
C306
C306
I@.1U_4
I@.1U_4
VCCA_DPLLB
12
C303
C303
I@.1U_4
I@.1U_4
12
C701
C701
.1U_4
.1U_4
12
C696
C696
.1U_4
.1U_4
VCCA_CRTDAC
12
D11
D11
CH551
CH551
C287
C287
I@.1U_4
I@.1U_4
C259
C259
+
+
I@470U/2.5V
I@470U/2.5V
C248
C248
+
+
I@470U/2.5V
I@470U/2.5V
C699
C699
+
+
470U/2.5V
470U/2.5V
C688
C688
+
+
470U/2.5V
470U/2.5V
21
C646 .47U/25VC646 .47U/25V
1 2
C658 .47U/25VC658 .47U/25V
1 2
C694 .22UC694 .22U
C670 .22UC670 .22U
+VCCP
.1U_4
.1U_4
+2.5V
C319
C319
+1.5V
12
12
+VCCP
810mA
VCCP_GMCH_CAP1
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC
C291
C291
10U_6.3V
10U_6.3V
+1.5V
60mA
+1.5V
C C
+1.5V
60mA
+1.5V
60mA
B B
+2.5V
68mA
+VCCP
12
@BLM18PG181SN1/0_6
@BLM18PG181SN1/0_6
C341
C341
2.2U_6.3V
2.2U_6.3V
12
C333
C333
4.7U/10V_8
4.7U/10V_8
L39
L39
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
AC2
AC1
B23
C35
AA1
AA2
F19
E19
G19
H20
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
U34H
U34H
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC0
VCCA_CRTDAC1
VVSSA_CRTDAC
VCC_SYNC
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
@ALVISO_GM/GML
@ALVISO_GM/GML
4
POWER
POWER
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCA_TVBG
VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCA_LVDS
VCCHV0
VCCHV1
VCCHV2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCA_3GBG
VSSA_3GBG
F17
E17
D18
C18
F18
E18
H18
G18
D19
H17
B26
B25
A25
A35
B22
B21
A21
AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1
B28
A28
A27
AF20
AP19
AF19
AF18
AE37
W37
U37
R37
N37
L37
J37
Y29
Y28
Y27
F37
G37
VCC_TVBG
+1.5V
VCC_QTVDAC
V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4
NO FILTER WHEN EXT. VGA
L32
12
C296
C296
.1U_4
.1U_4
+1.8VSUS
C346
C346
10U_6.3V
10U_6.3V
C358 .1U_4C358 .1U_4
1 2
C354 .1U_4C354 .1U_4
1 2
C348 .1U_4C348 .1U_4
1 2
12
C315
C315
.1U_4
.1U_4
L32
@BLM18PG181SN1/0_6
@BLM18PG181SN1/0_6
C273
C273
I@.1U_4
I@.1U_4
12
C356 .1U_4C356 .1U_4
1 2
C705 .1U_4C705 .1U_4
1 2
C357 .1U_4C357 .1U_4
1 2
12
C344
C344
10U_6.3V
10U_6.3V
+2.5V
150mA
VCC_TVDACC
C264
C264
I@.022U_4
I@.022U_4
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
Note: All VCCSM
pins shorted
internally.
+2.5V
60mA
VCC_DDRDLL
VCC3G_PCIE
12
12
Note: All VCCSM
pins shorted
internally.
12
+2.5V
2mA
C280
C280
10U_6.3V
10U_6.3V
For DDR2
12
+
+
C360
C360
330U/6.3V-7343
330U/6.3V-7343
+
+
C339
C339
220U/2.5V
220U/2.5V
12
C342
C342
.1U_4
.1U_4
3
VCC_TVDACA
12
C265
C265
C274
C274
I@.1U_4
I@.1U_4
I@.022U_4
I@.022U_4
+3V
C275
C275
I@.022U_4
I@.022U_4
10mA
+2.5V
12
C290
C290
.1U_4
.1U_4
C272
C272
I@.022U_4
I@.022U_4
C260
C260
.022U_4
.022U_4
VCC_QTVDAC
C271
C271
I@.022U_4
I@.022U_4
12
C302
C302
.01U/16V_4
.01U/16V_4
12
12
12
VCC_TVBG
C266
C266
I@.1U_4
I@.1U_4
C261
C261
.1U_4
.1U_4
C263
C263
I@.1U_4
I@.1U_4
NO FILTER WHEN EXT. VGA
12
+
+
C359
C359
100U/10V
100U/10V
VCC3G_PCIE
12
C703
C703
10U_6.3V
10U_6.3V
12
C700
C700
.1U_4
.1U_4
12
C345
C345
10U_6.3V
10U_6.3V
12
C343
C343
10U_6.3V
10U_6.3V
L33
L33
12
@BLM18PG181SN1/0_6
@BLM18PG181SN1/0_6
120mA
VCC_TVDACB
12
C267
C267
I@.1U_4
I@.1U_4
12
C295
C295
.1U_4
.1U_4
L34
L34
12
@BLM18PG181SN1/0_6
@BLM18PG181SN1/0_6
12
C918
C918
I@10U_6.3V
I@10U_6.3V
close to PIN D19
L30
L30
12
@BLM18PG181SN1/0_6
@BLM18PG181SN1/0_6
L49
L49
12
BLM18PG181SN1
BLM18PG181SN1
C349
C349
.1U_4
.1U_4
L71
L71
12
BLM18PG181SN1
BLM18PG181SN1
R182
R182
VCCA_3GPLL_1VCCA_3GPLL
1 2
0.5/F
0.5/F
12
+1.5V
+1.5V
+3V
+1.5V
60mA
C277
C277
10U_6.3V
10U_6.3V
24mA
1A
R13310R133
10
L35
L35
@BLM18PG181SN1/0_6
@BLM18PG181SN1/0_6
+3V
+1.5V
+1.5V
30mA
L46
L46
12
BLM18PG181SN1
BLM18PG181SN1
V1_5VFOLLOW
12
+VCCP
+1.5V
2
D10
D10
21
+1.5V
U34D
AB26
AA26
AB25
AA25
AB24
AA24
AB23
AA23
AB22
AA22
AB21
AA21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17
AB16
AA16
AB15
AA15
AB14
AA14
AA13
AA12
W13
V13
U13
T13
R13
P13
N13
M13
L13
W12
V12
U12
T12
R12
P12
N12
M12
L12
Y26
Y25
Y24
Y23
Y22
Y21
R21
Y17
R17
Y16
W16
V16
U16
T16
R16
P16
N16
M16
L16
Y15
W15
V15
U15
T15
R15
P15
N15
M15
L15
Y14
W14
V14
U14
T14
R14
P14
N14
M14
L14
Y13
Y12
U34D
VTT_NCTF0
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
VTT_NCTF7
VTT_NCTF8
VTT_NCTF9
VTT_NCTF10
VTT_NCTF11
VTT_NCTF12
VTT_NCTF13
VTT_NCTF14
VTT_NCTF15
VTT_NCTF16
VTT_NCTF17
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
VSS_NCTF54
VSS_NCTF55
VSS_NCTF56
VSS_NCTF57
VSS_NCTF58
VSS_NCTF59
VSS_NCTF60
VSS_NCTF61
VSS_NCTF62
VSS_NCTF63
VSS_NCTF64
VSS_NCTF65
VSS_NCTF66
VSS_NCTF67
VSS_NCTF68
NCTF
NCTF
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
@ALVISO_GM/GML
@ALVISO_GM/GML
CH551
CH551
+3V
AD26
AC26
AD25
AC25
AD24
AC24
AD23
AC23
AD22
AC22
AD21
AC21
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AC17
AD16
AC16
AD15
AC15
AD14
AC14
AD13
AC13
AB13
AD12
AC12
AB12
W26
V26
U26
T26
R26
P26
N26
M26
L26
W25
V25
U25
T25
R25
P25
N25
M25
L25
W24
V24
U24
T24
R24
P24
N24
M24
L24
W23
V23
U23
T23
R23
P23
N23
M23
L23
W22
V22
U22
T22
R22
P22
N22
M22
L22
W21
V21
U21
T21
P21
N21
M21
L21
Y20
R20
P20
N20
M20
L20
Y19
R19
P19
N19
M19
L19
Y18
R18
P18
N18
M18
L18
W17
V17
U17
T17
P17
N17
M17
L17
1
+1.8VSUS
+VCCP
A A
5
4
12
C289
C289
.1U_4
.1U_4
12
C288
C288
4.7U/10V_8
4.7U/10V_8
+2.5V
close to PIN B28,A28,A27
3
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
COMPUTER
Alviso (Power)
Alviso (Power)
Alviso (Power)
ZL7 C
C
ZL7 C
C
ZL7 C
C
1
840Thursday, June 23, 2005
840Thursday, June 23, 2005
840Thursday, June 23, 2005
of
of
of
1
2
3
4
5
6
7
8
+1.8VSUS +1.8VSUS
+0.9VSUS +0.9VSUS
JDIM1
JDIM1
1
VREF
3
R_A_MD5
A A
B B
R_A_BS2#<7,10>
R_A_BS0#<7,10>
R_A_BMWEA#<7,10>
R_A_SCASA#<7,10>
SM_CS1#<6,10>
M_ODT1<6,10>
C C
D D
R_A_MD4
R_A_DQS#0
R_A_DQS0
R_A_MD2
R_A_MD7
R_A_MD13
R_A_MD12
R_A_DQS#1
R_A_DQS1
R_A_MD14 R_A_MD11
R_A_MD15
R_A_MD16
R_A_MD20
R_A_DQS#2
R_A_DQS2
R_A_DM3
R_A_MD26
R_A_MD30
CKE0
R_A_BS2#
R_A_MA12
R_A_MA9
R_A_MA8
R_A_MA5
R_A_MA3
R_A_MA1
R_A_MA10
R_A_BS0#
R_A_BMWEA#
R_A_SCASA#
SM_CS1#
M_ODT1
R_A_MD33
R_A_MD32
R_A_DQS#4
R_A_DQS4
R_A_MD34
R_A_MD35
R_A_MD41
R_A_MD40
R_A_DM5
R_A_MD48
R_A_MD49
R_A_DQS#6
R_A_DQS6
R_A_MD51
R_A_DM7
R_A_MD63
R_A_MD62
SMBCK
+3V
SMbus address A0
1
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
PC4800_DDR2_4.0MM_REV
PC4800_DDR2_4.0MM_REV
CLOCK 0,1,2
2
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
R_A_MD0
4
R_A_MD1
6
8
R_A_DM0
10
12
R_A_MD3
14
R_A_MD6
16
18
R_A_MD9
20
R_A_MD8
22
24
R_A_DM1
26
28
CLK_SDRAM0
30
CLK_SDRAM0#
32
34
36
R_A_MD10
38
40
42
R_A_MD21
44
R_A_MD17
46
48
50
R_A_DM2
52
54
R_A_MD18R_A_MD19
56
R_A_MD22R_A_MD23
58
60
R_A_MD24R_A_MD28
62
R_A_MD25R_A_MD29
64
66
R_A_DQS#3
68
R_A_DQS3
70
72
R_A_MD27
74
R_A_MD31
76
78
CKE1
80
82
84
86
88
R_A_MA11
90
R_A_MA7
92
R_A_MA6
94
96
R_A_MA4
98
R_A_MA2
100
R_A_MA0
102
104
R_A_BS1#
106
R_A_SRASA#
108
SM_CS0#
110
112
M_ODT0
114
R_A_MA13
116
118
120
122
R_A_MD36
124
R_A_MD37
126
128
R_A_DM4
130
132
R_A_MD39
134
R_A_MD38
136
138
R_A_MD44
140
R_A_MD45
142
144
R_A_DQS#5
146
R_A_DQS5
148
150
R_A_MD42R_A_MD46
152
R_A_MD43R_A_MD47
154
156
R_A_MD52
158
R_A_MD53
160
162
CLK_SDRAM1
164
CLK_SDRAM1# CLK_SDRAM4#
166
168
R_A_DM6
170
172
R_A_MD54R_A_MD50
174
R_A_MD55
176
178
R_A_MD56R_A_MD60
180
R_A_MD57R_A_MD61
182
184
R_A_DQS#7
186
R_A_DQS7
188
190
R_A_MD58
192
R_A_MD59
194
196
198
200
R650
R650
10K_4
10K_4
R651
R651
10K_4
10K_4
3
CLK_SDRAM0 <6>
CLK_SDRAM0# <6>
R_A_BS1# <7,10>
R_A_SRASA# <7,10>
SM_CS0# <6,10>
M_ODT0 <6,10>
CLK_SDRAM1 <6>
CLK_SDRAM1# <6>
R_A_DM[0..7] <7>
R_A_MD[0..63] <7>
R_A_DQS[0..7] <7>
R_A_DQS#[0..7] <7>
R_A_MA[0..13] <7,10>
R_B_BS2#<7,10>
R_B_BS0#<7,10>
R_B_BMWEA#<7,10>
R_B_SCASA#<7,10>
SMBDT<2>
SMBCK<2>
4
CKE2<6,10> CKE3 <6,10>CKE1 <6,10>CKE0<6,10>
SM_CS3#<6,10>
M_ODT3<6,10>
SMBDTSMBDT
SMBCK
+3V
SMbus address A1
+1.8VSUS +1.8VSUS
JDIM2
JDIM2
1
VREF
3
R_B_MD5
R_B_MD4
R_B_DQS#0
R_B_DQS0
R_B_MD6
R_B_MD3
R_B_MD11
R_B_MD9
R_B_DQS#1
R_B_DQS1
R_B_MD14 R_B_MD15
R_B_MD8
R_B_DQS#2
R_B_DQS2
R_B_MD18
R_B_MD23
R_B_MD28 R_B_MD25
R_B_DM3
R_B_MD26
R_B_MD30
CKE2
R_B_BS2#
R_B_MA12
R_B_MA9
R_B_MA5
R_B_MA3
R_B_MA1
R_B_MA10
R_B_BS0#
R_B_BMWEA#
R_B_SCASA#
SM_CS3#
M_ODT3
R_B_MD33
R_B_MD37
R_B_DQS#4
R_B_DQS4
R_B_MD34
R_B_MD35
R_B_MD40
R_B_MD41
R_B_DM5
R_B_MD46 R_B_MD43
R_B_MD47
R_B_MD48
R_B_MD49
R_B_DQS#6
R_B_DQS6
R_B_MD57
R_B_DM7
R_B_MD63
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
PC4800_DDR2_8.0MM_REV
PC4800_DDR2_8.0MM_REV
CLOCK 3,4,5
CKE 2,3CKE 0,1
5
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
R_B_MD7
R_B_MD1
R_B_DM0
R_B_MD2
R_B_MD0
R_B_MD13
R_B_MD12
R_B_DM1
CLK_SDRAM3
CLK_SDRAM3#
R_B_MD10
R_B_MD16R_B_MD20
R_B_MD17R_B_MD21
R_B_DM2
R_B_MD19
R_B_MD22
R_B_MD24R_B_MD29
R_B_DQS#3
R_B_DQS3
R_B_MD31
R_B_MD27
CKE3
R_B_MA11
R_B_MA7
R_B_MA6R_B_MA8
R_B_MA4
R_B_MA2
R_B_MA0
R_B_BS1#
R_B_SRASA#
SM_CS2#
M_ODT2
R_B_MA13
R_B_MD36
R_B_MD32
R_B_DM4
R_B_MD39
R_B_MD38
R_B_MD45
R_B_MD44
R_B_DQS#5
R_B_DQS5
R_B_MD42
R_B_MD53
R_B_MD52
CLK_SDRAM4
R_B_DM6
R_B_MD50R_B_MD54
R_B_MD51R_B_MD55
R_B_MD56R_B_MD60
R_B_MD61
R_B_DQS#7
R_B_DQS7
R_B_MD59R_B_MD62
R_B_MD58
+3V
R652
R652
10K_4
10K_4
CLK_SDRAM3 <6>
CLK_SDRAM3# <6>
R_B_BS1# <7,10>
R_B_SRASA# <7,10>
SM_CS2# <6,10>
M_ODT2 <6,10>
R653
R653
10K_4
10K_4
6
CLK_SDRAM4 <6>
CLK_SDRAM4# <6>
R_B_DM[0..7] <7>
R_B_MD[0..63] <7>
R_B_DQS[0..7] <7>
R_B_DQS#[0..7] <7>
R_B_MA[0..13] <7,10>
+0.9VSUS
12
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
C944
C944
.1U_4
.1U_4
Close to JDIMM1
12
12
C922
C922
2.2U/6.3V
2.2U/6.3V
2.2U/6.3V
2.2U/6.3V
12
12
C927
C927
C928
C928
.1U_4
.1U_4
.1U_4
.1U_4
Close to JDIMM2
12
12
C933
C933
2.2U/6.3V
2.2U/6.3V
2.2U/6.3V
2.2U/6.3V
12
12
C939
C939
C938
C938
.1U_4
.1U_4
.1U_4
.1U_4
12
C945
C945
2.2U/6.3V
2.2U/6.3V
C923
C923
C934
C934
12
12
Place Close to JDIMM1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 SO-DIMM ( 200P )
DDR2 SO-DIMM ( 200P )
DDR2 SO-DIMM ( 200P )
Date: Sheet
Date: Sheet
Date: Sheet
7
12
12
C925
C925
2.2U/6.3V
2.2U/6.3V
+3V
12
12
C936
C936
2.2U/6.3V
2.2U/6.3V
+3V
12
12
C946
C946
.1U_4
.1U_4
12
2.2U/6.3V
2.2U/6.3V
C931
C931
2.2U/6.3V
2.2U/6.3V
12
2.2U/6.3V
2.2U/6.3V
C942
C942
2.2U/6.3V
2.2U/6.3V
C926
C926
C937
C937
12
C947
C947
2.2U/6.3V
2.2U/6.3V
12
12
2.2U/6.3V
2.2U/6.3V
C929
C929
.1U_4
.1U_4
12
2.2U/6.3V
2.2U/6.3V
C940
C940
.1U_4
.1U_4
C924
C924
C935
C935
12
C930
C930
.1U_4
.1U_4
12
C941
C941
.1U_4
.1U_4
+0.9VSUS
Place Close to JDIMM2
PROJECT : ZL7
PROJECT : ZL7
Quanta Computer Inc.
Quanta Computer Inc.
C932
C932
.1U_4
.1U_4
C943
C943
.1U_4
.1U_4
C
C
940Thursday, June 23, 2005
940Thursday, June 23, 2005
940Thursday, June 23, 2005
8
C
of
of
of
1
2
3
4
5
6
7
8
A A
+0.9V
12
C485
C485
C426
C426
.1U_4
.1U_4
.1U_4
.1U_4
C377
C377
.1U_4
.1U_4
C489
C489
.1U_4
.1U_4
12
12
12
12
12
C460
C460
C462
C462
.1U_4
.1U_4
.1U_4
.1U_4
12
12
C384
C384
.1U_4
.1U_4
C467
C467
.1U_4
.1U_4
12
C483
C483
.1U_4
.1U_4
12
12
C461
C461
C479
C479
.1U_4
.1U_4
.1U_4
.1U_4
12
12
C492
C492
C383
C383
.1U_4
.1U_4
.1U_4
.1U_4
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V
+0.9V
12
12
12
C472
R_A_MA[0..13] <7,9>
R_B_MA[0..13] <7,9>
B B
R_B_MA0
R_B_BS1#<7,9>
R_A_BS2#<7,9> M_ODT3<6,9>
CKE0<6,9>
R_B_SRASA#<7,9>
SM_CS2#<6,9>
M_ODT1<6,9>
SM_CS1#<6,9>
R_A_BS0#<7,9>
M_ODT2<6,9>
CKE1<6,9>
C C
R_A_SRASA#<7,9>
SM_CS0#<6,9>
M_ODT0<6,9>
R_A_BS1#<7,9>
R_B_BS1#
R_A_BS2#
CKE0
R_A_MA4
R_A_MA2
R_B_SRASA# CKE3
SM_CS2#
M_ODT1
SM_CS1#
R_A_MA10
R_A_BS0#
R_B_MA13
M_ODT2
CKE1
R_A_MA11
R_B_MA11
R_B_MA2
R_B_MA9
R_B_MA8
R_B_MA6
R_B_MA4
R_B_MA3
R_B_MA12
R_A_MA3
R_A_MA1
R_A_SRASA#
SM_CS0#
R_A_MA13
M_ODT0
R_A_BS1#
R_A_MA0
2
RP27 4P2R-S-56RP27 4P2R-S-56
RP29 4P2R-S-56RP29 4P2R-S-56
RP31 4P2R-S-56RP31 4P2R-S-56
RP33 4P2R-S-56RP33 4P2R-S-56
RP35 4P2R-S-56RP35 4P2R-S-56
RP37 4P2R-S-56RP37 4P2R-S-56
RP39 4P2R-S-56RP39 4P2R-S-56
RP41 4P2R-S-56RP41 4P2R-S-56
RP42 4P2R-S-56RP42 4P2R-S-56
RP43 4P2R-S-56RP43 4P2R-S-56
RP45 4P2R-S-56RP45 4P2R-S-56
RP47 4P2R-S-56RP47 4P2R-S-56
RP49 4P2R-S-56RP49 4P2R-S-56
RP50 4P2R-S-56RP50 4P2R-S-56
RP51 4P2R-S-56RP51 4P2R-S-56
RP52 4P2R-S-56RP52 4P2R-S-56
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
C472
.1U_4
.1U_4
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V
+0.9V
+0.9V
+0.9V
+0.9V
C459
C459
.1U_4
.1U_4
C490
C490
.1U_4
.1U_4
12
12
C458
C458
C385
C385
.1U_4
.1U_4
.1U_4
.1U_4
12
12
C468
C468
C427
C427
.1U_4
.1U_4
.1U_4
.1U_4
12
12
C388
C388
.1U_4
.1U_4
SM_CS3#<6,9>
R_B_SCASA#<7,9>
R_B_BMWEA#<7,9>
R_B_BS2#<7,9>
R_A_BMWEA#<7,9>
R_A_SCASA#<7,9>
R_B_BS0#<7,9>
12
C417
C417
C416
C416
.1U_4
.1U_4
.1U_4
.1U_4
R_A_MA9
R_A_MA12
M_ODT3
SM_CS3#
R_B_SCASA#
R_B_BMWEA#
CKE3<6,9>
CKE2<6,9>
R_B_MA7
CKE2
R_B_BS2#
R_A_MA5
R_A_MA8
R_A_MA7
R_A_MA6
R_A_BMWEA#
R_A_SCASA#
R_B_MA1
R_B_MA5
R_B_MA10
R_B_BS0#
12
12
C425
C425
.1U_4
.1U_4
12
C487
C487
.1U_4
.1U_4
2
RP28 4P2R-S-56RP28 4P2R-S-56
4
2
RP30 4P2R-S-56RP30 4P2R-S-56
4
2
RP32 4P2R-S-56RP32 4P2R-S-56
4
2
RP34 4P2R-S-56RP34 4P2R-S-56
4
2
RP36 4P2R-S-56RP36 4P2R-S-56
4
2
RP38 4P2R-S-56RP38 4P2R-S-56
4
2
RP40 4P2R-S-56RP40 4P2R-S-56
4
2
RP44 4P2R-S-56RP44 4P2R-S-56
4
2
RP46 4P2R-S-56RP46 4P2R-S-56
4
2
RP48 4P2R-S-56RP48 4P2R-S-56
4
C486
C486
.1U_4
.1U_4
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
+0.9V
+0.9V
+0.9V
D D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 TERMINATION
DDR2 TERMINATION
DDR2 TERMINATION
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
PROJECT : ZL7
PROJECT : ZL7
Quanta Computer Inc.
Quanta Computer Inc.
10 40Thursday, June 23, 2005
10 40Thursday, June 23, 2005
10 40Thursday, June 23, 2005
8
C
C
C
of
of
of
5
U29A
GMCHEXP_TXP[0..15]<6>
GMCHEXP_TXN[0..15]<6>
GMCHEXP_RXP[0..15]<6,15>
GMCHEXP_RXN[0..15]<6,15>
D D
GMCHEXP_RXP0
GMCHEXP_RXN0
GMCHEXP_RXP1
GMCHEXP_RXN1
GMCHEXP_RXP2
GMCHEXP_RXN2
GMCHEXP_RXP3
GMCHEXP_RXN3
GMCHEXP_RXP4
VGA1.2V
+3V
+3V
R74 *10K_4R74 *10K_4
C258 E@22P_4C258 E@22P_4
E@TXC=27MHz
E@TXC=27MHz
C242 E@22P_4C242 E@22P_4
GMCHEXP_RXN4
GMCHEXP_RXP5
GMCHEXP_RXN5
GMCHEXP_RXP6
GMCHEXP_RXN6
GMCHEXP_RXP7
GMCHEXP_RXN7
GMCHEXP_RXP8
GMCHEXP_RXN8
GMCHEXP_RXP9
GMCHEXP_RXN9
GMCHEXP_RXP10
GMCHEXP_RXN10
GMCHEXP_RXP11
GMCHEXP_RXN11
GMCHEXP_RXP12
GMCHEXP_RXN12
GMCHEXP_RXP13
GMCHEXP_RXN13
GMCHEXP_RXP14
GMCHEXP_RXN14
GMCHEXP_RXP15
GMCHEXP_RXN15
CLK_PCIE_VGA<2>
CLK_PCIE_VGA#<2>
Y2
Y2
C C
B B
A A
C231 E@.1U_4C231 E@.1U_4
C234 E@.1U_4C234 E@.1U_4
C227 E@.1U_4C227 E@.1U_4
C224 E@.1U_4C224 E@.1U_4
C211 E@.1U_4C211 E@.1U_4
C205 E@.1U_4C205 E@.1U_4
C212 E@.1U_4C212 E@.1U_4
C207 E@.1U_4C207 E@.1U_4
C194 E@.1U_4C194 E@.1U_4
C188 E@.1U_4C188 E@.1U_4
C195 E@.1U_4C195 E@.1U_4
C191 E@.1U_4C191 E@.1U_4 R398
C178 E@.1U_4C178 E@.1U_4
C171 E@.1U_4C171 E@.1U_4
C160 E@.1U_4C160 E@.1U_4
C154 E@.1U_4C154 E@.1U_4
C159 E@.1U_4C159 E@.1U_4
C151 E@.1U_4C151 E@.1U_4
C182 E@.1U_4C182 E@.1U_4
C172 E@.1U_4C172 E@.1U_4
C140 E@.1U_4C140 E@.1U_4
C131 E@.1U_4C131 E@.1U_4
C141 E@.1U_4C141 E@.1U_4
C135 E@.1U_4C135 E@.1U_4
C116 E@.1U_4C116 E@.1U_4
C112 E@.1U_4C112 E@.1U_4
C117 E@.1U_4C117 E@.1U_4
C113 E@.1U_4C113 E@.1U_4
C96 E@.1U_4C96 E@.1U_4
C94 E@.1U_4C94 E@.1U_4
C98 E@.1U_4C98 E@.1U_4
C95 E@.1U_4C95 E@.1U_4
R101 E@150/F_4R101 E@150/F_4
R90 E@100/F_4R90 E@100/F_4
R89 E@10K/FR89 E@10K/F
R77 *10K_4R77 *10K_4
R76 E@10K_4R76 E@10K_4
R72
R72
E@1K_4
E@1K_4
XT_IN
R120
R120
*1M_4
*1M_4
XT_OUT
+3V
5
GMCHEXP_TXP0
GMCHEXP_TXN0
GMCHEXP_TXP1
GMCHEXP_TXN1
GMCHEXP_TXP2
GMCHEXP_TXN2
GMCHEXP_TXP3
GMCHEXP_TXN3
GMCHEXP_TXP4
GMCHEXP_TXN4
GMCHEXP_TXP5
GMCHEXP_TXN5
GMCHEXP_TXP6
GMCHEXP_TXN6
GMCHEXP_TXP7
GMCHEXP_TXN7
GMCHEXP_TXP8
GMCHEXP_TXN8
GMCHEXP_TXP9
GMCHEXP_TXN9
GMCHEXP_TXP10
GMCHEXP_TXN10
GMCHEXP_TXP11
GMCHEXP_TXN11
GMCHEXP_TXP12
GMCHEXP_TXN12
GMCHEXP_TXP13
GMCHEXP_TXN13
GMCHEXP_TXP14
GMCHEXP_TXN14
GMCHEXP_TXP15
GMCHEXP_TXN15
V_GMCHEXP_RXP0
V_GMCHEXP_RXN0
V_GMCHEXP_RXP1
V_GMCHEXP_RXN1
V_GMCHEXP_RXP2
V_GMCHEXP_RXN2
V_GMCHEXP_RXP3
V_GMCHEXP_RXN3
V_GMCHEXP_RXP4
V_GMCHEXP_RXN4
V_GMCHEXP_RXP5
V_GMCHEXP_RXN5
V_GMCHEXP_RXP6
V_GMCHEXP_RXN6
V_GMCHEXP_RXP7
V_GMCHEXP_RXN7
V_GMCHEXP_RXP8
V_GMCHEXP_RXN8
V_GMCHEXP_RXP9
V_GMCHEXP_RXN9
V_GMCHEXP_RXP10
V_GMCHEXP_RXN10
V_GMCHEXP_RXP11
V_GMCHEXP_RXN11
V_GMCHEXP_RXP12
V_GMCHEXP_RXN12
V_GMCHEXP_RXP13
V_GMCHEXP_RXN13
V_GMCHEXP_RXP14
V_GMCHEXP_RXN14
V_GMCHEXP_RXP15
V_GMCHEXP_RXN15
VPCIE_CR+
VPCIE_CRVPCIE_CAL
VPCIE_TIN
PLTRST#_M26
R127
R127
E@715/F
E@715/F
T134T134
T142T142
R654 E@1K_4R654 E@1K_4
T145T145
R121 *33_4R121 *33_4
R119 *33_4R119 *33_4
R122 E@1K_4R122 E@1K_4
R57 E@0_4R57 E@0_4
R347 E@0_4R347 E@0_4
R126
R126
T39T39
E@10K_4
E@10K_4
R125 *10K_4R125 *10K_4
-VPCIE_RSTM
V_R2SET
EXT_TV_Y/G
EXT_TV_C/R
EXT_TV_COMP
VTHM_CLK
VTHM_DAT
27M_IN
27M_O
Z_V0101
Z_V0102
Z_V0103
Z_V0104
AH30
AG30
AG29
AF29
AE29
AE30
AD30
AD29
AC29
AB29
AB30
AA30
AA29
Y29
W29
W30
V30
V29
U29
R30
R29
P29
N29
N30
M30
M29
K29
K30
AF26
AE26
AC25
AB25
AC27
AB27
AC26
AB26
Y25
W25
Y27
W27
Y26
W26
U25
U27
U26
P25
N25
P27
N27
P26
N26
K25
K27
K26
AF27
AE27
AC23
AB24
AB23
AE25
AD25
AD24
AH21
AK21
AJ22
AK22
AJ24
AK24
AG22
AG23
AJ23
AH24
AH28
AJ29
AH27
AF25
AH25
T29
T30
L29
J30
T25
T27
T26
L25
L27
L26
E8
B6
U29A
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
PCIE_REFCLKP
PCIE_REFCLKN
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
PCIE_TESTIN
PERSTb
PERSTb_MASK
R2SET
Y_G
C_R_PR
COMP_B_PB
H2SYNC
V2SYNC
DDC3CLK
DDC3DATA
SSIN
SSOUT
XTALIN
XTALOUT
TESTEN
TEST_YCLK
TEST_MCLK
PLLTEST
STEREOSYNC
E@M24/M22/M26
E@M24/M22/M26
DAC2
DAC2
SS PCI EXPRESSCLK
SS PCI EXPRESSCLK
4
GPIO_PWRCNTL
GPIO_MEMSSIN
DVOMODE
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DPVDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
LVDS DVO / EXT TMDS / GPIOTHERM TMDSDAC1
LVDS DVO / EXT TMDS / GPIOTHERM TMDSDAC1
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
DDC2CLK
DDC2DATA
DDC1DATA
DDC1CLK
GPIO_AUXWIN
DMINUS
4
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
VREFG
DIGON
BLON
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
HPD1
HSYNC
VSYNC
RSET
DPLUS
R
G
B
AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2
AE10
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10
AJ10
AK10
AJ11
AH11
AG4
AH15
AH16
AJ16
AJ17
AJ18
AK18
AJ20
AJ21
AK19
AJ19
AG16
AG17
AF16
AF17
AE18
AE19
AF19
AF20
AG19
AG20
AE12
AG12
AK13
AJ13
AJ14
AJ15
AK15
AK16
AJ12
AK12
AE13
AE14
AF12
AK27
AJ27
AJ26
AJ25
AK25
AH26
AG25
AF24
AG24
AF11
AE11
T148T148
T143T143
T141T141
T33T33
T130T130
T136T136
T127T127
T129T129
T132T132
T37T37
T123T123
T126T126
DVOMODE
DVPDATA_16
DVPDATA_17
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
DVPCNTL0
R374 E@10K_4R374 E@10K_4
DVPCNTL1
R389 E@10K_4R389 E@10K_4
DVPCNTL2
R401 E@10K_4R401 E@10K_4
DVPCNTL3
R392 E@10K_4R392 E@10K_4
R116 E@100/F_4R116 E@100/F_4
VREFG
R115 E@100/F_4R115 E@100/F_4
C236 E@.1U_4C236 E@.1U_4
EXT_TXLOUT0EXT_TXLOUT0+
EXT_TXLOUT1EXT_TXLOUT1+
EXT_TXLOUT2EXT_TXLOUT2+
EXT_TXLCLKOUTEXT_TXLCLKOUT+
EXT_TXUOUT0EXT_TXUOUT0+
EXT_TXUOUT1EXT_TXUOUT1+
EXT_TXUOUT2EXT_TXUOUT2+
EXT_TXUCLKOUTEXT_TXUCLKOUT+
DISP_ON
BLON
TMDS_TX0M
TMDS_TX0P
TMDS_TX1M
TMDS_TX1P
TMDS_TX2M
TMDS_TX2P
TMDS_TXCM
TMDS_TXCP
TMDS_DDCCLK
TMDS_DDCDATA
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
EXT_HSYNC
EXT_VSYNC
V_RST
R112 E@499/FR112 E@499/F
EXT_DDCDAT
EXT_DDCCLK
VGATHRM+
VGATHRM-
R369 E@10K_4R369 E@10K_4
R367 *10K_4R367 *10K_4
ROMIDCFG0 <13>
VGA_PWR_SW
C245 E@10P_4C245 E@10P_4
R102 E@0_4R102 E@0_4
T139T139
T150T150
T147T147
T138T138
T149T149
T137T137
T140T140
T131T131
T43T43
T42T42
T45T45
T41T41
T31T31
T40T40
T44T44
T36T36
DVPDATA_16 <13>
DVPDATA_17 <13>
EDIDDATA <16>
EDIDCLK <16>
DVPDATA_21 <13>
DVPDATA_22 <13>
DVPDATA_23 <13>
241
241
241
T135T135
T144T144
241
241
241
241
T38T38
T35T35
241
TMDS_DDCCLK <15,33>
TMDS_DDCDATA <15,33>
TMDS_HPD <15,33>
EXT_VGA_RED <17>
EXT_VGA_GRN <17>
EXT_VGA_BLU <17>
EXT_HSYNC <17>
EXT_VSYNC <17>
EXT_DDCDAT <17>
EXT_DDCCLK <17>
-VGA_ALERT
R113
R113
*10K_4
*10K_4
3
MEMORY CLOCK SPREAD
+3V
SPECTRUM
V_MEMSSIN
PLTRST#_M26
+3V
+3V
Change to 100ohm for ATI recommend
TXLOUT0-
RN101E@4P2R-S-0 RN101E@4P2R-S-0
TXLOUT0+
3
TXLOUT1-
RN102E@4P2R-S-0 RN102E@4P2R-S-0
TXLOUT1+
3
TXLOUT2-
RN103E@4P2R-S-0 RN103E@4P2R-S-0
TXLOUT2+
3
RN104E@4P2R-S-0 RN104E@4P2R-S-0
TXLCLKOUT-
TXLCLKOUT+
3
TXUOUT0-
RN8E@4P2R-S-0 RN8E@4P2R-S-0
3
TXUOUT0+
TXUOUT1-
RN7E@4P2R-S-0 RN7E@4P2R-S-0
3
TXUOUT1+
TXUOUT2-
RN6E@4P2R-S-0 RN6E@4P2R-S-0
3
TXUOUT2+
TXUCLKOUT-
TXUCLKOUT+
3
RN5E@4P2R-S-0 RN5E@4P2R-S-0
DISP_ON <6,16>
3
VGA_PWR_SW <38>
R128 E@33_4R128 E@33_4
E@TC7SH08FU
E@TC7SH08FU
TXLOUT0- <6,16>
TXLOUT0+ <6,16>
TXLOUT1- <6,16>
TXLOUT1+ <6,16>
TXLOUT2- <6,16>
TXLOUT2+ <6,16>
TXLCLKOUT- <6,16>
TXLCLKOUT+ <6,16>
TXUOUT0- <6,16>
TXUOUT0+ <6,16>
TXUOUT1- <6,16>
TXUOUT1+ <6,16>
TXUOUT2- <6,16>
TXUOUT2+ <6,16>
TXUCLKOUT- <6,16>
TXUCLKOUT+ <6,16>
R664
R664
E@1K_4
E@1K_4
+3V
15 MIL
3V_THM1
R440
R440
E@BLM18PG121SN
E@BLM18PG121SN
VGATHRM-
10 mil trace /
10 mil space
VGATHRM+
Close to pin ASIC
TMDS_TX0M
TMDS_TX0P
TMDS_TX1M
TMDS_TX1P
TMDS_TX2M
TMDS_TX2P
TMDS_TXCM
TMDS_TXCP
R381 ED@330_4R381 ED@330_4
R382 ED@330_4R382 ED@330_4
R383 ED@330_4R383 ED@330_4
R380 ED@330_4R380 ED@330_4
XT_IN
1726_S0
1726_CKO
+3V
4
U54
U54
C662
C662
E@.1U_4
E@.1U_4
C638
C638
E@2200P_4
E@2200P_4
Hi: 1.0V
Lo: 1.2V
53
1
2
R657*0_4 R657*0_4
BLON <6,16>
U13
U13
1
XIN
XOUT
2
VSS
SRS
SSCLK4REF
E@CY25819
E@CY25819
MK1726-8
VDD
PD
27M_IN
27M_O
3
PLACE CLOSE TO ASIC
VTHM_DAT_EC
VTHM_CLK_EC
U32
U32
VCC1/ALERT
3
DXN
2
DXP
GND5PWM
E@G781-1
E@G781-1
SLAVE ADDRESS: 9A
R93 ED@0_4R93 ED@0_4
1 2
R94 ED@0_4R94 ED@0_4
1 2
R95 ED@0_4R95 ED@0_4
1 2
R96 ED@0_4R96 ED@0_4
1 2
R97 ED@0_4R97 ED@0_4
1 2
R98 ED@0_4R98 ED@0_4
1 2
R91 ED@0_4R91 ED@0_4
1 2
R92 ED@0_4R92 ED@0_4
1 2
2
+3V
R123
R123
*10K_4
*10K_4
R131
R131
*10K_4
*10K_4
XT_OUT
8
MK1726_VDD
7
MK_PD
6
MK_27M
5
PLTRST# <6,15,18,21,29,31,32,33>
R144 E@33_4R144 E@33_4
Add buffer for PLTRST#
CHANGE TO CLK_OUT FOR M26
R378M24@0_4 R378M24@0_4
VGA27M
R379M26@0_4 R379M26@0_4
R398
E@71.5/F
E@71.5/F
+3V
Q61
Q61
2
E@2N7002
E@2N7002
1
1
E@2N7002
E@2N7002
2
Q62
Q62
+3V
FOR EC CONTROL FAN
6
VTHM_DAT_EC
7
SDA
VTHM_CLK_EC
8
SCLK
2
4
R655 10K_4R655 10K_4
TX0- <15,33>
TX0+ <15,33>
TX1- <15,33>
TX1+ <15,33>
TX2- <15,33>
TX2+ <15,33>
CLK- <15,33>
CLK+ <15,33>
1
SRS= 1 DOWN -2.5%
0 DOWN -1.8%
M DOWN -0.6%
MK_PD1726_S0
R146
R146
*10K_4
*10K_4
L38
L38
+3V
E@0
E@0
C270
C270
E@22U/10V_8
E@22U/10V_8
R665 E@6.8K/FR665 E@6.8K/F
R666 E@6.8K/FR666 E@6.8K/F
R88 E@6.8K/FR88 E@6.8K/F
R86 E@6.8K/FR86 E@6.8K/F
R100 *10K_4R100 *10K_4
R375 E@150/F_4R375 E@150/F_4
R376 E@150/F_4R376 E@150/F_4
R377 E@150/F_4R377 E@150/F_4
+3V
R423
R423
E@10K_4
E@10K_4
R419
R419
E@0_4
E@0_4
3
Q36
Q36
E@2N7002
E@2N7002
1
11 40Thursday, June 23, 2005
11 40Thursday, June 23, 2005
11 40Thursday, June 23, 2005
1
-VGA_ALERT
MEMVMODE0 <13>
of
of
of
C297
C297
E@10P_4
E@10P_4
27MOUT
R397E@121/F R397E@121/F
C278
C278
E@.1U_4
E@.1U_4
VTHM_DAT_EC
VTHM_CLK_EC
VTHM_CLK
VTHM_DAT
DVPDATA_20
PLACE CLOSE TO ASIC
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
EXT_TV_Y/G<16>
EXT_TV_C/R<16>
EXT_TV_COMP<16>
MBDATA
3
MBCLK
3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
EXT_TV_Y/G
EXT_TV_C/R
EXT_TV_COMP
MBDATA <3,29,40>
MBCLK <3,29,40>
+3V
R385 E@150/F_4R385 E@150/F_4
R386 E@150/F_4R386 E@150/F_4
R384 E@150/F_4R384 E@150/F_4
+3V
R420
R420
E@10K_4
E@10K_4
2
R424 *0_4R424 *0_4
PROJECT : ZL7
Quanta Computer Inc.
VGA HOST(ATI M26)
VGA HOST(ATI M26)
VGA HOST(ATI M26)
+3V
C
C
C
5
+1.8V
E@10U/10V_8
E@10U/10V_8
C580
C580
C581
C581
E@1000P_4
E@1000P_4
C578
C578
E@1000P_4
E@1000P_4
(350mA)
D D
+1.8V
+1.8V
+1.8V
+1.8V
+2.5V
+3V
E@10U/10V_8
E@10U/10V_8
(125mA)
C C
(30mA)
(6mA)
+1.8V
L20
L20
C244
C244
12
12
E@.1U_4
E@.1U_4
B B
C161
C161
E@10U/10V_8
E@10U/10V_8
+2.5V
L27
L27
E@BLM18PG121SN
E@BLM18PG121SN
E@10U/10V_8
E@10U/10V_8
C585
C585
E@10U/10V_8
E@10U/10V_8
C105
C105
E@.1U_4
E@.1U_4
C225
C225
L22
L22
L66 E@BLM18PG121SNL66 E@BLM18PG121SN
E@BLM18PG121SN
E@BLM18PG121SN
C219
C219
C220
C220
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
C214
C214
C243
C243
E@.1U_4
E@.1U_4
12
E@10U/10V_8
E@10U/10V_8
E@10U/10V_8
E@10U/10V_8
+1.8V
(80mA)
(7mA)
(28mA)
A A
(5.8mA)
+1.8V
+1.8V
5
C119
C119
C164
C164
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
C156
C156
C177
C177
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
L24 *0_8L24 *0_8
D9
D9
2 1
C202
C202
E@RB500
E@RB500
E@.1U_4
E@.1U_4
C203
C203
E@10U/10V_8
E@10U/10V_8
E@BLM18PG121SN
E@BLM18PG121SN
C186
C186
C217
C217
E@.1U_4
E@.1U_4
12
C632
C632
C233
C233
E@.1U_4
E@.1U_4
+1.8V
L25 E@BLM18PG121SNL25 E@BLM18PG121SN
(67mA)
+1.8V
E@BLM18PG121SN
E@BLM18PG121SN
+1.8V
L68
L68
E@BLM18PG121SN
E@BLM18PG121SN
E@10U/10V_8
E@10U/10V_8
L13
L13
E@BLM18PG121SN
E@BLM18PG121SN
E@10U/10V_8
E@10U/10V_8
L16
L16
C100
C100
C142 E@.1U_4C142 E@.1U_4
12
12
C597
C597
C589
C589
E@1000P_4
E@1000P_4
E@1000P_4
E@1000P_4
C110
C110
C109
C109
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
C99
C99
C106
C106
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
LVDR25
C216
C216
E@.1U_4
E@.1U_4
LVDDR18
C218
C218
E@.1U_4
E@.1U_4
LPVDD
C228
C228
E@.1U_4
E@.1U_4
TXVDDR18
E@BLM18PG121SN
E@BLM18PG121SN
12
E@.1U_4
E@.1U_4
VDDRH
A2VDD25
V_A2VDDQ
12
C240 E@.1U_4C240 E@.1U_4
C637 E@.1U_4C637 E@.1U_4
L67
L67
12
L21 E@0_8L21 E@0_8
C641
C641
C642
C642
E@.1U_4
E@.1U_4
MPVDD
C71
C71
C70
C70
E@.1U_4
E@.1U_4
V_AVDD
VDD1
PVDD
AA1
AA4
AA7
AA8
A15
A21
A28
B30
D26
D23
D20
D17
D14
D11
E27
G10
G13
G15
G19
G22
G27
H22
H19
AD4
AE16
AE17
AF15
AE15
AH19
AH13
AF13
AF14
AF21
AE20
AF23
AH23
AE23
AE22
AK28
K23
K24
H10
H13
H15
H17
L23
F18
T7
VDDR1_T7
R4
VDDR1_R4
R1
VDDR1_R1
N8
VDDR1_N8
N7
VDDR1_N7
M4
VDDR1_M4
L8
VDDR1_L8
VDDR1_K23
VDDR1_K24
N4
VDDR1_N4
J8
VDDR1_J8
J7
VDDR1_J7
J4
VDDR1_J4
J1
VDDR1_J1
VDDR1_H10
VDDR1_H13
VDDR1_H15
VDDR1_H17
T8
VDDR1_T8
V4
VDDR1_V4
V7
VDDR1_V7
V8
VDDR1_V8
VDDR1_AA1
VDDR1_AA4
VDDR1_AA7
VDDR1_AA8
A3
VDDR1_A3
A9
VDDR1_A9
VDDR1_A15
VDDR1_A21
VDDR1_A28
B1
VDDR1_B1
VDDR1_B30
VDDR1_D26
VDDR1_D23
VDDR1_D20
VDDR1_D17
VDDR1_D14
VDDR1_D11
D8
VDDR1_D8
D5
VDDR1_D5
VDDR1_E27
F4
VDDR1_F4
G7
VDDR1_G7
VDDR1_G10
VDDR1_G13
VDDR1_G15
VDDR1_G19
VDDR1_G22
VDDR1_G27
VDDR1_H22
VDDR1_H19
VDDR1_AD4
VDDR1_L23
LVDDR_25_AE16
LVDDR_25_AE17
LVDDR_18_AF15
LVDDR_18_AE15
LPVDD
TPVDD
TXVDDR_AF13
TXVDDR_AF14
VDDRH0
N6
VDDRH1
A2VDD_AF21
A2VDD_AE20
A2VDDQ
AVDD
VDD1DI
VDD2DI
PVDD
A7
MPVDD
E@10U/10V_8
E@10U/10V_8
4
VDD1
C204
C204
4
U29D
U29D
VDD15_AC11
VDD15_AC20
VDDR3_AD19
VDDR3_AD21
VDDR3_AC22
VDDR3_AC21
VDDR3_AC19
VDDR4_AC10
VDDR4_AD10
PCIE_VDDR_12_AG26
PCIE_VDDR_12_AK29
PCIE_VDDR_12_AJ30
PCIE_VDDR_12_AG28
PCIE_VDDR_12_AG27
PCIE_PVDD_12_N24
PCIE_PVDD_12_N23
PCIE_PVDD_12_P23
PCIE_PVDD_18_U23
PCIE_PVDD_18_T23
PCIE_PVDD_18_V23
PCIE_PVDD_18_W23
LVSSR_AF18
LVSSR_AH17
LVSSR_AG15
LVSSR_AG18
TXVSSR_AH14
TXVSSR_AG13
TXVSSR_AG14
I/O POWER
I/O POWER
A2VSSN_AH20
A2VSSN_AG21
E@M24/M22/M26
E@M24/M22/M26
C222
C222
E@.1U_4
E@.1U_4
VDDC_AC13
VDDC_AD13
VDDC_AD15
VDDC_AC15
VDDC_AC17
VDD15_P8
VDD15_Y8
VDD15_H20
VDD15_H11
VDD15_M23
VDD15_Y23
VDDR3_AD7
VDDR3_AC8
VDDR4_AG7
VDDR4_AD9
VDDR4_AC9
NC_D9
NC_D13
NC_D19
NC_D25
NC_E4
NC_T4
NC_AB4
AVSSQ
LPVSS
TPVSS
VSSRH0
VSSRH1
A2VSSQ
AVSSN
VSS1DI
VSS2DI
PVSS
MPVSS
C213
C213
E@.1U_4
E@.1U_4
AC13
AD13
AD15
AC15
AC17
P8
Y8
AC11
AC20
H20
H11
M23
Y23
AD7
AD19
AD21
AC22
AC8
AC21
AC19
AG7
AD9
AC9
AC10
AD10
AG26
AK29
AJ30
AG28
AG27
N24
N23
P23
U23
T23
V23
W23
D9
D13
D19
D25
E4
T4
AB4
AD22
AF18
AH17
AG15
AG18
AH18
AH12
AH14
AG13
AG14
F19
M6
AH20
AG21
AF22
AH22
AE24
AE21
AJ28
A6
C173
C173
C183
C183
E@1000P_4
E@1000P_4
E@1000P_4
E@1000P_4
C107
C107
C111
C111
E@1000P_4
E@1000P_4
E@1000P_4
E@1000P_4
C192
C192
C215
C215
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
C199
C199
C206
C206
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
C635 E@.1U_4C635 E@.1U_4
C209 E@.1U_4C209 E@.1U_4
C634 E@.1U_4C634 E@.1U_4
VGA_PCIE12
C143 E@.1U_4C143 E@.1U_4
C157 E@.1U_4C157 E@.1U_4
C158 E@.1U_4C158 E@.1U_4
PCIE_PVDD18
C168 E@.1U_4C168 E@.1U_4
C174 E@.1U_4C174 E@.1U_4
C185 E@.1U_4C185 E@.1U_4
(PCIE PLL/IO 1.8V)
T14T14
T19T19
T16T16
T18T18
T17T17
T25T25
T29T29
E@10U/10V_8
E@10U/10V_8
C121
C121
E@1U/10V
E@1U/10V
E@1U/10V
E@1U/10V
C176
C176
E@.1U_4
E@.1U_4
3
C123
C187
C187
C118
C118
E@1000P_4
E@1000P_4
E@10U/10V_8
E@10U/10V_8
C189
C189
C190
C190
E@1000P_4
E@1000P_4
E@1000P_4
E@1000P_4
C201
C201
C208
C208
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
C198
C198
C200
C200
E@.1U_4
E@.1U_4
E@.1U_4
E@.1U_4
C636 E@10U/10V_8C636 E@10U/10V_8
C633 E@.1U_4C633 E@.1U_4
V_AVDD V_A2VDDQ
C919
C919
C123
C122
C122
E@1000P_4
E@1000P_4
E@1000P_4
E@1000P_4
+1.5V
C148
C148
E@10U/10V_8
E@10U/10V_8
C196
C196
(IO.POWER)
E@10U/10V_8
E@10U/10V_8
+3V
C197
C197
(EXT.TMDS)
E@10U/10V_8
E@10U/10V_8
(PCIE 1.2V)
L18
L18
E@BLM18PG121SN
E@BLM18PG121SN
(QUIET PCIE 1.2V)
L82
L82
C950
C950
E@10U/10V_8
E@10U/10V_8
C920
C920
E@10U/10V_8
E@10U/10V_8
12
(40mA)
(2.7mA)
(2mA)
VGA1.2V
E@BLM18PG121SN
E@BLM18PG121SN
12
VGA1.2V
E: Add bulk cap. for acer CRT
C129
C129
C221
C179
C179
E@.1U_4
E@.1U_4
3
C221
E@1000P_4
E@1000P_4
C175
C175
E@.1U_4
E@.1U_4
C146
C146
E@1000P_4
E@1000P_4
C169
C169
E@.1U_4
E@.1U_4
C126
C126
E@1000P_4
E@1000P_4
C153
C153
E@.1U_4
E@.1U_4
C124
C124
E@1000P_4
E@1000P_4
C152
C152
E@.1U_4
E@.1U_4
C166
C166
E@1000P_4
E@1000P_4
C139
C139
E@.1U_4
E@.1U_4
+
+
C914
C914
E@220U/2.5V
E@220U/2.5V
C162
C162
E@1000P_4
E@1000P_4
C138
C138
E@.1U_4
E@.1U_4
VGA1.2V
(85mA)
(15A)
+1.2V
C127
C127
E@1U/10V
E@1U/10V
C149
C149
E@.1U_4
E@.1U_4
2
+1.2V
+3V
(1034mA)
+1.8V
(350mA)
(VGA CORE=1.2 OR 1.0V)
+1.2V
+1.2V
C193
C193
E@1U/10V
E@1U/10V
C155
C155
E@.1U_4
E@.1U_4
2
1
U29E
A2
VSS_A2
A10
VSS_A10
A16
VSS_A16
A22
VSS_A22
A29
VSS_A29
C1
VSS_C1
C3
VSS_C3
C28
VSS_C28
C30
VSS_C30
D27
VSS_D27
D24
VSS_D24
D21
VSS_D21
D18
VSS_D18
D15
VSS_D15
D12
VSS_D12
D10
VSS_D10
D6
VSS_D6
D4
VSS_D4
F27
VSS_F27
G9
VSS_G9
G12
VSS_G12
G16
VSS_G16
G18
VSS_G18
G21
VSS_G21
G24
VSS_G24
H27
VSS_H27
H23
VSS_H23
H21
VSS_H21
H18
VSS_H18
H16
VSS_H16
H14
VSS_H14
H12
VSS_H12
H9
VSS_H9
H8
VSS_H8
H4
VSS_H4
J23
VSS_J23
J24
VSS_J24
AD12
VSS_AD12
AG5
VSS_AG5
AG9
VSS_AG9
AG11
VSS_AG11
R7
VSS_R7
P4
VSS_P4
M7
VSS_M7
M8
VSS_M8
L4
VSS_L4
K1
VSS_K1
K7
VSS_K7
K8
VSS_K8
R8
VSS_R8
T1
VSS_T1
P17
VDDC_P17
P18
VDDC_P18
P19
VDDC_P19
U12
VDDC_U12
U13
VDDC_U13
U14
VDDC_U14
U17
VDDC_U17
U18
VDDC_U18
U19
VDDC_U19
V19
VDDC_V19
V18
VDDC_V18
V17
VDDC_V17
V14
VDDC_V14
V13
VDDC_V13
V12
VDDC_V12
N18
VDDC_N18
N17
VDDC_N17
N14
VDDC_N14
W17
VDDC_W17
W18
VDDC_W18
W12
VDDC_W12
W13
VDDC_W13
W14
VDDC_W14
N13
VDDC_N13
N19
VDDC_N19
M19
VDDC_M19
M18
VDDC_M18
M12
VDDC_M12
N12
VDDC_N12
M13
VDDC_M13
M14
VDDC_M14
P12
VDDC_P12
P13
VDDC_P13
P14
VDDC_P14
M17
VDDC_M17
W19
VDDC_W19
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
U29E
PCIE_VSS_K28
PCIE_VSS_L28
PCIE_VSS_M27
PCIE_VSS_M26
PCIE_VSS_M24
CORE GND
CORE GND
PCIE_VSS_M25
PCIE_VSS_M28
PCIE_VSS_P28
PCIE_VSS_N28
PCIE_VSS_R25
PCIE_VSS_R23
PCIE_VSS_R24
PCIE_VSS_R26
PCIE_VSS_R27
PCIE_VSS_R28
PCIE_VSS_T28
PCIE_VSS_T24
PCIE_VSS_U28
PCIE_VSS_V24
PCIE_VSS_V26
PCIE_VSS_V27
PCIE_VSS_V25
PCIE_VSS_V28
PCIE_VSS_Y28
PCIE_VSS_W24
PCIE_VSS_W28
PCIE_VSS_AA26
PCIE_VSS_AA27
PCIE_VSS_A23
PCIE_VSS_AA24
PCIE_VSS_AA25
PCIE_VSS_AA28
PCIE_VSS_AB28
PCIE_VSS_AC28
PCIE_VSS_AD28
PCIE_VSS_AD26
PCIE_VSS_AD27
PCIE_VSS_AE28
PCIE_VSS_AF28
PCIE_VSS_AH29
CENTER ARRAY
CENTER ARRAY
VDDC1_W16
VDDC1_M15
VDDC1_R19
VDDC1_T12
E@M24/M22/M26
E@M24/M22/M26
Quanta Computer Inc.
U4
VSS_U4
U8
VSS_U8
W7
VSS_W7
W8
VSS_W8
Y4
VSS_Y4
AB8
VSS_AB8
AB7
VSS_AB7
AB1
VSS_AB1
AC4
VSS_ AC4
AC12
VSS_AC12
AC14
VSS_AC14
AD16
VSS_AD16
AC16
VSS_AC16
AC18
VSS_AC18
AD18
VSS_AD18
AK2
VSS_AK2
AJ1
VSS_AJ1
K28
L28
M27
M26
M24
M25
M28
P28
N28
R25
R23
R24
R26
R27
R28
T28
T24
U28
V24
V26
V27
V25
V28
Y28
W24
W28
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AC28
AD28
AD26
AD27
AE28
AF28
AH29
M16
VSS_M16
N16
VSS_N16
N15
VSS_N15
P15
VSS_P15
P16
VSS_P16
R18
VSS_R18
R17
VSS_R17
R16
VSS_R16
R15
VSS_R15
R14
VSS_R14
R13
VSS_R13
R12
VSS_R12
T13
VSS_T13
T14
VSS_T14
T15
VSS_T15
W15
VSS_W15
V16
VSS_V16
V15
VSS_V15
U15
VSS_U15
U16
VSS_U16
T19
VSS_T19
T18
VSS_T18
T17
VSS_T17
T16
VSS_T16
W16
M15
R19
T12
VGA_VDDC
PROJECT : ZL3
ATI M26(POWER)
ATI M26(POWER)
ATI M26(POWER)
1
L19 E@0_8L19 E@0_8
C163 E@1U/10VC163 E@1U/10V
C165 E@1U/10VC165 E@1U/10V
C145 E@1U/10VC145 E@1U/10V
C125 E@1U/10VC125 E@1U/10V
+1.2V
C
C
of
of
of
12 40Thursday, June 23, 2005
12 40Thursday, June 23, 2005
12 40Thursday, June 23, 2005
C