Acer Aspire 5310, Aspire 5315, Aspire 5710 Schematics

A

1 1

B

C

D

E

Compal Confidential

2 2

JDW50/JDY70 Schematics Document

Intel Merom Processor with Crestline(PM945/GM945) + DDRII + ICH7M

(With ATI MXM/B)

3 3

2007-4-12

REV: 0.3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/1/15 2007/12/25

2007/1/15 2007/12/25

2007/1/15 2007/12/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

1 44Monday, April 16, 2007

1 44Monday, April 16, 2007

1 44Monday, April 16, 2007

E

0.2

0.2

0.2

A

B

C

D

E

Compal Confidential

Model Name : JDW50/70

Fan Control

page 33

File Name : LA-3771P

1 1

DVI-D Conn.

page 16

DVI

LCD Conn.

page 16

LVDS

CRT & TV-out

page 17

LVDS

SDVO

Intel Merom Processor

uPGA-478 Package

H_A#(3..35)

(Socket M)

533/667MHz

page 4,5

FSB

Intel
945/PM/GM/943GML

H_D#(0..63)

uFCBGA-1466

PCI-Express

page 6,7,8,9,10,11

Thermal Sensor

ADM1032

page 4

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 533/667

MXM II VGA/B

page 15

2 2

PCI-Express

Intel ICH7-M

PCI BUS

DMI

New Card
Socket

MINI Card x1

WLAN

page 26page 27

USB port 1 USB port 7

LAN(GbE)

Boardcom

page 24

IDSEL:AD20
(PIRQA#,
GNT#2,
REQ#2)

3.3V 33 MHz

Card Reader

ENE MR510

page 23

BGA-652

page 20,21,22,23

RJ45

page 25

3 3

RTC CKT.

page 30

BTN/B Conn.

page 29

LS3553P

4 in 1
socket

page 23

LPC BUS

ENE KB926

page 28

C-Link

3.3V 48MHz

3.3V 24.576MHz/48Mhz

3.3V ATA-100

S-ATA

USB

IDE

port 0, 1

SATA HDD
Conn.

USB conn x2

page 22

Clock Generator

page 14

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

Bluetooth

page 26 page 27 page 16

USB port 0, 2

Conn

HD Audio

CDROM
Conn.

page 22

page 12,13

CMOS
Camera

USB port 5 USB port 3

MDC 1.5
Conn

page 30

HDA Codec

ALC268

page 31

Audio AMP

page 32

Phone Jack x3

page 32

Power On/Off CKT.

page 30

DC/DC Interface CKT.

page 34

Power Circuit DC/DC

4 4

page 35

A

LED/B Conn.

page 29

USB Conn.

USB port 4, 6

AUDIO/B Conn.
w/Woofer(JDY70)

page 26

page 32

LS3557P

LS3551P

LS3558P

Touch Pad

page 29

EC I/O Buffer

page 29

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Int.KBD

page 29

BIOS

page 29

Compal Secret Data

Compal Secret Data

2007/1/15 2007/12/25

2007/1/15 2007/12/25

2007/1/15 2007/12/25

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

Block Diagrams

Block Diagrams

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

2 44Monday, April 16, 2007

2 44Monday, April 16, 2007

2 44Monday, April 16, 2007

E

0.2

0.2

0.2

A

Voltage Rails

Power Plane Description

VIN

1 1

2 2

B+

+CPU_CORE

+0.9VS 0.9V switched power rail for DDR terminator

+1.05VS

+1.25VS 1.25V switched power rail ON OFF OFF

+1.5VS

+1.8V

+1.8VS 1.8V switched power rail

+2.5VS

+3VALW

+3V

+3V_LAN

+3VS

+5VALW

+5VS

+VSB VSB always on power rail ON ON*

+RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

2.5V switched power rail

3.3V always on power rail

3.3V power rail for SB

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

B

S1 S3 S5

N/A N/A N/A

ON OFF

ON OFF

ON OFF OFF

ON OFF OFF

ON

ON

ON

ON

ON ON

ON ONXX

ON

ON

ON

ON

N/AN/AN/A

OFF

OFF

ON

OFF

OFF

OFF

OFF

OFF

ON ON*

OFF

OFF

ON

ON*

OFF

OFFON

ONON

C

STATE

SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

D

HIGHHIGHHIGH

HIGH

HIGH

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

ON

ON

ON

ON

ON

ON

ON

OFF

ON

OFF

V typ

AD_BID

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

ON ON

ON

OFF

OFF

OFF

max

E

LOW

OFF

OFF

OFF

BOARD ID Table BTO Option Table

External PCI Devices

Device IDSEL#

Card Reader

AD16 0

REQ#/GNT#

Interrupts

PIRQE

Board ID

0
1
2
3
4
5
6
7

PCB Revision

0.1

BTO Item BOM Structure

Discrete

UMA

DVI
SATA*1
SATA*2

PM@
GM@

DVI@
SATA*1@
SATA*2@
Dbg@Dbg

EC SM Bus1 address

3 3

Device

Smart Battery

EEPROM(24C16/02)

GMT G781-1

Address Address

1010 000X b

1001 101X b

EC SM Bus2 address

Device

ADI ADM1032

1001 100X b0001 011X b

ICH7M SM Bus address

Device

Clock Generator
(ICS9LPRS365)

DDR DIMM0

DDR DIMM2

4 4

A

Address

1101 001Xb

1001 000Xb

1001 010Xb

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/1/15 2007/12/25

2007/1/15 2007/12/25

2007/1/15 2007/12/25

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Notes List

Notes List

Notes List

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

3 44Monday, April 16, 2007

3 44Monday, April 16, 2007

3 44Monday, April 16, 2007

E

0.2

0.2

0.2

5

JP22A

JP22A

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13

H_IERR#

H_RESET #

XDP_DBR ESET#

XDP_BPM #5

H_PROCH OT#

H_PW RGOOD

H_CPUSL P#

XDP_TCK
XDP_TDI
XDP_TDO
TEST1
TEST2

XDP_TMS

XDP_TRS T#

THERMDA
THERMDC

H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

D D

H_ADSTB #06
H_ADSTB #16

C C

CLK_CPU _BCLK14

CLK_CPU _BCLK#14

H_ADS#6
H_BNR#6

H_BPRI#6

H_BR0#6

H_DEFER #6

H_DRDY#6

H_HIT#6

H_HITM#6

H_LOCK#6

H_RESET #6

H_TRDY#6

B B

XDP_DBR ESET#20

H_DBSY#6

H_DPSLP #19

H_DPRST P#19,42

H_DPW R#6

H_PW RGOOD19

H_CPUSL P#6

H_THERM TRIP#6,19

A A

J4

A3#

L4

A4#

M3

A5#

K5

A6#

M1

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L1

A13#

P4

A14#

P1

A15#

R1

A16#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U2

A23#

R4

A24#

T5

ADDR GROUP

ADDR GROUP

A25#

T3

A26#

W3

A27#

W5

A28#

Y4

A29#

W2

A30#

Y1

A31#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L5

REQ4#

L2

ADSTB0#

V4

ADSTB1#

A22

BCLK0

A21

F21

D20

AD4
AD3
AD1
AC4

C20

D24
AC2
AC1
D21

AC5
AA6
AB3
C26
D25
AB5
AB6

A24
A25

H1

E2

G5

F1

H5

G6

E4

H4

B1

F3

F4
G3
G2

E1

B5

E5

D6
D7

C7

HOST CLK

HOST CLK

BCLK1

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#

CONTROL

CONTROL

HITM#
IERR#
LOCK#
RESET#

RS0#
RS1#
RS2#
TRDY#

BPM0#
BPM1#
BPM2#
BPM3#

DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMAL

THERMAL

THERMDA

DIODE

DIODE

THERMDC
THERMTRIP#

FOX_PZ4 7903-2741-42_YONA H

FOX_PZ4 7903-2741-42_YONA H

YONAH

YONAH

MISC

MISC

4

DATA GROUP

DATA GROUP

LEGACY CPU

LEGACY CPU

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#

D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV0#
DINV1#
DINV2#
DINV3#

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

A20M#
FERR#

IGNNE#

INIT#

LINT0
LINT1

STPCLK#

SMI#

E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26

J26
M26
V23
AC20

H23
M24
W24
AD23
G22
N25
Y25
AE24

A6
A5
C4
B3
C6
B4

D5
A3

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DINV#0 6
H_DINV#1 6
H_DINV#2 6
H_DINV#3 6

H_DSTBN #0 6
H_DSTBN #1 6
H_DSTBN #2 6
H_DSTBN #3 6
H_DSTBP #0 6
H_DSTBP #1 6
H_DSTBP #2 6
H_DSTBP #3 6

H_A20M# 19
H_FERR# 19
H_IGNNE# 19
H_INIT# 19
H_INTR 19
H_NMI 19

H_STPCL K# 19
H_SMI# 19

3

H_D#[0..63 ]

H_A#[3..31 ]

H_REQ#[0 ..4]

H_RS#[0..2 ]

H_D#[0..63 ] 6

H_A#[3..31 ] 6

H_REQ#[0 ..4] 6

H_RS#[0..2 ] 6

C484

C484

2200P_0 402_50V7K

2200P_0 402_50V7K

2

+1.05VS

XDP_TDI

XDP_TDO

XDP_TMS

H_PROCH OT#

XDP_BPM #5

H_IERR#

XDP_TRS T#

XDP_TCK

TEST1

TEST2

+3VS

1

THERMDA

2

THERMDC

R59 56_0402 _5%

R59 56_0402 _5%

R525 56_0402_ 5%

R525 56_0402_ 5%

R63 56_0402 _5%

R63 56_0402 _5%

R114 75_04 02_5%R114 75_04 02_5%

R46 56_0402 _5%R46 56_0402 _5%

R113 56_0402_ 5%

R113 56_0402_ 5%

R57 56_0402 _5%

R57 56_0402 _5%

R37 56_0402 _5%

R37 56_0402 _5%

R526 1K_04 02_5%@R526 1K_04 02_5%@

R527 51_04 02_5% R527 51_04 02_5%

C485

C485

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1 2

U21

U21

1

VDD

2

D+

3

D-

THERM#4GND

ADM1032 ARMZ_MSOP8

ADM1032 ARMZ_MSOP8

SCLK

SDATA

ALERT#

12

12

12

12

12

12

12

12

12

12

8

7

6

5

EC_SMB_ CK2 28

EC_SMB_ DA2 28

1

Layout Note:
THERMDA & THERMDC Trace / Space = 10 / 10 mil

5

Security Class ification

Security Class ification

Security Class ification

2007/1/1 5 2007/12/ 25

2007/1/1 5 2007/12/ 25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/1 5 2007/12/ 25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Merom (1/2)

Merom (1/2)

Merom (1/2)

4 44Monday, April 16, 2007

4 44Monday, April 16, 2007

4 44Monday, April 16, 2007

1

0.2

0.2

0.2

5

4

3

2

1

100_040 2_1%

100_040 2_1%

+CPU_CO RE

20mils

D D

R366

R366
1K_0402 _1%

1K_0402 _1%

C C

R369

R369
2K_0402 _1%

2K_0402 _1%

B B

A A

VCCSENS E42
VSSSENS E42

+1.5VS

C148

C148

10U_080 5_10V4Z

10U_080 5_10V4Z

Layout Note:
Place C626 near Pin B26

+1.05VS

1 2

Trace Close CPU < 0.5'

1 2

1

1

2

2

C153

C153

0.01U_04 02_16V7K

0.01U_04 02_16V7K

12

R20

R20

PSI#42

CPU_VID042
CPU_VID142
CPU_VID242
CPU_VID342
CPU_VID442
CPU_VID542
CPU_VID642

CPU_BSE L014
CPU_BSE L114
CPU_BSE L214

+CPU_CO RE

R21

12

+1.05VS

12
12
12
12

R21

100_040 2_1%

100_040 2_1%

VCCSENS E
VSSSENS E

GTL_REF 0

R3762 7.4_0402_1%

R3762 7.4_0402_1%
R37554.9_04 02_1%

R37554.9_04 02_1%

R5427.4_040 2_1%

R5427.4_040 2_1%
R5654.9_040 2_1%

R5654.9_040 2_1%

COMP0
COMP1
COMP2
COMP3

JP22B

JP22B

AF7

VCCSENSE

AE7

VSSSENSE

B26

VCCA

K6

VCCP

J6

VCCP

M6

VCCP

N6

VCCP

YONAH

YONAH

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

PSI#

VID0
VID1
VID2
VID3
VID4
VID5
VID6

GTLREF

BSEL0
BSEL1
BSEL2

COMP0
COMP1
COMP2
COMP3

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

FOX_PZ4 7903-2741-42_YONA H

FOX_PZ4 7903-2741-42_YONA H

K21

M21
N21

R21
V21

W21

G21

AE6

AD6
AF5
AE5
AF4
AE3
AF2
AE2

AD26

B22
B23
C21

R26
U26

AB20
AA20
AF20
AE20
AB18
AB17
AA18
AA17
AD18
AD17
AC18
AC17
AF18
AF17

AF1
D22
C23
C24
AA1
AA4
AB2
AA3

B25

T6

R6

J21

T21

V6

U1
V1

E7

D2

F6
D3
C1

M4
N5

T2
V3
B2
C3

T22

AB26

VSS

AA25

VSS

AD25

VSS

AE26

VSS

AB23

VSS

AC24

VSS

AF24

VSS

AE23

VSS

AA22

VSS

AD22

VSS

AC21

VSS

AF21

VSS

AB19

VSS

AA19

VSS

AD19

VSS

AC19

VSS

AF19

VSS

AE19

VSS

AB16

VSS

AA16

VSS

AD16

VSS

AC16

VSS

AF16

VSS

AE16

VSS

AB13

VSS

AA14

VSS

AD13

VSS

AC14

VSS

AF13

VSS

AE14

VSS

AB11

VSS

AA11

VSS

AD11

VSS

AC11

VSS

AF11

VSS

AE11

VSS

AB8

VSS

AA8

VSS

AD8

VSS

AC8

VSS

AF8

VSS

AE8

VSS

AA5

VSS

AD5

VSS

AC6

VSS

AF6

VSS

AB4

VSS

AC3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AF3
AE4
AB1
AA2
AD2
AE1
B6
C5
F5
E6
H6
J5
M5
L6
P6
R5
V5
U6
Y6
A4
D4
E3
H3
G4
K4
L3
P3
N4
T4
U3
Y3
W4
D1
C2
F2
G1

POWER, GROUNG, RESERVED SIGNALS AND NC

POWER, GROUNG, RESERVED SIGNALS AND NC

+CPU_CO RE

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU_CO RE

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU_CO RE

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU_CO RE

1

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

C701

C701

220U_D2 _2VMR15

220U_D2 _2VMR15

C675

C675

C685

C685

C688

C688

C694

C694

+1.05VS

+CPU_CO RE

1

+

+

C669

C669

330U_D2 E_2.5VM_R9

330U_D2 E_2.5VM_R9

2

3 x 330uF(9mOhm/3)

1

+

+

C670

C670

330U_D2 E_2.5VM_R9

330U_D2 E_2.5VM_R9

2

South Side Secondary

+CPU_CO RE

1

+

+

C672

C672

330U_D2 E_2.5VM_R9

330U_D2 E_2.5VM_R9

2

3 x 330uF(9mOhm/3)

1

+

+

C673

C673

@

@

330U_D2 E_2.5VM_R9

330U_D2 E_2.5VM_R9

2

North Side Secondary

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C676

C676

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

(Place these capacitors on South side ,Secondary Layer)

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C682

C682

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

(Place these capacitors on South side ,Secondary Layer)

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C689

C689

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

(Place these capacitors on North side,Sec ondary Layer)

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C695

C695

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

+CPU-CORE
Decoupling
SPCAP,Polymer

MLCC 0805 X5R

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

2

1

+

+

C702

C702

2

10U_080 5_6.3V6M

1

C677

C677

2

1

C686

C686

2

1

C690

C690

2

1

C696

C696

2

(Place these capacitors on North side,Sec ondary Layer)

1

C678

C678

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C683

C683

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C691

C691

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C697

C697

2

C,uF ESL,nH

6X330uF 9m ohm/6 1.8nH/6

32X22uF

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

1

C703

C703

C704

C704

2

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

+

C671

@+C671

@

330U_D2 E_2.5VM_R9

330U_D2 E_2.5VM_R9

2

1

+

+

C674

C674

330U_D2 E_2.5VM_R9

330U_D2 E_2.5VM_R9

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C679

C679

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C684

C684

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C692

C692

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C698

C698

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C680

C680

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C687

C687

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C693

C693

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C699

C699

2

ESR, mohm

3m ohm/32 0.6nH/32

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C705

C705

2

1

C706

C706

2

0.1U_040 2_16V4Z

1

C707

C707

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

1

C681

C681

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

C700

C700

2

10U_080 5_6.3V6M

10U_080 5_6.3V6M

1

1

C708

C708

@

@

2

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

10U_080 5_6.3V6M

C709

C709

@

@

+CPU_CO RE

1

C649

C649

2

1

C668

C668

2

JP22C

JP22C

AE18

VCC

AE17

VCC

AB15

VCC

AA15

VCC

AD15

VCC

AC15

VCC

AF15

VCC

AE15

VCC

AB14

VCC

AA13

VCC

AD14

VCC

AC13

VCC

AF14

VCC

AE13

VCC

AB12

VCC

AA12

VCC

AD12

VCC

AC12

VCC

AF12

VCC

AE12

VCC

AB10

VCC

AB9

VCC

AA10

VCC

AA9

VCC

AD10

VCC

AD9

VCC

AC10

VCC

AC9

VCC

AF10

VCC

AF9

VCC

AE10

AE9
AB7
AA7
AD7
AC7
B20
A20

E20
B18
B17
A18
A17
D18
D17
C18
C17

E18
E17
B15
A15
D15
C15

E15
B14
A13
D14
C13

E13
B12
A12
D12
C12

E12
B10

A10

D10

C10

E10

F20

F18
F17

F15

F14

F12

F10

POWER, GROUND

POWER, GROUND

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

B9

VCC
VCC

A9

VCC
VCC

D9

VCC
VCC

C9

VCC
VCC

F9

VCC
VCC

E9

VCC

B7

VCC

A7

VCC

F7

VCC

FOX_PZ4 7903-2741-42_YONA H

FOX_PZ4 7903-2741-42_YONA H

YONAH

YONAH

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K1
J2
M2
N1
T1
R2
V2
W1
A26
D26
C25
F25
B24
A23
D23
E24
B21
C22
F22
E21
B19
A19
D19
C19
F19
E19
B16
A16
D16
C16
F16
E16
B13
A14
D13
C14
F13
E14
B11
A11
D11
C11
F11
E11
B8
A8
D8
C8
F8
E8
G26
K26
J25
M25
N26
T26
R25
V25
W26
H24
G23
K23
L24
P24
N23
T23
U24
Y24
W23
H21
J22
M22
L21
P21
R22
V22
U21
Y21

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms)
COMP1, COMP3 layout : Space 25mils (55Ohms)

5

Security Class ification

Security Class ification

Security Class ification

2007/1/1 5 2007/12/ 25

2007/1/1 5 2007/12/ 25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/1 5 2007/12/ 25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Merom (2/2)

Merom (2/2)

Merom (2/2)

5 44Monday, April 16, 2007

5 44Monday, April 16, 2007

5 44Monday, April 16, 2007

1

0.2

0.2

0.2

of

5

4

3

2

1

U41A

H_D#[0..63 ]4

D D

C C

+1.05VS

R528

R528

R529

R529

1 2

1 2

54.9_0402_1%

54.9_0402_1%

54.9_0402_1%

54.9_0402_1%

B B

+1.05VS

R533

R533

1 2

H_VREF

100_0402_1%

100_0402_1%

A A

12

1

R537

R537

C710

C710

2

200_0603_1%

200_0603_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_VREF
H_XRCOM P

H_XSCOM P

H_YRCOMP

H_YSCOMP

H_SW NG0
H_SW NG1

12

12

R531

R531

R532

R532

24.9_0402_1%

24.9_0402_1%

24.9_0402_1%

24.9_0402_1%

Layout Note:
H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /
H_SWNG1 trace width and spacing is 10/20.

5

U41A

F1

HD0#

J1

HD1#

H1

HD2#

J6

HD3#

H3

HD4#

K2

HD5#

G1

HD6#

G2

HD7#

K9

HD8#

K1

HD9#

K7

HD10#

J8

HD11#

H4

HD12#

J3

HD13#

K11

HD14#

G4

HD15#

T10

HD16#

W11

HD17#

T3

HD18#

U7

HD19#

U9

HD20#

U11

HD21#

T11

HD22#

W9

HD23#

T1

HD24#

T8

HD25#

T4

HD26#

W7

HD27#

U5

HD28#

T9

HD29#

W6

HD30#

T5

HD31#

AB7

HD32#

AA9

HD33#

W4

HD34#

W3

HD35#

Y3

HD36#

Y7

HD37#

W5

HD38#

Y10

HD39#

AB8

HD40#

W2

HD41#

AA4

HD42#

AA7

HD43#

AA2

HD44#

AA6

HD45#

AA10

HD46#

Y8

HD47#

AA1

HD48#

AB4

HD49#

AC9

HD50#

AB11

HD51#

AC11

HD52#

AB3

HD53#

AC2

HD54#

AD1

HD55#

AD9

HD56#

AC1

HD57#

AD7

HD58#

AC6

HD59#

AB5

HD60#

AD10

HD61#

AD4

HD62#

AC8

HD63#

J13

HVREF0

K13

HVREF1

E1

HXRCOMP

E2

HXSCOMP

Y1

HYRCOMP

U1

HYSCOMP

E4

HXSWING

W1

HYSWING

CALISTOGA _FCBGA1466~D

CALISTOGA _FCBGA1466~D

PM@

PM@

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#

HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HADSTB#0
HADSTB#1

HOST

HOST

HCLKN
HCLKP

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

HDINV#0
HDINV#1
HDINV#2
HDINV#3

HCPURST#

HADS#

HTRDY#

HDPWR#

HDRDY#

HDEFER#

HHITM#

HHIT#

HLOCK#

HBREQ0#

HBNR#

HBPRI#

HDBSY#

HCPUSLP#

HRS0#
HRS1#
HRS2#

12

R534

R534

221_0603_1%

221_0603_1%

1

C711

R538

R538

1 2

100_0402_1%

100_0402_1%

C711

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4

C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14

D8
G8
B8
F8
A8

B9
C13

AG1
AG2

K4
T7
Y5
AC4
K3
T6
AA5
AC5

J7
W8
U3
AB10

B7
E8
E7
J9
H8
C3
D4
D3
B3
C7
C6
F6
A7
E3

B4
E6
D6

+1.05VS+1.05VS

12

R535

R535

R539

R539

1 2

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB #0
H_ADSTB #1

CLK_MCH _BCLK#
CLK_MCH _BCLK

H_DSTBN #0
H_DSTBN #1
H_DSTBN #2
H_DSTBN #3
H_DSTBP #0
H_DSTBP #1
H_DSTBP #2
H_DSTBP #3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_ADS#
H_TRDY#
H_DPW R#
H_DRDY#
H_DEFER #
H_HITM#
H_HIT#
H_LOCK#

H_BR0#
H_BNR#
H_BPRI#

H_DBSY#

H_CPUSL P#

H_RS#0

H_RS#1

H_RS#2

221_0603_1%

221_0603_1%

1

2

100_0402_1%

100_0402_1%

H_SW NG1H_SW NG0

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H_A#3

H9

H_A#[3..31 ] 4

U41B

U41B

DMI_ITX_MRX_ N020
DMI_ITX_MRX_ N120
DMI_ITX_MRX_ N220
DMI_ITX_MRX_ N320

DMI_ITX_MRX_ P020
DMI_ITX_MRX_ P120
DMI_ITX_MRX_ P220
DMI_ITX_MRX_ P320

DMI_MTX_IRX_ N020
DMI_MTX_IRX_ N120
DMI_MTX_IRX_ N220
DMI_MTX_IRX_ N320

DMI_MTX_IRX_ P020
DMI_MTX_IRX_ P120
DMI_MTX_IRX_ P220
DMI_MTX_IRX_ P320

DDRA_CL K012
DDRA_CL K112
DDRB_CL K013
DDRB_CL K113

DDRA_CL K0#12
DDRA_CL K1#12
DDRB_CL K0#13
DDRB_CL K1#13

DDRA_CK E012
DDRA_CK E112
DDRB_CK E013
DDRB_CK E113

DDRA_SC S#012
DDRA_SC S#112
DDRB_SC S#013
DDRB_SC S#113

DDRA_OD T012
DDRA_OD T112
DDRB_OD T013

+1.8V

DDRB_OD T113

R426 80.6_ 0402_1%R426 8 0.6_0402_1%
R425

R425

PM_EXTT S#012,13

MCH_ICH_S YNC#18

R326 100_04 02_5% R326 100_0402_5 %

H_ADSTB #0 4
H_ADSTB #1 4

CLK_MCH _BCLK# 14
CLK_MCH _BCLK 14

H_DSTBN #0 4
H_DSTBN #1 4
H_DSTBN #2 4
H_DSTBN #3 4
H_DSTBP #0 4
H_DSTBP #1 4
H_DSTBP #2 4
H_DSTBP #3 4

H_DINV#0 4
H_DINV#1 4
H_DINV#2 4
H_DINV#3 4

H_RESET # 4
H_ADS# 4
H_TRDY# 4
H_DPW R# 4
H_DRDY# 4
H_DEFER # 4
H_HITM# 4
H_HIT# 4

H_LOCK# 4
H_BR0# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 4

H_CPUSL P# 4

H_RS#[0..2 ] 4

H_REQ#[0 ..4] 4

PM_BMBU SY#20

H_THERM TRIP#4,19

PLT_RST #18,20,22,2 4,28

20/20mil

C712

C712

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/1 5 2007/12/ 25

2007/1/1 5 2007/12/ 25

2007/1/1 5 2007/12/ 25

3

DMI_ITX_MRX_ N0
DMI_ITX_MRX_ N1
DMI_ITX_MRX_ N2
DMI_ITX_MRX_ N3

DMI_ITX_MRX_ P0
DMI_ITX_MRX_ P1
DMI_ITX_MRX_ P2
DMI_ITX_MRX_ P3

DMI_MTX_IRX_ N0
DMI_MTX_IRX_ N1
DMI_MTX_IRX_ N2
DMI_MTX_IRX_ N3

DMI_MTX_IRX_ P0
DMI_MTX_IRX_ P1
DMI_MTX_IRX_ P2
DMI_MTX_IRX_ P3

1 2
1 2

80.6_040 2_1%

80.6_040 2_1%

SM_VREF

PM_EXTT S#0
PM_EXTT S#1

R530 0_ 0402_5%

R530 0_ 0402_5%

1 2

GMCH_PW ROK
MCH_RST IN#

1

C894

C894

@

@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

T37

T37
T38

T38

MCH_RST IN#

SM_VREF

AE35

AF39
AG35
AH39

AC35
AE39

AF35
AG39

AE37

AF41
AG37
AH41

AC37
AE41

AF37
AG41

AY35

AW7

AW40

AW35

AY40

AU20

AT20
BA29
AY29

AW13
AW12

AY21

AW21

AL20

PAD

PAD

AF10

PAD

PAD

BA13
BA12
AY20
AU21

SMRCOMP
SMRCOMP #

AK41

AH33
AH34

1

C354

C354

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

Deciphered Date

Deciphered Date

Deciphered Date

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMITXP0
DMITXP1
DMITXP2
DMITXP3

SM_CK0

AR1

SM_CK1
SM_CK2
SM_CK3

SM_CK0#

AT1

SM_CK1#

AY7

SM_CK2#
SM_CK3#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

AV9

SM_RCOMPN

AT9

SM_RCOMPP

AK1

SM_VREF0
SM_VREF1

G28

PM_BMBUSY#

F25

PM_EXTTS0#

H26

PM_EXTTS1#

G6

PM_THERMTRIP#
PWROK
RSTIN#

K28

ICH_SYNC#

CALISTOGA _FCBGA1466~D

CALISTOGA _FCBGA1466~D

PM@

PM@

+1.8V

R334

R334

100_040 2_1%

100_040 2_1%

1 2

R335

R335

100_040 2_1%

100_040 2_1%

1 2

Description at page10

MCH_CLK SEL0

K16

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6

CFG

CFG

G_CLKP
G_CLKN

D_REF_CLKN

D_REF_CLKP

CLKNC

CLKNC

D_REF_SSCLKN
D_REF_SSCLKP

CLK_REQ#

RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
RESERVED7
RESERVED8

RESERVED9
RESERVED10
RESERVED11
RESERVED12
RESERVED13

CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18

DMI

DMI

DDR MUXING

DDR MUXING

PM

PM

RESERVED

RESERVED

K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26

AG33
AF33

A27
A26

C40
D41

H32

A3
A39
A4
A40
AW1
AW41
AY1
BA1
BA2
BA3
BA39
BA40
BA41
C1
AY41
B2
B41
C41
D1

T32
R32
F3
F7
AG11
AF11
H7
J19
A41
A34
D28
D27
A35

MCH_CLK SEL1
MCH_CLK SEL2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

CLK_MCH _3GPLL
CLK_MCH _3GPLL#

CLK_DRE F_96M#
CLK_DRE F_96M

CLK_DRE F_SSC#
CLK_DRE F_SSC

MCH_CLK REQ#

PAD

PAD
PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD

PAD
PAD

PAD

PAD

PAD

MCH_CLK SEL0 14
MCH_CLK SEL1 14
MCH_CLK SEL2 14

T17

T17
T22

T22

CFG5 10

T20

T20

CFG7 10

T19

T19

CFG9 10

T18

T18

CFG11 10
CFG12 10
CFG13 10

T15

T15
T21

T21

CFG16 10

T16

T16

CFG18 10
CFG19 10
CFG20 10

CLK_MCH _3GPLL 14
CLK_MCH _3GPLL# 14

CLK_DRE F_96M# 14
CLK_DRE F_96M 1 4

CLK_DRE F_SSC# 14
CLK_DRE F_SSC 14

MCH_CLK REQ# 1 4

reserve VGATE for GMCH_PWROK

VGATE

VGATE14,20,42

SYS_PW ROK20,30

PM_DPRS LPVR20,42

2

SYS_PW ROK

1 2

R536 0_0402_5%

R536 0_0402_5%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

R333 0_0402 _5%@R33 3 0_0402_ 5%@

1 2

R332 0_0402 _5% R332 0_04 02_5%

PM_EXTT S#0

R183 10K_04 02_5%

R183 10K_04 02_5%

PM_EXTT S#1

R196 10K_04 02_5%@R196 10K_04 02_5%@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Calistoga (1/6)

Calistoga (1/6)

Calistoga (1/6)

GMCH_PW ROK

1

+3VS

0.2

0.2

0.2

6 44Monday, April 16, 2007

6 44Monday, April 16, 2007

6 44Monday, April 16, 2007

5

4

3

2

1

DDRB_SD Q[0..63]

DDRB_SM A[0..13]

DDR SYS MEMORY B

DDR SYS MEMORY B

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8

SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AJ9
AN10
AK13
AH11
AK10
AJ8
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ5
AJ3

DDRB_SD Q0
DDRB_SD Q1
DDRB_SD Q2
DDRB_SD Q3
DDRB_SD Q4
DDRB_SD Q5
DDRB_SD Q6
DDRB_SD Q7
DDRB_SD Q8
DDRB_SD Q9
DDRB_SD Q10
DDRB_SD Q11
DDRB_SD Q12
DDRB_SD Q13
DDRB_SD Q14
DDRB_SD Q15
DDRB_SD Q16
DDRB_SD Q17
DDRB_SD Q18
DDRB_SD Q19
DDRB_SD Q20
DDRB_SD Q21
DDRB_SD Q22
DDRB_SD Q23
DDRB_SD Q24
DDRB_SD Q25
DDRB_SD Q26
DDRB_SD Q27
DDRB_SD Q28
DDRB_SD Q29
DDRB_SD Q30
DDRB_SD Q31
DDRB_SD Q32
DDRB_SD Q33
DDRB_SD Q34
DDRB_SD Q35
DDRB_SD Q36
DDRB_SD Q37
DDRB_SD Q38
DDRB_SD Q39
DDRB_SD Q40
DDRB_SD Q41
DDRB_SD Q42
DDRB_SD Q43
DDRB_SD Q44
DDRB_SD Q45
DDRB_SD Q46
DDRB_SD Q47
DDRB_SD Q48
DDRB_SD Q49
DDRB_SD Q50
DDRB_SD Q51
DDRB_SD Q52
DDRB_SD Q53
DDRB_SD Q54
DDRB_SD Q55
DDRB_SD Q56
DDRB_SD Q57
DDRB_SD Q58
DDRB_SD Q59
DDRB_SD Q60
DDRB_SD Q61
DDRB_SD Q62
DDRB_SD Q63

DDRB_SD M0
DDRB_SD M1
DDRB_SD M2
DDRB_SD M3
DDRB_SD M4
DDRB_SD M5
DDRB_SD M6
DDRB_SD M7

DDRB_SD QS0
DDRB_SD QS1
DDRB_SD QS2
DDRB_SD QS3
DDRB_SD QS4
DDRB_SD QS5
DDRB_SD QS6
DDRB_SD QS7

DDRB_SD QS0#
DDRB_SD QS1#
DDRB_SD QS2#
DDRB_SD QS3#
DDRB_SD QS4#
DDRB_SD QS5#
DDRB_SD QS6#
DDRB_SD QS7#

DDRB_SM A0
DDRB_SM A1
DDRB_SM A2
DDRB_SM A3
DDRB_SM A4
DDRB_SM A5
DDRB_SM A6
DDRB_SM A7
DDRB_SM A8
DDRB_SM A9
DDRB_SM A10
DDRB_SM A11
DDRB_SM A12
DDRB_SM A13

SB_RCVE NOUT#SA_RCVE NOUT#

DDRB_SD Q[0..63]13

DDRB_SM A[0..13]13

U41E

U41E

AT24

SB_BS0

AV23

SB_BS1

AY28

SB_BS2

AK36

SB_DM0

AR38

SB_DM1

AT36

SB_DM2

BA31

SB_DM3

AL17

SB_DM4

AH8

SB_DM5

BA5

SB_DM6

AN4

SB_DM7

AM39

SB_DQS0

AT39

SB_DQS1

AU35

SB_DQS2

AR29

SB_DQS3

AR16

SB_DQS4

AR10

SB_DQS5

AR7

SB_DQS6

AN5

SB_DQS7

AM40

SB_DQS0#

AU39

SB_DQS1#

AT35

SB_DQS2#

AP29

SB_DQS3#

AP16

SB_DQS4#

AT10

SB_DQS5#

AT7

SB_DQS6#

AP5

SB_DQS7#

AY23

SB_MA0

AW24

SB_MA1

AY24

SB_MA2

AR28

SB_MA3

AT27

SB_MA4

AT28

SB_MA5

AU27

SB_MA6

AV28

SB_MA7

AV27

SB_MA8

AW27

SB_MA9

AV24

SB_MA10

BA27

SB_MA11

AY27

SB_MA12

AR23

SB_MA13

AR24

SB_CAS#

AU23

SB_RAS#

AR27

SB_WE#

AK16

SB_RCVENIN#

AK18

SB_RCVENOUT#

CALISTOGA _FCBGA1466~D

CALISTOGA _FCBGA1466~D

PM@

PM@

DDRA_SD Q[0..63]12

DDRA_SD M0
DDRA_SD M1
DDRA_SD M2
DDRA_SD M3
DDRA_SD M4
DDRA_SD M5
DDRA_SD M6
DDRA_SD M7

DDRA_SD QS0
DDRA_SD QS1
DDRA_SD QS2
DDRA_SD QS3
DDRA_SD QS4
DDRA_SD QS5
DDRA_SD QS6
DDRA_SD QS7

DDRA_SD QS0#
DDRA_SD QS1#
DDRA_SD QS2#
DDRA_SD QS3#
DDRA_SD QS4#
DDRA_SD QS5#
DDRA_SD QS6#
DDRA_SD QS7#

DDRA_SM A0
DDRA_SM A1
DDRA_SM A2
DDRA_SM A3
DDRA_SM A4
DDRA_SM A5
DDRA_SM A6
DDRA_SM A7
DDRA_SM A8
DDRA_SM A9
DDRA_SM A10
DDRA_SM A11
DDRA_SM A12
DDRA_SM A13

DDRA_SM A[0..13]12

AU12
AV14
BA20

AJ33

AM35

AL26
AN22
AM14

AL9
AR3
AH4

AK33
AT33
AN28
AM22
AN12

AN8
AP3
AG5

AK32
AU33
AN27
AM21
AM12

AL8
AN3
AH5

AY16
AU14

AW16

BA16
BA17
AU16
AV17
AU17

AW17

AT16
AU13
AT17
AV20
AV12

AY13

AW14

AY14
AK23
AK24

U41D

U41D

SA_BS0
SA_BS1
SA_BS2

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#
SA_WE#
SA_RCVENIN#
SA_RCVENOUT#

CALISTOGA _FCBGA1466~D

CALISTOGA _FCBGA1466~D

PM@

PM@

D D

DDRA_SB S0#12
DDRA_SB S1#12
DDRA_SB S2#12

DDRA_SD M[0..7]12 DDRB_SD M[0..7]13

C C

B B

DDRA_SD QS012
DDRA_SD QS112
DDRA_SD QS212
DDRA_SD QS312
DDRA_SD QS412
DDRA_SD QS512
DDRA_SD QS612
DDRA_SD QS712

DDRA_SD QS0#12
DDRA_SD QS1#12
DDRA_SD QS2#12
DDRA_SD QS3#12
DDRA_SD QS4#12
DDRA_SD QS5#12
DDRA_SD QS6#12
DDRA_SD QS7#12

DDRA_SC AS#12
DDRA_SR AS#12
DDRA_SW E#12

PAD

PAD

T28

T28

PAD

PAD

T30

T30

SA_RCVE NIN# SB_RCVE NIN#

DDRA_SD Q[0..63]

DDRA_SM A[0..13]

DDR SYS MEMORY A

DDR SYS MEMORY A

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8

SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8

DDRA_SD Q0
DDRA_SD Q1
DDRA_SD Q2
DDRA_SD Q3
DDRA_SD Q4
DDRA_SD Q5
DDRA_SD Q6
DDRA_SD Q7
DDRA_SD Q8
DDRA_SD Q9
DDRA_SD Q10
DDRA_SD Q11
DDRA_SD Q12
DDRA_SD Q13
DDRA_SD Q14
DDRA_SD Q15
DDRA_SD Q16
DDRA_SD Q17
DDRA_SD Q18
DDRA_SD Q19
DDRA_SD Q20
DDRA_SD Q21
DDRA_SD Q22
DDRA_SD Q23
DDRA_SD Q24
DDRA_SD Q25
DDRA_SD Q26
DDRA_SD Q27
DDRA_SD Q28
DDRA_SD Q29
DDRA_SD Q30
DDRA_SD Q31
DDRA_SD Q32
DDRA_SD Q33
DDRA_SD Q34
DDRA_SD Q35
DDRA_SD Q36
DDRA_SD Q37
DDRA_SD Q38
DDRA_SD Q39
DDRA_SD Q40
DDRA_SD Q41
DDRA_SD Q42
DDRA_SD Q43
DDRA_SD Q44
DDRA_SD Q45
DDRA_SD Q46
DDRA_SD Q47
DDRA_SD Q48
DDRA_SD Q49
DDRA_SD Q50
DDRA_SD Q51
DDRA_SD Q52
DDRA_SD Q53
DDRA_SD Q54
DDRA_SD Q55
DDRA_SD Q56
DDRA_SD Q57
DDRA_SD Q58
DDRA_SD Q59
DDRA_SD Q60
DDRA_SD Q61
DDRA_SD Q62
DDRA_SD Q63

DDRB_SB S0#13
DDRB_SB S1#13
DDRB_SB S2#13

DDRB_SD QS013
DDRB_SD QS113
DDRB_SD QS213
DDRB_SD QS313
DDRB_SD QS413
DDRB_SD QS513
DDRB_SD QS613
DDRB_SD QS713

DDRB_SD QS0#13
DDRB_SD QS1#13
DDRB_SD QS2#13
DDRB_SD QS3#13
DDRB_SD QS4#13
DDRB_SD QS5#13
DDRB_SD QS6#13
DDRB_SD QS7#13

DDRB_SC AS#13
DDRB_SR AS#13
DDRB_SW E#13

PAD

PAD

T29

T29

PAD

PAD

T31

T31

A A

Security Class ification

Security Class ification

Security Class ification

2007/1/1 5 2007/12/ 25

2007/1/1 5 2007/12/ 25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/1 5 2007/12/ 25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Calistoga (2/6)

Calistoga (2/6)

Calistoga (2/6)

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

7 44Monday, April 16, 2007

7 44Monday, April 16, 2007

7 44Monday, April 16, 2007

1

0.2

0.2

0.2

5

GMCH_TX OUT0+16
GMCH_TX OUT1+16
GMCH_TX OUT2+16

D D

R541 0_0402 _5%GM@R541 0_04 02_5%GM@

ENBKL15,28

C C

B B

A A

1 2

GMCH_TV _COMPS17
GMCH_TV _LUMA17
GMCH_TV _CRMA17

GMCH_CR T_CLK17
GMCH_CR T_DATA17

GMCH_CR T_VSYNC17
GMCH_CR T_HSYNC17

GMCH_CR T_B17

GMCH_CR T_G17

GMCH_CR T_R17

+3VS

R547 10K_04 02_5%

R547 10K_04 02_5%

1 2

R548 10K_04 02_5%

R548 10K_04 02_5%

1 2

R549 10K_04 02_5% R549 10K_040 2_5%

1 2

R550 10K_04 02_5% R550 10K_040 2_5%

1 2

R551 4.7K_040 2_5%

R551 4.7K_040 2_5%

1 2

R552 4.7K_040 2_5%

R552 4.7K_040 2_5%

1 2

R553 100K_0 402_5%

R553 100K_0 402_5%

1 2

R554 1.5K_040 2_1%

R554 1.5K_040 2_1%

1 2

R555 150_04 02_1% R 555 150_0402_1%

1 2

R556 150_04 02_1% R 556 150_0402_1%

1 2

R557 150_04 02_1% R 557 150_0402_1%

1 2

LBKLT_E N

GMCH_TV _COMPS
GMCH_TV _LUMA
GMCH_TV _CRMA

GMCH_CR T_CLK
GMCH_CR T_DATA

R543 150_040 2_1% R543 150_04 02_1%

R544 150_040 2_1% R544 150_04 02_1%

R545 150_040 2_1% R545 150_04 02_1%

GMCH_TX OUT0-16
GMCH_TX OUT1-16
GMCH_TX OUT2-16

GMCH_TZ OUT0+16
GMCH_TZ OUT1+16
GMCH_TZ OUT2+16

GMCH_TZ OUT0-16
GMCH_TZ OUT1-16
GMCH_TZ OUT2-16

GMCH_TX CLK+16
GMCH_TX CLK-16
GMCH_TZ CLK+16
GMCH_TZ CLK-16

DPST_PW M16

GMCH_LC D_CLK16

GMCH_LC D_DATA1 6

GMCH_EN VDD16

12

12

12

GMCH_LC D_CLK

GMCH_LC D_DATA

LCTLB_D ATA

LCTLA_C LK

GMCH_CR T_CLK

GMCH_CR T_DATA

LBKLT_E N

LIBG

GMCH_TV _COMPS

GMCH_TV _LUMA

GMCH_TV _CRMA

@ R7 37

@

1 2

0_0402_ 5%

0_0402_ 5%

4

U41C

U41C

H27

SDVOCTRL_DATA

H28

SDVOCTRL_CLK

GMCH_TX OUT0+
GMCH_TX OUT1+
GMCH_TX OUT2+

GMCH_TX OUT0­GMCH_TX OUT1­GMCH_TX OUT2-

GMCH_TZ OUT0+
GMCH_TZ OUT1+
GMCH_TZ OUT2+

GMCH_TZ OUT0­GMCH_TZ OUT1­GMCH_TZ OUT2-

GMCH_TX CLK+
GMCH_TX CLK­GMCH_TZ CLK+
GMCH_TZ CLK-

R737

LBKLT_E N
LCTLA_C LK
LCTLB_D ATA
GMCH_LC D_CLK
GMCH_LC D_DATA
GMCH_EN VDD PCIE_GTX_ C_MRX_P11

LIBG

1 2

R542 4.99K_0402_1% R542 4.99K_0402_1%

1 2

R546 255_0402_1%

R546 255_0402_1%

10mils

TV_IREF

CRT_IREF

B37

LA_DATA0

B34

LA_DATA1

A36

LA_DATA2

C37

LA_DATA#0

B35

LA_DATA#1

A37

LA_DATA#2

F30

LB_DATA0

D29

LB_DATA1

F28

LB_DATA2

G30

LB_DATA#0

D30

LB_DATA#1

F29

LB_DATA#2

A32

LA_CLK

A33

LA_CLK#

E26

LB_CLK

E27

LB_CLK#

D32

LBKLT_CTL

J30

LBKLT_EN

H30

LCTLA_CLK

H29

LCTLB_DATA

G26

LDDC_CLK

G25

LDDC_DATA

F32

LVDD_EN

B38

LIBG

C35

LVBG

C33

LVREFH

C32

LVREFL

A16

TVDAC_A

C18

TVDAC_B

A19

TVDAC_C

J20

TV_IREF

B16

TV_IRTNA

B18

TV_IRTNB

B19

TV_IRTNC

J29

TV_DCONSEL1

K30

TV_DCONSEL0

C26

DDCCLK

C25

DDCDATA

H23

VSYNC

G23

HSYNC

E23

BLUE

D23

BLUE#

C22

GREEN

B22

GREEN#

A21

RED

B21

RED#

J22

CRT_IREF

CALISTOGA _FCBGA1466~D

CALISTOGA _FCBGA1466~D

PM@

PM@

LVDS

LVDS

TV CRT

TV CRT

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

3

EXP_COMPI

EXP_COMPO

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

EXP_TXN8

EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

D40
D38

PCIE_GTX_ C_MRX_N0

F34

PCIE_GTX_ C_MRX_N1

G38

PCIE_GTX_ C_MRX_N2

H34

PCIE_GTX_ C_MRX_N3

J38

PCIE_GTX_ C_MRX_N4

L34

PCIE_GTX_ C_MRX_N5

M38

PCIE_GTX_ C_MRX_N6

N34

PCIE_GTX_ C_MRX_N7

P38

PCIE_GTX_ C_MRX_N8

R34

PCIE_GTX_ C_MRX_N9

T38

PCIE_GTX_ C_MRX_N10

V34

PCIE_GTX_ C_MRX_N11

W38

PCIE_GTX_ C_MRX_N12

Y34

PCIE_GTX_ C_MRX_N13

AA38

PCIE_GTX_ C_MRX_N14

AB34

PCIE_GTX_ C_MRX_N15

AC38

PCIE_GTX_ C_MRX_P0

D34

PCIE_GTX_ C_MRX_P1

F38

PCIE_GTX_ C_MRX_P2

G34

PCIE_GTX_ C_MRX_P3

H38

PCIE_GTX_ C_MRX_P4

J34

PCIE_GTX_ C_MRX_P5

L38

PCIE_GTX_ C_MRX_P6

M34

PCIE_GTX_ C_MRX_P7

N38

PCIE_GTX_ C_MRX_P8

P34

PCIE_GTX_ C_MRX_P9

R38

PCIE_GTX_ C_MRX_P10

T34
V38

PCIE_GTX_ C_MRX_P12

W34

PCIE_GTX_ C_MRX_P13

Y38

PCIE_GTX_ C_MRX_P14

AA34

PCIE_GTX_ C_MRX_P15

AB38

PCIE_MTX_ GRX_N0

F36

PCIE_MTX_ GRX_N1

G40

PCIE_MTX_ GRX_N2

H36

PCIE_MTX_ GRX_N3

J40

PCIE_MTX_ GRX_N4

L36

PCIE_MTX_ GRX_N5

M40

PCIE_MTX_ GRX_N6

N36

PCIE_MTX_ GRX_N7

P40

PCIE_MTX_ GRX_N8

R36

PCIE_MTX_ GRX_N9

T40

PCIE_MTX_ GRX_N10

V36

PCIE_MTX_ GRX_N11

W40

PCIE_MTX_ GRX_N12

Y36

PCIE_MTX_ GRX_N13

AA40

PCIE_MTX_ GRX_N14

AB36

PCIE_MTX_ GRX_N15

AC40

PCIE_MTX_ GRX_P0

D36

PCIE_MTX_ GRX_P1

F40

PCIE_MTX_ GRX_P2

G36

PCIE_MTX_ GRX_P3

H40

PCIE_MTX_ GRX_P4

J36

PCIE_MTX_ GRX_P5

L40

PCIE_MTX_ GRX_P6

M36

PCIE_MTX_ GRX_P7

N40

PCIE_MTX_ GRX_P8

P36

PCIE_MTX_ GRX_P9

R40

PCIE_MTX_ GRX_P10

T36

PCIE_MTX_ GRX_P11

V40

PCIE_MTX_ GRX_P12

W36

PCIE_MTX_ GRX_P13

Y40

PCIE_MTX_ GRX_P14

AA36

PCIE_MTX_ GRX_P15

AB40

PEG_COM P

10mils

1 2

R540 24.9_040 2_1%

R540 24.9_040 2_1%

C188 0.1U_0402 _16V7KPM@C1 88 0.1U_040 2_16V7KPM@

1 2

C201 0.1U_0402 _16V7KPM@C2 01 0.1U_040 2_16V7KPM@

1 2

C217 0.1U_0402 _16V7KPM@C2 17 0.1U_040 2_16V7KPM@

1 2

C240 0.1U_0402 _16V7KPM@C2 40 0.1U_040 2_16V7KPM@

1 2

C252 0.1U_0402 _16V7KPM@C2 52 0.1U_040 2_16V7KPM@

1 2

C270 0.1U_0402 _16V7KPM@C2 70 0.1U_040 2_16V7KPM@

1 2

C285 0.1U_0402 _16V7KPM@C2 85 0.1U_040 2_16V7KPM@

1 2

C304 0.1U_0402 _16V7KPM@C3 04 0.1U_040 2_16V7KPM@

1 2

C180 0.1U_0402 _16V7KPM@C1 80 0.1U_040 2_16V7KPM@

1 2

C198 0.1U_0402 _16V7KPM@C1 98 0.1U_040 2_16V7KPM@

1 2

C214 0.1U_0402 _16V7KPM@C2 14 0.1U_040 2_16V7KPM@

1 2

C232 0.1U_0402 _16V7KPM@C2 32 0.1U_040 2_16V7KPM@

1 2

C248 0.1U_0402 _16V7KPM@C2 48 0.1U_040 2_16V7KPM@

1 2

C263 0.1U_0402 _16V7KPM@C2 63 0.1U_040 2_16V7KPM@

1 2

C283 0.1U_0402 _16V7KPM@C2 83 0.1U_040 2_16V7KPM@

1 2

C297 0.1U_0402 _16V7KPM@C2 97 0.1U_040 2_16V7KPM@

1 2

2

+1.5VS_P CIE

C179 0.1U_0402 _16V7KPM@C1 79 0.1U_040 2_16V7KPM@

C195 0.1U_0402 _16V7KPM@C1 95 0.1U_040 2_16V7KPM@

C212 0.1U_0402 _16V7KPM@C2 12 0.1U_040 2_16V7KPM@

C229 0.1U_0402 _16V7KPM@C2 29 0.1U_040 2_16V7KPM@

C246 0.1U_0402 _16V7KPM@C2 46 0.1U_040 2_16V7KPM@

C261 0.1U_0402 _16V7KPM@C2 61 0.1U_040 2_16V7KPM@

C277 0.1U_0402 _16V7KPM@C2 77 0.1U_040 2_16V7KPM@

C296 0.1U_0402 _16V7KPM@C2 96 0.1U_040 2_16V7KPM@

C176 0.1U_0402 _16V7KPM@C1 76 0.1U_040 2_16V7KPM@

C189 0.1U_0402 _16V7KPM@C1 89 0.1U_040 2_16V7KPM@

C204 0.1U_0402 _16V7KPM@C2 04 0.1U_040 2_16V7KPM@

C219 0.1U_0402 _16V7KPM@C2 19 0.1U_040 2_16V7KPM@

C241 0.1U_0402 _16V7KPM@C2 41 0.1U_040 2_16V7KPM@

C253 0.1U_0402 _16V7KPM@C2 53 0.1U_040 2_16V7KPM@

C272 0.1U_0402 _16V7KPM@C2 72 0.1U_040 2_16V7KPM@

C288 0.1U_0402 _16V7KPM@C2 88 0.1U_040 2_16V7KPM@

PCIE_MTX_ C_GRX_N[0..15]

PCIE_MTX_ C_GRX_P[0..15]

PCIE_GTX_ C_MRX_N[0..15]

PCIE_GTX_ C_MRX_P[0..15]

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

PCIE_MTX_ C_GRX_N[0..15] 1 5

PCIE_MTX_ C_GRX_P[0..15] 15

PCIE_GTX_ C_MRX_N[0..15] 1 5

PCIE_GTX_ C_MRX_P[0..15] 15

PCIE_MTX_ C_GRX_N0
PCIE_MTX_ C_GRX_N1
PCIE_MTX_ C_GRX_N2
PCIE_MTX_ C_GRX_N3
PCIE_MTX_ C_GRX_N4
PCIE_MTX_ C_GRX_N5
PCIE_MTX_ C_GRX_N6
PCIE_MTX_ C_GRX_N7
PCIE_MTX_ C_GRX_N8
PCIE_MTX_ C_GRX_N9
PCIE_MTX_ C_GRX_N10
PCIE_MTX_ C_GRX_N11
PCIE_MTX_ C_GRX_N12
PCIE_MTX_ C_GRX_N13
PCIE_MTX_ C_GRX_N14
PCIE_MTX_ C_GRX_N15

PCIE_MTX_ C_GRX_P0
PCIE_MTX_ C_GRX_P1
PCIE_MTX_ C_GRX_P2
PCIE_MTX_ C_GRX_P3
PCIE_MTX_ C_GRX_P4
PCIE_MTX_ C_GRX_P5
PCIE_MTX_ C_GRX_P6
PCIE_MTX_ C_GRX_P7
PCIE_MTX_ C_GRX_P8
PCIE_MTX_ C_GRX_P9
PCIE_MTX_ C_GRX_P10
PCIE_MTX_ C_GRX_P11
PCIE_MTX_ C_GRX_P12
PCIE_MTX_ C_GRX_P13
PCIE_MTX_ C_GRX_P14
PCIE_MTX_ C_GRX_P15

1

Security Class ification

Security Class ification

Security Class ification

2007/1/1 5 2007/12/ 25

2007/1/1 5 2007/12/ 25

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/1 5 2007/12/ 25

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Calistoga (3/6)

Calistoga (3/6)

Calistoga (3/6)

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

8 44Monday, April 16, 2007

8 44Monday, April 16, 2007

8 44Monday, April 16, 2007

1

0.2

0.2

0.2

5

4

3

2

1

D D

U41H

+1.05VS

(800mA)

1

+

+

C713

C713

220U_D2_2VMR15

220U_D2_2VMR15

C C

C731

C731

B B

1

C748

C748

2

0.22U_0603_16V7K

0.22U_0603_16V7K

A A

5

2

1

1

C732

C732

2

2

2.2U_0805_10V6K

2.2U_0805_10V6K

4.7U_0805_10V4Z

4.7U_0805_10V4Z

MCH_A6

1

C737

C737

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

MCH_D2

1

C750

C750

2

0.22U_0603_16V7K

0.22U_0603_16V7K

+1.5VS

MCH_AB1

1

C751

C751

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

U41H

AC14

VTT0

AB14

VTT1

W14

VTT2

V14

VTT3

T14

VTT4

R14

VTT5

P14

VTT6

N14

VTT7

M14

VTT8

L14

VTT9

AD13

VTT10

AC13

VTT11

AB13

VTT12

AA13

VTT13

Y13

VTT14

W13

VTT15

V13

VTT16

U13

VTT17

T13

VTT18

R13

VTT19

N13

VTT20

M13

VTT21

L13

VTT22

AB12

VTT23

AA12

VTT24

Y12

VTT25

W12

VTT26

V12

VTT27

U12

VTT28

T12

VTT29

R12

VTT30

P12

VTT31

N12

VTT32

M12

VTT33

L12

VTT34

R11

VTT35

P11

VTT36

N11

VTT37

M11

VTT38

R10

VTT39

P10

VTT40

N10

VTT41

M10

VTT42

P9

VTT43

N9

VTT44

M9

VTT45

R8

VTT46

P8

VTT47

N8

VTT48

M8

VTT49

P7

VTT50

N7

VTT51

M7

VTT52

R6

VTT53

P6

VTT54

M6

VTT55

A6

VTT56

R5

VTT57

P5

VTT58

N5

VTT59

M5

VTT60

P4

VTT61

N4

VTT62

M4

VTT63

R3

VTT64

P3

VTT65

N3

VTT66

M3

VTT67

R2

VTT68

P2

VTT69

M2

VTT70

D2

VTT71

AB1

VTT72

R1

VTT73

P1

VTT74

N1

VTT75

M1

VTT76

AG14

VCCAUX32

AF14

VCCAUX33

AE14

VCCAUX34

Y14

VCCAUX35

AF13

VCCAUX36

AE13

VCCAUX37

AF12

VCCAUX38

AE12

VCCAUX39

AD12

VCCAUX40

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

PM@

PM@

P O W E R

P O W E R

4

VCC_SYNC

VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2

VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6

VCCA_3GPLL

VCCA_3GBG
VSSA_3GBG

VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC2

VCCA_DPLLA
VCCA_DPLLB

VCCA_HPLL

VCCA_LVDS

VSSA_LVDS

VCCA_MPLL

VCCA_TVBG
VSSA_TVBG

VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1

VCCD_HMPLL0
VCCD_HMPLL1

VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2

VCCD_TVDAC

VCCDQ_TVDAC

VCCHV0
VCCHV1
VCCHV2

VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8

VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31

H22

B30
C30
A30

AB41
AJ41
L41
N41
R41
V41
Y41

AC33
G41
H41

E21
F21
G21

B26
C39
AF1

A38
B39

AF2

H20
G20

E19
F19
C20
D20
E20
F20

AH1
AH2

A28
B28
C28

D21
H19

A23
B23
B25

AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14

(60mA)

(70mA)

(50mA)
(50mA)
(45mA)

(10mA)

(45mA)

(150mA)

(24mA)

+2.5VS

1 2

C714

C714

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+2.5VS

W=60 mils

(1500mA)

(20mA)

(40mA)

C719

C719

220U_D2_2VMR15

220U_D2_2VMR15

+1.5VS_3GPLL
+2.5VS

(2mA)

+2.5VS_CRTDAC

+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL

+2.5VS

+1.5VS_MPLL

+3VS_TVBG

(120mA)

+3VS_TVDACA

+3VS_TVDACB

+3VS_TVDACC

+1.5VS

+1.5VS_TVDAC

1

C740

C740

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS

1

C749

C749

2

+1.5VS_DPLLA +1.5VS_DPLLB

+1.5VS_PCIE

1

+

+

C720

C720

2

1

2

1

2

10U_0805_10V4Z

10U_0805_10V4Z

C723

C723

0.022U_0402_16V7K

0.022U_0402_16V7K

R558

R558

0_0805_5%

0_0805_5%

1

C721

C721

2

10U_0805_10V4Z

10U_0805_10V4Z

L58

L58

MBK1608301YZF_0603

MBK1608301YZF_0603

1

C728

C728

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C733

C733

2

0.01U_0402_16V7K

0.01U_0402_16V7K

12

+2.5VS

1

+

+

2

12

+1.5VS

+2.5VS

close pin G41

C729

C729

220U_D2_4VM

220U_D2_4VM

CRTDAC: Route caps within
250mil of Alviso. Route FB
within 3" of Calistoga

1

C734

C734

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+2.5VS

1

C715

C715

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C722

C722

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

2

close pin A38

+3VS+3VS_TVBG

R559

R559

0_0603_5%

0_0603_5%

12

+3VS

1

C738

C738

2

10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

1

C739

C739

2

2

0.022U_0402_16V7K

0.022U_0402_16V7K

3

C741

C741

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2007/1/15 2007/10/4

2007/1/15 2007/10/4

2007/1/15 2007/10/4

PCI-E/MEM/PSB PLL decoupling

R561

R561
0_0603_5%

0_0603_5%

1

1

C742

C742

C743

C743

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
10U_0805_10V4Z

10U_0805_10V4Z

+1.5VS_MPLL

45mA Max. 45mA Max.

1

C752

C752

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

R562

R562
0_0603_5%

0_0603_5%

1

C753

C753

2

10U_0805_10V4Z

10U_0805_10V4Z

2

MBK1608301YZF_0603

MBK1608301YZF_0603

1

+

+

C716

C716

330U_D2E_2.5VM

330U_D2E_2.5VM

2

MBK1608301YZF_0603

MBK1608301YZF_0603

1

C725

C725

C724

C724

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.022U_0402_16V7K

0.022U_0402_16V7K

MBK1608301YZF_0603

MBK1608301YZF_0603

1

C735

C735

C736

C736

2

0.022U_0402_16V7K

0.022U_0402_16V7K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS+1.5VS_3GPLL

12

1

C744

C744

@

@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

L57

L56

L56

12

1

C717

C717

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

L59

L59

12

1

C726

C726

2

+3VS+3VS_TVDACC

L61

L61

12

+1.5VS_TVDAC +1.5VS

1

C745

C745

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Date: Sheet of

Date: Sheet of

Date: Sheet of

R560

R560
0_0603_5%

0_0603_5%

1

C746

C746

2

0.022U_0402_16V7K

0.022U_0402_16V7K

+1.5VS_HPLL

1

1

C754

C754

C755

C755

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
10U_0805_10V4Z

10U_0805_10V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Compal Electronics, Inc.

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

L57

MBK1608301YZF_0603

MBK1608301YZF_0603

1

+

+

C718

C718

330U_D2E_2.5VM

330U_D2E_2.5VM

2

MBK1608301YZF_0603

MBK1608301YZF_0603

1

2

0.022U_0402_16V7K

0.022U_0402_16V7K

12

@

@

R563

R563
0_0603_5%

0_0603_5%

12

L60

L60

C730

C730

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C747

C747

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

+1.5VS+1.5VS

Calistoga (4/6)

Calistoga (4/6)

Calistoga (4/6)

1

+1.5VS+1.5VS

+3VS+3VS_TVDACA+3V S+3VS_TVDACB

12

1

2

+

+

C727

C727

220U_D2_4VM

220U_D2_4VM

9 44Monday, April 16, 2007

9 44Monday, April 16, 2007

9 44Monday, April 16, 2007

0.2

0.2

0.2

5

4

3

2

1

Strap Pin Table

CFG[3:17] have internal pull up

+1.05VS

(3500mA)

D D

1

C756

C756

2

0.22U_0603_16V7K

0.22U_0603_16V7K

1

C765

C765

2

10U_0805_10V4Z

10U_0805_10V4Z

C C

220U_D2_2VMR15

220U_D2_2VMR15

220U_D2_2VMR15

220U_D2_2VMR15

B B

C760

C760

C766

C766

C768

C768

C770

C770

@

@

1

1

C757

C757

2

2

0.22U_0603_16V7K

0.22U_0603_16V7K

0.22U_0603_16V7K

0.22U_0603_16V7K

1

1

C767

C767

2

2

1U_0603_10V4Z

1U_0603_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

1

+

+

2

1

+

+

2

+1.05VS

U41F

U41F

AD27

VCC_NCTF0

AC27

VCC_NCTF1

AB27

VCC_NCTF2

AA27

VCC_NCTF3

Y27

VCC_NCTF4

W27

VCC_NCTF5

V27

VCC_NCTF6

U27

VCC_NCTF7

T27

VCC_NCTF8

R27

VCC_NCTF9

AD26

VCC_NCTF10

AC26

VCC_NCTF11

AB26

VCC_NCTF12

AA26

VCC_NCTF13

Y26

VCC_NCTF14

W26

VCC_NCTF15

V26

VCC_NCTF16

U26

VCC_NCTF17

T26

VCC_NCTF18

R26

VCC_NCTF19

AD25

VCC_NCTF20

AC25

VCC_NCTF21

AB25

VCC_NCTF22

AA25

VCC_NCTF23

Y25

VCC_NCTF24

W25

VCC_NCTF25

V25

VCC_NCTF26

U25

VCC_NCTF27

T25

VCC_NCTF28

R25

VCC_NCTF29

AD24

VCC_NCTF30

AC24

VCC_NCTF31

AB24

VCC_NCTF32

AA24

VCC_NCTF33

Y24

VCC_NCTF34

W24

VCC_NCTF35

V24

VCC_NCTF36

U24

VCC_NCTF37

T24

VCC_NCTF38

R24

VCC_NCTF39

AD23

VCC_NCTF40

V23

VCC_NCTF41

U23

VCC_NCTF42

T23

VCC_NCTF43

R23

VCC_NCTF44

AD22

VCC_NCTF45

V22

VCC_NCTF46

U22

VCC_NCTF47

T22

VCC_NCTF48

R22

VCC_NCTF49

AD21

VCC_NCTF50

V21

VCC_NCTF51

U21

VCC_NCTF52

T21

VCC_NCTF53

R21

VCC_NCTF54

AD20

VCC_NCTF55

V20

VCC_NCTF56

U20

VCC_NCTF57

T20

VCC_NCTF58

R20

VCC_NCTF59

AD19

VCC_NCTF60

V19

VCC_NCTF61

U19

VCC_NCTF62

T19

VCC_NCTF63

AD18

VCC_NCTF64

AC18

VCC_NCTF65

AB18

VCC_NCTF66

AA18

VCC_NCTF67

Y18

VCC_NCTF68

W18

VCC_NCTF69

V18

VCC_NCTF70

U18

VCC_NCTF71

T18

VCC_NCTF72

M19

VCC100

L19

VCC101

N18

VCC102

M18

VCC103

L18

VCC104

P17

VCC105

N17

VCC106

M17

VCC107

N16

VCC108

M16

VCC109

L16

VCC110

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

PM@

PM@

VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8

VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36

P O W E R

P O W E R

VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57

VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8

VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12

VCC_SM100

VCC_SM101

VCC_SM102

VCC_SM103

VCC_SM104

VCC_SM105

VCC_SM106

VCC_SM107

AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15

AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17

AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1

+1.5VS

MCH_AV1
MCH_AJ1

+1.8V

1

1

C776

C776

C775

C775

2

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin AV1 & AJ1

A A

+1.05VS

U41G

U41G

AA33

VCC0

W33

VCC1

P33

VCC2

N33

VCC3

L33

VCC4

J33

VCC5

AA32

VCC6

Y32

VCC7

W32

VCC8

V32

VCC9

P32

VCC10

N32

VCC11

M32

VCC12

L32

VCC13

J32

VCC14

AA31

VCC15

W31

VCC16

V31

VCC17

T31

VCC18

R31

VCC19

P31

VCC20

N31

VCC21

M31

VCC22

AA30

VCC23

Y30

VCC24

W30

VCC25

V30

VCC26

U30

VCC27

T30

VCC28

R30

VCC29

P30

VCC30

N30

VCC31

M30

VCC32

L30

VCC33

AA29

VCC34

Y29

VCC35

W29

VCC36

V29

VCC37

U29

VCC38

R29

VCC39

P29

VCC40

M29

VCC41

L29

VCC42

AB28

VCC43

AA28

VCC44

Y28

VCC45

V28

VCC46

U28

VCC47

T28

VCC48

R28

VCC49

P28

VCC50

N28

VCC51

M28

VCC52

L28

VCC53

P27

VCC54

N27

VCC55

M27

VCC56

L27

VCC57

P26

VCC58

N26

VCC59

L26

VCC60

N25

VCC61

M25

VCC62

L25

VCC63

P24

VCC64

N24

VCC65

M24

VCC66

AB23

VCC67

AA23

VCC68

Y23

VCC69

P23

VCC70

N23

VCC71

M23

VCC72

L23

VCC73

AC22

VCC74

AB22

VCC75

Y22

VCC76

W22

VCC77

P22

VCC78

N22

VCC79

M22

VCC80

L22

VCC81

AC21

VCC82

AA21

VCC83

W21

VCC84

N21

VCC85

M21

VCC86

L21

VCC87

AC20

VCC88

AB20

VCC89

Y20

VCC90

W20

VCC91

P20

VCC92

N20

VCC93

M20

VCC94

L20

VCC95

AB19

VCC96

AA19

VCC97

Y19

VCC98

N19

VCC99

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

PM@

PM@

P O W E R

P O W E R

VCC_SM0
VCC_SM1
VCC_SM2
VCC_SM3
VCC_SM4
VCC_SM5
VCC_SM6
VCC_SM7
VCC_SM8

VCC_SM9
VCC_SM10
VCC_SM11
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
VCC_SM20
VCC_SM21
VCC_SM22
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
VCC_SM28
VCC_SM29
VCC_SM30
VCC_SM31
VCC_SM32
VCC_SM33
VCC_SM34
VCC_SM35
VCC_SM36
VCC_SM37
VCC_SM38
VCC_SM39
VCC_SM40
VCC_SM41
VCC_SM42
VCC_SM43
VCC_SM44
VCC_SM45
VCC_SM46
VCC_SM47
VCC_SM48
VCC_SM49
VCC_SM50
VCC_SM51
VCC_SM52
VCC_SM53
VCC_SM54
VCC_SM55
VCC_SM56
VCC_SM57
VCC_SM58
VCC_SM59
VCC_SM60
VCC_SM61
VCC_SM62
VCC_SM63
VCC_SM64
VCC_SM65
VCC_SM66
VCC_SM67
VCC_SM68
VCC_SM69
VCC_SM70
VCC_SM71
VCC_SM72
VCC_SM73
VCC_SM74
VCC_SM75
VCC_SM76
VCC_SM77
VCC_SM78
VCC_SM79
VCC_SM80
VCC_SM81
VCC_SM82
VCC_SM83
VCC_SM84
VCC_SM85
VCC_SM86
VCC_SM87
VCC_SM88
VCC_SM89
VCC_SM90
VCC_SM91
VCC_SM92
VCC_SM93
VCC_SM94
VCC_SM95
VCC_SM96
VCC_SM97
VCC_SM98
VCC_SM99

AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6

+1.8V

MCH_AT41
MCH_AM41

1

1

C758

C758

C759

C759

2

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin AT41 & AM41

1

1

C761

C761

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C769

C769

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin BA23

1

1

C771

C771

C772

C772

2

2

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

10U_0805_10V4Z

1

C774

C774

2

0.47U_0603_16V4Z

0.47U_0603_16V4Z

Place near pin BA15

1

C762

C762

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

C763

C763

C764

C764

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+

+

C773

C773

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

CFG[2:0]

CFG5

CFG7

CFG9

CFG11

PSB 4X CLK Enable 1 = Calistoga

CFG[13:12]

CFG16

CFG18

CFG19

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SDVO_CTRLDATA

CFG20

(PCIE/SDVO select)

CFG[19:18] have internal pull down

011 = 667MT/s FSB
001 = 533MT/s FSB

0 = DMI x 2
1 = DMI x 4

0 = Reserved
1 = Mobile Yonah CPU

0 = Lane Reversal Enable
1 = Normal Operation

(Default)

*

(Default)

*

(Default)

*

0 = Reserved

*

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled
11 = Normal Operation

0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default)

0 = 1.05V
1 = 1.5V

0 = Normal Operation
1 = DMI Lane Reversal Enable

0 = No SDVO Device Present

1 = SDVO Device Present

0 = Only PCIE or SDVO is
operational.
1 = PCIE/SDVO are operating
simu.

CFG56

CFG76

CFG96

CFG116

CFG126

CFG136

CFG166

CFG186

CFG196

CFG206

(Default)

*

(Default)

*

R564 2.2K_0402_5%@R564 2.2K_0402_5%@

1 2

R565 2.2K_0402_5%@R565 2.2K_0402_5%@

1 2

R566 2.2K_0402_5%@R566 2.2K_0402_5%@

1 2

R567 2.2K_0402_5%@R567 2.2K_0402_5%@

1 2

R568 2.2K_0402_5%@R568 2.2K_0402_5%@

1 2

R569 2.2K_0402_5%@R569 2.2K_0402_5%@

1 2

R570 2.2K_0402_5%@R570 2.2K_0402_5%@

1 2

R571 1K_0402_5%@R571 1K_0402_5%@

1 2

R572 1K_0402_5%@R572 1K_0402_5%@

1 2

R573 1K_0402_5%@R573 1K_0402_5%@

1 2

*

(Default)

(Default)

*

*

(Default)

*

+3VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2007/10/4

2007/1/15 2007/10/4

2007/1/15 2007/10/4

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Calistoga (5/6)

Calistoga (5/6)

Calistoga (5/6)

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

10 44Monday, April 16, 2007

10 44Monday, April 16, 2007

10 44Monday, April 16, 2007

1

0.2

0.2

0.2

5

AC41
AA41

W41

T41

P41

D D

C C

B B

A A

M41

AV40
AP40
AN40
AK40

AJ40
AH40
AG40
AF40
AE40

AY39

AW39

AV39
AR39
AN39

AJ39
AC39
AB39
AA39

W39

M39

AT38

AM38

AH38
AG38
AF38
AE38

AK37
AH37
AB37
AA37

W37

M37

AY36

AW36

AN36
AH36
AG36
AF36
AE36
AC36

BA35
AV35
AR35
AH35
AB35
AA35

W35

M35

AN34
AK34
AG34
AF34

J41
F41

B40

Y39

V39

T39
R39
P39
N39

L39

J39
H39
G39

F39
D39

C38

Y37

V37

T37
R37
P37
N37

L37

J37
H37
G37

F37
D37

C36
B36

Y35

V35

T35
R35
P35
N35

L35

J35
H35
G35

F35
D35

4

U41I

U41I

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34

P O W E R

P O W E R

VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

PM@

PM@

VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199

AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21

3

U41J

U41J

AN21

VSS200

AL21

VSS201

AB21

VSS202

Y21

VSS203

P21

VSS204

K21

VSS205

J21

VSS206

H21

VSS207

C21

VSS208

AW20

VSS209

AR20

VSS210

AM20

VSS211

AA20

VSS212

K20

VSS213

B20

VSS214

A20

VSS215

AN19

VSS216

AC19

VSS217

W19

VSS218

K19

VSS219

G19

VSS220

C19

VSS221

AH18

VSS222

P18

VSS223

H18

VSS224

D18

VSS225

A18

VSS226

AY17

VSS227

AR17

VSS228

AP17

VSS229

P O W E R

AM17

AK17
AV16
AN16

AL16

AN15

AM15

AK15

BA14
AT14
AK14
AD14
AA14

AV13
AR13
AN13

AM13

AL13

AG13

AY12
AC12

AD11
AA11

AV10
AP10

AL10
AJ10

M15

U14

H14

D13

H12

D11

J16
F16
C16

N15

L15
B15
A15

K14

E14

P13
F13

B13

K12

E12

Y11
J11

B11

P O W E R

VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS265
VSS264
VSS263
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279

CALISTOGA_FCBGA1466~D

CALISTOGA_FCBGA1466~D

PM@

PM@

2

VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS292
VSS291
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
VSS360

AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2007/10/4

2007/1/15 2007/10/4

2007/1/15 2007/10/4

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Calistoga (6/6)

Calistoga (6/6)

Calistoga (6/6)

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

11 44Monday, April 16, 2007

11 44Monday, April 16, 2007

11 44Monday, April 16, 2007

1

0.2

0.2

0.2

5

4

3

2

1

+1.8V

JP28

JP28

+DIMM_VREF

DDRA_SDQ4
DDRA_SDQ1

1

C402

C402

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DDRA_SDQS0#
DDRA_SDQS0

DDRA_SDQ2
DDRA_SDQ3

DDRA_SDQ8
DDRA_SDQ14

DDRA_SDQS1#
DDRA_SDQS1

DDRA_SDQ9
DDRA_SDQ15

DDRA_SDQ16
DDRA_SDQ17

DDRA_SDQS2#
DDRA_SDQS2

DDRA_SDQ18
DDRA_SDQ19

DDRA_SDQ29
DDRA_SDQ24

DDRA_SDM3

DDRA_SDQ26
DDRA_SDQ27

DDRA_CKE0

DDRA_SBS2#

DDRA_SMA12
DDRA_SMA9
DDRA_SMA8

DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#

DDRA_SCAS#
DDRA_SCS#1

DDRA_ODT1

DDRA_SDQ37
DDRA_SDQ36

DDRA_SDQS4#
DDRA_SDQS4

DDRA_SDQ35
DDRA_SDQ32

DDRA_SDQ40
DDRA_SDQ44

DDRA_SDM5

DDRA_SDQ41
DDRA_SDQ46

DDRA_SDQ49
DDRA_SDQ48

DDRA_SDQS6#
DDRA_SDQS6

DDRA_SDQ54
DDRA_SDQ50

DDRA_SDQ60
DDRA_SDQ61

DDRA_SDM7

DDRA_SDQ59
DDRA_SDQ58

D_CK_SDATA
D_CK_SCLK

+3VS

1

2

5

DIMM0 REV H:5.2mm (BOT)

DDRA_SDQS0#7
DDRA_SDQS07

D D

DDRA_SDQS1#7
DDRA_SDQS17

DDRA_SDQS2#7
DDRA_SDQS27

DDRA_CKE06

C C

DDRA_SBS2#7

DDRA_SBS0#7
DDRA_SWE#7

DDRA_SCAS#7
DDRA_SCS#16

DDRA_ODT16

DDRA_SDQS4#7
DDRA_SDQS47

B B

DDRA_SDQS6#7
DDRA_SDQS67

D_CK_SDATA13,14
D_CK_SCLK13,14

A A

+3VS

C607

C607

2.2U_0805_10V6K

2.2U_0805_10V6K

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

203

GND

FOX_AS0A426-M2RN-7F

FOX_AS0A426-M2RN-7F

CONN@

CONN@

DQS3#

NC/CKE1

NC/A15
NC/A14

NC/A13

DQS5#

DQS7#

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3

VSS
DQ30
DQ31

VSS

VDD

VDD

VDD

VDD

RAS#

VDD

ODT0

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7

VSS
DQ62
DQ63

VSS

SAO

GND

CK0

BA1

CK1

SA1

+1.8V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90

A11

92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110

S0#

112
114
116
118
120

NC

122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204

DDRA_SDQ6
DDRA_SDQ0

DDRA_SDM0

DDRA_SDQ5
DDRA_SDQ7

DDRA_SDQ13
DDRA_SDQ12

DDRA_SDM1

DDRA_SDQ11
DDRA_SDQ10

DDRA_SDQ20
DDRA_SDQ21

DDRA_SDM2

DDRA_SDQ23
DDRA_SDQ22

DDRA_SDQ28
DDRA_SDQ25

DDRA_SDQS3#
DDRA_SDQS3

DDRA_SDQ31
DDRA_SDQ30

DDRA_CKE1

DDRA_SMA11
DDRA_SMA7
DDRA_SMA6

DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS#0

DDRA_ODT0
DDRA_SMA13

DDRA_SDQ39
DDRA_SDQ38

DDRA_SDM4

DDRA_SDQ34
DDRA_SDQ33

DDRA_SDQ45
DDRA_SDQ43

DDRA_SDQS5#
DDRA_SDQS5

DDRA_SDQ47
DDRA_SDQ42

DDRA_SDQ52
DDRA_SDQ53

DDRA_SDM6

DDRA_SDQ51
DDRA_SDQ55

DDRA_SDQ57
DDRA_SDQ56

DDRA_SDQS7#
DDRA_SDQS7

DDRA_SDQ62
DDRA_SDQ63

R353 10K_0402_5% R353 10K_0402_5%

1 2

R354 10K_0402_5% R354 10K_0402_5%

1 2

DDRA_CLK0 6
DDRA_CLK0# 6

DDRA_SMA[0..13]7

DDRA_SDQ[0..63]7

R119 0_0402_5%

R119 0_0402_5%

1 2

DDRA_SDQS3# 7
DDRA_SDQS3 7

DDRA_CKE1 6

DDRA_SBS1# 7
DDRA_SRAS# 7
DDRA_SCS#0 6

DDRA_ODT0 6

DDRA_SDQS5# 7
DDRA_SDQS5 7

DDRA_CLK1 6
DDRA_CLK1# 6

DDRA_SDQS7# 7
DDRA_SDQS7 7

4

PM_EXTTS#0 6,13

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDRA_SDM[0..7]7

3

DDRA_CKE0
DDRA_SBS2#

DDRA_SMA12
DDRA_SMA9

DDRA_SMA5
DDRA_SMA8

DDRA_SMA1
DDRA_SMA3

DDRA_SMA10
DDRA_SBS0#

DDRA_SWE#
DDRA_SCS#1

DDRA_SCAS#
DDRA_ODT1

DDRA_SMA11
DDRA_CKE1

DDRA_SMA6
DDRA_SMA7

DDRA_SMA2
DDRA_SMA4

DDRA_SBS1#
DDRA_SMA0

DDRA_SCS#0
DDRA_SRAS#

DDRA_SMA13
DDRA_ODT0

DDRA_SMA[0..13]

DDRA_SDQ[0..63]

DDRA_SDM[0..7]

1 4
2 3

RP19 56_0404_4P2R_5%

RP19 56_0404_4P2R_5%

1 4
2 3

RP20 56_0404_4P2R_5%

RP20 56_0404_4P2R_5%

RP21 56_0404_4P2R_5%

RP21 56_0404_4P2R_5%

RP22 56_0404_4P2R_5%

RP22 56_0404_4P2R_5%

RP23 56_0404_4P2R_5%

RP23 56_0404_4P2R_5%

RP24 56_0404_4P2R_5%

RP24 56_0404_4P2R_5%

RP25 56_0404_4P2R_5%

RP25 56_0404_4P2R_5%

RP26 56_0404_4P2R_5%

RP26 56_0404_4P2R_5%

RP27 56_0404_4P2R_5%

RP27 56_0404_4P2R_5%

RP28 56_0404_4P2R_5%

RP28 56_0404_4P2R_5%

RP29 56_0404_4P2R_5%

RP29 56_0404_4P2R_5%

RP30 56_0404_4P2R_5%

RP30 56_0404_4P2R_5%

RP31 56_0404_4P2R_5%

RP31 56_0404_4P2R_5%

2007/1/15 2007/12/25

2007/1/15 2007/12/25

2007/1/15 2007/12/25

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

+1.8V

12

R345

R345

1K_0402_1%

1K_0402_1%

12

R344

R344

1K_0402_1%

1K_0402_1%

+0.9VS

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C376

C376

1

2.2U_0805_10V6K

2.2U_0805_10V6K

2

+1.8V

C611

C611

2.2U_0805_10V6K

2.2U_0805_10V6K

+1.8V

C411

C411

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

C427

C427

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

C422

C422

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

C424

C424

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+DIMM_VREF

1

C605

C605

2

2.2U_0805_10V6K

2.2U_0805_10V6K

1

C414

C414

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C404

C404

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C423

C423

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C405

C405

1

2

1

2

1

2

1

2

1

2

+DIMM_VREF

1

C410

C410

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C608

C608

2.2U_0805_10V6K

2.2U_0805_10V6K

C417

C417

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C407

C407

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C409

C409

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C426

C426

0.1U_0402_16V4Z

0.1U_0402_16V4Z

20mils

1

C606

C606

2

2.2U_0805_10V6K

2.2U_0805_10V6K

1

C413

C413

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C425

C425

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C408

C408

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet of

Date: Sheet of

1

1

2

1

C388

C388

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1

1

C389

C389

C400

C400

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

2

1

2

1

2

1

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C403

C403

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C406

C406

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRII-SODIMM0

DDRII-SODIMM0

DDRII-SODIMM0

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

0.2

0.2

0.2

of

12 44Monday, April 16, 2007

12 44Monday, April 16, 2007

12 44Monday, April 16, 2007

A

+1.8V

JP29

JP29

+DIMM_VREF

DDRB_SDQ0
DDRB_SDQ1

1 1

2 2

3 3

4 4

DDRB_SDQS0#7
DDRB_SDQS07

DDRB_SDQS1#7
DDRB_SDQS17

DDRB_SDQS2#7
DDRB_SDQS27

DDRB_CKE06

DDRB_SBS2#7

DDRB_SBS0#7
DDRB_SWE#7

DDRB_SCAS#7
DDRB_SCS#16

DDRB_ODT16

DDRB_SDQS4#7
DDRB_SDQS47

DDRB_SDQS6#7
DDRB_SDQS67

D_CK_SDATA12,14
D_CK_SCLK12,14

DDRB_SDQS0#
DDRB_SDQS0

DDRB_SDQ2
DDRB_SDQ3

DDRB_SDQ8
DDRB_SDQ9

DDRB_SDQS1#
DDRB_SDQS1

DDRB_SDQ10
DDRB_SDQ11

DDRB_SDQ17
DDRB_SDQ20

DDRB_SDQS2#
DDRB_SDQS2

DDRB_SDQ18
DDRB_SDQ19

DDRB_SDQ28
DDRB_SDQ25

DDRB_SDM3

DDRB_SDQ30
DDRB_SDQ31

DDRB_CKE0

DDRB_SBS2#

DDRB_SMA12
DDRB_SMA9
DDRB_SMA8

DDRB_SMA5
DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0#
DDRB_SWE#

DDRB_SCAS#
DDRB_SCS#1

DDRB_ODT1

DDRB_SDQ32
DDRB_SDQ33

DDRB_SDQS4#
DDRB_SDQS4

DDRB_SDQ34
DDRB_SDQ35

DDRB_SDQ40
DDRB_SDQ41

DDRB_SDM5

DDRB_SDQ42
DDRB_SDQ43

DDRB_SDQ48
DDRB_SDQ49

DDRB_SDQS6#
DDRB_SDQS6

DDRB_SDQ51
DDRB_SDQ50

DDRB_SDQ56
DDRB_SDQ61

DDRB_SDM7

DDRB_SDQ59
DDRB_SDQ58

D_CK_SDATA
D_CK_SCLK

+3VS

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

201

GND

FOX_AS0A426-MARG-7F

FOX_AS0A426-MARG-7F

CONN@

CONN@

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0
CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

RAS#

VDD

ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1
CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

GND

NC

A11

BA1

S0#

NC

SA1

DIMM1 REV H:9.2mm (BOT)

A

B

+1.8V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92

A7

94

A6

96
98

A4

100

A2

102

A0

104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202

DDRB_SDQ5
DDRB_SDQ4

DDRB_SDM0

DDRB_SDQ6
DDRB_SDQ7

DDRB_SDQ12
DDRB_SDQ13

DDRB_SDM1

DDRB_SDQ14
DDRB_SDQ15

DDRB_SDQ21
DDRB_SDQ16

R356

R356

DDRB_SDM2

DDRB_SDQ22
DDRB_SDQ23

DDRB_SDQ26
DDRB_SDQ24

DDRB_SDQS3#
DDRB_SDQS3

DDRB_SDQ29
DDRB_SDQ27

DDRB_CKE1

DDRB_SMA11
DDRB_SMA7
DDRB_SMA6

DDRB_SMA4
DDRB_SMA2
DDRB_SMA0

DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS#0

DDRB_ODT0
DDRB_SMA13

DDRB_SDQ36
DDRB_SDQ37

DDRB_SDM4

DDRB_SDQ39
DDRB_SDQ38

DDRB_SDQ44
DDRB_SDQ45

DDRB_SDQS5#
DDRB_SDQS5

DDRB_SDQ46
DDRB_SDQ47

DDRB_SDQ52
DDRB_SDQ53

DDRB_SDM6

DDRB_SDQ54
DDRB_SDQ55

DDRB_SDQ60
DDRB_SDQ57

DDRB_SDQS7#
DDRB_SDQS7

DDRB_SDQ62
DDRB_SDQ63

1 2

R348 10K_0402_5%

R348 10K_0402_5%

1 2

R349 10K_0402_5%

R349 10K_0402_5%

B

DDRB_CLK1 6
DDRB_CLK1# 6

0_0402_5%

0_0402_5%

1 2

DDRB_CKE1 6

DDRB_SBS1# 7
DDRB_SRAS# 7
DDRB_SCS#0 6

DDRB_ODT0 6

DDRB_CLK0 6
DDRB_CLK0# 6

DDRB_SDQS3# 7
DDRB_SDQS3 7

DDRB_SDQS5# 7
DDRB_SDQS5 7

DDRB_SDQS7# 7
DDRB_SDQS7 7

+3VS

PM_EXTTS#0 6,12

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C373

C373

2.2U_0805_10V6K

2.2U_0805_10V6K

DDRB_SMA[0..13]7

DDRB_SDQ[0..63]7

DDRB_SDM[0..7]7

C

1

2

DDRB_CKE0
DDRB_SBS2#

DDRB_SMA12
DDRB_SMA9

DDRB_SMA8
DDRB_SMA5

DDRB_SMA3
DDRB_SMA1

DDRB_SMA10
DDRB_SBS0#

DDRB_SWE#
DDRB_SCAS#

DDRB_SCS#1
DDRB_ODT1

DDRB_SMA11
DDRB_CKE1

DDRB_SMA6
DDRB_SMA7

DDRB_SMA2
DDRB_SMA4

DDRB_SBS1#
DDRB_SMA0

DDRB_SCS#0
DDRB_SRAS#

DDRB_SMA13
DDRB_ODT0

C

1

C386

C386

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C519

C519

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

For EMI

DDRB_SMA[0..13]

DDRB_SDQ[0..63]

DDRB_SDM[0..7]

+0.9VS

1 4
2 3

RP32 56_0404_4P2R_5%

RP32 56_0404_4P2R_5%

1 4
2 3

RP33 56_0404_4P2R_5%

RP33 56_0404_4P2R_5%

RP34 56_0404_4P2R_5%

RP34 56_0404_4P2R_5%

RP35 56_0404_4P2R_5%

RP35 56_0404_4P2R_5%

RP36 56_0404_4P2R_5%

RP36 56_0404_4P2R_5%

RP37 56_0404_4P2R_5%

RP37 56_0404_4P2R_5%

RP38 56_0404_4P2R_5%

RP38 56_0404_4P2R_5%

RP39 56_0404_4P2R_5%

RP39 56_0404_4P2R_5%

RP40 56_0404_4P2R_5%

RP40 56_0404_4P2R_5%

RP41 56_0404_4P2R_5%

RP41 56_0404_4P2R_5%

RP42 56_0404_4P2R_5%

RP42 56_0404_4P2R_5%

RP43 56_0404_4P2R_5%

RP43 56_0404_4P2R_5%

RP44 56_0404_4P2R_5%

RP44 56_0404_4P2R_5%

2007/1/15 2007/12/25

2007/1/15 2007/12/25

2007/1/15 2007/12/25

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0.1U_0402_16V4Z

0.1U_0402_16V4Z

D

+1.8V+DIMM_VREF

1

+

+

2

+1.8V

1

C615

C615

C616

C616

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+1.05VS

+1.8V

1

C372

C372

2.2U_0805_10V6K

2.2U_0805_10V6K

2

+1.8V

1

C384

C384

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

1

C382

C382

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+0.9VS

1

C397

C397

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+0.9VS

1

C381

C381

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

D

C556

C556

150U_D2_6.3VM

150U_D2_6.3VM

@

@

1

2

1

C369

C369

2

2.2U_0805_10V6K

2.2U_0805_10V6K

1

C398

C398

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C391

C391

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C396

C396

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C395

C395

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

+

+

C617

C617

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C370

C370

2.2U_0805_10V6K

2.2U_0805_10V6K

C375

C375

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C392

C392

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C383

C383

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C380

C380

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C420

C420

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.8V

1

1

C618

C618

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

+5VALW +1.5VS

1

1

C371

C371

2

2

2.2U_0805_10V6K

2.2U_0805_10V6K

1

1

C399

C399

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

1

1

C378

C378

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

1

1

C379

C379

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

1

1

C429

C429

C385

C385

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+1.8V +1.8V

1

C620

C620

C619

C619

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C419

C419

C421

C421

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C393

C393

2

1

C394

C394

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

C374

C374

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

1

2

DDRII-SODIMM1

DDRII-SODIMM1

DDRII-SODIMM1

1

C622

C622

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C428

C428

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

E

C621

C621

13 44Monday, April 16, 2007

13 44Monday, April 16, 2007

13 44Monday, April 16, 2007

1

2

0.2

0.2

0.2

A

FSLC FSLB FSLA CPU

CLKSEL2 CLKSEL1 CLKSEL0

0

0

0 1

1 1

**SEL_PCI5/REF1

**SEL_PCI6/PCICLK1

**SEL_24M/PCICLK2

**SEL_48M/PCICLK3

MHz

133 100 33.3

1

1

Table : ICS9LPR325

0 1

CLKREQ3# 33.3MHz PCICLK5

CLKREQ5# 33.3MHz PCICLK6

TESTMODE 24MHz Output

CLKREQ7# 48MHz_1 Output

ITP_EN/PCICLK_F0 SRC pair CPU_ITP pair

**SEL_24M/PCICLK2=0=TESTMODE
**SEL_PCI6/PCICLK1=0=CLKREQ5#

+3VS

**SEL_PCI5=1=PCICLK5

1 2

R583 10K_0402_5% R583 10K_0402_5%

1 2

R586 10K_0402_5%

R586 10K_0402_5%

ITP_EN/PCICLK_F0=0=SRC pair

2 2

3 3

4 4

1 2

R592 10K_0402_5%

R592 10K_0402_5%

ICH_SMBDATA20,24,26,27

ICH_SMBCLK20,24,26,27

CLK_PCI4

2N7002_SOT23

2N7002_SOT23

R645

R645

8.2K_0402_5%

8.2K_0402_5%

1 2

1 2

R655

R655
1K_0402_5%@

1K_0402_5%@

A

CLK_REF

CLK_PCI0

+3VS

1 2

R617 10K_0402_5% R617 10K_0402_5 %

+3VS

2

G

G

1 3

D

D

+3VS

2

G

G

1 3

D

D

Q50

Q50

R642

R642

56_0402_5%@

56_0402_5%@

R646

R646
1K_0402_5%

1K_0402_5%

1 2

1 2

1 2

R651

R651
0_0402_5%

0_0402_5%

R629

R629

4.7K_0402_5%

4.7K_0402_5%

Q48

Q48

1 2

S

S

R638

R638

4.7K_0402_5%

4.7K_0402_5%

1 2

S

S

2N7002_SOT23

2N7002_SOT23

SRC
MHz

CLK_48M_SD23

CLK_ICH_48M20

CLK_PCI_card23

CLK_PCI_LPC28

CLK_ICH_14M20

CLK_DREF_96M6

CLK_DREF_96M#6

CLK_PCI_ICH18

CLK_ENABLE#42

CLK_ENABLE#_R

D_CK_SDATA

D_CK_SCLK

MCH_CLKSEL0 6

B

PCI
MHz

1

C777

C777

10U_0805_10V4Z

10U_0805_10V4Z

2

33.3100166

C790

C790

33P_0402_50V8J

33P_0402_50V8J

1 2

C791

C791

33P_0402_50V8J

33P_0402_50V8J

1 2

CLK_14M_Dbg26

CLK_PCI_Dbg26

CLK_ENABLE# CLK_ENABLE#_R

+3VS

CLK_ENABLE#_R

+3VS

CPU_BSEL0 5

B

12

Y1

Y1

14.31818MHz_20P_1BX14318BE1A

14.31818MHz_20P_1BX14318BE1A

CLK_48M_SD
CLK_ICH_48M CLKSEL0

CLK_PCI_card

CLK_PCI_LPC

CLK_ICH_14M CLK_REF

CLK_DREF_96M

CLK_DREF_96M#

CLK_PCI_ICH

R693 12_0402_5%R693 12_0402_5%

1 2

R694 12_0402_5%R694 12_0402_5%

1 2

R687 33_0402_5%Dbg@R687 33_0402_5%Dbg@

1 2

R688 33_0402_5%Dbg@R688 33_0402_5%Dbg@

1 2

R594 33_0402_5%

R594 33_0402_5%

1 2

R596 33_0402_5%

R596 33_0402_5%

1 2

R598 33_0402_5%

R598 33_0402_5%

1 2

R599 0_0402_5%GM@R599 0_0402_5%GM@

1 2

R601 0_0402_5%GM@R601 0_0402_5%GM@

1 2

R605 33_0402_5%

R605 33_0402_5%

1 2

R743 0_0402_5%

R743 0_0402_5%

1 2

@

@

R612 0_0402_5%

R612 0_0402_5%

1 2

D_CK_SCLK12,13

D_CK_SDATA12,13

2

G

G

1 3

D

S

D

S

Q49

Q49

2N7002_SOT23

2N7002_SOT23

CLKSEL1CLKSEL0 CLKSEL2

1 2

R650

R650
0_0402_5%@

0_0402_5%@

C

1

C778

C778

0.047U_0402_16V7K

0.047U_0402_16V7K

2

+CLK_VDD2

+CLK_VDD1

1 2

R578 1_0603_5% R578 1_0603_5%

1 2

R580 2.2_0603_5% R580 2.2_0603_5%

D_CK_SCLK

D_CK_SDATA

VGATE 6,20,42

+1.05VS+1.05VS +1.05VS

R643

R643

1K_0402_5%@

1K_0402_5%@

R647

R647
1K_0402_5%

1K_0402_5%

1 2

1 2

1 2

R652

R652
0_0402_5%

0_0402_5%

C

1

2

+CLK_VDD1

+CLK_VDDREF

+CLK_VDD48

CLK_XTALIN

CLK_XTALOUT

CLKSEL1

CLKSEL2

CLK_PCI4

CLK_PCI2

CLK_PCI1

CLK_DOT

CLK_DOT#

CLK_PCI0

CLKIREF

15mil

+CLK_VDDREF+CLK_VDD48

C779

C779

0.047U_0402_16V7K

0.047U_0402_16V7K

15mil

15mil

MCH_CLKSEL1 6

CPU_BSEL1 5

D

+3VS

U1

U1

1

VDDSRC

49

VDDSRC

54

VDDSRC

65

VDDSRC

30

VDDPCI

36

VDDPCI

12

VDDCPU

18

VDDREF

40

VDD48

20

X1

19

X2

41

USB_48MHz/FSLA

45

FSLB/TEST_MODE/24Mhz

23

REF0/FSLC/TEST_SEL

34

PCICLK4/FCTSEL1

33

SEL_48M/PCICLK3

32

SEL_24M/PCICLK2

27

SEL_PCI6/PCICLK1

22

SEL_PCI5/REF1

43

DOTT_96MHz/27MHz_Nonspread

44

DOTC_96MHz/27MHz_spread

37

ITP_EN/PCICLK_F0

39

VTT_PWRGD#/PD

9

GND

16

SMBCLK

17

SMBDAT

4

GNDSRC

15

GNDCPU

21

GNDREF

31

GNDPCI

35

GNDPCI

42

GND48

68

GNDSRC

73

THRM_PAD

74

THRM_PAD

75

THRM_PAD

76

THRM_PAD

ICS9LPR325AKLFT_MLF72

ICS9LPR325AKLFT_MLF72

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

R574

R574
0_0805_5%

0_0805_5%

1 2

PCI_SRC_STOP#

CPUCLKT2_ITP/SRCCLKT10LP

CPUCLKC2_ITP/SRCCLKC10LP

CLKREQ7#/48Mhz_1

CLKREQ5#/PCICLK6

CLKREQ3#/PCICLK5

LCD100/96/SRC0_TLP

LCD100/96/SRC0_CLP

R648

R648

8.2K_0402_5%

8.2K_0402_5%

1 2

1 2

R653

R653
0_0402_5%@

0_0402_5%@

Issued Date

Issued Date

Issued Date

E

1

C780

C780
10U_0805_10V4Z

10U_0805_10V4Z

2

VDDA

GNDA

CPU_STOP#

CPUCLKT1LP

CPUCLKC1LP

CPUCLKT0LP

CPUCLKC0LP

SRCCLKT9LP

SRCCLKC9LP

CLKREQ9#

SRCCLKT8LP

SRCCLKC8LP

CLKREQ8#

SRCCLKT7LP

SRCCLKC7LP

SRCCLKT6LP

SRCCLKC6LP

CLKREQ6#

SRCCLKT5LP

SRCCLKC5LP

SRCCLKT4LP

SRCCLKC4LP

CLKREQ4#

SRCCLKT3LP

SRCCLKC3LP

SRCCLKT2LP

SRCCLKC2LP

CLKREQ2#

SRCCLKT1LP

SRCCLKC1LP

CLKREQ1#

1 2

R644

R644

1K_0402_5%@

1K_0402_5%@

R649

R649
1K_0402_5%

1K_0402_5%

1 2

1 2

R654

R654
0_0402_5%

0_0402_5%

1

C781

C781

0.047U_0402_16V7K

0.047U_0402_16V7K

2

20mil

1

C785

PM_STP_PCI#

PM_STP_CPU#

CLK_CPU1

CLK_CPU1#

CLK_CPU0

CLK_CPU0#

CLK_SRC9

CLK_SRC9#

CLK_SRC6

CLK_SRC6#

CLK_SRC5

CLK_SRC5#

CLK_SRC4

CLK_SRC4#

CLK_SRC3

CLK_SRC3#

CLK_PCI5

CLK_SRC2

CLK_SRC2#

CLK_SRC1

CLK_SRC1#

CLK_SRC0

CLK_SRC0#

E

C785
10U_0805_10V4Z

10U_0805_10V4Z

2

R577 0_0402_5%

R577 0_0402_5%

R579 0_0402_5% R579 0_0402_5%

R581 0_0402_5%

R581 0_0402_5%

R582 0_0402_5%

R582 0_0402_5%

R588 0_0402_5%R588 0_0402_5%

R590 0_0402_5%R590 0_0402_5%

R593 10K_0402_ 5%

R593 10K_0402_ 5%

R602 0_0402_5%

R602 0_0402_5%

R604 0_0402_5%

R604 0_0402_5%

R607 10K_0402_ 5%

R607 10K_0402_ 5%
R609 0_0402_5% R609 0_040 2_5%

R611 0_0402_5% R611 0_040 2_5%

R614 10K_0402_ 5%

R614 10K_0402_ 5%

R616 0_0402_5%R616 0_0402_5%

R619 0_0402_5%R619 0_0402_5%

R621 10K_0402_5%@R621 10K_0402_5%@

R623 0_0402_5%PM@R623 0_0402_5%PM@

R625 0_0402_5%PM@R625 0_0402_5%PM@

R627 10K_0402_5%@R627 10K_0402_5%@

R630 0_0402_5% R630 0_040 2_5%

R632 0_0402_5%R632 0_0402_5%

R634 10K_0402_ 5%

R634 10K_0402_ 5%
R636 0_0402_5%R636 0_0402_5%

R637 0_0402_5%R637 0_0402_5%

R639 10K_0402_ 5%

R639 10K_0402_ 5%
R640 0_0402_5%GM@R640 0_0402_5%GM@

R641 0_0402_5%GM@R641 0_0402_5%GM@

MCH_CLKSEL2 6

CPU_BSEL2 5

Compal Secret Data

Compal Secret Data

Compal Secret Data

7

8

25

24

11

10

14

13

6

5

3

2

72

70

69

71

66

67

38

63

64

62

60

61

29

58

59

57

55

56

28

52

53

26

50

51

46

47

48

2007/1/15 2007/10/4

2007/1/15 2007/10/4

2007/1/15 2007/10/4

+CLK_VCCA

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2
1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2
1 2

1 2

1 2
1 2

1 2

Deciphered Date

Deciphered Date

Deciphered Date

1

C782

C782

0.047U_0402_16V7K

0.047U_0402_16V7K

2

1

2

F

1 2

R575

R575

2.2_0603_5%

2.2_0603_5%

C786

C786

0.047U_0402_16V7K

0.047U_0402_16V7K

PM_STP_PCI# 20

PM_STP_CPU# 20

CLK_MCH_BCLK

CLK_MCH_BCLK#

CLK_CPU_BCLK

CLK_CPU_BCLK#

CLK_PCIE_CARD

CLK_PCIE_CARD#

CLK_PCIE_SATA

CLK_PCIE_SATA#

CLK_PCIE_ICH

CLK_PCIE_ICH#

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLK_PCIE_VGA

CLK_PCIE_VGA#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLK_PCIE_MINI1

CLK_PCIE_MINI1#

CLK_DREF_SSC

CLK_DREF_SSC#

F

40mil

1

C783

C783

0.047U_0402_16V7K

0.047U_0402_16V7K

2

+CLK_VDD1

+CLK_VDD1

1

2

C787

C787

0.047U_0402_16V7K

0.047U_0402_16V7K

CLK_MCH_BCLK 6

CLK_MCH_BCLK# 6

CLK_CPU_BCLK 4

CLK_CPU_BCLK# 4

CLK_PCIE_CARD 27

CLK_PCIE_CARD# 27

EXP_CLKREQ# 27

+3VS

CLK_PCIE_SATA 19

CLK_PCIE_SATA# 19

SATA_CLKREQ# 20

+3VS

CLK_PCIE_ICH 2 0

CLK_PCIE_ICH# 20

+3VS

CLK_PCIE_LAN 24

CLK_PCIE_LAN# 24

+3VS

CLK_PCIE_VGA 15

CLK_PCIE_VGA# 15

+3VS

CLK_MCH_3GPLL 6

CLK_MCH_3GPLL# 6

MCH_CLKREQ# 6

+3VS

CLK_PCIE_MINI1 26

CLK_PCIE_MINI1# 26

MINI1_CLKREQ# 26

+3VS

CLK_DREF_SSC 6

CLK_DREF_SSC# 6

G

Clock Generator

C784

C784

0.047U_0402_16V7K

0.047U_0402_16V7K

+CLK_VDD2

40mil

1

0.047U_0402_16V7K

0.047U_0402_16V7K

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

C788

C788

10U_0805_10V4Z

10U_0805_10V4Z

2

CLK_MCH_BCLK

CLK_MCH_BCLK#

CLK_CPU_BCLK

CLK_CPU_BCLK#

CLK_PCIE_VGA

CLK_PCIE_VGA#

CLK_PCIE_ICH

CLK_PCIE_ICH#

CLK_PCIE_MINI1

CLK_PCIE_MINI1#

CLK_PCIE_SATA

CLK_PCIE_SATA#

CLK_DREF_SSC

CLK_DREF_SSC#

CLK_DREF_96M

CLK_DREF_96M#

CLK_PCIE_CARD

CLK_PCIE_CARD#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLK_PCIE_LAN

CLK_PCIE_LAN#

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Clock Generator

Clock Generator

Clock Generator

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

JDW50/JDYL70 M/B LA-3771P

G

C789

C789

R585 49.9_0402_1%@R585 49.9_0402_1%@

R587 49.9_0402_1%@R587 49.9_0402_1%@

R589 49.9_0402_1%@R589 49.9_0402_1%@

R591 49.9_0402_1%@R591 49.9_0402_1%@

R595 49.9_0402_1%@R595 49.9_0402_1%@

R597 49.9_0402_1%@R597 49.9_0402_1%@

R600 49.9_0402_1%@R600 49.9_0402_1%@

R603 49.9_0402_1%@R603 49.9_0402_1%@

R606 49.9_0402_1%@R606 49.9_0402_1%@

R608 49.9_0402_1%@R608 49.9_0402_1%@

R610 49.9_0402_1%@R610 49.9_0402_1%@

R613 49.9_0402_1%@R613 49.9_0402_1%@

R615 49.9_0402_1%@R615 49.9_0402_1%@

R618 49.9_0402_1%@R618 49.9_0402_1%@

R620 49.9_0402_1%@R620 49.9_0402_1%@

R622 49.9_0402_1%@R622 49.9_0402_1%@

R624 49.9_0402_1%@R624 49.9_0402_1%@

R626 49.9_0402_1%@R626 49.9_0402_1%@

R628 49.9_0402_1%@R628 49.9_0402_1%@

R631 49.9_0402_1%@R631 49.9_0402_1%@

R633 49.9_0402_1%@R633 49.9_0402_1%@

R635 49.9_0402_1%@R635 49.9_0402_1%@

R576

R576
0_0805_5%

0_0805_5%

1 2

1

2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

H

+3VS

0.2

0.2

14 44Monday, April 16, 2007

14 44Monday, April 16, 2007

14 44Monday, April 16, 2007

H

0.2