Acer Aspire 5235, Aspire 5535, Aspire 5735 Schematics

5

hexainf@hotmail.com

4

3

2

1

Project code: 91.4K801.001

Cathedral Peak II Block Diagram

CLK GEN.

D D

ICS 9LPRS365BKLFT (71.09365.A03) RTM 875N-606-LFT (71.00875.C03)

DDR2 DIMM1

667/800 MHz

DDR2 DIMM2

667/800 MHz

C C

INT.MIC

16

MIC In

29

B B

INT.SPKR

29

Line Out (NO SPDIF)

RJ11

A A

12

13

MDC Card

5

3

Codec

ALC268

28

OP AMP

APA2057

MODEM

667/800MHz

AZALIA

29

23

HDD SATA

ODD SATA

Mobile CPU

Penryn 479

4, 5

HOST BUS 667/800/1067MHz@1.05V

Cantiga

AGTL+ CPU I/F DDR Memory I/F

INTEGRATED GRAHPICS

X4 DMI 400MHz

LVDS, CRT I/F

6,7,8,9,10,11

C-Link0

ICH9M

6 PCIe ports

PCI/PCI BRIDGE

ACPI 2.0 4 SATA

12 USB 2.0/1.1 ports

ETHERNET (10/100/1000MbE)

High Definition Audio

LPC I/F

Serial Peripheral I/F

Matrix Storage Technology(DO)

Active Managemnet Technology(DO)

17,18,19,20

USB

Blue Tooth

23

SATA

(USB)

SATA

4

USB 3 Port

23

22

USB

THERMAL EMC2102

21

PCIex1

LAN

Giga LAN

88E8071

New card

PCIex1

LPC BUS

KBC

ENE3310

14

Touch Pad

30 30

CardReader Realtek RTS5158E

3

Camera (USB)

CRT

15

LCD

14

TXFM RJ45

25

27 27

30

INT. KB

24

26 26

PWR SW TPS2231

Mini Card

a/b/g/n

Kedron

BIOS

Winbond W25X16 16M Bits

31

Launch Buttom

16

MS/MS Pro/xD /MMC/SD

5 in 1

27

LPC

DEBUG CONN.

24

Launch Board LED Board

PCB P/N : 48.4K801.0SC REVISION : 08219-SC

PCB STACKUP

TOP

VCC

S

GND

BOTTOM

INPUTS

DCBATOUT

31

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev A3

A3

16

Date: Sheet of

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

SYSTEM DC/DC

TPS51124

INPUTS OUTPUTS

DCBATOUT

RT9026

1D8V_S3

RT9018A

1D8V_S3 1D5V_S0

CFXCORE DC/DC

ISL6263 INPUTS

DCBATOUT

CPU DC/DC

ISL6266A

CHARGER

BQ24745

DCBATOUT

143Wednesday, July 16, 2008

1

OUTPUTS

5V_S5 3D3V_S5

1D05V_S0 1D8V_S3

DDR_VREF_S0

DDR_VREF_S3

OUTPUTS

VGFXCORE

0.7~1.25V

OUTPUTS VCC_CORE_S0

0.35~1.5V

OUTPUTSINPUTS BT+

DCBATOUT

of

35

37

36

38

34

39

SC

ICH9M Functional Strap Definitions

4 4

3 3

Signal

HDA_SDOUT

HDA_SYNC

GNT2#/ GPIO53

GPIO20 GNT1#/

GPIO51

GNT3#/ GPIO55

GNT0#: SPI_CS1#/ GPIO58

SPI_MOSI

GPIO49

SATALED#

SPKR

TP3

GPIO33/ HDA_DOCK _EN#

Usage/When Sampled

XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK

PCIE config1 bit0, Rising Edge of PWROK.

PCIE config2 bit2, Rising Edge of PWROK.

Reserved ESI Strap (Server Only)

Rising Edge of PWROK

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.

Integrated TPM Enable, Rising Edge of CLPWROK

DMI Termination Voltage, Rising Edge of PWROK.

PCI Express Lane Reversal. Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap Rising Edge of PWROK

ICH9 EDS 642879 Rev.1.5

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high.

ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

The signal is required to be low for desktop applications and required to be high for mobile applications.

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister.

Comment

2 2

A

USB Table

USB

Device

PCIE Routing

LAN MARVELL 88E8071

LANE1 LANE2

MiniCard WLAN

LANE3

NC

LANE4

NC

LANE5

NewCard

LANE6

1 1

NC

Pair

0 1 2 3 4 5 6 7 8 9 NEW1 10 11 NC

USB1 NC USB2 NC USB3 Bluetooth NC MINIC1 WEBCAM

Card Reader

A

B

ICH9M Integrated Pull-up

page 92

and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO[20] GPIO[49] LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

C

Cantiga chipset and ICH9M I/O controller Hub strapping configuration

ICH9 EDS 642879 Rev.1.5

PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K

The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller

PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K

D

E

Montevina Platform Design guide 22339 0.5

Pin Name

CFG[2:0]

CFG[4:3] CFG8 CFG[15:14] CFG[18:17]

CFG5 CFG6

CFG7

CFG9

CFG10 PCIE Loopback enable

CFG[13:12]

CFG16

CFG19

SDVO_CTRLDATA

L_DDC_DATA

NOTE:

1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

CFG20

Strap Description

FSB Frequency Select

Reserved

DMI x2 Select iTPM Host

Interface

Intel Management engine Crypto strap

PCIE Graphics Lane

XOR/ALL

FSB Dynamic ODT

DMI Lane Reversal

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

SDVO Present

Local Flat Panel (LFP) Present

Configuration

000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0 = DMI x2

(Default)

1 = DMI x4

0= The iTPM Host Interface is enabled(Note2)

1=The iTPM Host Interface is disalbed(default)

0 = Transport Layer Security (TLS) cipher suite with no confidentiality

1 = TLS cipher suite with confidentiality (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane Numbered in order

0 = Enable (Note 3)

1= Disabled (default)

00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled 0 = Normal operation(Default):

Lane Numbered in Order

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1)

0 = Only Digital Display Port or PCIE is operational (Default)

1 =Digital display Port and PCIe are operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabled

page 218

(Default)

SMBus

EMC2102

KBC

ICH9M

B

BAT_SCL

SMBC_ICH

Thermal

BATTERY

9LPRS365BKLFT

DDR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

C

D

Date: Sheet

Reference

Cathedral Peak II

Taipei Hsien 221, Taiwan, R.O.C.

243Wednesday, July 16, 2008

E

SC

of

3D3V_S0

hexainf@hotmail.com

R146

1 2

0R0603-PAD

A

12

C183

C190

SC1U16V3ZY-GP

SC4D7U6D3V3KX-GP

DY

12

EC58

C463

SCD1U16V2ZY-2GP

DY

B

-1

12

C459

C235

SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

12

C465

C231

SCD1U16V2ZY-2GP

DY

12

C462

DY

R197

1 2

0R0603-PAD

SCD1U16V2ZY-2GP

3D3V_S0

DY

C

12

C246

SCD1U16V2ZY-2GP

12

C195

SC4D7U10V5ZY-3GP

DY

D

12

C214

12

C453

SCD1U16V2ZY-2GP

C453

SCD1U16V2ZY-2GP

3D3V_CLKGEN_S03D3V_48MPWR_S0 3D3V_CLKPLL_S0

12

C198

SCD1U16V2ZY-2GP

12

C234

E

R157

1 2

0R0603-PAD

SCD1U16V2ZY-2GP

3D3V_S0

DY

12

C184

SCD1U16V2ZY-2GP

4 4

PCLK_ICH

3 3

CPU_SEL24,7

PCLK_KBC

12

EC56

EC56 SC5P50V2CN-2GP

SC5P50V2CN-2GP

DY

2 2

ICS9LPRS365BKLFT setting table

DY

PIN NAME DESCRIPTION

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME PCI3

1 1

PCI4/27M_SEL PCI_F5/ITP_EN

SRCT3/CR#_C

12

EC57

EC57 SC5P50V2CN-2GP

SC5P50V2CN-2GP

DY

CL=20pF±0.2pF

SB

C177

SC33P50V2JN-3GP

GEN_XTAL_IN

1 2

12

GEN_XTAL_OUT_R

1 2

C176

SC33P50V2JN-3GP

3D3V_S0

678

RN59

SRN10KJ-6-GP

123

4 5

PCLKCLK2

CPU_SEL2_R

PCLKCLK4 PCLKCLK5

SB,-1

PCLK_FWH

12

Byte 5, bit 7 0 = PCI0 enabled (default) 1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair

Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed

3.3V PCI clock output

0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96# 1 = Pin24 as 27MHz, Pin25 as 27MHz_SS, Pin20 as SRC-0, Pin21 as SRC-0#

0 =SRC8/SRC8# 1 = ITP/ITP#

Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair

A

X3

X3 X-14D31818M-44GP

X-14D31818M-44GP

82.30005.951

EC59

EC59 SC22P50V2JN-4GP

SC22P50V2JN-4GP

R154 10MR2J-L-GP

12

DY

12

R153 0R0402-PADR153 0R0402-PAD

CLK48_5158E24 CLK48_ICH18

CPU_SEL04,7

3D3V_S0

DY

R155 10KR2J-3-GP

CLK_MCH_OE#7

TP158TPAD30 TP158TPAD30

PCLK_KBC30

PCLK_ICH18

CPU_SEL14,7

CLK_ICH1418 PCLK_FWH31

GEN_XTAL_OUT

R156 2K2R2J-2-GPR156 2K2R2J-2-GP

12

RN17

B

12

RN51

1 2 3

PM_STPPCI#18

PM_STPCPU#18

SMBC_ICH12,13,20 SMBD_ICH12,13,20

CLK_PWRGD18

R150

1 2 3

SRN33J-5-GP-U

1 2 3

RN70

SRN33J-5-GP-U

EC137

EC137 SC5P50V2CN-2GP

SC5P50V2CN-2GP

DY

SRN33J-5-GP-U

4

12

1 2

DY

475R2F-L1-GP

4

PCLKCLK3

3D3V_48MPWR_S0

U19

3

X1

2

X2

CLK48

17

USB_48MHZ/FSLA

45

PCI_STOP#

44

CPU_STOP#

7

SCLK

6

SDATA

63

CK_PWRGD/PD#

PCLKCLK0

8

CPU_SEL2_R

ICS9LPRS365BKLFT-GP-U

71.09365.A03

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/27_SELECT

14

PCI_F5/ITP_EN

64

FSLB/TEST_MODE

5

REF0/FSLC/TEST_SEL

55

NC#55

PCLKCLK1 PCLKCLK2 PCLKCLK3

PCLKCLK4

PCLKCLK5

PIN NAME DESCRIPTION

SRCC3/CR#_D

SRCC7/CR#_E

SRCT7/CR#_F

SRCC11/CR#_G

SRCT11/CR#_H

3D3V_CLKGEN_S0

61 60

58 57

54 53

51 50

48 47

41 42

40 39

37 38

34 35

31 32

28 29

24 25

20 21

CLK_ICH14

CLK_CPU_BCLK_1 CLK_CPU_BCLK_1#

CLK_MCH_BCLK_1 CLK_MCH_BCLK_1#

CLK_PCIE_LAN_R CLK_PCIE_LAN#_R

CLK_PCIE_NEW_R CLK_PCIE_NEW#_R

CLK_PCIE_ICH_1 CLK_PCIE_ICH_1#

CLK_PCIE_MINI_1 CLK_PCIE_MINI_1#

CLK_MCH_3GPLL_1 CLK_MCH_3GPLL_1#

CLK_PCIE_SATA_1 CLK_PCIE_SATA_1#

DREFSSCLK_1 DREFSSCLK#_1

DREFCLK_1 DREFCLK#_1

D

R160 0R0402-PADR160 0R0402-PAD R166 0R0402-PADR166 0R0402-PAD

R167 0R0402-PADR167 0R0402-PAD R169 0R0402-PADR169 0R0402-PAD

R173 0R0402-PADR173 0R0402-PAD R176 0R0402-PADR176 0R0402-PAD

R182 0R0402-PADR182 0R0402-PAD R181 0R0402-PADR181 0R0402-PAD

R195 0R0402-PADR195 0R0402-PAD R194 0R0402-PADR194 0R0402-PAD

R192 0R0402-PADR192 0R0402-PAD R193 0R0402-PADR193 0R0402-PAD

R180 0R0402-PADR180 0R0402-PAD R184 0R0402-PADR184 0R0402-PAD

R174 0R0402-PADR174 0R0402-PAD R177 0R0402-PADR177 0R0402-PAD

R168 0R0402-PADR168 0R0402-PAD R171 0R0402-PADR171 0R0402-PAD

R158 0R0402-PADR158 0R0402-PAD R161 0R0402-PADR161 0R0402-PAD

3D3V_CLKPLL_S0CLK48_ICH

23

4

9

46

62

16

VDD48

VDDPCI

VDDREF

VDDSRC

VDDCPU

GNDREF

GNDPCI

GND48

1

15

18

Byte 5, bit 1 0 = SRC3 enabled (default) 1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair

Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6

Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8

Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9

Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10

C

VDDPLL3

GND

22

30

GNDSRC

36

19

GNDSRC

49

59

43

27

VDD96_IO

VDDSRC_IO

VDDPLL3_IO

GND

GNDCPU

26

33

52

56

VDDSRC_IO

VDDCPU_IO

CPUT1_F CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT10 SRCC10

SRCT11/CR#_H SRCC11/CR#_G

SRCT3/CR#_C SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

27MHZ_NONSS/SRCT1/SE1

27MHZ_SS/SRCC1/SE2

SRCT0/DOTT_96

SRCC0/DOTC_96

GND

65

2nd:

71.00875.C03 RTM875N-606-LFT QFN 64P

CPUT0 CPUC0

SRCT6 SRCC6

SRCT9 SRCC9

SRCT4 SRCC4

12

EC55

EC55 SC5P50V2CN-2GP

SC5P50V2CN-2GP

DY

1 2 1 2

SEL2 FSC

1 0 01 0 00 0

Title

Size Document Number Rev

Date: Sheet

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6

CLK_PCIE_LAN 25 CLK_PCIE_LAN# 25

CLK_PCIE_NEW 27 CLK_PCIE_NEW# 27

CLK_PCIE_ICH 18 CLK_PCIE_ICH# 18

CLK_PCIE_MINI1 27 CLK_PCIE_MINI1# 27

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7

CLK_PCIE_SATA 17 CLK_PCIE_SATA# 17

DREFSSCLK 7 DREFSSCLK# 7

DREFCLK 7 DREFCLK# 7

SEL1

SEL0

FSB

FSA

01 01

1 01

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Clock Generator

Cathedral Peak II

CPU

100M 133M 166M 200M

343Wednesday, July 16, 2008

E

CPU NB LAN

New Card SB DMI

MINI1 NB CLK

SB SATA

NB CLK NB CLK

(96 MHz)

FSB

X 533M 667M 800M

1066M266M

of

SC

A

B

C

D

E

H_A#[35..3]6

4 4

H_ADSTB#06 H_REQ#[4..0]6

3 3

Side Band Non GTL

H_ADSTB#16

H_A20M#17

H_FERR#17

H_IGNNE#17

H_STPCLK#17

2 2

1 1

H_A#[35..3]

H_INTR17 H_NMI17 H_SMI#17

RSVD_CPU_1

TP52TPAD30 TP52TPAD30

RSVD_CPU_2

TP49TPAD30 TP49TPAD30

RSVD_CPU_3

TP48TPAD30 TP48TPAD30

RSVD_CPU_4

TP47TPAD30 TP47TPAD30

RSVD_CPU_5

TP89TPAD30 TP89TPAD30

RSVD_CPU_6

TP92TPAD30 TP92TPAD30

RSVD_CPU_7

TP87TPAD30 TP87TPAD30

RSVD_CPU_8

TP90TPAD30 TP90TPAD30

RSVD_CPU_9

TP88TPAD30 TP88TPAD30

RSVD_CPU_10

TP72TPAD30 TP72TPAD30

RSVD_CPU_11

TP93TPAD30 TP93TPAD30

XDP_TMS

R102 54D9R2F-L1-GPR102 54D9R2F-L1-GP

XDP_TDI

R101 54D9R2F-L1-GPR101 54D9R2F-L1-GP

XDP_BPM#5

R97 54D9R2F-L1-GPR97 54D9R2F-L1-GP

H_CPURST#

R116 51R2F-2-GP

XDP_TCK

R94 54D9R2F-L1-GPR94 54D9R2F-L1-GP

XDP_TRST#

R96 54D9R2F-L1-GPR96 54D9R2F-L1-GP

All place within 2" to CPU

A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

1 2 1 2 1 2

1 2

1 2 1 2

J4 L5 L4

K5 M3 N2

J1 N3

P5

P2

L2

P4

P1 R1 M1

K3 H2

K2

J3

L1

Y2 U5 R3 W6 U4

Y5 U1 R4

T5

T3 W2 W5

Y4 U2

V4 W3

AA4 AB2 AA3

V1

A6

A5 C4

D5 C6

B4

A3 M4

N5

T2

V3

B2 C3 D2

D22

D3

F6

B1

DY

1 OF 4

U33A

A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0#

REQ0# REQ1# REQ2# REQ3# REQ4#

A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6

KEY_NC

BGA479-SKT6-GPU7

62.10079.001

1D05V_S0

ADS# BNR#

ADDR GROUP 0

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM0#

ADDR GROUP 1

BPM1# BPM2# BPM3# PRDY# PREQ#

TCK

TDI TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL THERMAL

THERMAL

PROCHOT#

THRMDA THRMDC

ICH

THERMTRIP#

HCLK

BCLK0 BCLK1

RESERVED

2nd: 62.10053.401

H1 E2 G5

H5 F21 E1

F1 D20

B3 H4 C1

F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

H_RS#0 H_RS#1 H_RS#2

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#

PM_THRMTRIP# should connect to ICH9 and MCH without T-ing

( No stub)

B

TP57 TPAD30TP57 TPAD30

H_ADS# 6 H_BNR# 6 H_BPRI# 6

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6

H_BREQ#0 6

H_IERR#

H_INIT# 17 H_LOCK# 6

H_CPURST# 6,41

H_TRDY# 6 H_HIT# 6

H_HITM# 6

TP27 TPAD30TP27 TPAD30 TP25 TPAD30TP25 TPAD30 TP28 TPAD30TP28 TPAD30 TP41 TPAD30TP41 TPAD30 TP30 TPAD30TP30 TPAD30 TP37 TPAD30TP37 TPAD30 TP29 TPAD30TP29 TPAD30 TP39 TPAD30TP39 TPAD30 TP40 TPAD30TP40 TPAD30 TP44 TPAD30TP44 TPAD30 TP34 TPAD30TP34 TPAD30 TP91 TPAD30TP91 TPAD30

CPU_PROCHOT#

H_THERMDA 21 H_THERMDC 21

PM_THRMTRIP-A# 7,17,32

CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3

1D05V_S0

12

H_RS#[2..0] 6

R125

R125 56R2J-4-GP

56R2J-4-GP

TP95 TPAD30TP95 TPAD30

1D05V_S0

12

R123

R123 68R2-GP

68R2-GP

1 2

R124

Layout Note: "CPU_GTLREF0"

0.5" max length.

Place testpoint on H_IERR# with a GND

0.1" away

DY

0R2J-2-GP

Follow Demo Circuit

1 2

R118 1KR2J-1-GP

1 2

R295 1KR2J-1-GP

C351 SCD1U10V2KX-4GP

XDP_DBRESET#

R121 1KR2J-1-GP

XDP_TDO

R100 54D9R2F-L1-GP

H_THERMDA

H_THERMDC

1KR2F-3-GP

2KR2F-3-GP

DY

DY DY

DY

12

DY

1 2

12

DY

CPU_PROCHOT#_R 34

1D05V_S0

R263

1 2 12

R266

TEST1

TEST2

TEST4

DY

C

C136

C136 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

CPU_GTLREF0

12

DY

C352

SC1KP50V2KX-1GP

3D3V_S0

1D05V_S0

2 OF 4

U33B

H_D#0

E22

D0#

H_D#1

F24

D1#

H_D#2

E26

D2#

H_D#3

G22

D3#

H_D#4

F23

D4#

H_D#5

G25

D5#

H_D#6

E25

D6#

H_D#7

E23

D7#

H_D#8

K24

D8#

H_D#9

G24

D9#

H_D#10

J24

D10#

H_D#11

J23

D11#

H_D#12

H22

D12#

H_D#13

F26

D13#

H_D#14

K22

D14#

H_D#15

H23

D15#

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

TEST1 TEST2 RSVD_CPU_12 TEST4 RSVD_CPU_13 RSVD_CPU_14

J26 H26 H25

N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24

AD26

C23 D25 C24

AF26

AF1 A26

B22 B23 C21

BGA479-SKT6-GPU7

62.10079.001

DSTBN0# DSTBP0# DINV0#

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

BSEL0 BSEL1 BSEL2

MISC

D

H_DSTBN#06 H_DSTBP#06 H_DINV#06

H_DSTBN#16 H_DSTBP#16 H_DINV#16

TP86TPAD30 TP86TPAD30 TP21TPAD30 TP21TPAD30

TP150TPAD30 TP150TPAD30

CPU_SEL03,7 CPU_SEL13,7 CPU_SEL23,7

Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals

H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]

H_D#32

Y22

D32#

H_D#33

AB24

D33#

H_D#34

V24

D34#

H_D#35

V26

D35#

H_D#36

DATA GRP0 DATA GRP1

V23

D36#

H_D#37

T22

D37#

H_D#38

U25

D38#

H_D#39

U23

D39#

H_D#40

Y25

D40#

H_D#41

W22

D41#

H_D#42

Y23

D42#

H_D#43

W24

DATA GRP2DATA GRP3

D43#

H_D#44

W25

D44#

H_D#45

AA23

D45#

H_D#46

AA24

D46#

H_D#47

AB25

D47#

Y26

DSTBN2#

AA26

DSTBP2#

U22

DINV2#

DSTBN3# DSTBP3#

DINV3# COMP0

COMP1 COMP2 COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

H_D#48

AE24

D48#

H_D#49

AD24

D49#

H_D#50

AA21

D50#

H_D#51

AB22

D51#

H_D#52

AB21

D52#

H_D#53

AC26

D53#

H_D#54

AD20

D54#

H_D#55

AE22

D55#

H_D#56

AF23

D56#

H_D#57

AC25

D57#

H_D#58

AE21

D58#

H_D#59

AD21

D59#

H_D#60

AC22

D60#

H_D#61

AD23

D61#

H_D#62

AF22

D62#

H_D#63

AC23

D63#

AE25 AF24 AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

Y1 E5

B5 D24 D6 D7

SLP#

AE6

PSI#

Title

Size Document Number Rev

Date: Sheet

H_DINV#[3..0] 6 H_DSTBN#[3..0] 6 H_DSTBP#[3..0] 6 H_D#[63..0] 6

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6

R105 27D4R2F-L1-GPR105 27D4R2F-L1-GP

1 2

R104 54D9R2F-L1-GPR104 54D9R2F-L1-GP

1 2

R98 27D4R2F-L1-GPR98 27D4R2F-L1-GP

1 2

R99 54D9R2F-L1-GPR99 54D9R2F-L1-GP

1 2

H_DPRSTP# 7,17,34 H_DPSLP# 17 H_DPWR# 6 H_PWRGD 17,32,41 H_CPUSLP# 6 PSI# 34

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (1 of 2)

Cathedral Peak II

SC

of

443Wednesday, July 16, 2008

of

443Wednesday, July 16, 2008

of

443Wednesday, July 16, 2008

E

A

hexainf@hotmail.com

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VCC_CORE

AB20

VCC

AB7

VCC

AC7

VCC

AC9

VCC

AC12

VCC

AC13

VCC

AC15

VCC

AC17

VCC

AC18

VCC

AD7

VCC

AD9

VCC

AD10

VCC

AD12

VCC

AD14

VCC

AD15

VCC

AD17

VCC

AD18

VCC

AE9

VCC

AE10

VCC

AE12

VCC

AE13

VCC

AE15

VCC

AE17

VCC

AE18

VCC

AE20

VCC

AF9

VCC

AF10

VCC

AF12

VCC

AF14

VCC

AF15

VCC

AF17

VCC

AF18

VCC

AF20

VCC

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCP_1D05

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

H_VID0

AD6

H_VID1

AF5

H_VID2

AE5

H_VID3

AF4

H_VID4

AE3

H_VID5

AF3

H_VID6

AE2

AF7

AE7

12

1 2

C114

SCD1U10V2KX-4GP

VCC_CORE

G5

GAP-CLOSE-PWR-2U

H_VID[6..0] 34

12

VCC_CORE

4 4

3 3

2 2

1 1

U33C

A7

A9 A10 A12 A13 A15 A17 A18 A20

B7

B9 B10 B12 B14 B15 B17 B18 B20

C9 C10 C12 C13 C15 C17 C18

D9 D10 D12 D14 D15 D17 D18

E7

E9 E10 E12 E13 E15 E17 E18 E20

F7

F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AB9

AC10 AB10 AB12 AB14 AB15 AB17 AB18

BGA479-SKT6-GPU7

62.10079.001

3 OF 4

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCSENSE VCC VCC VCC

VSSSENSE

A

VCC_CORE

DY

VCC_CORE

CAP

12

C100

DY

R77

R77 100R2F-L1-GP-U

100R2F-L1-GP-U

R88

R88 100R2F-L1-GP-U

100R2F-L1-GP-U

B

12

C120

C86

C122

SCD1U10V2KX-4GP

DY

12

C123

1D05V_S0

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

CAP

1D5V_VCCA_S0

12

C102

C135

SC10U6D3V5MX-3GP

CAP

layout note: "1D5V_VCCA_S0" as short as possible

12

C421

C427

SCD01U16V2KX-3GP

DY

VCC_SENSE 34

VSS_SENSE 34

Layout Note:

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

B

C88

SCD1U10V2KX-4GP

C93

SC10U6D3V5MX-3GP

VCC_CORE

DY

12

C380

SC10U6D3V5MX-3GP

CAP

1 2

PBY160808T-121Y-GP

68.00206.021

12

CAP

L11

C

VCC_CORE

12

C130

C89

C124

C90

SCD1U10V2KX-4GP

DY

12

C381

SC10U6D3V5MX-3GP

1D5V_S0

12

C70

C94

C374

SC10U6D3V5MX-3GP

DY

1D05V_S0

12

C104

SCD1U10V2KX-4GP

C

12

C375

SC10U6D3V5MX-3GP

DY

12

TC9

ST900U2D5VM-1-GP

NEC

3 4

77.E9071.011

12

C106

SC10U6D3V5MX-3GP

DY

12

C101

SCD1U10V2KX-4GP

12

C71

C103

C105

SC10U6D3V5MX-3GP

DY

12

C110

C108

SCD1U10V2KX-4GP

12

C95

C112

SCD1U10V2KX-4GP

DY

D

U33D

A4

VSS

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

TP22

TPAD30

12

C98

C99

C433

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

DY

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-SKT6-GPU7

62.10079.001

Cathedral Peak II

E

4 OF 4

P6

VSS

P21

VSS

P24

VSS

R2

VSS

R5

VSS

R22

VSS

R25

VSS

T1

VSS

T4

VSS

T23

VSS

T26

VSS

U3

VSS

U6

VSS

U21

VSS

U24

VSS

V2

VSS

V5

VSS

V22

VSS

V25

VSS

W1

VSS

W4

VSS

W23

VSS

W26

VSS

Y3

VSS

Y6

VSS

Y21

VSS

Y24

VSS

AA2

VSS

AA5

VSS

AA8

VSS

AA11

VSS

AA14

VSS

AA16

VSS

AA19

VSS

AA22

VSS

AA25

VSS

AB1

VSS

AB4

VSS

AB8

VSS

AB11

VSS

AB13

VSS

AB16

VSS

AB19

VSS

AB23

VSS

AB26

VSS

AC3

VSS

AC6

VSS

AC8

VSS

AC11

VSS

AC14

VSS

AC16

VSS

AC19

VSS

AC21

VSS

AC24

VSS

AD2

VSS

AD5

VSS

AD8

VSS

AD11

VSS

AD13

VSS

AD16

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE1

VSS

AE4

VSS

AE8

VSS

AE11

VSS

AE14

VSS

AE16

VSS

AE19

VSS

AE23

VSS

AE26

VSS

A2

VSS

AF6

VSS

AF8

VSS

AF11

VSS

AF13

VSS

AF16

VSS

AF19

VSS

AF21

VSS

A25

VSS

AF25

VSS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (2 of 2)

543Wednesday, July 16, 2008

E

TPAD30

TPAD30 TP24

TP24

TPAD30

TPAD30 TP26

TP26 TP94

TP94 TPAD30

TPAD30

TP151

TP151 TPAD30

TPAD30 TP23

TP23 TPAD30

TPAD30

SC

of

5

H_SWING

12

24D9R2F-L-GP

1D05V_S0

12

H_RCOMP

R317

R317 221R2F-2-GP

221R2F-2-GP

R316

R316 100R2F-L1-GP-U

100R2F-L1-GP-U

D D

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )

C C

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

C450

SCD1U10V2KX-4GP

1 2

R312

Place them near to the chip ( < 0.5")

B B

1D05V_S0

R322

R322 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R318

R318 2KR2F-3-GP

2KR2F-3-GP

4

H_AVREF

H_D#[63..0]

H_CPURST#4,41 H_CPUSLP#4

12

C455

C455 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_D#[63..0]4

F2

G8

F8 E6 G2 H6 H2

F6 D4 H3 M9

M11

J1

J2

N12

J6 P2

L2 R2 N9

L6 M5

J3 N2 R1 N5 N6

P13

N8

L7

N10

M3 Y3

AD14

Y6

Y10 Y12 Y14

Y7 W2

AA8

Y9

AA13

AA9 AA11 AD11 AD10 AD13 AE12

AE9

AA2

AD8

AA3

AD3

AD7 AE14

AF3

AC1

AE3

AC3 AE11

AE8

AG2

AD6

C5 E3

C12

E11

A11

B11

U35A

71.CNTIG.00U

3

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CANTIGA-GM-GP-U-NF

HOST

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_ADSTB#_0 H_ADSTB#_1

H_BNR# H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1

H_REQ#_2 H_REQ#_3

H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

2

H_A#[35..3]

H_A#3

A14

H_A#4

C15

H_A#5

F16

H_A#6

H13

H_A#7

C18

H_A#8

M16

H_A#9

J13

H_A#10

P16

H_A#11

R16

H_A#12

N17

H_A#13

M13

H_A#14

E17

H_A#15

P17

H_A#16

F17

H_A#17

G20

H_A#18

B19

H_A#19

J16

H_A#20

E20

H_A#21

H16

H_A#22

J20

H_A#23

L17

H_A#24

A17

H_A#25

B17

H_A#26

L16

H_A#27

C21

H_A#28

J17

H_A#29

H20

H_A#30

B18

H_A#31

K17

H_A#32

B20

H_A#33

F21

H_A#34

K21

H_A#35

L20 H12

B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3

H_DPWR# 4 H_DRDY# 4 H_HIT# 4 H_HITM# 4

H_LOCK# 4

H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_A#[35..3] 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

1

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (1 of 6)

Cathedral Peak II

1

SC

of

643Wednesday, July 16, 2008

of

643Wednesday, July 16, 2008

of

643Wednesday, July 16, 2008

5

hexainf@hotmail.com

1D8V_S3

12

R339

R339 1KR2F-3-GP

1KR2F-3-GP

D D

12

R338

R338 3K01R2F-3-GP

3K01R2F-3-GP

R334

R334 1KR2F-3-GP

1KR2F-3-GP

12

C475

C475 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

C472

C472 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SM_RCOMP_VOH

12

C477

C477 SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SM_RCOMP_VOL

12

C470

C470 SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

layout take note

1D8V_S3

12

R331

R331 80D6R2F-L-GP

80D6R2F-L-GP

M_RCOMPP

M_RCOMPN

12

R330

R330 80D6R2F-L-GP

CFG19 CFG20

CFG5 CFG6 CFG7

CFG9 CFG10

CFG12 CFG13

CFG16

RN32

SRN10KJ-5-GP

3D3V_S0

1234

80D6R2F-L-GP

VGATE_PWRGD18,21,34 PWROK18,32

PM_SYNC#18

H_DPRSTP#4,17,34

PLT_RST1#18,25,27,30,31

PM_THRMTRIP-A#4,17,32

R353 0R0402-PADR353 0R0402-PAD

PM_DPRSLPVR18,34

C C

3D3V_S0

R207 4K02R2F-GP

1 2

DY

R208 4K02R2F-GP

1 2

DY

R345 2K21R2F-GP

1 2

DY

R186 2K21R2F-GP

1 2

DY

R188 2K21R2F-GP

1 2

DY

R332 2K21R2F-GP

1 2

DY

R336 2K21R2F-GP

1 2

DY

R190 2K21R2F-GP

1 2

DY

R185 2K21R2F-GP

1 2

DY

B B

R189 2K21R2F-GP

1 2

DY

PM_EXTTS#0 PM_EXTTS#1

R354 0R2J-2-GPDYR354 0R2J-2-GP

1 2

12 1 2

R140 300R2F-GPR140 300R2F-GP

SC100P50V2JN-3GP

CPU_SEL03,4 CPU_SEL13,4 CPU_SEL23,4

PM_SYNC# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PWROK_GD

DY

RSTIN# PM_THRMTRIP-A# PM_DPRSLPVR

12

C165

DY

4

2 OF 10

U35B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9

AH10

RESERVED#AH10

AH12

RESERVED#AH12

AH13

RESERVED#AH13

K12

RESERVED#K12

AL34

RESERVED#AL34

AK34

RESERVED#AK34

AN35

RESERVED#AN35

AM35

RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

B2

RESERVED#B2

M1

RESERVED#M1

AY21

RESERVED#AY21

BG23

RESERVED#BG23

BF23

RESERVED#BF23

BH18

RESERVED#BH18

BF18

RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

CFG5

C25

CFG_5

CFG6

N24

CFG_6

CFG7

M24

CFG_7

E21

CFG_8

CFG9

C23

CFG_9

CFG10

C24

CFG_10

N21

CFG_11

CFG12

P21

CFG_12

CFG13

T21

CFG_13

R20

CFG_14

M20

CFG_15

CFG16

L21

CFG_16

H21

CFG_17

P29

CFG_18

CFG19

R28

CFG_19

CFG20

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC#BG48

BF48

NC#BF48

BD48

NC#BD48

BC48

NC#BC48

BH47

NC#BH47

BG47

NC#BG47

BE47

NC#BE47

BH46

NC#BH46

BF46

NC#BF46

BG45

NC#BG45

BH44

NC#BH44

BH43

NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

2 OF 10

AP24 AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

N28 M28 G36 E36 K36 H36

B12

B28 B30 B29 C29 A28

M_RCOMPP M_RCOMPN

SM_RCOMP_VOH SM_RCOMP_VOL

SM_REXT TP_SM_DRAMRST#

DREFCLK DREFCLK# DREFSSCLK DREFSSCLK#

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

GFXVR_EN

CLPWROK_MCH MCH_CLVREF

MCH_TSATN#

M_CLK_DDR0 13 M_CLK_DDR1 13 M_CLK_DDR2 12 M_CLK_DDR3 12

M_CLK_DDR#0 13 M_CLK_DDR#1 13 M_CLK_DDR#2 12 M_CLK_DDR#3 12

M_CKE0 13 M_CKE1 13 M_CKE2 12 M_CKE3 12

M_CS0# 13 M_CS1# 13 M_CS2# 12 M_CS3# 12

M_ODT0 13 M_ODT1 13 M_ODT2 12 M_ODT3 12

R328

1 2

CLK_MCH_3GPLL 3

CLK_MCH_3GPLL# 3

DMI_TXN0 18 DMI_TXN1 18 DMI_TXN2 18 DMI_TXN3 18

DMI_TXP0 18 DMI_TXP1 18 DMI_TXP2 18 DMI_TXP3 18

DMI_RXN0 18 DMI_RXN1 18 DMI_RXN2 18 DMI_RXN3 18

DMI_RXP0 18 DMI_RXP1 18 DMI_RXP2 18 DMI_RXP3 18

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4

R352

R352 0R0402-PAD

0R0402-PAD

TP115TPAD30TP115TPAD30

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0

RSVD

SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2

CFG

DMI_TXN_3

DMI

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

PM

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

MEHDA

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

NC

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

499R2F-2-GP

TP120TPAD30TP120TPAD30

DREFCLK 3

DREFCLK# 3

DREFSSCLK 3

DREFSSCLK# 3

GFXVR_EN 38

12

CLK_MCH_OE# 3

MCH_ICH_SYNC# 18

TP110TPAD30TP110TPAD30

MCH_TSATN#

3

DDR_VREF_S3

GFX_VID[4..0] 38

CL_CLK0 18

CL_DATA0 18 PWROK 18,32 CL_RST#0 18

C270

1D05V_S0

12

C487

SCD1U10V2KX-4GP

1D05V_S0

1 2

12

SCD1U10V2KX-4GP

R324

56R2J-4-GP

L_BKLTCTL14

GMCH_BL_ON30

CLK_DDC_EDID14 DAT_DDC_EDID14

GMCH_LCDVDD_ON14

GMCH_BLUE15

GMCH_GREEN15

GMCH_RED15

GMCH_DDCCLK15

GMCH_DDCDATA15 GMCH_HSYNC15 GMCH_VSYNC15

R355

R355 1KR2F-3-GP

1KR2F-3-GP

R356

R356 511R2F-2-GP

511R2F-2-GP

FOR Cantiga:500 ohm Teenah: 392 ohm

GMCH_LCDVDD_ON GMCH_BL_ON GFXVR_EN

LIBG

L_BKLTCTL

GMCH_BL_ON

LCTLA_CLK

TP119TPAD30 TP119TPAD30

LCTLB_DATA

TP118TPAD30 TP118TPAD30

CLK_DDC_EDID DAT_DDC_EDID

GMCH_LCDVDD_ON

LIBG L_LVBG

TP121TPAD30 TP121TPAD30

GMCH_TXACLK-14 GMCH_TXACLK+14 GMCH_TXBCLK-14 GMCH_TXBCLK+14

GMCH_TXAOUT0-14 GMCH_TXAOUT1-14 GMCH_TXAOUT2-14

GMCH_TXAOUT0+14 GMCH_TXAOUT1+14 GMCH_TXAOUT2+14

GMCH_TXBOUT0-14 GMCH_TXBOUT1-14 GMCH_TXBOUT2-14

GMCH_TXBOUT0+14 GMCH_TXBOUT1+14 GMCH_TXBOUT2+14

TVA_DAC TVB_DAC TVC_DAC

GMCH_BLUE GMCH_GREEN GMCH_RED

GMCH_DDCCLK GMCH_DDCDATA

GMCH_HS

2 3 1

4

GMCH_VS

RN71

SRN33J-5-GP-U

CRT_IREF

1 2

R347 1K02R2F-1-GPR347 1K02R2F-1-GP

FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm

CRT_IREF routing Trace width use 20 mil

RN63

1 2 3 4 5

SRN100KJ-8-GP-U

SRN100KJ-8-GP-U R216

R216

1 2

2K37R2F-GP

2

3 OF 10

U35C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

GMCH_RED GMCH_BLUE

GMCH_GREEN

TVA_DAC TVB_DAC TVC_DAC

8 7 6

LCTLB_DATA LCTLA_CLK CLK_MCH_OE#

3 OF 10

T37

PEG_COMPI

T36

PEG_COMPO

H44

PEG_RX#_0

J46

PEG_RX#_1

L44

PEG_RX#_2

L40

PEG_RX#_3

N41

PEG_RX#_4

P48

PEG_RX#_5

N44

PEG_RX#_6

T43

PEG_RX#_7

U43

PEG_RX#_8

Y43

PEG_RX#_9

Y48

PEG_RX#_10

Y36

PEG_RX#_11

LVDS

TV VGA

AA43

PEG_RX#_12

AD37

PEG_RX#_13

AC47

PEG_RX#_14

AD39

PEG_RX#_15

H43

PEG_RX_0

J44

PEG_RX_1

L43

PEG_RX_2

L41

PEG_RX_3

N40

PEG_RX_4

P47

PEG_RX_5

N43

PEG_RX_6

T42

PEG_RX_7

U42

PEG_RX_8

Y42

PEG_RX_9

W47

PEG_RX_10

Y37

PEG_RX_11

AA42

PEG_RX_12

AD36

PEG_RX_13

AC48

PEG_RX_14

AD40

PEG_RX_15

J41

PEG_TX#_0

M46

PEG_TX#_1

M47

PEG_TX#_2

M40

PEG_TX#_3

M42

PEG_TX#_4

R48

PEG_TX#_5

N38

PEG_TX#_6

T40

PEG_TX#_7

U37

PEG_TX#_8

U40

PEG_TX#_9

Y40

PEG_TX#_10

AA46

PEG_TX#_11

AA37

PEG_TX#_12

PCI-EXPRESS GRAPHICS

AA40

PEG_TX#_13

AD43

PEG_TX#_14

AC46

PEG_TX#_15

J42

PEG_TX_0

L46

PEG_TX_1

M48

PEG_TX_2

M39

PEG_TX_3

M43

PEG_TX_4

R47

PEG_TX_5

N37

PEG_TX_6

T39

PEG_TX_7

U36

PEG_TX_8

U39

PEG_TX_9

Y39

PEG_TX_10

Y46

PEG_TX_11

AA36

PEG_TX_12

AA39

PEG_TX_13

AD42

PEG_TX_14

AD46

PEG_TX_15

RN72

1

8

2

7

3

6

4 5

SRN150F-1-GP

RN62

1

8

2

7

3

6

4 5

SRN75J-1-GP

3D3V_S0

RN33

3456 2

7

1

8

SRN10KJ-6-GP

1D05V_S0

R214

PEG_CMP

12

49D9R2F-GP

Close to GMCH as 500 mils.

1

Pin Name Strap Description Configuration

A A

CFG20

Digital DisplayPort (SDVO/DP/HDMI) Concurrent with PCIE

5

Low = Only digital DisplayPort (SDVO/DP/HDMI) or PCIE is operational (default)

High = Digital DisplayPort (SDVO/DP/HDMI) and PCIE are operating simultaneously via the PEG port

4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (2 of 6)

Cathedral Peak II

1

SC

of

743Wednesday, July 16, 2008

of

743Wednesday, July 16, 2008

of

743Wednesday, July 16, 2008

5

U35D

M_A_DQ[63..0]13

D D

C C

B B

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

U35D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

DDR SYSTEM MEMORY A

4 OF 10

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

4

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

M_A_BS#0 13 M_A_BS#1 13 M_A_BS#2 13

M_A_RAS# 13 M_A_CAS# 13 M_A_WE# 13

M_A_DM[7..0] 13

M_A_DQS[7..0] 13

M_A_DQS#[7..0] 13

M_A_A[14..0] 13

3

M_B_DQ[63..0]12

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AK47 AH46 AP47 AP46

AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43 BF43 BE45 BC41 BF40 BF41 BG38 BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BH12 BF11

AJ46 AJ48

BG8

BF8 BG7 BC5 BC6 AY3 AY1

BF6

BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

U35E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

2

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

M_B_DM0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

M_B_RAS# 12 M_B_CAS# 12 M_B_WE# 12

1

M_B_BS#0 12 M_B_BS#1 12 M_B_BS#2 12

M_B_DM[7..0] 12

M_B_DQS[7..0] 12

M_B_DQS#[7..0] 12

M_B_A[14..0] 12

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (3 of 6)

Cathedral Peak II

1

SC

of

843Wednesday, July 16, 2008

of

843Wednesday, July 16, 2008

of

843Wednesday, July 16, 2008

5

hexainf@hotmail.com

7 OF 10

POWER

VCC SMVCC GFX

7 OF 10

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC GFX NCTF

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

SM_LF1_GMCH SM_LF2_GMCH SM_LF3_GMCH SM_LF4_GMCH SM_LF5_GMCH SM_LF6_GMCH SM_LF7_GMCH

1D8V_S3

667MTS 2400mA 800MTS 3000mA

D D

VCC_GFXCORE

C C

B B

VCC_AXG_SENSE38 VSS_AXG_SENSE38

AP33 AN33 BH32 BG32 BF32 BD32 BC32 BB32 BA32 AY32

AW32

AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29

AW29

AV29 AU29 AT29 AR29 AP29

BA36 BB24 BD16

BB21 AW16 AW13

AT13

Y26 AE25 AB25 AA25 AE24 AC24 AA24

Y24 AE23 AC23 AB23 AA23

AJ21 AG21 AE21 AC21 AA21

Y21 AH20 AF20 AE20 AC20 AB20 AA20

T17

T16 AM15 AL15 AE15

AJ15 AH15 AG15 AF15 AB15 AA15

Y15 V15

U15 AN14 AM14

U14

T14

AJ14

AH14

U35G

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC VCC_SM/NC

VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

VCC_AXG_SENSE VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

4

VCC_GFXCORE

12

C164

C464

SCD1U10V2KX-4GP

place near Cantiga

12

C178

SE220U2D5VDM-3GP

12

C488

C468

SCD22U10V2KX-1GP

VCC_GFXCORE

12

C167

TC18

SC10U6D3V5MX-3GP

DY

Place on the Edge Coupling CAP

Place CAP where LVDS and DDR2 taps

12

C254

C266

C253

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

DY

12

C491

C492

SCD47U16V3ZY-3GP

SC1U10V3KX-3GP

12

C225

SC10U6D3V5MX-3GP

FOR VCC SM

12

C252

SCD1U10V2KX-4GP

DY

12

C244

SC10U6D3V5MX-3GP

12

TC19

SE330U2D5VDM-LGP

DY

3

12

C157

SC10U6D3V5MX-3GP

DY

12

C255

SC10U6D3V5MX-3GP

DY

Place on the Edge

12

C249

SCD1U10V2KX-4GP

12

C258

SC10U6D3V5MX-3GP

1D05V_S0

12

C233

SC1U10V3ZY-6GP

C259

SC10U6D3V5MX-3GP

1D8V_S3

12

C248

12

C236

SCD1U10V2KX-4GP

C142

C437

SC10U6D3V5MX-3GP

12

DY

Coupling CAP 370 mils from the Edge

12

C438

DY

Coupling CAP

2

C141

SC10U6D3V5MX-3GP

12

DY

12

C434

SC10U6D3V5MX-3GP

DY

C435

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

GAP-CLOSE-PWR

1 2

C436

12

G11

SCD1U10V2KX-4GP

VCC_GMCH_35

U35F

AG34 AC34 AB34 AA34

Y34 V34

U34 AM33 AK33 AJ33 AG33 AF33

AE33 AC33 AA33

Y33

W33

V33

U33 AH28 AF28 AC28 AA28 AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24 AJ23 AH23 AF23

T32

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

1

6 OF 10

VCC CORE

POWER

6 OF 10

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

VCC NCTF

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

1D05V_S0

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (4 of 6)

Cathedral Peak II

1

SC

of

943Wednesday, July 16, 2008

of

943Wednesday, July 16, 2008

of

943Wednesday, July 16, 2008

5

5V_S0

D D

1D05V_S0

C C

1 2

120ohm 100MHz

1D05V_S0

B B

220ohm 100MHz

1D5V_S0

180ohm 100MHz

A A

12

EC154

EC154 SC1U16V3ZY-GP

SC1U16V3ZY-GP

R358

1 2

0R0603-PAD

R357

1 2

0R0603-PAD

R310

R310 0R0603-PAD

0R0603-PAD

L13

1 2

FCM1608KF-1-GP

68.00217.161

L12

1 2

FCM1608KF-1-GP

68.00217.161

L15

1 2

FCM1608CF-221T02-GP

68.00217.521

R196

1 2

0R0603-PAD

L2

1 2

PBY160808T-181Y-GP

68.00206.041

Imax = 300 mA

U36

1

VIN

VOUT

2

GND EN/EN#3NC#4

RT9198-33PBR-GP

74.09198.G7F

12

C490

SC10U6D3V5MX-3GP

12

C489

SC10U6D3V5MX-3GP

1D05V_SUS_MCH_PLL2

SC4D7U6D3V3KX-GP

12

C443

12

SC10U6D3V5MX-3GP

DY

C442

5

3D3V_S0_DAC

5 4

EC153

SC1U16V3ZY-GP

DY

65mA

M_VCCA_DPLLA

12

C486

C486 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

65mA

M_VCCA_DPLLB

12

C485

SCD1U10V2KX-4GP

DY

24mA

M_VCCA_HPLL

12

C444

C444 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

139.2mA

M_VCCA_MPLL

12

C446

C446 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

50mA

1D05V_RUN_PEGPLL

12

C484

C484 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

35mA

1D5VRUN_TVDAC

12

C242

C242 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5VRUN_QDAC

12

C239

C239 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S0_DAC

12

C476

C476 SC22U16V0KX-1GP

SC22U16V0KX-1GP

12

3D3V_S0_DAC

1 2

R342

R342 0R0603-PAD

0R0603-PAD

1D5V_S0

1D05V_S0

1 2

R191

R191 0R0603-PAD

0R0603-PAD

1D05V_S0

3D3V_S0_DAC

1D05V_SUS_MCH_PLL2

1 2

R346

R346 0R0603-PAD

0R0603-PAD

5mA

R351

R351 0R0402-PAD

0R0402-PAD

1 2

R203

R203 0R0603-PAD

0R0603-PAD

L14

1 2

0R0603-PAD

1D8V_S3

60.3mA

12

C474

C474 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1KP50V2KX-1GP

12

720mA

DY

12

4

12

1D8V_TXLVDS_S3

C277

C171

SC10U6D3V5MX-3GP

12

C237

SC10U6D3V5MX-3GP

DY

157.2mA

C186

SCD1U10V2KX-4GP

4

C478

SCD01U16V2KX-3GP

C224

12

DY

12

C245

DY

12

C471

SCD1U10V2KX-4GP

R212

1 2

0R0603-PAD

3D3V_CRTDAC_S0

12

C479

C479 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_TXLVDS_S3

12

DY

12

C482

C482 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C219

SC4D7U6D3V3KX-GP

12

C241

SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-4GP

12

C483

SCD1U10V2KX-4GP

12

C271

M_VCCA_DAC_BG

M_VCCA_DPLLA M_VCCA_DPLLB M_VCCA_HPLL M_VCCA_MPLL

13.2mA

VCCA_PEG_BG

1D05V_RUN_PEGPLL 1D05V_SM

C227

SC1U10V3KX-3GP

12

26mA

1D05V_SM_CK

79mA

3D3VTVDAC

C469

C469 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

50mA

1D5VRUN_TVDAC 1D5VRUN_QDAC

1D05V_RUN_PEGPLL

1D8V_SUS_DLVDS

12

C274

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

U35H

B27

VCCA_CRT_DAC

A26

VCCA_CRT_DAC

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

VCCA_SM

AN17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCCA_SM

AP28

VCCA_SM_CK

AN28

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VCCA_SM_CK_NCTF

AL23

VCCA_SM_CK_NCTF

B24

VCCA_TV_DAC

A24

VCCA_TV_DAC

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS

L37

VCCD_LVDS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

3

CRTPLLA PEGA SM

A LVDS

POWER

A CK

TV

HDA

D TV/CRT

LVDS

AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

SM CK

VCC_TX_LVDS

HV

PEG

DMI

8 OF 10

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VTT

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VCC_AXF VCC_AXF VCC_AXF

VCC_HV VCC_HV VCC_HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

VCC_DMI VCC_DMI VCC_DMI VCC_DMI

VTTLF VTTLF VTTLF

VTTLF

SCD47U6D3V2KX-GP

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47 C35

B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

106mA

1782mA

456mA

VTTLF1 VTTLF2 VTTLF3

C445

2

-1

852mA73mA

12

SC4D7U6D3V3KX-GP

1D05V_S0

12

C230

C230 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1KP50V2KX-1GP

12

SC4D7U6D3V3KX-GP

-1

12

C202

1

SCD47U6D3V2KX-GP

2

12

C260

C256

SC2D2U6D3V3MX-1-GP

1

BAT54-7-F-GP

3

322mA

C460

12

SC10U6D3V5MX-3GP

DY

R183

1 2

1D8V_TXLVDS_S3

12

C276

1D05V_S0

C262

SC22U6D3V5MX-2GP

C263

SCD1U10V2KX-4GP

DY

Title

Size Document Number Rev

Date: Sheet

SC4D7U6D3V3KX-GP

D22

124mA

1R2F-GP

119mA

12

C439

DY

12

C251

SC10U6D3V5MX-3GP

1

C187

SCD47U6D3V2KX-GP

DY

2

1D05V_HV_S0

2

1D05V_S0

1D8V_SUS_SM_CK_RC

12

SC22U6D3V5MX-2GP

12

C175

C175 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

1 2

0R0603-PAD

C275

C275 SC1U10V3KX-3GP

SC1U10V3KX-3GP

C440

C440 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

12

Cathedral Peak II

12

C261

C257

SC4D7U6D3V3KX-GP

C467

SC1U10V3KX-3GP

12

3D3V_HV_S0

12

C447

DY

C185

1

SCD47U6D3V2KX-GP

2

1

1D05V_S0

3D3V_S0 3D3V_HV_S0

R350

1 2

R349

R349 10R2F-L-GP

10R2F-L-GP

R179

C441

C441 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Cantiga (5 of 6)

R350

0R0402-PAD

1D8V_S31D8V_SUS_SM_CK

1 2

C222

C222 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D8V_S3

R217

1 2

0R0603-PAD

1D05V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

10 43Wednesday, July 16, 2008

1

12

C480

SCD1U10V2KX-4GP

SC

of

5

hexainf@hotmail.com

U35I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

D D

C C

B B

A A

5

AF47

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VSS

9 OF 10

4

AM36

VSS

AE36

VSS

P36

VSS

L36

VSS

J36

VSS

F36

VSS

B36

VSS

AH35

VSS

AA35

VSS

Y35

VSS

U35

VSS

T35

VSS

BF34

VSS

AM34

VSS

AJ34

VSS

AF34

VSS

AE34

VSS

W34

VSS

B34

VSS

A34

VSS

BG33

VSS

BC33

VSS

BA33

VSS

AV33

VSS

AR33

VSS

AL33

VSS

AH33

VSS

AB33

VSS

P33

VSS

L33

VSS

H33

VSS

N32

VSS

K32

VSS

F32

VSS

C32

VSS

A31

VSS

AN29

VSS

T29

VSS

N29

VSS

K29

VSS

H29

VSS

F29

VSS

A29

VSS

BG28

VSS

BD28

VSS

BA28

VSS

AV28

VSS

AT28

VSS

AR28

VSS

AJ28

VSS

AG28

VSS

AE28

VSS

AB28

VSS

Y28

VSS

P28

VSS

K28

VSS

H28

VSS

F28

VSS

C28

VSS

BF26

VSS

AH26

VSS

AF26

VSS

AB26

VSS

AA26

VSS

C26

VSS

B26

VSS

BH25

VSS

BD25

VSS

BB25

VSS

AV25

VSS

AR25

VSS

AJ25

VSS

AC25

VSS

Y25

VSS

N25

VSS

L25

VSS

J25

VSS

G25

VSS

E25

VSS

BF24

VSS

AD12

VSS

AY24

VSS

AT24

VSS

AJ24

VSS

AH24

VSS

AF24

VSS

AB24

VSS

R24

VSS

L24

VSS

K24

VSS

J24

VSS

G24

VSS

F24

VSS

E24

VSS

BH23

VSS

AG23

VSS

Y23

VSS

B23

VSS

A23

VSS

AJ6

VSS

4

3

U35J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17 M17 H17

C17 BA16 AU16

AN16

N16

G16

BG15

AC15

W15

BG14

AA14

C14

BG13

BC13 BA13

AN13

AJ13

AE13

N13

G13 BF12

AV12 AT12

AM12

AA12

BD11 BB11 AY11 AN11 AH11

N11

G11

C11

BG10

AV10 AT10

AJ10 AE10 AA10

M10 BF9 BC9 AN9 AM9 AD9

BH8 BB8 AV8 AT8

3

VSS VSS VSS VSS

VSS VSS

K16

VSS VSS

E16

VSS VSS VSS VSS

A15

VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS

L13

VSS VSS

E13

VSS VSS VSS VSS VSS VSS

J12

VSS

A12

VSS VSS VSS VSS VSS VSS

Y11

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

G9

VSS

B9

VSS VSS VSS VSS VSS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VSS

NCTF_VSS_SCB#BH48

NCTF_VSS_SCB#BH1 NCTF_VSS_SCB#A48

NCTF_VSS_SCB#C1 NCTF_VSS_SCB#A3

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

VSS SCB

VSS NCTF

NC

10 OF 10

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

NC#E1 NC#D2 NC#C3 NC#B4 NC#A5 NC#A6

NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48

2

AH8

VSS

Y8

VSS

L8

VSS

E8

VSS

B8

VSS

AY7

VSS

AU7

VSS

AN7

VSS

AJ7

VSS

AE7

VSS

AA7

VSS

N7

VSS

J7

VSS

BG6

VSS

BD6

VSS

AV6

VSS

AT6

VSS

AM6

VSS

M6

VSS

C6

VSS

BA5

VSS

AH5

VSS

AD5

VSS

Y5

VSS

L5

VSS

J5

VSS

H5

VSS

F5

VSS

BE4

VSS

BC3

VSS

AV3

VSS

AL3

VSS

R3

VSS

P3

VSS

F3

VSS

BA2

VSS

AW2

VSS

AU2

VSS

AR2

VSS

AP2

VSS

AJ2

VSS

AH2

VSS

AF2

VSS

AE2

VSS

AD2

VSS

AC2

VSS

Y2

VSS

M2

VSS

K2

VSS

AM1

VSS

AA1

VSS

P1

VSS

H1

VSS

U24

VSS

U28

VSS

U25

VSS

U29

VSS

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

TP163 TPAD30TP163 TPAD30 TP155 TPAD30TP155 TPAD30 TP164 TPAD30TP164 TPAD30 TP156 TPAD30TP156 TPAD30 TP157 TPAD30TP157 TPAD30

Title

Size Document Number Rev

Date: Sheet

Cathedral Peak II

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (6 of 6)

11 43Wednesday, July 16, 2008

1

SC

of

A

4 4

3 3

2 2

DDR_VREF_S3

12

C205

SCD1U16V2ZY-2GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

Put decap near power(0.9V) and pull-up resistor

12

C180

SCD1U16V2ZY-2GP

PARALLEL TERMINATION

RN25

M_B_A8

1

M_B_A9

2

M_B_A5

3456

RN31

M_CKE3

1

M_B_A12

2

M_B_BS#2

3456

M_CKE2

RN18

M_B_A3

1

M_B_A1

2

M_B_A10

3456

M_B_WE#

RN15

M_B_A13

1

M_ODT2

2

M_ODT3

3456

M_B_RAS#

RN22

M_B_BS#1

1

M_B_A2

2

M_B_A0

3456

M_B_A4

RN27

M_B_A14

1

M_B_A11

2

M_B_A7

3456

M_B_A6

RN12

M_B_BS#0

1

M_B_CAS#

2

M_CS3#

3456

M_CS2#

Put decap near power(0.9V) and pull-up resistor

Decoupling Capacitor

12

C166

DY

12

C196

SCD1U16V2ZY-2GP

DY

12

C215

SCD1U16V2ZY-2GP

12

C197

SCD1U16V2ZY-2GP

-1

12

C221

SCD1U16V2ZY-2GP

DY

12

C217

B

12

C160

SCD1U16V2ZY-2GP

12

C220

SCD1U16V2ZY-2GP

DY

TPAD30

TP111

12

C172

SCD1U16V2ZY-2GP

M_B_A[14..0]8

M_B_DQ[63..0]8

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

DDR_VREF_S3_1

SC4D7U6D3V3KX-GP

C

DM1

M_B_A0

102

A0

M_B_A1

101

A1

M_B_A2

100

A2

M_B_A3

99

A3

M_B_A4

98

A4

M_B_A5

97

A5

M_B_A6

94

A6

M_B_A7

92

A7

M_B_A8

93

A8

M_B_A9

91

A9

M_B_A10

105

A10/AP

M_B_A11

90

A11

M_B_A12

89

A12

M_B_A13

116

A13

M_B_A14

86

A14

M_B_A15

84

A15

M_ODT27 M_ODT37

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

12

C280

SCD1U16V2ZY-2GP

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

202

GND

MH1

DDR2-200P-23-GP-U1

62.10017.A71

High 9.2mm

M_B_BS#28 M_B_BS#08

M_B_BS#18

12

C281

DY

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

79

CKE0

80

CKE1

30

CK0

32

CK0#

164

CK1

166

CK1#

M_B_DM0

10

DM0

M_B_DM1

26

DM1

M_B_DM2

52

DM2

M_B_DM3

67

DM3

M_B_DM4

130

DM4

M_B_DM5

147

DM5

M_B_DM6

170

DM6

M_B_DM7

185

DM7

195

SDA SCL

VDDSPD

SA0 SA1

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

REVERSE TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND MH2

SMBD_ICH 3,13,20

197

SMBC_ICH 3,13,20

199 198

DDRB_SA0

200

R114

10KR2J-3-GP

50 69 83 120 163

81 82 87 88 95 96 103 104 111

1D8V_S3

112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201 MH2

M_B_RAS# 8 M_B_WE# 8 M_B_CAS# 8

M_CS2# 7 M_CS3# 7

M_CKE2 7 M_CKE3 7

M_CLK_DDR2 7 M_CLK_DDR#2 7

M_CLK_DDR3 7 M_CLK_DDR#3 7

M_B_DM[7..0] 8

12

1D8V_S3

D

3D3V_S0

12

DY

C117

C117 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

12

C449

SC2D2U6D3V3MX-1-GP

12

C203

SCD1U16V2ZY-2GP

DY

12

C451

DY

12

C461

Place these Caps near DM1

12

C174

C199

SC2D2U6D3V3MX-1-GP

12

C456

SCD1U16V2ZY-2GP

C199

SC2D2U6D3V3MX-1-GP

DY

12

C452

SCD1U16V2ZY-2GP

SC2D2U6D3V3MX-1-GP

SCD1U16V2ZY-2GP

12

C158

SC2D2U6D3V3MX-1-GP

E

2nd: 62.10017.B51

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

A

B

C

D

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Socket 0 (DM1)

Cathedral Peak II

E

SC

of

12 43Wednesday, July 16, 2008

A

hexainf@hotmail.com

4 4

3 3

DDR_VREF_S3

12

C191

2 2

1 1

C191

DDR_VREF_S3

Put decap near power(0.9V) and pull-up resistor

12

C189

C207

SCD1U16V2ZY-2GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

8 7

SRN56J-5-GP

Decoupling Capacitor

12

C181

SCD1U16V2ZY-2GP

DY

PARALLEL TERMINATION

RN29

1 2 3456

RN16

1 2 3456

RN23

1 2 3456

RN13

1 2 3456

RN24

1 2 3456

RN28

1 2 3456

RN19

1 2 3456

12

C209

DY

M_A_A12 M_CKE0 M_A_BS#2 M_A_A8

M_A_A13 M_ODT0 M_CS0# M_A_RAS#

M_A_BS#1 M_A_A0 M_A_A2 M_A_A4

M_A_CAS# M_ODT1

M_CS1#

M_A_A9 M_A_A14 M_A_A5 M_A_A3

M_A_A6 M_A_A7 M_A_A11 M_CKE1

M_A_BS#0 M_A_A1 M_A_A10 M_A_WE#

12

C218

SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

Put decap near power(0.9V) and pull-up resistor

12

C223

SCD1U16V2ZY-2GP

DY

12

C192

SCD1U16V2ZY-2GP

12

C201

SCD1U16V2ZY-2GP

DY

B

12

C173

SCD1U16V2ZY-2GP

12

C170

SCD1U16V2ZY-2GP

TPAD30

TP112

M_A_DQ[63..0]8

M_A_DQS#[7..0]8

M_A_DQS[7..0]8

DDR_VREF_S3_1

SC4D7U6D3V3KX-GP

C

DM2

M_A_A[14..0]8

M_A_BS#28 M_A_BS#08

M_A_BS#18

M_ODT07 M_ODT17

12

C279

DY

C278

SCD1U16V2ZY-2GP

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

DM2

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

/DQS0

29

/DQS1

49

/DQS2

68

/DQS3

129

/DQS4

146

/DQS5

167

/DQS6

186

/DQS7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

ODT0

119

ODT1

1

VREF

2

VSS

202

GND

SKT-SODIMM20022U2GP

62.10017.691

High 5.2mm

2nd: 62.10017.911

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79

CKE0

80

CKE1

30

CK0

32

/CK0

164

CK1

166

/CK1

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

VDDSPD

198

SA0

200

SA1

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

REVERSE TYPE

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_RAS# 8 M_A_WE# 8 M_A_CAS# 8

M_CS0# 7 M_CS1# 7

M_CKE0 7 M_CKE1 7

M_CLK_DDR0 7 M_CLK_DDR#0 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

M_A_DM[7..0] 8

SMBD_ICH 3,12,20 SMBC_ICH 3,12,20

12

1D8V_S3

C115

C115 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

D

3D3V_S0

Place these Caps near DM2

1D8V_S3

12

C200

DY

12

C448

DY

12

C454

SC2D2U6D3V3MX-1-GP

12

C193

SCD1U16V2ZY-2GP

12

C458

12

C179

DY

12

C457

SC2D2U6D3V3MX-1-GP

DY

12

C216

SCD1U16V2ZY-2GP

12

C169

SC2D2U6D3V3MX-1-GP

E

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Socket 1 (DM2)

Cathedral Peak II

13 43Wednesday, July 16, 2008

E

SC

of

LCD/INVERTER/CCD CONN

USBPN818

USBPP818

DCBATOUT

12

C307

SC10U25V6KX-1GP

CLK_DDC_EDID

DAT_DDC_EDID

CLK_DDC_EDID7 DAT_DDC_EDID7

BLON_OUT

1 2

12

EC86

DY

SCD1U50V3ZY-GP

R6

12

0R0402-PADR60R0402-PAD

R7

12

0R0402-PADR70R0402-PAD

R457

1 2

33R2J-2-GP

F2

POLYSW-1D1A24V-GP

69.50007.A31

3D3V_S0

1

23

RN1

SRN2K2J-1-GP

4

GMCH_LCDVDD_ON7

USBPN8_R USBPP8_R

3D3V_S0

CLK_DDC_EDID DAT_DDC_EDID

CCD_PWR BRIGHTNESS_CN

BLON_OUT_1

PWR_INVERTER

BRIGHTNESS_CN BLON_OUT

LCD1

41

2 4

6

8 10 12 14 16 18 20 22 24 26 28 30

42

ACES-CONN40A-2GP

20.F0993.040

2nd: 20.F1048.040 3nd: 20.F1084.040

12

DY

GMCH_LCDVDD_ON

LCDVDD

12

C4

C3

C3 SCD1U25V3ZY-1GP

1

C5

3

SC10U10V5ZY-1GP

5 7

GMCH_TXBCLK+

9

GMCH_TXBCLK-

11

GMCH_TXBOUT2+

13

GMCH_TXBOUT2-

15

GMCH_TXBOUT1+

17

GMCH_TXBOUT1-

19

GMCH_TXBOUT0+

21

GMCH_TXBOUT0-

23

GMCH_TXACLK+

25

GMCH_TXACLK-

27

GMCH_TXAOUT2+

29

GMCH_TXAOUT2-

3132

GMCH_TXAOUT1+

3334

GMCH_TXAOUT1-

3536

GMCH_TXAOUT0+

3738

GMCH_TXAOUT0-

3940

12

C306

C305

SC100P50V2JN-3GP

DY

LCDVDD

Layout 40 mil

12

C6

C2

SCD1U16V2ZY-2GP

DY

SC4D7U6D3V3MX-2GPC6SC4D7U6D3V3MX-2GP

DY

SCD1U25V3ZY-1GP

DY

R242

0R0402-PAD

U1

1

IN#1

2

OUT

3

EN

4

GND

G5281RC1U-GP

74.05281.093

DY

R241

12

0R2J-2-GP

12

SCD1U25V3ZY-1GP

GMCH_TXBCLK+ 7 GMCH_TXBCLK- 7 GMCH_TXBOUT2+ 7 GMCH_TXBOUT2- 7 GMCH_TXBOUT1+ 7 GMCH_TXBOUT1- 7 GMCH_TXBOUT0+ 7 GMCH_TXBOUT0- 7 GMCH_TXACLK+ 7 GMCH_TXACLK- 7 GMCH_TXAOUT2+ 7 GMCH_TXAOUT2- 7 GMCH_TXAOUT1+ 7 GMCH_TXAOUT1- 7 GMCH_TXAOUT0+ 7 GMCH_TXAOUT0- 7

9

GND

8

IN#8

7

IN#7

6

IN#6

5

IN#5

L_BKLTCTL 7

BRIGHTNESS 30 BLON_OUT 16,30

3D3V_S0

12

C7

C7 SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

Inverter Pin Pin

Symbol Vin

1 2

Vin Brightness

3 4

BLON

5

GND GND

6

CCD Pin

Symbol

CCD_PWR

1

USBUSB+

3 42GND

GND

5

Cover Up Switch

3D3V_AUX_S5

U4

2

OUT

3

GND

1

VDD

ME268-002-GP

74.00268.07B

74.00268.A7B

74.00268.C7B

EC92

SCD1U16V2ZY-2GP

1 2

12

R253

R253 10KR2J-3-GP

10KR2J-3-GP

DY

SCD1U16V2ZY-2GP

LID_CLOSE#

EC93

DY

1 2

LID_CLOSE# 30

12

CCD_PWR

C309

SC4D7U10V5ZY-3GP

12

C308

C308 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

-1

F3

1 2

FUSE-1D1A6V-8GP

69.41101.021

3D3V_S0

F4

DY

1 2

FUSE-4A32V-6-GP

69.44001.041

3D3V_S0

Consumption stock

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

LCD CONN

Cathedral Peak II

of

14 43Wednesday, July 16, 2008

SC

A

hexainf@hotmail.com

B

C

D

E

Layout Note: Place these resistors close to the CRT-out connector

4 4

Layout Note: * Must be a ground return path between this ground and the ground on the VGA connector.

3 3

Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

GMCH_RED7

GMCH_GREEN7

GMCH_BLUE7

SRN150F-1-GP

678

RN73

123

4 5

Ferrite bead impedance: 10 ohm@100MHz

12

EC109

SC3P50V2CN-1-GP

DY

12

EC106

SC3P50V2CN-1-GP

DY

1 2

EC96

L7

FCB1608CF-GP

68.00230.021

L6

FCB1608CF-GP

68.00230.021

L4

FCB1608CF-GP

SC3P50V2CN-1-GP

68.00230.021

CRT_R

CRT_G

CRT_B

12

D20

3

BAV99PT-GP-U

D18

3

BAV99PT-GP-U

D17

3

BAV99PT-GP-U

CRT_R

CRT_G

C336

SC6D8P50V2DN-GP

5V_S0

2

1

2

1

2

1

SC6D8P50V2DN-GP

DY

CRT_B

12

C321

C326

C336

GMCH_HSYNC7

GMCH_VSYNC7

CRT I/F & CONNECTOR

2 2

CRT_R

CRT_G CRT_B

CRT_IN#_R

CRT_VSYNC1

CRT_HSYNC1

12

C316

SC18P50V2JN-1-GP

1 1

CLK_DDC1_5

12

C323

SC18P50V2JN-1-GP

DAT_DDC1_5

12

C317

12

C19

SC100P50V2JN-3GP

DY

A

CRT1

16

1

2 3 4

5

17

VIDEO-15-42-GP-U

20.20378.015

CRT_DEC#30

6

D16

DY

BAV99PT-GP-U

1 7 2 8 3 9 4 10 5

5V_S0

2

1

GMCH_DDCDATA7

GMCH_DDCCLK7

C

6 11

7 12 8 13 9 14 10 15

DAT_DDC1_5 CRT_HSYNC1 CRT_VSYNC1 CLK_DDC1_5

470R2J-2-GP

12

C578

C578 SC220P50V2JN-3GP

SC220P50V2JN-3GP

DY

5V_CRT_S0

R254

1 2

B

C315

C315 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

CRT_IN#_R

12

C313

C313 SC100P50V2JN-3GP

SC100P50V2JN-3GP

DY

3

Hsync & Vsync level shift

14

5 6

DY

12

C341

C342

SC18P50V2JN-1-GP

7

DDC_CLK & DATA level shift

5V_CRT_S0

3D3V_S0

4

RN41

SRN2K2J-1-GP

D

RN41

2 3

FUSE-1D1A6V-4GP-U

1

5 6

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

5V_S0

2 3

4

TSAHCT125PW-GP

F1

1 2

69.50007.691

Q15

2N7002DW-1-GP

12

C314

C314 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

14

1

CRT_HSYNC1

U32A

TSAHCT125PW-GP

7

U32B

5V_CRT_DDC

34 2 1

CRT Connector

CRT_VSYNC1

5V_S0

1

2

D2

BAS16PT-GPD2BAS16PT-GP

3

678

123

4 5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

E

RN2

SRN10KJ-6-GP

CRT_IN#_R

DAT_DDC1_5

CLK_DDC1_5

15 43Wednesday, July 16, 2008

3D3V_S0

of

SC

5

Q31

PWRLED#_DB

C

R1

IN

132

R2

R1

OUT

B

R2

PDTC143ZU-GP-U

84.00143.E1K

Q30

R1

B

R2

PDTC143ZU-GP-U

84.00143.E1K

Q29

R1

B

PDTC143ZU-GP-U

84.00143.E1K

Q28

R1

B

R2

PDTC143ZU-GP-U

84.00143.E1K

GND

B

PDTC143ZU-GP-U

84.00143.E1K

E

STDBY_LED#_BD STDBY_LED#_R

C E

R2

C E

WLAN_LED#_1

WLAN_TEST_LED30

Q18

R1

R2

C E

DC_BATFULL#

CHARGE_LED#

R34

1 2

33R2J-2-GP

BT_LED#

R451

R450

FRONT_PWRLED30

D D

C C

CHARGE_LED30

WLAN_LED#_MC27

STDBY_LED30

DC_BATFULL30

Q4

CHDTA143ZUPT-GP

84.00143.J11

BT_LED30

1 2

56R2J-4-GP

1 2

56R2J-4-GP

R449

1 2

56R2J-4-GP

R448

1 2

56R2J-4-GP

G

4

FRONT_PWRLED#_R

DC_BATFULL#_R

CHARGE_LED#_R

WLAN_LED#

Q5

Q5 2N7002-11-GP

2N7002-11-GP

S D

LED5

LED-GY-14-GP

83.00195.I70

13

24

LED6

LED-GY-14-GP

83.00195.I70

3D3V_S5

3D3V_AUX_S5

13

24

3

2

1

Power Button

SW1

1

3 5

2 4

SW-TACT-122-GP

62.40009.681

2nd: 62.40009.671

SB

R458

FRONT_PWRLED#_PBPWRLED#_DB

1 2

56R2J-4-GP

R465

STDBY_LED#_BD STDBY_LED#_PB

R465

1 2

56R2J-4-GP

KBC_PWRBTN#_1 KBC_PWRBTN#

12

LED-GY-14-GP

EC5

EC5 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

DY

LED3

13

24

83.00195.I70

R8

1 2

470R2J-2-GPR8470R2J-2-GP

3D3V_AUX_S5

3D3V_S5

RN74

1 2 3

SRN10KJ-5-GP

KBC_PWRBTN# 30

KBC_PWRBTN#

4

BLON_OUT 14,30

E Power Button

SW2

1

2 4

SW-TACT-122-GP

62.40009.681

3 5

B B

E-BUTTON#_CN_1 E-BUTTON#

12

2nd: 62.40009.671

-1

LAUNCHCN1

16

1 2

3 4 5 6 7 8 9

17

MLX-CON15-1-GP

20.K0185.015

10 11 12 13 14 15

A A

5

EC13

EC13 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

DY

3D3V_S0

R462

1 2

470R2J-2-GP

C116 SC1U16V3ZY-GP

1 2

DY

EC22 SCD1U16V2ZY-2GP

1 2

DY

EC180 SCD1U16V2ZY-2GP

1 2

DY

WLAN_LED# BT_LED# Volume_Up# BT_BTN# WIRELESS_BTN# Volume_Down# MEDIA_LED# CAP_LED# NUM_LED# INT_MIC

4

-1

5V_S0

1 2

DY

Volume_Up# 30 BT_BTN# 30 WIRELESS_BTN# 30 Volume_Down# 30

MEDIA_LED# 17

CAP_LED# 30

NUM_LED# 30

INT_MIC 28

E-BUTTON# 30

EC181

EC181 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

WLAN_LED# BT_LED# Volume_Up# BT_BTN# WIRELESS_BTN# Volume_Down# MEDIA_LED# CAP_LED# NUM_LED# INT_MIC

1 2

EC11 SC220P50V2JN-3GP

DY

1 2

EC182 SC220P50V2JN-3GP

DY

1 2

EC141 SC220P50V2JN-3GP

DY

1 2

EC142 SC220P50V2JN-3GP

DY

1 2

EC143 SC220P50V2JN-3GP

DY

1 2

EC144 SC220P50V2JN-3GP

DY

1 2

EC123 SC220P50V2JN-3GP

DY

1 2

EC122 SC220P50V2JN-3GP

DY

1 2

EC121 SC220P50V2JN-3GP

DY

1 2

EC149 SC220P50V2JN-3GP

EMI

3

3D3V_S0 5V_S0 WLAN_LED# BT_LED# Volume_Up# BT_BTN# WIRELESS_BTN# Volume_Down# MEDIA_LED# CAP_LED# NUM_LED# INT_MIC

2

1 1 1 1 1 1 1 1 1 1 1 1

Title

Size Document Number Rev

Date: Sheet

TP58AFTE14P-GP TP58AFTE14P-GP TP189AFTE14P-GP TP189AFTE14P-GP TP190AFTE14P-GP TP190AFTE14P-GP TP191AFTE14P-GP TP191AFTE14P-GP TP192AFTE14P-GP TP192AFTE14P-GP TP193AFTE14P-GP TP193AFTE14P-GP TP194AFTE14P-GP TP194AFTE14P-GP TP195AFTE14P-GP TP195AFTE14P-GP TP53AFTE14P-GP TP53AFTE14P-GP TP54AFTE14P-GP TP54AFTE14P-GP TP55AFTE14P-GP TP55AFTE14P-GP TP178AFTE14P-GP TP178AFTE14P-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

POWER /LAUNCH/LED BOARD

Cathedral Peak II

of

16 43Wednesday, July 16, 2008

of

16 43Wednesday, July 16, 2008

of

16 43Wednesday, July 16, 2008

1

SC

5

hexainf@hotmail.com

3D3V_AUX_S5

D D

-1

RTC1

PWR GND

NP1 NP2

BAT-CON2-1-GP-U

62.70001.011

C C

ACZ_SYNC

B B

A A

3D3V_S0

ACZ_BTCLK_MDC

ACZ_BITCLK

R265

RTC_BAT

1 2 NP1 NP2

12

C353

DY

SCD1U16V2ZY-2GP

12

EC161

EC161 SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY

R299

1 2

10KR2J-3-GP

DY

1 2

EC187 SC22P50V2JN-4GP

DY

1 2

EC188 SC22P50V2JN-4GP

1 2

1KR2J-1-GP

MEDIA_LED#

D9

2

3

1

CH715FPT-GP

83.R0304.B81

RTC_BAT_R

R282 1MR2J-1-GPR282 1MR2J-1-GP

GLAN_COMP place within 500 mil of ICH9M

ACZ_BTCLK_MDC23

ACZ_BITCLK28

ACZ_SYNC23,28 ACZ_RST#23,28 ACZ_SDATAOUT23,28

3D3V_S0

HDD ODD

RTC_AUX_S5 RTC_AUX_S5

12

R90

R90 330KR2F-L-GP

330KR2F-L-GP

INTVRMEN LAN100_SLP

12

R91

DY

0R2J-2-GP

EMI

5

RTC_AUX_S5

RN75

RN75 SRN20KJ-GP-U

SRN20KJ-GP-U

2 3 1

1 2

SC1U16V3ZY-GP

TP148TPAD30 TP148TPAD30

12

C74

C74 SC1U16V3ZY-GP

SC1U16V3ZY-GP

4

C73

MEDIA_LED#16

SATA_RXN022

SATA_RXP022 SATA_TXN022 SATA_TXP022

SATA_RXN122

SATA_RXP122 SATA_TXN122 SATA_TXP122

4

12

R453

1 2

R452 0R0402-PADR452 0R0402-PAD

RN9

1 2 3 4 5

SRN33J-7-GP

HDA_DOCK_RST#

12

R93

R93 330KR2F-L-GP

330KR2F-L-GP

12

R92

DY

0R2J-2-GP

4

12

C354

C354 SC1U16V3ZY-GP

SC1U16V3ZY-GP

C91

1 2

SC12P50V2JN-3GP

X-32D768KHZ-38GPU

82.30001.691

C92

1 2

SC12P50V2JN-3GP

1D5V_S0

GLAN_DOCK#18

22R2J-2-GP

12

ACZ_SYNC_R

8

ACZ_RST#_R

7

ACZ_SDATAOUT_R

6

1 2

R302 8K2R2J-3-GP

C146 SCD01U50V2KX-1GPC146 SCD01U50V2KX-1GP

1 2

C145 SCD01U50V2KX-1GPC145 SCD01U50V2KX-1GP

1 2

C147 SCD01U50V2KX-1GPC147 SCD01U50V2KX-1GP

1 2

C148 SCD01U50V2KX-1GPC148 SCD01U50V2KX-1GP

1 2

C149 SCD01U50V2KX-1GPC149 SCD01U50V2KX-1GP

1 2

C150 SCD01U50V2KX-1GPC150 SCD01U50V2KX-1GP

1 2

C144 SCD01U50V2KX-1GPC144 SCD01U50V2KX-1GP

1 2

C143 SCD01U50V2KX-1GPC143 SCD01U50V2KX-1GP

1 2

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

integrated VccLan1_05VccCL1_05

LAN100_SLP

RTC_X1

4

X2

12

R95

R95 10MR2J-L-GP

10MR2J-L-GP

1

2 3

RTC_X2

RTC_RST# SRTC_RST#

INTRUDER# INTVRMEN

LAN100_SLP

LAN_RSTYNC

TP143TPAD30 TP143TPAD30

GLAN_DOCK#

GLAN_COMP

R284

1 2

24D9R2F-L-GP

ACZ_BIT_CLK_R

ACZ_SDATAIN028 ACZ_SDATAIN123

ACZ_SDATAOUT_R HDA_DOCK_EN#

DY

SATA_RXN0_C SATA_RXP0_C SATA_TXN0_C SATA_TXP0_C

SATA_RXN1_C SATA_RXP1_C SATA_TXN1_C SATA_TXP1_C

High=Enable Low=Disable

3

U16A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M-GP-NF

71.ICH9M.00U

3

1 OF 6

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

STPCLK#

THRMTRIP#

SATA4RXN

IHDA

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN

SATA_CLKP

SATA

SATARBIAS#

SATARBIAS

RCIN#

2

LPC_LAD[0..3]

LPC_LAD0

K5

LPC_LAD1

K4

LPC_LAD2

L6

LPC_LAD3

K2 K3

LDRQ0#

J3

3D3V_LDRQ1_S0

J1 N7

AJ27

H_DPRSTP#

AJ25 AE23

H_FERR#_R

AJ26 AD22 AF25 AE22

INIT#

AG25

INTR

L3 AF23

NMI

AF24

SMI#

AH27 AG26

ICH_TP8

AG27

PECI

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18

AJ7 AH7

CLK_PCIE_SATA# 3

CLK_PCIE_SATA 3

SATARBIAS

R301

24D9R2F-L-GP

Place within 500 mils of ICH9 ball

2

LPC_LAD[0..3] 30,31

LPC_LFRAME# 30,31

TP146 TPAD30TP146 TPAD30 TP50 TPAD30TP50 TPAD30

KA20GATE 30 H_A20M# 4

H_DPRSTP# 4,7,34 H_DPSLP# 4

H_PWRGD 4,32,41 H_IGNNE# 4 H_INIT# 4

H_INTR 4 KBRCIN# 30

H_STPCLK# 4

H_THERMTRIP_R

TP96 TPAD30TP96 TPAD30

12

Title

Size Document Number Rev

Date: Sheet

H_NMI 4 H_SMI# 4

H_THERMTRIP_R

H_FERR#4

1 2

DY

R300

R300 54D9R2F-L1-GP

54D9R2F-L1-GP

1D05V_S0 3D3V_S0

RN14

SRN10KJ-5-GP

H_INIT#_G

Q13

CBE

MMBT3904-3-GP

ICH9-M (1 of 4)

Cathedral Peak II

1

1D05V_S0

12

R297

DY

56R2J-4-GP

H_DPSLP#

1D05V_S0

RN8

1

8

2

7

H_FERR#_R

3

6

4 5

SRN56J-5-GP

R296

R296 200R2F-L-GP

200R2F-L-GP

H_PWRGD

1 2

DY

PM_THRMTRIP-A# 4,7,32

Layout note: R373 needs to placed within 2" of ICH9, R379 must be placed within 2" of R373 w/o stub

1

23

4

FWH_INIT#H_INIT#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

17 43Wednesday, July 16, 2008

1

1D05V_S0

FWH_INIT# 31

of

SC

5

U16B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

D D

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

C C

PCI_PERR# INT_PIRQE# PCI_LOCK# INT_PIRQA#

3D3V_S0

PCI_REQ#2 PCI_REQ#1

PM_CLKRUN#

3D3V_S0

PCIE_RXN125

PCIE_RXP125 PCIE_TXN125 PCIE_TXP125

LAN

PCIE_RXN227

PCIE_RXP227 PCIE_TXN227 PCIE_TXP227

MINICARD1

B B

PCIE_RXN527

PCIE_RXP527 PCIE_TXN527 PCIE_TXP527

NEW CARD

A A

F11

E7 A3 D2

F10

D5

D10

B3 F7 C3 F3 F4 C1 G7 H7 D1 G5 H6 G1 H3

J5 E1 J6

RP5

1 2 3 4 5 6

SRN8K2J-2-GP-U

SRN8K2J-2-GP-U RP3

RP3

1 2 3 4 5 6

SRN8K2J-2-GP-U

C399 SCD1U10V2KX-5GPC399 SCD1U10V2KX-5GP C403 SCD1U10V2KX-5GPC403 SCD1U10V2KX-5GP

C391 SCD1U10V2KX-5GPC391 SCD1U10V2KX-5GP C395 SCD1U10V2KX-5GPC395 SCD1U10V2KX-5GP

C372 SCD1U10V2KX-5GPC372 SCD1U10V2KX-5GP C379 SCD1U10V2KX-5GPC379 SCD1U10V2KX-5GP

USB_OC#023

USB_OC#423

5

AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C4PIRQH#/GPIO5

ICH9M-GP-NF

71.ICH9M.00U

10 9

PCI_REQ#0

8

INT_PIRQC#

7

INT_PIRQB#

10

INT_SERIRQ

9

PCI_DEVSEL#

8

PCI_STOP#

7

PCI_FRAME#

R130

22D6R2F-L1-GP

PCI

3D3V_S0

INT_PIRQH#

3D3V_S0

12

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR# STOP# TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4

3D3V_S0

12

SPI_CS#1

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USB_RBIAS_PN

2 OF 6

PAR

PCI_REQ#3 INT_PIRQF# INT_PIRQG# PCI_SERR#

TXN1 TXP1

TXN2 TXP2

TXN5 TXP5

PCI_REQ#0

F1

PCI_GNT#0

G4

PCI_REQ#1

B6 A7

PCI_REQ#2

F13 F12

PCI_REQ#3

E6

PCI_GNT#3

F6 D8

B4 D6 A5

PCI_IRDY#

D3

PCI_PAR

E3 R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_LOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#_R

C14 D4 R2

ICH_PME#

INT_PIRQE#

H4

INT_PIRQF#

K6

INT_PIRQG#

F2

INT_PIRQH#

G2

1 2 3 4 5 6

U16D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M-GP-NF

71.ICH9M.00U

RP4

SRN8K2J-2-GP-U

4

TP142 TPAD30TP142 TPAD30

C357

DY

SC100P50V2JN-3GP

1 2

R271

12

PLT_RST1# 7,25,27,30,31

0R2J-2-GP

PCLK_ICH 3

TP56 TPAD30TP56 TPAD30

3D3V_S0

10

INT_PIRQD#

9

PCI_IRDY#

8

PCI_TRDY#

7

ECSCI#_1

4 OF 6

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

T25

PCI-Express

DMI_CLKP

Direct Media Interface

AF29

DMI_ZCOMP

AF28

DMI_IRCOMP

AC5

USBP0N

AC4

USBP0P

AD3

USBP1N

AD2

USBP1P

AC1

USBP2N

AC2

USBP2P

AA5

USBP3N

AA4

USBP3P

AB2

USBP4N

AB3

USBP4P

AA1

USBP5N

AA2

SPI

USBP5P

W5

USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

4

USB

3D3V_S5

(GPIO6,GPIO22)

ICS (0, 1) Realtek (1, 1) Seligo (1, 0)

3D3V_S0

-1

12

RTL+SEL

R135

R135 1KR2J-1-GP

1KR2J-1-GP

R141

10KR2J-3-GP

ICS

21

12

R136

G10

1KR2J-1-GP

GAP-OPEN

DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7

DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7

DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7

DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3

DMI_IRCOMP_R

USBPN0 23 USBPP0 23

USBPN4 23 USBPP4 23

USBPN2 23 USBPP2 23

USBPN5 23 USBPP5 23

USBPN7 27 USBPP7 27 USBPN8 14 USBPP8 14 USBPN9 27 USBPP9 27 USBPN10 24 USBPP10 24

3D3V_S5

1D5V_S0

12

Pair

0 1 2 3 4 5 6 7 8 9 NEW1 10 11 NC

1 2 3

3

SMB_CLK20,27 SMB_DATA20,27

ICS+RTL

12

R305

R305 1KR2J-1-GP

1KR2J-1-GP

CLK_SEL_1

SEL

12

R306

R306 1KR2J-1-GP

1KR2J-1-GP

MCH_ICH_SYNC#7

GPIO49 should be pulled down to GND only when using Teenah. When using Cantiga, this ball should be left as No Connect.

RN64

GLAN_DOCK#

4

SRN10KJ-5-GP

R298

R298 24D9R2F-L-GP

24D9R2F-L-GP

USB

Device USB1 NC USB2 NC USB3 Bluetooth NC MINIC1 WEBCAM

CardReader

SMB_LINK_ALERT#

RN4

2 3 1

4

SRN10KJ-5-GP

PM_SUS_STAT#

TP147TPAD30 TP147TPAD30

PM_SYNC#7

PM_STPPCI#3 PM_STPCPU#3

PM_CLKRUN#30

PCIE_WAKE#25,27

INT_SERIRQ30

THRM#21

VGATE_PWRGD7,21,34

R89

1 2

DY

SB_GPIO1

ECSCI#_130

ECSWI#30

TP140TPAD30 TP140TPAD30

TP51TPAD30 TP51TPAD30

CLK_SEL_0

TP149TPAD30 TP149TPAD30

TP152TPAD30 TP152TPAD30

ACZ_SPKR28

TP138TPAD30 TP138TPAD30

No Reboot Strap

SPKR LOW = Defaule

High=No Reboot

GLAN_DOCK# 17

GPIO57

SDATAOUT1

SB_GPIO1 SB_GPIO13

PWROK

GNT0 and SPI_CS#1 have a weak internal pull up

3

PM_RI#

DBRESET#

SMB_ALERT#

0R2J-2-GP

GPIO12

SB_GPIO13 PSW_CLR#

PCB_VER0 PCB_VER1 SDATAOUT1 GPIO49 GPIO57

ICH_TP3

SMLINK0 SMLINK1

ICH_TP7

GPIO18 GPIO20

R288

1 2 3

SRN10KJ-5-GP

1 2

U16C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

SST

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LAN_PHY_PWR_CTRL/GPIO12

C21

ENERGY_DETECT/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

PWM0

AJ20

PWM1

AJ21

PWM2

ICH9M-GP-NF

71.ICH9M.00U

3D3V_S0

RN49

4

10KR2J-3-GP

BOOT BIOS Strap

0 1 SPI

A16 swap override strap

PCI_GNT#3

PCI_GNT#0 SPI_CS#1 PCI_GNT#3

2

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

SYS GPIO

GPIO

MISC

USB_OC#1

1

PM_BATLOW#_R

2

ECSWI#

3

USB_OC#0 GPIO10

4 5 6

3D3V_S5

USB_OC#2 USB_OC#7 PM_RI#

3D3V_S5

3D3V_S0

R134

10KR2J-3-GP

12

DY

PCB_VER0 PCB_VER1

R133

10KR2J-3-GP

12

CLK14 CLK48

SUSCLK

Clocks

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW# PWRBTN# LAN_RST#

RSMRST#

Power MGTController Link

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

GPIO24/MEM_LED

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

GPIO9/WOL_EN

RP2

10 9 8 7

SRN10KJ-L3-GP

RP1

1 2 3 4 5 6

SRN10KJ-L3-GP

R144

10KR2J-3-GP

12

R145

10KR2J-3-GP

12

DY

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

01

PCI

11

LPC(Default)

low = A16 swap override enable high = default

1KR2J-1-GP

1 2

R286

1 2

R287

1 2

R285

1KR2J-1-GP

1KR2J-1-GP 1KR2J-1-GP

1KR2J-1-GP

DY

DY DY

DY

2

3 OF 6

SATA0GP

AH23

SATA1GP

AF19

GPIO36

AE21

GPIO37

AD20 H1

AF3 P1 C16

E16 G17

C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 F24

B19 F22

C19 C25

A19 F21

D18 A16

C18 C11 C20

3D3V_S5

USB_OC#5 SMB_LINK_ALERT#

SMB_ALERT#

10 9 8 7

PlanarID (1,0) SA: 0,0 SB: 0,1 SC: 1,0 SD: 1,1

CLK_ICH14 3 CLK48_ICH 3

PM_SUS_CLK 21

PM_SLP_S3# 27,30,32,36,37,38

SLPS5# S4_STATE#

PM_DPRSLPVR

RSMRST#_SB

PM_SLP_M#

GPIO24 GPIO10 GPIO14 GPIO9

USB_OC#4 DBRESET# USB_OC#3PCIE_WAKE# USB_OC#6

PM_SLP_S4# 27,30,36,37

TP144 TPAD30TP144 TPAD30

TP141 TPAD30TP141 TPAD30

PWROK 7,32

R289

1 2

DY

PWROK 7,32

TP31 TPAD30TP31 TPAD30

CL_CLK0 7

CL_DATA0 7

CL_VREF0_ICH CL_VREF1_ICH

TP32

TPAD30

TP139 TPAD30TP139 TPAD30

DY

100KR2J-1-GP

1

D21

D21 BAS16PT-GP

BAS16PT-GP

2

CLK_PWRGD 3

3K24R2F-GP

C360

DY

R74

1 2

2

BAT54-7-F-GP

ICH9-M (2 of 4)

Cathedral Peak II

PM_BATLOW#_R PWRBTN#_ICH

CL_RST#0 7

3D3V_S5

RSMRST#_KBC30

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

1

RN11

45 3

6

2

7

1

8

SRN10KJ-6-GP

PM_DPRSLPVR 7,34

3

12

D7

DY

PM_PWRBTN# 30,41

3D3V_S0

12

R281

3K24R2F-GP

12

1

R274

R274 453R2F-1-GP

453R2F-1-GP

DY

8 7 6

SRN10KJ-6-GP

1 2 3

3D3V_S5

12

18 43Wednesday, July 16, 2008

12

C365

SCD1U10V2KX-4GP

12

RN47

RN45

SRN10KJ-5-GP

R73

R73 10KR2J-3-GP

10KR2J-3-GP

RSMRST#_SB

R273

R273 100KR2J-1-GP

100KR2J-1-GP

of

3D3V_S5

R275

DY

SCD1U10V2KX-4GP

USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

GPIO14

0R2J-2-GP

1

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

R283

R283 453R2F-1-GP

453R2F-1-GP

3D3V_S5

1 2 3 45

4

SC

5

hexainf@hotmail.com

1D5V_S0

D D

2mA

C C

Layout Note: Place near ICH9

2mA

B B

3D3V_S0

SCD1U10V2KX-4GP

A A

646mA

12

C422

C389

SCD1U10V2KX-4GP

DY

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

5V_S0

21

V5REF_S0

12

21

V5REF_S5 VccSus1_05

12

19mA in S0;78mA in S3/S4/S5

12

C364

D10

CH751H-40PT

C361

C361 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

D13

CH751H-40PT

C134

C134 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C384

SCD1U10V2KX-4GP

DY

SC4D7U6D3V3KX-GP

5

12

5V_S53D3V_S5

12

1D5V_S0

R276

R276 100R2J-2-GP

100R2J-2-GP

R122

R122 100R2J-2-GP

100R2J-2-GP

1D5V_S0

C368

SCD1U10V2KX-4GP

80mA

12

C390

23mA

C362

12

C383

DY

SCD1U10V2KX-4GP

RTC_AUX_S5

12

C412

SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

1D5V_S0

C419

USBPLL=11mA

12

C418

1

2

12

1 2

SC4D7U6D3V3MX-2GP

12

C358

C359

SCD1U10V2KX-4GP

12

C417

SCD1U10V2KX-4GP

47mA

L1

IND-1D2UH-10-GP

68.1R220.10D

C152

1.34A

12

C408

SC1U16V3ZY-GP

12

C420

SCD1U10V2KX-4GP

DY

C429

DY

3D3V_S0

4

6uA in G3

12

SCD1U10V2KX-4GP

DY

12

C423

SCD1U10V2KX-4GP

1D5V_APLL_S01D5V_S03D3V_S0

12

C151

SC1U16V3ZY-GP

12

C388

SC1U16V3ZY-GP

DY

12

C428

SCD1U10V2KX-4GP

12

C416

SCD1U10V2KX-4GP

DY

12

C363

SCD1U10V2KX-4GP

12

C394

C394 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1mA

4

12

V5REF_S0 V5REF_S5

VccLan1D05

AG15

AG10 AG11

A23

A6

AE1

AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29

F25 G25 H24 H25

J24

J25 K24 K25

L23

L24

L25 M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T24 T27 T28 T29 U24 U25 V24 V25 U23 W24 W25 K23 Y24 Y25

AJ19

AC16 AD15 AD16 AE15 AF15

AH15

AJ15

AC11 AD11 AE11 AF11

AH10

AJ10

AC9

AC18 AC19

AC21

G10

G9

AC12 AC13 AC14

AJ5 AA7

AB6 AB7 AC6 AC7

A10 A11

A12 B12

A27 D28

D29 E26 E27

A26

U16F

VCCRTC V5REF V5REF_SUS VCC1_5_B

VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

VCCSATAPLL VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCCUSBPLL VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCCLAN1_05 VCCLAN1_05

VCCLAN3_3 VCCLAN3_3

VCCGLANPLL VCCGLAN1_5

VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5

VCCGLAN3_3

ICH9M-GP-NF

71.ICH9M.00U

CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

PCI

VCCPSUSVCCPUSB

GLAN POWER

3

6 OF 6

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCCDMIPLL

VCCDMI VCCDMI

V_CPU_IO V_CPU_IO

VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCCHDA VCCSUSHDA VCCSUS1_05

VCCSUS1_05

VCCSUS1_5 VCCSUS1_5

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCCL1_05

VCCCL1_5 VCCCL3_3

VCCCL3_3

3

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29

1D05V_DMI_ICH_S0

W23 Y23

AB23 AC23

AG29 AJ6 AC10 AD19

AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4 AJ3 AC8

F17 AD8

1D5V_S5

F18

A18 D16 D17 E22

AF1 T1

T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

VccSus1_05[3]

G22

VccSus1_5[3]

G23 A24

B24

C378

SCD1U10V2KX-4GP

12

DY

12

DY

12

C385

C385 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C366

SCD1U10V2KX-4GP

C410

SCD1U10V2KX-4GP

-1

12

C407

C405

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

12

C413

C430

C430 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC3_3=308mA

3D3V_S0

12

C370

C373

SCD1U10V2KX-4GP

C376

1 2

SCD1U10V2KX-4GP

12

C369

SCD1U10V2KX-4GP

12

C404

SCD1U10V2KX-4GP

TP145 TPAD28TP145 TPAD28

DY

SC10U6D3V5MX-3GP

DY

3D3V_S0

12

C414

12

19mA in S0;73mA in S3/S4/S5

2

Place near ICH9MLayout Note:

12

C396

C409

SCD1U10V2KX-4GP

1D5V_DMIPLL_ICH_S0

SCD01U16V2KX-3GP

12

C415

DY

SC4D7U6D3V3KX-GP

DY

3D3V_S0

C426

C426 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S0

12

C425

SCD1U10V2KX-4GP

C387

SCD1U10V2KX-4GP

1D5V_S5

12

C371

C371 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCSUS3_3=212mA

12

C402

C402 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

C386

12

SCD1U10V2KX-4GP

DY

2

1.63A

12

C400

R294

1 2

0R0603-PAD

12

3D3V_S5

1D05V_S0

12

C398

C367

SCD1U10V2KX-4GP

DY

L10

23mA

1 2

IND-1D2UH-10-GP

12

68.1R220.10D

DY

C401

C401 SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

48mA

1D05V_S0

2mA

12

C406

SCD1U10V2KX-4GP

11mA

C431

C431 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S0

11mA

12

C432

C432 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Title

Size Document Number Rev

Date: Sheet

1D05V_S0

12

C392

DY

C382

SCD1U10V2KX-4GP

3D3V_S5

C411

SCD1U10V2KX-4GP

1D5V_S0

12

C393

SC4D7U6D3V3KX-GP

ICH9-M (3 of 4)

Cathedral Peak II

1

12

C377

SCD1U10V2KX-4GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

19 43Wednesday, July 16, 2008

of

19 43Wednesday, July 16, 2008

of

19 43Wednesday, July 16, 2008

1

SC

A

4 4

3 3

2 2

1 1

A

AA26 AA27

AA23 AB28 AB29

AC17 AC26 AC27

AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29

AE12 AE13 AE14 AE16 AE17

AE20 AE24

AF13 AF16 AF18 AF22 AH26 AF26 AF27

AG13 AG16 AG18 AG20 AG23

AH12 AH14 AH17 AH19

AH22 AH25 AH28

AA3 AA6 AB1

AB4 AB5

AC3 AD1

AD4 AD5 AD6 AD7 AD9

AE2

AE3 AE4 AE6 AE9

AF5 AF7 AF9

AG3 AG6 AG9

AH2

AH5

AH8 AJ12 AJ14 AJ17

AJ8 B11 B14 B17

B2 B20 B23

B5

B8 C26 C27 E11 E14 E18

E2 E21 E24

E5

E8 F16 F28 F29

G12 G14 G18 G21 G24 G26 G27

G8

H2 H23 H28 H29

U16E

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NCTF TEST PIN:

VSS VSS VSS

ICH9M-GP-NF

71.ICH9M.00U

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

NCTF_VSS#A1 NCTF_VSS#A2

NCTF_VSS#B1 NCTF_VSS#A29 NCTF_VSS#A28 NCTF_VSS#B29

NCTF_VSS#AJ1 NCTF_VSS#AJ2

NCTF_VSS#AH1

NCTF_VSS#AJ28 NCTF_VSS#AJ29

NCTF_VSS#AH29

5 OF 6

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 B1 A29 A28 B29 AJ1 AJ2 AH1 AJ28 AJ29 AH29

B

TP33 TPAD30TP33 TPAD30 TP35 TPAD30TP35 TPAD30 TP46 TPAD30TP46 TPAD30 TP43 TPAD30TP43 TPAD30 TP38 TPAD30TP38 TPAD30 TP45 TPAD30TP45 TPAD30 TP98 TPAD30TP98 TPAD30 TP101 TPAD30TP101 TPAD30 TP99 TPAD30TP99 TPAD30 TP102 TPAD30TP102 TPAD30 TP100 TPAD30TP100 TPAD30 TP97 TPAD30TP97 TPAD30

C

SMB_CLK18,27

SMB_DATA18,27

D

3D3V_S5 3D3V_S0

678

123

4 5

5V_S0

Q6

3 4 2 1

RN43

RN43 SRN2K2J-2-GP

SRN2K2J-2-GP

5

2N7002DW-1-GP

6

E

SMBC_ICH 3,12,13

SMBD_ICH 3,12,13

SMBUS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (4 of 4)

Cathedral Peak II

E

SC

of

20 43Wednesday, July 16, 2008

of

20 43Wednesday, July 16, 2008

of

20 43Wednesday, July 16, 2008

H_THERMDC4

hexainf@hotmail.com

H_THERMDA4

1.For CPU Sensor

SC470P50V3JN-2GP

C119

C374 must be near Q7

E

Q12

MMBT3904-3-GP

84.03904.L06

C

2.System Sensor, Put between CPU and NB.

C140

B

SC470P50V3JN-2GP

DY

C375 must be near Q8

E

Q7

MMBT3904-3-GP

84.03904.L06

Q7

C83

B

SC470P50V3JN-2GP

DY

C

3.HW T8 sensor

RUN_POWER_ON

Q10

G

PM_SUS_CLK18

32K suspend clock output

SD

2N7002-11-GP

84.27002.N31

C107

SC4D7U10V5ZY-3GP

3D3V_S0

R115

1 2

49D9R2F-GP

12

Layout notice : Both H_THERMDA and THERMDC routing 10 mil trace width and 10 mil spacing

Layout notice : Both DN2 and DP2 routing 10 mil trace width and 10 mil spacing

C125

C125 SC470P50V3JN-2GP

SC470P50V3JN-2GP

1 2

C373 must be near EMC2102

Layout notice : Both DN3 and DP3 routing 10 mil trace width and 10 mil spacing

C121

C121 SC470P50V3JN-2GP

SC470P50V3JN-2GP

1 2

C372 must be near EMC2102

R108

R108 10R2F-L-GP

CLK_32K_R CLK_32K

10R2F-L-GP

12

5V_S0

1 2

R106

R106 240KR3-GP

240KR3-GP

3D3V_S0

-1

12

DY

C109

SCD1U16V2ZY-2GP

EMC2102_VDD_3D3

C118

C118 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

EMC2102_DN2 EMC2102_DP2 EMC2102_DN3 EMC2102_DP3

GND = Channel 1 OPEN = Channel 3 +3.3V = Disabled

3D3V_S0

GND = Fan is OFF OPEN = Fan is at 60% full-scale +3.3V = Fan is at 75% full-scale

R113

DY

10KR2J-3-GP

R291

DY

10KR2J-3-GP

1 2 3

1 2 3 4 5 6 7

EMC2102-DZK-GP

12

RN7

SRN10KJ-5-GP

U15

VDD_3V DN1 DP1 DN2 DP2 DN3 DP3

74.02102.A73

12

EMC2102_FAN_TACH_1

4

29

GND

EMC2102_SHDN

EMC2102_FAN_mode

3D3V_AUX_S5

EMC2102_FAN_TACH

EMC2102_FAN_DRIVE

28

24

27

26

FANb25FANa

TACH

VDD_5Vb

VDD_5Va

EMC2102

SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#

NC#8

8

3D3V_S0

3D3V_AUX_S5

22

23

SMCLK

SMDATA

NC#21

GND

ALERT#

CLK_IN

CLK_SEL

RESET#

NC#15

14

VGATE_PWRGD

PURE_HW_SHUTDOWN#

RN65

6 7 8

SRN10KJ-6-GP

D11

D11 SSM14PT-GP-U

SSM14PT-GP-U

KA

83.1R004.E8M

12

C332

C332 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SMBC_Therm 30 SMBD_Therm 30

21 20 19 18

EMC2102_CLK_SEL

17 16 15

EMC2102_CLK_SEL

THRM#

V_DEGREE

PURE_HW_SHUTDOWN#

45 3

RSMRST#

2

EMC2102_FAN_mode

1

EMC2102_FAN_TACH_1

ALERT# CLK_32K

RN6

6 7 8

SRN10KJ-6-GP

KA

0R2J-2-GP

45 3 2 1

R107

3D3V_S0

FAN1

3 2

*Layout* 15 mil

D19

D19 SSM14PT-GP-U

SSM14PT-GP-U

83.1R004.E8M

EMC2102_FAN_TACH_1 EMC2102_FAN_DRIVE

12

DY

GND = Internal Oscillator Selected +3.3V = External 32.768kHz Clock Selected

3D3V_S0

SCD1U16V2ZY-2GP

12

C397

SCD1U16V2ZY-2GP

12

C111

1

MLX-CON3-10-GP-U

20.F1000.003

2nd: 20.F0714.003 3nd: 20.D0246.103

1 1

THRM# 18

EMC2102_PWROK 32

12

R290

R290 10KR2F-2-GP

10KR2F-2-GP

TRIP_SET Pin Voltage V_DEGREE =(((Degree-75)/21)

12

R110

R110 3KR2F-GP

3KR2F-GP

T8 90 degree

5

4

TP187AFTE14P-GP TP187AFTE14P-GP TP188AFTE14P-GP TP188AFTE14P-GP

VGATE_PWRGD7,18,34

PURE_HW_SHUTDOWN# RSMRST#

G

S D

2N7002-11-GP

84.27002.N31

Q11

DY

D12

123

BAT54-7-F-GP

83.R2003.F81

(dummy, KBC already delay)

12

C113

DY

SCD1U16V2ZY-2GP

RSMRST# 30,32

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

of

21 43Wednesday, July 16, 2008

of

21 43Wednesday, July 16, 2008

of

21 43Wednesday, July 16, 2008

SC

5

4

3

2

1

SATA ODD Connector

D D

ODD1

SATA_RXP117 SATA_RXN117

SATA_TXP117

5V_S0

C C

B B

SATA_TXN117

12

TC10

C229

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

S6 S5

S2

P3 P2

9

B+

GND

8

B-

GND

P6

GND

P5

GND

S7

A+

GND

S4

A-S3GND

S1

GND

P1

DP

+5V

P4

+5V

MD

SKT-SATA7P+6P-39-GP-U

62.10065.541

ODD_DP ODD_MD

R199

10KR2J-3-GP

TP161 TPAD30TP161 TPAD30

12

DY

SATA Connector

SATA1

23 NP1 1

2 3 4 5 6 7 8 9 10 11 12 13 14 15

16 17 18 19 20 21 22 NP2

62.10065.471

24

SKT-SATA22P-27-GP

SATA_RXP0 17 SATA_RXN0 17

SATA_TXN0 17 SATA_TXP0 17

5V_S0

KA

12

TC23

SC10U10V5ZY-1GP

D23

C499

SCD1U16V2ZY-2GP

SSM24PT-GP

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

HDD & CDROM

Cathedral Peak II

1

SC

of

22 43Wednesday, July 16, 2008

5

hexainf@hotmail.com

R278

R278 0R0402-PAD

0R0402-PAD

USBPN018 USBPP018

D D

USBPN218 USBPP218

C C

USBPN418 USBPP418

R279

R279 0R0402-PAD

0R0402-PAD

12

R292

R292 0R0402-PAD

0R0402-PAD

R293

R293 0R0402-PAD

0R0402-PAD

R464

R464 0R0402-PAD

0R0402-PAD

R463

R463 0R0402-PAD

0R0402-PAD

12 12

5V_USB1_S0

USB_0USB_0+

2nd: 22.10218.T51 3nd: 22.10218.P01

5V_USB1_S0

USB_2USB_2+

2nd: 22.10218.T51 3nd: 22.10218.P01

5V_USB2_S0

USB_4-

USB_4+

USB1

1 2

3 4

SKT-USB-198-GP

22.10218.W51

USB2

1 2

3 4

SKT-USB-198-GP

22.10218.W51

USB3

1 2

3 4

SKT-USB-198-GP

22.10218.W51

4

5

6

5

6

5

6

SC4D7U10V3KX-GP

USB_OC#018

5V_S5

C45

USB_PWR_EN#30

3

OUT#8 OUT#7 OUT#6

5V_USB1_S0

8 7 6

1

GND

5V_USB2_S0

8 7 6

USB_OC#4

5

USB_OC#4 18

12

DY

EC14

5V_S5

12

C424

12

DY

USB_PWR_EN#

EC124

12

SCD1U16V2ZY-2GP

U34

3

IN#3

2

IN#2

5

OC#

4

EN/EN#

G545A2P8U-GP

74.00545.A79

2nd source 74.09711.079

U57

1

GND

VOUT

2

VIN

VOUT

3

VIN

VOUT

EN/EN#4FLG#

RT9711BPF-GP

74.09711.079

SCD1U16V2ZY-2GP

60mil

2

5V_USB1_S0

100 mil

12

TC14

TC15

ST150U6D3VBM-2-GP

DY

5V_USB2_S0

12

TC28

12

EC114

EC115

ST150U6D3VDM-18GP

EC115

SCD1U16V2ZY-2GP

SC1000P50V3JN-GP

DY

12

EC184

EC183

ST100U6D3VBM-5GP

SC1000P50V3JN-GP

SCD1U16V2ZY-2GP

DY

1

2nd source 74.00545.A79

BLUETOOTH MODULE

B B

3D3V_BT_S0

12

EC80

DY

SCD1U16V2ZY-2GP

EC21 put near BLUE1 / all USB put one choke near connector by EMI request

A A

1.5A / High Active Voltage 2V

U26

3D3V_BT_S0

U26

1

VOUT

2

GND NC#33EN/EN#

RT9711-APBG-GP

74.09711.A7F

2nd:74.05240.A7F (G5240B1T1U-GP)

BLUE1

ETY-CON4-21-GP-U

20.F0984.004

2nd: 20.D0197.104 3nd: 20.F0689.004

5

3D3V_S0

C573

SC4D7U10V5ZY-3GP

USB_5-

USB_5+

3D3V_BT_S0

SC4D7U10V5ZY-3GP

1 2

BLUETOOTH_EN 30

DY

R232

R232 0R0402-PAD

0R0402-PAD

R233

R233 0R0402-PAD

0R0402-PAD

12

5

VIN

4

6 4

3 2

1 5

ACZ_SDATAOUT17,28

ACZ_SYNC17,28

ACZ_SDATAIN117

ACZ_RST#17,28

DY

USBPN5 18 USBPP5 18

USB_5USB_5+

3D3V_BT_S0

4

ACZ_SDATAOUT

RN76

RN76 SRN39J-GP

SRN39J-GP

1 2 3 4 5

R398

0R0402-PAD

12

C542

C542 SC22P50V2JN-4GP

SC22P50V2JN-4GP

1 1 1

MDC 1.5 CONN

MDC1

131415

NP1

1 2

ACZ_SYNC_A

ACZ_SDATAIN1_A

12

C531

C531 SC100P50V2JN-3GP

SC100P50V2JN-3GP

DY

TP134AFTE14P-GP TP134AFTE14P-GP TP136AFTE14P-GP TP136AFTE14P-GP TP133AFTE14P-GP TP133AFTE14P-GP

3 4 5 6 7 8 9 10

11 12

NP2

161718

TYCO-CONN12A-2-GP-U1

20.F0917.012

2nd: 20.F0604.012

3

8 7 6

ACZ_RST#_MDC

12

C297

C297 SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

1 2

3D3V_S5

12

C296

SC4D7U10V5ZY-3GP

3D3V_S5

ACZ_BTCLK_MDC 17

12

R222

C295

100KR2J-1-GP

DUMMY-C2

111 13 14 15

212

2

16 17 18

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

USB/BLUETOOTH/MDC

Cathedral Peak II

1

of

23 43Wednesday, July 16, 2008

of

23 43Wednesday, July 16, 2008

of

23 43Wednesday, July 16, 2008

SC

5

3D3V_A_S03D3V_D_S03D3V_S0

R428

0R0603-PAD

1 2

D D

C C

RST#

B B

R418

0R0603-PAD

1 2

R423

0R0603-PAD

1 2

SC4D7U6D3V5KX-3GP

3D3V_D_S0

12

R386

R386 100KR2J-1-GP

100KR2J-1-GP

12

C510

SC1U10V3KX-3GP

C554

3D3V_S0

SC1U10V3KX-3GP

12

SCD1U16V2ZY-2GP

1 2

MODE_SEL

C511

SC47P50V2JN-3GP

VREG

C534

DY

CARD_3D3V_S0

C544

1 2

R429

1 2

DY

68R2-GP

12

DY

R409

0R0603-PAD

1 2

3D3V_D_S0

SCD1U16V2ZY-2GP

12

R387

R387 10KR2J-3-GP

10KR2J-3-GP

C539

C539 SC1U10V3KX-3GP

SC1U10V3KX-3GP

1 2

C548

LED7

A K

DY

LED-W-23-GP

4

C524

C524 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1 2

AV_PLL

3V_VBUS_S0

-1

DY

1 2

VBUS_LEDVBUS_R

VREG

12

C529

C529 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R394

1 2

6K19R2F-GP

USBPP1018 USBPN1018

3D3V_D_S0

MODE_SEL SD_CMD

RREF

RST#

R396 0R0402-PADR396 0R0402-PAD R395 0R0402-PADR395 0R0402-PAD

CLK48_5158E3

10

33 11

45 36 14

44

USB_10+

12

USB_10-

12

R416

R416 0R0402-PAD

0R0402-PAD

9 1

8

2

CARD_3V3 AV_PLL VREG 3V3_IN D3V3

D3V3

MODE_SEL SD_CMD GPIO0 RREF RST#

12

XD_CD#

SP119SP220SP3

5

3

XD_D4

SD_WP

SD_CD#

XD_CE#

XD_CLE

SD_DAT5/XD_D0

SD_DAT4/XD_WP#

XD_R/B#

SD_DAT1/XD_D3/MS_D1_1

SD_DAT7/XD_D2/MS_D2

SD_DAT6/XD_D7/MS_D3

MS_INS#

SD_DAT2/XD_RE#

SD_DAT3/XD_WE#

SD_CLK/XD_D1/MS_CLK

29

XTLI47XTLO

48

12M_XO

31

35

SP10

SP1134SP12

12

XD_ALE

SP1337SP1438SP1539SP1640SP1741SP1842SP19

EEDO15EECS16EESK17EEDI

EECS

EESK

EEDO

EEDI

12M_XO

43

18

MS_D5 MS_D4

NC#30

NC#7 NC#3

U43

GND GND GND GND

24 22

30 7 3

6 12 32 46

RTS5158E-GR-GP

71.05158.A0G

DM4DP

21

23

XD_D5/MS_BS

SP4

SP525SP626SP727SP828SP9

XTAL_CTR

13

XDAL_CTR

SD_DAT0/XD_D6/MS_D0

12M_XI

R393

R393 0R0402-PAD

0R0402-PAD

2

SD_DAT1/XD_D3/MS_D1_1

3D3V_A_S03D3V_S0

12

C527

DY

SCD1U16V2ZY-2GP

R400

R400 0R2J-2-GP

0R2J-2-GP

DY

XD_D4

C516

DY

SC5D6P50V2CN-1GP

12

R388

270KR2F-GP

DY

12

C515

C515 SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SD_DAT1/XD_D3/MS_D1

12

R410

R410 0R0402-PAD

0R0402-PAD

EECS EESK EEDO EEDI

-4

12

DY

1 2 3

X4

X4 XTAL-12MHZ-11GP

XTAL-12MHZ-11GP

82.30006.191

1 2

U52

DY

S

VCC

C

DU

D

ORG

Q4GND

M93C46-WMN6TP-GP

12M_XI

12M_XO

1

3D3V_D_S0

8 7

C565

6

SCD1U16V2ZY-2GP

5

DY

1 2

5 IN1 CARD-READER (SD/MMC/MS/MS PRO/XD)

CARD1

CARD_3D3V_S0

12

C519

SC4D7U10V5ZY-3GP

A A

5

C505

C505 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

Pin27 change to SD_DAT1/XD_D3/MS_D1_1 for XD fail

CARD_3D3V_S0

XD_R/B# SD_DAT2/XD_RE# XD_CE# XD_CLE XD_ALE SD_DAT3/XD_WE# SD_DAT4/XD_WP# XD_CD#

SD_DAT5/XD_D0 SD_CLK/XD_D1/MS_CLK SD_DAT7/XD_D2/MS_D2 SD_DAT1/XD_D3/MS_D1_1 XD_D4 XD_D5/MS_BS XD_D5/MS_BS SD_DAT0/XD_D6/MS_D0 SD_DAT6/XD_D7/MS_D3

4

CARD1

33

XD_VCC

23

SD_VCC

14

MS_VCC

1

XD_R/B

2

XD_RE

3

XD_CE

4

XD_CLE

5

XD_ALE

6

XD_WE

7

XD_WP

34

XD_CD_SW

8

XD_D0

9

XD_D1

26

XD_D2

27

XD_D3

28

XD_D4

30

XD_D5

31

XD_D6

32

XD_D7

NP1

NP2

CARDBUS38P-GP-U

20.I0079.001

2nd: 20.I0081.001 3rd: 20.I0067.001

SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3

SD_WP_SW SD_CD_SW

SD_CMD SD_CLK

MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3

MS_SCLK

MS_INS

MS_BS

GROUND

GROUND 4IN1_GND 4IN1_GND

SD_DAT0/XD_D6/MS_D0

25

SD_DAT1/XD_D3/MS_D1

29

SD_DAT2/XD_RE#

10

SD_DAT3/XD_WE#

11

SD_WP

35

SD_CD#

36

SD_CMD

12

SD_CLK/XD_D1/MS_CLK

24

SD_DAT0/XD_D6/MS_D0

19

SD_DAT1/XD_D3/MS_D1_1

20

SD_DAT7/XD_D2/MS_D2

18

SD_DAT6/XD_D7/MS_D3

16

SD_CLK/XD_D1/MS_CLK

15

MS_INS#

17 21

37 38 13 22

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CARDREADER- RTS5158E

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

1

SC

of

24 43Wednesday, July 16, 2008

of

24 43Wednesday, July 16, 2008

of

24 43Wednesday, July 16, 2008

5

hexainf@hotmail.com

D D

PCIE_RXP118 PCIE_RXN118

DY

3D3V_LAN_S5_2

1

B

12

C76

SC10U6D3V5KX-2GP

PCIE_TXN118 PCIE_TXP118 CLK_PCIE_LAN3 CLK_PCIE_LAN#3

LAN_ACT_LED#26

10M/100M/1G_LED#26

3

E

4

C

2

C

12

C68

DY

C67

C64

SCD1U10V2KX-4GP

DY

1 2

DY

3D3V_S5

10KR2J-3-GP

10KR2J-3-GP R71

R71

1 2

C C

PLACE PNP TO CHIP ACAP CTRL12 PIN TRACE IS 25MIL

R270

1 2

3D3V_LAN_S5

B B

A A

0R0603-PAD

12

R79

4K7R2J-2-GP

CTRL12

Q8

DCP69A-13-GP

84.00069.A1B

-1

SCD1U10V2KX-4GP

3D3V_S5 3D3V_LAN_S5

R68

1 2

0R0603-PAD

12

C53

SCD1U10V2KX-4GP

DY

1

C60

SC10U6D3V5KX-2GP

2

5

C55 SCD1U10V2KX-5GPC55 SCD1U10V2KX-5GP C56 SCD1U10V2KX-5GPC56 SCD1U10V2KX-5GP

C59

DY

SC1KP50V2KX-1GP

12

C72

C356

C356 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

DY

PLACE PNP TO CHIP ACAP CTRL25 PIN TRACE IS 25MIL

SC4D7U6D3V3KX-GP

4K7R2J-2-GP

CTRL18

1D2V_LAN_S5

12

R80

DCP69A-13-GP

84.00069.A1B

1 2

C75

C75 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

1

Q9

SC10U6D3V5KX-1GP

B

E

C

C C

C

C77

1 2

3

4 2

4

SMB_ALERT#_LAN

DY

R70

0R2J-2-GP

PLT_RST1#7,18,27,30,31

-1

12

C69

C69 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

4

DY

R61

3D3V_LAN_S5

12 12

LAN_LED_10/100/1G

1D8V_LAN_S5

1 2

0R2J-2-GP

R66

R66 0R0603-PAD

0R0603-PAD

1 2

3D3V_S0

PCIE_RXP1_LAN PCIE_RXN1_LAN

1D2V_LAN_S5

1D8V_LAN_S53D3V_LAN_S5

R55

100R2J-2-GP

SC100P50V2JN-3GP

3D3V_LAN_S5 1D2V_LAN_S51D8V_LAN_S5

1 2

C345 SC1KP50V2KX-1GPC345 SC1KP50V2KX-1GP

1 2

C338 SC1KP50V2KX-1GP

1 2

C337 SC1U6D3V2KX-GPC337 SC1U6D3V2KX-GP

1 2

C340 SC1U6D3V2KX-GPC340 SC1U6D3V2KX-GP

1 2

C335 SC1U6D3V2KX-GPC335 SC1U6D3V2KX-GP

3

3D3V_LAN_S5

LANPWR VPD_DATA

U8

49

TX_P

50

TX_N

51

NC#51

52

NC#52

53

RX_N

54

RX_P

55

REFCLKP

56

REFCLKN

57

SMALERT#

58

VDD

59

LED_ACT#

60

LED_LINK10/100#

61

VDDO_TTL

62

LED_LINK1000#

63

LED_DUPLEX#

64

SMCLK

65

GND

12

C44

DY

R49

12

4K7R2J-2-GP

LAN_CLKREQ#

43

42

41

44

48

47

45

46

VDD

VDDO_TTL

TESTMODE

VMAIN_AVLBL

VDDO_TTL1VDD2CTRL123CTRL184PERST#/TSTPT5WAKE#6VDD7AVDDH/3_3V8SWITCH_VAUX9LOM_DISABLE#10SWITCH_VCC11VAUX_AVLBL12VDD13XTALO14XTALI15RSET

CTRL12 CTRL18

PLT_RST1#_LAN

PCIE_WAKE#18,27

C330 SCD1U10V2KX-4GP

C330 SCD1U10V2KX-4GP C327 SCD1U10V2KX-4GPC327 SCD1U10V2KX-4GP C328 SC1KP50V2KX-1GPC328 SC1KP50V2KX-1GP C57 SC1KP50V2KX-1GP

C57 SC1KP50V2KX-1GP C329 SC1U6D3V2KX-GPC329 SC1U6D3V2KX-GP C347 SC1U6D3V2KX-GPC347 SC1U6D3V2KX-GP

3

VDD

DY

1 2 1 2 1 2 1 2

DY

1 2 1 2

SMDATA

CLKREQ#

40

VPD_DATA

39

VDD

VDDO_TTL

VPD_CLK

38

VPD_CLK

LANLOM

37

SPI_CLK

36

SPI_CS

35

33

34

SPI_DI

1 2

C343 SC1U6D3V2KX-GPC343 SC1U6D3V2KX-GP

1 2

C333 SC1U6D3V2KX-GPC333 SC1U6D3V2KX-GP

1 2

C25 SC1KP50V2KX-1GPC25 SC1KP50V2KX-1GP

1 2

C339 SC1KP50V2KX-1GP

DY

1 2

C35 SC1U6D3V2KX-GPC35 SC1U6D3V2KX-GP

1 2

C346 SC1KP50V2KX-1GPC346 SC1KP50V2KX-1GP

1 2

C344 SC1U6D3V2KX-GPC344 SC1U6D3V2KX-GP

1 2

C334 SC1KP50V2KX-1GPC334 SC1KP50V2KX-1GP

VDD

SPI_DO

RESERVED#29

RESERVED#25 RESERVED#24

88E8071-B0-GP

16

71.88071.A03

LANRSET

LANX1

LANX2

SB

NC#32 MDIN3 MDIP3

AVDD MDIN2 MDIP2

AVDD

AVDD MDIN1 MDIP1

AVDD MDIN0 MDIP0

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

12

2

1D8V_LAN_S5

R36

1 2

4K99R2F-L-GP

DY

R41

1 2

10MR2J-L-GP

X1

1 2

XTAL-25MHZ-67GP

C30

C30 SC12P50V2JN-3GP

SC12P50V2JN-3GP

2

LANX1LANX2

1

3D3V_LAN_S5

8Kbit

U13

1

A0

VCC

2

A1

WP

3

A2

SCL

GND4SDA

AT24C08BN-SH-T-GP

72.24C08.J01

Pull up for AT24C08 another pull low

Main source:72.24C08.J01

MDI3- 26 MDI3+ 26

MDI2- 26 MDI2+ 26

MDI1- 26 MDI1+ 26

MDI0- 26 MDI0+ 26

82.30020.571

12

C23

C23 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

2nd source:72.24C08.I01

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

Date: Sheet

88E8071

Cathedral Peak II

RN3

SRN4K7J-10-GP

8 7 6 5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

123

45

678

VPD_CLK VPD_DATA LANLOM

SC

of

25 43Wednesday, July 16, 2008

A

B

C

D

E

LAN Connector

1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

3.No vias, No 90 degree bends.

4.pairs must be equal lengths.

5.6mil trace width,12mil separation.

4 4

6.36mil between pairs and any other trace.

7.Must not cross ground moat,except RJ-45 moat.

1D8V_LAN_S5

R31

V_DAC

1 2

0R0603-PAD

DY

12

C10

C9

SCD1U10V2KX-4GPC9SCD1U10V2KX-4GP

3 3

DY

12

C11

C12

SCD1U10V2KX-4GP

2 2

1 1

A

MDI0+25

MDI0-25

MDI1+25

SCD1U10V2KX-4GP

MDI1-25 MDI2+25

MDI2-25

MDI3+25

MDI3-25

SB

XF1

2

3 1

4 5

6 8

9 7

10 11

12

XFORM-275-GP

68.89240.30A

B

RJ45_1

23

RJ45_2

22

MCT1

24

MCT2

21

RJ45_3

20

RJ45_6

19

RJ45_4

17

RJ45_5

16

MCT3

18

MCT4

15

RJ45_7

14

RJ45_8

13

C

LAN_ACT_LED# 10M/100M/1G_LED#

MCT1 MCT2 MCT3 MCT4

10M/100M/1G_LED#25

3D3V_LAN_S5

LAN_ACT_LED#25

123

678

RN40

SRN75J-1-GP

4 5

MCT_R

C312

SC1KP2KV8KX-GP

1 2

D

DY

C311

C311 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

DY

C310

C310 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

LAN Connector

RJ1

14

CONN_PWR RJ45_1 RJ45_2

RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8 CONN_PWR2

LAN Link:

LAN Data: Yellow(13), when LAN is

1 2

R243 470R2J-2-GPR243 470R2J-2-GP

1 2

R252 470R2J-2-GPR252 470R2J-2-GP

Title

Size Document Number Rev

A3

Date: Sheet

9 10 11

1

2

3

4

5

6

7

8 12 13 15

RJ45-92-GP

22.10245.E91

Green(9), behavior is the same for 10/100/1000 bits

transfering data.

DOC_TIP,DOC_RING,TIP,RING: W/S : 10/100 @ Surface layers 10/20 @ Inner layers

CONN_PWR2 CONN_PWR

EC90

SC100P50V2JN-3GP

DY

LAN CONN

Cathedral Peak II

9:GREEN

13:Orange

EC87

SC100P50V2JN-3GP

1 2

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

26 43Wednesday, July 16, 2008

of

26 43Wednesday, July 16, 2008

of

26 43Wednesday, July 16, 2008

E

SC

A

hexainf@hotmail.com

NEWCARD Connector

4 4

PCIE_TXP518 PCIE_TXN518

PCIE_RXP518 PCIE_RXN518

3D3V_NEW_LAN_S5

PCIE_WAKE#18,25

SMB_DATA18,20 SMB_CLK18,20

CLK_PCIE_NEW3 CLK_PCIE_NEW#3

1D5V_NEW_S0

PM_SLP_S4#18,30,36,37

PM_SLP_S3#18,30,32,36,37,38

CPPE#

1 2

DY

R219 0R2J-2-GP

1 2 3

TP123TP123 TP122TP122

TPS2231_PERST#

1 18 19 21

7

NEW_PIN16

TPS2231_PERST#

PCIE_WAKE#_NEW

RN34

DY

CPUTSB#

U38

STBY# RCLKEN OC# THERMAL_PAD

GND

1D5V_S0

SMB_DATA_NEW

4

SMB_CLK_NEW

8

9

20

SHDN#

PERST#

16

CONN_TP1 CONN_TP2

CPUTSB# CPPE#

PLT_RST1#_NEWCARD

10

6

CPPE#

CPUSB#

SYSRST#

3.3VOUT

1.5VOUT AUXOUT

NC#44NC#55NC#1313NC#1414NC#16

3D3V_S0

3D3V_NEW_S01D5V_NEW_S0

TP127TP127

SRN33J-5-GP-U

USBPP918 USBPN918

3D3V_NEW_S0

3 3

2 2

NEW2

1 2

CARDBUS-SKT107-GP

21.H0168.001

2nd: 21.H0182.001

NEW1

NP2

26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2

1

NP1

FCI-CON26-7-GP

20.F1336.026

RN54

2 3 1

DY

SRN100KJ-6-GP

2

3.3VIN

3 12

1.5VIN

11 17

AUXIN

15

TPS2231RGP-GP-U

74.02231.073

B

3D3V_S5

4

1 2

3D3V_S0 3D3V_NEW_S0 1D5V_S0 1D5V_NEW_S0 3D3V_S5 3D3V_NEW_LAN_S5

R369

12

100R2J-2-GP

C502

C502 SC100P50V2JN-3GP

SC100P50V2JN-3GP

PLT_RST1# 7,18,25,30,31

C

D

Mini Card Connector(WLAN)

MINIC1

53

NP1

MINI_WAKE#

CLK_PCIE_MINI1#3

CLK_PCIE_MINI13

E51_RxD30 E51_TxD30

PCIE_RXN218 PCIE_RXP218

PCIE_TXN218 PCIE_TXP218

3D3V_MINI

5V_S5

TC8

ST330U6D3VDM-17GP

TP12TPAD30 TP12TPAD30

12

DY

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28 30 32 34 36 38 40 42 44 46 48 50 52

SMB_CLK_WLAN SMB_DATA_WLAN

LED_WWAN# LED_WPAN#

29 31 33 35 37 39 41 43 45 47 49 51

NP2

54

SKT-MINI52P-13-GP

62.10043.461

Place near MINIC1

12

C97

SC1U6D3V2KX-GP

12

C87

SCD1U16V2ZY-2GP

C27

SC1U6D3V2KX-GP

3D3V_MINI1D5V_S0

3D3V_MINI

DY

C80

SC100P50V2JN-3GP

PLT_RST1#_WLAN

1

DY

2 3

3D3V_S53D3V_S0 1D5V_S0

12

C96

DY

SCD1U16V2ZY-2GP

1 2

R85

RN5

300R2F-GP

4

SRN33J-5-GP-U

1 1

TPAD28

3D3V_S0

3D3V_S5

C576

C576 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R78

DY

10KR2J-3-GP

USBPN7 18 USBPP7 18

TP36TPAD28 TP36TPAD28

TP42

R454 0R2J-2-GPR454 0R2J-2-GP

1 2

R455 0R2J-2-GP

1 2

E

WIRELESS_EN 30

PLT_RST1# 7,18,25,30,31

SMB_CLK 18,20

SMB_DATA 18,20

WLAN_LED#_MC 16

DY

3D3V_MINI

Place them Near to ConnectorPlace them Near to Chip

3D3V_NEW_S0 1D5V_NEW_S03D3V_S0 3D3V_NEW_LAN_S5

-1

C493

1 1

12

C509

SCD1U16V2ZY-2GP

A

12

SC1U10V3ZY-6GP

C493

12

SCD1U16V2ZY-2GP

C496

DY

12

C282

C282 SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

B

-1

12

C283

C513

SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

NEW CARD/MINI CARD

Cathedral Peak II

of

27 43Wednesday, July 16, 2008

of

27 43Wednesday, July 16, 2008

of

27 43Wednesday, July 16, 2008

E

SC

5

D D

C182

AMP_BEEP_1

AMP_BEEP29

KBC_BEEP30

ACZ_SPKR18

C C

B B

1 2

SCD47U16V3ZY-3GP

DY

C188

1 2

SCD47U16V3ZY-3GP

C194

1 2

SCD47U16V3ZY-3GP

AUD_MICIN_L29 AUD_MICIN_R29

INT_MIC16

RN21

4 5 3 2 1

SRN47KJ-1-GP

RN46

1 2 3 4 5

SRN2K2J-2-GP

8 7 6

6 7 8

1 2 1 2

1 2

KBC_BEEP_1 AUDIO_BEEP

SPKR_SB_1

12

10KR2J-3-GP

R340

1KR2F-3-GP

C232SC4D7U10V3KX-GP C232SC4D7U10V3KX-GP

12

C238SC4D7U10V3KX-GP C238SC4D7U10V3KX-GP

12

C226SC1U16V3ZY-GP C226SC1U16V3ZY-GP C228SC1U16V3ZY-GP C228SC1U16V3ZY-GP

MIC2-VREFO

C265

1 2

R159

MIC1-L_PORT-B MIC1-R_PORT-B

SC4D7U10V5ZY-3GP

DY

4

12

SEL_MIC

IMT_MIC1-L IMT_MIC1-R

MIC1V_R MIC1V_L

C264

SC4D7U10V5ZY-3GP

1 2

VREF

12

C268

C268 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

C208

SC1U10V3KX-3GP

C204

C204 SC100P50V2JN-3GP

SC100P50V2JN-3GP

23 24 14 15

29 31

21 22 16 17

32 28 30

C577

SC4D7U10V5ZY-3GP

AUDIP_PC_BEEP

1 2

U20

LINE1-L_PORT-C LINE1-R_PORT-C NC#14 NC#15

LINE1-VREFO GPIO1

MIC1-L_PORT-B MIC1-R_PORT-B MIC2-L_PORT-F MIC2-R_PORT-F

MIC1-VREFO-R MIC1-VREFO-L MIC2-VREFO

12

C269

SCD47U16V3ZY-3GP

C213

C213 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

9

1

11

12

25

38

DVDD

AVDD1

AVDD2

PCBEEP

DVDD-IO

ALC268

DVSS

AVSS126VREF

AVSS2

4

7

27

42

3D3V_S0

RESET#

10

6

SYNC

RESET#

JDREF

37

40

JDREF

12

R198

R198 20KR2F-L-GP

20KR2F-L-GP

12

BCLK

33

BCLK

NC#33

MONO-OUT

12

C206

C206 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

34

44

NC#4343NC#44

SENSE_B

HP-OUT-L_PORT-A

HP-OUT-R_PORT-A

LINE-OUT-L_PORT-D LINE-OUT-R_PORT-D

DMIC-12/GPIO02DMIC-34/GPIO3

CD-L18CD-G19CD-R

3

20

TP116

TP116 TPAD30

TPAD30

3

5VA_S0

"VAUX" Pull high to enable standby mode

C247

12

SC10U10V5ZY-1GP

DY

R164

0R0402-PAD

1 2

C212

SC22P50V2JN-4GP

13

SENSE_A

SDATA-OUT

SC22P50V2JN-4GP

5

AC97_DATIN

8

SDATA-IN

48

SPDIFO

47

EAPD

45

NC#45

46

DMIC-CLK

39 41

35 36

ALC268-GR-GP

71.00268.00G

Change to 71.00268.A0G

R165

R165 10KR2F-2-GP

10KR2F-2-GP

DY

1 2

12

C240

C240 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C210

1 2

12

DY

C211

1 2

DY

1 2

R163 39R2J-L-GPR163 39R2J-L-GP

ALC_EAPD

SC100P50V2JN-3GP

R162

12

100R2J-2-GP

ACZ_SYNC 17,23 ACZ_BITCLK 17

FRONTL 29 FRONTR 29

SOUNDL 29 SOUNDR 29

2

C272

SC1U10V3KX-3GP

ACZ_RST# 17,23

ALC268_SENSE

Sense resistors need close codec

ACZ_SDATAOUT 17,23

ACZ_SDATAIN0 17

R178

1 2

39K2R2F-L-GP

R175

1 2

20KR2F-L-GP

ALC268_EAPD29

5V_S0

12

0R0402-PAD

R187

4.75V / 300mA

U21

1

EN

NC#5

2

GND VIN3VOUT

RT9198-4GPBG-GP

74.09198.A7F

74.09091.F3F

74.09091.F3F G9091-475T12U-GP

G9091-475T12U-GP

LINEOUT_JD# 29

MIC_JD# 29

1

2

3

1 2

1

5VA_S0

5 4

AMP_SHUTDOWN# 29,30

D14

D14 BAW56-7-F-GP

BAW56-7-F-GP

DY

2ND = 83.00056.G11

R170

1 2

DY

10KR2J-3-GP

12

C267

C267 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

3D3V_S0

A A

Title

Azalia codec ALC268

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

28 43Wednesday, July 16, 2008

1

SC

of

A

hexainf@hotmail.com

-1

C132

C132 SC1U10V3KX-3GP

SC1U10V3KX-3GP

SOUNDR28

4 4

3 3

SOUNDL28

FRONTR28

FRONTL28

C168

C168 SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

1 2

C162

C162 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1 2

C133

C133 SC1U10V3KX-3GP

SC1U10V3KX-3GP

1 2

C128

C128 SC3D3U10V5KX-2GP

SC3D3U10V5KX-2GP

1 2

C129

C129 SC3D3U10V5KX-2GP

SC3D3U10V5KX-2GP

1 2

BIAS

1 2

SC1U10V3KX-3GP

R129

R129 2KR2F-3-GP

2KR2F-3-GP

12

R127

R127 6K8R2F-2-GP

6K8R2F-2-GP

12

R128

R128 40K2R2F-GP

40K2R2F-GP

R126

R126 40K2R2F-GP

40K2R2F-GP

12

C139

SPKR_L+ SPKR_L-

B

AUDIO OP AMPLIFIER

INR_A

INL_A

INR_H

INL_H

INR_A INR_H INL_A INL_H

5V_S0

U18

1

VDD

2

GND

3

INR_A

4

INR_H

5

INL_A

6

INL_H

7

PGND

8

LOUT+

9

LOUT-

10

PVDD

11

CVDD

12

CP+

13

CGND

14

CP-

APA2057ARI-TRL-GP

74.02057.01G

BEEP

AMP_EN#

HP_EN

PGND

ROUT+

ROUT-

PVDD HVDD

HP_R HVSS CVSS

GND

SET

BIAS

HP_L

R139

R139 0R2J-2-GP

0R2J-2-GP

12

DY

29 28 27 26 25 24 23 22 21 20 19 18 17 16 15

DY

SPK_EN# SET BIAS HP_EN

SPKR_R+ SPKR_R-

SPKR_L+1 SPKR_R+1

12

C153

C153 SC1U10V3KX-3GP

SC1U10V3KX-3GP

C

SB

AMP_BEEP 28

5V_S0 3D3V_S0

5V_S0

12

6DB

-1

12

SCD1U16V2ZY-2GP

R137

R137 13KR2F-GP

13KR2F-GP

R138

R138 30KR2F-GP

30KR2F-GP

HP_EN

C163

DY

D

Layout Note C218,C219,C220 near U110

SET

R143

R143 0R2J-2-GP

0R2J-2-GP

DY

12

1 2

R142

1 2

0R0402-PAD

ALC268_EAPD 28

SPK_EN#

：

5V_S0 3D3V_S0

12

C138

C137

SCD1U16V2ZY-2GP

SC10U6D3V5MX-3GP

1 2

AMP_SHUTDOWN# 28,30

5V_S0

12

R147

10KR2J-3-GP

Q14

2N7002-11-GP

G

S D

12

C161

SC1U10V3KX-3GP

AMP_SHUTDOWN# 28,30

E

Internal Speaker

SPKR_R+

2 2

SPKR_R-

SPKR_L+ SPKR_L-

12

EC1

EC2

DY

SC100P50V2JN-3GP

12

EC4

EC3

DY

SC100P50V2JN-3GP

DY

INTSPK_R

3 1

2 4

ACES-CON2-1-GP-U2

20.D0197.102

INTSPK_L

3 1

2 4

ACES-CON2-1-GP-U2

20.D0197.102

2nd: 20.F0984.002

MIC_JD#28 AUD_MICIN_R28 AUD_MICIN_L28

R321

10KR2J-3-GP

12

DY

12

DY

EC60

DY

SC1KP50V2KX-1GP

2 3 1

SRN1KJ-7-GP

R326

R326 10KR2J-3-GP

10KR2J-3-GP

MIC IN

12

RN66

AUD_MIC_R

4

AUD_MIC_L

12

EC140

SC1KP50V2KX-1GP

DY

12

EC145

SC1KP50V2KX-1GP

DY

MICIN1

NP2 NP1

5 4 3 6 2 1

SHIELDING

PHONE-JK233-GP-U3

22.10133.B01

2nd: 22.10251.491 3nd: 22.10147.131

LINE OUT

LOUT1

NP2 NP1

LINEOUT_JD#

5 4

SPKR_R_A1 SPKR_R+1

3 6

LINEOUT_JD#

1 1

SPKR_LSPKR_L+ SPKR_RSPKR_R+

1 1 1 1

A

TP1AFTE14P-GP TP1AFTE14P-GP TP2AFTE14P-GP TP2AFTE14P-GP TP3AFTE14P-GP TP3AFTE14P-GP TP4AFTE14P-GP TP4AFTE14P-GP

SPKR_R_A1 SPKR_L_A1 MIC_JD# AUD_MICIN_R AUD_MICIN_L

B

1 1 1 1 1 1

TP117AFTE14P-GP TP117AFTE14P-GP TP114AFTE14P-GP TP114AFTE14P-GP TP113AFTE14P-GP TP113AFTE14P-GP TP109AFTE14P-GP TP109AFTE14P-GP

PHONE-JK235-GP-U2

TP160AFTE14P-GP TP160AFTE14P-GP TP159AFTE14P-GP TP159AFTE14P-GP

22.10133.B21

2nd: 22.10251.511 3nd: 22.10147.151

2 1

SHIELDING

C

EC152

SC1KP50V2KX-1GP

SPKR_L_A1

DY

1 2

-1

RN68

1

4

SPKR_L+1

2 3

SRN51J-GP

12

C466

C473

SC680P50V2KX-2GP

DY

R329

1KR2J-1-GP

DY

LINEOUT_JD# 28

12

R335

DY

1KR2J-1-GP

D

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Analog Int. Mic

remove to LED Board

DY

2 1

1 2

E

D27

D27 1SS400PT

1SS400PT

SPKR_R_A1

U56

DY

SD05C-1-GP

29 43Wednesday, July 16, 2008

For ESD

5V_S0 5V_S0

D28

D28 1SS400PT

1SS400PT

DY

2 1

SPKR_L_A1

U55

U55 SD05C-1-GP

SD05C-1-GP

DY

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

AUDIO AMP AND JACK

Cathedral Peak II

SC

of

D24

KBRCIN#_KBC

1

KBC_GPIO15

RN53

7 8

SRN10KJ-6-GP

SB

DY

R376

0R0402-PAD

3456 2 1

RN56

1 2 3

SRN100KJ-6-GP

6

5

CH731UPT-GP

C520

12

SC4D7P50V2CN-1GP

R372

10KR2J-3-GP

SPI_WP_R#

12

MMBT3906-3-GP

RSMRST#_R KA20GATE KBRCIN#

R381

1KR2J-1-GP

LID_CLOSE#

4

BAT_IN#

PCLK_KBC

DY

12

KA20GATE_KBC

2

ECSCI#_KBC

34

5V_S5

12

Q19

B

KBC_GPIO0C

U39

LPC_LAD[0..3]17,31

PLT_RST1#7,18,25,27,31

ECRST#

12

E

C494

C494 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C

DY: ISP Mode disable

TP125TP125 TP130TP130 TP166TP166 TP167TP167 TP165TP165 TP169TP169

TP129TP129 TP124TP124 TP126TP126 TP128TP128

DY

C514

SC100P50V2JN-3GP

R392

12

0R0402-PAD

FOR KBC DEBUG

R360

DY

1 2

0R2J-2-GP

R359

DY

1 2

0R2J-2-GP

KCOL15 KROW0 E51_RxD E51_TxD

INT_SERIRQ18

LPC_LFRAME#17,31

PCLK_KBC3

PM_CLKRUN#18

1 2

KBC_BEEP28

KCOL2

KCOL3

3D3V_AUX_S5

KCOL8 KCOL9 KCOL10 KCOL11

BLUETOOTH_EN23

PLT_RST1#_1

PM_SLP_S3#18,27,32,36,37,38 KBC_PWRBTN#16

PM_SLP_S4#18,27,36,37

GMCH_BL_ON7

BRIGHTNESS14

STDBY_LED16

WIRELESS_EN27

LID_CLOSE#14

ECSWI#18

TP172TP172 TP171TP171

KBC_GPIO15

BAT_IN#40

SPICLK31

CHG_ON#39

INT_SERIRQ LPC_LFRAME# PCLK_KBC PM_CLKRUN# LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

ECRST# KBRCIN#_KBC ECSCI#_KBC KA20GATE_KBC

KBC_BEEP CHG_I_PWM KBC_GPIO12 SPI_WP_R#

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17 KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7

TPCLK

PM_SLP_S3# KBC_PWRBTN#

PM_SLP_S4#

BAT_IN# KBC_GPIO0C GMCH_BL_ON BRIGHTNESS

STDBY_LED WIRELESS_EN BLUETOOTH_EN SPICLK CHG_ON#

LID_CLOSE# ECSWI#

U39

3

SERIRQ

4

LFRAME#

12

PCICLK

38

CLKRUN#

10

LAD0

8

LAD1

7

LAD2

5

LAD3

37

ECRST#

2

KBRST#

20

SCI#

1

GA20

13

PCIRST#

21

PWM0

23

PWM1

26

FANPWM1

27

FANPWM2

28

FANFB1

29

FANFB2

39

KSO0

40

KSO1

41

KSO2

42

KSO3

43

KSO4

44

KSO5

45

KSO6

46

KSO7

47

KSO8

48

KSO9

49

KSO10

50

KSO11

51

KSO12

52

KSO13

53

KSO14

54

KSO15

81

KSO16

82

KSO17

55

KSI0

56

KSI1

57

KSI2

58

KSI3

59

KSI4

60

KSI5

61

KSI6

62

KSI7

87

PSCLK3

88

PSDAT3

85

PSCLK2

86

PSDAT2

83

PSCLK1

84

PSDAT1

6

GPIO4

14

GPIO7

15

GPIO8

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

GPIO11

34

GPIO19

75

AD4

92

GPIO54

95

GPIO56

121

GPIO57

126

SPICLK

127

GPIO59

16

GPIO0A

32

GPIO18

KB3310QF-GP

71.03310.00G

change to 71.03310.A0G

GPO3C GPO3D

GPXIOA0 GPXIOA1 GPXIOA2 GPXIOA3 GPXIOA4 GPXIOA5 GPXIOA6 GPXIOA7 GPXIOA8

GPXIOA9 GPXIOA10 GPXIOA11

GPXIOD0

GPXIOD1

GPXIOD2

GPXIOD3

GPXIOD4

GPXIOD5

GPXIOD6

GPXIOD7

SPICS#

GPIO50 GPIO52 GPIO16

GPIO17 GPIO1A

GPIO53 GPIO55

GPIO41 GPIO40

GPO3E GPO3F

XCLKO

KBRCIN#17

KA20GATE17

ECSCI#_118

4 4

SPI_WP#31

3D3V_AUX_S5

RSMRST#21,32

3D3V_S0

3 3

3D3V_AUX_S5

2 2

2nd: 20.K0317.026

Internal KeyBoard Connector

20.K0204.026

ACES-CON26-GP-U

27

123456789

1011121314151617181920212223242526

KCOL0

KCOL9

KCOL7

KCOL5

KCOL8

KCOL4

KCOL6

KCOL11

KCOL12

KCOL3

KCOL1

KCOL2

KCOL10

KCOL14

KCOL13

1 1

Internal KeyBoard CONN

TP67AFTE14P-GP TP67AFTE14P-GP TP73AFTE14P-GP TP73AFTE14P-GP

25

KCOL17

1

KCOL0

1

........

EC40 SC220P50V2JN-3GP

EC40 SC220P50V2JN-3GP EC23 SC220P50V2JN-3GP

EC23 SC220P50V2JN-3GP

CHECK KB SPEC. AND PIN DEFINE

KCOL15

KCOL16

1 2

DY

1 2

DY

KCOL17

28

KB1

KROW3

KROW5

KROW0

KROW2

KROW1

KROW4

KROW6

KROW7

1

TP84AFTE14P-GP TP84AFTE14P-GP TP66AFTE14P-GP TP66AFTE14P-GP TP82AFTE14P-GP TP82AFTE14P-GP TP65AFTE14P-GP TP65AFTE14P-GP

TP80AFTE14P-GP TP80AFTE14P-GP TP62AFTE14P-GP TP62AFTE14P-GP TP75AFTE14P-GP TP75AFTE14P-GP TP59AFTE14P-GP TP59AFTE14P-GP

TP77AFTE14P-GP TP77AFTE14P-GP TP61AFTE14P-GP TP61AFTE14P-GP TP76AFTE14P-GP TP76AFTE14P-GP TP60AFTE14P-GP TP60AFTE14P-GP

TP74AFTE14P-GP TP74AFTE14P-GP TP71AFTE14P-GP TP71AFTE14P-GP TP85AFTE14P-GP TP85AFTE14P-GP TP70AFTE14P-GP TP70AFTE14P-GP

TP79AFTE14P-GP TP79AFTE14P-GP TP69AFTE14P-GP TP69AFTE14P-GP TP78AFTE14P-GP TP78AFTE14P-GP TP68AFTE14P-GP TP68AFTE14P-GP

TP83AFTE14P-GP TP83AFTE14P-GP TP64AFTE14P-GP TP64AFTE14P-GP TP81AFTE14P-GP TP81AFTE14P-GP TP63AFTE14P-GP TP63AFTE14P-GP

EMI Bypass cap.

KCOL16

EC39 SC220P50V2JN-3GP

1

1 2

DY

KCOL15

EC38 SC220P50V2JN-3GP

1 2

1

DY

KCOL14

EC37 SC220P50V2JN-3GP

1

1 2

DY

KCOL13

EC36 SC220P50V2JN-3GP

1

1 2

DY

KCOL8

EC31 SC220P50V2JN-3GP

1 2

1

DY

KCOL7

EC30 SC220P50V2JN-3GP

1 2

1

DY

KCOL6

EC29 SC220P50V2JN-3GP

1 2

1

DY

KCOL5

EC28 SC220P50V2JN-3GP

1 2

1

DY

KCOL4

EC27 SC220P50V2JN-3GP

1

1 2

DY

KCOL3

EC26 SC220P50V2JN-3GP

1

1 2

DY

KCOL2

EC25 SC220P50V2JN-3GP

1

1 2

DY

KCOL1

EC24 SC220P50V2JN-3GP

1

1 2

DY

KROW0

EC41 SC220P50V2JN-3GP

1 2

1

DY

KROW7

EC48 SC220P50V2JN-3GP

1

1 2

DY

KROW6

EC47 SC220P50V2JN-3GP

1

1 2

DY

KROW5

EC46 SC220P50V2JN-3GP

1

1 2

DY

KROW4

EC45 SC220P50V2JN-3GP

1 2

1

DY

KROW3

EC44 SC220P50V2JN-3GP

1 2

1

DY

KROW2

EC43 SC220P50V2JN-3GP

1

1 2

DY

KROW1

EC42 SC220P50V2JN-3GP

1

1 2

DY

KCOL12

EC35 SC220P50V2JN-3GP

1

1 2

DY

KCOL11

EC34 SC220P50V2JN-3GP

1

1 2

DY

KCOL10

EC33 SC220P50V2JN-3GP

1

1 2

DY

KCOL9

EC32 SC220P50V2JN-3GP

1

1 2

DY

TOUCH PAD

5V_S0

1

23

SRN10KJ-5-GP

4

TPDATA TP_DATA

LEFT1

2 4

1

SW-TACT-122-GP

62.40009.681

A

3D3V_AUX_S5

TP177TP177

C543

SC3D3U10V5KX-2GP

1 2

X-32D768KHZ-38GPU

82.30001.691

EC129

SCD1U10V2KX-4GP

4

A

12

AGND

TP168TP168 TP170TP170

TP173TP173

AD_IA 39

TP176TP176

WIRELESS_BTN# 16

BT_BTN# 16 AMP_SHUTDOWN# 28,29 PM_PWRBTN# 18,41

RSMRST#_KBC 18 AD_OFF 40 WLAN_TEST_LED 16 BT_LED 16 DC_BATFULL 16

Volume_Up# 16 Volume_Down# 16

BLON_OUT 14,16

TP132TP132

TP131TP131

SPICS# 31 SPIDO 31 SPIDI 31 AC_IN# 39

CHARGE_LED 16 E51_TxD 27

E51_RxD 27

TP174TP174

KBC_XI

X5

KBC_XO

12

DY

TP_CLK

2 4

1

L16

L16 BLM11P600S

BLM11P600S

USB_PWR_EN# 23

NUM_LED# 16 CAP_LED# 16 FRONT_PWRLED 16

4

1

EC132

SCD1U10V2KX-4GP

DY

RIGHT1

SW-TACT-122-GP

62.40009.681

22

VCC

33

VCC

125

VCC

111

VCC

96

VCC

9

VCC

AVCC

67

AVCC

69

AGND

11

GND

24

GND

35

GND

113

GND

94

GND

77

SCL1

78

SDA1

SMBD_Therm

80

SDA2

SMBC_Therm

79

SCL2

CCD_ON

68

USB_PWR_EN#

70

KBC_GPIO3E

71

CHG_BCTL1

72

AD_IA

63

AD0

64

AD1

65

AD2

66

AD3

FLASH_SEL

97

WIRELESS_BTN#

98

BT_BTN#

99

AMP_SHUTDOWN#

100

PM_PWRBTN#

101

S5_ENABLE_KBC

102

RSMRST#_KBC

103

AD_OFF

104

WLAN_TEST_LED

105

BT_LED

106

DC_BATFULL

107

GPXIOA11

108

Volume_Up#

109

Volume_Down#

110

BLON_OUT

112

SYS_PWR_ACKTPDATA

114

E-BUTTON#

115

KBC_THERMALTRIP#

116

KBC_GPXD6

117

CRT_DEC#

118 128

120

WR#

119

RD#

AC_IN#

89

KBC_MATRIX0#

76

AD5

CHARGE_LED

90

E51_TxD

30

E51_RxD

31

NUM_LED#

36

CAP_LED#

91

FRONT_PWRLED

93

KBC_XI

122

XCLKI

KBC_XO

123 124

V18R

SEL_CP

74

KBC_GPIO40

73

RN52

RN50

1

TPCLK

2 3

SRN33J-5-GP-U

TP_LEFT TP_RIGHT

5 3

2nd: 62.40009.671

12

C528

C528 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

C498 SCD1U16V2ZY-2GPC498 SCD1U16V2ZY-2GP

1 2

R375

0R0603-PAD

E-BUTTON# 16 KBC_THERMALTRIP# 32

CRT_DEC# 15

R380

10KR2J-3-GP

C537

C537 SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

1 2

2 3

1 2

C538

SC22P50V2JN-4GP

5V_S0

TP_RIGHT

TP_LEFT

5 3

12

C535

SCD1U16V2ZY-2GP

BAT_SCL 39,40 BAT_SDA 39,40

DY

12

TP_DATA TP_CLK

C533

C533 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

3D3V_AUX_S5

121

T/P

2nd: 20.K0359.012

3D3V_S0

TPAD1

12 11 10

9 8 7 6 5 4 3 2

1

ACES-CON12-4-GP-U

20.K0228.012

R461

1 2

2K2R2J-2-GP

3D3V_AUX_S5

14

13

AD_OFF

SB

-1

1 2 3 4 5

S5_ENABLES5_ENABLE_KBC

R3

1 2

1KR2J-1-GPR31KR2J-1-GP

8 7

SRN10KJ-6-GP

E51_RxD

SEL_CP

CP Pull Low

BAT_SCL BAT_SDA

RN30

SRN10KJ-6-GP

RN57

R364

1 2

10KR2J-3-GP

TP_DATA TP_CLK TP_LEFT TP_RIGHT

5V_S0 TP_DATA TP_CLK TP_RIGHT TP_LEFT

3D3V_AUX_S5 3D3V_S0

123

WIRELESS_BTN#

8

BT_BTN#

7 6

S5_ENABLE_KBC

S5_ENABLE 32,35,41

KBC_THERMALTRIP#

1

E-BUTTON#

2

Volume_Down#

3456

Volume_Up#

DY

SC100P50V2JN-3GP

5V_AUX_S5

R379

1 2

1KR2J-1-GP

EC130

EC131

SC100P50V2JN-3GP

1 2

DY

1 1 1 1 1

678

4 5

C545

EC135

1 2

SC220P50V2JN-3GP

RN55

RN55 SRN4K7J-12-GP

SRN4K7J-12-GP

12

EC134

1 2

DY

C546

C546 SC100P50V2JN-3GP

SC100P50V2JN-3GP

1 2

SC220P50V2JN-3GP

DY

TP108AFTE14P-GP TP108AFTE14P-GP TP104AFTE14P-GP TP104AFTE14P-GP TP107AFTE14P-GP TP107AFTE14P-GP TP103AFTE14P-GP TP103AFTE14P-GP TP106AFTE14P-GP TP106AFTE14P-GP

SMBC_Therm 21 SMBD_Therm 21

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

KBC ENE3926

Cathedral Peak II

of

30 43Wednesday, July 16, 2008

SC

A

hexainf@hotmail.com

B

C

D

E

4 4

SPICS#30

EC160

SC4D7P50V2CN-1GP

3 3

3D3V_AUX_S5

678

RN58

SRN10KJ-6-GP

123

4 5

SPI_HOLD#

U50

1 2

SPI_WP#

SPI_WP#30

12

3

16M Bits

SPI FLASH ROM

MXIC: 72.25165.A01 WinBond: 72.25X16.001

CS#

VCC

DO

HOLD#

WP#

CLK

GND4DIO

W25X16VSSIG-GP

72.25X16.001

8 7 6 5

3D3V_AUX_S5

3D3V_AUX_S5_SPI_ROM

SPI_HOLD#SPIDI_ROM SPICLK_ROM SPIDO_ROM

12

EC167

SC4D7P50V2CN-1GP

ER2

ER2 0R0603-PAD

0R0603-PAD

1 2

12

EC166

EC166 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SPICLK_ROM SPIDO_ROM SPIDI_ROM

ERN1

1 2 3 4 5

SRN150F-1-GP

8 7 6

SPICLK 30 SPIDO 30

12

EC159

EC159 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SPIDI 30

TOP VIEW

PCLK_FWH

12

R444

DY

100R2J-2-GP

PCLKFWH

12

C575

DY

SC10P50V2JN-4GP

LPC_LAD[0..3]

PLT_RST1#7,18,25,27,30

LPC_LFRAME#17,30

GOLDEN FINGER FOR DEBUG BOARD

5V_S0

PLT_RST1# LPC_LFRAME#

FWH_INIT#17

FWH_INIT# LPC_LAD3

LPC_LAD2 LPC_LAD1 LPC_LAD0 EXT_FWH#

3D3V_S0

C

A1 A2 A3 A4 A5 A6 A7 A8

A9 A10 A11 A12 A13 A14 A15

U27

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15

FOX-GF30

ZZ.GF030.XXX

5V_S0

B1

B1 B2 B3 B4 B5 B6 B7 B8

B9 B10 B11 B12 B13 B14 B15

PLT_RST1#

B2

LPC_LFRAME#

B3 B4

PCLK_FWH

B5 B6

FWH_INIT#

B7 B8

LPC_LAD3

B9

LPC_LAD2

B10

LPC_LAD1

B11

LPC_LAD0

B12

EXT_FWH#

B13 B14 B15

3D3V_S0

TP135 TPAD28TP135 TPAD28

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

BIOS/GOLDEN FINGER

Cathedral Peak II

of

31 43Wednesday, July 16, 2008

E

SC

(B1)

2 2

A15

(B2)

A14

....

A2 (B14) A1

(B15)

....

LPC_LAD[0..3]17,30

PCLK_FWH3

(BOTTOM VIEW)

1 1

PCLK_FWH

A

12

EC171

EC171 SC5P50V2CN-2GP

SC5P50V2CN-2GP

DY

B

Aux Power

5V_AUX_S5

SC1U16V3ZY-GP

DY

C508

SCD1U10V2KX-4GP

3D3V_AUX_S5

Run Power

I min = 300 mA

U40

DY

1

VIN

VOUT

2

GND EN/EN#3NC#4

12

C517

RT9198-33PBR-GP

74.09198.G7F

5V_AUX_S5

R383

R383 0R0402-PAD

0R0402-PAD

3D3V_AUX_S5_EN

12

DY

EMC2102_PWROK21

PM_SLP_S3#18,27,30,36,37,38

3D3V_AUX_S5

5 4

SC1U16V3ZY-GP

12

C522

DY

R103

EMC2102_PWROK

R103

DY

0R2J-2-GP

12

U14

1

B

2

A

3

GND

74LVC1G08GW-1-GP

EMC2102_PWROK PWROK

Q26

DCBATOUT

R435

Z_12V

Z_12V_D3

SCD1U16V2KX-3GP

PWROK 7,18

H_PWRGD4,17,41

1 2

10KR2J-3-GP

R442

1 2

330KR2J-L1-GP

R440

R440 1KR2J-1-GP

1KR2J-1-GP

1 2

-1

100KR2J-1-GP

SC2D2U16V3KX-GP

3D3V_S0

12

R430

100R5J-3-GP

DY

3D3V_runpwr

Q27

Q27 2N7002-11-GP

2N7002-11-GP

DY

G

S D

3D3V_S5

C579

1 2

5

DY

VCC

Y

DY

4

NDS0610-NL-GP

S D

Z_12V_G3

R445

H_PWRGD#

C574

Q26

G

12

Z_12V_D3

12

Z_12V_D4

Q32

5 6

2N7002DW-1-GP

84.27002.D3F

1D05V_S0

1 2

E

B

C

RUN_POWER_ON

R439

10KR2J-3-GP

34 2 1

R425

R425 56R2J-4-GP

56R2J-4-GP

Q24

Q24 MMBT2222A-3-GP

MMBT2222A-3-GP

1

C572

2

12

R438

SCD22U25V3KX-GP

330KR2J-L1-GP

PM_THRMTRIP-A# 4,7,17

SCD1U25V3KX-GP

D26

D26 PDZ9D1B-GP

PDZ9D1B-GP

83.9R103.C3F

A K

PM_SLP_S3# 18,27,30,36,37,38

DY

C273

1 2

DY

MMBT3904-3-GP

5V_S0

3D3V_S0

1D05V_S0

12

Q25

R426

2K2R2J-2-GP

C561

1 2

DY

CBE

U22

S

1

S

2

S

3

GD

4 5

AO4468-GP

84.04468.037

U53

S

1

S

2

S

3

GD

4 5

AO4468-GP

84.04468.037

SCD1U16V2ZY-2GP

KBC_THERMALTRIP# 30

5V_S5

D

8

D

7

D

6

3D3V_S5

D

8

D

7

D

6

2

D25

BAS16PT-GP

3

S5_ENABLE30,35,41

1

RSMRST# 21,30

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

RUN POWER and 3D3V_AUX_S5

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

32 43Wednesday, July 16, 2008

of

SC

5

hexainf@hotmail.com

CPU_CORE ISL6266A

VID0

VID1

D D

VID2

VID3

VID4

VID5

VID6

CPUCORE_ON

C C

VCC_SENSE

VSS_SENSE

VID Setting

VID0(I / 3.3V)

VID1(I / 3.3V)

VID2(I / 3.3V)

VID3(I / 3.3V)

VID4(I / 3.3V)

VID5(I / 3.3V)

VID6(I / 3.3V)

Input Signal

EN (I / 3.3V)

Voltage Sense

VSEN(I / Vcore)

RGND(I / Vcore)

Input Power

DCBATOUT_6266A

5V_S0

3D3V_S0

B B

VCC(I)

Output Signal

PGOOD

Output Power

VCC_CORE_PWR(O)

TPS51124 1D8V/1D05V

5V_S5

DCBATOUT_51124

PM_SLP_S4#

PM_SLP_S3#

A A

CPUCORE_ON

Input Power

VDD

VCC

Input Signal

EN1

EN2

Output Signal

PGOOD1 PGOOD2

5

Output Power

1D8V (O)

1D05V(O)

1D8V_S3 (10A)

1D05V_S0 (15A)

4

VGATE_PWRGD

VCC_CORE(Imax=38A)

VID0

VID1

VID2

VID3

VID4

5V_S0

DCBATOUT

PM_SLP_S3#

GFXVR_EN

VCC_AXG_SENSE

VSS_AXG_SENSE

4

3

TPS51125 5V/3D3V

DCBATOUT_51125

S5_ENABLE 3D3V(O)

ALW_PWRGD_3V_5V

Input Power

VIN

Input Signal

EN0

Output Signal

PGOOD

GFX_CORE ISL6263A

VID Setting

VID0(I / 3.3V)

VID1(I / 3.3V)

VID2(I / 3.3V)

VID3(I / 3.3V)

VID4(I / 3.3V)

Input Power

VDD

VIN

Input Signal

VR_ON

Voltage Sense

VSEN(I / Vcore)

RGND(I / Vcore)

Output Signal

Output Power

VGFXCORE (O)

Adapter

AD_OFF

AD_JK

5V_AUX_S5

Input Signal

(I)

Input Power

VCC(I)

Output Signal

Output Power

3

Output Power

5V(O)

3D3V(O)

PGOOD

VCC_GFXCORE(5.5A)

(O)

VCC(O)

5V_S5 (6A)

3D3V_S5 (6A)

5V_AUX_S5

3D3V_AUX_S5

CPUCORE_ON

AD_IN#

AD+

2

1D8V_S3

PM_SLP_S3#

5V_S5

1D8V_S3

PM_SLP_S4#

CHG_ON#

24750_CELLS

AD+

2

1

RT9018A

1D5V_S0

1D5V_S0 (2.5A)

VIN

EN

RT9026

VIN

VLDOIN

S3

S5

1D5V(O)

PGOOD

0D9V_S0

VTT

VTTREF

CPUCORE_ON

0D9V_S3 (1A)

0D9V_S3_1

Charger BQ24745

Output SignalInput Signal

CHGEN#

CELLS

ACGOOD#

SRSET

Output PowerInput Power

ACN

VOUT (O)

VOUT (O) DCBATOUT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

B

Date: Sheet

Power Sequence Logic

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

AC_IN#

AD_IA

BT+

33 43Wednesday, July 16, 2008

of

1

SC

5

DCBATOUT_6266ADCBATOUT DCBATOUT_6266ADCBATOUT

G32

GAP-CLOSE-PWR

PSI#4

6266A_PMON_R

C26

1 2

SCD015U50V3KX-GP

6266A_VO

SC270P50V2KX-1GP

6266A_VDIFF

6266A_SOFT

20080605

12

C49

one phase

SCD022U25V3JX-U-GP

G32

1 2

G37

1 2

G36

1 2

G29

1 2

R28 0R0402-PADR28 0R0402-PAD

1 2

R30 4K99R2F-L-GPR30 4K99R2F-L-GP

1 2

R32 147KR2F-GPR32 147KR2F-GP

6266A_SOFT

1 2

R38 12KR3F-GPR38 12KR3F-GP

12

3D3V_S0

12

1 2

1KR2J-1-GP

R57

R57 0R0402-PAD

0R0402-PAD

R58

R58 0R0402-PAD

0R0402-PAD

12

R63

R63 11KR2F-L-GP

11KR2F-L-GP

one phase

12

SCD1U10V2KX-4GP

R27

R27 1K91R2F-1-GP

1K91R2F-1-GP

6266A_PSI#

6266A_PMON

6266A_RBIAS

6266A_OCSET 6266A_VW 6266A_COMP 6266A_FB 6266A_FB2

R52

R52 1KR2F-3-GP

1KR2F-3-GP

R459

DY

SC330P50V2KX-3GP

G35

1 2

GAP-CLOSE-PWR

G38

1 2

GAP-CLOSE-PWR

G31

1 2

D D

GAP-CLOSE-PWR

G30

1 2

GAP-CLOSE-PWR

C C

CPU_PROCHOT#_R4

R259

1 2

NTC-470K-1-GP

C33

1 2

one phase

R54

1 2

R65

1 2

B B

A A

1D05V_S0

R33

68R2-GP

6266A_NTC_R

C21

POWER SA

SC100P50V2JN-3GP

6266A_COMP_R

97K6R2F-GP

6266A_FB2_R

100R2F-L1-GP-U

R60

1 2

-1

1 2

12

TC13

TC13 ST15U25VDM-1-GP

ST15U25VDM-1-GP

DY

12

TC1

TC1 SE100U25VM-L1-GP

SE100U25VM-L1-GP

12

VGATE_PWRGD7,18,21

C16

1 2

SCD1U25V3KX-GP

R35

1 2

4K02R2F-GP

SCD01U25V2KX-3GP

C28 SC1000P50V3JN-GPC28 SC1000P50V3JN-GP

1 2

R44 10K5R2F-GPR44 10K5R2F-GP

C32

1 2

C46

1 2

SC2200P50V2KX-2GP

1KR2F-3-GP

VCC_SENSE5

VSS_SENSE5

6266A_VSUM

C52

SCD22U50V3ZY-1GP

one phase

6266A_VO

5

H_DPRSTP#4,7,17

10R3F-GP

C13

U5

1 2 3 4 5 6 7 8

9 10 11 12

ISL6266AHRZ-GP

74.06266.073

20080605

one phase

C41

12

C34

12

R69

R69 2K61R2F-1-GP

2K61R2F-1-GP

6266A_VSUM_R_VO

12

R260

R260 NTC-10K-9-GP

NTC-10K-9-GP

PGOOD PSI# PMON RBIAS VR_TT# NTC SOFT OCSET VW COMP FB FB2

4

3D3V_S0

R26

12

49

GND

POWER SB

12

4

PM_DPRSLPVR 7,18

CPUCORE_ON 36,37,38

12

H_VID6

H_VID5

12

DY

R456 0R 2J-2-GPDYR456 0R 2J-2-GP

6266A_3V3

47

48

3V3

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

6266A_VDIFF

6266A_VSEN

0R0402-PAD

R17 499R2F-2-GPR17 499R2F-2-GP

R16 0R0402-PADR16 0R0402-PAD

R18

R19

R20

6266A_VR_ON

6266A_D5

6266A_D6

6266A_DPRSTP#

6266A_DPRSLPVR

45

46

44

43

VR_ON

CLK_EN#

DPRSTP#

DPRSLPVR

12

6266A_DROOP

6266A_DFB

6266A_RTN

R59

12

6266A_VSUM

1KR2F-3-GP

6266A_VO

R47

12

1K74R2F-GP

C43

SC180P50V2JN-1GP

12

C47

SCD33U10V3KX-3GP

12

C42

C42 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

Single Phase R47=1.2K, R63=5.6K,R460=0R C33=47p, C49=0.033u, C52=0.1u

DY=U7,U28,U29,L9,R62,R56,R42, R45,R37,R39,R48,C20

H_VID4

H_VID3

H_VID2

12

0R0402-PAD

R22

R21

R23

6266A_D2

6266A_D3

6266A_D4

6266A_VIN

DCBATOUT_6266A

6266A_VDD

12

R53

10R3F-GP

12

C39

SCD01U25V2KX-3GP

12

H_VID1

H_VID0

12

0R0402-PAD

R25

R24

6266A_D0

6266A_D1

VID037VID138VID239VID340VID441VID542VID6

BOOT1 UGATE1 PHASE1

PGND1

LGATE1

LGATE2

PGND2 PHASE2 UGATE2

BOOT2

24

6266A_ISEN1

C31

6266A_ISEN2

R460

1 2

0R2J-2-GP

one phase

R50

1 2

10R2F-L-GP

C40

SC1U25V0KX-GP

R64

1 2

H_VID[6..0] 5

36 35 34 33 32 31

PVCC

30 29 28 27 26 25

NC#25

1 2

SCD22U10V2KX-1GP

one phase

5V_S0

0R0402-PAD

3

Id=19.5A Qg=21.5~33nC, Rdson=5.5~6.7mohm

POWER SB

R29

6266A_BOOT1

1 2

2D2R2J-GP

6266A_UGATE1 6266A_PHASE1

6266A_ LGATE1 5V_S06266A_NTC

1 2

6266A_LGATE2

SC2D2U16V3KX-GP

6266A_PHASE2 6266A_UGATE2

R37

6266A_BOOT2

1 2

2D2R2J-GP

C29

6266A_VO

1 2

SCD22U10V2KX-1GP

5V_S0

-1

3

1

2

C18

one phase

6266A_UGATE1

6266A_PHASE1

6266A_BOOT1_R

C17

C17 SCD22U25V3KX-GP

SCD22U25V3KX-GP

6266A_VSUM

6266A_ISEN1

6266A_VO 6266A_ISEN2

C20

2

SCD22U25V3KX-GP

one phase

1

6266A_BOOT2_R

6266A_UGATE2

6266A_PHASE2

6266A_LGATE2

6266A_VSUM 6266A_ISEN2

6266A_VO 6266A_ISEN1

2008/05/06

BSC120N03MS-G-GP

BSC057N03MSG-GP

6266A_ LGATE1

R67 3K65R2F-1-GPR67 3K65R2F-1-GP

1 2

R39 10KR2F-2-GP

1 2

one phase

R46 1R2F-GPR46 1R2F-GP

1 2

R48 10KR2F-2-GP

1 2

one phase

2008/05/06

U29

BSC120N03MS-G-GP

U7

R62

1 2

R56

1 2

R45

1 2

R42

1 2

U30

G

4 5

U11

G

4 5

678

G

4 5

678

G

4 5

BSC057N03MSG-GP

one phase

3K65R2F-1-GP

3K65R2F-1-GP 10KR2F-2-GP

10KR2F-2-GP

one phase

1R2F-GP

10KR2F-2-GP

one phase

678

DDD

2

DDD

D

SSS

123

D

SSS

123

2

D

SSS

123

D

SSS

123

one phase

1

DCBATOUT_6266A

SB

-1

12

C15

SC10U25V6KX-1GP

DY

Cyntec 10*10*4 DCR=1.05+-5%mohm, Irating=30A Isat=60A

L8

1 2

IND-D36UH-9-GP

678

DDD

D

U31

SSS

G

SSS

G

4 5

BSC057N03MSG-GP

6266A_ISEN1_P1_VCORE

6266A_ISEN2_P1_VCORE

678

DDD

U28

G

4 5

BSC057N03MSG-GP

6266A_ISEN2_P2_VCORE

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

G40

G40 GAP-CLOSE

GAP-CLOSE

123

1 2

-1

12

DY

Cyntec 10*10*4 DCR=1.05+-5%mohm, Irating=30A Isat=60A

IND-D36UH-9-GP

D

SSS

one phase

123

1 2

6266A_ISEN1_P2_VCORE

-1

12

C37

C38

SC10U25V6KX-1GP

DY

12

CAP

G4 GAP-CLOSEG4GAP-CLOSE

1 2

DCBATOUT_6266A

SB

-1

12

C319

C36

SC10U25V6KX-1GP

L9

1 2

one phase

G3 GAP-CLOSEG3GAP-CLOSE

ISL6266A_CPU_CORE

Cathedral Peak II

DY

12

CAP

G39

G39 GAP-CLOSE

GAP-CLOSE

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

SC10U25V6KX-1GP

TC2

SE330U2VDM-L-GP

CAP

C14

SC10U25V6KX-1GP

TC6

SE330U2VDM-L-GP

CAP

34 43Wednesday, July 16, 2008

DY

C331

C331 SCD1U50V3KX-GP

SCD1U50V3KX-GP

1 2

Vcc_core Iomax=38A

12

TC16

SE330U2VDM-L-GP

CAP

DY

C322

SCD1U50V3KX-GP

1 2

12

TC4

SE330U2VDM-L-GP

of

-1

VCC_CORE

12

VCC_CORE

SC

TC3

SE330U2VDM-L-GP

-1

5

hexainf@hotmail.com

DCBATOUT_51125DCBATOUT

G79

1 2

GAP-CLOSE-PWR

G27

1 2

GAP-CLOSE-PWR

G28

D D

-1

12

TC25

TC25 SE68U25VM-3-GP

SE68U25VM-3-GP

12

TC27

DY

ST15U25VDM-1-GP

C C

Cyntec 7*7*3 DCR=30mohm, Irating=6A Isat=13.5A

1 2

GAP-CLOSE-PWR

G83

1 2

GAP-CLOSE-PWR

G81

1 2

GAP-CLOSE-PWR

G26

1 2

GAP-CLOSE-PWR

G25

1 2

GAP-CLOSE-PWR

DCBATOUT_51125

C290

SCD01U50V2KX-1GP

DY

-1

C523

C526

12

SC10U25V6KX-1GP

DY

D

Iomax=5A

3D3V_PWR

12

C570

TC12

DY

SCD1U10V2KX-4GP

ST220U6D3VDM-20GP

B B

6K65R2F-GP

10KR2F-2-GP

A A

L20

1 2

IND-3D3UH-57GP

12

GAP-CLOSE-PWR-3-GP

D

U49

SI4812BDY-T1-E3-GP

12

R374

R374 0R2J-2-GP

0R2J-2-GP

DY

51125_FB2_R

12

C501

C501 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

DY

12

G75

R371

R366

Close to VFB Pin (pin5)

5

3D3V_S53D3V_PWR

G98

1 2

GAP-CLOSE-PWR

G99

1 2

GAP-CLOSE-PWR

G93

1 2

GAP-CLOSE-PWR

G101

1 2

GAP-CLOSE-PWR

G91

1 2

GAP-CLOSE-PWR

G95

1 2

GAP-CLOSE-PWR

G97

1 2

GAP-CLOSE-PWR

678

DDD

U48

U48 SI4800BDY-T1

SI4800BDY-T1

SSS

GD

SSS

GD

123

4 5

GS

SCD1U25V3KX-GP

678

DDD

SSS

GD

SSS

GD

123

4 5

GS

Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm

51125_VREF

3D3V_AUX_S5

51125_VREF

3D3V_AUX_S5

4

51125_ENTIP2 51125_ENTIP1

3 4

DCBATOUT_51125

VBST2 DRVH2 LL2 DRVL2

VO2 VFB2

EN0 ENTRIP2 VREF TONSEL

SKIPSEL

VREG3

8

3D3V_AUX_S5_5_51125

12

2 1

C518

12

DY

16

VIN

VBST1

DRVH1

LL1

DRVL1

VO1

VFB1

PGOOD

ENTRIP1

GND GND

VCLK

VREG5

17

GAP-CLOSE-PWR-3-GP

5V_AUX_S5_51125

12

C512

C512 SC10U10V5KX-2GP

SC10U10V5KX-2GP

S5_ENABLE30,32,41 S5_ENABLE 30,32,41

51125_ENTIP2 51125_ENTIP1

Id=7A Qg=8.7~13nC Rdson=23~30mohm

C293

51125_VBST2

12

1 2

R384 820KR2F-GPR384 820KR2F-GP

51125_VREF

SCD22U6D3V2KX-1GP

12

C497

R365

R365 0R0402-PAD

0R0402-PAD

R362

DY

0R2J-2-GP

R390

DY

0R2J-2-GP

R389

0R2J-2-GP

R391

DY

0R2J-2-GP

4

12

DY

51125_DRVH2

51125_DRVL2

51125_TONSEL

51125_SKIPSEL51125_SKIPSEL

3D3V_AUX_S5

12

C495

SC18P50V2JN-1-GP

12

51125_LL2

51125_FB2

51125_EN

51125_ENTIP2

TPS51125RGER-GP

74.51125.073

1 2

GAP-CLOSE-PWR-3-GP

SC10U10V5KX-2GP

R361

R361 110KR3F-GP

110KR3F-GP

U37

9 10 11 12

7

5

13

6

3

4

14

G77

C506

POWER SA

Q20

2N7002DW-1-GP

C521

SC10U25V6KX-1GP

12

22 21 20 19

24 2

23 1 15 25

18

G78

1 2

3

5 6

SCD01U50V2KX-1GP

51125_VBST1 51125_DRVH1 51125_LL1 51125_DRVL1

51125_VO151125_VO2 51125_FB1

51125_PGOOD 51125_ENTIP1

51125_VCLK

5V_AUX_S5

3

5V_AUX_S5

TPAD28TPAD28

4

RN60

RN60 SRN100KJ-6-GP

SRN100KJ-6-GP

1

2 3

Id=7A Qg=8.7~13nC Rdson=23~30mohm

3D3V_S5

C507

SCD1U25V3KX-GP

1 2

12

R377

R377 100KR2J-1-GP

100KR2J-1-GP

DY

Q21

5 6

2N7002DW-1-GP

U24

SI4800BDY-T1

GS

U25

SI4812BDY-T1-E3-GP

GS

Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm

2

34 2 1

D

678

DDD

SSS

GD

SSS

GD

123

4 5

D

678

DDD

SSS

GD

SSS

GD

123

4 5

2

12

C291

SC18P50V2JN-1-GP

12

R221

DY

100KR3F-GP

C294

12

SC10U25V6KX-1GP

SC18P50V2JN-1-GP

DY

DCBATOUT_51125

-1

C292

C532

12

SC10U25V6KX-1GP

SCD01U50V2KX-1GP

DY

Cyntec 7*7*3 DCR=30mohm, Irating=6A Isat=13.5A

L3

1 2

IND-3D3UH-57GP

G74

12

R373

DY

0R2J-2-GP

C500

12

R370

R370 30KR2F-GP

30KR2F-GP

51125_FB1_R

12

DY

12

R363

R363 20KR2F-L-GP

20KR2F-L-GP

Close to VFB Pin (pin2)

Title

DCDC 5V/3D3V (TPS51125)

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

12

GAP-CLOSE-PWR-3-GP

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

1

Iomax=5A

C481

SCD1U10V2KX-4GP

1

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

5V_PWR

12

35 43Wednesday, July 16, 2008

5V_S55V_PWR

G12

G14

G16

G13

G15

G18

G17

TC11

ST220U6D3VDM-15GP

SC

of

5

4

3

2

1

1D5V_S0 Iomax=2.5A

D D

DY

12

C126

SC10U10V5ZY-1GP

CPUCORE_ON34,37,38

R220

R218

SC1U10V2ZY-GP

PM_SLP_S3#

5V_S5 1D8V_S3

12

C287

12

0R0402-PAD

12

0R0402-PAD

C284

PM_SLP_S3#18,27,30,32,37,38

C C

B B

SC1U10V3ZY-6GP

PM_SLP_S4#18,27,30,37

DDR_VREF_S3_1

A A

5

9026_S5 9026_S3

12

R120

R117

12

0R0402-PAD

4

SC10U10V5ZY-1GP

0R0402-PAD

3D3V_S0

10

9 8 7 6

RT9026PFP-GP

74.09026.079

C127

5912_EN_U111

12

R119

2K2R2J-2-GP

5912_POK_U111

SC10U10V5ZY-1GP

U23

VDDQSNS

VIN S5 GND S3

VTTSNS

VTTREF

VLDOIN

PGND

GND

11

VTT

C289

1D8V_S3

12

1

2

3

4

5

SC10U10V5ZY-1GP

5V_S5

12

SC1U16V3ZY-GP

VDD4NC#5

3

VIN

2

EN

1

PGOOD

U17

U17 RT9018A-25PSP-GP

RT9018A-25PSP-GP

74.09018.A3D

SCD1U10V2KX-4GP

1 2

G7

C131

Vo(cal.)=1.5024V

9

5

GND

VOUT

ADJ

GND

12

6

R132

7

18KR2J-GP

8

5912_FB_U111

12

R131

R131 20K5R2F-GP

20K5R2F-GP

1D5V_LDO

12

C154

SC100P50V2JN-3GP

12

DY

C156

C155

SC10U10V5ZY-1GP

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G9

G9

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G8

G8

1 2

SC10U10V5ZY-1GP

GAP-CLOSE-PWR

GAP-CLOSE-PWR G6

G6

GAP-CLOSE-PWR

1D5V_S0

Vo=0.8*(1+(R1/R2))

Iomax=1A OCP>2A

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

12

C286

C286 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

G19

G20

G21

DDR_VREF_S3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

1D5V & 0D9V

Cathedral Peak II

1

SC

36 43Wednesday, July 16, 2008

SC

of

C288

C285

DDR_VREF_PWR

12

3

5

hexainf@hotmail.com

G94

1 2

GAP-CLOSE-PWR

G90

1 2

GAP-CLOSE-PWR

G89

1 2

GAP-CLOSE-PWR

G88

1 2

GAP-CLOSE-PWR

G92

1 2

GAP-CLOSE-PWR

G96

1 2

GAP-CLOSE-PWR

SC4D7U10V5KX-1GP

R443

12

0R0402-PAD

DY

R441

12

0R0402-PAD

DY

DCBATOUT_51124

1

BC2

SCD47U6D3V2KX-GP

2

1

BC1

SCD47U6D3V2KX-GP

2

-1

12

C557

51124_LL1

DCBATOUT

D D

C C

B B

A A

DY

12

TC26

TC26 ST15U25VDM-3-GP

ST15U25VDM-3-GP

PM_SLP_S4#18,27,30,36

PM_SLP_S3#18,27,30,32,36,38

5

4

Vtrip(mV)=Rtrip(Kohm)*10(uA) Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L

TC30

TC30 SE68U25VM-3-GP

SE68U25VM-3-GP

R446

R446 0R0402-PAD

0R0402-PAD

5V_S5

12

R230

3D3R3J-L-GP

12

51124_V5FILT

51124_EN1 51124_EN2

17K8R3F-1-GP

TONSEL

Vout=0.758V*(R1+R2)/R2 --> PWM mode Vout=0.764V*(R1+R2)/R2 --> Skip Mode

C559

SC1U10V3KX-3GP

12

R420

240k/CH1 300k/CH2

4

1D05V_PWR 1D8V_PWR 51124_VFB2 51124_VFB1

U54

15

V5FILT

16

V5IN

23

EN1

8

EN2

3

GND

25

GND

13

PGND2

18

PGND1

51124_TRIP1

51124_TRIP2

12

R424

R424 20KR3F-GP

20KR3F-GP

C571

51124_VBST1

12

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP C567

C567

51124_VBST251124_LL2

12

SCD1U16V2KX-3GP

GND

2

5

1

VFB1

VFB2

TRIP1

TRIP2

17

14

22

51124_V5FILT

OPEN

300k/CH1 360k/CH2

6

VO1

VBST1

9

VO2

VBST2

51124RGER_PG1

51124RGER_PG2

24

PGOOD1

7

PGOOD2

DY

R447

R447 0R0402-PAD

0R0402-PAD

DRVH1

LL1

DRVL1

DRVH2

LL2

DRVL2 TONSEL

4

51124_TONSEL

R234

10KR2J-3-GP

1 2

V5FILT

360k/CH1 420k/CH2

2008/06/16-1

12

51124_DRVH1

21

51124_LL1

20

51124_DRVL1

19

51124_DRVH2

10

51124_LL2

11

51124_DRVL2

12

TPS51124RGER-GPU1

74.51124.073

R238

DY

0R2J-2-GP

1 2

3

DY

C581

C581 SC1000P50V3JN-GP

SC1000P50V3JN-GP

C582

C582 SC1000P50V3JN-GP

SC1000P50V3JN-GP

3

CPUCORE_ON 34,36,38

Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm

SI4800BDY-T1

Id=7A Qg=8.7~13nC Rdson=23~30mohm

SI4812BDY-T1-E3-GP

Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm

SI4800BDY-T1

Id=7A Qg=8.7~13nC Rdson=23~30mohm

SI4800BDY-T1

SI4812BDY-T1-E3-GP

DCBATOUT_51124

678

DDD

U45

GD

4 5

678

DDD

U44

GD

4 5

DCBATOUT_51124

U47

GD

4 5

U46

GD

4 5

2

C560

C560 SC10U25V6KX-1GP

SC10U25V6KX-1GP

1 2

Cyntec 10*10*4 DCR=4.2mohm, Irating=16A

SSS

Isat=33A

123

L18

1 2

IND-1D5UH-34-GP

SSS

123

678

DDD

Cyntec 10*10*4 DCR=4.2mohm, Irating=16A

SSS

Isat=33A

123

IND-D56UH-12-GP

678

DDD

SSS

123

2

30KR2F-GP

51124_VFB1

21K5R3F-GP

C556

1 2

SC10U25V6KX-1GP

L19

1 2

10K7R2F-GP

51124_VFB2

30KR2F-GP

12

R239

12

R235

R237

R236

1

1D8V_PWR

G52

1 2

GAP-CLOSE-PWR

G49

1 2

GAP-CLOSE-PWR

G57

1 2

GAP-CLOSE-PWR

-1

C553

SC10U25V6KX-1GP

1 2

C304

12

SC18P50V2JN-1-GP

DY

-1

12

C563

C563 SC10U25V6KX-1GP

SC10U25V6KX-1GP

DY

12

C303

12

SC18P50V2JN-1-GP

DY

12

1D05V Iomax=10.5A OCP>20A

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet

DY

1 2

DY

1D8V_PWR

12

C504

TC22

SCD1U10V2KX-4GP

12

SE330U2D5VDM-LGP

DY

1D8V Iomax=10A OCP>15A

C550

SCD1U50V3KX-GP

DY

1 2

1D05V_PWR

12

C503

12

SCD1U10V2KX-4GP

DY

TPS51124_1D8V_1D05V

Cathedral Peak II

GAP-CLOSE-PWR

G58

C549

SCD1U50V3KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1 2

GAP-CLOSE-PWR

G55

1 2

GAP-CLOSE-PWR

G56

1 2

GAP-CLOSE-PWR

G54

1 2

GAP-CLOSE-PWR

G50

1 2

GAP-CLOSE-PWR

G53

1 2

GAP-CLOSE-PWR

G51

1 2

GAP-CLOSE-PWR

G48

1 2

GAP-CLOSE-PWR

G59

1 2

GAP-CLOSE-PWR

1D05V_PWR 1D05V_S0

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

TC21

ST330U2D5VDM-9GP

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

37 43Wednesday, July 16, 2008

1

G71

G70

G69

G67

G65

G63

G46

G60

G61

G72

of

1D8V_S3

SC

5

1 2

GFX

R433

1 2

DY

0R2J-2-GP

R434

150KR2F-L-GP

C569

SCD01U50V2KX-1GP

GFX

SC1KP50V2JN-2GP

R437

1 2

6K98R3F-GP

12

GFXVR_EN7

PL on P.7

PM_SLP_S3#18,27,30,32,36,37

3D3V_S0

GFX

1 2

6236A_VDIFF

6236A_VSEN

C564

SC1KP50V2JN-2GP

1 2

GFX

R228

R228 10R3F-GP

10R3F-GP

DY

6236A_RBIAS 6236A_SOFT 6236A_OCSET6263A_VCC_PRM

SC1KP50V2JN-2GP

12

R226

R226 10R3F-GP

10R3F-GP

6236A_VW

6236A_COMP

6236A_FB

12

C299

DY

D D

CPUCORE_ON34,36,37

C C

R231

1 2

GFX

R26 for Intel GPU/With Load line R27 for ATI GPU/Without Load line

B B

VCC_AXG_SENSE9

VSS_AXG_SENSE9

A A

374KR3-GP

R432

1 2

2K21R3F-L-GP

GFX

R436

R436 4K99R2F-L-GP

4K99R2F-L-GP

R227

R227 9K1R3F-1-GP

9K1R3F-1-GP

1 2

C301

1 2

GFX

SC68P-GP

6236A_COMP_R

GFX

6236A_FB_R

G102 GAP-CLOSE-PWRG102 GAP-CLOSE-PWR

1 2

G100 GAP-CLOSE-PWRG100 GAP-CLOSE-PWR

1 2

5

GFX

C302

1 2

GFX

SC180P50V2JN-1GP

C568

1

SC560P50V2KX-2GP

SC1KP50V2JN-2GP

C566

2

GFX

C300

GFX

R427

0R0402-PAD

R421

1 2

DY

R224

1 2

DY

R225

1 2

10KR2F-2-GP

R431

1 2

1K91R2F-1-GP

GFX

SC330P50V2KX-3GP

SCD1U25V3KX-GP

4

GFX

C555

1 2

SCD01U50V2KX-1GP

12

0R2J-2-GP

GFX

33

U51

GND_T

1

RBIAS

2

SOFT

3

OCSET

4

VW

5

COMP

6

FB

7

VDIFF

8

VSEN

RTN9DROOP10DFB11VO12VSUM13VIN14VSS15VDD

6236A_RTN

R422

2K55R2F-GP

C562

12

GFX

R419

1KR3F-GP

GFX

C558

Panasonic ERT-J1VR103J

4

POWER_MONITOR

6236A_GOOD

6236A_AF_EN

31

32

30

FDE

AF_EN

PGOOD

GFX

6236A_DFB

6236A_DROOP

6263A_VCC_PRM

GFX

1 2

12

GFX

R378

1 2

NTC-10K-9-GP

12

6236A_VR_ON

6236A_PMON

28

29

PMON

VR_ON

6236A_VIN

6236A_VSUM

12

GFX

R417

R417 10KR2J-3-GP

10KR2J-3-GP

GFX

27

VID225VID326VID4

PVCC

LGATE

PGND PHASE UGATE

BOOT

16

ISL6263ACRZ-T-GP

74.06263.073

6236A_VDD

C547

1 2

SC1U16V3KX-2GP

GFX

R223

1 2

GFX

C298

C298 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

GFX

C551

1 2

GFX

SCD033U25V3KX-GP

C552

1 2

GFX

SCD033U25V3KX-GP

R414

1 2

4K53R2F-1-GP

GFX

R407

1 2

GFX

VSS_AXG_SENSE_OUTCAP

VCC_AXG_SENSE_OUTCAP

VID1 VID0

10R2F-L-GP

3K57R2F-GP

24 23 22 21 20 19 18 17

R405

6236A_LGATE

6236A_PHASE 6236A_UGATE 6236A_BOOT

1 2

GFX

1 2

R401

3D3R3J-L-GP

GFX

POWER SB

10R2F-L-GP

DCBATOUT

R412

1 2

7K68R2F-GP

6236A_VID4 6236A_VID3 6236A_VID2 6236A_VID1

6236A_VID0

1 2

GFX

6236A_BOOT_R

5V_S0

R229

R229 0R0402-PAD

0R0402-PAD

3

R415 0R0402-PADR415 0R0402-PAD

12

R413 0R0402-PADR413 0R0402-PAD

12

R411 0R0402-PADR411 0R0402-PAD

12

R408 0R0402-PADR408 0R0402-PAD

12

R404 0R0402-PADR404 0R0402-PAD

12

R403

R403 0R0402-PAD

0R0402-PAD

12

5V_S0

C541

GFX

1

2

SC2D2U10V3KX-1GP

1 2

C540

SCD22U16V3KX-2-GP

GFX

6236A_VSUM_R

3

GFX_VID4 GFX_VID3 GFX_VID2 GFX_VID1 GFX_VID0

SI4800BDY-T1

SI4812BDY-T1-E3-GP

GFX_VID[4..0] 7

678

DDD

U42

GFX

GD

4 5

678

DDD

U41

GFX

GD

4 5

GFX

Id=7A

SSS

Qg=8.7~13nC

123

Rdson=23~30mohm

Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm

SSS

123

2

G62 0R3-0-U-GP

1 2

NO GFX

G64 0R3-0-U-GP

1 2

NO GFX

SB

DY

12

SC10U25V6KX-1GP

NO GFX

G66 0R3-0-U-GP

1 2

NO GFX

G68 0R3-0-U-GP

1 2

NO GFX

DCBATOUT_6263A

C536

C525

SC10U25V6KX-1GP

SCD1U50V3KX-GP

1 2

GFX

Cyntec 7*7*3 DCR=8mohm, Irating=13A Isat=24A

L17

1 2

COIL-D82UH-2-GP

GFX

12

G76

G76 GAP-CLOSE-PWR

GAP-CLOSE-PWR

2

12

1D05V_S0 VCC_GFXCORE

12

C530

G73

G73 GAP-CLOSE-PWR

GAP-CLOSE-PWR

1

DCBATOUT_6263A DCBATOUT

G86

1 2

GAP-CLOSE-PWR

G82

1 2

GAP-CLOSE-PWR

G80

1 2

GAP-CLOSE-PWR

G87

1 2

GAP-CLOSE-PWR

G85

1 2

GAP-CLOSE-PWR

G84

1 2

GAP-CLOSE-PWR

GFX CORE Iomax=8.7A OCP>15A

VGFXCORE

12

TC20

TC20 SE330U2VDM-L-GP

SE330U2VDM-L-GP

GFX

12

G23

GAP-OPEN-PWR

Cathedral Peak II

Title

ISL6263A_GFX CORE

Size Document Number Rev

Size Document Number Rev C

C

C Date: Sheet

Date: Sheet

12

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

12

G22

GAP-OPEN-PWR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

1

G47

G45

G44

G43

G42

G41

GFX

TC24

TC24 SE68U25VM-3-GP

SE68U25VM-3-GP

VCC_GFXCOREVGFXCORE

38 43Wednesday, July 16, 2008

-1

SC

of

5

hexainf@hotmail.com

4

3

2

1

R13

1 2

D01R2512F-4-GP

1 2

SCD1U50V3KX-GP

TP137TP137

CHG_AGND

AC_IN#AC_IN#

12

C348

C348 SC1U10V3KX-3GP

SC1U10V3KX-3GP

DCBATOUT

12

C66

12

C51

C51 SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

CHG_ON# 30

3

G2

GAP-CLOSE-PWR

1 2

C580

1 2

SCD1U25V3KX-GP

BATT_SENSE 40

AC_IN# 30

C62

C62 SCD1U50V3KX-GP

SCD1U50V3KX-GP

AD+

D

8

D

7

D

6

D D

C C

49K9R2F-L-GP

AD_IA30

B B

A A

R10

R10 10KR2F-2-GP

10KR2F-2-GP

1 2

DC_IN_D

12

R84

CHG_AGND

R76

1 2

0R0402-PAD

SC220P50V2KX-3GP

3D3V_AUX_S5

P2003EVG-GP

U3

S

S S

S GD

GD

AD+_G_1

AC_OK

3D3V_AUX_S5

C81

12

SCD01U50V2KX-1GP

12

C65

BQ24745_VREF

5

NEAR

1 2 3 45

R11

49K9R2F-L-GP

1234

5

6

C85

1 2

C84

SC2200P50V2KX-2GP

BQ24745_EAO_RC

12

R12

R12 100KR2J-1-GP

100KR2J-1-GP

AD+_G_2

20080605

12

Q3

Q3 2N7002DW-1-GP

2N7002DW-1-GP

12

C63

C63 SC1U10V3KX-3GP

SC1U10V3KX-3GP

CHG_AGND

SC150P50V2JN-3GP

R87

1 2

200KR2F-L-GP

7K5R2F-1-GP

1 2

C78

SC56P50V2JN-2GP

RN61

1 2 3 4 5

SRN100KJ-8-GP-U

309KR3F-GP

R86

AC_OK

8

CHG_ON#

7

AC_IN#

6

BQ24745_CHG_ON

R267

AC_OK

12

AD+

C54

12

R82

1 2

AD+

D6

D6 1SS4000GPT-GP

1SS4000GPT-GP

K A

12

SC1U25V5KX-1GP

R75

1 2

0R0402-PAD

BAT_SCL30,40

BAT_SDA30,40

4K7R2J-2-GP

12

C82

C82 SC1U10V3KX-3GP

SC1U10V3KX-3GP

CHG_AGND

BQ24745_DCIN BQ24745_ACIN

BQ24745_ACOK

CHG_AGND

BQ24745_IINP

BQ24745_FBOBQ24745_FBO_RC

BQ24745_EAI BQ24745_EAO BQ24745_VREF BQ24745_CHG_ON

CHG_AGND

SCD1U10V2KX-4GP

4

U12

22

DCIN

2

ACIN

11

VDDSMB

13

ACOK

10

SCL

9

SDA

14

NC#14

8

VICM

6

FBO

5

EAI

4

EAO

3

VREF

7

CE

12

GND

BQ24745RHDR-GP

DY

C355

AD+_TO_SYS

C79

SCD1U50V3KX-GP

1

CSSP

ICREF

CSSN

ICOUT

BOOT VDDP

UGATE

PHASE

LGATE

PGND CSOP CSON

NC#16

VFB

GND

29

74.24745.073

BQ24745_CHG_ONBQ24745_CHG_ON

12

3 4

AC_OK CHG_ON#

2 1

GAP-CLOSE-PWR

BQ24745_CSSP

12

28

BQ24745_CSSN

27 26

BQ24745_BST

25

BQ24745_VDDP

21

24

BQ24745_LX1

23

20

19 18 17

16

BATT_SENSE

15

Q16

5 6

2N7002DW-1-GP

G1

EC108

SCD1U50V3KX-GP

1 2

POWER SB

CHG_AGND

C48

D8

K A

CH520S-30PT-GP

24745_HIGH_G

1 2

24745_LOW_G

C50

SCD1U50V3KX-GP

AC_IN# to KBC

-1

1 2

SC1U10V3KX-3GP

12

AD+

SB

C320

12

SCD1U25V2ZY-1GP

678

U9

DDD

SSS

GD

SSS

GD

SI4800BDY-T1

123

4 5

678

U10

DDD

SSS

GD

SSS

GD

SI4800BDY-T1

123

4 5

MAX8731A_CSIP MAX8731A_CSIN

2

12

L5

1 2

IND-5D6UH-32-GP

CHG_AGND

BT+DCBATOUT

D

8

D

7

D

6

C349

C58

SC10U25V6KX-1GP

12

SCD1U25V2ZY-1GP

DY

R43

R43 470KR2J-2-GP

470KR2J-2-GP

DCBATOUT

C350

SC10U25V6KX-1GP

U6

S

1

S

2

S

3

GD

4 5

P2003EVG-GP

C61

SC10U25V6KX-1GP

12

DY

-1

R256

BT+_R

1 2

D01R2512F-4-GP

C22

C24

12

G33

1 2

G33

GAP-CLOSE-PWR

1 2

BQ24745 Charger

SC10U25V6KX-1GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cathedral Peak II

1

G34

GAP-CLOSE-PWR

R83

1 2

0R0402-PAD

Cathedral Peak II

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

Date: Sheet

BT+

C325

C324

C318

12

SC10U25V6KX-1GP

SCD1U50V3KX-GP

SC

of

39 43Wednesday, July 16, 2008

A

DC1

7

4 4

6

ACES-CON5-7-GP-U1

20.F1002.005

AD_JK_IN

5 4 3 2

1

EC6

SCD1U50V3KX-GP

1 2

-1

2nd: 20.F1170.005

AD_JK_IN AD_JK_IN

3 3

1 1

TP6AFTE14P-GP TP6AFTE14P-GP TP5AFTE14P-GP TP5AFTE14P-GP

AD_OFF30

D30

D30 S10P40PT-GP-U

S10P40PT-GP-U

3

1 2

B

C

Adaptor in to generate DCBATOUT

AD_JK

12

C1

C1 SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

Q1

R1

B

R2

PDTC124EU-1-GP

AD_OFF#_JK

C E

D1

P6SBMJ24APT-GP

Q2

B

PDTA124EU-1-GP

A K

R2

R1

200KR2F-L-GP

E C

R14

1 2

AD+_2

C8

12

SC1U50V5ZY-1-GP

12

R15

R15 100KR2J-1-GP

100KR2J-1-GP

D

U2

S

1

S

2

S

3

GD

4 5

P2003EVG-GP

E

AD+

D

8

D

7

D

6

BATTERY CONNECTOR

3D3V_AUX_S5

1

D3

BAV99PT-GP-U

BAT_IN#30

BAV99PT-GP-U

BAT_SDA30,39 BAT_SCL30,39

-1

A

KA

DY

2 2

1 1

2

DY

3

BT+

SCD1U50V3ZY-GP

D29

D29 MMPZ5232BPT-GP

MMPZ5232BPT-GP

D4

BAV99PT-GP-U

DY

EC104

3

12

SB

2

12

EC103

EC103 SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

1

2

D5

D5 BAV99PT-GP-U

BAV99PT-GP-U

DY

3

RN42

1

8

EC101

SC1000P50V3JN-GP

7 6

12

-1

BATA_SDA_1 BATA_SCL_1

BAT_IN#_1

EC102

SC1000P50V3JN-GP

BATT_SENSE39

EC99

EC98

12

DY

EC98

12

DY

R257

1 2

0R0402-PAD

SC10P50V2JN-4GP

C

2 3 4 5

SRN33J-7-GP

DY

12

B

BAT1

9

GND

8

GND

7

GND

6

GND

5

DAT

4

CLK

3

BAT_IN

2

BT+2

1

BT+1

ALP-CON7-9-GP

20.81094.007

BATA_SDA_1 BATA_SCL_1 BAT_IN#_1 BT+ BT+

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

D

1 1 1 1 1

AD/BATT CONN

Cathedral Peak II

TP11AFTE14P-GP TP11AFTE14P-GP TP10AFTE14P-GP TP10AFTE14P-GP TP9AFTE14P-GP TP9AFTE14P-GP TP8AFTE14P-GP TP8AFTE14P-GP TP7AFTE14P-GP TP7AFTE14P-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

40 43Wednesday, July 16, 2008

E

SC

5

hexainf@hotmail.com

5V_S0 5V_S0

14

10

9 8

U32C

7

TSAHCT125PW-GP

-1

DCBATOUT

12

EC89

TSAHCT125PW-GP

12

EC76

SCD1U25V2ZY-1GP

DY

12

SCD1U25V2ZY-1GP

DY

D D

14

13

12 11

U32D

7

TSAHCT125PW-GP

12

EC75

SCD1U25V2ZY-1GP

EC94

EC63

SCD1U25V2ZY-1GP

DY

12

EC75

12

EC10

SCD1U25V2ZY-1GP

DY

12

EC7

EC190

SCD1U25V2ZY-1GP

EC190

SCD1U25V2ZY-1GP

DY

H2 PAD-1P-3-GPH2PAD-1P-3-GP

1

12

SCD1U25V2ZY-1GP

DY

EC191

4

H3 PAD-1P-3-GPH3PAD-1P-3-GP

1

12

SCD1U25V2ZY-1GP

DY

EC192

H4 PAD-1P-3-GPH4PAD-1P-3-GP

SCD1U25V2ZY-1GP

H6 PAD-1P-3-GPH6PAD-1P-3-GP

1

H7 PAD-1P-3-GPH7PAD-1P-3-GP

1

H5 PAD-1P-3-GPH5PAD-1P-3-GP

1

H8 PAD-1P-3-GPH8PAD-1P-3-GP

1

3

H10

H10 PAD-1P-3-GP

PAD-1P-3-GP

1

H11

H11 PAD-1P-3-GP

PAD-1P-3-GP

1

H12

H12 PAD-1P-3-GP

PAD-1P-3-GP

1

H13

H13 PAD-1P-3-GP

PAD-1P-3-GP

1

H14

H14 PAD-1P-3-GP

PAD-1P-3-GP

1

2

H15

H15 PAD-1P-3-GP

PAD-1P-3-GP

1

H22

H22 HOLE

HOLE

1

-1

VCC_GFXCORE

12

EC133

GFX

SCD1U25V2ZY-1GP

DCBATOUT

12

TC32

TC31

SE100U25VM-L1-GP

12

TC34

TC33

SE100U25VM-L1-GP

3D3V_S0

12

EC18

EC9

SCD1U25V2ZY-1GP

DY

C C

5V_S0

12

EC68

EC151

SCD1U25V2ZY-1GP

DY

5V_S5

12

EC49

EC66

SCD1U25V2ZY-1GP

DY

B B

12

EC155

EC150

SCD1U25V2ZY-1GP

DY

12

EC74

EC163

SCD1U25V2ZY-1GP

DY

12

EC72

EC82

SCD1U25V2ZY-1GP

DY

12

EC170

EC172

SCD1U25V2ZY-1GP

DY

12

EC73

EC61

SCD1U25V2ZY-1GP

DY

12

EC81

EC85

SCD1U25V2ZY-1GP

DY

12

EC168

SCD1U25V2ZY-1GP

DY

12

EC118

SCD1U25V2ZY-1GP

DY

12

EC83

SCD1U25V2ZY-1GP

DY

12

EC169

EC158

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

DY

12

EC65

EC77

SCD1U25V2ZY-1GP

DY

12

EC139

12

EC125

EC67

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

DY

1D05V_S0

DY

1D8V_S3

DY

BT+

DY

12

EC71

SCD1U25V2ZY-1GP

DY

1D2V_LAN_S5 3D3V_LAN_S5

12

EC112

SCD1U25V2ZY-1GP

DY

EC117

12

SCD1U25V2ZY-1GP

DY

12

EC91

EC88

SCD1U25V2ZY-1GP

DY

12

EC100

SCD1U25V2ZY-1GP

DY

12

EC111

EC116

SCD1U25V2ZY-1GP

EC116

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

DY

-1

12

EC54

EC148

SCD1U25V2ZY-1GP

DY

EC119

EC126

SCD1U25V2ZY-1GP

DY

12

EC50

EC20

SCD1U25V2ZY-1GP

DY

12

EC69

EC53

SCD1U25V2ZY-1GP

DY

-1 -1

12

EC62

EC147

SCD1U25V2ZY-1GP

DY

12

EC136

SCD1U25V2ZY-1GP

DY

12

EC165

EC70

SCD1U25V2ZY-1GP

DY

12

EC138

EC156

SCD1U25V2ZY-1GP

DY

12

EC174

EC173

SCD1U25V2ZY-1GP

DY

12

EC176

EC179

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

DY

-1

12

EC105

SCD1U25V2ZY-1GP

EC97

EC95

SCD1U25V2ZY-1GP

DY

TOP BOTTOM

GND10

GND2

GND2 SPRING-36-GP

SPRING-36-GP

34.4B542.001

1

DY

H21

H20

H19

H18

HOLE

A A

1

34.42Y01.031

1

34.42Y01.031

HOLE

1

34.42Y01.031

HOLE

1

34.42Y01.031

H1

H1 HOLE

HOLE

GND3

GND3 SPRING-12-GP-U

SPRING-12-GP-U

34.41Y19.001

1

DY

1

34.42Y01.031

GND4

GND4 SPRING-48-GP

SPRING-48-GP

34.43G01.002

1

DY

H16

H16 HOLE

HOLE

1

34.4G502.021

H17

H17 HOLE

HOLE

1

34.4G502.021

GND7

GND7 SPRING-7

SPRING-7

34.49U26.001

1

DY

SA SB

CPU NB MDC MINIC1

5

4

GND8

GND8 SPRING-12-GP-U

SPRING-12-GP-U

34.41Y19.001

1

DY

Check test point

-1

Test Point放在Dimm Door打開可量測處

3

1

3D3V_AUX_S5

PM_PWRBTN#18,30

H_PWRGD4,17,32 S5_ENABLE30,32,35 H_CPURST#4,6

GND10 SPRING-23-GP

SPRING-23-GP

34.39S07.001

DY

3D3V_S0

3D3V_S5 5V_S5

GND11

GND11 SPRING-7

SPRING-7

34.49U26.001

1

DY

GND12

GND12 SPRING-7

SPRING-7

34.49U26.001

1

DY

1 1 1 1 1 1 1 1

2

GND14

GND14 SPRING-12-GP-U

SPRING-12-GP-U

34.41Y19.001

1

TP179AFTE14P-GP TP179AFTE14P-GP TP180AFTE14P-GP TP180AFTE14P-GP TP181AFTE14P-GP TP181AFTE14P-GP TP182AFTE14P-GP TP182AFTE14P-GP TP183AFTE14P-GP TP183AFTE14P-GP TP184AFTE14P-GP TP184AFTE14P-GP TP185AFTE14P-GP TP185AFTE14P-GP

Title

TP186AFTE14P-GP TP186AFTE14P-GP

Size Document Number Rev

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

EMI/Spring/Boss

Cathedral Peak II

1

41 43Wednesday, July 16, 2008

SC

of

5

SA to SB

1.No Power. change KBC to BO (71.03310.A0G)

2.XD Card function fail Cut CARD1 pin27. connect to R400 pin2

3.leakage GFX power VDD connect to S0

4.Gain=8db.1.83W R137=16K.R138=30K

5.Int_MIC voice to small add VREF C577=4.7U

D D

6.Realtek Audio report change R327=68 ohm.R333=68 ohm.merge to RN68

7.SIV reset R140=300,R55=100.C44=100p,R398=0,R369=100.C502=100p,R85=300,R162=100.C210=100p,R392=0,

8.SIV Azalia DY C542 BITCLK rise and fall time fail RN10 change to R453=22ohm(MDC).R452=0ohm(codec)

9.add MINICard power option for customer ask R454.R455

10.interfere HDD C390.C401.C419. change 0603 4.7U

11.power team R38=12K.R47=2.74K .R361=110K.R221=100K.R237=10.7K .R424=20K.R420=17.8K .R227=10.5K R48=10K.R29=2.2 .R37=2.2 .R401=3.3 .C49=0.1u.add R456.add C580.D8=83.R0203.08F . TC11 change to 77.C2271.00L TC9 change to 77.E9071.001 (power ripple) add R458=1K.R459=1k.R460

12.Oscillation C30=15p.C23=15P.C537=27p.C538=22p

13.audio S3.S4 resume bobo sound R143 DY. R187 0ohm pad

14.AC mode have hight frequency noise

C C

R390 DY.R389 0ohm pad

15.ESD issue BAT_IN# series 33 ohm RN42 change to 8p4r add R457.D27.D28.D29.U55.U56.C578.R457.

16.noise DY C523.TC25 change to 77.C1561.01L

20.LED brightness R2.R1.R4.R5.R451.R450.R449.R448=56

EMI

1.EC23 ~~EC48.EC134.EC135.EC167.EC121.EC122.EC123.

2.EC89.EC12.EC8.EC119.EC156.EC173.

3.EC174~~~EC179.

4.GND13.GND14.

Merge

1.R313.R314.R315.R319.R320.R149. change to RN59

2.RN6.RN46. change to RN6

3.R341.R343.R344 change to RN46

4.R385 change to 100K merge R382 to RN56

5.RN53.RN56. change to RN53

6.Q20.Q21 change to Q21. Q21.Q23 change to Q21.

B B

7.R367.R368 change to RN60

8.Q16.Q17 change to Q16

9.R262.R264.R268.R277 change to RN61

10.R205.R204.R206 change to RN62

11.RN33.R215 change to RN33

12.R209.R210.R348 change to RN63

13.R280=10K.merge R269 to RN64

14.R109.R112.R111.R290 change to RN65

15.R325.R323 change to RN66

16.R304.R307 change to RN67

17.U14 change to 73.01G08.L04 .add C579

18.R51.R399 vhange to RN69.

0 Ohm change to PAD R427.R403.R415.R413.R411.R408.R404.R146.R197.R157.R153.R353.R352.R358.R357.R310.R196.R346.R342.R351. R191.R203.L14.R212.R350.R179.R217.R6.R7.R242.R294.R278.R279.R292.R293.R232.R233.R410.R393. R416.R250.R251.R248.R249.R246.R247.R244.R245.R129.R127.R376.ER2.R383.R28.R16.R19.R20.R21. R22.R23.R24.R25.R57.R58.R365.R164.

4

3

05/05 Page16: merge LAUNCHCN1 LEDCN1 to LAUNCHCN1 15pins

2

1

Page15: change CRT1 from 20.20717.015 to 20.20378.015

Page26: change RJ1 from 22.10277.011 to 22.10245.E91

Page23: change BLUE1 from 20.D0197.004 to 20.F0984.004

Page24: change CARD1 from 20.I0081.001 to 20.I0067.001

Page21: change FAN1 from 20.F0714.003 to 20.F1000.003

Page27: change MINIC1 from 20.F1049.052 to 62.10043.331

Page30: change TPAD1 from 20.K0286.012 to 20.K0174.012

Page34: change U29 U30 from 84.07686.037 to 84.12003.A37 and change U7 U11 U28 U31 from 84.04634.037 to 84.57N03.A37

Page16: delete LED1 LED2 R1 R2 R4 R5

05/07 Page17: change RTC1 from 62.70001.011 to 20.F0700.003

Page41: delete EC51

Page10: delete C159

Page25: change U13 from 72.24256.R01 to 72.24C08.J01

05/08 Page30: change KB1 from 20.K0127.026 to 20.K0204.026

Page26: delete RN36 RN37 RN38 RN39

Page23: change TC28 from 80.15715.34L to 77.C1071.081

Page26: change TC15 from 80.15715.34L to 80.15715.12L

Page23: delete R244 R245 R246 R247 R248 R249 R250 R251

Page24: change CARD1 from 20.0067.001 to 20.I0079.001

05/09 Page41: delete GND13

A A

5

4

05/12 Page24: add EC127 EC128 EC185 EC186

Page35: change TC27 from 77.C1561.01L to

77.C1561.03L Page40: change BAT1 from 20.80697.007 to

20.80906.007

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Change List

Cathedral Peak II

of

42 43Wednesday, July 16, 2008

1

SC

5

hexainf@hotmail.com

05/13 Page16: change pin1 pin2 of LED6 from 3D3V_S5 to 3D3V_AUX_S5

05/14 Page17: add EC187 EC188

D D

Page16: add EC189 TP189~TP195

Page30: change TPAD1 from 20.K0174.012 to 20.K0228.012

Page41: add EC190~EC195

05/15 Page17: change U15 pin13 pin14 from pull high 3D3V_S0 to VGATE_PWRGD

Page17: change Q11 G from 3D3V_S0 to VGATE_PWRGD

Page40: change D1 from 83.P4SSM.BAM to 83.P6SBM.AAG

SB

C C

05/15 Page30: change KBC_GPIO0C from pull-high 3D3V_AUX_S5 with 10K to pull-low GND with 1K

06/06 Page3: change C176 C177 from 78.27034.1FL (27p) to 78.33034.1FL (33p)

Page22: delete D15

Page29: change R127 R129 from 0ohm pad to 12K 1K5 and change R137 R138 from 16K 30K to 13K 20K

Page34: change TC1 from 77.C1561.01L (15u) to 79.10712.L02 (100u) and C14 C37 C38 C319 dummy

B B

Page35: change TC25 from 77.C1561.01L (15u) to 79.68612.30L (68u) and change C292 to dummy

Page37: add TC30 79.68612.30L (68u) and change C553 C563 to dummy

Page38: change C536 to dummy and change TC24 from 77.C1561.01L (15u) to 79.68612.30L (68u)

Page39: change C61 to dummy

Page41: add TC31 TC32 TC33 TC34 and delete GND9

06/09

A A

Page16: add LED3 R458 R465

06/11 Page30: change R379 from 10K to 1K

06/13 Page3: add EC59 DY

5

4

3

06/13 Page37: change R446 R447 from 0ohm pad to 0ohm resistor

2

1

Page26: change XF1 from 68.69241.301 to 68.89240.30A

06/17 Page39: C320 mount

Page40: EC104 mount

Page41: EC95 mount

Page39: change R11 from 10K to 49K9

Page34: change C49 from 47nF to 22nF and change R47 from 2.74K to 1.74K

Page37: add C581 C582

Page41: delete GND6

06/20 Page25: change C30 from 15p to 12p

SC 06/30 Page37: change R446 R447 from 0ohm resistor to 0ohm pad

07/07 Page3: change C462 to DY

Page16: change EC22 to DY

Page21: change C109 to DY

Page40: change D29 to DY

Page10: change C187 C175 C263 to DY

Page12: change C166 to DY

Page19: change C396 C407 to DY

Page25: change C68 C69 to DY

Page40: change EC102 to DY

Page41: change EC89 EC119 EC156 EC173 to DY

Page24: change C529 to DY

Page27: change C283 C493 to DY

Page30: delete R397, S5_ENABLE_KBC connect to RN30 PIN5, RN30 PIN4 connect to GND

4

3

2

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Change List

Cathedral Peak II

SC

of

43 43Wednesday, July 16, 2008

1

07/07 Page14: add F3, DY F4

5

4

3

2

1

06/13

Page34: DY C15 C36, add C319 C38

Page39: change C61 to DY

D D

Page35: change C292 C523 to DY

Page37: change C553 C563 to DY

Page34: change TC1 to mount

Page38: change TC24 to GFX

Page35: change TC25 to mount

Page37: change TC30 to mount

Page41: change TC31 TC32 TC33 TC34 to mount

C C

07/09 Page34: change C322 C331 from DY to mount

Page39: change EC108 from DY to mount

Page40: change EC6 from DY to mount

07/10 Page18: DY R136 R305 for ICS, DY R135 R305 for RTL

Page16: change LAUNCHCN1 to 2nd source

Page3: change EC59 from 5p DY to 22p mount

B B

07/10 Page17: change RTC1 from 20.F0700.003 to 62.70001.011

Page32: change C574 from 1u to 2.2u

07/16 Page41: change EC95 to DY

Page34: change C331 C322 to DY

Page40: change EC102 to mount

Page41: change EC89 EC119 EC173 to mount

A A

Page41: change EC133 to mount on GM45

Title

Page29: change R127 from 12K to 6.8K, change R129 from 1.5K to 2K, change R138 from 20K to 30K

5

4

3

2

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Change List

Cathedral Peak II

SC

of

43 43Wednesday, July 16, 2008

1

Acer Aspire 5235, Aspire 5535, Aspire 5735 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual