Acer Aspire 5220G, Aspire 5520G Schematic

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Compal Confidential

ICW50 Schematics Document

AMD Turion/Sempron + Nvidia MCP67-MV

2007 / 07 / 03 FOR MP

3 3

4 4

Rev:2.0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

143Tuesday, November 27, 2007

E

C

5

Dr-Bios.com

4

3

2

1

Compal confidential

Project Code: ICW50 File Name : LA-3581P

D D

DVI-D Conn. LCD Conn.

page 20page 20

Thermal Sensor ADM1032ARM

page 6

CRT & TV-out

page 19

AMD Turion/Sempron CPU

Socket S1 638P

page 4,5,6,7

HT LINK

200-800MHz

DDRII DDRII-SO-DIMM X2

Nvidia

LVDS

LVDSDVI

PCI-Express

MXM II VGA/B

page 18

C C

PCI-Express

MCP67-MV

836 BGA

USB 2.0 BUS HD Audio

IDE BUS SATA BUS

533/667/800

Dual Channel

3.3V 24.576MHz/48Mhz

3.3V ATA-100

port 1

USB conn x4

CDROM Conn.

page 08,09

page 21

Bluetooth Conn

MDC 1.5 Conn

CMOS Camera

page 20page 29page 25,26

HDA Codec

page 29 page 31

ALC268

New Card Socket

MINI Card x2

WLAN, TV-Tuner

PHY(GbE)

RTL8211B

page 22

IDSEL:AD20 (PIRQE#, GNT#0, REQ#0)

PCI BUS

3.3V 33 MHz

page 10,11,12,13,14,15,16,17

S-ATA HDD Conn.

page 21

Audio AMP

page 32

Card Reader

RJ45

RICOH R5C833

page 22

1394

B B

Conn.

page 23

6 in 1 socket

page 24

LPC BUS

ENE KB926

page 27,28

Power On/Off CKT / LID switch / Power OK CKT

DC/DC Interface CKT.

page 33

CIR/LED

page 29

page 30

RTC CKT.

page 16

Touch Pad

page 29

EC I/O Buffer BIOS

page 29

Int.KBD

page 29

Power Circuit DC/DC

page 35~41

CIR

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

page 30

3

Compal Secret Data

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Phone Jack x3

page 32

SCHEMATIC, M/B LA-3581P

401474

1

C

243Tuesday, November 27, 2007

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of

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Voltage Rails

Power Plane Description

D D

C C

VIN B+ +CPU_CORE +0.9V 0.9V switched power rail for DDR terminator +1.5VS +1.2VALW ON ON ON* +1.2VS ON OFF OFF +1.2V_HT +1.8V 1.8V power rail for DDR +1.8VS 1.8V switched power rail +2.5VS

+3VALW/+3V/+3VAUX

+3VS +5VALW +5VS

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU

1.5V switched power rail

1.2V always on power rail

1.2V switched power rail

1.2V switched power rail ON OFF OFF

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail 5V always on power rail 5V switched power rail

S1 S3 S5 N/A N/A N/A

ON OFF ON ON ON OFFOFF

ON ON OFF ON ON ON ON ON OFF ON ON+RTCVCC

ON OFF OFF ON OFF ON OFF

ONRTC power

N/AN/AN/A OFF OFF

OFF

OFF ON* OFF ON*

ON*ONVSB always on power rail+VSB ON

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7NC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

1394

AD20 0

PIRQE

BOARD ID Table

Board ID

0 1 2 3 4 5 6 7

B B

EC SM Bus1 address

Device

Smart Battery

Address Address

EC SM Bus2 address

Device

ADM1032

1001 100X b0001 011X b

SKU ID Table

SKU ID

0 1 2

SIGNAL

SLP_S1# SLP_S3#

HIGH HIGH HIGH

LOW

LOW LOW LOW

SLP_S5# +VALW +V +VS Clock

HIGHHIGH

HIGH

LOW

HIGH

LOWLOW

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

PCB Revision

UMA (0V) DISCRETE (3.3V)

SKU

B - PHASE C - PHASE

ON

ON ON

ON

OFF

ON

V typ

AD_BID

OFF

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

BTO Option Table

BTO Item BOM Structure

UMA UMA@ VGA VGA@

UMA & TV-OUT UMA&TV@

2 SATA HDD SATA2@

CAMERA CMOS@

BLUETOOTH BT@

MINI CARD 1(TV) MINI1@

MINI CARD 2(WLAN) MINI2@

NEW CARD EXPRESS@

TV-OUT

DVI DVI@

1394

CARD READER

HT Debug Port

LOW

OFF

max

45@DIP CAP & RTC

TV@

1394@ 5IN1@

HT@

3 4 5

MCP67 SM Bus address

Device Address

DDR DIMM0 DDR DIMM2

A A

1001 000Xb 1001 001Xb

6 7

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2006/08/18 2007/8/18

3

Compal Secret Data

Deciphered Date

2

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

343Tuesday, November 27, 2007

1

C

5

Dr-Bios.com

4

3

2

1

PROCESSOR HYPERTRANSPORT INTERFACE

D D

VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

+1.2V_HT

JP22A

D4

VLDT_A3

D3

VLDT_A2

D2

VLDT_A1

D1

VLDT_A0

H_CADIP15(10) H_CADOP15 (10) H_CADIN15(10) H_CADIP14(10) H_CADIN14(10) H_CADIP13(10) H_CADIN13(10) H_CADIP12(10) H_CADIN12(10) H_CADIP11(10) H_CADIN11(10) H_CADIP10(10) H_CADIN10(10) H_CADIP9(10) H_CADIN9(10) H_CADIP8(10)

C C

+1.2V_HT

B B

H_CADIN8(10) H_CADIP7(10) H_CADIN7(10) H_CADIP6(10) H_CADIN6(10) H_CADIP5(10) H_CADIN5(10) H_CADIP4(10) H_CADIN4(10) H_CADIP3(10) H_CADIN3(10) H_CADIP2(10) H_CADIN2(10) H_CADIP1(10) H_CADIN1(10) H_CADIP0(10) H_CADIN0(10)

H_CLKIP1(10) H_CLKIN1(10) H_CLKIP0(10) H_CLKIN0(10)

R143 51_0402_1%

1 2

R142 51_0402_1%

1 2

H_CTLIP0(10) H_CTLIN0(10)

H_CADIP15 H_CADIP14

H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0

H_CLKIP1 H_CLKIN1 H_CLKIP0 H_CLKIN0

H_CTLIP1 H_CTLIN1

H_CTLIP0 H_CTLIN0

N5

L0_CADIN_H15

P5

L0_CADIN_L15

M3

L0_CADIN_H14

M4

L0_CADIN_L14

L5

L0_CADIN_H13

M5

L0_CADIN_L13

K3

L0_CADIN_H12

K4

L0_CADIN_L12

H3

L0_CADIN_H11

H4

L0_CADIN_L11

G5

L0_CADIN_H10

H5

L0_CADIN_L10

F3

L0_CADIN_H9

F4

L0_CADIN_L9

E5

L0_CADIN_H8

F5

L0_CADIN_L8

N3

L0_CADIN_H7

N2

L0_CADIN_L7

L1

L0_CADIN_H6

M1

L0_CADIN_L6

L3

L0_CADIN_H5

L2

L0_CADIN_L5

J1

L0_CADIN_H4

K1

L0_CADIN_L4

G1

L0_CADIN_H3

H1

L0_CADIN_L3

G3

L0_CADIN_H2

G2

L0_CADIN_L2

E1

L0_CADIN_H1

F1

L0_CADIN_L1

E3

L0_CADIN_H0

E2

L0_CADIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

FOX_PZ63823-284S-41F

L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H0

L0_CADOUT_L0

HTT Interface

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

Athlon 64 S1 Processor Socket

VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0

AE5 AE4 AE3 AE2

T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1

Y4 Y3 Y1 W1

T5 R5

R2 R3

1 2

H_CADOP15 H_CADON15H_CADIN15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8 H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0

H_CLKOP1 H_CLKON1 H_CLKOP0 H_CLKON0

H_CTLOP0 H_CTLON0

C533

4.7U_0805_10V4Z

H_CADON15 (10) H_CADOP14 (10) H_CADON14 (10) H_CADOP13 (10) H_CADON13 (10) H_CADOP12 (10) H_CADON12 (10) H_CADOP11 (10) H_CADON11 (10) H_CADOP10 (10) H_CADON10 (10) H_CADOP9 (10) H_CADON9 (10) H_CADOP8 (10) H_CADON8 (10) H_CADOP7 (10) H_CADON7 (10) H_CADOP6 (10) H_CADON6 (10) H_CADOP5 (10) H_CADON5 (10) H_CADOP4 (10) H_CADON4 (10) H_CADOP3 (10) H_CADON3 (10) H_CADOP2 (10) H_CADON2 (10) H_CADOP1 (10) H_CADON1 (10) H_CADOP0 (10) H_CADON0 (10)

H_CLKOP1 (10) H_CLKON1 (10) H_CLKOP0 (10) H_CLKON0 (10)

H_CTLOP0 (10) H_CTLON0 (10)

+3VS

12

R88

R88 10K_0402_5%

10K_0402_5%

FAN_SPEED1(27,28)

+5VS

+VCC_FAN1

EN_DFAN1(27,28)

FAN Conn

+5VS

12

D20

D20 1SS355_SOD323-2

1SS355_SOD323-2

12

D21

D21 BAS16_SOT23-3

BAS16_SOT23-3

Update Footprint

EN_DFAN1

1

C310

C310 10U_0805_10V4Z

10U_0805_10V4Z

2

W=40mils

+VCC_FAN1

FAN1

1

C52

C52 1000P_0402_50V7K

1000P_0402_50V7K

2

U11

1

VEN

2

VIN

3

VO

4

VSET

G993P1UF_SOP8

FAN1 Conn

1 2

C510 10U_0805_10V4Z

1 2

C509 1000P_0402_50V7K

ACES_85205-03001

8

GND

7

GND

6

GND

5

GND

JP16

1 2 3

+1.2V_HT

1

2

C542

4.7U_0805_10V4Z

LAYOUT: Place bypass cap on topside of board

A A

5

C541

4.7U_0805_10V4Z

1

2

NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS

1

2

C540

0.22U_0402_10V4Z

C536

0.22U_0402_10V4Z

1

2

C538

C538 180P_0402_50V8J

180P_0402_50V8J

C539

C539 180P_0402_50V8J

180P_0402_50V8J

1

2

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

2

Date: Sheet of

443Tuesday, November 27, 2007

1

C

A

Dr-Bios.com

B

C

D

E

Processor DDR2 Memory Interface

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED

ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

+1.8V

4 4

3 3

2 2

1 1

12

R386

39.2_0402_1%~D

R388

12

39.2_0402_1%~D

PLACE THEM CLOSE TO CPU WITHIN 1"

DDR_CS3_DIMMA#(8) DDR_CS2_DIMMA#(8) DDR_CS1_DIMMA#(8) DDR_CS0_DIMMA#(8)

DDR_CS3_DIMMB#(9) DDR_CS2_DIMMB#(9) DDR_CS1_DIMMB#(9) DDR_CS0_DIMMB#(9)

DDR_CKE1_DIMMB(9) DDR_CKE0_DIMMB(9) DDR_CKE1_DIMMA(8) DDR_CKE0_DIMMA(8)

DDR_A_MA[15..0](8)

DDR_A_BS#2(8) DDR_A_BS#1(8) DDR_A_BS#0(8)

DDR_A_RAS#(8) DDR_A_CAS#(8) DDR_A_WE#(8)

DDR_A_CLK2

DDR_A_CLK#2 DDR_A_CLK1

DDR_A_CLK#1

PLACE CLOSE TO PROCESSOR WITHIN 1.2 INCH

+1.8V

R228

1K_0402_1%

R222

1K_0402_1%

TP2PAD TP2PAD

M_ZN M_ZP

10:8:10:8:10

DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA#

DDR_CS3_DIMMB# DDR_CS2_DIMMB# DDR_CS1_DIMMB# DDR_CS0_DIMMB#

DDR_CKE1_DIMMB DDR_CKE0_DIMMB DDR_CKE1_DIMMA DDR_CKE0_DIMMA

1

C336

1.5P_0402_50V8C

2

1

C344

1.5P_0402_50V8C

2

12

1

12

2

1000P_0402_50V7K

+0.9VREF_CPU

W17

VTT_SENSE

Y10

AE10 AF10

V19 J22 V22 T19

Y26 J24

W24

U23 H26

J23 J20

DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0

DDR_A_BS#2 DDR_A_BS#1 DDR_A_BS#0

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

C358

J21 K19

K20 V24 K24 L20 R19 L19 L22

L21 M19 M20 M24 M22

N22

N21

R21

K22

R20

T22

T20

U20

U21

1

C363

C363 1000P_0402_50V7K

1000P_0402_50V7K

2

VDD_VREF_SUS_CPU LAYOUT:PLACE CLOSE TO CPU

JP22B

M_VREF VTT_SENSE

M_ZN M_ZP

MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0

MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0

MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0

MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0

MA_BANK2 MA_BANK1 MA_BANK0

MA_RAS_L MA_CAS_L MA_WE_L

FOX_PZ63823-284S-41F

FOX_PZ63823-284S-41F Athlon 64 S1 Processor Socket

CPU_VREF_REF

0.1U_0402_16V4Z

+0.9V

D10

VTT1

C10

VTT2

B10

VTT3

AD10

VTT4

W10

VTT5

AC10

VTT6

AB10

VTT7

AA10

VTT8

A10

VTT9

DDR_A_CLK2

Y16

MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1

MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1

MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0

MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10

MB_ADD9 MB_ADD8

DDRII Cmd/Ctrl//Clk

MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0

MB_BANK2 MB_BANK1 MB_BANK0

MB_RAS_L MB_CAS_L

MB_WE_L

1

C345

2

1000P_0402_50V7K

DDR_A_CLK#2

AA16

DDR_A_CLK1

E16

DDR_A_CLK#1

F16

DDR_B_CLK2

AF18

DDR_B_CLK#2

AF17

DDR_B_CLK1

A17

DDR_B_CLK#1

A18

DDR_B_ODT1

W23

DDR_B_ODT0

W26

DDR_A_ODT1

V20

DDR_A_ODT0

U19

DDR_B_MA15

J25

DDR_B_MA14

J26

DDR_B_MA13

W25

DDR_B_MA12

L23

DDR_B_MA11

L25

DDR_B_MA10

U25

DDR_B_MA9

L24

DDR_B_MA8

M26

DDR_B_MA7

L26

DDR_B_MA6

N23

DDR_B_MA5

N24

DDR_B_MA4

N25

DDR_B_MA3

N26

DDR_B_MA2

P24

DDR_B_MA1

P26

DDR_B_MA0

T24

DDR_B_BS#2

K26

DDR_B_BS#1

T26

DDR_B_BS#0

U26

DDR_B_RAS#

U24

DDR_B_CAS#

V26

DDR_B_WE#

U22

DDR_B_CLK2

DDR_B_CLK#2 DDR_B_CLK1

DDR_B_CLK#1

PLACE CLOSE TO PROCESSOR WITHIN 1.2 INCH

1

2

C357

1

2

1

2

+0.9VREF_CPU

1

C350

C350 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

C349

1.5P_0402_50V8C

C348

1.5P_0402_50V8C

DDR_A_CLK2 (8) DDR_A_CLK#2 (8) DDR_A_CLK1 (8) DDR_A_CLK#1 (8)

DDR_B_CLK2 (9) DDR_B_CLK#2 (9) DDR_B_CLK1 (9) DDR_B_CLK#1 (9)

DDR_B_ODT1 (9) DDR_B_ODT0 (9) DDR_A_ODT1 (8) DDR_A_ODT0 (8)

DDR_B_MA[15..0] (9)

DDR_B_BS#2 (9) DDR_B_BS#1 (9) DDR_B_BS#0 (9)

DDR_B_RAS# (9) DDR_B_CAS# (9) DDR_B_WE# (9)

DDR_B_D[63..0](9)

To reverse SODIMM socket

DDR_B_DM[7..0](9) DDR_A_DM[7..0] (8)

DDR_B_DQS7(9) DDR_B_DQS#7(9) DDR_B_DQS6(9) DDR_B_DQS#6(9) DDR_B_DQS5(9) DDR_B_DQS#5(9) DDR_B_DQS4(9) DDR_B_DQS#4(9) DDR_B_DQS3(9) DDR_B_DQS#3(9) DDR_B_DQS2(9) DDR_B_DQS#2(9) DDR_B_DQS1(9) DDR_B_DQS#1(9) DDR_B_DQS0(9) DDR_B_DQS#0(9)

DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0

DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0

DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0

JP22C

AD11

MB_DATA63

AF11

MB_DATA62

AF14

MB_DATA61

AE14

MB_DATA60

Y11

MB_DATA59

AB11

MB_DATA58

AC12

MB_DATA57

AF13

MB_DATA56

AF15

MB_DATA55

AF16

MB_DATA54

AC18

MB_DATA53

AF19

MB_DATA52

AD14

MB_DATA51

AC14

MB_DATA50

AE18

MB_DATA49

AD18

MB_DATA48

AD20

MB_DATA47

AC20

MB_DATA46

AF23

MB_DATA45

AF24

MB_DATA44

AF20

MB_DATA43

AE20

MB_DATA42

AD22

MB_DATA41

AC22

MB_DATA40

AE25

MB_DATA39

AD26

MB_DATA38

AA25

MB_DATA37

AA26

MB_DATA36

AE24

MB_DATA35

AD24

MB_DATA34

AA23

MB_DATA33

AA24

MB_DATA32

G24

MB_DATA31

G23

MB_DATA30

D26

MB_DATA29

C26

MB_DATA28

G26

MB_DATA27

G25

MB_DATA26

E24

MB_DATA25

E23

MB_DATA24

C24

MB_DATA23

B24

MB_DATA22

C20

MB_DATA21

B20

MB_DATA20

C25

MB_DATA19

D24

MB_DATA18

A21

MB_DATA17

D20

MB_DATA16

D18

MB_DATA15

C18

MB_DATA14

D14

MB_DATA13

C14

MB_DATA12

A20

MB_DATA11

A19

MB_DATA10

A16

MB_DATA9

A15

MB_DATA8

A13

MB_DATA7

D12

MB_DATA6

E11

MB_DATA5

G11

MB_DATA4

B14

MB_DATA3

A14

MB_DATA2

A11

MB_DATA1

C11

MB_DATA0

AD12

MB_DM7

AC16

MB_DM6

AE22

MB_DM5

AB26

MB_DM4

E25

MB_DM3

A22

MB_DM2

B16

MB_DM1

A12

MB_DM0

AF12

MB_DQS_H7

AE12

MB_DQS_L7

AE16

MB_DQS_H6

AD16

MB_DQS_L6

AF21

MB_DQS_H5

AF22

MB_DQS_L5

AC25

MB_DQS_H4

AC26

MB_DQS_L4

F26

MB_DQS_H3

E26

MB_DQS_L3

A24

MB_DQS_H2

A23

MB_DQS_L2

D16

MB_DQS_H1

C16

MB_DQS_L1

C12

MB_DQS_H0

B12

MB_DQS_L0

FOX_PZ63823-284S-41F

DDRII Data

Athlon 64 S1 Processor Socket

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0

MA_DQS_H7

MA_DQS_L7

MA_DQS_H6

MA_DQS_L6

MA_DQS_H5

MA_DQS_L5

MA_DQS_H4

MA_DQS_L4

MA_DQS_H3

MA_DQS_L3

MA_DQS_H2

MA_DQS_L2

MA_DQS_H1

MA_DQS_L1

MA_DQS_H0

MA_DQS_L0

AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12

Y13 AB16 Y19 AC24 F24 E19 C15 E12

W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13

DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0

DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0

DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0

DDR_A_D[63..0] (8)

DDR_A_DQS7 (8) DDR_A_DQS#7 (8) DDR_A_DQS6 (8) DDR_A_DQS#6 (8) DDR_A_DQS5 (8) DDR_A_DQS#5 (8) DDR_A_DQS4 (8) DDR_A_DQS#4 (8) DDR_A_DQS3 (8) DDR_A_DQS#3 (8) DDR_A_DQS2 (8) DDR_A_DQS#2 (8) DDR_A_DQS1 (8) DDR_A_DQS#1 (8) DDR_A_DQS0 (8) DDR_A_DQS#0 (8)

To normal SODIMM socket

A1

AF1

A26

Athlon 64 S1g1

uPGA638 Top View

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Issued Date

Compal Secret Data

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

D

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

E

543Tuesday, November 27, 2007

C

5

Dr-Bios.com

+2.5VS

1

C266

FCM2012C-800_0805

22U_0805_6.3V6M

D D

C C

2

HTCPU_PWRGD(10)

HTCPU_STOP#(10)

MCP_PWRGD(15,18,27,28)

HTCPU_RST#(10)

1 2

R375

R375 0_0402_5% @

0_0402_5% @

1 2

+1.8V

L28

MCP_PWRGD_R

1

C276

2

4.7U_0805_10V4Z

+1.8V

12

R379

R379 300_0402_5%

300_0402_5%

+1.8V

12

R184

R184 300_0402_5%

300_0402_5%

+1.8V

12

R373

R373 300_0402_5%

300_0402_5%

1

C271

2

0.22U_0603_16V7K

+1.8V+3VS

12

R381

4.7K_0402_5%

4.7K_0402_5% @

@

5

U26

2

P

B

1

A

G

NC7SZ08P5X_NL_SC70-5

3

@

1 2

R380 0_0402_5%

+1.8V

5

U9

2

P

B

1

A

G

NC7SZ08P5X_NL_SC70-5

3

@

1 2

R183 0_0402_5%

+1.8V

5

U25

2

P

B

1

A

G

NC7SZ08P5X_NL_SC70-5

3

@

1 2

R374 0_0402_5%

1

C277

C277 3300P_0402_50V7K

3300P_0402_50V7K

2

C543 0.1U_0402_16V4Z

1 2

4

1 2

Y

R383 0_0402_5%

4

1 2

Y

R189 0_0402_5%

4

1 2

Y

R377 0_0402_5%

4

W=50mils

place them to CPU within 1"

@

+1.8V

CPU_SIC(15) CPU_SID(15)

+1.2V_HT

CPU_ALL_PWROK

CPU_LDTSTOP#

CPU_HT_RESET#

R370 300_0402_5%R370 300_0402_5%

1 2

R371 300_0402_5%R371 300_0402_5%

1 2

R369 0_0402_5%R369 0_0402_5%

1 2

R368 0_0402_5%R368 0_0402_5%

1 2

R378 44.2_0603_1%R378 44.2_0603_1%

1 2

R376 44.2_0603_1%R376 44.2_0603_1%

1 2

CPUCLK(10)

CPUCLK#(10)

3

LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

+2.5VS_VDDA

CPU_SIC_R CPU_SID_R

CPU_HTREF1 CPU_HTREF0 VID0

5:10

CPU_VCC_SENSE(41) CPU_VSS_SENSE(41)

C545

1 2

3900P_0402_50V7K

C544

1 2

3900P_0402_50V7K

CPU_TEST26_BURNIN# CPU_PRESENT# CPU_TEST25_H_BYPASSCLK_H

CPU_TEST21_SCANEN CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

169_0402_1%

12

R382

R199 300_0402_5%R199 300_0402_5% R198 1K_0402_5%

R198 1K_0402_5% R188 510_0402_5%

R188 510_0402_5%

R197 300_0402_5%R197 300_0402_5% R387 510_0402_5%R387 510_0402_5% R385 300_0402_5%R385 300_0402_5% R215 300_0402_5%R215 300_0402_5%

TP3PAD TP3PAD TP1PAD TP1PAD

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

CPU_THERMDC CPU_THERMDA

10:10

1 2 1 2 1 2

1 2 1 2 1 2 1 2

2

ATHLON Control and Debug

JP22D

CPU_HT_RESET# CPU_ALL_PWROK CPU_LDTSTOP#

CPU_VCC_SENSE CPU_VSS_SENSE

CPU_DBRDY CPU_TMS

CPU_TCK CPU_TRST# CPU_TDI

+1.8V

JP22D

F8

VDDA2

F9

VDDA1

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

AF4

SIC

AF5

SID

P6

HTREF1

R6

HTREF0

F6

VDD_FB_H

E6

VDD_FB_L

W9

VDDIO_FB_H

Y9

VDDIO_FB_L

A9

CLKIN_H

A8

CLKIN_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI TEST25_HE9TEST29_H

E8

TEST25_L

G9

TEST19

H10

TEST18

AA7

TEST13

C2

TEST9

D7

TEST17

E7

TEST16

F7

TEST15

C7

TEST14

AC8

TEST12

C3

TEST7

AA6

TEST6

W7

THERMDC

W8

THERMDA

Y6

TEST3

AB6

TEST2

P20

RSVD0

P19

RSVD1

N20

RSVD2

N19

RSVD3

R26

RSVD4

R25

RSVD5

P22

RSVD6

R22

RSVD7

FOX_PZ63823-284S-41F

AMD NPT S1 SOCKET Processor Socket

THERMTRIP_L

PROCHOT_L

CPU_PRESENT_L

DBREQ_L

TEST29_L

MISC

TEST28_H

TEST28_L

PSI_L

TEST24 TEST23 TEST22 TEST21 TEST20

TEST27 TEST26 TEST10

TEST8

RSVD8 RSVD9

RSVD10 RSVD11

RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

VID5 VID4 VID3 VID2 VID1 VID0

TDO

H_THERMTRIP_S#

AF6

CPU_PROCHOT#_1.8

AC7

VID5

A5

VID4

C6

VID3

A6

VID2

A4

VID1

C5 B5

CPU_PRESENT#

AC6

PSI#

A3

CPU_DBREQ#

E10

CPU_TDO

AE9

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

5:5:5

AE7 AD7 AE8

CPU_TEST21_SCANEN

AB8 AF7

J7 H8 AF8

CPU_TEST26_BURNIN#

AE6 K8 C4

H16 B18

B3 C1

H6 G6 D5

R24 W18 R23 AA8 H18 H19

R155

R155 300_0402_5%

300_0402_5%

+1.8V

12

PSI# (41)

80.6_0402_1%

1

12

R156

R156 300_0402_5%

300_0402_5%

VID5 (41) VID4 (41) VID3 (41) VID2 (41) VID1 (41) VID0 (41)

R384

1 2

ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"

HDT Connector

12

CPU_DBREQ# CPU_DBRDY CPU_TCK

CPU_TDI CPU_TRST# CPU_TDO

1

2

12

R163 220_0402_5%HT@R163 220_0402_5%HT@

EC_SMB_CK2 EC_SMB_DA2

B B

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

C275

2200P_0402_50V7K

A A

2200P_0402_50V7K

EC_SMB_CK2(27,28) EC_SMB_DA2(27,28)

5

12

+1.8V

R160 220_0402_5%HT@R160 220_0402_5%HT@

R162 220_0402_5% HT@R162 220_0402_5% HT@

R159 220_0402_5%HT@R159 220_0402_5%HT@

R161 220_0402_5%HT@R161 220_0402_5%HT@

U4

CPU_THERMDA CPU_THERMDC

U4

2

D+

3

D-

8

SCLK

7

SDATA

U2 CLOSE CPU, CPU_THERMDA&CPU_THERMDC PLACE CLOSE TO PROCESSOR WITHIN 1" INCH

+3VS

1

C269

0.1U_0402_16V4Z

2

VDD1 ALERT# THERM#

GND

ADM1032ARM_RM8

JP7

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423 26

SAMTEC_ASP-68200-07

SAMTEC_ASP-68200-07 @

@

1 6 4 5

R113

R113 220_0402_5%

220_0402_5% HT@

HT@

3V_LDT_RST#

+3VS

12

1 2

R535 0_0402_5%

+3V

2

G

CPU_HT_RESET#

1 3

D

S

D

@

S

Q14

2N7002_SOT23

2N7002_SOT23 HT@

HT@

H_THERMTRIP_S# H_THERMTRIP#CPU_TMS

PVT Modify 2007/03/22

12

R186

10K_0402_5%@

PROCHOT#(10)

R141 0_0402_5%

Connect to MCP67

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.8V +1.8V +3V +3V

12

R114

R114 300_0402_5%

300_0402_5%

CPU_PROCHOT#_1.8

1 2

@

2006/08/18 2007/8/18

12

R127

R127 1K_0402_5%

1K_0402_5%

2

Q16

3 1

MMBT3904_SOT23

1 2

R115 0_0402_5%

10K_0402_5%

Compal Secret Data

Deciphered Date

2

@

+1.8V +3VS

12

R133

CPU_PH_G

B

2

Q19

E

3 1

MMBT3904_SOT23

C

12

R116

R116 10K_0402_5%

10K_0402_5%

12

R130

4.7K_0402_5%

12

2

3 1

R117

1K_0402_5%@

Q15

Q15 MMBT3904_SOT23

MMBT3904_SOT23 @

@

MAINPWON (35,36,37)

H_THERMTRIP# (10)

EC_THERM# (15,27,28)

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

C

401474

Date: Sheet of

Date: Sheet

1

of

643Tuesday, November 27, 2007

C

5

Dr-Bios.com

D D

PROCESSOR POWER AND GROUND

JP22E

AC4

VDD1

AD2

VDD2

G4

VDD3

H2

VDD4

J9

VDD5

J11

VDD6

J13

VDD7

K6

VDD8

K10

VDD9

K12

VDD10

K14

VDD11

L4

VDD12

L7

VDD13

L9

VDD14

L11

VDD15

L13

VDD16

M2

C C

B B

M6 M8

M10

N7 N9

N11

P8

P10

R4 R7 R9

R11

T2 T6

T8 T10 T12 T14

U7

U9 U11 U13

V6 V8

V10

A1

VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25

Power

VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42

FOX_PZ63823-284S-41F

Athlon 64 S1 Processor Socket

Athlon 64 S1g1

uPGA638 Top View

AF1

VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8

VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27

+CPU_CORE+CPU_CORE

V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16

+1.8V

H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25

A26

4

JP22F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

FOX_PZ63823-284S-41F

Athlon 64 S1 Processor Socket

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101

Ground

VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

3

+CPU_CORE

1

+

2

+CPU_CORE

1

2 C279

C279 10U_0805_10V6M

10U_0805_10V6M

C548

C548 470U_D2E_2VM_R9

470U_D2E_2VM_R9

C287

C287 10U_0805_10V6M

10U_0805_10V6M

1

2

C280

C280 10U_0805_10V6M

10U_0805_10V6M

1

+

C550

C550 470U_D2E_2VM_R9

470U_D2E_2VM_R9

2

C288

C288 10U_0805_10V6M

10U_0805_10V6M 1

2

1

+

2

1

2 C282

C282 10U_0805_10V6M

10U_0805_10V6M

C546

C546 470U_D2E_2VM_R9

470U_D2E_2VM_R9

C289

C289 10U_0805_10V6M

10U_0805_10V6M 1

2

1

+

C547

C547 330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

2

1

2

C281

C281 10U_0805_10V6M

10U_0805_10V6M

+CPU_CORE

1

+

2

C551

C551 820U_E9_2.5V_M_R7

820U_E9_2.5V_M_R7 45@

45@

1

10/2 Modify

CPU SOCKET S1 DECOUPLING

+CPU_CORE

1

C319

180P_0402_50V8J

2

1

C333

C333 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

1

C327

C327 10U_0805_10V6M

10U_0805_10V6M

2

C309

0.01U_0402_16V7K

1

C328

C328 10U_0805_10V6M

10U_0805_10V6M

2

1

C353

C353 10U_0805_10V6M

10U_0805_10V6M

2

1

C324

C324 10U_0805_10V6M

10U_0805_10V6M

2

1

C343

C343 10U_0805_10V6M

10U_0805_10V6M

2

1

C316

C316 10U_0805_10V6M

10U_0805_10V6M

2

1

C361

0.22U_0402_10V4Z

2

1

C334

C334 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C356

0.22U_0402_10V4Z

2

C308

0.22U_0402_10V4Z

1

C332

C332 10U_0805_10V6M

10U_0805_10V6M

2

1

C315

C315 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE +1.8V

1

C318

0.22U_0402_10V4Z

2

1

C326

C326 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.8V

1

C352

4.7U_0805_10V4Z

2

1

C381

0.22U_0402_10V4Z

2

+0.9V

1

C304

4.7U_0805_10V4Z

2

1

C342

4.7U_0805_10V4Z

2

1

2

1

C320

4.7U_0805_10V4Z

2

C385

0.01U_0402_16V7K

1

C351

4.7U_0805_10V4Z

2

1

C382

0.01U_0402_16V7K

2

1

C303

4.7U_0805_10V4Z

2

1

C388

4.7U_0805_10V4Z

2

1

2

1

C302

4.7U_0805_10V4Z

2

1

C362

0.22U_0402_10V4Z

2

C340

C340 180P_0402_50V8J

180P_0402_50V8J

1

C313

0.22U_0402_10V4Z

2

1

C360

C360 180P_0402_50V8J

180P_0402_50V8J

2

1

C386

0.22U_0402_10V4Z

2

1

C312

0.22U_0402_10V4Z

2

1

C383

0.22U_0402_10V4Z

2

1

C314

0.22U_0402_10V4Z

2

1

C298

0.22U_0402_10V4Z

2

1

C299

C299 1000P_0402_50V7K

1000P_0402_50V7K

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C300

C300 1000P_0402_50V7K

1000P_0402_50V7K

2

2006/08/18 2007/8/18

1

C307

C307 1000P_0402_50V7K

1000P_0402_50V7K

2

Compal Secret Data

Deciphered Date

2

1

C306

C306 1000P_0402_50V7K

1000P_0402_50V7K

2

1

2

C305

C305 180P_0402_50V8J

180P_0402_50V8J

1

2

1

C297

C297 180P_0402_50V8J

180P_0402_50V8J

2

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

C

401474

Date: Sheet of

C296

C296 180P_0402_50V8J

180P_0402_50V8J

1

C295

180P_0402_50V8J

2

1

743Tuesday, November 27, 2007

C

5

Dr-Bios.com

4

3

2

1

+1.8V+DIMM_VREF+1.8V+1.8V

C579 4.7U_0805_10V4ZC579 4.7U_0805_10V4Z

C428 0.1U_0402_16V4Z C428 0.1U_0402_16V4Z

JP28

1

VREF

3

DDR_A_D0

D D

C C

DDR_CKE0_DIMMA(5) DDR_CS2_DIMMA#(5)

DDR_A_BS#2(5)

DDR_A_BS#0(5) DDR_A_WE#(5)

DDR_A_CAS#(5) DDR_CS1_DIMMA#(5)

DDR_A_ODT1(5)

B B

A A

MEM_SMBDATA(9,15) MEM_SMBCLK(9,15)

DDR_A_D1 DDR_A_DQS#0

DDR_A_DQS0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D22 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA DDR_CS2_DIMMA#

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_CS1_DIMMA#

DDR_A_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D34

DDR_A_D35 DDR_A_D40

DDR_A_D41 DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D47 DDR_A_D48

DDR_A_D49 DDR_A_D53

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51 DDR_A_D55

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59 MEM_SMBDATA

MEM_SMBCLK

+3VS

5

1

C429

0.1U_0402_16V4Z

2

DIMM1 REV H:5.2mm (BOT)

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-M2RN-7F

FOX_AS0A426-M2RN-7F <BOM Structure>

DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

VSS DQ4 DQ5 VSS

CK0

A11

BA1 S0#

CK1

SA1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110 112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

4

DDR_A_D4 DDR_A_D5

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D12

DDR_A_D13 DDR_A_DM1 DDR_A_CLK1

DDR_A_CLK#1 DDR_A_D14

DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6DDR_A_MA8

DDR_A_MA4 DDR_A_MA2 DDR_A_MA0

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_ODT0 DDR_A_MA13

DDR_CS3_DIMMA# DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D52

DDR_A_CLK2 DDR_A_CLK#2

DDR_A_DM6 DDR_A_D54

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

R281 10K_0402_5%R281 10K_0402_5%

1 2

R282 10K_0402_5%R282 10K_0402_5%

1 2

1

2

DDR_A_CLK1 (5) DDR_A_CLK#1 (5)

DDR_A_D[0..63](5) DDR_A_DM[0..7](5)

DDR_A_DQS[0..7](5) DDR_A_MA[0..15](5)

DDR_A_DQS#[0..7](5)

DDR_CKE1_DIMMA (5)

DDR_A_BS#1 (5) DDR_A_RAS# (5) DDR_CS0_DIMMA# (5)

DDR_A_ODT0 (5)

DDR_CS3_DIMMA# (5)

DDR_A_CLK2 (5) DDR_A_CLK#2 (5)

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

Issued Date

3

12

R275

1K_0402_1%

12

R274

1K_0402_1%

DDR_A_D[0..63] DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_MA[0..15] DDR_A_DQS#[0..7]

2006/08/18 2007/8/18

+1.8V

C399

4.7U_0805_6.3V6K

1

2

C413

4.7U_0805_6.3V6K

+1.8V

4.7U_0805_10V4Z

1

C407

2

+0.9V

0.1U_0402_16V4Z

1

2

C436

C437

DDR_CKE0_DIMMA DDR_CS2_DIMMA#

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 DDR_A_MA10

DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_CS1_DIMMA#

DDR_CS3_DIMMA#

+0.9V

Compal Secret Data

Deciphered Date

C427

1

2 C424

C424

0.01U_0402_16V7K

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

C409

2

0.1U_0402_16V4Z

1

2

C434

1 4 2 3

0.1U_0402_16V4Z

1

2

C438

C427

0.01U_0402_16V7K

0.01U_0402_16V7K 1

2

4.7U_0805_10V4Z

C410

0.1U_0402_16V4Z

1

2

C433

0.1U_0402_16V4Z

1

2

C439

0.1U_0402_16V4Z

C414

4.7U_0805_6.3V6K

1

2

C398

4.7U_0805_6.3V6K

4.7U_0805_10V4Z

1

C408

2

0.1U_0402_16V4Z

1

2

C435

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V

RP10 47_0404_4P2R_5%RP10 47_0404_4P2R_5%

RP11 47_0404_4P2R_5%RP11 47_0404_4P2R_5%

RP12 47_0404_4P2R_5%RP12 47_0404_4P2R_5%

RP13 47_0404_4P2R_5%RP13 47_0404_4P2R_5%

RP14 47_0404_4P2R_5%RP14 47_0404_4P2R_5%

RP9 47_0404_4P2R_5%RP9 47_0404_4P2R_5%

RP8 47_0404_4P2R_5%RP8 47_0404_4P2R_5%

R277 47_0402_1%R277 47_0402_1%

1 2

R280 47_0402_1%R280 47_0402_1%

1 2

0.1U_0402_16V4Z

1

2

C443

Layout Note: Place one 0.1uF cap close to every 2 pullup resistors terminated to +0.9V

2

1

2 C426

C426 10P_0402_50V8K

10P_0402_50V8K

4.7U_0805_10V4Z

1

C411

2

0.1U_0402_16V4Z

1

2

C431

1

2

C445

C425

C425 10P_0402_50V8K

10P_0402_50V8K 1

2

1

C412

2

0.1U_0402_16V4Z

1

2

C432

+0.9V

0.1U_0402_16V4Z

1

2

C446

C577

0.22U_0603_16V7K

0.22U_0603_16V7K 1

1

2

2 C578

C578

0.22U_0603_16V7K

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

C415

2

0.1U_0402_16V4Z

1

2

C453

C452

RP15 47_0404_4P2R_5%RP15 47_0404_4P2R_5%

RP16 47_0404_4P2R_5%RP16 47_0404_4P2R_5%

RP17 47_0404_4P2R_5%RP17 47_0404_4P2R_5%

RP20 47_0404_4P2R_5%RP20 47_0404_4P2R_5%

RP18 47_0404_4P2R_5%RP18 47_0404_4P2R_5%

RP19 47_0404_4P2R_5%RP19 47_0404_4P2R_5%

RP21 47_0404_4P2R_5%RP21 47_0404_4P2R_5%

0.1U_0402_16V4Z

1

2

C440

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

Date: Sheet

1

2 C576

C576

0.22U_0603_16V7K

4.7U_0805_10V4Z

1

C416

2

0.1U_0402_16V4Z

1

2

C451

1 4 2 3

0.1U_0402_16V4Z

1

2

C441

C575

0.22U_0603_16V7K

0.22U_0603_16V7K 1

2

1

C417

2

1

2

C450

0.1U_0402_16V4Z

1

2

C442

1

2 C574

C574

0.22U_0603_16V7K

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

2

0.1U_0402_16V4Z

1

2

C449

DDR_A_MA14 DDR_A_MA15

DDR_A_MA7 DDR_CKE1_DIMMA

DDR_A_MA6 DDR_A_MA11

DDR_A_MA2 DDR_A_MA4

DDR_A_BS#1 DDR_A_MA0

DDR_CS0_DIMMA# DDR_A_RAS#

DDR_A_MA13DDR_A_ODT1 DDR_A_ODT0

1

2

C444

1

C418

0.1U_0402_16V4Z

1

2

1

2

C448

1

C573

0.22U_0603_16V7K

2

+

C628

C628 220U_D2_4VM_R15

220U_D2_4VM_R15

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

1

2

C447

+1.8V

843Tuesday, November 27, 2007

C422

+

150U_D2_6.3VM

of

C

5

Dr-Bios.com

4

3

2

1

2

1

2

C472

1

2

C622

C479

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

2

C471

DDR_B_D[0..63] DDR_B_DM[0..7] DDR_B_DQS[0..7] DDR_B_MA[0..15] DDR_B_DQS#[0..7]

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

1

C627

2

0.1U_0402_16V4Z

1

2

C478

0.1U_0402_16V4Z

1

2

C470

+1.8V

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

C632

C626

2

0.1U_0402_16V4Z

1

2

C466

+0.9V

0.1U_0402_16V4Z

1

2

C457

C469

4.7U_0805_10V4Z

1

2

C464

4.7U_0805_10V4Z

1

2

C458

1

C633

2

0.1U_0402_16V4Z

1

2

C463

C465

1 4 2 3

RP30 47_0404_4P2R_5%RP30 47_0404_4P2R_5%

1 4 2 3

RP31 47_0404_4P2R_5%RP31 47_0404_4P2R_5%

1 4 2 3

RP32 47_0404_4P2R_5%RP32 47_0404_4P2R_5%

1 4 2 3

RP33 47_0404_4P2R_5%RP33 47_0404_4P2R_5%

1 4 2 3

RP34 47_0404_4P2R_5%RP34 47_0404_4P2R_5%

1 4 2 3

RP28 47_0404_4P2R_5%RP28 47_0404_4P2R_5%

1 4 2 3

RP35 47_0404_4P2R_5%RP35 47_0404_4P2R_5%

0.1U_0402_16V4Z

1

2

C477

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

C654

C654 1000P_0402_50V7K

1000P_0402_50V7K

1

2

C653

C653 1000P_0402_50V7K

1000P_0402_50V7K

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

C630

C631

2

0.1U_0402_16V4Z

1

2

C462

DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 DDR_B_BS#1

DDR_B_CAS# DDR_CS1_DIMMB#

DDR_B_ODT0 DDR_B_MA13

0.1U_0402_16V4Z

1

2

C485

C486

1

+

C629

C629 220U_D2_4VM_R15

220U_D2_4VM_R15

2

1

2

C461

1

2

C484

1

C656

C656 1000P_0402_50V7K

1000P_0402_50V7K

1

2

C655

C655 1000P_0402_50V7K

1000P_0402_50V7K

+1.8V

943Tuesday, November 27, 2007

C

+DIMM_VREF+1.8V+1.8V

0.1U_0402_16V4Z

0.1U_0402_16V4Z C459

C459

C455

4.7U_0805_10V4Z

C455

JP29

1

VREF

3

DDR_B_D0

D D

C C

DDR_CKE0_DIMMB(5) DDR_CS2_DIMMB#(5)

DDR_B_BS#2(5)

DDR_B_BS#0(5) DDR_B_WE#(5)

DDR_B_CAS#(5) DDR_CS1_DIMMB#(5)

DDR_B_ODT1(5)

B B

A A

MEM_SMBDATA(8,15)

MEM_SMBCLK(8,15)

DDR_B_D1 DDR_B_DQS#0

DDR_B_DQS0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB DDR_CS2_DIMMB#

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_CS1_DIMMB#

DDR_B_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D47 DDR_B_D48

DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7 DDR_B_D58

DDR_B_D59

MEM_SMBDATA MEM_SMBCLK

+3VS

5

1

C456

0.1U_0402_16V4Z

2

DIMM0 REV H:9.2mm (BOT)

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-MARG-7F

Change PCB Footprint

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0 CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1 RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1 CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

SA1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110

S0#

112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

4

DDR_B_D4 DDR_B_D5

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D13 DDR_B_DM1 DDR_B_CLK1

DDR_B_CLK#1 DDR_B_D14

DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31 DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6DDR_B_MA8

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_ODT0 DDR_B_MA13

DDR_CS3_DIMMB# DDR_B_D36

DDR_B_D37 DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D52

DDR_B_CLK2 DDR_B_CLK#2

DDR_B_DM6 DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

R289 10K_0402_5%R289 10K_0402_5%

1 2

R288 10K_0402_5%R288 10K_0402_5%

1 2

4.7U_0805_10V4Z 1

2

DDR_B_CLK1 (5) DDR_B_CLK#1 (5)

DDR_CKE1_DIMMB (5)

DDR_B_BS#1 (5) DDR_B_RAS# (5) DDR_CS0_DIMMB# (5)

DDR_B_ODT0 (5)

DDR_CS3_DIMMB# (5)

DDR_B_CLK2 (5) DDR_B_CLK#2 (5)

+3VS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

Issued Date

3

+1.8V

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1

2

+0.9V

0.1U_0402_16V4Z

1

2

2006/08/18 2007/8/18

DDR_B_D[0..63](5)

DDR_B_DM[0..7](5)

DDR_B_DQS[0..7](5)

DDR_B_MA[0..15](5)

DDR_B_DQS#[0..7](5)

4.7U_0805_10V4Z

1

C624

C625

2

0.1U_0402_16V4Z

1

2

C481

C483

DDR_CS2_DIMMB# DDR_CKE0_DIMMB

DDR_B_MA12 DDR_B_BS#2

DDR_B_MA8 DDR_B_MA9

DDR_B_MA3 DDR_B_MA5

DDR_B_MA10 DDR_B_MA1

DDR_B_WE# DDR_B_BS#0

DDR_CS0_DIMMB# DDR_B_RAS#

DDR_B_ODT1 DDR_CS3_DIMMB#

+0.9V

Compal Secret Data

C481

C482

Deciphered Date

4.7U_0805_10V4Z

1

C623

2

0.1U_0402_16V4Z

1

2

C480

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V

1 4 2 3

RP22 47_0404_4P2R_5%RP22 47_0404_4P2R_5%

1 4 2 3

RP23 47_0404_4P2R_5%RP23 47_0404_4P2R_5%

1 4 2 3

RP24 47_0404_4P2R_5%RP24 47_0404_4P2R_5%

1 4 2 3

RP25 47_0404_4P2R_5%RP25 47_0404_4P2R_5%

1 4 2 3

RP26 47_0404_4P2R_5%RP26 47_0404_4P2R_5%

1 4 2 3

RP27 47_0404_4P2R_5%RP27 47_0404_4P2R_5%

1 4 2 3

RP29 47_0404_4P2R_5%RP29 47_0404_4P2R_5%

R286 47_0402_1%R286 47_0402_1%

1 2

R287 47_0402_1%R287 47_0402_1%

1 2

0.1U_0402_16V4Z

1

2

C476

Layout Note: Place one 0.1uF cap close to every 2 pullup resistors terminated to +0.9V

5

Dr-Bios.com

H_CADOP0(4) H_CADON0(4) H_CADOP1(4)

D D

C C

C46

L7

+3VS

B B

+1.2V_HT

1 2

MBK1608121YZF_0603 L7MBK1608121YZF_0603

L13

1 2

MBK1608121YZF_0603

C46

4.7U_0805_10V4Z

H_CADON1(4) H_CADOP2(4) H_CADON2(4) H_CADOP3(4) H_CADON3(4) H_CADOP4(4) H_CADON4(4) H_CADOP5(4) H_CADON5(4) H_CADOP6(4) H_CADON6(4) H_CADOP7(4) H_CADON7(4)

H_CADOP8(4) H_CADON8(4) H_CADOP9(4) H_CADON9(4) H_CADOP10(4) H_CADON10(4) H_CADOP11(4) H_CADON11(4) H_CADOP12(4) H_CADON12(4) H_CADOP13(4) H_CADON13(4) H_CADOP14(4) H_CADON14(4) H_CADOP15(4) H_CADON15(4)

H_CLKOP0(4) H_CLKON0(4) H_CLKOP1(4) H_CLKON1(4)

H_CTLOP0(4) H_CTLON0(4)

H_THERMTRIP#(6)

PROCHOT#(6)

1

2

C141

C141 10U_0805_10V4Z

10U_0805_10V4Z

1

2

C43

0.1U_0402_16V4Z

1

2

C101

0.1U_0402_16V4Z

1

2

4

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0 H_CLKON0 H_CLKOP1 H_CLKON1

H_CTLOP0 H_CTLON0

+3.3V_PLL_CPU

+1.2V_PLL_CPU_HT

+1.2V_HT

AF16 AG16 AH16

AJ16

AJ15 AK15 AK16 AL16

AG17

AF17 AL17 AK17 AL18 AK18

AJ19 AK19

AD14

AE14 AF14

AG14 AH14

AJ14 AL13 AK13

AC15 AD15 AD16

AE16 AE17

AD17

AB17

AC17

AJ17

AH17

AL14 AK14

AH19 AG19 AC18 AD18

AC13

AB13

AB16

AB15

1 2

R364 150_0402_1%

1 2

R366 150_0402_1%

AM12

AL12

U23A

HT_MCP_RXD0_P HT_MCP_RXD0_N HT_MCP_RXD1_P HT_MCP_RXD1_N HT_MCP_RXD2_P HT_MCP_RXD2_N HT_MCP_RXD3_P HT_MCP_RXD3_N HT_MCP_RXD4_P HT_MCP_RXD4_N HT_MCP_RXD5_P HT_MCP_RXD5_N HT_MCP_RXD6_P HT_MCP_RXD6_N HT_MCP_RXD7_P HT_MCP_RXD7_N

HT_MCP_RXD8_P HT_MCP_RXD8_N HT_MCP_RXD9_P HT_MCP_RXD9_N HT_MCP_RXD10_P HT_MCP_RXD10_N HT_MCP_RXD11_P HT_MCP_RXD11_N HT_MCP_RXD12_P HT_MCP_RXD12_N HT_MCP_RXD13_P HT_MCP_RXD13_N HT_MCP_RXD14_P HT_MCP_RXD14_N HT_MCP_RXD15_P HT_MCP_RXD15_N

HT_MCP_RX_CLK0_P HT_MCP_RX_CLK0_N HT_MCP_RX_CLK1_P HT_MCP_RX_CLK1_N

HT_MCP_RXCTL0_P HT_MCP_RXCTL0_N HT_MCP_RXCTL1_P/RESERVED HT_MCP_RXCTL1_N/RESERVED

THERMTRIP#/GPIO_58 PROCHOT#/GPIO_20

+3.3V_PLL_CPU

+1.2V_PLL_CPU_HT

HT_MCP_COMP_VDD

HT_MCP_COMP_GND

MCP67-MV_PBGA836

3

MCP67

MCP67 PART 1 OF 8

PART 1 OF 8

HT

RESERVED/HT_MCP_TXCTL1_P

RESERVED/HT_MCP_TXCTL1_N

HT_MCP_TXD0_P HT_MCP_TXD0_N HT_MCP_TXD1_P HT_MCP_TXD1_N HT_MCP_TXD2_P HT_MCP_TXD2_N HT_MCP_TXD3_P HT_MCP_TXD3_N HT_MCP_TXD4_P HT_MCP_TXD4_N HT_MCP_TXD5_P HT_MCP_TXD5_N HT_MCP_TXD6_P HT_MCP_TXD6_N HT_MCP_TXD7_P HT_MCP_TXD7_N

HT_MCP_TXD8_P HT_MCP_TXD8_N HT_MCP_TXD9_P HT_MCP_TXD9_N

HT_MCP_TXD10_P

HT_MCP_TXD10_N

HT_MCP_TXD11_P

HT_MCP_TXD11_N

HT_MCP_TXD12_P

HT_MCP_TXD12_N

HT_MCP_TXD13_P

HT_MCP_TXD13_N

HT_MCP_TXD14_P

HT_MCP_TXD14_N

HT_MCP_TXD15_P

HT_MCP_TXD15_N

HT_MCP_TX_CLK0_P HT_MCP_TX_CLK0_N HT_MCP_TX_CLK1_P HT_MCP_TX_CLK1_N

HT_MCP_TXCTL0_P HT_MCP_TXCTL0_N

HT_MCP_REQ#

HT_MCP_STOP#

HT_MCP_RST#

HT_MCP_PWRGD

CLKOUT_200MHZ_P CLKOUT_200MHZ_N

CLKOUT_25MHZ

CPU_SBVREF

CLK200_TERM_GND

AK27 AJ27 AK26 AL26 AK25 AL25 AL24 AK24 AK22 AL22 AK21 AL21 AH21 AJ21 AL20 AM20

AG27 AH27 AF25 AG25 AH25 AJ25 AE23 AF23 AD21 AE21 AF21 AG21 AC20 AD20 AE19 AF19

AK23 AJ23 AG23 AH23

AK20 AJ20 AD19 AC19

AD23 AB20 AC21 AD22

AL28 AM28

AK28 AG28 AJ28

R123

2.37K_0402_1%

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7

H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP0 H_CLKIN0 H_CLKIP1 H_CLKIN1

H_CTLIP0 H_CTLIN0

HTCPU_REQ# HTCPU_STOP# HTCPU_RST# HTCPU_PWRGD

12

TP4 PADTP4 PAD

1

C136

0.1U_0402_16V4Z

2

H_CADIP0 (4) H_CADIN0 (4) H_CADIP1 (4) H_CADIN1 (4) H_CADIP2 (4) H_CADIN2 (4) H_CADIP3 (4) H_CADIN3 (4) H_CADIP4 (4) H_CADIN4 (4) H_CADIP5 (4) H_CADIN5 (4) H_CADIP6 (4) H_CADIN6 (4) H_CADIP7 (4) H_CADIN7 (4)

H_CADIP8 (4) H_CADIN8 (4) H_CADIP9 (4) H_CADIN9 (4) H_CADIP10 (4) H_CADIN10 (4) H_CADIP11 (4) H_CADIN11 (4) H_CADIP12 (4) H_CADIN12 (4) H_CADIP13 (4) H_CADIN13 (4) H_CADIP14 (4) H_CADIN14 (4) H_CADIP15 (4) H_CADIN15 (4)

H_CLKIP0 (4) H_CLKIN0 (4) H_CLKIP1 (4) H_CLKIN1 (4)

H_CTLIP0 (4) H_CTLIN0 (4)

HTCPU_STOP# (6) HTCPU_RST# (6) HTCPU_PWRGD (6)

CPUCLK (6) CPUCLK# (6)

9/25 Modify TO +3VS

+3VS

12

R164

R164 22K_0402_5%

22K_0402_5%

+1.2V_HT

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

3

Compal Secret Data

Deciphered Date

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

2

Date: Sheet of

10 43Tuesday, November 27, 2007

1

C

5

Dr-Bios.com

PCIE_GTX_C_MRX_P[0..15](18) PCIE_MTX_C_GRX_P[0..15](18) PCIE_GTX_C_MRX_N[0..15](18)

D D

+3V

12

R45

R45 10K_0402_5%

10K_0402_5% @

C C

B B

MP 2007/5/10 Modify

R550 0_0402_5%

A A

R551 0_0402_5% MINI2@R551 0_0402_5% MINI2@

R552 0_0402_5% MINI1@R552 0_0402_5% MINI1@

12

MCP_PCIE_WAKE#(25,26,27)

PE_PRSNTX16#(18)

PCIE_MRX_PTX_P1(26) PCIE_MRX_PTX_N1(26)

EXP_CLKREQ#(26)

PCIE_MRX_PTX_P2(25) PCIE_MRX_PTX_N2(25)

MINI2_CLKREQ#(25)

PCIE_MRX_PTX_P3(25) PCIE_MRX_PTX_N3(25)

MINI1_CLKREQ#(25)

L19

+1.2VS

+3VS

@

1 2

MBK1608121YZF_0603

L5

1 2

MBK1608121YZF_0603 L5MBK1608121YZF_0603

L6

1 2

MBK1608121YZF_0603 L6MBK1608121YZF_0603

PEA_PRSNT#

PEB_PRSNT#

PEC_PRSNT#

C18

4.7U_0805_10V4Z

@

R146 0_0402_5%

1 2

R147 0_0402_5%

1 2

+3VS

R139 0_0402_5% MINI2@R139 0_0402_5% MINI2@

1 2

R140 0_0402_5% MINI2@R140 0_0402_5% MINI2@

1 2

+3VS

R134 0_0402_5%

1 2

R135 0_0402_5%

1 2

+3VS

C115

4.7U_0805_10V4Z

1

2

EXPRESS@

PEA_PRSNT#

PEB_PRSNT#

MINI1@

PEC_PRSNT#

1

2

C104

0.1U_0402_16V4Z

1

2

C25

4.7U_0805_10V4Z

4

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

MCP_PCIE_WAKE# R365 10K_0402_5%@R365 10K_0402_5%@ R367 10K_0402_5%@R367 10K_0402_5%@ R149 10K_0402_5%@R149 10K_0402_5%@

R152 10K_0402_5%

R118 10K_0402_5%

R148 10K_0402_5%

C105

0.1U_0402_16V4Z

1

2

1

2

12 12 12

PCIE_MRX_PTX_P1_R

PCIE_MRX_PTX_N1_R

12

EXPRESS@

PCIE_MRX_PTX_P2_R

PCIE_MRX_PTX_N2_R PCIE_MTX_C_PRX_N2

12

MINI2@

PCIE_MRX_PTX_P3_R

PCIE_MRX_PTX_N3_R

12

MINI1@

+1.2V_PLL_PE_SS1

+1.2V_PLL_PE1

+3.3V_PLL_PE_SS1

1

2

C26

0.1U_0402_16V4Z

12

R145

2.37K_0402_1%

2.37K_0402_1% @

@

U23B

F23

PE0_RX0_P

G23

PE0_RX0_N

F24

PE0_RX1_P

F25

PE0_RX1_N

D25

PE0_RX2_P

D26

PE0_RX2_N

C28

PE0_RX3_P

D28

PE0_RX3_N

C29

PE0_RX4_P

C30

PE0_RX4_N

D29

PE0_RX5_P

D30

PE0_RX5_N

F26

PE0_RX6_P

F27

PE0_RX6_N

F28

PE0_RX7_P

F29

PE0_RX7_N

H23

PE0_RX8_P

H24

PE0_RX8_N

H25

PE0_RX9_P

H26

PE0_RX9_N

H27

PE0_RX10_P

H28

PE0_RX10_N

K24

PE0_RX11_P

K25

PE0_RX11_N

K27

PE0_RX12_P

K26

PE0_RX12_N

K28

PE0_RX13_P

K29

PE0_RX13_N

J31

PE0_RX14_P

J30

PE0_RX14_N

K31

PE0_RX15_P

K30

PE0_RX15_N

H17

PE_WAKE#/GPIO_21

U31

PE0_PRSNTX1#/DDC_CLK1

U30

PE0_PRSNTX4#/DDC_DATA1

U29

PE0_PRSNTX8#/EXP_EN

U28

PE0_PRSNTX16#

L29

PE1_RX_P

L30

PE1_RX_N

W27

PEA_CLKREQ#

W28

PEA_PRSNT#

M26

PE2_RX_P

M27

PE2_RX_N

U26

PEB_CLKREQ#

U27

PEB_PRSNT#

N23

PE3_RX_P

N22

PE3_RX_N

U25

PEC_CLKREQ#

U24

PEC_PRSNT#

N30

PE4_RX_P

N31

PE4_RX_N

R22

PED_CLKREQ#/GPIO_16

U23

PED_PRSNT#

P31

PE5_RX_P

P30

PE5_RX_N

T22

PEE_CLKREQ#/GPIO_17

V31

PEE_PRSNT#

P26

PE6_RX_P

P27

PE6_RX_N

U22

PEF_CLKREQ#/GPIO_18

V30

PEF_PRSNT#

U19

+1.2V_PLL_PE_SS1

U20

+1.2V_PLL_PE_SS2

R20

+1.2V_PLL_PE1

R19

+1.2V_PLL_PE2

P19

+3.3V_PLL_PE_SS1

P20

+3.3V_PLL_PE_SS2

V24

PE_CLK_COMP

MCP67-MV_PBGA836

3

MVP67

MVP67 PART 2 OF 8

PART 2 OF 8

PCIE GFX I/F

PE0_TX0_P PE0_TX0_N PE0_TX1_P PE0_TX1_N PE0_TX2_P PE0_TX2_N PE0_TX3_P PE0_TX3_N PE0_TX4_P PE0_TX4_N PE0_TX5_P PE0_TX5_N PE0_TX6_P PE0_TX6_N PE0_TX7_P PE0_TX7_N PE0_TX8_P PE0_TX8_N PE0_TX9_P

PE0_TX9_N PE0_TX10_P PE0_TX10_N PE0_TX11_P PE0_TX11_N PE0_TX12_P PE0_TX12_N PE0_TX13_P PE0_TX13_N PE0_TX14_P PE0_TX14_N PE0_TX15_P PE0_TX15_N

PE0_REFCLK_P PE0_REFCLK_N

PE1_TX_P

PE1_TX_N PE1_REFCLK_P PE1_REFCLK_N

PE2_TX_P

PE2_TX_N PE2_REFCLK_P PE2_REFCLK_N

PE3_TX_P

PE3_TX_N PE3_REFCLK_P PE3_REFCLK_N

PE4_TX_P

PE4_TX_N PE4_REFCLK_P PE4_REFCLK_N

PE5_TX_P

PE5_TX_N PE5_REFCLK_P PE5_REFCLK_N

PE6_TX_P

PE6_TX_N PE6_REFCLK_P PE6_REFCLK_N

PEX_RST#

PEX_RST1#

PCIE_MTX_GRX_P0

D24

PCIE_MTX_GRX_N0

C24

PCIE_MTX_GRX_P1

A24

PCIE_MTX_GRX_N1

B24

PCIE_MTX_GRX_P2

B25

PCIE_MTX_GRX_N2

C25

PCIE_MTX_GRX_P3

B26

PCIE_MTX_GRX_N3

C26

PCIE_MTX_GRX_P4

C27

PCIE_MTX_GRX_N4

D27

PCIE_MTX_GRX_P5

A28

PCIE_MTX_GRX_N5

B28

PCIE_MTX_GRX_P6

A29

PCIE_MTX_GRX_N6

B29

PCIE_MTX_GRX_P7

A30

PCIE_MTX_GRX_N7

B30

PCIE_MTX_GRX_P8

B31

PCIE_MTX_GRX_N8

B32

PCIE_MTX_GRX_P9

C31

PCIE_MTX_GRX_N9

C32

PCIE_MTX_GRX_P10

D31

PCIE_MTX_GRX_N10

D32

PCIE_MTX_GRX_P11

E31

PCIE_MTX_GRX_N11

E30

PCIE_MTX_GRX_P12

F31

PCIE_MTX_GRX_N12

F30

PCIE_MTX_GRX_P13

G29

PCIE_MTX_GRX_N13

G30

PCIE_MTX_GRX_P14

H29

PCIE_MTX_GRX_N14

H30

PCIE_MTX_GRX_P15

H32

PCIE_MTX_GRX_N15

H31

CLK_PCIE_VGA

R29

CLK_PCIE_VGA#

R30

PCIE_MTX_PRX_P1

M28

PCIE_MTX_PRX_N1

M29 T32 T31

M24

PCIE_MTX_PRX_N2

M25 T29 T30

M22

PCIE_MTX_PRX_N3

M23 T27 T28

M30 M31 T25 T26

P29 P28 T23 T24

P24 P25 P23 R23

W30

W29

R165 0_0402_5% R165 0_0402_5%

PCIE_MTX_C_GRX_N[0..15](18)

C194 0.1U_0402_16V7K VGA@C194 0.1U_0402_16V7K VGA@

1 2

C167 0.1U_0402_16V7K VGA@C167 0.1U_0402_16V7K VGA@

1 2

C196 0.1U_0402_16V7K VGA@C196 0.1U_0402_16V7K VGA@

1 2

C169 0.1U_0402_16V7K VGA@C169 0.1U_0402_16V7K VGA@

1 2

C198 0.1U_0402_16V7K VGA@C198 0.1U_0402_16V7K VGA@

1 2

C171 0.1U_0402_16V7K VGA@C171 0.1U_0402_16V7K VGA@

1 2

C200 0.1U_0402_16V7K VGA@C200 0.1U_0402_16V7K VGA@

1 2

C173 0.1U_0402_16V7K VGA@C173 0.1U_0402_16V7K VGA@

1 2

C202 0.1U_0402_16V7K VGA@C202 0.1U_0402_16V7K VGA@

1 2

C175 0.1U_0402_16V7K VGA@C175 0.1U_0402_16V7K VGA@

1 2

C204 0.1U_0402_16V7K VGA@C204 0.1U_0402_16V7K VGA@

1 2

C177 0.1U_0402_16V7K VGA@C177 0.1U_0402_16V7K VGA@

1 2

C229 0.1U_0402_16V7K VGA@C229 0.1U_0402_16V7K VGA@

1 2

C238 0.1U_0402_16V7K VGA@C238 0.1U_0402_16V7K VGA@

1 2

C231 0.1U_0402_16V7K VGA@C231 0.1U_0402_16V7K VGA@

1 2

C240 0.1U_0402_16V7K VGA@C240 0.1U_0402_16V7K VGA@

1 2

EXPRESS@

C249 0.1U_0402_16V7K

1 2

C248 0.1U_0402_16V7K

EXPRESS@

EXPRESS@ MINI2@

MINI2@

C220 0.1U_0402_16V7K

1 2

C219 0.1U_0402_16V7K

MINI2@

MINI2@ MINI1@

MINI1@

C235 0.1U_0402_16V7K

1 2

C234 0.1U_0402_16V7K

MINI1@

1 2

2

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

HT_VLD(15,31)

PE_RST0#

PCIE_RST1#

CLOSE TO CONNECT

C193 0.1U_0402_16V7KVGA@ C193 0.1U_0402_16V7KVGA@

1 2

C166 0.1U_0402_16V7KVGA@ C166 0.1U_0402_16V7KVGA@

1 2

C195 0.1U_0402_16V7KVGA@ C195 0.1U_0402_16V7KVGA@

1 2

C168 0.1U_0402_16V7KVGA@ C168 0.1U_0402_16V7KVGA@

1 2

C197 0.1U_0402_16V7KVGA@ C197 0.1U_0402_16V7KVGA@

1 2

C170 0.1U_0402_16V7KVGA@ C170 0.1U_0402_16V7KVGA@

1 2

C199 0.1U_0402_16V7KVGA@ C199 0.1U_0402_16V7KVGA@

1 2

C172 0.1U_0402_16V7KVGA@ C172 0.1U_0402_16V7KVGA@

1 2

C201 0.1U_0402_16V7KVGA@ C201 0.1U_0402_16V7KVGA@

1 2

C174 0.1U_0402_16V7KVGA@ C174 0.1U_0402_16V7KVGA@

1 2

C203 0.1U_0402_16V7KVGA@ C203 0.1U_0402_16V7KVGA@

1 2

C176 0.1U_0402_16V7KVGA@ C176 0.1U_0402_16V7KVGA@

1 2

C228 0.1U_0402_16V7KVGA@ C228 0.1U_0402_16V7KVGA@

1 2

C237 0.1U_0402_16V7KVGA@ C237 0.1U_0402_16V7KVGA@

1 2

C230 0.1U_0402_16V7KVGA@ C230 0.1U_0402_16V7KVGA@

1 2

C239 0.1U_0402_16V7KVGA@ C239 0.1U_0402_16V7KVGA@

1 2

PCIE_MTX_C_PRX_P1 PCIE_MTX_C_PRX_N1 CLK_PCIE_CARD CLK_PCIE_CARD#

PCIE_MTX_C_PRX_P2PCIE_MTX_PRX_P2 CLK_PCIE_MINI2

CLK_PCIE_MINI2#

PCIE_MTX_C_PRX_P3PCIE_MTX_PRX_P3 PCIE_MTX_C_PRX_N3 CLK_PCIE_MINI1 CLK_PCIE_MINI1#

+3V

HT_VLD PE_RST0#

PCIE_RST1# (25)

FOR MINI CARD

2

B

1

A

R170 0_0402_5%

1 2

R169 0_0402_5%@ R169 0_0402_5%@

PCIE_RST1# PCIE_RST#

1 2

PCIE_MTX_C_GRX_P0 PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

CLK_PCIE_VGA (18) CLK_PCIE_VGA# (18)

PCIE_MTX_C_PRX_P1 (26) PCIE_MTX_C_PRX_N1 (26) CLK_PCIE_CARD (26) CLK_PCIE_CARD# (26)

PCIE_MTX_C_PRX_P2 (25) PCIE_MTX_C_PRX_N2 (25) CLK_PCIE_MINI2 (25) CLK_PCIE_MINI2# (25)

PCIE_MTX_C_PRX_P3 (25) PCIE_MTX_C_PRX_N3 (25) CLK_PCIE_MINI1 (25) CLK_PCIE_MINI1# (25)

1

C267

0.1U_0402_16V4Z

5 U5

U5

P

G

NC7SZ08P5X_NL_SC70-5

3

2

4

Y

@

PCIE_RST#

1

NEW CARD

MINI_CARD(WLAN)

MINI_CARD(TV)

PCIE_RST# (18,26)

FOR VGA,LAN,NEW CARD

PEA_PRSNT# PEB_PRSNT# PEC_PRSNT#

1 2

R553 0_0402_5% @R553 0_0402_5% @

1 2

R554 0_0402_5% @R554 0_0402_5% @

1 2

R555 0_0402_5% @R555 0_0402_5% @

5

EXP_CLKREQ# MINI2_CLKREQ# MINI1_CLKREQ#

Security Classification

Issued Date

CP_PE#(14,26)

4

1 2

R563 0_0402_5% EXPRESS@R563 0_0402_5% EXPRESS@

PEA_PRSNT#

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2006/08/18 2007/8/18

3

Compal Secret Data

Deciphered Date

2

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

11 43Tuesday, November 27, 2007

1

C

5

Dr-Bios.com

4

3

2

1

+3VMAC+3V

U23C

1 2

R556 0_0805_5%@R556 0_0805_5%@

+3VAUX

1 2

D D

R557 0_0805_5%R557 0_0805_5%

40 mil

MP Modify 2007/04/13

C51

4.7U_0805_10V4Z

1

2

MP Modify 2007/07/03

LINK10 LINK10_R

LINK10(22)

+3V +3V

C C

12

R526

R526 10K_0402_5%

10K_0402_5%

@

12

R527

R527 10K_0402_5%

10K_0402_5%

B B

R567 0_0402_5%R567 0_0402_5%

TXCLK

LINK10_R

12

L25

L25 MBK1608121YZF_0603

MBK1608121YZF_0603

1 2

+3V

12

R525

R525 10K_0402_5%

10K_0402_5%

2 3 4

TXCLK TXCLK_PHY_RTXCLK_R_

12

L24

L24 MBK1608121YZF_0603

MBK1608121YZF_0603 @

@

C210

4.7U_0805_10V4Z

1

2

+3.3V_PLL

U40

CLKIN1NC SS% GND SSON

S IC PCS3P23Z01DG-08-TR TSSOP 8P

R529 0_0402_5% @R529 0_0402_5% @

NC

VDD

CLKOUT

1 2

1

2

C148

0.1U_0402_16V4Z

8 7 6 5

MP Modify 2007/04/13

A A

SLP_RMGT#(15,22)

5

R559

R559 20K_0402_1%

20K_0402_1%

1 2

R560

R560 0_0402_5%

0_0402_5%

+3VMAC

12

1

2

49.9_0402_1%

C190

C190 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

2

12

+3VMAC

12

L9

L9 MBK1608121YZF_0603

MBK1608121YZF_0603

R349

49.9_0402_1%

C53

0.1U_0402_16V4Z

0.1U_0402_16V4Z 12

R68

R67

R67 124_0402_1%

124_0402_1%

27MHZ_20P_7A27000010

1

C508

C508 22P_0402_50V8J

22P_0402_50V8J

2

UMA&TV@

C682

1 2

0.1U_0402_16V4Z

1 2

R528 22_0402_5%

1 2

R530 0_0402_5% @R530 0_0402_5% @

+3VS+3VS+3VS+1.8VS

12

L20

L20 MBK1608121YZF_0603

MBK1608121YZF_0603

L22

L22 MBK1608121YZF_0603

MBK1608121YZF_0603

+3V+3V

12

R558

R558 10K_0402_5%

10K_0402_5%

13

D

Q63

2

2N7002_SOT23

G

S

R479 10K_0402_5%@R479 10K_0402_5%@ R321 10K_0402_5%@R321 10K_0402_5%@

RGMII_INTR(22)

12

Y3

1 2

UMA&TV@

UMA_ENVDD(20)

TXCLK_PHYTXCLK_PHY_R

1

2 C211

C211

4.7U_0805_10V4Z

+1.2VALW

S

G

Q62

2

AO3413_SOT23-3

D

1 3

+1.2VALW_MAC

6 mil

RXD0(22) RXD1(22) RXD2(22) RXD3(22) RXCLK(22) RXCTL(22)

12

RGMII_INTR_R

12

RGMII_INTR

R514 0_0402_5%R514 0_0402_5%

12

1

2

R66

C55

0.01U_0402_16V7K

1

2

DPST_PWM(20,27,28)

ENBKL(18,27,28)

R66 124_0402_1%

124_0402_1%

NB_XTALIN NB_XTALOUT

C507

C507 22P_0402_50V8J

22P_0402_50V8J UMA&TV@

UMA&TV@

R121 0_0402_5% UMA@R121 0_0402_5%UMA@

TXCLK_PHY (22)

PVT Modify 2007/03/12

MP Modify 2007/07/03

R24 22K_0402_5%

1 2

R138 6.2K_0402_5%R138 6.2K_0402_5%

1 2

R136 10K_0402_5%R136 10K_0402_5%

+3VS

C221

0.1U_0402_16V4Z

1

2

1 2

1

2

C212

0.01U_0402_16V7K

C178

4.7U_0805_10V4Z

1

2

4

1 2

RXD0 RXD1 RXD2 RXD3 RXCLK RXCTL

RGMII_INTR_R

1

2

C103

0.01U_0402_16V7K

1

2

C66

4.7U_0805_10V4Z

+1.8V_IFP_MCP +3.3V_PLL_IFPP

+3.3V_HDMI

C163

0.1U_0402_16V4Z

12

R144

R144 1K_0402_1%

1K_0402_1% @

@

C61

0.1U_0402_16V4Z

LCD_BKLT_EN

1

2

PVT Modify 2007/03/12

C691

1

0.1U_0402_16V4Z

2

B20 C20 E19 F19 G19

J20

C19

J18

D19

B18 N13 B17

C17

K21 D21

E23 H22

N15 E17 F17

U11 T11

AD24 AE25 AE27

AL29

AM29

AK29

AJ29

AM30

AL30

AK30

AJ30

AE26

AL32

AD25 AC26

AC24 AC25

AC23 AC22

AH29

AK31 AK32

C160

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

U23C

RGMII_RXD0/MII_RXD0 RGMII_RXD1/MII_RXD1 RGMII_RXD2/MII_RXD2 RGMII_RXD3/MII_RXD3 RGMII_RXC/MII_RXCLK RGMII_RXCTL/MII_RXDV

MII_RXER/GPIO_36 MII_COL/MI2C_DATA MII_CRS/MI2C_CLK

RGMII/MII_INTR/GPIO35 +3.3V_PLL_MAC_DUAL MII_COMP_3P3V

MII_COMP_GND

MCP67

MCP67 PART 3 OF 8

PART 3 OF 8

LAN

RGMII/MII_PWRDWN#/GPIO_37

+3.3V_DUAL_RMGT

+1.2V_DUAL_RMGT

RGMII_TXD0/MII_TXD0 RGMII_TXD1/MII_TXD1 RGMII_TXD2/MII_TXD2 RGMII_TXD3/MII_TXD3

RGMII_TXCLK/MII_TXCLK

RGMII_TXCTL/MII_TXEN

RGMII/MII_MDC

RGMII/MII_MDIO

BUF_25MHZ MII_RESET#

MII_VREF

L14

+1.2VALW_MAC

N18

TXD0_R

J19

TXD1_R

K19

TXD2_R

L19

TXD3_R

L18

TXCLK_R TXCLK

H19

TXCTL_R

K18 K20

L20

RGMII_PWRDWN#

D17

R94 10K_0402_5%R94 10K_0402_5%

G17 C18

H20

MP Modify 2007/04/28

DDC_CLK0

DDC_CLK2

DDC_CLK3

B21 C21 B22

G21 H21

G8 H8

E21

F21 C23

C22 D23

AE30 AE31

AC30 AC29 AC27 AC28 AD30 AD29 AD31 AD32

AJ31 AJ32

AE28 AE29 AF30 AF31 AG30 AG29 AH31 AH30

L21 J22

L22 K22

AB31 AB30

C42

0.1U_0402_16V4Z

IFPAB_RSET IFPAB_PROBE

RGB_DAC_RSET RGB_DAC_VREF

TV_DAC_RSET TV_DAC_VREF

+3.3V_PLL_DISP TV_XTALIN TV_XTALOUT

GPIO_6/FERR//SYS_SERR/IGPU_GPIO_6* GPIO_7/NFERR//SYS_PERR/IGPU_GPIO_7*

LCD_BKL_CTL LCD_BKL_ON LCD_PANEL_PWR

HDMI_TXC_P HDMI_TXC_N

HDMI_TXD0_P HDMI_TXD0_N HDMI_TXD1_P HDMI_TXD1_N HDMI_TXD2_P HDMI_TXD2_N

HPLUG_DET3 HPLUG_DET2

HDCP_ROM_SCLK HDCP_ROM_SDATA

+1.8V_IFPA +1.8V_IFPB

+3.3V_IFPAB_HVDD +3.3V_HDMI_PLL_HVDD

+3.3V_HDMI

HDMI_RSET HDMI_VPROBE

MCP67-MV_PBGA836

DACS

FLAT PANEL

RGB_DAC_RED

RGB_DAC_GREEN

RGB_DAC_BLUE

RGB_DAC_HSYNC RGB_DAC_VSYNC

DDC_DATA0

+3.3V_RGB_DAC

+3.3V_TV_DAC

TV_DAC_RED

TV_DAC_GREEN

TV_DAC_BLUE

IFPA_TXC_P IFPA_TXC_N

IFPA_TXD0_P

IFPA_TXD0_N

IFPA_TXD1_P

IFPA_TXD1_N

IFPA_TXD2_P

IFPA_TXD2_N

IFPA_TXD3_P

IFPA_TXD3_N

IFPB_TXC_P IFPB_TXC_N

IFPB_TXD4_P

IFPB_TXD4_N

IFPB_TXD5_P

IFPB_TXD5_N

IFPB_TXD6_P

IFPB_TXD6_N

IFPB_TXD7_P

IFPB_TXD7_N

DDC_DATA2

DDC_DATA3

IFPAB_RSET

IFPAB_VPROBE

PVT Modify 2007/03/12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

R52 0_0603_5%

1 2

R79 0_0603_5% @R79 0_0603_5% @

1 2

R473 22_0402_5% R473 22_0402_5%

1 2

R471 22_0402_5% R471 22_0402_5%

1 2

R474 22_0402_5% R474 22_0402_5%

1 2

R475 22_0402_5% R475 22_0402_5%

1 2

R476 33_0402_5%R476 33_0402_5%

1 2

R477 22_0402_5% R477 22_0402_5%

1 2

UMA_CRT_R UMA_CRT_G UMA_CRT_B

1

2

UMA_TV_CRMA UMA_TV_LUMA UMA_TV_COMPS

UMA_TXCLK+ UMA_TXCLK-

UMA_TXOUT0+ UMA_TXOUT0UMA_TXOUT1+ UMA_TXOUT1UMA_TXOUT2+ UMA_TXOUT2-

UMA_TZCLK+ UMA_TZCLK-

UMA_TZOUT0+ UMA_TZOUT0UMA_TZOUT1+ UMA_TZOUT1UMA_TZOUT2+ UMA_TZOUT2-

UMA_LCD_CLK UMA_LCD_DATA

DDC_DATA3 DDC_DATA3

1

2

C528

0.01U_0402_16V7K

0.01U_0402_16V7K @

@

UMA_CRT_R (19) UMA_CRT_G (19) UMA_CRT_B (19)

UMA_CRT_HSYNC (19) UMA_CRT_VSYNC (19)

UMA_CRT_CLK (19)

UMA_CRT_DATA (19)

C36

4.7U_0805_10V4Z

UMA_TV_CRMA (19)

UMA_TV_LUMA (19)

UMA_TXCLK+ (20) UMA_TXCLK- (20)

UMA_TXOUT0+ (20) UMA_TXOUT0- (20) UMA_TXOUT1+ (20) UMA_TXOUT1- (20) UMA_TXOUT2+ (20) UMA_TXOUT2- (20)

UMA_TZOUT0+ (20)

UMA_TZOUT0- (20)

UMA_TZOUT1+ (20)

UMA_TZOUT1- (20)

UMA_TZOUT2+ (20)

UMA_TZOUT2- (20)

12

R372

R372 1K_0402_1%

1K_0402_1% @

@

2

UMA_TV_COMPS (19)

UMA_TZCLK+ (20)

UMA_TZCLK- (20)

UMA_LCD_CLK (20) UMA_LCD_DATA (20)

+3VMAC +1.2VALW

C44

1

0.1U_0402_16V4Z

TXD0 (22) TXD1 (22) TXD2 (22) TXD3 (22)

TXCTL (22)

RGMII_MDC (22) RGMII_MDIO (22)

MII_RST (22)

C58

1

0.1U_0402_16V4Z

2

Title

Size Document Number Rev

Custom

Date: Sheet of

0.1U_0402_16V4Z

2

+3VMAC

12

R69

1.47K_0402_1%

C40

0.1U_0402_16V4Z

1

2

C38

1

4.7U_0805_10V4Z

2

+3VS

SCHEMATIC, M/B LA-3581P

401474

12

R61

1.47K_0402_1%

L8

1 2

MBK2012121YZF_0805

UMA_CRT_R UMA_CRT_G UMA_CRT_B

UMA_TV_CRMA UMA_TV_LUMA UMA_TV_COMPS

UMA@

UMA@ R361 2.7K_0402_5%

R361 2.7K_0402_5% R359 2.7K_0402_5%

R359 2.7K_0402_5%

R57 10K_0402_5%

R63 150_0402_1%

R63 150_0402_1% R62 150_0402_1%

R62 150_0402_1% R64 150_0402_1%

R64 150_0402_1%

R332 150_0402_1%

R332 150_0402_1% R324 150_0402_1%

R324 150_0402_1% R325 150_0402_1%

R325 150_0402_1%

1 2 1 2

1 2

1 2 1 2 1 2

RGMII_PWRDWN#

TXCLK_R

+3VS

TXCLK

UMA@

UMA@ UMA@

UMA@

UMA&TV@

UMA&TV@ UMA&TV@

UMA&TV@

UMA_LCD_CLK

UMA_LCD_DATA

1

12 43Tuesday, November 27, 2007

+3VMAC

12

R472

R472 10K_0402_5%

10K_0402_5% @

@

12

R478

R478 10K_0402_5%

10K_0402_5%

12

C658

C658 33P_0402_50V8K

33P_0402_50V8K @

@

12

C681

C681 33P_0402_50V8K

33P_0402_50V8K @

@

C

5

Dr-Bios.com

4

3

2

1

RP3

+3VS

8.2K_1206_8P4R_5%

D D

+3VS

8.2K_1206_8P4R_5%

+3VS

8.2K_1206_8P4R_5%

+3VS

8.2K_1206_8P4R_5%

C C

+3VS

8.2K_1206_8P4R_5%

B B

2 7 3 6 4 5

RP6

1 8 2 7 3 6 4 5

RP5

1 8 2 7 3 6 4 5

RP4

1 8 2 7 3 6 4 5

RP1

1 8 2 7 3 6 4 5

PCI_REQ#1 PCI_REQ#2 PCI_REQ#3

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_SERR# PCI_TRDY# PCI_FRAME# PCI_STOP#

PCI_IRDY# PCI_PERR# PCI_DEVSEL#

PCI_REQ#4 PM_CLKRUN#

LPC_DRQ#0 SERIRQ

PM_CLKRUN#

1 2

PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8

PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_PIRQE#

PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_TRDY#

IDE_D0 IDE_D1 IDE_D2 IDE_D3 IDE_D4 IDE_D5 IDE_D6 IDE_D7 IDE_D8

IDE_D9 IDE_D10 IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15

IDE_DREQ IDE_IRQ IDE_IORDY

12

PCI_REQ#0(23)

PCI_AD[31..0](23)

PCI_AD[31..0]

PCI_PIRQE#(23) PCI_PIRQF#(23)

PCI_TRDY#(23)

LPC_DRQ#0

SERIRQ(23,27,28)

PM_CLKRUN#(23,27,28)

IDE_D[15..0](21)

IDE_DREQ(21)

IDE_IRQ(21)

IDE_IORDY(21)

IDE_IOR#(21)

IDE_D[15..0]

IDE_IOR#

R362 33_0402_5%R362 33_0402_5% R43 15K_0402_5%

R43 15K_0402_5%

PCI_REQ#0

1 8

9/21 Add 33ohm for IDE_IOR#

U23D

E10

PCI_REQ0#

G10

PCI_REQ1#

J10

PCI_REQ2#/GPIO_40/RS232_DSR#

M11

PCI_REQ3#/GPIO_38/RS232_CTS#

E8

PCI_REQ4#/GPIO_52/RS232_SIN#

D10

PCI_AD0

B10

PCI_AD1

C10

PCI_AD2

L12

PCI_AD3

K11

PCI_AD4

J11

PCI_AD5

D11

PCI_AD6

C11

PCI_AD7

J12

PCI_AD8

H12

PCI_AD9

G12

PCI_AD10

F12

PCI_AD11

E12

PCI_AD12

D12

PCI_AD13

C12

PCI_AD14

B12

PCI_AD15

G14

PCI_AD16

E14

PCI_AD17

D14

PCI_AD18

J15

PCI_AD19

C14

PCI_AD20

D15

PCI_AD21

K15

PCI_AD22

C15

PCI_AD23

L16

PCI_AD24

G16

PCI_AD25

J16

PCI_AD26

E16

PCI_AD27

H16

PCI_AD28

D16

PCI_AD29

F16

PCI_AD30

A16

PCI_AD31

L17

PCI_INTW#

J17

PCI_INTX#

B16

PCI_INTY#

K17

PCI_INTZ#

K14

PCI_TRDY#

C6

LPC_DRQ1#/GPIO19/FANRPM1

B6

LPC_DRQ0#/GPIO_50

D6

LPC_SERIRQ

D5

LPC_CLKRUN/GPIO_42

AF10

IDE_DATA_P0

AL9

IDE_DATA_P1

AK8

IDE_DATA_P2

AK7

IDE_DATA_P3

AK6

IDE_DATA_P4

AJ6

IDE_DATA_P5

AL5

IDE_DATA_P6

AL4

IDE_DATA_P7

AJ5

IDE_DATA_P8

AK5

IDE_DATA_P9

AL6

IDE_DATA_P10

AJ7

IDE_DATA_P11

AJ8

IDE_DATA_P12

AL8

IDE_DATA_P13

AK9

IDE_DATA_P14

AG10

IDE_DATA_P15

AK11

IDE_DREQ_P

AH10

IDE_INTR_P

AK10

IDE_RDY_P

AL10

IDE_IOR_P#

AF12

CABLE_DET_P/GPIO_63

MCP67-MV_PBGA836

MCP67

MCP67 PART 4 OF 8

PART 4 OF 8

PCI_GNT4#/GPIO_53/RS232_SOUT#

PCI

PCI_PERR#/GPIO_43/RS232_DCD#

LPC_PWRDWN#/GPIO_54/EXT_NMI#

LPC

IDE

PCI_GNT0#

PCI_GNT2#/GPIO_41/RS232_DTR# PCI_GNT3#/GPIO_39/RS232_RTS#

PCI_GNT1#

PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3#

PCI_DEVSEL#

PCI_FRAME#

PCI_IRDY#

PCI_PAR

PCI_SERR# PCI_STOP#

PCI_PME#/GPIO_30

PCI_RESET0# PCI_RESET1# PCI_RESET2# PCI_RESET3#

PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4

PCI_CLKIN

LPC_FRAME#

LPC_RESET#

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_CLK0 LPC_CLK1

IDE_ADDR_P0 IDE_ADDR_P1 IDE_ADDR_P2

IDE_CS1_P# IDE_CS3_P#

IDE_DACK_P#

IDE_IOW_P#

IDE_COMP_3P3V IDE_COMP_GND

PCI_GNT#0

F10 H10 K10 L10 F8

PCI_CBE#0

K12

PCI_CBE#1

K13

PCI_CBE#2

F14

PCI_CBE#3

K16

PCI_DEVSEL#

L13

PCI_FRAME#

J14

PCI_IRDY#

H14

PCI_PAR

B14

PCI_PERR#

J13

PCI_SERR#

C13

PCI_STOP#

B13

PCI_PME#

C16

R30 33_0402_5%R30 33_0402_5%

J9 K9 K8 L9

C9 B9 B8 A8 C8 D8

D7 B3

C7

A4 B4 C4 A3 B5

C5

AG12 AE12 AH12

AJ12 AK12 AJ11

AJ10

AM4 AK4

1 2

R33 33_0402_5%R33 33_0402_5%

1 2

CLK_PCI_1394_R

PCI_CLK4 PCI_CLKIN

CLK_PCI_LPC_R

IDE_A0 IDE_A1 IDE_A2

IDE_CS1# IDE_CS3# IDE_DACK#

IDE_IOW#

PCI_CBE#[3..0]

PCI_DEVSEL# (23) PCI_FRAME# (23) PCI_IRDY# (23) PCI_PAR (23) PCI_PERR# (23) PCI_SERR# (23) PCI_STOP# (23)

T4PAD T4PAD T5PAD T5PAD

R40 22_0402_5% R40 22_0402_5%

R46 22_0402_5% R46 22_0402_5%

C31

1

10P_0402_50V8J

C30

C30 10P_0402_50V8J

10P_0402_50V8J

2

R329 22_0402_5% R329 22_0402_5%

1 2

T6PAD T6PAD

R54 33_0402_5%R54 33_0402_5%

1 2

R333 22_0402_5% R333 22_0402_5%

1 2

R328 22_0402_5% R328 22_0402_5%

1 2

R335 22_0402_5% R335 22_0402_5%

1 2

R311 22_0402_5% R311 22_0402_5%

1 2

R59 22_0402_5% R59 22_0402_5%

1 2

IDE_A0 (21) IDE_A1 (21) IDE_A2 (21)

IDE_CS1# (21) IDE_CS3# (21) IDE_DACK# (21)

IDE_IOW# (21)

PCI_GNT#0 (23)

PCI_CBE#[3..0] (23)

1 2

LPC_FRAME#LPC_DRQ#1

PCI_RST1394# (23) PCIRST_IDE# (21)

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME# (14,27,28)

PLT_RST# (27,28)

LPC_AD0 (27,28) LPC_AD1 (27,28) LPC_AD2 (27,28) LPC_AD3 (27,28)

CLK_PCI_LPC (27,28)

+3VS

12

R29

R29 121_0402_1%

121_0402_1%

12

R51

R51 121_0402_1%

121_0402_1%

PCI_PME# EC_PME#

Internal PU

CLK_PCI_1394 (23)

9/20 Added

+3V

5

A2Y

3

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_DRQ#0 LPC_DRQ#1 SERIRQ

CLK_PCI_LPC_R

PCI_CBE#0

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24

PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16

1

P

OE#

G

U32

4

SN74AHCT1G125DCKR_SC70-5

SN74AHCT1G125DCKR_SC70-5 @

@

R38 8.2K_0402_5% @R38 8.2K_0402_5% @ R72 8.2K_0402_5% @R72 8.2K_0402_5% @ R36 10K_0402_5% @R36 10K_0402_5% @

JP35

1 3

39 40 41 42 43

S W-CONN AMP 2-767004-2 38P

S W-CONN AMP 2-767004-2 38P @

@

SBPWR_EN# (34)

RP2

1 8 2 7 3 6 4 5

8.2K_1206_8P4R_5%

8.2K_1206_8P4R_5% @

@

1 2 1 2 1 2

NC NC

Debug Port

CLK05CLK1 A3<7>7A1<7>

A3<6>9A1<6> A3<5>11A1<5> A3<4>13A1<4> A3<3>15A1<3> A3<2>17A1<2> A3<1>19A1<1> A3<0>21A1<0>

A2<7>23A0<7> A2<6>25A0<6> A2<5>27A0<5> A2<4>29A0<4> A2<3>31A0<3> A2<2>33A0<2> A2<1>35A0<1> A2<0>37A0<0>

GND GND GND GND GND

EC_PME# (27,28)

+3VS

@

2

NC

4

NC

6 8

10 12 14 16 18 20 22

24 26 28 30 32 34 36 38

C37

1

10P_0402_50V8J

2

PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10

PCI_AD9 PCI_AD8

PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

2

Date: Sheet of

1

13 43Tuesday, November 27, 2007

C

5

Dr-Bios.com

PLACE SATA AC COUPLING CAPS CLOSE TO MCP67

1 2

JUMPER

1 2

SATA2@

1 2

SATA2@

HDA_SDOUT

LPC_FRAME#

SATA_STX_C_DRX_P0

SATA_DTX_C_SRX_N0 SATA_DTX_C_SRX_P0

SATA_STX_C_DRX_P1 SATA_STX_C_DRX_N1

SATA_DTX_C_SRX_N1 SATA_DTX_C_SRX_P1

SATA_STX_C_DRX_P0(21) SATA_STX_C_DRX_N0(21)

SATA_DTX_C_SRX_N0(21)

D D

C C

SATA_DTX_C_SRX_P0(21)

SATA_STX_C_DRX_P1(21) SATA_STX_C_DRX_N1(21)

SATA_DTX_C_SRX_N1(21) SATA_DTX_C_SRX_P1(21)

+3VS

R320 10K_0402_5% @R320 10K_0402_5% @

1 2

R319 10K_0402_5% R319 10K_0402_5%

1 2

R44 10K_0402_5% @R44 10K_0402_5% @

1 2

R41 10K_0402_5% R41 10K_0402_5%

1 2

HDA_SDOUT_ICH

"0" "0"

12

R35

R35 10K_0402_5%

10K_0402_5%

SATA_LED#

SATA_LED#(27,28)

+3VS+3VS

B B

HDA_BITCLK_ICH_R

12

R459

R459 10K_0402_5%

10K_0402_5%

@

12

R460

R460 10K_0402_5%

10K_0402_5%

@

HDA_BITCLK_ICH_R HDA_BITCLK_ICH

+1.2VS +3VS+1.2V_PLL_SP_VDD

A A

L10

1 2

MBK1608121YZF_0603

U36

1

CLKIN

2

NC

8

NC

3

SS

ASM3P623S00CF-08TR_TSSOP8

ASM3P623S00CF-08TR_TSSOP8 @

@

1 2

R461 0_0402_5%R461 0_0402_5%

1

C54

C54 10U_0805_10V4Z

10U_0805_10V4Z

2

5

VDD

CLKOUT

SSON

GND

7 6 5 4

1

2

HDA_BITCLK_ICH

1

C640

0.1U_0402_16V4Z

2

L14

L14 MBK1608121YZF_0603

MBK1608121YZF_0603

C50

0.1U_0402_16V4Z

"1" "1"

*DEFAULT

+1.2VS

+3.3V_PLL

1 2

4

SATA_STX_DRX_P0

C5120.01U_0402_16V7K

SATA_STX_DRX_N0SATA_STX_C_DRX_N0

C5110.01U_0402_16V7K

SATA_STX_DRX_P1

C5140.01U_0402_16V7K

SATA_STX_DRX_N1

C5130.01U_0402_16V7K

FUNCTION

LPC_FRAME

LPC BIOS*

"0"

PCI BIOS

"1"

SPI BIOS

"0"

RESERVED

"1"

1 2

R108 2.49K_0402_1%R108 2.49K_0402_1%

SATA_LED#

+1.2V_PLL_SP_VDD

1

+3.3V_PLL

2

C140

0.1U_0402_16V4Z

C145

4.7U_0805_10V4Z

1

2

C143

0.1U_0402_16V4Z

4

U23E

AE4

SATA_A0_TX_P

AE5

SATA_A0_TX_N

AG5

SATA_A0_RX_N

AG6

SATA_A0_RX_P

AD1

SATA_A1_TX_P

AD2

SATA_A1_TX_N

AE2

SATA_A1_RX_N

AE3

SATA_A1_RX_P

AG4

SATA_B0_TX_P

AG3

SATA_B0_TX_N

AH3

SATA_B0_RX_N

AH2

SATA_B0_RX_P

AG7

SATA_B1_TX_P

AG8

SATA_B1_TX_N

AF2

SATA_B1_RX_N

AF3

SATA_B1_RX_P

AL1

RESERVED/SATA_C0_TX_P

AL2

RESERVED/SATA_C0_TX_N

AK3

RESERVED/SATA_C0_RX_N

AL3

RESERVED/SATA_C0_RX_P

AJ1

RESERVED/SATA_C1_TX_P

AJ2

RESERVED/SATA_C1_TX_N

AK1

RESERVED/SATA_C1_RX_N

AK2

RESERVED/SATA_C1_RX_P

AJ4

SATA_TERMP

D4

SATA_LED#/GPIO_57

W13

+1.2V_PLL_SP_VDD

V13

+1.2V_PLL_SP_SS

R13

+3.3V_PLL_SP_SS

P13

+3.3V_PLL_LEG

MCP67-MV_PBGA836

C149

0.1U_0402_16V4Z

1

2

1

2

C153

0.1U_0402_16V4Z

3

MCP67

MCP67 PAR 5 OF 8

PAR 5 OF 8

SATA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB

USB_OC3#/GPIO_28/MGPIO_1 USB_OC4#/GPIO_29/MGPIO_3

HDA

HDA_SDATA_OUT/GPIO_45

HDA_SDATA_IN0/GPIO_22 HDA_SDATA_IN1/GPIO_23/MGPIO_0 HDA_SDATA_IN2/GPIO_24/MGPIO_2

HDA_DOCK_EN#/GPIO_51

HDA_DOCK_RST#/GPIO_46

3

USB0_P USB0_N

USB1_P USB1_N

USB2_P USB2_N

USB3_P USB3_N

USB4_P USB4_N

USB5_P USB5_N

USB6_P USB6_N

USB7_P USB7_N

USB8_P USB8_N

USB9_P USB9_N

RESERVED/USB10_P

RESERVED/USB10_N

RESERVED/USB11_P RESERVED/USB11_N

RESERVED RESERVED

USB_RBIAS_GND

USB_OC0#/GPIO_25 USB_OC1#/GPIO_26 USB_OC2#/GPIO_27

+3.3V_USB_DUAL1 +3.3V_USB_DUAL2

HDA_BITCLK

HDA_RESET#

HDA_SYNC/GPIO_44

2006/08/18 2007/8/18

USB20_P0

U3

USB20_N0

U2

USB20_P1

U4

USB20_N1

U5

USB20_P2

U6

USB20_N2

U7

USB20_P3

V3

USB20_N3

V2

USB20_P4

W4

USB20_N4

W3

USB20_P5

W5

USB20_N5

W6

USB20_P6

W7

USB20_N6

W8

USB20_P7

Y2

USB20_N7

Y3

USB20_P8

AA3

USB20_N8

AA2

USB20_P9

AA5

USB20_N9

AA4

AA7 AA6

AB3 AB2

AC3 AC4

T1

T2 T3 T4 T5 T6

Y8 Y9

D2

B1

B2 A2 D1

C2

C1

D3 C3

R338

1.1K_0402_1%

HDA_SDOUT_ICH

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2

HDA_RST_ICH#

HDA_SYNC_ICH

Compal Secret Data

Deciphered Date

1 2

R343 15K_0402_5%

1 2

R342 15K_0402_5%

1 2

R84 15K_0402_5%

1 2

R345 15K_0402_5%

1 2

R347 15K_0402_5%

1 2

R353 15K_0402_5%

1 2

R360 15K_0402_5%

1 2

R352 15K_0402_5%

1 2

R350 15K_0402_5%

1 2

R351 15K_0402_5%R351 15K_0402_5%

1 2

CMOS@

BT@

MINI1@

MINI2@

EXPRESS@

USB_OC#0 (26) USB_OC#1 (25) CP_PE# (11,26) USB_OC#3 USB_OC#4

2

HDA_BITCLK_ICHHDA_BITCLK_ICH_R

R31822_0402_5%

R31522_0402_5%

R31222_0402_5%

2

1 2

R346 15K_0402_5%

1 2

R341 15K_0402_5%

1 2

R80 15K_0402_5%

1 2

R348 15K_0402_5%

1 2

R344 15K_0402_5%

CMOS@

1 2

R357 15K_0402_5%

BT@

1 2

R358 15K_0402_5%

MINI1@

1 2

R355 15K_0402_5%

MINI2@

1 2

R356 15K_0402_5%

EXPRESS@

1 2

R354 15K_0402_5%R354 15K_0402_5%

1

C57

0.1U_0402_16V4Z

2

HDA_SDOUT_MDC (30)

HDA_SDIN0 (32) HDA_SDIN1 (30)

HDA_RST_MDC# (30)

HDA_SYNC_MDC (30)

HDA_BITCLK_ICH HDA_SYNC_ICH HDA_RST_ICH# HDA_SDOUT_ICH

1 2

1 2 1 2 1 2 1 2

1

USB20_P0 (26) USB20_N0 (26)

USB20_P1 (26) USB20_N1 (26)

USB20_P2 (25) USB20_N2 (25)

USB20_P3 (25) USB20_N3 (25)

USB20_P4 (20) USB20_N4 (20)

USB20_P5 (30) USB20_N5 (30)

USB20_P6 (25) USB20_N6 (25)

USB20_P7 (25) USB20_N7 (25)

USB20_P8 (26) USB20_N8 (26)

USB20_P9LPC_FRAME# (13,27,28) USB20_N9

+3V+3VS

+3V

1

C63

0.1U_0402_16V4Z

2

HDA_BITCLK_MDC (30)

R31433_0402_5% R31433_0402_5%

HDA_BITCLK_ICH HDA_SYNC_ICH HDA_RST_ICH# HDA_SDOUT_ICH

R2533_0402_5% R2533_0402_5% R2322_0402_5%

R2322_0402_5% R2622_0402_5%

R2622_0402_5% R2722_0402_5%

R2722_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet of

HDA_BITCLK_AUDIO (32)

HDA_SYNC_AUDIO (32)

HDA_RST_AUDIO# (32)

HDA_SDOUT_AUDIO (32)

SCHEMATIC, M/B LA-3581P

401474

USB PORT_1

USB/B Connector

USB CAMERA

BLUETOOTH

MINI1

MINI2

NEW CARD

NON-USE

1 2

R86 10K_0402_5%

1 2

R87 10K_0402_5%

1 2

R316 10K_0402_5%

1 2

R313 10K_0402_5%

C23

C23 10P_0402_50V8J

10P_0402_50V8J @

@

1

2

HDA_RST_ICH#

@ C22

@

1

2

10P_0402_50V8J

1

USB_OC#4 USB_OC#3

HDA_SYNC_ICH

C17

C17 10P_0402_50V8J

10P_0402_50V8J C22

1

2

14 43Tuesday, November 27, 2007

C20

C20 10P_0402_50V8J

10P_0402_50V8J

C

5

Dr-Bios.com

+3V

1 2

+3V

+RTCVCC

12

LID# LLB#

@

@ D24

D24 RB751V_SOD323

RB751V_SOD323

2 1

12

EC_LID_OUT# RI#

R340

R340 1M_0402_5%

1M_0402_5%

12

R93

49.9K_0402_1%

1 2

R464 0_0402_5% @R464 0_0402_5% @

EC_GA20(27,28)

EC_KBRST#(27,28)

EC_SCI#(27,28) EC_SMI#(27,28)

CRT_DET(19)

1 2

R78 100K_0402_5%R78 100K_0402_5%

1 2

D D

C C

R53 10K_0402_5% @R53 10K_0402_5% @

ACIN(18,27,28,37)

R542 20K_0402_1%

R542 20K_0402_1% @

@

EC_LID_OUT#(27,28)

PVT Modify 2007/03/12

Close To RAM Door

12

J1 JOPEN@J1 JOPEN@

C60

1U_0603_10V4Z

1 2

X1

1 2

1

25MHZ_20P

C34

B B

27P_0402_50V8J

2

1

2

C35

C35 27P_0402_50V8J

27P_0402_50V8J

EC_RSMRST#(27,28) MCP_PWRGD(6,18,27,28) MEM_VLD(31,40) HT_VLD(11,31) VGATE(41)

R469 10K_0402_5% @R469 10K_0402_5% @

1 2

R470 10K_0402_5% @R470 10K_0402_5% @

IDE_HRESET#(21)

EC_SWI#(27,28) EC_SMI#(27,28)

ACIN_R

R92 0_0402_5%

R92 0_0402_5% R97 0_0402_5% @R97 0_0402_5% @

MP Modify 2007/04/12

R91 0_0402_5%

1 2

R96 0_0402_5% R96 0_0402_5%

1 2

R463 0_0402_5%

CRT_DET

PBTN_OUT#(27,28)

+3V

EC_RSMRST# MEM_VLD

HT_VLD

XTALIN

XTALOUT

C503

C503 18P_0402_50V8J

18P_0402_50V8J

12

X2

2 3

32.768KHZ_12.5P_MC-306

18P_0402_50V8J

18P_0402_50V8J C504

C504

1

IN

NC

4

OUT

NC

12

4

EC_LID_OUT#

CRT_DET

IDE_HRESET# 1 2 1 2

1 2

C29

C29 1U_0603_10V4Z

1U_0603_10V4Z

1 2

R90 10K_0402_5%

XTALIN_RTC

XTAOUT_RTC

@

R334

10M_0402_5%

12

EC_GA20 EC_KBRST# SIO_PME# EXT_SMI# RI# SM_INTRUDER#

PBTN_OUT# RSTBTN#

12

R8110K_0402_5%

12

R9510K_0402_5%

1 2

R283

R283 470K_0402_5%

470K_0402_5% @

@

LID# LLB#

CRT_DET

R445 100K_0402_5%@R445 100K_0402_5%@

U23F

P6

GPIO_1/PWRDN_OK/SPI_CS1

N11

GPIO_2/NMI/PS2_CLK0

R11

GPIO_3/SMI#/PS2_DATA0

M9

GPIO_4/SCI/INTR/PS2_CLK1

M10

GPIO_5/INIT#/PS2_DATA1

M4

GPIO_12/SUS_STAT#

K7

A20GATE/GPIO_55

K6

KBRDRSTIN#/GPIO_56

M6

SIO_PME#/GPIO_31

P4

EXT_SMI#/GPIO_32

P8

RI#/GPIO33

L3

INTRUDER#

P5

LID#

N10

LLB#

R10

PWRBTN#

P9

RSTBTN#

M5

RTC_RST#

L4

PWRGD_SB

T10

PWRGD

M8

MEM_VLD

P7

MCP_VLD/HT_VLD

M3

CPU_VLD

U9

JTAG_TDI

T8

JTAG_TDO

T7

JTAG_TMS

U8

JTAG_TRST#

T9

JTAG_TCK

H4

XTALIN

H3

XTALOUT

H2

XTALIN_RTC

H1

XTALOUT_RTC

MCP67-MV_PBGA836

12

MCP67

MCP67 PAR 6 OF 8

PAR 6 OF 8

MSIC

3

+3V

SLP_S3#

SLP_RMGT#

SLP_S5#

MCP_VID0/GPIO_13 MCP_VID1/GPIO_14 MCP_VID2/GPIO_15

SPKR

SMB_CLK0

SMB_DATA0

SMB_CLK1/MSMB_CLK

SMB_DATA1/MSMB_DATA

SMB_ALERT#/GPIO_64

THERM#/GPIO_59

THERM_SIC/GPIO_48

THERM_SID0/GPIO_49

THERM_SID1/GPIO_47/PWR_LED#

FANRPM0/GPIO_60

FANCTL0/GPIO_61 FANCTL1/GPIO_62

MCPVDD_EN/HTVDD_EN

CPUVDD_EN

SPI_CS0/GPIO_10 SPI_CLK/GPIO_11

SPI_DI/GPIO_8

SPI_DO/GPIO_9

SUS_CLK/GPIO_34

BUF_SIO_CLK

TEST_MODE_EN

PKG_TEST

R3 P3 R4

H5 H6 H7

K4

E3 G3 E2 F2 F3

K5

AC14 AB14 AD12

F6 F5 F4

N3 M2

K2 K3 M7 J2

P2

J3

P11

P10

PM_SLP_S3# SLP_RMGT# PM_SLP_S5#

MCP_SPKR

SMBCLK1 SMBDATA1 M_SMBCLK M_SMBDATA SMB_ALERT#

R438 15K_0402_5%

ACIN_L

12

R71

R71 0_0402_5%

0_0402_5%

2

PM_SLP_S3# (27,28) PM_SLP_S5# (27,28)

MCP_SPKR (32)

SMBCLK1 (25,26) SMBDATA1 (25,26)

EC_THERM# (6,27,28)

1 2

D29

RB751V_SOD323

2 1

1 2

R74 10K_0402_5% @R74 10K_0402_5% @

1 2

R56 10K_0402_5% @R56 10K_0402_5% @

C16

1

10P_0402_50V8J

10P_0402_50V8J @

@

2

9/25 Added for EMI

12

R100

R100 1K_0402_1%

1K_0402_1%

SLP_RMGT# (12,22)

M_SMBDATA

CPU_SIC (6)

CPU_SID (6)

+3V

VLDT_EN (34) VR_ON (41)

1 2

R339 10K_0402_5% @R339 10K_0402_5% @

+3VS

ACIN (18,27,28,37)

PVT Modify 2007/03/23

MCP_SPKR

D

1 3

D

1 2

R65 2.7K_0402_5%

1 2

R70 2.7K_0402_5%

1 2

R34 2.7K_0402_5%

1 2

R73 2.7K_0402_5%

1 2

R60 2.7K_0402_5%

+3V

+3VS

1

+3VS

1 2

R101 10K_0402_5%

1 2

R104 10K_0402_5% @R104 10K_0402_5% @

Q10

Q10 2N7002_SOT23

2N7002_SOT23

MEM_SMBCLKM_SMBCLK

S

G

2 2

G

2N7002_SOT23

2N7002_SOT23 Q9

Q9

R543 470K_0402_5%R543 470K_0402_5%

MEM_SMBDATA

S

SMBCLK1 SMBDATA1 SMB_ALERT#

M_SMBCLK M_SMBDATA

1 2

+3VS

ACIN_L

MP Modify 2007/04/12

R540 2.2K_0402_5%

1 2

R541 2.2K_0402_5%

1 2

MEM_SMBCLK MEM_SMBDATA

MEM_SMBCLK (8,9)

MEM_SMBDATA (8,9)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

3

Compal Secret Data

Deciphered Date

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

2

Date: Sheet of

15 43Tuesday, November 27, 2007

1

C

5

Dr-Bios.com

D D

+3VS+3V

C107

0.1U_0402_16V4Z

1

12

R77

R77 0_0603_5%

0_0603_5%

1

2 C41

C41

0.1U_0402_16V4Z

C C

0.1U_0402_16V4Z

1

2 C102

C102

0.1U_0402_16V4Z

C45

0.1U_0402_16V4Z

1

2

C48

0.1U_0402_16V4Z

1

2

C110

0.1U_0402_16V4Z

RTC Battery

-+

BATT1

Update Footprint

ML1220T13RE

ML1220T13RE 45@

45@

PVT Modify 2007/03/22

B B

MCP67-MV POWER STATES

Power Signal S1

A A

5

S3

S0

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

S4/S5

OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF

G3

OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFFON ON OFF OFF

+RTCBATT +1.2V_PED

12

+RTCVCC

1

C519

4.7U_0805_10V4Z

2

1

2 C47

C47

0.1U_0402_16V4Z

+RTCVCC

+RTCBATT

12

R539

R539 1K_0402_1%

1K_0402_1%

1

3

1

C520

0.1U_0402_16V4Z

2

4

C39

0.01U_0402_16V7K

1

2

D22

D22 BAS40-04_SOT23-3

BAS40-04_SOT23-3

2

4

+3.3V_DUAL1

C506

0.1U_0402_16V4Z

+CHGRTC

1

2

AE32

AE18 AB25 AB27

AE11

AC12

AB19 AB12

AM31

AM32 AG11

AD27 AD11

U23G

V15

+1.2V_RBB1

V16

+1.2V_RBB2

W16

+1.2V_RBB3

W15

+1.2V_RBB4

AJ9

+3.3V1

AG9

+3.3V2

F11

+3.3V3

H11

+3.3V4

L6

+3.3V_DUAL1

L8

+3.3V_DUAL2

N2

+3.3V_VBAT

AD9

GND

AH6

GND GND

Y32

GND

AD8

GND

M32

GND GND GND GND

U15

GND GND

V27

GND

R27

GND

N27

GND

G27

GND

Y14

GND

F15

GND

V29

GND GND GND

AM9

GND GND

AM8

GND

AF8

GND

AH4

GND

E27

GND GND

F22

GND

AF4

GND GND GND

L15

GND GND

P22

GND GND

V11

GND

L23

GND

P15

GND

MCP67-MV_PBGA836

3

C152

C152 10U_0805_10V4Z

10U_0805_10V4Z

1

MCP67

MCP67 PART 7 OF 8

PART 7 OF 8

POWER

+1.2V_PED1 +1.2V_PED2 +1.2V_PED3 +1.2V_PED4 +1.2V_PED5

+1.2V_PEA1 +1.2V_PEA2 +1.2V_PEA3 +1.2V_PEA4 +1.2V_PEA5 +1.2V_PEA6 +1.2V_PEA7 +1.2V_PEA8

+1.2V_SP_D1 +1.2V_SP_D2 +1.2V_SP_D3 +1.2V_SP_D4

+1.2V_SP_A1 +1.2V_SP_A2 +1.2V_SP_A3 +1.2V_SP_A4 +1.2V_SP_A5

+1.2V_DUAL1 +1.2V_DUAL2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

+1.2V1 +1.2V10 +1.2V11 +1.2V12 +1.2V13 +1.2V14 +1.2V15 +1.2V16 +1.2V17 +1.2V18 +1.2V19

+1.2V2 +1.2V20 +1.2V21 +1.2V22 +1.2V23 +1.2V24 +1.2V25 +1.2V26 +1.2V27 +1.2V28 +1.2V29

+1.2V3

+1.2V4

+1.2V5

+1.2V6

+1.2V7

+1.2V8

+1.2V9

+1.2V_HT1 +1.2V_HT2 +1.2V_HT3

AA22 V19 W20 Y20 Y19 V17 AB21 AA23 Y30 U17 U18 Y31 W17 Y18 U16 AA24 V18 AA25 AA26 AB22 W18 AB23 AA27 AA28 AA29 W19 AA30 AA31 V20

Y15 Y17 Y16

V23 W25 W24 V22 W26

Y22 Y23 Y27 Y29 Y25 W22 W23 Y24

AE8 AE7 AE9 AE6

AB11 AB10 AD10 AC10 AE10

N16 N17

Compal Secret Data

2

C526

C526 150U_D2_6.3VM

150U_D2_6.3VM 1

1

+

2

C151

C151 22U_0805_6.3V6M

22U_0805_6.3V6M

C106

0.1U_0402_16V4Z

0.1U_0402_16V4Z +1.2V_HT1

1

2

+1.2V_PEA

1

2

+1.2V_SP_D

C68

C68 1

0.01U_0402_16V7K

2

+1.2V_SP_A

C75

C75 1

1

0.1U_0402_16V4Z

2

2 C64

C64

0.1U_0402_16V4Z

Deciphered Date

1

2

C525

4.7U_0805_10V4Z

4.7U_0805_10V4Z C147

C147

4.7U_0805_10V4Z

1

2

+1.2V_HT

12

R102

R102 0_0603_5%

0_0603_5%

C67

1

1U_0402_6.3V4Z

2

C117

0.1U_0402_16V4Z

1

2 C123

C123

0.1U_0402_16V4Z

1

2 C62

C62

0.1U_0402_16V4Z

C518

C518 1

4.7U_0805_10V4Z

2

C527

4.7U_0805_10V4Z

1

2

C74

0.1U_0402_16V4Z

0.1U_0402_16V4Z C125

C125

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

2

C159

4.7U_0805_10V4Z

C121

0.1U_0402_16V4Z

1

2

C128

0.1U_0402_16V4Z

1

2

2 C126

C126 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C111

1

10U_0805_10V4Z

2

2 C116

C116 10U_0805_10V4Z

10U_0805_10V4Z

L12 MBK2012121YZF_0805L12 MBK2012121YZF_0805

1 2

1

2

C516

4.7U_0805_10V4Z

1

C114

C73

0.1U_0402_16V4Z

1

2

1

2

C130

0.1U_0402_16V4Z

1

2 C112

C112

0.1U_0402_16V4Z

C100

0.1U_0402_16V4Z

1

2

C108

0.1U_0402_16V4Z

0.1U_0402_16V4Z C132

C132

0.1U_0402_16V4Z

1

2

C135

0.1U_0402_16V4Z

+1.2VS

C124

0.1U_0402_16V4Z

1

2

C156

4.7U_0805_10V4Z

1

2

2 C157

C157 22U_0805_6.3V6M

22U_0805_6.3V6M

+1.2VS

Title

Size Document Number Rev

Custom

Date: Sheet of

C71

C71 1

0.1U_0402_16V4Z

2

C59

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

2

SCHEMATIC, M/B LA-3581P

401474

C114

0.1U_0402_16V4Z

1

2

C109

0.1U_0402_16V4Z

0.1U_0402_16V4Z C131

C131

0.1U_0402_16V4Z

1

2

+1.2VS

C189

C189 10U_0805_10V4Z

10U_0805_10V4Z 1

2

1

2 C72

C72

0.1U_0402_16V4Z

+1.2VALW

1

2

C120

0.1U_0402_16V4Z

1

2

C139

0.1U_0402_16V4Z

1

+

2

12

L17

L17 KC FBM-L11-201209-221LMAT_0805

KC FBM-L11-201209-221LMAT_0805

1

2 C162

C162 10U_0805_10V4Z

10U_0805_10V4Z

C119

C119 1

10U_0805_10V4Z

2

C56

0.1U_0402_16V4Z

1

2

1

+1.2VS

C134

0.1U_0402_16V4Z

1

2

C144

0.1U_0402_16V4Z

C529

C529 150U_D2_6.3VM

150U_D2_6.3VM @

@

+1.2VS

12

R110

R110 0_0805_5%

0_0805_5%

1

2 C118

C118

4.7U_0805_10V4Z

16 43Tuesday, November 27, 2007

C

5

Dr-Bios.com

U23H

AB9

WUSB_VREF

AC6

D D

C C

B B

WUSB_CCA_STATUS

AC8

WUSB_SERIAL_DATA

AA8

WUSB_PHY_RESET*

AD3

WUSB_TX_EN

AD4

WUSB_RX_EN

AA9

WUSB_PHY_ACTIVE

AC5

WUSB_STOPC

AC9

WUSB_VDD

L11

GND

V8

GND

H13

GND

N6

GND

AA1

GND

AD13

GND

K23

GND

AM16

GND

AH1

GND

U13

GND

R6

GND

R8

GND

M1

GND

N1

GND

U1

GND

J1

GND

J4

GND

J6

GND

Y13

GND

AE1

GND

Y6

GND

A5

GND

A12

GND

N8

GND

E6

GND

AC11

GND

H15

GND

T17

GND

J21

GND

D18

GND

A20

GND

N4

GND

G6

GND

AG22

GND

P16

GND

T19

GND

AE24

GND

AJ26

GND

AJ24

GND

U32

GND

T20

GND

AM24

GND

AF29

GND

AJ13

GND

AA32

GND

AG13

GND

AE15

GND

F13

GND

AF6

GND

AB4

GND

AG15

GND

E25

GND

AM17

GND

R15

GND

A17

GND

AG24

GND

N20

GND

N24

GND

AM1

GND

AM21

GND

A21

GND

V25

GND

AJ3

GND

L25

GND

P17

GND

H18

GND

L24

GND

AM5

GND

U14

GND

AC16

GND

U10

GND

N29

GND

AM2

GND

AM3

GND

MCP67-MV_PBGA836

MCP67

MCP67 PAR 8 OF 8

PAR 8 OF 8

WUSB_DATA_EN

GROUND

WUSB_PCLK

WUSB_DATA7 WUSB_DATA6 WUSB_DATA5 WUSB_DATA4 WUSB_DATA3 WUSB_DATA2 WUSB_DATA1 WUSB_DATA0

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

4

AC7 AB8 V9 W11 W10 W9 Y11 Y10 AA11 AA10

R18 H9 R17 A1 D9 AG26 G4 AB6 J25 R25 T16 T15 J29 W14 AD6 AB24 AM13 R16 V6 A13 N32 AM25 F9 N9 AL31 G25 AB18 AH32 D13 N25 A25 R9 R14 AF27 AH8 A32 P14 E29 E32 V10 J23 N14 AB29 E4 AE13 L27 J27 A9 J32 AE20 AJ22 AG18 AG20 V14 F18 F20 D20 E1 V4 J8 F7 T18 J24 A31 Y1 T13 D22 Y4 P18 AJ18 AE22 R24 N19 T14

3

2

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

1

C

17 43Tuesday, November 27, 2007

C

5

Dr-Bios.com

4

3

2

1

1 2

R125

R125 0_0402_5%

1

2

MXM_THERM#(27,28)

0_0402_5% VGA@

VGA@

2

C182

0.1U_0402_16V4Z

0.1U_0402_16V4Z VGA@

VGA@

1

1 2

R122

R122 0_0402_5% @

0_0402_5% @

1

C524

0.1U_0402_16V4Z

2

VGA@

1 2

R515

R515 0_0402_5%@

0_0402_5%@

PCIE_MTX_C_GRX_N[0..15](11) PCIE_MTX_C_GRX_P[0..15](11)

D D

PCIE_GTX_C_MRX_N[0..15](11) PCIE_GTX_C_MRX_P[0..15](11)

L18

L18 KC FBM-L11-201209-221LMAT_0805

KC FBM-L11-201209-221LMAT_0805

VGA@

1 2

B+

VGA@

1 2

9/25 Added for EMI

L21

L21 KC FBM-L11-201209-221LMAT_0805

KC FBM-L11-201209-221LMAT_0805

PCIE_GTX_C_MRX_N15

C C

B B

A A

PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N14

PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N13

PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N12

PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N11

PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N10

PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N9

PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N8

PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N7

PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N6

PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N5

PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N4

PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N3

PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N2

PCIE_GTX_C_MRX_P2

B+ B+

12

C651

C651 10U_1206_25V6M

10U_1206_25V6M VGA@

VGA@

C652

C652 10U_1206_25V6M

10U_1206_25V6M

12

@

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

JP19A

1

PWR_SRC

3

PWR_SRC

5

PWR_SRC

7

PWR_SRC

9

PWR_SRC

11

PWR_SRC

13

PWR_SRC

15

PWR_SRC

17

GND

19

GND

21

GND

23

GND

25

PEX_RX15#

27

PEX_RX15

29

GND

31

PEX_RX14#

33

PEX_RX14

35

GND

37

PEX_RX13#

39

PEX_RX13

41

GND

43

PEX_RX12#

45

PEX_RX12

47

GND

49

PEX_RX11#

51

PEX_RX11

53

GND

55

PEX_RX10#

57

PEX_RX10

59

GND

61

PEX_RX9#

63

PEX_RX9

65

GND

67

PEX_RX8#

69

PEX_RX8

71

GND

73

PEX_RX7#

75

PEX_RX7

77

GND

79

PEX_RX6#

81

PEX_RX6

83

GND

85

PEX_RX5#

87

PEX_RX5

89

GND

91

PEX_RX4#

93

PEX_RX4

95

GND

97

PEX_RX3#

99

PEX_RX3

101

GND

103

PEX_RX2#

105

PEX_RX2

107

GND

ACES_88990-2D08

VGA@

12

C206

0.1U_0603_25V7K

0.1U_0603_25V7K VGA@

VGA@

RUNPWROK

PEX_TX15#

PEX_TX14#

PEX_TX13#

PEX_TX12#

PEX_TX11#

PEX_TX10#

+1.8VS +3VS +2.5VS +5VSB+

1

C150

4.7U_0805_10V4Z

2

VGA@

1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN 1V8RUN

5VRUN

GND GND GND

PRSNT2#

PEX_TX15

GND

PEX_TX14

GND

PEX_TX13

GND

PEX_TX12

GND

PEX_TX11

GND

PEX_TX10

GND

PEX_TX9#

PEX_TX9

GND

PEX_TX8#

PEX_TX8

GND

PEX_TX7#

PEX_TX7

GND

PEX_TX6#

PEX_TX6

GND

PEX_TX5#

PEX_TX5

GND

PEX_TX4#

PEX_TX4

GND

PEX_TX3#

PEX_TX3

GND

PEX_TX2#

PEX_TX2

1

C142

0.1U_0402_16V4Z

2

VGA@

2 4 6 8 10 12 14 16 18 20 22 24

26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108

+1.8VS

+5VS

PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14

PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P13

PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12

PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P11

PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P10

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2

C522

4.7U_0805_10V4Z

4.7U_0805_10V4Z VGA@

VGA@

MCP_PWRGD (6,15,27,28)

VGA_ON (27)

CLK_PCIE_VGA#(11)

CLK_PCIE_VGA(11)

PCIE_RST#(11,26)

VGA_CRT_HSYNC(19) VGA_CRT_VSYNC(19)

VGA_DDC_CLK(19)

VGA_DDC_DATA(19)

ACIN(15,27,28,37)

DVI_DET(20)

VGA_DVI_TXC-(20)

VGA_DVI_TXC+(20)

VGA_DVI_TXD2-(20)

VGA_DVI_TXD2+(20)

VGA_DVI_TXD1-(20)

VGA_DVI_TXD1+(20)

VGA_DVI_TXD0-(20)

VGA_DVI_TXD0+(20)

1

C523

0.1U_0402_16V4Z

2

VGA@

PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1

PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P0

CLK_PCIE_VGA# CLK_PCIE_VGA

D_EC_SMB_DA1 D_EC_SMB_CK1 MXM_THERM_R VGA_CRT_HSYNC VGA_CRT_VSYNC VGA_DDC_CLK VGA_DDC_DATA

1 2

R516

R516 0_0402_5%

0_0402_5% @

@

DVI_DET VGA_DVI_TXCVGA_DVI_TXC+

VGA_DVI_TXD2VGA_DVI_TXD2+

VGA_DVI_TXD1VGA_DVI_TXD1+

VGA_DVI_TXD0VGA_DVI_TXD0+

1

C146

0.1U_0402_16V4Z

2

VGA@

JP19B

109

PEX_RX1#

111

PEX_RX1

113

GND

115

PEX_RX0#

117

PEX_RX0

119

GND

121

PEX_REFCLK#

123

PEX_REFCLK

125

CLK_REQ#

127

PEX_RST#

129

RSVD

131

RSVD

133

SMB_DAT

135

SMB_CLK

137

THERM#

139

VGA_HSYNC

141

VGA_VSYNC

143

DDCA_CLK

145

DDCA_DAT

147

IGP_UCLK#

149

IGP_UCLK

151

GND

153

RSVD

155

RSVD

157

RSVD

159

IGP_UTX2#

161

IGP_UTX2

163

GND

165

IGP_UTX1#

167

IGP_UTX1

169

GND

171

IGP_UTX0#

173

IGP_UTX0

175

GND

177

IGP_LCLK#/DVI_B_CLK#

179

IGP_LCLK/DVI_B_CLK

181

DVI_B_HPD/GND

183

RSVD

185

RSVD

187

GND

189

IGP_LTX2#/DVI_B_TX2#

191

IGP_LTX2/DVI_B_TX2

193

GND

195

IGP_LTX1#/DVI_B_TX1#

197

IGP_LTX1/DVI_B_TX1

199

GND

201

IGP_LTX0#/DVI_B_TX0#

203

IGP_LTX0/DVI_B_TX0

205

DVI_A_HPD

207

DVI_A_CLK#

209

DVI_A_CLK

211

GND

213

DVI_A_TX2#

215

DVI_A_TX2

217

GND

219

DVI_A_TX1#

221

DVI_A_TX1

223

GND

225

DVI_A_TX0#

227

DVI_A_TX0

229

GND

ACES_88990-2D08

VGA@

PVT Modify 2007/03/22

GND

PEX_TX1#

PEX_TX1

GND

PEX_TX0#

PEX_TX0

PRSNT1#

TV_C/HDTV_Pr

GND

TV_Y/HDTV_Y

TV_CVBS/HDTV_Pb

GND GND

VGA_RED

GND

VGA_GRN

GND

VGA_BLU

GND

LVDS_UCLK#

LVDS_UCLK

GND

LVDS_UTX3#

LVDS_UTX3

GND

LVDS_UTX2#

LVDS_UTX2

GND

LVDS_UTX1#

LVDS_UTX1

GND

LVDS_UTX0#

LVDS_UTX0

GND

LVDS_LCLK#

LVDS_LCLK

GND

LVDS_LTX3#

LVDS_LTX3

GND

LVDS_LTX2#

LVDS_LTX2

GND

LVDS_LTX1#

LVDS_LTX1

GND

LVDS_LTX0#

LVDS_LTX0

GND DDCC_DAT DDCC_CLK

LVDS_PPEN

LVDS_BL_BRGHT

LVDS_BLEN

DDCB_DAT DDCB_CLK

2V5RUN

GND

3V3RUN 3V3RUN 3V3RUN

EC_SMB_DA1(27,28,29,37)

EC_SMB_CK1(27,28,29,37)

110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230

PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P0

PE_PRSNTX16# VGA_TV_CRMA

VGA_TV_LUMA VGA_TV_COMPS VGA_CRT_R VGA_CRT_G VGA_CRT_B VGA_TZCLK-

VGA_TZCLK+

VGA_TZOUT2VGA_TZOUT2+

VGA_TZOUT1VGA_TZOUT1+

VGA_TZOUT0VGA_TZOUT0+

VGA_TXCLKVGA_TXCLK+

VGA_TXOUT2VGA_TXOUT2+

VGA_TXOUT1VGA_TXOUT1+

VGA_TXOUT0VGA_TXOUT0+

I2CC_SDA I2CC_SCL ENVDD

ENBKL VGA_DVI_SDATA VGA_DVI_SCLK

+2.5VS

+3VS

2

G

1 3

D

S

D

S

Q54

Q54 2N7002_SOT23VGA@

2N7002_SOT23VGA@

1 3

D

VGA@

D_EC_SMB_DA1

2

G

D_EC_SMB_CK1

S

Q55

2N7002_SOT23

PE_PRSNTX16# (11) VGA_TV_CRMA (19)

VGA_TV_LUMA (19)

VGA_TV_COMPS (19) VGA_CRT_R (19) VGA_CRT_G (19) VGA_CRT_B (19) VGA_TZCLK- (20)

VGA_TZCLK+ (20)

VGA_TZOUT2- (20) VGA_TZOUT2+ (20)

VGA_TZOUT1- (20) VGA_TZOUT1+ (20)

VGA_TZOUT0- (20) VGA_TZOUT0+ (20)

VGA_TXCLK- (20) VGA_TXCLK+ (20)

VGA_TXOUT2- (20) VGA_TXOUT2+ (20)

VGA_TXOUT1- (20) VGA_TXOUT1+ (20)

VGA_TXOUT0- (20) VGA_TXOUT0+ (20)

I2CC_SDA (20) I2CC_SCL (20)

ENVDD (20)

ENBKL (12,27,28) VGA_DVI_SDATA (20) VGA_DVI_SCLK (20)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

1

18 43Tuesday, November 27, 2007

C

A

Dr-Bios.com

B

C

D

E

D1

2 1

RB411D_SOT23

+3VS

R11

R11 UMA@

UMA@ R12

R12 0_0402_5%VGA@

0_0402_5%VGA@

12

R3 0_0402_5%VGA@R30_0402_5%VGA@

+3VS

W=40mils

1

2

12

R4

4.7K_0402_5%

4.7K_0402_5% UMA@

UMA@

1 2

F1

21

1.1A_6VDC_FUSE

C3

0.1U_0402_16V4Z

C2

C2 470P_0402_50V7K

470P_0402_50V7K

1

C4

C4 470P_0402_50V7K

470P_0402_50V7K

2

VGA_DDC_DATA (18)

UMA_CRT_DATA (12)

UMA_CRT_CLK (12)

VGA_DDC_CLK (18)

W=40mils

1

2

SUYIN_070549FR015S208CR

DSUB_12

DSUB_15

1

C1

C1 470P_0402_50V7K

470P_0402_50V7K

2

+CRT_VCC+R_CRT_VCC

JP14

6

11

1 7

12

2 8

13

3 9

14

4

10

16

15

17

5

CRT_DET (15)

CRT Connector

1 1

R14 0_0402_5%VGA@R14 0_0402_5%VGA@

VGA_CRT_R(18) UMA_CRT_R(12)

VGA_CRT_G(18) UMA_CRT_G(12)

VGA_CRT_B(18) UMA_CRT_B(12)

2 2

1 2

1 2 R10 0_0402_5%UMA@R10 0_0402_5%UMA@ R9 0_0402_5%VGA@R9 0_0402_5%VGA@

1 2

1 2 R8 0_0402_5%UMA@R8 0_0402_5%UMA@ R6 0_0402_5%VGA@R6 0_0402_5%VGA@

1 2

1 2 R5 0_0402_5%UMA@R5 0_0402_5%UMA@

TV-OUT Conn.

3 3

VGA_TV_LUMA(18)

UMA_TV_LUMA(12) VGA_TV_CRMA(18) UMA_TV_CRMA(12)

VGA_TV_COMPS(18)

UMA_TV_COMPS(12)

Place closed to chipset

1 2

R76 0_0402_5%VGA@R76 0_0402_5%VGA@

1 2

R391 0_0402_5%UMA&TV@R391 0_0402_5%UMA&TV@

1 2

R75 0_0402_5%VGA@R75 0_0402_5%VGA@

1 2

R393 0_0402_5%UMA&TV@R393 0_0402_5%UMA&TV@

1 2

R83 0_0402_5%VGA@R83 0_0402_5%VGA@

1 2

R392 0_0402_5%UMA&TV@R392 0_0402_5%UMA&TV@

Place closed to chipset

R304

150_0402_1%

VGA_CRT_HSYNC(18) UMA_CRT_HSYNC(12)

12

R202

R202 TV@

TV@

150_0402_1%

12

R214

R214 TV@

TV@

150_0402_1%

12

R220

R220 TV@

TV@

12

R303

150_0402_1%

TV_LUMA

TV_CRMA

TV_COMPS

CRT_R

CRT_G

CRT_B

12

R302

150_0402_1%

VGA_CRT_VSYNC(18) UMA_CRT_VSYNC(12)

C317

C317 82P_0402_50V8J

82P_0402_50V8J

1

TV@

2

C499

C499 10P_0402_50V8J

10P_0402_50V8J

12

1

2

1 2

R301 0_0402_5%VGA@R301 0_0402_5%VGA@

1 2

R300 39_0402_5%UMA@R300 39_0402_5%UMA@

C492 0.1U_0402_16V4Z

Place closed to chipset

1 2

L33 FCM1608C-121T_0603TV@L33 FCM1608C-121T_0603TV@

1 2

L31 FCM1608C-121T_0603TV@L31 FCM1608C-121T_0603TV@

1 2

L29 FCM1608C-121T_0603TV@L29 FCM1608C-121T_0603TV@ C346

C346 82P_0402_50V8J

82P_0402_50V8J

1

TV@

2

C335

C335 82P_0402_50V8J

82P_0402_50V8J

1 2

L42 FCM2012C-800_0805L42 FCM2012C-800_0805

1 2

L41 FCM2012C-800_0805

1 2

C494

C494 10P_0402_50V8J

10P_0402_50V8J

1

2

C497

C497 10P_0402_50V8J

10P_0402_50V8J

1 2

CRT_HSYNC CRT_HSYNC_1

1 2

R298 0_0402_5%VGA@R298 0_0402_5%VGA@

1 2

R299 39_0402_5%UMA@R299 39_0402_5%UMA@

+3VS

+CRT_VCC

1

5

P

A2Y

G

SN74AHCT1G125DCKR_SC70-5

3

1 2

C490 0.1U_0402_16V4Z

D6

D6 <BOM Structure>

<BOM Structure> DAN217_SC59

DAN217_SC59

1

2

3

C301

C301 82P_0402_50V8J

82P_0402_50V8J

1

TV@

2

L40 FCM2012C-800_0805L40 FCM2012C-800_0805

R297 10K_0402_5%

U22

4

OE#

+CRT_VCC

CRT_VSYNC CRT_VSYNC_1

D9

D9 DAN217_SC59

DAN217_SC59

1

2

3

1

2

C323

C323 82P_0402_50V8J

82P_0402_50V8J TV@

TV@

R297 10K_0402_5%

1

5

U21

P

OE#

A2Y

G

SN74AHCT1G125DCKR_SC70-5

3

D10

D10 DAN217_SC59

DAN217_SC59

1

2

3

TV_CRMA_1 TV_COMPS_1

TV_LUMA_1

C337

C337 82P_0402_50V8J

82P_0402_50V8J

1

TV@

2

CRT_R_1

CRT_G_1

CRT_B_1

12

4

3 6 7 5 2 4 1 8 9

D15

D15 DAN217_SC59

DAN217_SC59

+3VS

1

C498

C498 10P_0402_50V8J

10P_0402_50V8J

2

+CRT_VCC

R7

4.7K_0402_5%

DSUB_12

DSUB_15

JP24

SUYIN_030107FR007SX08FU

SUYIN_030107FR007SX08FU TV@

TV@

D14

D14 DAN217_SC59

DAN217_SC59

1

2

C496

C496 10P_0402_50V8J

10P_0402_50V8J

2

3

1

2

1 2

L39 FCM1608C-121T_0603

1 2

L38 FCM1608C-121T_0603L38 FCM1608C-121T_0603

10P_0402_50V8K

Place closed to chipset

12

R1

4.7K_0402_5%

Q2

Q2 2N7002_SOT23

2N7002_SOT23

D13

D13 DAN217_SC59

DAN217_SC59

1

3

1

C495

C495 10P_0402_50V8J

10P_0402_50V8J

2

C493

+3VS

2

G

1 3

D

S

D

S

1 3

D

Q1

Q1 2N7002_SOT23

2N7002_SOT23

1

2

3

CRT_HSYNC_2

CRT_VSYNC_2

1

2

G

S

+5VS

1

C491

C491 10P_0402_50V8K

10P_0402_50V8K

2

4.7K_0402_5%

1 2

R13 0_0402_5%UMA@R13 0_0402_5%UMA@

R2

0_0402_5%UMA@R20_0402_5%UMA@

1 2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

E

C

19 43Tuesday, November 27, 2007

C

5

Dr-Bios.com

LCD POWER CIRCUIT

+LCDVDD

12

R17

D D

R308 0_0402_5%

UMA_ENVDD(12)

ENVDD(18)

C C

R308 0_0402_5% R309 0_0402_5%

R309 0_0402_5%

300_0402_5%

2N7002_SOT23

1 2 1 2

R17

Q4

BKOFF#(27,28)

UMA@

UMA@ VGA@

VGA@

100K_0402_5%

13

D

S

R310

+3VALW

12

R19

R19 100K_0402_5%

100K_0402_5%

2

G

2

G

12

BKOFF# DISPOFF#

13

D

Q39

Q39 2N7002_SOT23

2N7002_SOT23

S

R18 1K_0402_5% R18 1K_0402_5%

12

R513

R513 1K_0402_5%

1K_0402_5% @

@

21

Update Footprint

LCD/PANEL BD. Conn.

JP1

GND42GND

B+

40

38

36

34

32

30

28

26

24

22

20

18

16

14

12

10

8

6

4

2

ACES_88242-4001

+3VS

1

C9

0.1U_0402_16V4Z

2

+INVPWR_B+

+3VS

3

2

I2CC_SCL

I2CC_SDA

TZOUT0TZOUT0+

TZOUT1+ TZOUT1-

TZOUT2+ TZOUT2-

TZCLKTZCLK+

USB20_CMOS_N4 USB20_CMOS_P4

USB20_CMOS_P4

USB20_CMOS_N4

I2CC_SCL(18) I2CC_SDA(18)

@

@ 0_0402_5%

B B

USB20_N4(14) USB20_P4(14)

USB20_P4

USB20_N4

0_0402_5% R305

R305

1 2

R306

1 2

0_0402_5%

0_0402_5% @

@

L3

4

1

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805 CMOS@

CMOS@

9/25 Added for EMI

+INVPWR_B+

L1

KC FBM-L11-201209-221LMAT_0805

L2

KC FBM-L11-201209-221LMAT_0805

A A

1

C6

680P_0603_50V7K

2

1

C5

C5 68P_0402_50V8K

68P_0402_50V8K

2

12

4

12

1

C14

0.047U_0402_16V7K

0.047U_0402_16V7K 2

+3VS

D16

D16 RB751V_SOD323

RB751V_SOD323

41 39

39

37

35

33

31

29

27

25

23

21

19

17

15

13

11

9

7

5

3

1

Fro CMOS Cemera

DAC_BRIG INVTPWM DISPOFF#

+LCDVDD

G

2

12

R307

4.7K_0402_5%

DAC_BRIG DISPOFF#

(60 MIL)

TXOUT0TXOUT0+

TXOUT1TXOUT1+

TXOUT2+ TXOUT2-

TXCLKTXCLK+

C7 220P_0402_50V7K@C7 220P_0402_50V7K@ C11 220P_0402_50V7K@C11 220P_0402_50V7K@ C8 220P_0402_50V7K@C8 220P_0402_50V7K@

1

C12

C12 10U_0805_10V4Z

10U_0805_10V4Z

2

+3VS

W=60mils

S

Q3

Q3 AO3413_SOT23-3

AO3413_SOT23-3

D

1 3

+LCDVDD

1

C500

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

DAC_BRIG (27,28)

R15 0_0402_5%R15 0_0402_5% R16 0_0402_5%@R16 0_0402_5%@

L4

KC FBM-L11-201209-221LMAT_0805

+3VS

1 2 1 2 1 2

1

C13

0.1U_0402_16V4Z

2

1

C10

4.7U_0805_10V4Z

2

W=60mils

1

C501

0.1U_0402_16V4Z

2

1 2 1 2

12

9/25 Added for EMI

INVT_PWMINVTPWM

+LCDVDD

VGA_DVI_TXD1+(18) VGA_DVI_TXD1-(18)

3

INVT_PWM (27,28) DPST_PWM (12,27,28)

VGA_DVI_TXD0-(18) VGA_DVI_TXD0+(18)

RP37 0_0404_4P2R_5%DVI@RP37 0_0404_4P2R_5%DVI@

VGA_DVI_TXD2-(18) VGA_DVI_TXD2+(18)

VGA_DVI_TXC+(18) VGA_DVI_TXC-(18)

TXOUT0TXOUT0+

TXOUT1TXOUT1+

TXOUT2TXOUT2+

TXCLKTXCLK+

TZOUT0TZOUT0+

TZOUT1TZOUT1+

TZOUT2TZOUT2+

TZCLKTZCLK+

I2CC_SDA TXOUT0+

TXOUT0TXOUT1+

TXOUT1TXOUT2+

TXOUT2TXCLK+

TXCLKTZOUT0+

TZOUT0TZOUT1+

TZOUT1TZOUT2+

TZOUT2TZCLK+

TZCLK-

1 4 2 3

RP40 0_0404_4P2R_5%VGA@RP40 0_0404_4P2R_5%VGA@

1 4 2 3

RP52 0_0404_4P2R_5%VGA@RP52 0_0404_4P2R_5%VGA@

1 4 2 3

RP42 0_0404_4P2R_5%VGA@RP42 0_0404_4P2R_5%VGA@

1 4 2 3

RP44 0_0404_4P2R_5%VGA@RP44 0_0404_4P2R_5%VGA@

1 4 2 3

RP54 0_0404_4P2R_5%VGA@RP54 0_0404_4P2R_5%VGA@

1 4 2 3

RP46 0_0404_4P2R_5%VGA@RP46 0_0404_4P2R_5%VGA@

1 4 2 3

RP48 0_0404_4P2R_5%VGA@RP48 0_0404_4P2R_5%VGA@

1 4 2 3

RP50 0_0404_4P2R_5%VGA@RP50 0_0404_4P2R_5%VGA@

1 4 2 3

RP56 0_0404_4P2R_5%UMA@RP56 0_0404_4P2R_5%UMA@

1 4 2 3

RP41 0_0404_4P2R_5%UMA@RP41 0_0404_4P2R_5%UMA@

1 4 2 3

RP53 0_0404_4P2R_5%UMA@RP53 0_0404_4P2R_5%UMA@

1 4 2 3

RP43 0_0404_4P2R_5%UMA@RP43 0_0404_4P2R_5%UMA@

1 4 2 3

RP45 0_0404_4P2R_5%UMA@RP45 0_0404_4P2R_5%UMA@

1 4 2 3

RP55 0_0404_4P2R_5%UMA@RP55 0_0404_4P2R_5%UMA@

1 4 2 3

RP47 0_0404_4P2R_5%UMA@RP47 0_0404_4P2R_5%UMA@

1 4 2 3

RP49 0_0404_4P2R_5%UMA@RP49 0_0404_4P2R_5%UMA@

1 4 2 3

RP51 0_0404_4P2R_5%UMA@RP51 0_0404_4P2R_5%UMA@

1 4 2 3

RP36 0_0404_4P2R_5%DVI@RP36 0_0404_4P2R_5%DVI@

DVI_TXD1+

DVI_TXD1- DVI_TXD1+

1 4 2 3

RP38 0_0404_4P2R_5%DVI@RP38 0_0404_4P2R_5%DVI@

1 4 2 3

RP39 0_0404_4P2R_5%DVI@RP39 0_0404_4P2R_5%DVI@

DVI_TXD0DVI_TXD0+

DVI_TXD1-

DVI_TXD2DVI_TXD2+

DVI_TXC+ DVI_TXC-

2

VGA_TXOUT0VGA_TXOUT0+

VGA_TXOUT1VGA_TXOUT1+

VGA_TXOUT2VGA_TXOUT2+

VGA_TXCLKVGA_TXCLK+

VGA_TZOUT0VGA_TZOUT0+

VGA_TZOUT1VGA_TZOUT1+

VGA_TZOUT2VGA_TZOUT2+

VGA_TZCLKVGA_TZCLK+

UMA_LCD_CLKI2CC_SCL UMA_LCD_DATA

UMA_TXOUT0+ UMA_TXOUT0-

UMA_TXOUT1+ UMA_TXOUT1-

UMA_TXOUT2+ UMA_TXOUT2-

UMA_TXCLK+ UMA_TXCLK-

UMA_TZOUT0+ UMA_TZOUT0-

UMA_TZOUT1+ UMA_TZOUT1-

UMA_TZOUT2+ UMA_TZOUT2-

UMA_TZCLK+ UMA_TZCLK-

DVI-D Connector

JP15

17

TMDS_DATA0-

18

TMDS_DATA0+

9

TMDS_DATA1-

10

TMDS_DATA1+

1

TMDS_DATA2-

2

TMDS_DATA2+

12

TMDS_DATA3-

13

TMDS_DATA3+

4

TMDS_DATA4-

5

TMDS_DATA4+

20

TMDS_DATA5-

21

TMDS_DATA5+

23

TMDS_Clock+

24

TMDS_Clock-

25

Shield

26

Shield

27

Shield

28

Shield

31

Shield

32

Shield

8

Analog VSYNC

SUYIN_070939FR024S531PL

SUYIN_070939FR024S531PL DVI@

DVI@

(HDQ70)

DDC_CLOCK

DDC_DATA

Hot Plug Detect

TMDS_DATA2/4 shield TMDS_DATA1/3 shield TMDS_DATA0/5 shield

TMDS_Clock shield

VGA_TXOUT0- (18) VGA_TXOUT0+ (18)

VGA_TXOUT1- (18) VGA_TXOUT1+ (18)

VGA_TXOUT2- (18) VGA_TXOUT2+ (18)

VGA_TXCLK- (18) VGA_TXCLK+ (18)

VGA_TZOUT0- (18) VGA_TZOUT0+ (18)

VGA_TZOUT1- (18) VGA_TZOUT1+ (18)

VGA_TZOUT2- (18) VGA_TZOUT2+ (18)

VGA_TZCLK- (18) VGA_TZCLK+ (18)

UMA_LCD_CLK (12) UMA_LCD_DATA (12)

UMA_TXOUT0+ (12) UMA_TXOUT0- (12)

UMA_TXOUT1+ (12) UMA_TXOUT1- (12)

UMA_TXOUT2+ (12) UMA_TXOUT2- (12)

UMA_TXCLK+ (12) UMA_TXCLK- (12)

UMA_TZOUT0+ (12)

UMA_TZOUT0- (12)

UMA_TZOUT1+ (12)

UMA_TZOUT1- (12)

UMA_TZOUT2+ (12)

UMA_TZOUT2- (12)

UMA_TZCLK+ (12)

UMA_TZCLK- (12)

10/2 SWAP PIN

+DVI_VCC

14

+5V

R327

4.7K_0402_5%

4.7K_0402_5% DVI@

DVI@

6

7

R337

16

0_0402_5%

0_0402_5% DVI@

DVI@

3 11 19 22

15

GND

1

C502

0.1U_0402_16V4Z

2

DVI@

12

1 2

100K_0402_5%

W=40mils

F2

1.1A_6VDC_FUSE

1.1A_6VDC_FUSE DVI@

DVI@

2 1

+DVI_VCC

12

R331

4.7K_0402_5%

4.7K_0402_5% DVI@

DVI@

Q44

Q44 2N7002_SOT23

2N7002_SOT23 DVI@

DVI@

R336

@

+3VS

2

G

1 3

D

1 3

D

Q45

Q45 2N7002_SOT23

2N7002_SOT23 DVI@

DVI@

12

1

D18

RB411D_SOT23DVI@

S

VGA_DVI_SCLK (18)

2

G

S

VGA_DVI_SDATA (18)

DVI_DET

D19

SKS10-04AT_TSMA@

2 1

21

+5VS

DVI_DET (18)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

1

20 43Tuesday, November 27, 2007

C

5

Dr-Bios.com

4

3

2

+3VS

1

12

R216

4.7K_0402_5%

4.7K_0402_5% @

@

R389 33_0402_5% R389 33_0402_5%

1 2

5

U12

2

P

B

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

@

1 2

4

C311

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

IDE_RESET#

IDE_D[0..15](13)

IDE_A[0..2](13)

D D

+5VS

12

R187

100K_0402_5%

IDE_LED#(27,28)

C C

IDE_LED#

+5VS

IDE_IOW#(13) IDE_IORDY(13) IDE_IRQ(13)

IDE_CS1#(13)

R172 10K_0402_5%@R172 10K_0402_5% @

+5VS

12 12

R171 470_0402_5%

CDROM CONN

IDE_RESET# IDE_D7 IDE_D6 IDE_D5 IDE_D4 IDE_D3 IDE_D2 IDE_D1 IDE_D0

IDE_IOW# IDE_IORDY IDE_IRQ IDE_A1 IDE_A0 IDE_CS1# IDE_LED#

SD_CSEL

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 52

If CDROM is Slave

IDE_A[0..2]

JP25

1 3 5 7 9

OCTEK_CDR-50JD1

IDE_D[0..15]

+3VS

R203 4.7K_0402_5%

IDE_IORDY IDE_D7

80mils

IDE_IRQ IDE_DREQ IDE_PDIAG#

IDE_DREQ (13)

IDE_IOR# (13)

IDE_DACK# (13)

IDE_CS3# (13) +5VS

+5VS

80mils

2 4

IDE_D8

6

IDE_D9

8

IDE_D10

10

IDE_D11

12

IDE_D12

14

IDE_D13

16

IDE_D14

18

IDE_D15

20

IDE_DREQ

22

IDE_IOR#

24 26

IDE_DACK#

28 30

IDE_PDIAG#

32

IDE_A2

34

IDE_CS3#

36 38 40 42 44 46 48 50

1 2

R173

R173 100K_0402_5%

100K_0402_5% @

@

1 2

R217 10K_0402_5%

1 2

R190 10K_0402_5%

1 2

R209 5.6K_0402_5%

1 2

R219 10K_0402_5% @R219 10K_0402_5% @

1 2

+5VS

1

C268

10U_0805_10V4Z

C268

2

1

C274

2

1U_0402_6.3V4Z

IDE_HRESET#(15)

0.1U_0402_16V4Z

1

C273

2

PCIRST_IDE#(13)

1000P_0402_50V7K

IDE_HRESET# PCIRST_IDE#

1

C272

2

then SD_CSEL= Floating

else SD_CSEL= Low

SATA HDD Conn.(SAS Connector)

JP27

1

SATA_STX_C_DRX_P0(14) SATA_STX_C_DRX_N0(14)

SATA_STX_C_DRX_P1(14)

B B

A A

SATA_STX_C_DRX_N1(14)

SATA_DTX_C_SRX_N0(14) SATA_DTX_C_SRX_P0(14)

SATA_DTX_C_SRX_N1(14) SATA_DTX_C_SRX_P1(14)

5

SATA_STX_C_DRX_P0 SATA_STX_C_DRX_N0

SATA_DTX_SRX_N0 SATA_DTX_SRX_P0

SATA_STX_C_DRX_P1 SATA_STX_C_DRX_N1

SATA_DTX_SRX_N1 SATA_DTX_SRX_P1

+3VS

+5VS

SATA_DTX_C_SRX_N0 SATA_DTX_SRX_N0 SATA_DTX_C_SRX_P0

SATA_DTX_C_SRX_N1 SATA_DTX_SRX_N1 SATA_DTX_C_SRX_P1

C581 0.01U_0402_16V7K C581 0.01U_0402_16V7K

1 2

C580 0.01U_0402_16V7K

C580 0.01U_0402_16V7K C561 0.01U_0402_16V7KSATA2@ C561 0.01U_0402_16V7KSATA2@

1 2

C560 0.01U_0402_16V7KSATA2@ C560 0.01U_0402_16V7KSATA2@

GND

2

HTX0+

3

HTX0-

4

GND

5

HRX0-

6

HRX0+

7

GND

23

GND

24

HTX1+

25

HTX1-

26

GND

27

HRX1-

28

HRX1+

29

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

30

GND1

31

GND2

OCTEK_SAS-22CA1G

OCTEK_SAS-22CA1G SATA@

SATA@

SATA_DTX_SRX_P0

SATA_DTX_SRX_P1

4

10U_0805_10V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

3

C572

+3VS

1

C568

2

0.1U_0402_16V4Z

+5VS

1

+

2

C570

C570 150U_D2_6.3VM

150U_D2_6.3VM @

@

Compal Secret Data

0.1U_0402_16V4Z

1

C569

2

C567

C567 10U_0805_10V4Z

10U_0805_10V4Z

1

2

Close to SATA HDD

Deciphered Date

1

2

1

2

C565

0.1U_0402_16V4Z

1

C571

2

1000P_0402_50V7K

C566

0.1U_0402_16V4Z

1

2

1

2

C564

C564 1000P_0402_50V7K

1000P_0402_50V7K

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

1

C

of

21 43Tuesday, November 27, 2007

5

Dr-Bios.com

RGMII_MDIO

+3VAUX

Config 5~8 : Auto-Negotiation(NWay) Configuration

(RTL8211B:Config for all capability, prefer slave mode)

+3VAUX

D D

R482 4.7K_0402_5%R482 4.7K_0402_5%

R484 4.7K_0402_5%R484 4.7K_0402_5%

R486 4.7K_0402_5%R486 4.7K_0402_5%

R488 4.7K_0402_5%R488 4.7K_0402_5%

R490 4.7K_0402_5%R490 4.7K_0402_5%

R494 4.7K_0402_5% @R494 4.7K_0402_5% @

R497 4.7K_0402_5% @R497 4.7K_0402_5% @

R507 4.7K_0402_5% @R507 4.7K_0402_5% @

Config 9 : Interface Mode Select

C C

B B

A A

1 2

R181 10K_0402_5%R181 10K_0402_5%

R483 4.7K_0402_5% @R483 4.7K_0402_5% @

CONFIG_5

1 2

C113 0.01U_0402_16V7KC113 0.01U_0402_16V7K

C122 0.01U_0402_16V7KC122 0.01U_0402_16V7K

C129 0.01U_0402_16V7KC129 0.01U_0402_16V7K

C133 0.01U_0402_16V7KC133 0.01U_0402_16V7K

LAN_ACTIVITY#_R

LAN_LINK#_R

R485 4.7K_0402_5% @R485 4.7K_0402_5% @

CONFIG_6

R487 4.7K_0402_5% @R487 4.7K_0402_5% @

CONFIG_7

R489 4.7K_0402_5% @R489 4.7K_0402_5% @

CONFIG_8

R491 4.7K_0402_5% @R491 4.7K_0402_5% @

CONFIG_9

R495 4.7K_0402_5%R495 4.7K_0402_5%

TXDLY

R498 4.7K_0402_5%R498 4.7K_0402_5%

RXDLY

R506 4.7K_0402_5% @R506 4.7K_0402_5% @

LINK1000

V_DAC4 V_DAC3

R509 0_0402_5% @R509 0_0402_5% @

V_DAC3 V_DAC2

R510 0_0402_5% @R510 0_0402_5% @

V_DAC2 V_DAC1

R511 0_0402_5% @R511 0_0402_5% @

1 2

1

C686

C686 10P_0402_50V8J

10P_0402_50V8J

2

@

PVT 2007/3/12

RXCLK(12)

1 2

2 1

D25 CH751H-40PT _SOD323D25 CH751H-40PT _SOD323

1 2

R120

R120 0_0805_5%

0_0805_5% @

@

1 2 1 2 1 2

+3VAUX

LAN_ACTIVITY#

L61 MBK1608601YZF 0603L61 MBK1608601YZF 0603

1

C685

C685 10P_0402_50V8J

10P_0402_50V8J

2

@

LAN_LINK#

L62 MBK1608601YZF 0603L62 MBK1608601YZF 0603

+3VAUX

12

LAN_ACTIVITY#

LINK1000LAN_LINK#

V_DAC1LAN_AVDD18

V_DAC1 LAN_MIDI3LAN_MIDI3+

V_DAC2 LAN_MIDI2LAN_MIDI2+

V_DAC3 LAN_MIDI1LAN_MIDI1+

V_DAC4 LAN_MIDI0LAN_MIDI0+

R126 300_0603_5%

1 2

R129 300_0603_5%

RJ45_GND

EMI 2007/4/12 Added

TXCTL(12) TXCLK_PHY(12) TXD0(12) TXD1(12) TXD2(12) TXD3(12)

RXCTL(12)

R481 33_0402_5%R481 33_0402_5%

1 2

RXD0(12) RXD1(12) RXD2(12) RXD3(12)

C659

C659 33P_0402_50V8K

33P_0402_50V8K

@

RGMII_MDC(12)

RGMII_MDIO(12)

LINK10(12)

RXCLK_R

12

C683

C683 33P_0402_50V8K

33P_0402_50V8K @

@

RGMII_INTR(12) SLP_RMGT# (12,15)

R493 0_0402_5%@ R493 0_0402_5%@ R496 0_0402_5%@ R496 0_0402_5%@

1 2 1 2

RGMII_MDC RGMII_MDIO

6 Via to GND

LAN_LINK#

2 1

D26 CH751H-40PT _SOD323D26 CH751H-40PT _SOD323

LAN_LINK#

2 1

D27 CH751H-40PT _SOD323D27 CH751H-40PT _SOD323

T1

1

TCT1 TD1+ TD1TCT2 TD2+ TD2TCT3 TD3+ TD3TCT4 TD4+ TD4-

350uH_GSL5009LF

12

C127

C127 1000P_1206_2KV7K

1000P_1206_2KV7K

MCT1 MX1+

MX1MCT2 MX2+

MX2MCT3 MX3+

MX3MCT4 MX4+

MX4-

12 11

8 7 6 5 4 3 2 1

10

9

1 2

2 3 4 5 6 7 8

9 10 11 12

LAN_ACTIVITY#_R RJ45_MDI3RJ45_MDI3+ RJ45_MDI1RJ45_MDI2RJ45_MDI2+ RJ45_MDI1+ RJ45_MDI0RJ45_MDI0+ LAN_LINK#_R

L69 MBK1608601YZF 0603L69 MBK1608601YZF 0603

5

4

TXCTL TXCLK TXD0 TXD1 TXD2 TXD3

RXCTL RXCLK_R RXD0 RXD1 RXD2 RXD3

TXDLY RXDLY

LINK10 LINK100 LINK1000

LED_RX LED_TX

CONFIG_0 CONFIG_1 CONFIG_2 CONFIG_3 CONFIG_4 CONFIG_5 CONFIG_6 CONFIG_7 CONFIG_8 CONFIG_9

LINK10

LINK100

24

RJ45_MDI3-

23

RJ45_MDI3+

22 21

RJ45_MDI2-

20

RJ45_MDI2+

19 18

RJ45_MDI1-

17

RJ45_MDI1+

16 15

RJ45_MDI0-

14

RJ45_MDI0+

13

JP18

Amber LED+ Amber LEDPR4PR4+ PR2PR3PR3+ PR2+ PR1PR1+ Green LEDGreen LED+

FOX_JM36113-L2R8-7F

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

4

U3

29

TXCTL

24

TXC

25

TXD0

26

TXD1

27

TXD2

28

TXD3

16

RXCTL

22

RXC

17

RXD0

19

RXD1

20

RXD2

21

RXD3

51

TXDLY

52

RXDLY

30

MDC

31

MDIO

50

LED_LINK10

48

LED_LINK100

44

LED_LINK1000

43

LED_DUPLEX

40

LED_RX

39

LED_TX

58

CONFIG_0

57

CONFIG_1

56

CONFIG_2

54

CONFIG_3

53

CONFIG_4

47

CRS/CONFIG_5

46

COL/CONFIG_6

37

INTB/CONFIG_7

35

RXER/CONFIG_8

33

CONFIG_9

65

GND

RTL8211B-GR_QFN64_9x9

1 8 2 7 3 6 4 5

16

SHLD2

15

SHLD1

14

SHLD2

13

SHLD1

LANGND

1

C165

C138

4.7U_0805_10V4Z

2

18

DVDD33

23

DVDD33

34

DVDD33

42

DVDD33

49

DVDD33

55

DVDD33

RGMII

PWR

LED

PHY Config

LAN I/FCLK

LED_RX

L67 FBM-11-160808-700T_0603

LED_TX

L68 FBM-11-160808-700T_0603L68 FBM-11-160808-700T_0603

AVDD33 AVDD33

DVDD15 DVDD15 DVDD15 DVDD15

AVDD15

AVDD18 AVDD18 AVDD18 AVDD18

CTRL18 CTRL15

MDI0+

MDI0-

MDI1+

MDI1-

MDI2+

MDI2-

MDI3+

MDI3RSET

PHYRSTB

X1 X2

CLK125

470_0402_5%

1 2 1 2

8 60

32 36 45 59

63

2 5 10 13

9 64

3 4 6 7 11 12 14 15

1 38

61 62

41

R32

EMI 2007/4/12 Added

RP7

75_1206_8P4R_5%

RJ45_GND

+3VAUX

R499 4.7K_0402_5%R499 4.7K_0402_5%

1 2

R500 4.7K_0402_5%R500 4.7K_0402_5%

1 2

R501 4.7K_0402_5%R501 4.7K_0402_5%

1 2

R502 4.7K_0402_5%R502 4.7K_0402_5%

1 2

R503 4.7K_0402_5%R503 4.7K_0402_5%

1 2

Config 0~4 : PHY Address

3

+3VAUX

1.5v & 1.8v output power trace width=40mil

LAN_AVDD33

LAN_DVDD15

LAN_AVDD15 LAN_DVDD15

LAN_AVDD18

LAN_CTRL18 LAN_CTRL15

LAN_MIDI0+ LAN_MIDI0LAN_MIDI1+ LAN_MIDI1LAN_MIDI2+ LAN_MIDI2LAN_MIDI3+ LAN_MIDI3-

RSET

LAN_XTAL1 LAN_XTAL2

C236

27P_0402_50V8J

1 2

+3VAUX

5

2

P

B

Y

1

A

G

U39

3

PVT 2007/3/12

L59 MBK1608121YZF_0603

1 2

C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z

1 2

C188 0.1U_0402_16V4ZC188 0.1U_0402_16V4Z

L60 MBK1608121YZF_0603L60 MBK1608121YZF_0603

1

C253

2

0.1U_0402_16V4Z

12

R1282.49K_0402_1% R1282.49K_0402_1%

Y1

1

25MHZ_20P

27P_0402_50V8J

2

LAN_ACTIVITY#

4

NC7SZ08P5X_NL_SC70-5

12

1

C243

2

+3VAUX

1U_0603_10V4Z

+5VALW

+3VAUX

12

R411

5.1K_0402_1%

5.1K_0402_1% @

@

1 2

R566 0_0402_5%R566 0_0402_5%

2

C191

0.1U_0402_16V4Z

1

@

MP Modify 2007/04/19

+3VAUX

Update Footprint

LAN_CTRL18

1

C161

0.1U_0402_16V4Z

+3VAUX

+3VALW

1

C227

2

+VSB

R449

R449 100K_0402_5%

100K_0402_5%

Q50

Q50 2N7002_SOT23

2N7002_SOT23

MII_RST (12)

3

Q18

Q18 2SB1188T100R_SC62-3

2SB1188T100R_SC62-3

2

LAN_AVDD18_R

Update Footprint

3

Q21

1

0.1U_0402_16V4Z

Q21 2SB1188T100R_SC62-3

2SB1188T100R_SC62-3

2

1

C254

2

Compal Secret Data

Issued Date

3

LAN_CTRL15

2006/08/18 2007/8/18

CONFIG_0 CONFIG_1 CONFIG_2 CONFIG_3 CONFIG_4

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MP Modify 2007/04/19

L71

L71 MBK1608301YZF_0603

MBK1608301YZF_0603

1

C257

C257 10U_0805_10V4Z

10U_0805_10V4Z

2

Deciphered Date

241mA

2

12

R441

R441 200K_0402_5%

200K_0402_5%

WOL_EN#

12

Q46

Q46 2N7002_SOT23

2N7002_SOT23

13

D

2

G

S

MP Modify 2007/04/19

L70

L70 MBK1608301YZF_0603

MBK1608301YZF_0603

1

2

C185

C185 10U_0805_10V4Z

10U_0805_10V4Z

2

1

12

C247

2

+3VAUX

1

C261

C225

C242

2

0.1U_0402_16V4Z

60mil

U34

8

D

7

D

6

D

5

D

SI4800BDY_SO8

+3VAUX_GATE

13

D

2

G

S

12

S S S

G

R450

R450 100K_0402_5%

100K_0402_5%

+3VAUX

C530

C530 10U_0805_10V4Z

10U_0805_10V4Z

1 2 3 4

place 0.1u cap close to IC power pin

1

C635

0.1U_0603_25V7K

2

1 2

R561 0_0402_5% @R561 0_0402_5% @

1 2

R562 0_0402_5%R562 0_0402_5%

1

2

C534

0.1U_0402_16V4Z

MP Modify 2007/04/13

place 0.1u cap close to IC power pin

12

103mA

1

2

@

1

C251

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

1

C179

2

place 0.1u cap close to IC power pin

LAN_DVDD15LAN_DVDD15_R

1

C256

C265

2

0.1U_0402_16V4Z

@

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet of

LAN_AVDD18

1

C222

C223

2

0.1U_0402_16V4Z

1

C263

C264

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

Compal Electronics, Inc.

1

C213

2

0.1U_0402_16V4Z

C531

1

2 C532

C532

0.1U_0402_16V4Z

22 43Tuesday, November 27, 2007

C531

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

2

C535

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

2

+3VALW +3VAUX

0.1U_0402_16V4Z

@

L43

1 2

FBMA-L11-322513-201LMA40T_1210

FBMA-L11-322513-201LMA40T_1210 @

@

SBPWR_EN (27,28,34,40)

1

C205

C224

2

0.1U_0402_16V4Z

1

C262

C260

2

0.1U_0402_16V4Z

@

1

C

5

Dr-Bios.com

U14

PCI_AD[0..31](13)

D D

CLK_PCI_1394

12

R237

@

10_0402_5%

2

C379

1

@

4.7P_0402_50V8C

C C

PCI_AD20 CBS_IDSEL

1 2

R226 100_0402_5%

R226 100_0402_5% 5IN1@

5IN1@

PM_CLKRUN#(13,27,28)

SUSP#(26,27,28,34,38)

B B

PCI_CBE#3(13) PCI_CBE#2(13) PCI_CBE#1(13) PCI_CBE#0(13)

PCI_PAR(13) PCI_FRAME#(13) PCI_TRDY#(13) PCI_IRDY#(13) PCI_STOP#(13) PCI_DEVSEL#(13)

PCI_PERR#(13) PCI_SERR#(13)

PCI_REQ#0(13)

PCI_GNT#0(13)

CLK_PCI_1394(13)

PCI_RST1394#(13)

R240 10K_0402_5%@ R240 10K_0402_5%@

1 2

R242 0_0402_5%

1 2

PCI_PIRQE#(13) PCI_PIRQF#(13)

1 2

+3VS

R211 10K_0402_5%

5IN1@

1 2

R212 0_0402_5% @R212 0_0402_5% @

5IN1@

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

PCI_CBE#3 PCI_CBE#2 PCI_CBE#1 PCI_CBE#0

PCI_PAR PCI_FRAME# PCI_TRDY# PCI_IRDY# PCI_STOP# PCI_DEVSEL#

PCI_PERR# PCI_SERR#

PCI_REQ#0 PCI_GNT#0

CLK_PCI_1394 CBS_GRST#

Layout Note: Place close to R5C832

+3VS

12

R210

5IN1@

5IN1@ 100K_0402_5%

100K_0402_5%

CBS_GRST#

1

C321

A A

C321 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

5IN1@

5

IEEE1394_TPAP0 IEEE1394_TPAN0 IEEE1394_TPBP0 IEEE1394_TPBN0

1394@

IEEE1394_TPBIAS0

U14

125

AD31

126

AD30

127

AD29

1

AD28

2

AD27

3

AD26

5

AD25

6

AD24

9

AD23

11

AD22

12

AD21

14

AD20

15

AD19

17

AD18

18

AD17

19

AD16

36

AD15

37

AD14

38

AD13

39

AD12

40

AD11

42

AD10

43

AD9

44

AD8

46

AD7

47

AD6

48

AD5

49

AD4

50

AD3

51

AD2

52

AD1

53

AD0

7

C/BE3#

21

C/BE2#

35

C/BE1#

45

C/BE0#

33

PAR

23

FRAME#

25

TRDY#

24

IRDY#

29

STOP#

26

DEVSEL#

8

IDSEL

30

PERR#

31

SERR#

124

REQ#

123

GNT#

121

PCICLK

119

PCIRST#

71

GBRST#

117

CLKRUN#

70

PME#

115

INTA#

116

INTB#

69

HWSPND#

66

TEST

111

AGND

107

AGND

103

AGND

102

AGND

99

AGND

97

RSV

R5C833-TQFP128P_TQFP128_14x14

5IN1@

1

1394@

C552

2

270P_0402_50V7K

Z3008

1394@

R396

1 2

56.2_0603_1%

1394@

R398

1 2

56.2_0603_1%

12

1394@

R395

5.1K_0402_1%

R394

1 2

R397

56.2_0603_1%

R5C833

1394@

56.2_0603_1%

2

1

1394@

R5C833

2

C553

1

0.01U_0402_16V7K

0.01U_0402_16V7K 1394@

1394@

4

VCC_PCI3V VCC_PCI3V VCC_PCI3V VCC_PCI3V VCC_PCI3V VCC_PCI3V

VCC_RIN

VCC_ROUT VCC_ROUT VCC_ROUT VCC_ROUT VCC_ROUT

VCC_3V

VCC_MD3V

AVCC_PHY3V AVCC_PHY3V AVCC_PHY3V AVCC_PHY3V

TPBIAS0

TPAP0 TPAN0

TPBP0 TPBN0

MDIO00 MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06 MDIO07 MDIO08 MDIO09 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14 MDIO15 MDIO16 MDIO17 MDIO18 MDIO19

MSEN XDEN

FIL0 REXT VREF

UDIO0/SRIRQ#

UDIO1 UDIO2 UDIO3 UDIO4 UDIO5

GND GND GND GND GND GND GND GND GND GND

Layout Note: Shield GND for IEEE1394_TPA and TPB

C554

0.33U_0603_10V7K

4

XI

XO

10 20 27 32 41 128

61 16

34 64 114 120

67 86 98

106 110 112

113 109

108 105

104 80

79 78 77 76 75 74 73 88 84 82 81 93 90 91 89 92 87 85 83

58 55

94 95

96 101 100

72 60 56 65 59 57

4 13 22 28 54 62 63 68 118 122

SDCLK_MSCLK

12

R225

@

10_0402_5%

2

C355

1

@

4.7P_0402_50V8C

+3VS

+3V_PHY

IEEE1394_TPBIAS0 IEEE1394_TPAP0

IEEE1394_TPAN0 IEEE1394_TPBP0

IEEE1394_TPBN0 SDCD#_XDCD0#

MSCD#_XDCD1 XD_CE# SDWP#_XDRB# MC_PWREN XDWP# 5IN1_LED# TP_MSEXTCK SDCMD_MSBS SDCLK_MSCLK SDDATA0_MSDATA0 SDDATA1_MSDATA1 SDDATA2_MSDATA2 SDDATA3_MSDATA3 XDD4 XDD5 XDD6 XDD7 XDCLE XDALE

MSEN XDEN

R5C832XI R5C832XO

SERIRQ TP_UDIO1 TP_UDIO2 UDIO3 UDIO4 UDIO5

JP26

4

3

6

2

5

2

1

FOX_UV31413-4R1-TR

1394@

6 5

5IN1@

1

C290

C284

2

10U_0805_10V4Z

0.01U_0402_16V7K

SDCD#_XDCD0# (24) MSCD#_XDCD1 (24)

XD_CE# (24)

SDWP#_XDRB# (24)

XDWP# (24)

5IN1_LED# (27,28)

SDCMD_MSBS (24)

SDCLK_MSCLK (24) SDDATA0_MSDATA0 (24) SDDATA1_MSDATA1 (24) SDDATA2_MSDATA2 (24) SDDATA3_MSDATA3 (24)

XDD4 (24)

XDD5 (24)

XDD6 (24)

XDD7 (24)

XDCLE (24) XDALE (24)

5IN1@

1 2

C369

0.01U_0402_16V7K

SERIRQ (13,27,28)

T2PAD T2PAD T3PAD T3PAD

Layout Note: Shield GND for CBS_CCLK_INTERNAL and CBS_CCLK

MC_PWREN

5IN1@

1

2

3

1

C322

C354

2

5IN1@

0.01U_0402_16V7K

2

C377

1

5IN1@

1

C285

+3VS

2

0.01U_0402_16V7K

5IN1@

10U_0805_10V4Z

+3VS

Layout Note: Place close to R5C832 and Shield GND for SDCLK_MSCLK

R241

10K_0402_1%

1 2

5IN1@

0.01U_0402_16V7K

1

C347

C294

2

5IN1@

C294

2

0.47U_0603_16V4Z

0.01U_0402_16V7K

0.01U_0402_16V7K 5IN1@

5IN1@

L34

1 2

KC FBM-L11-201209-221LMAT_0805

KC FBM-L11-201209-221LMAT_0805 5IN1@

5IN1@

C366

1 2

22P_0402_50V8J

C370

1 2

22P_0402_50V8J

+3VS

1

2

C378

0.47U_0603_16V4Z

1

2

5IN1@

Layout Note: Place close to R5C832 and Shield GND for SD_CLK

R5C832XI

Y2

Y2 5IN1@

5IN1@

24.576MHZ_16P_X8A024576FG1H

24.576MHZ_16P_X8A024576FG1H R5C832XO

C331

0.01U_0402_16V7K

5IN1@

1

C371

2

10U_0805_10V4Z

5IN1@

2

1

C338

2

0.1U_0402_16V4Z

5IN1@

1

C375

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 5IN1@

5IN1@

C374

1

2

Memory Card Power Switch

+3VS +VCC_4IN1+3VS

R238

R238 10K_0402_5%

10K_0402_5% 5IN1@

5IN1@

MC_PWREN#

2

3

G

MC_PWREN#

1 2

13

D

2N7002_SOT23

2N7002_SOT23 Q27

Q27

S

5IN1@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5IN1@

1

2

U13

1

GND

2

IN

3

IN

4

EN#

G528_SO8

G528_SO8 5IN1@

5IN1@

C3390.1U_0402_16V4Z

MC_PWREN#

2005/10/06 2006/10/06

8

OUT

7

OUT

6

OUT

5

FLG

R239

R239 300_0603_5%

300_0603_5% 5IN1@

5IN1@

2

Compal Secret Data

Deciphered Date

40mil

12

5IN1@

13

D

2N7002_SOT23

2N7002_SOT23 Q30

Q30

G

5IN1@

S

2

1

C359

2

0.01U_0402_16V7K

5IN1@

+3V_PHY

1

C373

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1000P_0402_50V7K

1000P_0402_50V7K

5IN1@

+VCC_4IN1

12

1

C329

2

5IN1@

1U_0402_6.3V4Z

SD,MMC,MS,XD muti-function pin define

MDIO PIN Name MDIO00

SD Card PIN Name SDCD#

MMC Card PIN Name

MMCCD# MDIO01 MDIO02

C367

10U_0805_10V4Z

MDIO03 MDIO04 MDIO05 MDIO06 MDIO07 MDIO08 MDIO09 SDCCLK MDIO10 MDIO11 MDIO12 MDIO13

SDWP# SDPWR0 SDPWR1 SDLED#

SDCCMD

SDCDAT0 SDCDAT1 SDCDAT2 SDCDAT3

MMCPWR

MMCLED#

MMCCMD

MMCCLK

MMCDAT

MDIO14 MDIO15 MDIO16

C372

MDIO17

1000P_0402_50V7K

MDIO18 MDIO19

Function set pin define

Pull-up

SDDATA1_MSDATA1 SD_MSDATA1 SDDATA2_MSDATA2 SD_MSDATA2

R218

150K_0402_5%

MSCD#_XDCD1 SDCD#_XDCD0#

R231 0_0402_5%

R231 0_0402_5% R243 0_0402_5%

R243 0_0402_5% R229 0_0805_5%

R229 0_0805_5%

SDCMD_MSBS SDDATA0_MSDATA0 SDDATA1_MSDATA1 SDDATA2_MSDATA2 SDDATA3_MSDATA3 SDWP#_XDRB#

Title

Size Document Number Rev

Custom

Date: Sheet of

MSEN XDENUDIO3 UDIO4

Pull-upPull-up Enable

MSEN

R194 10K_0402_5%5IN1@ R194 10K_0402_5%5IN1@

UDIO3

R191 10K_0402_5%5IN1@ R191 10K_0402_5%5IN1@

UDIO4

R204 10K_0402_5%5IN1@ R204 10K_0402_5%5IN1@

UDIO5

R193 100K_0402_5%5IN1@ R193 100K_0402_5%5IN1@

XDEN

R205 10K_0402_5%5IN1@ R205 10K_0402_5%5IN1@

12

5IN1@

12

5IN1@

1 2

5IN1@

D11

2 3

DAN202UT106_SC70-3

DAN202UT106_SC70-3 5IN1@

5IN1@

XDCD#

1

Update Footprint

1 2

R451 2.7K_0402_5% @R451 2.7K_0402_5% @

1 2

R452 2.7K_0402_5% @R452 2.7K_0402_5% @

1 2

R453 2.7K_0402_5% @R453 2.7K_0402_5% @

1 2

R454 2.7K_0402_5% @R454 2.7K_0402_5% @

1 2

R455 2.7K_0402_5% @R455 2.7K_0402_5% @

1 2

R456 2.7K_0402_5% @R456 2.7K_0402_5% @

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

1

Pull-up

1 2 1 2 1 2 1 2

1 2

1

MS Card PIN Name

MSCD#

MSWR

MSLED# MSEXTCK MSBS MSCCLK MSCDAT0 MSCDAT1 MSCDAT2 MSCDAT3

Function

SD,XD,MS,MMC Card

+VCC_4IN1_XD

XDCD# (24)

+VCC_4IN1

XD Card PIN Name XDCD0#

XDCD1# XDCE# XDR/B# XDPWR XDWP# XDLED#

XDWE# XDRE# XDCDAT0 XDCDAT1 XDCDAT2 XDCDAT3 XDCDAT4 XDCDAT5 XDCDAT6 XDCDAT7 XDCLE XDALE

+3VS

SD_MSDATA1 (24) SD_MSDATA2 (24)

23 43Tuesday, November 27, 2007

C

5

Dr-Bios.com

D D

4 IN 1 Socket Push Type

C C

SDDATA0_MSDATA0(23)

SD_MSDATA1(23) SD_MSDATA2(23)

SDDATA3_MSDATA3(23)

XDD4(23) XDD5(23) XDD6(23) XDD7(23)

SDCMD_MSBS(23)

XDWP#(23) XDALE(23) XDCD#(23)

SDWP#_XDRB#(23)

XD_CE#(23) XDCLE(23)

B B

+VCC_4IN1_XD +VCC_4IN1

SDDATA0_MSDATA0 SD_MSDATA1 SD_MSDATA2 SDDATA0_MSDATA0 SDDATA3_MSDATA3 XDD4 XDD5 XDD6 XDD7

SDCMD_MSBS XDWP# XDALE XDCD# SDWP#_XDRB# SDCLK_MSCLK XD_CE#

+5VALW +5VALW +5VALW +5VS +5VS +3VALW +3VS +3VS +3V +3V

33

8

9 26 27 28 30 31 32

6

7

5 34

1

2

3

4 13

22

37 38

JP30

XD-VCC XD-D0

4 IN 1 CONN

XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7

XD-WE XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE

4IN1 GND 4IN1 GND

TAITW_R015-312-LM

(New)

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3

SD-CMD

SD-CD-SW SD-WP-SW

MS-SCLK

MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

4

23 14

24 25 29 10 11 12 36

35

15 19 20 18 16 17 21

5IN1@

R430 22_0402_5%

SDCLK

1 2

SD_MSDATA1 SD_MSDATA2 SDDATA3_MSDATA3 SDCMD_MSBS SDCD#_XDCD0#

SDWP#_XDRB#

R429 22_0402_5%5IN1@ R429 22_0402_5%5IN1@

MSCLK

1 2

SDDATA0_MSDATA0 SDDATA1_MSDATA1 SDDATA2_MSDATA2 SDDATA3_MSDATA3XDCLE MSCD#_XDCD1 SDCMD_MSBS

5IN1@

5IN1@ C618

C618 10U_0805_10V6M

10U_0805_10V6M

1

2

SDCLK_MSCLK

SDDATA0_MSDATA0 (23) SD_MSDATA1 (23) SD_MSDATA2 (23) SDDATA3_MSDATA3 (23) SDCMD_MSBS (23) SDCD#_XDCD0# (23)

SDWP#_XDRB# (23)

SDCLK_MSCLK

SDDATA0_MSDATA0 (23) SDDATA1_MSDATA1 (23) SDDATA2_MSDATA2 (23) SDDATA3_MSDATA3 (23) MSCD#_XDCD1 (23) SDCMD_MSBS (23)

+VCC_4IN1

1

2

5IN1@

C619

0.1U_0402_16V4Z

SDCLK_MSCLK (23)

3

PVT Modify 2007/3/12

H29

H_S354D138

@

1

H6

H_C236D165

@

1

H13

H_C276BC131D128

@

1

H14

H_C236BC131D128

@

1

H25

H_C236D98

@

1

FD1

@

1

FIDUCIAL_C40M80

FD7

@

1

FIDUCIAL_C40M80

H20

H_S354D138

@

1

H15

H_S354D138

H7

H_C236D165

1

H21

H_C276BC131D128

1

H8

H_C236BC131D128

1

H26

H_C236D98

@

1

FD2

FIDUCIAL_C40M80

FD8

FIDUCIAL_C40M80

H_S354D138

@

1

@

1

@

1

H3

H_S354D138

@

1

H_C315BC236D138

H16

H_C236D165

1

H32

H_C236BC131D128

1

For MDC

H22

H_O89X58D59X28

@

1

FIDUCIAL_C40M80

H18

1

H19

@

1

@

FD3

@

1

FD9

@

1

2

H2

H_S354D138

@

H_C236BC315D138

H17

H_C236D165

1

H33

H_C236BC131D128

1

H23

H_O89X58D59X28

@

1

FIDUCIAL_C40M80

H11

H_S354D138

@

1

H1

1

@

H_S354BC140D138

@

For CPU Support Breket

H31

H_C236BC131D128

@

1

H5

H_C158D158N

@

1

For DDR Metal Cage

FD4

FD10

FD15

@

1

@

1

@

1

FD5

FIDUCIAL_C40M80

FD17

FIDUCIAL_C40M80

FD16

FIDUCIAL_C40M80

H30

H10

H_S354D138

@

1

H24

H_C335BC140D138

@

1

For FAN and MXM

H27

H_O197X158D197X158N

@

1

FD6

@

1

FIDUCIAL_C40M80

FD18

@

1

FIDUCIAL_C40M80

@

1

H4

H_S354D138

@

1

H28

@

1

H1 : H_C236BC315D138 H6,H7,H16,H17 : H_C315BC168D165 H25,H26 : H_C236D98 H31,H32,H33 :H_C236BC131D128

@

1

@

1

C642

2

0.1U_0402_16V4Z

1

C643

2

0.1U_0402_16V4Z

C641

A A

5

1

C644

2

0.1U_0402_16V4Z

1

C645

2

0.1U_0402_16V4Z

1

2

C646

1

C647

2

0.1U_0402_16V4Z

4

C648

2

0.1U_0402_16V4Z

C649

2

0.1U_0402_16V4Z

1

C650

2

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/10/06 2006/10/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

1

24 43Tuesday, November 27, 2007

C

1

A

Dr-Bios.com

B

C

D

E

+1.5VS+3VS

0.1U_0402_16V4Z

1

2

MINI1@

C216

0.1U_0402_16V4Z

1

C214

4.7U_0805_10V4Z

2

MINI1@

TV TUNNER

JP20

1

1 3 5 7 9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

G153G254G355G3

2 4 6 8

10

FOX_AS0B226-S99N-7F

56

MINI1@

3 5 7 9

1

C233

2

MINI1@

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42

(MINI2_LED#)

44 46 48 50 52

0.1U_0402_16V4Z

1

1 1

2 2

2

MINI1@

MCP_PCIE_WAKE#(11,26,27)

PCIE_MRX_PTX_N3(11) PCIE_MRX_PTX_P3(11)

PCIE_MTX_C_PRX_N3(11)

PCIE_MTX_C_PRX_P3(11)

1

C218

TV_THERM#(27,28)

C218 10U_0805_10V4Z

10U_0805_10V4Z MINI1@

MINI1@

2

+5VS

+3VS

0.1U_0402_16V4Z

L52

L52 MBK2012121YZF_0805

MBK2012121YZF_0805

MCP_PCIE_WAKE#

1 2

TV_S_CIN TV_S_YIN

PCIE_MRX_PTX_N3 PCIE_MRX_PTX_P3

AUDIO_INL AUDIO_INR

TV_CVBSIN

C215

MINI1_CLKREQ#(11)

CLK_PCIE_MINI1#(11)

CLK_PCIE_MINI1(11)

USB/B Connector

JP11

1

2

3

4

5

6

3 3

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

ACES_87213-2000

+5VALW

USB20_N2 USB20_P2

USB20_N3 USB20_P3

AUDIO_INR AUDIO_INL TV_S_YIN_R TV_S_CIN_R TV_CVBSIN_R

+3VALW

RCIRRX

AV-IN Connector CIR

+5VS

1

2

MINI1@

PCIE_RST1#

SMBCLK1_R SMBDATA1_R

USB20_N2 (14) USB20_P2 (14)

USB20_N3 (14) USB20_P3 (14)

RCIRRX (27)

USB_EN# (26,27,28)

C217

0.1U_0402_16V4Z

+3VS +1.5VS

PCIE_RST1# (11)

USB20_N6 (14) USB20_P6 (14)

C420

4.7U_0805_10V4Z

MCP_PCIE_WAKE#(11,26,27)

+5VALW

1

2

+3V

12

R265

R265 100K_0402_5%

100K_0402_5% R263 10K_0402_5%

R263 10K_0402_5%

1 2

C389

0.1U_0402_16V4Z

1

C183

C183 10U_0805_10V4Z

10U_0805_10V4Z MINI2@

MINI2@

2

PVT2 Modify 2007/04/12

R544 0_0402_5%

WLAN_BT_DATA(30)

WLAN_BT_CLK(30)

MINI2_CLKREQ#(11)

CLK_PCIE_MINI2#(11)

CLK_PCIE_MINI2(11)

E51TXD_P80DATA E51RXD_P80CLK

USB_OC#1 (14)

R544 0_0402_5%

1 2

+3VS

MCP_PCIE_WAKE# MCP_PCIE_WAKE#_LAN

PCIE_MRX_PTX_N2(11) PCIE_MRX_PTX_P2(11)

PCIE_MTX_C_PRX_N2(11)

PCIE_MTX_C_PRX_P2(11)

E51TXD_P80DATA(27,28)

E51RXD_P80CLK(27,28)

1

2

1

C187

0.1U_0402_16V4Z

2

MINI2@

@

WLAN_BT_DATA WLAN_BT_CLK

PCIE_MRX_PTX_N2 PCIE_MRX_PTX_P2

MINI2@

R177 0_0402_5%

1 2 1 2

R176 0_0402_5%

MINI2@

Power

Primary Power (mA)

Peak Normal +3VS +3VALW +1.5VS

1000

330

500

SMBDATA1(15,26)

SMBCLK1(15,26)

JP21

1 3 5 7 9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

G153G254G355G3

1

C184

0.1U_0402_16V4Z

2

MINI2@

2

4

6

8

10

12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

FOX_AS0B226-S99N-7F

56

MINI2@

1

C186

C186 10U_0805_10V4Z

10U_0805_10V4Z MINI2@

MINI2@

2

1 3 5 7 9

Mini Card Power Rating

750 250 375

+3VS

2

G

1 3

D

S

D

S

Q56

Q56 2N7002_SOT23

2N7002_SOT23

1 3

1

C180

0.1U_0402_16V4Z

2

MINI2@

WL_OFF# PCIE_RST1#

R531 0_0402_5% MINI2@R531 0_0402_5%MINI2@ R532 0_0402_5% @R532 0_0402_5% @

SMBCLK1_R SMBDATA1_R

MINI1_LED#

Auxiliary Power (mA)

Normal

250 (wake enable) 5 (Not wake enable)

1 2

R545 2.7K_0402_5%

1 2

R546 2.7K_0402_5%

PVT2 Modify 2007/04/12

SMBDATA1_R

2

G

SMBCLK1_R

D

S

D

S

Q57

Q57 2N7002_SOT23

2N7002_SOT23

+3VS+3VS +1.5VS

1

C181

0.1U_0402_16V4Z

2

MINI2@

+3VS +1.5VS

WL_OFF# (27,28)

1 2 1 2

PCIE_RST1# (11)

USB20_N7 (14) USB20_P7 (14)

MINI1_LED# (30)

+3VS +3V

PVT Modify 2007/03/12(+3V,+3VS)

SMBDATA1_R SMBCLK1_R

4 4

TV_S_YIN_R TV_S_CIN_R TV_CVBSIN_R

1 2

L54 MBK1608121YZF_0603L54 MBK1608121YZF_0603

1 2

L55 MBK1608121YZF_0603L55 MBK1608121YZF_0603

1 2

L56 MBK1608121YZF_0603L56 MBK1608121YZF_0603

EMI PVT Modify 2007/03/12 Close JP11

A

TV_S_YIN TV_S_CIN TV_CVBSIN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

E

C

of

25 43Tuesday, November 27, 2007

A

Dr-Bios.com

B

C

D

E

New Card Power Switch

U18

CP_USB# CP_PE# SUSP# SYSON PCIE_RST#

5

3.3Vin1

6

3.3Vin2

21

3.3Vaux_in

18

1.5Vin1

19

1.5Vin2

14

CPUSB#

15

CPPE#

4

STBY# SHDN#3RCLKEN

2

SYSRST#

11

1

C396

10U_0805_10V4Z

2

EXPRESS@

U6

1

GND

2

IN

3

IN

4

EN#

G528_SO8

GND

3.3Vout1

3.3Vout2

Aux_out

1.5Vout1

1.5Vout2

PERST#

NC11NC210NC312NC413NC5

24

8

OUT

7

OUT

6

OUT

5

FLG

+3VS

1 1

EXPRESS@

R269 100K_0402_5%

+3V

2 2

10U_0805_10V4Z

10U_0805_10V4Z EXPRESS@

EXPRESS@

3 3

1 2

R268 100K_0402_5%@R268 100K_0402_5%@

1 2

SUSP#(23,27,28,34,38) SYSON(27,28,34,40)

PCIE_RST#(11,18)

+3VS +1.5VS+3V

1

C394

2

1

C393

10U_0805_10V4Z

2

EXPRESS@

+5VALW

1

C270

4.7U_0805_10V4Z

4.7U_0805_10V4Z 2

USB_EN#(25,27,28)

+3V

+1.5VS

60mils

7 8

40mil

20

40mil

16 17

23

OC#

RCLKEN1

22

PERST1#

9

TPS2231PWPR_PWP24

TPS2231PWPR_PWP24 EXPRESS@

EXPRESS@

+3V

12

+USB_VCCA

+3VS_CARD1

+3VALW_CARD1

+1.5VS_CARD1

R158

R158 100K_0402_5%

100K_0402_5% R154 10K_0402_5%

R154 10K_0402_5%

1 2

C241

0.1U_0402_16V4Z

+3VALW_CARD1 +3VS_CARD1 +1.5VS_CARD1

1

C403

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z EXPRESS@

EXPRESS@

+3VS

12

13

D

S

R270

10K_0402_5%

10K_0402_5% EXPRESS@

EXPRESS@

CLKREQ1#

NC7SZ32P5X_NL_SC70-5 EXPRESS@

Q33

Q33 2N7002_SOT23

2N7002_SOT23 EXPRESS@

EXPRESS@

SMBDATA1

SMBCLK1

10U_0805_10V4Z

10K_0402_5%

10K_0402_5% EXPRESS@

EXPRESS@

RCLKEN1

SMBDATA1(15,25)

SMBCLK1(15,25)

C406

EXPRESS@

R271

2

G

1

C397

10U_0805_10V4Z

2

EXPRESS@

+3VS +3VS

12

2

B

1

A

+3VS

2

G

1 3

D

S

D

S

Q58

Q58 2N7002_SOT23

2N7002_SOT23 @

@

Imax = 1.35A Imax = 0.75AImax = 0.275A

0.1U_0402_16V4Z

5

U20

Vcc

Y

G

3

2

G

1 3

D

1

2 EXPRESS@

EXPRESS@

1

C421

0.1U_0402_16V4Z

2

EXPRESS@

4

SMBDATA1_NEW

S

Q59

Q59 2N7002_SOT23

2N7002_SOT23 @

@

PVT Modify 2007/03/22

USB_OC#0 (14)

1

2

USB20_N0(14) USB20_P0(14)

USB20_N1(14) USB20_P1(14)

C404

SMBCLK1_NEW

1

C402

10U_0805_10V4Z

2

EXPRESS@

EXP_CLKREQ# (11)

SMBDATA1 SMBCLK1

USB20_N0 USB20_P0

USB20_N1 USB20_P1

0928 Modify

1

C405

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z EXPRESS@

EXPRESS@

R536 0_0402_5%R536 0_0402_5%

1 2

R537 0_0402_5%R537 0_0402_5%

1 2

USB CONN. 1(Stack-up Type)

+USB_VCCA

USB20_N0

1

+

2

C537

C537 150U_D2_6.3VM

150U_D2_6.3VM

R168 0_0402_5%@ R168 0_0402_5%@ R174 0_0402_5%@ R174 0_0402_5%@

R137 0_0402_5%@ R137 0_0402_5%@ R132 0_0402_5%@ R132 0_0402_5%@

4

1

C245

1

470P_0402_50V7K

2

1 2 1 2

L26

WCM2012F2S-900T04_0805

3

4

1

2

New Card Socket (Left/TOP)

USB20_N8(14)

+1.5VS_CARD1

MCP_PCIE_WAKE#(11,25,27)

+3VALW_CARD1

CLK_PCIE_CARD#(11) CLK_PCIE_CARD(11)

PCIE_MRX_PTX_N1(11) PCIE_MRX_PTX_P1(11)

PCIE_MTX_C_PRX_N1(11) PCIE_MTX_C_PRX_P1(11)

SMBDATA1_NEW SMBCLK1_NEW

W=80mils

1

2

USB20_N0_R

3

USB20_P0_RUSB20_P0

2

USB20_P8(14)

+3VS_CARD1

CP_PE#(11,14)

C244

C244 470P_0402_50V7K

470P_0402_50V7K

USB20_N0_R USB20_P0_R

USB20_N1_R USB20_P1_R

CP_USB#

SMBCLK1_NEW SMBDATA1_NEW

PERST1#

CLKREQ1# CP_PE#

+3VS

JP23

JP23 1 2 3 4

5 6 7 8

9

10

SUYIN_020122MR008S505ZL

VCC D0D0+ GND

VCC D1D1+ GND

GND1 GND2

JP9

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

FOX_1CH4110C_LT

FOX_1CH4110C_LT EXPRESS@

EXPRESS@

R547 2.7K_0402_5% @R547 2.7K_0402_5% @ R548 2.7K_0402_5% @R548 2.7K_0402_5% @

GND GND

1 2 1 2

29 30

PVT2 Modify 2007/04/11

SMBDATA1_NEW SMBCLK1_NEW

L23

USB20_N1

USB20_P1

D5

1

2

4 4

PRTR5V0U2X_SOT143@D5PRTR5V0U2X_SOT143@

GND

I/O

VCC

4

3

I/O

SUYIN_020173MR004G533ZR_4P

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/18 2007/8/18

Compal Secret Data

L23

4

1

WCM2012F2S900T04_0805

+USB_VCCA +USB_VCCA

USB20_N0_RUSB20_P0_R USB20_N1_RUSB20_P1_R

USB20_N1_R

3

USB20_P1_R

2

D4

1

2

PRTR5V0U2X_SOT143@D4PRTR5V0U2X_SOT143@

GND

I/O

VCC

4

3

I/O

SUYIN_020173MR004G533ZR_4P

Compal Electronics, Inc.

Deciphered Date

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

C

of

26 43Tuesday, November 27, 2007

E

5

Dr-Bios.com

0.1U_0402_16V4Z

0.1U_0402_16V4Z C341

C341

1

C293

2

0.1U_0402_16V4Z

D D

C364

22P_0402_50V8J@

C C

RCIRRX(25)

+5VS

B B

A A

1 2

R235 4.7K_0402_5%

1 2

R236 4.7K_0402_5%

+5VALW

RP57

1 8 2 7 3 6 4 5

4.7K_1206_8P4R_5%

MCP_PCIE_WAKE#(11,25,26)

R233 33_0402_5%@R233 33_0402_5%@

12

CLK_PCI_LPC(13,28)

EC_RST#(28)

+3VALW

Update Footprint

R232

10K_0402_5%

D12

RB751V_SOD323

TP_CLK TP_DATA

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

+3VALW

R201 47K_0402_5%

+3VALW

21

R224 10K_0402_5%@R224 10K_0402_5%@ R221 0_0402_5% @R221 0_0402_5% @

1 2

EC_RCIRRX

1 2 1 2

12

1

C292

0.1U_0402_16V4Z

2

EC_RCIRRX (28)

PWR_SUSP_LED(28,30)

EC_SMB_CK1(18,28,29,37) EC_SMB_DA1(18,28,29,37) EC_SMB_CK2(6,28) EC_SMB_DA2(6,28)

PM_SLP_S3#(15,28) PM_SLP_S5#(15,28) EC_LID_OUT# (15,28)

PBTN_OUT#(15,28) EC_THERM#(6,15,28)

FAN_SPEED1(4,28)

NUM_LED#(28,30)

EC_PME# EC_PME#

PM_CLKRUN#(13,23,28)

EC_SMI#(15,28)

EC_PME#(13,28)

LID_SW#(28,30,33)

BT_ON#(28,30)

ON/OFF(28,31)

EC_GA20(15,28)

EC_KBRST#(15,28)

LPC_FRAME#(13,14,28)

PLT_RST#(13,28)

EC_SCI#(15,28)

SUSP#(23,26,28,34,38)

0.1U_0402_16V4Z

SERIRQ(13,23,28)

LPC_AD3(13,28) LPC_AD2(13,28) LPC_AD1(13,28) LPC_AD0(13,28)

5

0.1U_0402_16V4Z

1

C368

2

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI# LID_SW# SUSP# PBTN_OUT# EC_PME#

FAN_SPEED1 BT_ON# E51TXD_P80DATA E51RXD_P80CLK ON/OFF PWR_SUSP_LED NUM_LED#

4

1

2

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_CRY2 EC_CRY1

4

2

C380

1000P_0402_50V7K

1

FBM-L11-160808-800LMT_0603

2

C384

C376

U15

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

C384 1000P_0402_50V7K

1000P_0402_50V7K

1

LPC & MISC

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VALW

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

Issued Date

L30

1 2

9

22

VCC

PS2 Interface

11

+EC_VCCA

33

96

111

125

VCC

INVT_PWM/PWM1/GPIO0F

ACOFF/FANPWM2/GPIO13

PWM Output

AD Input

DA Output

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Flash ROM

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

GPO

GPIO

GPI

GND

24

35

94

113

3

KSI[0..7]

1

2

ECAGND

67

AVCC

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

CAPS_LED#/GPIO53 SUSP_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

AGND

KB926QFB1_LQFP128_14X14

69

20mil

ECAGND

FBM-L11-160808-800LMT_0603

+EC_VCCA (28)

C330

0.1U_0402_16V4Z

ECAGND (28)

INVT_PWM

21

BEEP#

23 26 27

BATT_TEMP

63

BATT_OVP

64 65

AD_BID0

SPIDI/RD#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

66 75 76

DAC_BRIG

68

EN_DFAN1

70

IREF

71 72

EC_MUTE

83

USB_EN#

84

WL_LED#

85

BT_LED#

86

TP_CLK

87

TP_DATA

88

3S/4S#

97

65W/90W#

98

SBPWR_EN

99 109

EC_SI_SPI_SO/FRD#

119

EC_SO_SPI_SI/FWR#

120

EC_SPICLK

126

EC_SPICS#/FSEL#

128

EC_RCIRRX

73 74

FSTCHG

89

BATT_GRN_LED#

90

CAPS_LED#

91

BATT_AMB_LED#

92

PWR_LED

93

SYSON

95

MCP_PWRGD

121 127

100

EC_LID_OUT#

101

EC_ON

102 103

VGA_ON

104

BKOFF#

105

WL_OFF#

106

MEDIA_LED#

107 108

SKU_ID

110

ENBKL

112

EAPD

114

SATA_LED#

115

MXM_THERM#

116

IDE_5IN1_LED#

117 118

124

L32

12

Compal Secret Data

1

2

For KB926 C0 reversion

Deciphered Date

AD3/GPIO3B

AD4/GPIO42

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

SDIDI/GPXID0

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

ENBKL/GPXID2

2006/08/18 2007/8/18

3

KSO[0..17]

BATT_TEMP BATT_OVP ACIN

@

@ C692

C692

0.1U_0402_16V4Z

KSI[0..7] (28,29,30) KSO[0..17] (28,29,30)

C660 100P_0402_50V8J C660 100P_0402_50V8J

12

C661 100P_0402_50V8J C661 100P_0402_50V8J

12

C662 100P_0402_50V8J C662 100P_0402_50V8J

12

INVT_PWM (20,28) BEEP# (28,32) ENCODER_DIR (28,33) ACOFF (28,35,38)

BATT_OVP (28,38) ADP_I (28,38)

POUT (28,41)

DAC_BRIG (20,28) EN_DFAN1 (4,28) IREF (28,38) CHGSEL (28,38)

EC_MUTE (28,33) USB_EN# (25,26,28) WL_LED# (28,30) BT_LED# (28,30) TP_CLK (28,29)

TP_DATA (28,29)

3S/4S# (28,38)

65W/90W# (28,38) SBPWR_EN (22,28,34,40) TV_THERM# (25,28)

EC_SI_SPI_SO/FRD# (28,29) EC_SO_SPI_SI/FWR# (28,29) EC_SPICLK (28,29)

EC_SPICS#/FSEL# (28,29)

ENCODER_PULSE (28,33)

FSTCHG (28,38)

BATT_GRN_LED# (28,30,33)

CAPS_LED# (28,30)

BATT_AMB_LED# (28,30,33)

PWR_LED (28,30) SYSON (26,28,34,40) MCP_PWRGD (6,15,18,28) ACIN (15,18,28,37)

EC_RSMRST# (15,28)

EC_ON (28,31) EC_SWI# (15,28) VGA_ON (18) BKOFF# (20,28)

WL_OFF# (25,28)

MEDIA_LED# (28,30) CALIBRATE (28,38)

SKU_ID (28)

ENBKL (12,18,28)

EAPD (28,32)

SATA_LED# (14,28) MXM_THERM# (18,28)

ARCADE# (28,30)

IDE_5IN1_LED#

ECAGND

12

C283 0.01U_0402_16V7K

4

2

PVT Modify 2007/03/12

BATT_TEMP (28,37)

R390

R390 10K_0402_5%

10K_0402_5%

1

2

+3VS

Y

2

C549

0.1U_0402_16V4Z

5

P

B A

G

3

12

Analog Board ID definition, Please see page 3.

+3VALW +3VALW

R206

R206 100K_0402_5%

100K_0402_5%

Ra

VGA@

1 2

R192

Rb

8.2K_0402_5%

8.2K_0402_5% UMA@

UMA@

1 2

5IN1_LED#

2

IDE_LED#

1

U38

U38 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

1

For EC Tools

+3VALW

JP10

1

1 2 3 4

ACES_85205-0400@

AD_BID0

0.1U_0402_16V4Z

3S/4S#

ENBKL

2007/05/10 Modify

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

B

401474

Date: Sheet of

E51RXD_P80CLK

2

E51TXD_P80DATA

3 4

65W/90W#

R519 100K_0402_5% R519 100K_0402_5%

USB_EN#

R444 100K_0402_5% R444 100K_0402_5%

TV_THERM#

R443 100K_0402_5% R443 100K_0402_5%

DPST_PWM (12,20,28)

SKU ID definition, Please see page 3.

Rc

1

2

AD_BID0 (28)

C291

1 2

R462 2.7K_0402_5%R462 2.7K_0402_5%

1 2

R466 10K_0402_5%R466 10K_0402_5%

EC_CRY1 EC_CRY2

1

C556

C556 18P_0402_50V8J

18P_0402_50V8J

2

5IN1_LED# (23,28)

IDE_LED# (21,28)

Compal Electronics, Inc.

Rd

4

1

IN

OUT

NC3NC

2

X3

32.768KHZ_12.5P_1TJS125DJ2A073

E51RXD_P80CLK (25,28) E51TXD_P80DATA (25,28)

12

C-PASE H B-PASE L

R207

R207 100K_0402_5%

100K_0402_5%

1 2

SKU_ID

1

C278

R200

R200 0_0402_5%

0_0402_5% @

@

1 2

1

2

1

C278

0.1U_0402_16V4Z

2

EC_CRY2 (28)EC_CRY1(28)

C555

C555 18P_0402_50V8J

18P_0402_50V8J

27 43Tuesday, November 27, 2007

+3VALW

+5VALW

+3VS

C

5

Dr-Bios.com

D D

C C

E51TXD_P80DATA(25,27)

E51RXD_P80CLK(25,27)

BATT_GRN_LED#(27,30,33)

BATT_AMB_LED#(27,30,33)

B B

EC_RSMRST#(15,27)

R245 0_0402_5%@ R245 0_0402_5%@

KSI[0..7] KSO[0..17]

LPC_FRAME#(13,14,27)

CLK_PCI_LPC(13,27)

PM_CLKRUN#(13,23,27)

EC_SMB_DA2(6,27) EC_SMB_CK2(6,27) EC_SMB_DA1(18,27,29,37) EC_SMB_CK1(18,27,29,37)

NUM_LED#(27,30) CAPS_LED#(27,30)

PWR_LED(27,30)

PM_SLP_S3#(15,27) PM_SLP_S5#(15,27)

EC_SMI#(15,27)

PBTN_OUT#(15,27)

EC_PME#(13,27)

EC_CRY2(27)

EC_CRY1(27)

4

KSI[0..7] (27,29,30) KSO[0..17] (27,29,30)

U16

EC_GA20(15,27)

EC_KBRST#(15,27)

SERIRQ(13,23,27)

LPC_AD3(13,27) LPC_AD2(13,27) LPC_AD1(13,27) LPC_AD0(13,27)

PLT_RST#(13,27) EC_RST#(27)

EC_SCI#(15,27)

SYSON(26,27,34,40)

12

LID_SW#(27,30,33)

SUSP#(23,26,27,34,38)

LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_DA2 EC_SMB_CK2 EC_SMB_DA1 EC_SMB_CK1

E51TXD_P80DATA E51RXD_P80CLK NUM_LED# BATT_GRN_LED# CAPS_LED# BATT_AMB_LED# PWR_LED SYSON

PM_SLP_S3# PM_SLP_S5#

EC_SMI# LID_SW#

SUSP# PBTN_OUT# EC_PME#

EC_CRY2 EC_CRY1

1

GA20/ GPIO00

2

KBRST#/GPIO01

3

SERIRQ

5

LFRAME#

6

LAD3

9

LAD2

10

LAD1

12

LAD0

14

PCICLK

15

PCIRST#/GPIO05

42

ECRST#

24

SCI#/GPIO0E

44

CLKRUN#/GPIO1D

63

KSI0/GPIO30

64

KSI1/GPIO31

65

KSI0/GPIO32

66

KSI3/GPIO33

67

KSI4/GPIO34

68

KSI5/GPIO35

69

KSI6/GPIO36

70

KSI7/GPIO37

47

KSO0/GPIO20

48

KSO1/GPIO21

49

KSO2/GPIO22

50

KSO3/GPIO23

51

KSO4/GPIO24

52

KSO5/GPIO25

53

KSO6/GPIO26

54

KSO7/GPIO27

55

KSO8/GPIO28

56

KSO9/GPIO29

57

KSO10/GPIO2A

58

KSO11/GPIO2B

59

KSO12/GPIO2C

60

KSO13/GPIO2D

61

KSO14/GPIO2E

62

KSO15/GPIO2F

89

KSO16/GPIO48

90

KSO17/GPIO49

88

SDA2/GPIO47

87

SCL2/GPIO46

86

SDA1/GPIO45

85

SCL1/GPIO44

34

GPIO16/E51TXD

35

GPIO17/E51CLK/E51RXD

40

GPIO1A/NUMLED#

99

GPIO52/E51CS#

100

GPIO53/CAPSLED#

101

GPIO54

102

GPIO55/SCORLED#

104

GPIO56

4

GPIO02

7

GPIO03

8

GPIO04

16

GPIO06

17

GPIO07

18

GPIO08

19

GPIO09

20

GPIO0A

21

GPIO0B/ESB_CLK

22

GPIO0C/ESB_DAT

23

GPIO0D

138

XCLKI

139

XCLKO

140

V18R

INTERFACE

key Matrix

SM BUS

+3VALW

Host

scan

3

105

VCC11VCC26VCC

VCC37VCC

PWR

Address

BUS

GND13GND28GND

GND

103

129

127

141

75

VCC

AVCC

AD INtput or GPI

DA output or GPO

FANPWM1/GPIO12

FAN/PWM

FANPWM2/GPIO13

ps2

interface

ADB0/GPXID0/SDIDI

Data

Data BUS

BUS

KBA0/GPXOA00/SDICS# KBA1/GPXOA01/SDICLK

KBA2/GPXOA02/SDIDO

KBA19/GPIO51/A19

CIR_RLC_TX/GPIO41

AGND

KB925QFA0_LQFP144_22x22

39

77

@

ECAGND

+EC_VCCA (27)

AD0/GPI38

AD1/GPI39 AD2/GPI3A AD3/GPI3B

DA0/GPO3C DA1/GPO3D DA2/GPO3E

DA3/GPO3F

PWM1/GPIO0F

PWM2/GPIO10 PWM3/GPIO11 PWM4/GPIO19

FANFB1/GPIO14 FANFB2/GPIO15

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

PSCLK3/GPIO4E

PSDAT3/GPIO4F

ADB1/GPXID1 ADB2/GPXID2 ADB3/GPXID3 ADB4/GPXID4 ADB5/GPXID5 ADB6/GPXID6 ADB7/GPXID7

KBA3/GPXOA03 KBA4/GPXOA04 KBA5/GPXOA05 KBA6/GPXOA06 KBA7/GPXOA07 KBA8/GPXOA08

KBA9/GPXOA09 KBA10/GPXOA10 KBA11/GPXOA11 KBA12/GPXOA12 KBA13/GPXOA13 KBA14/GPXOA14 KBA15/GPXOA15 KBA16/GPXOA16 KBA17/GPXOA17 KBA18/GPXOA18

GPIO58/SPICLK

RD#/SPIDI

WR#/SPIDO

SPICS#

GPIO18 GPIO1B GPIO1C GPIO1E

GPIO1F

GPIO42

SELIO2#/GPIO43

SELIO#/GPIO50

XCLK32K/GPIO57

GPIO59

CIR_RX/GPIO40

20mil

BATT_TEMP

71

BATT_OVP

72 73

AD_BID0

74

DAC_BRIG

76

EN_DFAN1

78

IREF

79 80

INVT_PWM

25

BEEP#

27 29

PWR_SUSP_LED

38 30 31

FAN_SPEED1

32

BT_ON#

33

EC_MUTE

91

USB_EN#

92

WL_LED#

93

BT_LED#

94

TP_CLK

95

TP_DATA

96

ADB0

R250 0_0402_5%@R250 0_0402_5%@

125

ADB1 SKU_ID

126

ADB2

128

ADB3

130

ADB4

131

ADB5

132

ADB6

133

ADB7

134

KBA0

111

KBA1

112

KBA2

113

KBA3

114

KBA4

115

KBA5

116

KBA6

117

KBA7

118

KBA8

119

KBA9

120

KBA10

121

KBA11

122

KBA12

123 124 110 109 108 107 106 98

142

EC_SI_SPI_SO/FRD#

135

EC_SO_SPI_SI/FWR#

136

EC_SPICS#/FSEL#

144

ON/OFF

36 41 43 45 46 83 84

FSTCHG

97

MCP_PWRGD

137 143

EC_RCIRRX

81 82

ECAGND (27)

1 2

R439 0_0402_5%@R439 0_0402_5%@

1 2

R257 0_0402_5%@R257 0_0402_5%@

1 2

R251 0_0402_5%@R251 0_0402_5%@

1 2

R258 0_0402_5%@R258 0_0402_5%@

1 2

R252 0_0402_5%@R252 0_0402_5%@

1 2

R259 0_0402_5%@R259 0_0402_5%@

1 2

R253 0_0402_5%@R253 0_0402_5%@

1 2

R244 0_0402_5%@R244 0_0402_5%@

1 2

R260 0_0402_5%@R260 0_0402_5%@

1 2

R256 0_0402_5%@R256 0_0402_5%@

1 2

R448 0_0402_5%@R448 0_0402_5%@

1 2

R261 0_0402_5%@R261 0_0402_5%@

1 2

R246 0_0402_5%@R246 0_0402_5%@

1 2

R262 0_0402_5%@R262 0_0402_5%@

1 2

R248 0_0402_5%@R248 0_0402_5%@

1 2

R254 0_0402_5%@R254 0_0402_5%@

1 2

R249 0_0402_5%@R249 0_0402_5%@

1 2

R255 0_0402_5%@R255 0_0402_5%@

1 2

KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 MXM_THERM#

R433 0_0402_5%@R433 0_0402_5%@

1 2

R440 0_0402_5%@R440 0_0402_5%@

1 2

2

KBA[0..19] ADB[0..7]

BATT_TEMP (27,37)

BATT_OVP (27,38) ADP_I (27,38) AD_BID0 (27)

DAC_BRIG (20,27) EN_DFAN1 (4,27)

IREF (27,38) CHGSEL (27,38)

INVT_PWM (20,27) BEEP# (27,32) EC_THERM# (6,15,27) PWR_SUSP_LED (27,30) ENCODER_DIR (27,33) ACOFF (27,35,38) FAN_SPEED1 (4,27)

BT_ON# (27,30)

EC_MUTE (27,33)

USB_EN# (25,26,27)

WL_LED# (27,30) BT_LED# (27,30) TP_CLK (27,29)

TP_DATA (27,29)

ENBKL IDE_LED# SATA_LED#

EAPD

SBPWR_EN EC_LID_OUT#

EC_ON

BKOFF# WL_OFF# MEDIA_LED#

EC_SPICLK (27,29) EC_SI_SPI_SO/FRD# (27,29) EC_SO_SPI_SI/FWR# (27,29) EC_SPICS#/FSEL# (27,29)

EC_ON SBPWR_EN

DPST_PWM (12,20,27)

POUT (27,41) FSTCHG (27,38) MCP_PWRGD (6,15,18,27) ACIN (15,18,27,37)

EC_RCIRRX (27)

ENCODER_PULSE (27,33)

MXM_THERM# (18,27)

ON/OFF (27,31)

KBA[0..19] ADB[0..7]

TV_THERM# (25,27) SKU_ID (27)

ENBKL (12,18,27)

IDE_LED# (21,27)

SATA_LED# (14,27) 5IN1_LED# (23,27) EAPD (27,32)

ARCADE# (27,30)

3S/4S# (27,38)

65W/90W# (27,38) SBPWR_EN (22,27,34,40) EC_RSMRST# (15,27) EC_LID_OUT# (15,27) EC_ON (27,31)

EC_SWI# (15,27) BKOFF# (20,27)

WL_OFF# (25,27) MEDIA_LED# (27,30)

CALIBRATE (27,38)

EC_ON (27,31) SBPWR_EN (22,27,34,40)

1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

1

C

28 43Tuesday, November 27, 2007

+5VALW

Dr-Bios.com

C259 0.1U_0402_16V4Z

1 2

@

@ U8

U8

8

VCC

7

WP

EC_SMB_CK1(18,27,28,37) EC_SMB_DA1(18,27,28,37) TP_DATA(27,28)

6

SCL

5

SDA

AT24C16AN-10SI-2.7_SO8

Update Footprint

+3VALW

C258 0.1U_0402_16V4Z

1 2

U10

+3VALW

1

CE#

3

WP#

7

HOLD#

4

VSS

MX25L8005M2C-15G_SOP8

U37

1

CE#

3

WP#

7

HOLD#

4

VSS

MX25L8005M2C-15G_SOP8

MX25L8005M2C-15G_SOP8 @

@

EC_SPICS#/FSEL#(27,28)

GND

+5VALW

12

R182

R182 100K_0402_5%

100K_0402_5%

1

A0

2

A1

3

A2

4

12

R196

R196 100K_0402_5%

100K_0402_5%

8

VDD SCK

SI

SO

R166 0_0402_5%R166 0_0402_5%

6

R167 0_0402_5%R167 0_0402_5%

5

R208 0_0402_5%R208 0_0402_5%

2

1 2 1 2 1 2

EC_SPICLK (27,28) EC_SO_SPI_SI/FWR# (27,28) EC_SI_SPI_SO/FRD# (27,28)

PVT Net Name Modify 2007/3/12

8

VDD SCK

6 5

SI

2

SO

EC_SPICLK (27,28) EC_SO_SPI_SI/FWR# (27,28) EC_SI_SPI_SO/FRD# (27,28)

To TP/B Conn.

+5VS

TP_CLK(27,28)

TP_DATA

C208 100P_0402_50V8J@C208 100P_0402_50V8J@

TP_CLK

1 2

C207 100P_0402_50V8J@C207 100P_0402_50V8J@

1 2

9/25 Added for EMI

INT_KBD Conn.

(Left)

(Right)

TP_DATA TP_CLK

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

JP6

6 5 4 3 2 1

ACES_85201-0605

+5VS

C209

0.1U_0402_16V4Z

JP5

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ACES_85201-26051

KSI[0..7] KSO[0..17]

28

G2

27

G1

TP_DATA TP_CLK

2

3

D3

D3 @

@ PSOT24C_SOT23

PSOT24C_SOT23

1

Update Footprint

KSI[0..7] (27,28,30) KSO[0..17] (27,28,30)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

KSO15 KSO14 KSO13 KSO12

KSI0 KSO11 KSO10 KSI1

KSI2 KSO9 KSI3 KSO8

Compal Secret Data

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

C91 100P_0402_50V8J C91 100P_0402_50V8J

1 2

C90 100P_0402_50V8J C90 100P_0402_50V8J

1 2

C89 100P_0402_50V8J C89 100P_0402_50V8J

1 2

C88 100P_0402_50V8J C88 100P_0402_50V8J

1 2

C92 100P_0402_50V8J C92 100P_0402_50V8J

1 2

C87 100P_0402_50V8J C87 100P_0402_50V8J

1 2

C86 100P_0402_50V8J C86 100P_0402_50V8J

1 2

C93 100P_0402_50V8J C93 100P_0402_50V8J

1 2

C94 100P_0402_50V8J C94 100P_0402_50V8J

1 2

C85 100P_0402_50V8J C85 100P_0402_50V8J

1 2

C95 100P_0402_50V8J C95 100P_0402_50V8J

1 2

C84 100P_0402_50V8J C84 100P_0402_50V8J

1 2

KSO7

C83 100P_0402_50V8J C83 100P_0402_50V8J

1 2

KSO6

C82 100P_0402_50V8J C82 100P_0402_50V8J

1 2

KSO5

C81 100P_0402_50V8J C81 100P_0402_50V8J

1 2

KSO4

C80 100P_0402_50V8J C80 100P_0402_50V8J

1 2

KSO3

C79 100P_0402_50V8J C79 100P_0402_50V8J

1 2

KSI4

C96 100P_0402_50V8J C96 100P_0402_50V8J

1 2

KSO2

C78 100P_0402_50V8J C78 100P_0402_50V8J

1 2

KSO1

C77 100P_0402_50V8J C77 100P_0402_50V8J

1 2

KSO0

C76 100P_0402_50V8J C76 100P_0402_50V8J

1 2

KSI5

C97 100P_0402_50V8J C97 100P_0402_50V8J

1 2

KSI6

C98 100P_0402_50V8J C98 100P_0402_50V8J

1 2

KSI7

C99 100P_0402_50V8J C99 100P_0402_50V8J

1 2

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

B

401474

Date: Sheet of

Compal Electronics, Inc.

29 43Tuesday, November 27, 2007

C

KSO0

Dr-Bios.com

KSI1

WL_BTN#

KSI2

BT_BTN#

KSI3

EMAIL_BTN#

KSI4

IE_BTN#

KSI5

E-KEY_BTN#

Check 15.4" K/B Matrix

1 2

R317 100K_0402_5%

2

51ON#

3

C663 100P_0402_50V8J@C663 100P_0402_50V8J@ C664 100P_0402_50V8J@C664 100P_0402_50V8J@ C666 100P_0402_50V8J@C666 100P_0402_50V8J@ C668 100P_0402_50V8J@C668 100P_0402_50V8J@ C669 100P_0402_50V8J@C669 100P_0402_50V8J@ C671 100P_0402_50V8JC671 100P_0402_50V8J C673 100P_0402_50V8J@C673 100P_0402_50V8J@ C675 100P_0402_50V8J@C675 100P_0402_50V8J@ C677 100P_0402_50V8J@C677 100P_0402_50V8J@ C678 100P_0402_50V8J@C678 100P_0402_50V8J@

2

1 2

+5VS

+5VALW

1 2

G

R293

R293 300_0402_5%

300_0402_5% R436

R436 453_0402_1%

453_0402_1%

R294

R294 300_0402_5%

300_0402_5% R435

R435 453_0402_1%

453_0402_1%

ARCADE_BTN#

PWR_SUSP_LED(27,28)

D17

1

DAN202UT106_SC70-3

Update Footprint

EMI PVT Modify 2007/3/12

PWR_LED# ON/OFFBTN# WL_R_LED# BT_LED#

PWR_SUSP_LED#

KSO0 KSI1 KSI2 KSI3 KSI4

ARCADE# (27,28) 51ON# (31,35)

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

PWR_SUSP_LED#

13

D

Q47

S

2N7002_SOT23

LED1

3 1

4 2

HT-297DQ/GQ_AMB/YG_0603

LED2

3 1

4 2

HT-297DQ/GQ_AMB/YG_0603

+3VALW

YG

A

YG

A

PWR_LED(27,28)

JP2

17

G17

18

G18

ACES_85201-16051

JP36

12 11 10

9 8 7 6 5 4 3 2 1

ACES_85201-1205

PWR_LED#

PWR_SUSP_LED#

BATT_GRN_LED#

BATT_AMB_LED#

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

ARCADE_BTN# KSO0 KSI5

LID_SW# KSI5

ARCADE_BTN# NUM_LED# CAPS_LED# MEDIA_LED#

2

G

PWR_LED# (33)

PWR_SUSP_LED# (33)

BATT_GRN_LED# (27,28,33)

BATT_AMB_LED# (27,28,33)

+5VS +5VALW

+3VS

PWR_LED# WL_R_LED#

BT_LED# PWR_SUSP_LED# KSO0 KSI1 KSI2 KSI3 KSI4

C665 100P_0402_50V8JC665 100P_0402_50V8J

1 2

C667 100P_0402_50V8JC667 100P_0402_50V8J

1 2

C670 100P_0402_50V8JC670 100P_0402_50V8J

1 2

C672 100P_0402_50V8JC672 100P_0402_50V8J

1 2

C674 100P_0402_50V8JC674 100P_0402_50V8J

1 2

C676 100P_0402_50V8JC676 100P_0402_50V8J

1 2

PWR_LED#

13

D

Q40

S

2N7002_SOT23

ON/OFFBTN# (31)

BT_LED# (27,28)

KSO0 (27,28,29) KSI1 (27,28,29) KSI2 (27,28,29) KSI3 (27,28,29) KSI4 (27,28,29)

MEDIA_LED# (27,28)

CAPS_LED# (27,28) NUM_LED# (27,28)

KSO0 (27,28,29) KSI5 (27,28,29) LID_SW# (27,28,33)

+3VALW +5VS

1 2

R520 0_0402_5% @R520 0_0402_5% @

1 2

R521 0_0402_5%R521 0_0402_5%

PVT2 Modify 2007/4/10

+5VS

C28

1

1U_0402_6.3V4Z

2

+5VALW

1

C657

C657 100P_0402_50V8J

100P_0402_50V8J

2

+3VALW

C27

1

1U_0402_6.3V4Z

2

WL_LED# MINI1_LED#WL_R_LED#

R295

100K_0402_5%

@

BT_ON#(27,28)

HDA_SDOUT_MDC(14)

WL_LED# (27,28) MINI1_LED# (25)

Bluetooth Conn.

+3VALW

12

C473

BT@

0.1U_0402_16V4Z

1 2

R292 10K_0402_5%

BT@

C474

BT@

0.1U_0402_16V4Z

@

@ R522

R522 10K_0402_5%

10K_0402_5%

1 2

+BT_VCC

HDA_SYNC_MDC(14)

HDA_SDIN1(14)

HDA_RST_MDC#(14)

+3VS

G

2

12

1

2

S

Q37

Q37 AO3413_SOT23-3

AO3413_SOT23-3

D

BT@

1 3

R112 33_0402_5% R112 33_0402_5%

HDA_SDOUT_MDC

R111

R111 0_0402_5%

0_0402_5% @

@

C137

C137 10P_0402_50V8J

10P_0402_50V8J @

@

W=40mils

1

C489

4.7U_0805_10V4Z

2

G

BT@

2

13

D

Q52

Q52 2N7002_SOT23

2N7002_SOT23 @

@

S

C487

0.1U_0402_16V4Z

PVT Modify 2007/3/12

HDA_SDOUT_MDC

1 2

1

C475

C475 BT@

BT@ 1U_0603_10V4Z

1U_0603_10V4Z

2

12

BT@

13

D

2

G

S

BT_LED# (27,28)

+BT_VCC

R296

R296 300_0603_5%

300_0603_5%

BT@

Q38

Q38 2N7002_SOT23

2N7002_SOT23 BT@

BT@

MDC Conn.

JP17

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

USB20_P5(14)

USB20_N5(14)

RES0 RES1

3.3V GND3 GND4

IAC_BITCLK

GND13GND14GND15GND16GND17GND

18

USB20_N5

USB20_P5 USB20_P5_R

9/25 Added for EMI

R467 0_0402_5%R467 0_0402_5%

2

1 2 4 6 8 10 12

ACES_88018-124G

0_0402_5% BT@

0_0402_5% BT@ R290

R290

1 2

R291

1 2

0_0402_5% BT@

WLAN_BT_DATA(25)

WLAN_BT_CLK(25)

L37

4

1

WCM2012F2S-900T04_0805

WCM2012F2S-900T04_0805 @

@

20mil

12

1

2

USB20_P5_R USB20_N5_R

+3V

R538

R538 0_0402_5%

0_0402_5%

C155

C155 22P_0402_50V8J

22P_0402_50V8J

+BT_VCC

USB20_N5_R

3

2

+3V

1

C154

C154 1U_0603_10V4Z

1U_0603_10V4Z

2

HDA_BITCLK_MDC (14)

JP12

1

9

1

GND

2

3

4

5

6

7

8

10

8

GND

ACES_87213-0800G

BT@

PVT Value Modify to 453E 2007/3/12

Compal Footprint

4 3

2 1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2006/08/18 2007/8/18

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

30 43Tuesday, November 27, 2007

C

TOP Side

Dr-Bios.com

1 2

R533 10K_0603_5%@R533 10K_0603_5%@

1 2

R534 10K_0603_5%@R534 10K_0603_5%@

Bottom Side

ON/OFFBTN#(30)

EC_ON(27,28)

ON/OFFBTN#

EC_ON

1

R195

R195 10K_0402_5%

10K_0402_5%

+3VALW

R213

R213 100K_0402_5%

100K_0402_5%

1 2

D7

2 3

DAN202UT106_SC70-3

Update Footprint

13

D

2

G

S

Power Button

51ON#

2

2N7002_SOT23

2N7002_SOT23 Q24

Q24

1

ON/OFF (27,28) 51ON# (30,35)

C325

C325 1000P_0402_50V7K

1000P_0402_50V7K

12

D8

D8 RLZ20A_LL34

RLZ20A_LL34

Power ON Circuit

+3V+5VALW+1.2V_HT +5VALW+1.8V

12

1

C69

2

0.1U_0402_16V4Z

R105

R105 47K_0402_5%

47K_0402_5%

2

12

R107

R107 47K_0402_5%

47K_0402_5%

Q12

Q12 MMBT3904_SOT23

MMBT3904_SOT23

3 1

BSS138_SOT23

1

C70

0.1U_0402_16V4Z

2

Q11

12

R98

R98 47K_0402_5%

47K_0402_5%

HT_VLD

13

D

2

G

S

HT_VLD (11,15)

12

1

C430

2

0.1U_0402_16V4Z

R276

R276 47K_0402_5%

47K_0402_5%

2

12

R278

R278 47K_0402_5%

47K_0402_5%

Q36

Q36 MMBT3904_SOT23

MMBT3904_SOT23

3 1

BSS138_SOT23

1

C454

0.1U_0402_16V4Z

2

NEAR PU10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

Q35

+3V

12

R279

R279 47K_0402_5%

47K_0402_5%

MEM_VLD

13

D

2

G

S

Compal Secret Data

MEM_VLD (15,40)

Deciphered Date

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

401474

Date: Sheet

Date: Sheet of

of

31 43Tuesday, November 27, 2007

C

A

Dr-Bios.com

B

C

D

E

F

G

H

+VDDA

12

R418

R418 10K_0402_5%

10K_0402_5%

1 2

C612 1U_0603_10V4Z

12

1 1

C

R434

1 2

+VDDA

1 2

R434

560_0402_5%

R431

560_0402_5%

10K_0402_5%

L44

L44 FBM-L11-160808-800LMT_0603

FBM-L11-160808-800LMT_0603

C634

BEEP#(27,28)

1 2

R517 47K_0402_5%R517 47K_0402_5%

MCP_SPKR(15)

1 2

R518 47K_0402_5%R518 47K_0402_5%

2 2

C634

1U_0603_10V4Z

C617

1U_0603_10V4Z

2

B

12

R432

1 2

10U_0805_10V4Z

C

E

2 1

R428

R428 10K_0402_5%

10K_0402_5%

1

Q42

Q42 2SC2411K_SOT23

2SC2411K_SOT23

3

D23

D23 RB751V_SOD323

RB751V_SOD323

1

C589

2

C611

1 2

1U_0603_10V4Z

1 2

R427

2.4K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1

C590

2

0.1U_0402_16V4Z

40mil

1

C586

2

+5VS

MONO_IN

PVT Modify 2007/3/12

INT_MIC_R(33)

LINE_L(33) LINE_R(33)

MIC1_L(33) MIC1_R(33)

3 3

R415 5.1K_0402_1%

HP_PLUG#(33) LINEIN_PLUG#(33)

MIC_PLUG#(33)

R415 5.1K_0402_1% R419 10K_0402_1%

R419 10K_0402_1% R413 20K_0402_1%R413 20K_0402_1%

1 2

12

SPDIF(33)

C597 4.7U_0805_6.3V6KC597 4.7U_0805_6.3V6K C594 4.7U_0805_6.3V6K C594 4.7U_0805_6.3V6K

LINE_L

C583 4.7U_0805_6.3V6K C583 4.7U_0805_6.3V6K

LINE_R

C582 4.7U_0805_6.3V6K C582 4.7U_0805_6.3V6K

MIC1_L

C587 4.7U_0805_6.3V6K C587 4.7U_0805_6.3V6K

MIC1_R

C584 4.7U_0805_6.3V6K C584 4.7U_0805_6.3V6K

HDA_RST_AUDIO#(14) HDA_SYNC_AUDIO(14)

HDA_SDOUT_AUDIO(14)

EAPD(27,28)

FBM-L11-160808-800LMT_0603

FBM-L11-160808-800LMT_0603 L53

L53

Sense Pin Impedance Codec Signals

39.2K

SENSE A

20K 10K

5.1K

4 4

SENSE B

39.2K 20K 10K

5.1K

PORT-A (PIN 39, 41) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 35, 36) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-G (PIN 43, 44) PORT-H (PIN 45, 46)

1 2 1 2 1 2

1 2 1 2

1 2

1

C387

C387 22P_0402_50V8J

22P_0402_50V8J

2

MIC2_C_R LINE_C_L LINE_C_R

MIC1_C_L MIC1_C_R MONO_IN

SENSE_A

EAPD SPDIF_R

DGND

MIC2_C_L

1 2

A

B

C

D

L45

1 2

KC FBM-L11-201209-221LMAT_0805

L46

1 2

KC FBM-L11-201209-221LMAT_0805

L45

L46

HD Audio Codec

+AVDD_AC97

U30

AVDD125AVDD2

14

NC

15

NC

16

MIC2_L

17

MIC2_R

23

LINE1_L

24

LINE1_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1_L

22

MIC1_R

12

PCBEEP

11

RESET#

10

SYNC

5

SDATA_OUT

2

GPIO0

3

GPIO3

13

SENSE A

34

SENSE B

47

EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

20mil

38

ALC268-GR_LQFP48_9X9

1

DVDD

LINE_OUT_L

LINE_OUT_R

HP_OUT_L HP_OUT_R

DMIC_CLK

BIT_CLK

SDATA_IN

MONO_OUT

LINE1_VREFO

GPIO1 MIC1_VREFO_L MIC1_VREFO_R

MIC2_VREFO

VREF

JDREF

AVSS1

AVSS2

9

NC

NC NC

NC

+5VAMP

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C607

2

0.1U_0402_16V4Z

DVDD_IO

HP_LEFT

35

HP_RIGHT

36

AMP_LEFT

39

AMP_RIGHT

41 45 46 43 44

R424 0_0402_5% R424 0_0402_5%

6

R421 33_0402_5%

8 37 29 31

10mil

28 32 30

CODEC_VREF

27 40 33 26

42

1

C605

2

1

2

1 2

MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO

0.1U_0402_16V4Z

+3VS_DVDD

C609

12

R409

R409 20K_0402_1%

20K_0402_1%

1

2

1

2

60mil

C602

L47

MBK1608301YZF_0603

C610

C610 10U_0805_10V4Z

10U_0805_10V4Z

10mil

1

2

12

C608 22P_0402_50V8J

1 2

C585

C585 10U_0805_10V4Z

10U_0805_10V4Z

4 2

8

HP_LEFT (33) HP_RIGHT (33) AMP_LEFT (33) AMP_RIGHT (33)

HDA_BITCLK_AUDIO (14)

HDA_SDIN0 (14)

WOOFER_MONO (33)

AGND

Compal Secret Data

2006/08/18 2007/8/18

E

Compal Secret Data

Deciphered Date

F

28.7K for Module Design (VDDA = 4.702)

U29

VIN

SENSE or ADJ

DELAY ERROR7CNOISE SD

SI9182DH-AD_MSOP8

+3VS

VOUT

GND

5 6 1 3

0.1U_0402_16V4Z

1

2

(output = 250 mA)

40mil

C601

30K_0402_1%

1 2 12

1

R408

2

R407

R407 10K_0402_1%

10K_0402_1%

+VDDA

4.85V

C588

C588 10U_0805_10V4Z

10U_0805_10V4Z

EMI Added 2007/4/12

+3VS

C687 1000P_0402_50V7K

1 2

C688 1000P_0402_50V7K

1 2

+5VS

GND GNDA

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

SCHEMATIC, M/B LA-3581P 401474

401474

G

C689 1000P_0402_50V7K

1 2

C690 1000P_0402_50V7K

1 2

R404 0_0805_5%

1 2

R406 0_0805_5% R406 0_0805_5%

1 2

R405 0_0805_5% R405 0_0805_5%

32 43Tuesday, November 27, 2007

H

C

A

Dr-Bios.com

HPF Fc = 604Hz

C603

0.47U_0603_16V4Z

1 1

AMP_RIGHT(32)

AMP_LEFT(32)

Gain= 14dB

+5VAMP

12

R422

R422 30K_0402_5%

30K_0402_5%

VOL_AMP

12

R420

R420 100K_0402_1%

100K_0402_1%

2 2

HP_RIGHT(32)

HP_LEFT(32)

C680

0.01U_0402_16V7K

0.01U_0402_16V7K 1

2

1 2 1 2

C599

0.47U_0603_16V4Z

C596 2.2U_0805_10V6K

HP_RIGHT HP_RIGHT_C

C593 2.2U_0805_10V6K

HP_LEFT

13

D

G

Q53

S

C599

560_0402_5%

EC_MUTE

2

2N7002_SOT23

AMP_RIGHT_C-1 AMP_LEFT_C-1

12

R414

12

HP_LEFT_C

12

PVT Modify 2007/3/12

To AUDIO/B Connector

JP13

2 HPOUT_L_2 HPOUT_R_2

LINE_R_R LINE_L_R

MIC2_R_1 MIC2_L_1

+5VAMP

WOOFER_MONO(32)

EC_MUTE(27,28)

3 3

4 4

EC_MUTE

+3VALW

SW1

SW1 XRE094PHDINB1-2-12-E-7016_3P

XRE094PHDINB1-2-12-E-7016_3P

4

GND

5

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930

GND31GND

ACES_88107-30001

10K_0402_5%

2

A

1

COM

3

B

R400

+3VS

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

12

SPDIF SPDIF_PLUG#

HPP_PLUG# LINEIN_PLUG# MIC_PLUG#

BATT_GRN_LED# BATT_AMB_LED# PWR_LED# PWR_SUSP_LED#

R401

R401 10K_0402_5%

10K_0402_5%

1 2

R402 10K_0402_5% R402 10K_0402_5%

1 2

R399 10K_0402_5%

+5VALW

S/PDIF Jack LINE-IN Jack MIC-IN Jack Sub-Woofer Lid Switch

+3VS

1 C559

C559

2

0.01U_0402_16V7K

Volume Control Circuit

A

B

PVT Modify 2007/3/12

+3VS

+5VAMP

AMP_RIGHT_C

1 2

C604 1U_0603_10V4Z

AMP_LEFT_C

1 2

C600 1U_0603_10V4ZC600 1U_0603_10V4Z

12

R416

R416 560_0402_5%

560_0402_5%

R423 100K_0402_5%

1 2

R417 100K_0402_5%

+5VAMP

+5VSPDIF

BATT_GRN_LED# (27,28,30) BATT_AMB_LED# (27,28,30) PWR_LED# (30) PWR_SUSP_LED# (30)

LID_SW# (27,28,30)

U28 NC7SZ14P5X_NL_SC70-5U28 NC7SZ14P5X_NL_SC70-5

1 C562

C562

2

0.01U_0402_16V7K

1 2

R412 39K_0402_5%

1 2

R410 39K_0402_5%

C592

C592 1U_0603_10V4Z

1U_0603_10V4Z

C557

1 2

5NC1

0.1U_0402_16V4Z

P

4

A2Y

G

3

B

1

2

+5VSPDIF

+5VAMP

+3VALW

R523 0_0603_5%

1 2

R524 0_0603_5%

1 2

HP_LEFT_R

1

C598

2.2U_0805_10V6K

2.2U_0805_10V6K 2

C488

0.1U_0402_16V4Z

C621

0.1U_0402_16V4Z

C620

0.1U_0402_16V4Z

27 24

VOL_AMP

26 28 12

14 25

PVT Modify 2007/3/12

JP4

ACES_88266-02001

+3VS

12

R403

R403 100K_0402_5%

100K_0402_5%

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C563

C563

2

ENCODER_DIR (27,28) ENCODER_PULSE (27,28)

C

20mil

+5VSPDIF

SPKL+ SPKL-

SPKR+

20mil

HPOUT_L_1 HPOUT_R_1

+5VAMP

S

D

1 3

G

2

Q43

Q43 AO3413_SOT23-3

AO3413_SOT23-3

1 2

L36 FBM-11-160808-700T_0603 L36 FBM-11-160808-700T_0603

1 2

L35 FBM-11-160808-700T_0603 L35 FBM-11-160808-700T_0603

@

1

C679

0.1U_0402_16V4Z

2

U31

3

INR_A

5

INL_A /AMP EN HP EN

4

INR_H

6

INL_H /SD BEEP CP+

CPBIAS

APA2057A_TSSOP28

C606

0.1U_0402_16V4Z

19

11

CVDD

HVDD

20

10

PVDD

1

VDD

ROUT+ ROUT-

LOUT+

LOUT-

HP_R

HP_L

CVSS

VSS

GND PGND PGND CGND

GND

Int MIC Conn.

+5VAMP

1

2

22 21

8 9

17 18

15 16 2

23 7 13 29

W=40mil

1

C595

2

4.7U_0805_10V4Z

SPKR+ SPKR-

SPKL+ SPKL-

HPOUT_R HPOUT_LHP_RIGHT_R

1

C591

C591 1U_0603_10V4Z

1U_0603_10V4Z

2

R285 51_0402_1%

HPOUT_L

R284 51_0402_1%

MIC2_VREFO

1 2 1 2

PVT Modify 2007/3/12 FOR EMI

2

3

@

PSOT24C-LF-T7_SOT23-3

D28

1

+3VS

14 13 12 11 10 09 08

C

INT_MIC_R

C558

1

2

MIC_R

1

2

3

G1

4

G2

1 2 3 4 5 6 7

1 2

L57 MBK1608121YZF_0603L57 MBK1608121YZF_0603

1 2

L58 MBK1608121YZF_0603L58 MBK1608121YZF_0603

MIC_R

U27

CD1#

VCC

D1

CD2#

CP1

D2

SD1#

CP2

Q1

SD2#

Q1#

Q2

GND

Q2#

TC74LCX74FT_TSSOP14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R106

2.2K_0402_5%

INT_MIC_R (32)

1

15mil

C65

C65 220P_0402_50V7K

220P_0402_50V7K

2

15mil

LINE_R(32) LINE_L(32)

MIC1_R(32) MIC1_L(32)

0.1U_0402_16V4Z

2006/08/18 2007/8/18

1 2

L49

1 2

L50

220P_0402_50V7K

Compal Secret Data

Deciphered Date

L51 FBM-11-160808-700T_0603L51 FBM-11-160808-700T_0603

1 2

LINE_L LINE_L_R

1 2

L48 FBM-11-160808-700T_0603L48 FBM-11-160808-700T_0603

12

R426

2.2K_0402_5%

2.2K_0402_5% FBM-11-160808-700T_0603

FBM-11-160808-700T_0603 FBM-11-160808-700T_0603

FBM-11-160808-700T_0603

1

C616

2

D

Speaker Conn.

L63 FBM-11-160808-700T_0603

1 2 1 2

L64 FBM-11-160808-700T_0603

L65 FBM-11-160808-700T_0603

1 2 1 2

L66 FBM-11-160808-700T_0603

+5VAMP

12

R468

R468 100K_0402_5%

100K_0402_5%

SPDIF_PLUG#

HPOUT_L_2 HPOUT_R_2HPOUT_R

1

C613

C613 220P_0402_50V7K

220P_0402_50V7K

2

MIC1_VREFO_RMIC1_VREFO_L

R425

2.2K_0402_5%

C615

220P_0402_50V7K

D

1 2 13

D

2

G

Q61

S

2

C468

C468 330P_0402_50V7K

330P_0402_50V7K

1

SPDIF(32)

+5VSPDIF

C460

100P_0402_50V8J

LINEIN_PLUG#(32)

LINE_R_RLINE_R

1

C614

220P_0402_50V7K

2

12

MIC_PLUG#(32)

1

2

R549

R549 100K_0402_5%

100K_0402_5%

2N7002_SOT23

2

1

MIC2_R_1 MIC2_L_1

Title

Size Document Number Rev

Date: Sheet of

JP3

SPK_L+ SPK_L-

SPK_R+ SPK_R-SPKR-

JP3

1

2

3

G1

4

G2

ACES_88266-02001

JP34

1

2

3

G1

4

G2

ACES_88266-02001

MP Modify 2007/4/12

HP_PLUG#

13

D

2

G

Q60

S

2N7002_SOT23

S/PDIF Out JACK

LINE Out/Headphone Out

@

R564 0_0402_5%

R564 0_0402_5% R565 0_0402_5%R565 0_0402_5%

C467

C467 330P_0402_50V7K

330P_0402_50V7K

HPP_PLUG#

SPDIF_PLUG#

1

2

LINEIN_PLUG#

MIC_PLUG#

SCHEMATIC, M/B LA-3581P

B

401474

@

1 2

JP31

JP31 1 2 6 3

5 4

7 8

10

9

SINGA_2SJ-E373-T01

JP33

JP33 8 7

5 4 3

6 2 1

SINGA_2SJ-E351-S03

LINE-IN JACK

(HDA Jack)

JP32

JP32 8 7

5 4 3

6 2 1

SINGA_2SJ-E351-S01

MIC JACK

(HDA Jack)

Compal Electronics, Inc.

E

HP_PLUG# (32)

33 43Tuesday, November 27, 2007

C

A

Dr-Bios.com

+3VALW TO +3VS

+3VS

12

1

C21

C21 1U_0603_10V4Z

1U_0603_10V4Z

2

5VS_GATE

100K_0402_5%

1 2

12

R20

1M_0402_1%@

13

D

S

+3VALW

U1

8

S

D

1 1

7

D

6

D

5

D

SI4800BDY_SO8

1

C19

C19 10U_0805_10V4Z

10U_0805_10V4Z

2

S S

G

1

C15

C15 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2 3 4

R28 20K_0402_1%R28 20K_0402_1%

C24

0.1U_0603_25V7K

1 2

+5VALW TO +5VS

+5VALW

8 7 6

2 2

5

1

2

+5VS

U19

1

S

D

2

S

D

3

S

D

4

G

D

SI4800BDY_SO8

SI4800BDY_SO8 C419

C419

4.7U_0805_10V4Z

1

2

C423

0.1U_0603_25V7K

1 2

C401

4.7U_0805_10V4Z

5VS_GATE

1

C400

C400 1U_0603_10V4Z

1U_0603_10V4Z

2

D

S

+5VS

1 2 13

R267

Q32

+1.8V TO +1.8VS

+1.8V

U17

3 3

4 4

1 2 13

D

S

8

D

7

D

6

D

5

D

SI4856ADY-T1-E3_SO8

1

C395

4.7U_0805_10V4Z

2

R180

R180 470_0402_5%

470_0402_5%

2

G

Q22

2N7002_SOT23

U17

S S S G

1 2 3 4

C392

0.1U_0603_25V7K

1 2

+1.5VS+2.5VS

1 2 13

D

Q17

S

1

C391

4.7U_0805_10V4Z

2

1 2

R131

R131 470_0402_5%

470_0402_5%

2

G

2N7002_SOT23

1

2

R266

60.4K_0402_1%

C390

C390 1U_0603_10V4Z

1U_0603_10V4Z

5VS_GATE

+0.9V

R153

R153 470_0402_5%

470_0402_5%

1 2 13

D

2

G

Q20

S

2N7002_SOT23 @

+1.8VS

SYSON#

@

A

R21

2

G

Q5

Q5 2N7002_SOT23

2N7002_SOT23

470_0402_5%

SUSP

2

G

2N7002_SOT23

SUSP

+1.8V

B

+1.8VS

B

D

S

D

S

+VSB

1 2 13

+3VS

1 2 13

D

Q6

S

R264

R264 470_0402_5%

470_0402_5%

SUSP

2

G

Q31

2N7002_SOT23

R185

R185 470_0402_5%

470_0402_5%

SYSON#SUSPSUSP

2

G

Q23

2N7002_SOT23

R22

R22 470_0402_5%

470_0402_5%

SUSP

2

G

2N7002_SOT23

C

D

+1.2VALW TO +1.2V_HT

+1.2VALW

1

2

U2

8

S

D

7

S

D

6

S

D

5

G

D

SI4800BDY_SO8

C49

C49 10U_0805_10V4Z

10U_0805_10V4Z

1 2 3 4

1

C33

C33 1U_0603_10V4Z

1U_0603_10V4Z

2

1.2VHT_GATE

C505

0.1U_0603_25V7K

1 2

12

R330

+1.2V_HT

1

C32

C32 10U_0805_10V4Z

10U_0805_10V4Z

2

1M_0402_1%@

R326

100K_0402_5%

1 2

13

D

Q41

S

2N7002_SOT23

2

G

VLDT_EN#

+VSB

+1.2V_HT

D

S

R42

R42 470_0402_5%

470_0402_5%

1 2 13

2

G

Q7

Q7 2N7002_SOT23

2N7002_SOT23

VLDT_EN#

+1.2VALW TO +1.2VS

+1.2VALW

1

2

U24

8

S

D

7

S

D

6

S

D

5

G

D

SI4856ADY-T1-E3_SO8

C158

C158 22U_0805_6.3V6M

22U_0805_6.3V6M

1 2 3 4

C515

0.1U_0603_25V7K

1 2

1

C521

C521 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2

1

2

R363

60.4K_0402_1%

C517

C517 1U_0603_10V4Z

1U_0603_10V4Z

5VS_GATE

+1.2VS

1 2 13

D

S

R109

R109 470_0402_5%

470_0402_5%

SUSP

2

G

Q13

2N7002_SOT23

+3VALW TO +3V_SB(MCP67 AUX Power)

+3VALW

U35

S

D

S

D

S

D

G

D

SI4800BDY_SO8

3V_GATE

Deciphered Date

1 2 3 4

8 7 6 5

1

C637

2

10U_0805_10V4Z

R447

R447 200K_0402_5%

200K_0402_5%

2N7002_SOT23

12

13

D

2

G

Q49

G

Q49

S

Compal Secret Data

+VSB

SBPWR_EN#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

C

+3V

1

C638

C638 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C639

0.1U_0603_25V7K

2

1

C636

2

1U_0603_10V4Z

D

S

R446

R446 470_0603_5%

470_0603_5%

1 2 13

2

G

Q48

Q48 2N7002_SOT23

2N7002_SOT23

E

+5VALW

R39

R39 10K_0402_5%

10K_0402_5%

2

Q8

2

Q34

SYSON#

2

12

Q25

2

Q51

Q51 2N7002_SOT23

2N7002_SOT23

E

1 2

13

G

2N7002_SOT23

+5VALW

1 2

13

G

2N7002_SOT23

+5VALW

1 2

13

G

2N7002_SOT23

+5VALW

1 2

13

G

34 43Tuesday, November 27, 2007

D

S

R273

R273 10K_0402_5%

10K_0402_5%

D

S

R227

R227 10K_0402_5%

10K_0402_5%

D

S

R457

R457 10K_0402_5%

10K_0402_5%

D

S

VLDT_EN#

VLDT_EN(15)

R31

R31 100K_0402_5%

100K_0402_5%

SUSP(39)

SUSP#(23,26,27,28,38)

R272

R272 100K_0402_5%

100K_0402_5%

SYSON#(39)

SYSON(26,27,28,40)

R223

R223 100K_0402_5%

100K_0402_5%

SBPWR_EN#

SBPWR_EN#(13)

SBPWR_EN(22,27,28,40)

R458

R458 100K_0402_5%

100K_0402_5%

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

B

401474

Date: Sheet of

SUSP

SYSON

SBPWR_EN#

12

C

A

Dr-Bios.com

PJP1

6

G2

5

G1

4

1 1

2 2

3 3

+CHGRTC

3

2

1

E&T_4510-E04C-01R

BATT+

51ON#(30,31)

3.3V

PR16

1 2

560_0603_5%

1 2

560_0603_5%

PD4

RB751V-40TE17_SOD323-2

CHGRTCP

PR10

100K_0402_5%

PR11

22K_0402_5%

1 2

RTCVREF

PR17

12

PC8

12

PC1

560P_0402_50V7K

12

PC5

PU1 G920AT24U_SOT89-3

3

OUT

4.7U_0805_6.3V6K

12

0.22U_1206_25V7K

GND

1

PL1

FBMA-L18-453215-900LMA90T_1812

1 2

PC2

12

IN

12P_0402_50V8J

2

PC3

PR9

33_1206_5%

PQ4

TP0610K-T1-E3_SOT23-3

13

2

12

PR15

PR15 200_0805_5%

200_0805_5%

12

PC7

PC7 1U_0805_25V4Z

1U_0805_25V4Z

12

PC4

12P_0402_50V8J

VIN

PD3

RLS4148_LLDS2

1 2 12

12

PC6

0.1U_0603_25V7K

560P_0402_50V7K

VS

B

VINADPIN

12

PR1

PR1 10_1206_5%

10_1206_5%

12

PD1

RLZ24B_LL34

MAINPWON(6,36,37)

ACON(38)

ACIN

Precharge detector

Min. typ. Max. H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V

BATT ONLY

VIN

PD5

2 3

RB715F_SOT323-3

PD2

RLS4148_LLDS2

PR14

100K_0402_1%

1

RTCVREF

12

VL

12

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

ACOFF(27,28,38)

PC10

0.1U_0603_25V7K

PR3

PR2

PR4

PR7

1

C

VS

O

PR20

34K_0402_1%

2

PR12

2.2M_0402_5%

12

PU2A

PU2A LM393DR_SO8

LM393DR_SO8

8

3

P

+

2

-

G

4

12

PR5

13

12

PC11

1000P_0402_50V7K

12

PR6

100K_0402_5%

PQ2

PQ2 DTC115EUA_SC70-3

DTC115EUA_SC70-3

32.4

D

S

12

PR22

@PR22

@

66.5K_0402_1%

2

12

PR18

191K_0402_1%

PRG++

13

PQ5

2

G

RHU002N06_SOT323-3

G

RHU002N06_SOT323-3

TP0610K-T1-E3_SOT23-3

13

2

12

PR8

100K_0402_5%

13

PQ3

PQ3 DTC115EUA_SC70-3

DTC115EUA_SC70-3

499K_0402_1%

13

PQ1

B+

PR19

PR21

47K_0402_5%

PQ6

PQ6 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

B+

12

PR13

PR13 499K_0402_1%

499K_0402_1%

12

D

PC9

0.01U_0402_25V7K

+5VALW

PACIN (37,38)

Precharge detector

Min. typ. Max.

4 4

H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

Compal Secret Data

2006/09/01 2007/09/01

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

D

35 43Tuesday, November 27, 2007

C

A

Dr-Bios.com

B

C

D

B+

1 1

+3VALWP

1

+

PR26

PC18

2

6.81K_0402_1%

330U_D3L_6.3VM_R25M

2 2

+3VALWP Ipeak = 8.57A; Imax = 6A

3 3

PL2

FBMA-L18-453215-900LMA90T_1812

1 2

PC13

PL3

S COIL 8.2UH +-20% MPL73-8R2 4A

1 2

A2 modify

PR28

825_0402_1%

10K_0402_1%

825_0402_1%

1 2

PC21

0.22U_0603_16V7K

1 2

PR30

1 2

12

4.7U_1206_25V6K

PR23

1 2

2.21K_0402_1%

12

1000P_0402_50V7K

VS

PZD1

RLZ5.1B_LL34

12

PC12

2200P_0402_50V7K

12

PR1764.7_1206_5%

12

1 2

DCR = 68m ohm(max) ; Rcs = 16.04m ohm DCR = 64m ohm(typical) ; Rcs = 15.06m ohm Ilimit = 185mV/16.04m ~ 215mV/15.06m

= 11.53A ~ 14.28A Iocp(mean) = Ilimit -Delta I/2

=10.442A~13.172A

Delta I=((Vin-Vo)*D)/(F*L)

=((19-3.3)*(3.3/19))/(300K*8.2U) =1.108A

MAX8744_B+ MAX8744_B+

5

PQ7

SI4800BDY-T1-E3_SO8

PQ10

PC137680P_0402_50V7K

SI4810BDY-T1-E3_SO8

12

PC23

PR34

100K_0402_5%

1 2

MAINPWON(6,35,37)

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

4

5

4

A3 modify

PR35

1 2

200K_0402_5%

1U_0603_6.3V6M

PC19

0.1U_0603_25V7K

1 2

0.1U_0603_25V7K

PC28

0.22U_0603_10V7K

1 2

12

PC29

PR24

2.2_0402_5%

12

PC93

@PC93

@

2VREF_8744

1 2

PC24 0.22U_0603_16V7K

PR38

@PR38

@ 0_0402_5%

0_0402_5%

1 2

PR41

47K_0402_5%@

MAX8744ETJ+_TQFN32_5X5

PU3

33

DH3

BST3A BST5A

12

LX3

DL3

CSH3

CSL3 FB3

1 2

12

@

EP

25

DH3

26

BST3

24

LX3

23

DL3

29

CSH3

28

CSL3

30

FB3

7

REF

2

DRVA

32

OUTA

31

FBA

4

SHDN

6

ON5

5

ON3

PR39

0_0402_5%

1 2

PR40

2VREF_8744

PC30

0.047U_0402_16V7K

1

1 2

ONA

0_0402_5%

FSEL

9

2VREF_8744

IN

DH5

BST5

LX5

DL5

PGND

CSH5

CSL5

FB5

LDO5

SKIP

PGOODA

PGOOD3

PGOOD5

ILIM

GND

8

PC14

1U_1206_25V7K

21

DH5

16 15

2.2_0402_5%

0.1U_0603_25V7K

LX5

17

18

19

CSH5

12

CSL5

13

FB5

11

VL

20

10

22

27

14

ILM

3

4.7U_1206_25V6K

1 2

4.7U_0805_6.3V6K

PR37

12

PC15

PC17

PR25

12

PC26

1 2

PR32 0_0402_5%@PR32 0_0402_5%@

1 2

PR70 0_0402_5%

1 2

499K_0402_1%@

12

PC16

2200P_0402_50V7K

4.7U_1206_25V6K

12

PC20

1 2

PC97

@PC97

@

0.1U_0603_25V7K

2VREF_8744

12

SPOK (37,40)

PR36

2VREF_8744

12

0_0402_5%

12

5

D8D7D6D

PQ8

PQ8 SI4800BDY-T1-E3_SO8

4

5

4

SI4800BDY-T1-E3_SO8

S1S2S3G

@

12

D8D7D6D

PR177

S1S2S3G

12

@

PC138

12

PC25

PC25 1000P_0402_50V7K

1000P_0402_50V7K

4.7_1206_5%

680P_0402_50V7K

1 2

PC22

1 2

0.22U_0603_16V7K

PR27

2.21K_0402_1%

A2 modify

PR29

825_0402_1%

PR31

1 2

PR33

1 2

10K_0402_1%

12

PL4

1 2

15.4K_0402_1%

1

+

PC27

150U_D2_6.3VM

2

PQ9SI4810BDY-T1-E3_SO8 PQ9SI4810BDY-T1-E3_SO8

+5VALWP Ipeak = 7.49A ; Imax = 5.3A DCR = 68m ohm(max) ; Rcs = 16.04m ohm DCR = 64m ohm(typical) ; Rcs = 15.06m ohm Ilimit = 185mV/16.04m ~ 215mV/15.06m

= 11.53A ~ 14.28A Iocp(mean) = Ilimit -Delta I/2

=10.032A~12.782A

Delta I=((Vin-Vo)*D)/(F*L)

S COIL 8.2UH +-20% MPL73-8R2 4A

+5VALWP

=((19-5)*(5/19))/(300K*8.2U)

Notes :

4 4

fESR<=fOSC/π ; fESR=1/(2*π*RESR*COUT)

=1.498A

ON3 = REF --->3.3V starts up delay 2ms after 5V starts up

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2006/09/01 2007/09/01

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

D

36 43Tuesday, November 27, 2007

C

A

Dr-Bios.com

BATT++

12

SUYIN_200275MR007G161ZL

1 1

SUYIN_200275MR007G161ZL

PJP2

1 2 3 4 5 6 7

TSA EC_SMC1 EC_SMD1

PJP2 battery connector

SMART Battery:

1.BATT+

2.BATT+

3.TS

2 2

4.SMC

5.SMD

6.GND

7.GND

PL7

HCB4532KF-800T90_1812

1 2

PC57

PC57 1000P_0603_50V7K

1000P_0603_50V7K

PR79

12

PC56

0.01U_0402_25V7K

12

PR78

100_0603_1%

B

BATT+

12

PR82

PR82 1K_0603_1%

1K_0603_1%

PR80

1 2

6.49K_0603_1%

+3VALWP

BATT_TEMP (27,28)

EC_SMB_CK1 (18,27,28,29) EC_SMB_DA1 (18,27,28,29)

C

PC59

1000P_0402_50V7K

D

PH1 under CPU botten side :

CPU thermal protection at 90 degree C

Recovery at 70 degree C

PR75

9.76K_0402_1%

PH1

12

VL

12

82.5K_0603_1%

1 2

12

PC60

100K_0603_1%_TH11-4H104FT

PR77

TM_REF1

12

1U_0805_16V7K

12

PC58

0.1U_0603_25V7K

12

5

+

6

-

PR81

150K_0402_1%

PR83

PR83 150K_0402_1%

150K_0402_1%

VS

442K_0603_1%

1 2

8

P

O

G

PU2B

LM393DR_SO8

4

12

PR76

VL

PR73

PR73 150K_0402_1%

150K_0402_1%

1 2

7

MAINPWON (6,35,36)

PR84

1M_0402_1%

VIN

12

PR85

84.5K_0402_1%

84.5K_0402_1% PR88

PR88

22K_0402_5%

3 3

12

PC61

1000P_0402_50V7K

PQ25

TP0610K-T1-E3_SOT23-3

B+

12

PR91

100K_0402_5%

PR93

22K_0402_5%

VL

PR94

PR94 100K_0402_5%

100K_0402_5%

PR95

1 2

0_0402_5%

SPOK(36,40)

4 4

1 2

PC65

0.1U_0603_25V7K

12

22K_0402_5%

1 2

13

D

PQ26

2

G

PQ26 RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

12

0.22U_1206_25V7K

PC63

13

2

A

B

+VSBP

12

PC64

0.1U_0603_25V7K

Vin Detector

Min. typ. Max. H-->L 16.976V 17.257V 17.728V L-->H 17.430V 17.901V 18.384V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/09/01 2007/09/01

22K_0402_5%

1 2

12

PR89

20K_0402_1%

Compal Secret Data

Deciphered Date

PC62

0.1U_0603_25V7K

C

1 2

3

+

2

-

PR92

10K_0402_5%

VS

8

PU6A

P

O

G

LM393DR_SO8

4

12

RTCVREF

1

RLZ4.3B_LL34

VIN

PR86

12

10K_0402_5%

12

PZD2

8

PU6B

5

P

+

7

O

6

-

G

LM393DR_SO8

4

Title

Size Document Number Rev

B

Date: Sheet of

PR87

10K_0402_5%

1 2

12

PR90

PR90 10K_0402_5%

10K_0402_5%

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

ACIN

PACIN

ACIN (15,18,27,28)

PACIN (35,38)

401474

37 43Tuesday, November 27, 2007

D

37 43Tuesday, November 27, 2007

C

A

Dr-Bios.com

B

C

D

Iada=0~4.74A(90W)

PQ11

PQ11 AO4407_SO8

AO4407_SO8

2

13

PQ16

PQ16 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PACIN

1 2

ACON

8 7

5

1 3

PR57

22K_0402_5%

2

PQ14

PQ14 DTA144EUA_SC70-3

DTA144EUA_SC70-3

VIN

1 1

12

PR43

PR43 47K_0402_1%

47K_0402_1%

2

13

D

PQ19

2

RHU002N06_SOT323-3

G

S

2 2

3 3

PACIN(35,37)

ACON(35)

ACOFF(27,28,35)

CP mode

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) where Vaclm=1.502V, Iinput=4.07A

CC=0.6~4.48A IREF=0.7224*Icharge IREF=0.43V~3.24V

BATT Type

2800mAH 4S pack

2800mAH 3S pack

4 4

Normal 4S LI-ON Cells

Charging Voltage (0x15)

17400mV

13050mV

16800mV

ADP_I = 19.9*Iadapter*Rsense

P2

PQ12

PQ12 AO4407_SO8

AO4407_SO8

4

12

150K_0402_1%

13

1 2 36

PC35

PR51

2

G

PQ23

PQ23 DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR44

PR44 200K_0402_1%

200K_0402_1%

0.1U_0603_25V7K

12

13

D

S

IREF(27,28)

1 2 3 6

6251VDD

3S/4S#(27,28)

PQ21

PQ21 RHU002N06_SOT323-3

RHU002N06_SOT323-3

3S/4S#

LOW

HIGH

LOW

4

FSTCHG(27,28)

1 2

PR49

47K_0402_5%

0.01U_0402_25V7K

PR59

80.6K_0402_1%

PR61

100K_0402_1%

CHGSEL

LOW

HIGH

8 7

5

1 2

PC36

5600P_0402_25V7K

PD14 1SS355TE-17_SOD323-2

A3 modify

13

2

PC45

1 2

ADP_I(27,28)

12

6251VREF

12

PR65

CHGSEL(27,28)

CP = 85%*Iada ; CP = 4.07A

PR42

P3

PQ17

PQ17 DTC115EUA_SC70-3

DTC115EUA_SC70-3

680P_0402_50V7K

CSON

PR54

1 2

10K_0402_1%

100P_0402_50V8J

12

PC51

0.01U_0402_25V7K

S

G

1 2

0.1U_0402_16V7K

@PC42

@

PC43 6800P_0402_25V7K

1 2

0.1U_0603_25V7K

2

PR42

0.02_2512_1%

0.02_2512_1% 1 2

PQ43 TP0610K-T1-E3_SOT23-3

12

PR167

100K_0402_1%

6251VDD

PR48

12

10K_0402_5%

10K_0402_5% 1 2

PC42 1 2

1 2

PC46

PC47

1 2

D

PQ24

PQ24 SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

PC132

13

1 2

274K_0402_1%

1 2

274K_0402_1%

12

PR50

PR55

PR55 100_0402_1%

100_0402_1%

6251VREF

PR64

PR169

Calibrate(27,28)

6251aclim

2

G

CV mode

17.20V

7

0

12.90V

16.80V

4 3

2

12

PC38

6251_EN

100K_0402_1%

12

13

D

PQ45

PQ45 RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

VS

8

PU5B

P

+

-

G

LM358ADR_SO8

4

B+

DCIN

13

PR168

100K_0402_1%

PU4

1

VDD

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

5 6

PQ13

PL5

FBMA-L18-453215-900LMA90T_1812

1 2

CSIN

CSIP

A3 modify

PQ44

13

DTC115EUA_SC70-3

12

DCIN

24

DCIN

23

ACPRN

22

CSON

21

CSOP

20

CSIN

PC44

19

CSIP

0.1U_0603_25V7K

18

PHASE

17

UGATE

BST_CHG BST_CHGA

16

BOOT

6251VDDP

15

VDDP

DL_CHG

14

LGATE

13

PGND

@

12

PC133

CSON

BATT_OVP(27,28)

2

1

RB715F_SOT323-3

12

PC37

0.1U_0603_25V7K

PR172 20_0603_5%PR172 20_0603_5%

1 2

PC41

0.047U_0603_16V7K

0.047U_0603_16V7K 1 2

1 2

PR53 20_0603_5%PR53 20_0603_5%

1 2

LX_CHG

DH_CHG

PR58

1 2

2.2_0603_5%

1 2

6251VREF

12

PR170

100K_0402_1%

@

2

B

12

@

@ PR171

PR171 20K_0402_1%

20K_0402_1%

0.01U_0402_25V7K

0.01U_0402_25V7K 10K_0402_5%

10K_0402_5%

1 2

12

PC54

PD15

FSTCHG

2 3

SUSP# (23,26,27,28,34)

PR52 20_0603_5%PR52 20_0603_5%

12

PR173 2.2_0603_5%PR173 2.2_0603_5%

12

PD9

PD9 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

4.7_0603_5%

4.7_0603_5% PR62

PR62

PC52

4.7U_0805_6.3V6K

A3 modify

6251_EN

1

C

@

@ PQ46

PQ46 2SC2411K_SOT23-3

2SC2411K_SOT23-3

E

3

PR68

0.01U_0402_25V7K

PC48

6251VDD

1

0

12

PC31

PC32

10U_1206_25V6M

CSON

CSOP

12

0.1U_0603_25V7K

VS

12

8

PU5A

3

P

+

2

-

G

LM358ADR_SO8

4

12

PC33

PC53

0.01U_0402_25V7K

12

PC34

0.1U_0603_25V7K

0.1U_0603_25V7K 2200P_0402_25V7K

2200P_0402_25V7K

PQ22

SI4800BDY-T1-E3_SO8

BATT+

12

845K_0603_1%

12

300K_0603_0.1%

12

200K_0402_1%

CHG_B+

12

5

D8D7D6D

PQ20

PQ20 SI4800BDY-T1-E3_SO8

SI4800BDY-T1-E3_SO8

S1S2S3G

4

10UH_PCMB104T-100MS_6A_20%

5

D8D7D6D

S1S2S3G

4

PR66

PR67

PR69

PQ13 AO4407_SO8

10K_0402_1%

1 2

12

28.2

28.2 PR175

PR175

4.7_1206_5%

4.7_1206_5% @

@

12

PC136

PC136 680P_0402_50V7K

680P_0402_50V7K @

@

AO4407_SO8 1 2 3 6

PR46

PL6

4

1 2

13

47K_0402_1%

28.2

8 7

5

PR45

1 2

PD6

1 2

1SS355_SOD323-2

PQ15

PQ15 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PD8

2

1 2

1SS355_SOD323-2

CHG

1 2

PR56

0.02_2512_1%

OVP voltage :

LI-4S :18.0V--BATT-OVP=2.677V BATT-OVP=0.1487*BATT+ LI-3S :13.50V--BATT-OVP=2.007V BATT-OVP=0.1487*BATT+

PR60

1 2

11.5K_0402_1%

PQ47

RHU002N06_SOT323-3

12

PC55

0.01U_0402_25V7K

6251VREF

65W/90W#(27,28)

VIN

12

PC40

0.1U_0603_25V7K

UMA@

2

G

PR47

1 2

200K_0402_1%

D

S

4 3

2.37K_0402_1%

12

13

D

S

ACOFF (27,28,35)

13

PACIN

2

PQ18

G

RHU002N06_SOT323-3

12

PR63

12

UMA@PR63

UMA@

VIN

12

PC49

10U_1206_25V6M

6251aclim

PR174

PR174 20K_0402_1%

20K_0402_1%

BATT+

PC50

10U_1206_25V6M

Normal 3S LI-ON Cells

Wake up charge while no communication

12600mV

HIGH

- HIGH HIGH 12.60V

A

12.60V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2007/09/012006/09/01

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

D

38 43Tuesday, November 27, 2007

C

5

Dr-Bios.com

4

3

2

1

+3VALW

1

PJP3

1

JUMP_43X118

1 2

JUMP_43X118

2

12

1 2

PC66

10U_0805_6.3V6M

PR97

10_0603_1%

PR97

10_0603_1%

PC74

0.1U_0603_25V7K

1 2

1

2

3

PU8

CM8562IS_PSOP8

VIN

PGND

VFB

AGND

VTT

VCCA

VTT4REFEN

AGND

9

+5VALW

8

7

6

5

12

PR101

200K_0402_1%

PC73

0.047U_0402_16V7K

1 2

13

D

S

1 2

PC69

1U_0603_16V6K

PR98

60.4K_0402_1%

PQ28

2

RHU002N06_SOT323-3

G

RTCVREF

12

1 2

PR102

PR102 0_0402_5%

0_0402_5%

SUSP (34)

+1.8V

1

PJP4

PC67

PQ27

2

G

1

JUMP_43X118

2

12

13

PR96

1K_0402_1%

D

S

+1.8V

PR100

1K_0402_1%

PU7

1

VIN

2

12

PC71

0.1U_0603_25V7K

3 4

12

PC72

PC72 22U_1206_10V6M

22U_1206_10V6M

GND REFEN VOUT

RT9173DPSP_SO8

+0.9VP

VCNTL

GND

6 5

NC

7

NC

8

NC

9

+3VALW

12

PC68

PC68 1U_0603_6.3V6M

1U_0603_6.3V6M

+2.5VSP

PC70

22U_1206_10V6M

D D

10U_0805_6.3V6M

PR99

PR99 0_0402_5%

0_0402_5%

SYSON#(34)

C C

1 2

RHU002N06_SOT323-3

JUMP_43X118

2

+3VALWP +3VALW

+5VALWP

+1.2VALWP

B B

+0.9VP

A A

112

PJP5

JUMP_43X118

112

PJP8

JUMP_43X118

112

PJP10

JUMP_43X118

112

PJP12

+1.8VP

2

+5VALW

2

+1.2VALW

2

+0.9V

+2.5VSP

+1.5VSP

+VSBP +VSB

JUMP_43X118

112

PJP6

JUMP_43X118

112

PJP9

JUMP_43X118

112

PJP11

JUMP_43X118

112

PJP13

2

+1.8V

2

+2.5VS

2

+1.5VS

2

+1.5VSP

PC77

22U_1206_10V6M

1 2

1

PJP7

1

2

JUMP_43X118

PC75

10U_0805_6.3V6M

12

10_0603_1%

PR103

1 2

PC79

0.1U_0603_25V7K

1 2

CM8562IS_PSOP8

1

VIN

2

VFB

3

VTT

VTT4REFEN

PR105

51K_0402_1%

PC78

0.047U_0402_16V7K

1 2

+5VALW

13

D

S

PU9

8

PGND

7

AGND

6

VCCA

5

AGND

9

12

1 2

PC76

1U_0603_16V6K

PR104

60.4K_0402_1%

PQ29

2

RHU002N06_SOT323-3

G

RTCVREF

12

1 2

PR106

PR106 0_0402_5%

0_0402_5%

SUSP (34)

JUMP_43X118

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2006/09/01 2007/09/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

Date: Sheet of

401474

Tuesday, November 27, 2007

39 43

1

39 43

C

5

Dr-Bios.com

+5VALW

4

3

2

1

D D

12

PC80

2.2U_0603_6.3V6K

10_0603_5%

B+

PL8

1 2

FBMA-L11-322513-151LMA50T_1210

Maximum continuous current=>6A

+1.8VP

Vout_1.8V

C C

1

+

PC92

2

330U_D2_2.5VY_R15M

Close to IC Side

Differential routing of feedback

B B

to VSSA1 and VOUT1 PIN

VFB=0.5V Vo=VFB*(1+PR122/PR127)=1.805V Ipeak=13.82A, Imax=9.68A Ton=(3.3E-12*(PR112+37K)*(Vout/VBat))+50ns

FDS6670AS:Rds(on)=>Typ:9 mOhm

Iocp=Ivalley+"Iripple%/2 Iripple=(vin-vout)*(Ton/L)=5.485A

A A

Ivalleymin=9E-6*(PR106/Rds(ON)max*1.4)=16.826A Ivalleymax=11E-6*(PR106/Rds(ON)typ*1.2)=30.657A

OCP==>19.5685A~33.3995A

SC413_B+

12

PC83

1UH_SIL104-1R0-R_11A_30%

12

PR113

26.1K_0402_1%

12

PR118

PR118 10K_0402_1%

10K_0402_1%

=3.3E-12*(820K+37K)*(1.805/19)+50ns=0.319us

4.7U_1206_25V6K

1 2

12

PC90

PC90 33P_0402_50V8K

33P_0402_50V8K

FB_1.8V

Max:11.5 mOhm

12

PL9

PC84

4.7U_1206_25V6K

SBPWR_EN(22,27,28,34)

D8D7D6D

S1S2S3G

8

S

2

1

+3VALW

12

@

@ PR123

PR123 100K_0402_5%

100K_0402_5%

5

PQ30

PQ30 SI4800BDY-T1-E3_SO8

SI4800BDY-T1-E3_SO8

PR110

4

DH_1.8V-1

1 2

0_0402_5%

PQ32

D6D5D7D

FDS6670AS_NL_SO8

4

G

S

3

SPOK(36,37)

5

12

PR107

@ PR165

@

0_0402_5%

10_0603_5%

VCCA_1.8 VCCA_1.2

12

PC81

SC413_B+

1000P_0402_50V7K

PR165

0_0402_5%

1 2

PR122

1 2

PR164

@PR164

@

0_0402_5%

4

PR108

PC82

1U_0603_10V6K

PC89

1 2

0.1U_0603_25V7K

PR116

1M_0402_5%

12

PC99

0.1U_0603_25V7K

12

PC94

BST_1.8V-1

12

1

PD13

PD13 CHP202UPT_SOT323-3

CHP202UPT_SOT323-3

2

3

BST_1.2V-1

PU10

PR166

@ PR166

@

PC86

1000P_0402_50V7K

1 2

820K_0402_5%

820K_0402_5% PC91

PC91

1 2

0.1U_0603_25V7K

PC98

1U_0603_10V6K

0_0402_5%

Deciphered Date

0_0402_5%

1 2

PR112

PR124

1 2

SC413_B+

12

SI4800BDY-T1-E3_SO8

SI4810BDY-T1-E3_SO8

12

PR117

0_0402_5%

1 2

PC100

0.1U_0603_25V7K

DL_1.8V

PC85

+5VALW

1 2

1U_0603_10V6K

1 2

PR111 30.1K_0402_1%

LX_1.8V

DH_1.8V

PR114

2.2_0402_5%

Vout_1.2VALWP VCCA_1.2 FB_1.2V

BST_1.8V

1 2

12

ILIM_1.8V

1

PGND1

2

DL1

3

VDDP1

4

ILIM1

5

LX1

6

DH1

7

BST1

8

EN/PSV2

9

TON2

10

VOUT2

11

VCCA2

12

FB2

13

PGD2

14

VSSA2

SC413TSTRT_TSSOP28

VFB=0.5V

VSSA1

PGD1

FB1 VCCA1 VOUT1

TON1

EN/PSV1

BST2

DH2

ILIM2

VDDP2

DL2 PGND2

LX2

28 27 26 25 24 23 22 21 20 19 18 17 16 15

FB_1.8V VCCA_1.8 Vout_1.8V

BST_1.2V

LX_1.2V ILIM_1.2V +5VALW DL_1.2V

PR115

1 2

2.2_0402_5%

PR119

1 2

30.1K_0402_1%

12

SYSON(26,27,28,34)

Security Classification

2006/09/01 2007/09/01

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/09/01 2007/09/01

3

Compal Secret Data

+3VALW

12

@

@ PR109

PR109 100K_0402_5%

100K_0402_5%

PQ31

DH_1.2V-1DH_1.2V

PQ33

2

MEM_VLD (15,31)

12

PC87

5

D8D7D6D

S1S2S3G

4

1.8UH_SIL104R-1R8PF_9.5A_30%

5

D8D7D6D

S1S2S3G

4

PC87

PL10

1 2

33P_0402_50V8K

FB_1.2V

4.7U_1206_25V6K

PC95

10K_0402_1%

12

PR121

PC88

SC413_B+

4.7U_1206_25V6K

Maximum continuous current=>6A

+1.2VALWP

Vout_1.2VALWP

12

PR120

15K_0402_1%

12

Close to IC Side

Differential routing of feedback to VSSA2 and VOUT2 PIN

VFB=0.5V Vo=VFB*(1+PR120/PR121)=1.25V Ipeak=8.54A, Imax=6A

Ton=(3.3E-12*(PR116+37K)*(Vout/VBat))+50ns

=0.2661us

SI4810BDY:Rds(on)=>Typ:16 mOhm

Max:20 mOhm Ivalleymin=9E-6*(PR119/Rds(ON)max*1.3)=10.419A Ivalleymax=11E-6*(PR119/Rds(ON)typ*1.1)=18.8125A Iripple=(vin-vout)*(Ton/L)=2.631A

"

Iocp=Ivalley+

Iripple%/2

OCP==>11.7345A~20.128A

Compal Electronics, Inc.

Title

SCHEMATIC, M/B LA-3581P

Size Document Number Rev

Custom

Tuesday, November 27, 2007

Date: Sheet of

401474

1

+

PC96

2

40 43

330U_D2_2.5VY_R15M

C

5

Dr-Bios.com

4

3

2

1

12

10_0402_5%

0_0402_5%

1 2

CPU_VCC_SENSE(6)

B+

+CPU_CORE

12

PC131

@PC131

@

1U_0805_16V7K

PR149

3 5

241

5

D8D7D6D

PQ35

S1S2S3G

4

PR147 0_0402_5%

1 2

3 5

241

5

PQ41

FDS6676AS_SO8

4

PR163

1 2

0_0402_5%

CPU_B+

12

PQ34

PQ34 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

5

D8D7D6D

PQ36

S1S2S3G

4

FDS6676AS_SO8

PQ38

PQ38 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

5

PQ42

D8D7D6D

S1S2S3G

FDS6676AS_SO8

4

D8D7D6D

S1S2S3G

12

PC102

PC101

4.7U_1206_25V6K

PR134

4.7_1206_5%

FDS6676AS_SO8

CPU_B+

PC122

PR159

12

PC134

PC103

PC104

0.01U_0402_25V7K

2200P_0402_50V7K

P_0.36H_ETQP4LR36WFC_24A_20%

1 2 12

PC113

12

4.7_1206_5%

4.7_1206_5% 1 2

12

1 2

12

PR137

1 2

680P_0603_50V7K

12

PC123

PC124

4.7U_1206_25V6K

2200P_0402_50V7K

PC128

680P_0603_50V7K

PL11

FBMA-L18-453215-900LMA90T_1812

1 2

12

PC135

330P_0402_50V7K

PL12

4.22K_0402_1%

PR139

2.1K_0402_1%

0.22U_0603_16V7K

12

4.7U_1206_25V6K

PH2

10KB_0603_5%_ERTJ1VR103J

1 2

PC115

PC125

0.01U_0402_25V7K

P_0.36H_ETQP4LR36WFC_24A_20%

1 2

PR160

4.22K_0402_1%

1 2

PR162

2.1K_0402_1%

1 2

PC130

0.22U_0603_16V7K

0.22U_0603_16V7K 1 2

CSP2

PL13

1

+

2

PH3

10KB_0603_5%_ERTJ1VR103J

1 2

PC105

100U_25V_M

PR140

19 31 32 33 34 35 36

1 17 37 38

6

12

8

3 10

7

2

4 39

4700P_0603_50V7K

+5VS

VCC D0 D1 D2

PU11

D3

MAX8774GTL+_TQFN40

D4 D5 PWRGD PHASEGD TWO-PH SHDN# TIME CCV POUT REF TON OFS VRHOT# SKIP#

EP

41

PC126

PR161

10_0402_5%

THRM

PGND1

CSP1 CSN1

PGND2

CSP2 CSN2

GNDS

12

VDD

BST1

DH1 LX1 DL1

GND

CCI

BST2

DH2 LX2 DL2

PC106

1 2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 25 5 30 29 28 26 27 16 15 18 40

IC

11

FB

9 20 21 22 24 23 13 14

CPU_VSS_SENSE(6)

2.2_0402_5%

DH1 LX1 DL1

1 2 1 2

AGND

PR144

2K_0603_1%

FB

1 2

PC117 470P_0603_50V8JPC117 470P_0603_50V8J

DH2 LX2 DL2

PC120 220P_0402_50V8JPC120 220P_0402_50V8J

1 2

PC121

PC121 220P_0402_50V8J

220P_0402_50V8J

1 2

12

PR156

PR156 100_0402_1%

100_0402_1%

PC108

PR129

0.01U_0402_25V7K

1 2

PC114

4700P_0402_25V7K

1 2

PR146 20K_0402_1%

1 2

12

PC109

0.22U_0603_16V7K

PC110

220P_0402_50V8J

PC111

220P_0402_50V8J

1 2

PR154

1 2

2.2_0402_5%

12

PC127

0.22U_0603_16V7K

PR131

0_0402_5%

1 2

PR145

100_0402_1%

1 2

4700P_0402_25V7K

12

PC112

@

4700P_0402_25V7K

PR158

PR158 0_0402_5%

0_0402_5%

PC129

@PC129

@

1 2

+3VS

12

D D

VID0(6) VID1(6) VID2(6) VID3(6) VID4(6) VID5(6)

VGATE(15)

+3VS

PR141

0_0402_5%

C C

VR_ON(15)

0_0402_5%

1 2

POUT(27,28)

1 2

PC118

0.1U_0603_25V7K

MAX8774_REF

1 2

PR151

31.6K_0402_1%

B B

PSI#(6)

A A

PR152

169K_0603_1%

2

G

CPU_B+

200K_0402_1%

2

PR142

@PR142

@

1 2

100K_0402_5%

PR148 10K_0402_1%

1 2

200K_0402_1%

12

13

D

PQ37

PQ37 RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

PR157

13

1

PQ40

PQ40 FDV301N_NL_SOT23-3

FDV301N_NL_SOT23-3

3

PR127 0_0402_5%

PR127 0_0402_5% PR128 0_0402_5%

PR128 0_0402_5%

PR130 0_0402_5%

PR130 0_0402_5% PR132 0_0402_5%

PR132 0_0402_5% PR133 0_0402_5%

PR133 0_0402_5%

PR135 0_0402_5%

1 2

PR136 0_0402_5%

1 2

PR138 100K_0402_1%

PR150

1 2

12

PR155

200K_0402_1%

2

G

12

PR126 PR126

10K_0402_5%

12 12

12 12 12 12

PR143 71.5K_0402_1%

1 2

PC119 0.1U_0603_25V7K

+3VS

12

13

D

PQ39

PQ39 RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

PR125 10_0402_5%

PC107

2.2U_0603_10V6K

1 2

MAX8774_VCC

12

150P_0402_50V8J

MAX8774_REF

PR153

0_0402_5%

PC116

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

5

4

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

2006/09/01 2007/09/01

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

41 43Tuesday, November 27, 2007

1

C

5

Dr-Bios.com

4

3

2

1

Version change list (P.I.R. List)

Page 1 of 2 for HW

Rev. PG# Modify List Date PhaseFixed IssueItem

D D

C C

B B

A A

BOM Change. Remove R144, R372, C160, C528.

1

Added SSC for Lan TXCLK. (EMI Request)

2

Improve Samsung Memory Module compatibility. 15 Added R540,R541 2.2K pull up +3VS.

3

Design Modify.(SCH Change)

4

BCIC0172 : When Reset or Cold Boot MCP67 ACIN

5

電壓過低

聲問題

.

被干擾

. 0.4 27 Added C660, C661, C662.

.

6

Design Modify.(SCH Change)

7

Added R-C for BUF_25Mhz (EMI Request).

8

Design Modify for EMI.

9

解決

10

11

12

13

14

15

16

17

18

+3VS 漏電 when enter S3 Mode. 25,260.4 Added Q56, Q57, Q58, Q59, R536, R537.

Design Modify for Acer WLAN LED. 0.4 25 JP21.44 Pin Added MINI1_LED# Net, Added R520, R521.

防止

BATT_TEMP, BATT_OVP, ACIN

Design Modify for Power. (65W/95W Detect Function) 0.4 27 U15.98 Pin Added 65W/95W# Net, Added R519 100K to +3VALW.

Design Modify for EMI. Added C663~C678.30

For AUDIO EA Test. Change C582, C583, C584, C587,C594, C597 to 4.7uF.320.4

解決關機

bo bo

Design Modify for EMI.

Change Codec Amp to APA2057RI-TRL_TSSOP28. Change U31 to SA00001QD00, added R523,R524.330.4

會漏電到

EC. D24 反向, 47K Pull High移除.Added R283 200K Pull Down.

0.4 PVT

0.4

0.4 33 Added L57, L58 for Mic. L63, L64, L65, L66 for SPK. D28 for ESD.

19

20

21

22

解決系統時間延遲問題

.

0.4 10~17Change MCP67-MV form A01 to A02. Change MCP67-MV form A01 to A02. PVT

0.3 11,25 Change WLAN Port form PCIE4 to PCIE2. DVT2Improve WLAN Module compatibility.

23

Change LAN to RTL8211B.

24

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT

SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR

EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

0.2 22 DVT1Change Page 22 all compnent.

3

12

Added U40, R525, R526, R527, R528, C682.

15

Change CRT_DET form GPIO_5 to LID#, Add R78 10K. (Bios Request)

15

16

Added R539 1K.RTC Battery

Change Q50.G Pin Net Name to SBPWR_EN.

22

Added R530,C684.

22

Added L59, L60, L61, L62, C685, C686.

22

Added Q53,C680.330.4

34Remove PJP14. 0.4

Remove PJP14.

Added D25,D27,D27, U39.22Fixed LAN LED work abnormal. DVT20.3

2

PVT

PVT0.4 Change C503, C504 form 18pF to 6.8pF.15

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

42 43Monday, December 03, 2007

1

C

5

Dr-Bios.com

4

3

2

1

Version change list (P.I.R. List)

Page 1 of 2 for HW

Rev. PG# Modify List Date PhaseFixed IssueItem

D D

C C

Change L61,L62, L69 to SM010031900. (EMI)

1

Remove C247, C251, C256, C265, C264, C263, C262, C260. (EMI)

2

Added R32 470E. (For Lan) 22

3

Added R94 10K. (For Lan)

4

Change R551,R552 from 1K to 0E. (For PCIE mini Card)

5

Remove R268 100K. (For New Card)

6

Remove C570 150uF Cap. (Cost Down)

7

Added R351,R354 15K.

8

Change C555,C556 from 10pF to 18pF. (For ENE request) 1.0 27

9

Add R567 . (For LAN 3rd cut SSIC ) 2.0 12

10

11

1.0 PVT2

1.0

2.0 12

22

11

26

21

14

PVT2

MP

MPAdded R530 . (For Lan)

B B

A A

Compal Electronics, Inc.

SCHEMATIC, M/B LA-3581P

401474

43 43Monday, December 03, 2007

1

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT

SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR

EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

DISCLOSED TO ANY THIRD PARTY WITHOUTPRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Acer Aspire 5220G, Aspire 5520G Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual