A
MODEL REV CHANGE LIST
1A Preliminary Release
ZL9
4 4
3 3
2 2
2A Page 4 : Add C573 4.7pf for Signal quanlity
Page 6 : Add R460 0om for UMA.
Page 11 : seprate SATALED# for IDE interrupt.
Page 14 :add R45 0ohm for M52-T.
Page 19 : enlarge H22,H23 to 6mm for VGA sink Nut.
Page 24 : Add 459 10Kohm for keep the GPIO normal Low.
Page 25 : Add R239 0ohm for Po Po sound.
Page 27 : Add R458 , Q25 for SATALED#.
Page 28 : PL14->0.6uH,PR122->680ohm,PR120->680ohm,PR118->470ohm,PC55->220P,PR38->160K for
power efficiency.
Page 30 : PR40->20K,PD11->CH551,PC39->.22U,PC46->2.2n,PL11->1.5UH,PR59->221K for power
efficiency.
Page 30 : PC176->1000P,PC182->1000P,PC179->1000P,PC180->100P,PC181->100P,PC177->1000P for
EMI.
Page 31 : PR142->0 , PR94->100K,PR95->0,PR93->100K for battery charger modify ,PC178->1000P for
EMI.
Page 32 : PR15->6.65K , PL6->1.0UH for power efficiency.
3A Page 25 : R250->100Kohm, Q13->2N7002,Q23->2N7002,Add Q24 AO3403 for SPDIF on/off LED.
Page 27 :Del R458 , Q25 for HDD LED can't light issue.
B
C
D
Model
Page FM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
ZL8
1A
1A
1A
2A
1A
2A
1A
1A
1A
1A
2A
1A
1A
2A
1A
1A
1A
1A
2A
2A
1A
1A
1A
2A
2A
1A
2A
2A
1A
2A
2A
2A
E
MB
TO
3A
3A
1 1
QUANTA
COMPUTER
A
PROJECT : ZL9
APPROVED BY : Vic Lin #15598
B
DOC. NO. ???
CHECKED BY: Jerry Lin #15573
ASSY: 31ZL9MB0020 REV: 1A
DRAWING BY : Jerry Wang #13011 DATE: 2005/12/20
C
D
E
1
2
3
4
5
6
7
8
CPU CORE
ZL9
SENTECH
SC451ITSTR
A A
Page:28
SYSTEM 3V/5V
MAXIM
CLOCK GEN
ICS954206
(RTM865T-433)
Page:4
CELERON-M/PENTIUM-M
INTEL Mobile_479 CPU
Page:2, 3
CRT
Page: 19
LVDS
Page: 19
MAX1999
+3VPCU
+3V_S5/+3VSUS
+3V
+5VPCU
+5VSUS
+5V
DDR-II SODIMM1
Page: 10
DDR-II
INTEL
ALVISO 915PM/GM
HOST BUS 533/400MHZ
NB
PCIE
ATi
M52-T
Page: 14, 15
16, 17
RGB
LVDS
UMA(option)
+15V
B B
Page:29
DDR-II SODIMM2
Page: 10
Page: 5, 6 , 7, 8
MINI-PCIE slot
Wireless LAN
(Option)
+1.8VSUS
+1.8V
+0.9VSUS
+0.9V
+1.5V
ON
NCP5214
SENTECH
SC1470
SATA HDD
Page: 20
PATA HDD
Page: 20
+1.5V_S5
SI9183-AD
+2.5V
C C
SENTECH
SC1565
+1.05V
SENTECH
SC4215
+1.2V
Page:30
SENTECH
SC4215
+NVVDD
SENTECH
SC1470
Page:32
D D
MIC IN
Page: 24 Page: 25 Page: 25 Page: 22
SPEAKER
IDE-ODD
Page: 20
AUDIO CODEC
Realtek
ALC883 (ALC260)
MAX9755
Page: 25
LINE OUT
Page: 24
MODEM AMP
Page: 24
ATA 66/100
ATA 66/100
ATA 66/100
HD Audio
RJ11
Touchpad
Page: 27
DMI I/F
SB
INTEL
ICH6-M
Page: 11 , 12 , 13
LPC 33MHZ
KBC
NS
PC97551/541V
Page: 26
Keyboard
Page: 27
FLASH
Page: 26
PCI-E BUS
PCI BUS 33MHZ
USB 2.0
FAN
Page: 27
SYSTEM
USB PORT *3
USB2,3,5
Page:21
Page: 21
TI PCMCIA
PCI1510
AD17
REQ1# / GNT1#
INTC#
Page: 23
MINI-PCI
Wireless LAN
AD20
REQ2# / GNT2#
INTB# , INTD#
Page: 21
REALTEK
RTL8100CL
AD24
REQ0# / GNT0#
INTA#
Bluetooth
USB
interface
USB4
Page: 22
Page:21
TYPE II
SLOT
Page: 23
RJ45
Page: 22
BATTERY CHARGER
MAXIM
MAX8724
Page:31
1
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet
Date: Sheet
2
3
4
5
6
Date: Sheet
7
Quanta Computer Inc.
of
of
of
13 2 Monday, December 19, 2005
13 2 Monday, December 19, 2005
13 2 Monday, December 19, 2005
8
3A
3A
3A
A
U22A
U22A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
U3
ADSTB0#
AE5
ADSTB1#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
N2
ADS#
A4
IERR#
N4
BREQ0#
J3
BPRI#
L1
BNR#
J2
LOCK#
K3
HIT#
K4
HITM#
L4
DEFER#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
M3
TRDY#
H1
RS0#
K1
RS1#
L2
RS2#
C2
A20M#
D3
FERR#
A3
IGNNE#
E4
PWRGOOD
B4
SMI#
A13
TCK
A12
TDO
C12
TDI
C11
TMS
B13
TRST#
A16
ITP_CLK0
A15
ITP_CLK1
B10
PREQ#
A10
PRDY#
A7
DBR#
D1
LINT0
D4
LINT1
C6
STPCLK#
A6
SLP#
B7
DPSLP#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
B17
PROCHOT#
Banias_Processor
Banias_Processor
REQUEST
REQUEST
PHASE
PHASE
SIGNALS
SIGNALS
ERROR
ERROR
SIGNALS
SIGNALS
ARBITRATION
ARBITRATION
PHASE
PHASE
SIGNALS
SIGNALS
SNOOP PHASE
SNOOP PHASE
SIGNALS
SIGNALS
RESPONSE
RESPONSE
PHASE
PHASE
SIGNALS
SIGNALS
PC
PC
COMPATIBILITY
COMPATIBILITY
SIGNALS
SIGNALS
DIAGNOSTIC
DIAGNOSTIC
& TEST
& TEST
SIGNALS
SIGNALS
EXECUTION
EXECUTION
CONTROL
CONTROL
SIGNALS
SIGNALS
THERMAL DIODE
THERMAL DIODE
R82 56_4 R82 56_4
R362 27.4/F_4 R362 27.4/F_4
R354 *54.9/F_4 R354 *54.9/F_4
R355 150_4 R355 150_4
R352 39_4 R352 39_4
R363 680_4 R363 680_4
T110 T110
T109 T109
+3V
HA#[3..31]
H_IERR#
R85 *54.9/F_4 R85 *54.9/F_4
R83 *54.9/F_4 R83 *54.9/F_4
R86 *54.9/F_4 R86 *54.9/F_4
R81 *54.9/F_4 R81 *54.9/F_4
A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#
HCLK_ITP
HCLK_ITP#
R348 56_4 R348 56_4
R350 56_4 R350 56_4
R346 150_4 R346 150_4
INTR
NMI
STPCLK#
CPUSLP#
DPSLP#
THERMDA
THERMDC
THERMTRIP#
CPU_PROCHOT#
A
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20 HD#17
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
BPM0#
BPM1#
BPM2#
BPM3#
TCK
TDO
TDI
TMS
TRST#
PREQ#
PRDY#
DBR#
HA#[3..31] {5}
4 4
HADSTB0# {5}
CPUPWRGD
200/F_4
200/F_4
R344
R344
+1.05V
CPUPWRGD {11}
THERMTRIP# {6,11}
HADSTB1# {5}
HBREQ0# {5}
+1.05V
STPCLK# {11}
CPUSLP# {5,11}
HREQ#0 {5}
HREQ#1 {5}
HREQ#2 {5}
HREQ#3 {5}
HREQ#4 {5}
ADS# {5}
+1.05V
BPRI# {5}
BNR# {5}
HLOCK# {5}
HIT# {5}
HITM# {5}
DEFER# {5}
+1.05V
HTRDY# {5}
RS#0 {5}
RS#1 {5}
RS#2 {5}
A20M# {11}
FERR# {11}
IGNNE# {11}
SMI# {11}
+1.05V
DBR# {12}
INTR {11}
NMI {11}
DPSLP# {11}
R104 56_4 R104 56_4
3 3
+1.05V
2 2
1 1
Banias
Banias
1 OF 3
1 OF 3
B
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
DATA
DATA
PHASE
PHASE
SIGNALS
SIGNALS
B
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DBI0#
DBI1#
DBI2#
DBI3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
B5
R353 54.9/F_4 R353 54.9/F_4
B11
C19
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HD#0
A19
HD#[0..63]
+1.05V
C
HD#[0..63] {5}
HDSTBN0# {5}
HDSTBP0# {5}
HDSTBN1# {5}
HDSTBP1# {5}
HDSTBN2# {5}
HDSTBP2# {5}
HDSTBN3# {5}
HDSTBP3# {5}
HDBI0# {5}
HDBI1# {5}
HDBI2# {5}
HDBI3# {5}
DBSY# {5}
DRDY# {5}
HCLK_CPU# {4}
HCLK_CPU {4}
CPUINIT# {11}
CPURST# {5}
DPWR# {5}
C
+3V
R371 47_6 R371 47_6
THERMDC
THERMDA
10 mil trace /
10 mil space
D
H/W MONITOR
15 MIL
3V_THM
C542
C542
.1U/10V_4
.1U/10V_4
C535
C535
2200P_4
2200P_4
U23
U23
1
VCC
DXN
SMDATA
DXP
SMCLK
-OVT4GND
G781
G781
-ALT
3
2
SLAVE ADDRESS: 98
+1.05V
THERMTRIP#
D
+3V
R370
R370
10K_4
10K_4
6
7
8
5
R365
R365
*56_4
*56_4
R387 33_4 R387 33_4
E
+3V
R369
R369
10K_4
10K_4
R367
R367
10K_4
10K_4
KBSMDAT
KBSMCLK
MAX6648_OV# {27}
+1.05V
2
Q18
Q18
1 3
PMBS3904
PMBS3904
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
CPU ( HOST BUS )-1
CPU ( HOST BUS )-1
CPU ( HOST BUS )-1
Date: Sheet
Date: Sheet
Date: Sheet
+3V
2
Q17
Q17
MBDATA
1
1
1999_SHT# {29}
Quanta Computer Inc.
Quanta Computer Inc.
3
2N7002
2N7002
+3V
2
Q16
Q16
MBCLK
3
2N7002
2N7002
MAX6648_AL# {26}
PROJECT : ZL9
PROJECT : ZL9
E
MBDATA {14,26,31}
MBCLK {14,26,31}
of
of
of
23 2 Monday, December 19, 2005
23 2 Monday, December 19, 2005
23 2 Monday, December 19, 2005
3A
3A
3A
A
18 MIL
R385
R385
2K/F_6
2K/F_6
COMP0
COMP2
COMP1
COMP3
GTLREF0
0.5" max
5 MIL
+1.5V
C551
C551
.01U/16V_4
.01U/16V_4
R114 27.4/F_4 R114 27.4/F_4
R77 27.4/F_4 R77 27.4/F_4
R383 54.9/F_4 R383 54.9/F_4
R345 54.9/F_4 R345 54.9/F_4
+1.05V
R384 1K/F_6 R384 1K/F_6
4 4
3 3
COMP0 ~ 4 max length 500 MIL
DPRSLP# {11}
+1.05V
A0 : STUFF
A1 : NC
R386 0_8 R386 0_8
CPU_VCCA
C552
C552
.01U/16V_4
.01U/16V_4
PLACE one 10U & one 0.01U for each VCCA pin
10U/6.3V/X5R(CC0805) *30
C241
C241
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
C232
C232
C532
C532
2 2
1 1
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
C536
C536
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
C524
C524
10U/6.3V_8
10U/6.3V_8
C230
C230
10U/6.3V_8
10U/6.3V_8
C244
C244
10U/6.3V_8
10U/6.3V_8
A
C233
C233
10U/6.3V_8
10U/6.3V_8
C210
C210
10U/6.3V_8
10U/6.3V_8
C519
C519
10U/6.3V_8
10U/6.3V_8
C231
C231
10U/6.3V_8
10U/6.3V_8
C245
C245
10U/6.3V_8
10U/6.3V_8
C529
C529
10U/6.3V_8
10U/6.3V_8
C243
C243
10U/6.3V_8
10U/6.3V_8
C246
C246
10U/6.3V_8
10U/6.3V_8
C533
C533
10U/6.3V_8
10U/6.3V_8
C214
C214
10U/6.3V_8
10U/6.3V_8
C215
C215
10U/6.3V_8
10U/6.3V_8
C227
C227
10U/6.3V_8
10U/6.3V_8
C541
C541
C209
C209
C242
C242
B
R343 56_4 R343 56_4
CPU_VCCA
VCC_CORE
C240
C240
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
VCC_CORE
C212
C212
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
VCC_CORE
C228
C228
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
B
C211
C211
C213
C213
C229
C229
T119 T119
T103 T103
R84
R84
*1K_4
*1K_4
T118 T118
T7T7
T102 T102
COMP0
COMP1
COMP2
COMP3
TEST1
TEST2
R115
R115
*1K_4
*1K_4
VCC_CORE
P25
P26
AB2
AB1
AD26
E26
AC1
F23
AC26
F26
D18
D20
D22
E17
E19
E21
F18
F20
F22
G21
H22
K22
V22
W21
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
G1
C5
N1
B1
D6
D8
E5
E7
E9
F6
F8
G5
H6
J5
J21
U5
V6
W5
Y6
U22B
U22B
COMP0
COMP1
COMP2
COMP3
GTLREF0
GTLREF1
GTLREF2
GTLREF3
TEST1
TEST2
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Banias_Processor
Banias_Processor
Banias
Banias
2 OF 3
2 OF 3
POWER,
POWER,
GROUND,
GROUND,
RESERVED
RESERVED
SIGNALS
SIGNALS
C
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS
E25
VSS
F1
VSS
F4
VSS
F5
VSS
F7
VSS
F9
VSS
F11
VSS
F13
VSS
F15
VSS
F17
VSS
F19
VSS
F21
VSS
F24
VSS
G2
VSS
G6
VSS
G22
VSS
G23
VSS
G26
VSS
H3
VSS
H5
VSS
H21
VSS
H25
VSS
J1
VSS
J4
VSS
J6
VSS
J22
VSS
J24
VSS
K2
VSS
K5
VSS
K21
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L22
VSS
L25
VSS
M1
VSS
M4
VSS
M5
VSS
M21
VSS
M24
VSS
N3
VSS
N6
VSS
N22
VSS
N23
VSS
N26
VSS
P2
VSS
P5
VSS
P21
VSS
P24
VSS
R1
VSS
R4
VSS
C
R351 *54.9/F_4 R351 *54.9/F_4
R349 *54.9/F_4 R349 *54.9/F_4
SELPSB1_CLK {4,6}
SELPSB2_CLK {4,6}
D
U22C
+1.05V
CPU_VID0 {28}
CPU_VID1 {28}
CPU_VID2 {28}
CPU_VID3 {28}
CPU_VID4 {28}
CPU_VID5 {28}
Z0501
Z0502
T104 T104
T108 T108
T106 T106
T101 T101
C538
C538
.1U/10V_4
.1U/10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
D
U22C
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
VCCP5
E15
VCCP6
F10
VCCP7
F12
VCCP8
F14
VCCP9
F16
VCCP10
POWER, GROUND AND NC
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
P23
W4
E2
F2
F3
G3
G4
H4
AE7
AF6
B2
AF7
C14
C3
C16
E1
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
CPU ( POWER )-2
CPU ( POWER )-2
CPU ( POWER )-2
POWER, GROUND AND NC
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
VCCP26
VID0
VID1
VID2
VID3
VID4
VID5
VCCSENSE
VSSSENSE
NC0
NC1
NC2
NC3
TEST3
PSI
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Banias_Processor
Banias_Processor
C525
C525
.01U/16V_4
.01U/16V_4
C540
C540
.1U/10V_4
.1U/10V_4
Banias
Banias
3 OF 3
3 OF 3
VID
VID
C528
C528
10U/6.3V_8
10U/6.3V_8
C527
C527
.1U/10V_4
.1U/10V_4
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Quanta Computer Inc.
E
C534
C534
10U/6.3V_8
10U/6.3V_8
C539
C539
.01U/16V_4
.01U/16V_4
E
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.05V
C221
C221
150U/6.3V_7343
150U/6.3V_7343
C526
C526
.01U/16V_4
.01U/16V_4
33 2 Monday, December 19, 2005
33 2 Monday, December 19, 2005
33 2 Monday, December 19, 2005
of
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
3A
3A
3A
1
FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33
A A
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 RSVD 100 33
+3V
+1.05V +3V +1.05V
B B
R399
R399
*1K_4
*1K_4
SELPSB2_CLK SELPSB0_CLK SELPSB1_CLK
R121
R121
*0_4
*0_4
C C
D D
PCLK_SMB {12,21} SMBCK {10}
R419
R419
*1K_4
*1K_4
R418
R418
*0_4
*0_4
1
R407
R407
10K_4
10K_4
R406
R406
*10K_4
*10K_4
+3V
3
+3V
3
2
DOTHAN-A 400
DOTHAN-A 533
L56 ACB2012L-120_8 L56 ACB2012L-120_8
R151 1_6 R151 1_6
+3V
L55 ACB2012L-120_8 L55 ACB2012L-120_8
2
4
RP44
RP44
10K_4P2R_S
1
10K_4P2R_S
1
3
SMBDT
2
Q19
Q19
2N7002
2N7002
SMbus address : D2
2
Q20
Q20
SMBCK
1
2N7002
2N7002
2
C567
C567
10U/10V_8
10U/10V_8
R411 2.2_6 R411 2.2_6
C565
C565
10U/10V_8
10U/10V_8
SMBDT {10} PDAT_SMB {12,21}
3
Iref=5mA,
Ioh=4*Iref
C570
C570
.047U/10V_4
.047U/10V_4
C575
C575
10U/10V_8
10U/10V_8
C566
C566
.047U/10V_4
.047U/10V_4
3
C563 33P_4 C563 33P_4
C564 33P_4 C564 33P_4
CLK_EN# {28}
STP_CPU# {12,28}
STP_PCI# {12}
SELPSB1_CLK {3,6}
R123 475/F_6 R123 475/F_6
C295
C295
.047U/10V_4
.047U/10V_4
C561
C561
.047U/10V_4
.047U/10V_4
C568
C568
.047U/10V_4
.047U/10V_4
VDD_CKG_CPU
C569
C569
.1U/10V_4
.1U/10V_4
1 2
Y4
Y4
14.318MHZ/20PF
14.318MHZ/20PF
SMBCK
SMBDT
CLKVDD
VDD_CKGREF
VDD_CKG_48
R404
R404
2.2_6
2.2_6
VDDA_CKG
C560
C560
.047U/10V_4
.047U/10V_4
4
CG_XIN
CG_XOUT
CLK_EN#
SELPSB1_CLK
C260
C260
10U/10V_8
10U/10V_8
4
U26
U26
50
XIN
49
XOUT
46
SMCLK
47
SMDAT
10
VTT_PWRGD#/PD
54
CPU_STOP#
55
PCI/PCIE_STOP#
16
TEST_MODE/FSB
IREF
39
IREF
1
VDDPCI1
7
VDDPCI2
48
VDDREF
11
VDD48
21
VDDSRC1
28
VDDSRC2
34
VDDSRC3
42
VDDCPU
37
VDDA
38
GNDA
RTM865T-433-VB-LFT
RTM865T-433-VB-LFT
HCLK_CPU
HCLK_CPU#
HCLK_MCH
HCLK_MCH#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DOT96
DOT96#
DREFSSCLK
DREFSSCLK#
CLK_PCIE_MINI
CLK_PCIE_MINI#
CLK_PCIE_ICH
CLK_PCIE_ICH#
5
2A : change for signal quality
REF0
REF1/FSC
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
DOT_96
DOT_96#
96M_SS/SRC0
96M_SS#/SRC0#
SRC1
SRC1#
SRC2
SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4#_SATA#
SRC5
SRC5#
SRC6
SRC6#
ITPCLK/SRC7
ITPCLK#/SRC7#
ITP_EN/PCICLKF0
SEL_96M#/PCICLKF1
R395 49.9/F_4 R395 49.9/F_4
R394 49.9/F_4 R394 49.9/F_4
R393 49.9/F_4 R393 49.9/F_4
R392 49.9/F_4 R392 49.9/F_4
R389 49.9/F_4 R389 49.9/F_4
R388 49.9/F_4 R388 49.9/F_4
R166 49.9/F_4 R166 49.9/F_4
R165 49.9/F_4 R165 49.9/F_4
R164 49.9/F_4 R164 49.9/F_4
R163 49.9/F_4 R163 49.9/F_4
R162 49.9/F_4 R162 49.9/F_4
R161 49.9/F_4 R161 49.9/F_4
R417 49.9/F_4 R417 49.9/F_4
R416 49.9/F_4 R416 49.9/F_4
5
PCICLK2
PCICLK3
PCICLK4
PCICLK5
USB_48/FSA
GND1
GND2
GND3
GND4
GND5
GND6
<TempChar>
<TempChar>
14M_REF
52
53
R_HCLK_CPU
44
R_HCLK_CPU#
43
R_HCLK_MCH
41
R_HCLK_MCH#
40
R_DOT96
14
R_DOT96#
15
R_DREFSSCLK
17
R_DREFSSCLK#
18
R_PCIE_MINI
19
R_PCIE_MINI#
20
22
23
R_PCIE_ICH
24
R_PCIE_ICH#
25
SRC4_SATA
26
SRC4#_SATA#
27
31
R_MCH_3GPLL#
30
PECLK_VGA_R
33
PECLK_VGA_R#
32
36
35
R_PCLK_591
8
9
R_PCLK_LAN
56
R_PCLK_PCM
3
R_PCLK_MINI
4
R_PCLK_ICH
5
SELPSB0_CLK
12
2
6
13
29
45
51
6
4
2
4
2
1
3
1
3
4
2
2
4
2
4
4
2
4
2
R408 33_4 R408 33_4
R156 1K_4 R156 1K_4
R400 33_4 R400 33_4
R157 33_4 R157 33_4
R410 33_4 R410 33_4
R409 33_4 R409 33_4
R155 22_4 R155 22_4
R398 47_4 R398 47_4
R122 4.7K_4 R122 4.7K_4
RP42
RP42
3
1
33_4P2R_S
33_4P2R_S
RP41
RP41
3
1
33_4P2R_S
33_4P2R_S
RP38
RP38
2
4
33_4P2R_S
33_4P2R_S
RP37
RP37
2
4
33_4P2R_S
33_4P2R_S
RP36
RP36
3
1
33_4P2R_S
33_4P2R_S
RP51
RP51
1
3
33_4P2R_S
33_4P2R_S
RP50
RP50
1
3
33_4P2R_S
33_4P2R_S
RP43
RP43
3
1
33_4P2R_S
33_4P2R_S
RP40
RP40
3
1
33_4P2R_4
33_4P2R_4
C571
C571
15P_4
15P_4
7
C559
C559
*10P_4
*10P_4
SELPSB2_CLK
HCLK_CPU
HCLK_CPU#
HCLK_MCH
HCLK_MCH#
DOT96
DOT96#
DREFSSCLK
DREFSSCLK#
CLK_PCIE_MINI
CLK_PCIE_MINI#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_MCH_3GPLL R_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
C574
C574
C573
C573
*10P_4
*10P_4
4.7P_4
4.7P_4
C562
C562
*10P_4
*10P_4
14M_ICH {12}
SELPSB2_CLK {3,6}
HCLK_CPU {2}
HCLK_CPU# {2}
HCLK_MCH {5}
HCLK_MCH# {5}
DOT96 {6}
DOT96# {6}
DREFSSCLK {6}
DREFSSCLK# {6}
CLK_PCIE_MINI {21}
CLK_PCIE_MINI# {21}
CLK_PCIE_ICH {12}
CLK_PCIE_ICH# {12}
CLK_PCIE_SATA {11}
CLK_PCIE_SATA# {11}
CLK_MCH_3GPLL {6}
CLK_MCH_3GPLL# {6}
CLK_PCIE_VGA {14}
CLK_PCIE_VGA# {14}
C304
C304
C572
C572
*10P_4
*10P_4
*10P_4
*10P_4
2A : change for signal quality
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_SATA
CLK_PCIE_SATA#
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
6
R391 49.9/F_4 R391 49.9/F_4
R390 49.9/F_4 R390 49.9/F_4
R415 49.9/F_4 R415 49.9/F_4
R414 49.9/F_4 R414 49.9/F_4
CLK GEN
CLK GEN
CLK GEN
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Quanta Computer Inc.
43 2 Monday, December 19, 2005
43 2 Monday, December 19, 2005
7
43 2 Monday, December 19, 2005
8
PCLK_591 {26}
PCLK_LAN {22}
PCLK_PCM {23}
PCLK_MINI {21}
PCLK_ICH {11}
CLK48_USB {12}
of
8
3A
3A
3A
1
U21E
U21E
AF23
VSS136
H23
VSS137
AL22
VSS138
AH22
VSS139
J22
VSS140
E22
VSS141
D22
VSS142
A22
VSS143
AN21
VSS144
AF21
VSS145
F21
VSS146
C21
VSS147
AK20
VSS148
V20
VSS149
G20
VSS150
F20
AN19
AG19
AL18
AN17
AJ17
AF17
AL16
AN14
AL14
AJ14
AG14
AN11
AL11
AJ11
AG11
AF11
AA11
AA10
AN24
AL24
VSS151
E20
VSS152
D20
VSS153
A20
VSS154
VSS155
VSS156
W19
VSS157
T19
VSS158
J19
VSS159
H19
VSS160
C19
VSS161
VSS162
U18
VSS163
B18
VSS164
A18
VSS165
VSS166
VSS167
VSS168
G17
VSS169
C17
VSS170
VSS171
K16
VSS172
H16
VSS173
D16
VSS174
A16
VSS175
K15
VSS176
C15
VSS177
VSS178
VSS179
VSS180
VSS181
K14
VSS182
J14
VSS183
F14
VSS184
B14
VSS185
A14
VSS186
J12
VSS187
D12
VSS188
B12
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
Y11
VSS196
H11
VSS197
F11
VSS198
VSS199
Y10
VSS200
L10
VSS201
D10
VSS202
AN9
VSS203
AH9
VSS204
AE9
VSS205
AC9
VSS206
AA9
VSS207
V9
VSS208
T9
VSS209
K9
VSS210
H9
VSS211
A9
VSS212
AL8
VSS213
Y8
VSS214
P8
VSS215
L8
VSS216
E8
VSS217
C8
VSS218
AN7
VSS219
AK7
VSS220
AG7
VSS221
AA7
VSS222
V7
VSS223
G7
VSS224
AJ6
VSS225
AE6
VSS226
AC6
VSS227
AA6
VSS228
T6
VSS229
P6
VSS230
L6
VSS231
J6
VSS232
B6
VSS233
AP5
VSS234
AL5
VSS235
W5
VSS236
E5
VSS237
AN4
VSS238
AF4
VSS239
Y4
VSS240
U4
VSS241
P4
VSS242
L4
VSS243
H4
VSS244
C4
VSS245
AJ3
VSS246
AC3
VSS247
AB3
VSS248
AA3
VSS249
C3
VSS250
A3
VSS251
AN2
VSS252
AL2
VSS253
AH2
VSS254
AE2
VSS255
AD2
VSS256
V2
VSS257
T2
VSS258
P2
VSS259
L2
VSS260
B27
VSS261
J26
VSS262
G26
VSS263
E26
VSS264
A26
VSS265
VSS266
VSS267
J2
VSS268
G2
VSS269
D2
VSS270
Y1
VSS271
B36
VSSALVDS
1
VSS
VSS
A A
B B
C C
D D
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
ALVISO_PM
ALVISO_PM
2
AG37
Y37
V37
T37
P37
M37
K37
H37
E37
AN36
AL36
AJ36
AF36
AE36
AD36
AC36
AB36
AA36
C36
AE35
Y35
W35
V35
U35
T35
R35
P35
N35
M35
L35
K35
J35
H35
G35
F35
E35
D35
B35
AN34
AH34
AD34
AC34
AB34
AA34
C34
AL33
AF33
AD33
W33
V33
U33
T33
R33
P33
N33
M33
L33
K33
J33
H33
G33
F33
E33
D33
AN32
AJ32
AD32
AC32
AB32
AA32
Y32
C32
A32
AL31
AG31
AD31
W31
V31
U31
T31
R31
P31
N31
M31
L31
K31
J31
H31
G31
F31
E31
D31
AP30
AE30
AC30
AB30
AA30
Y30
C30
AM29
AJ29
AG29
AD29
AA29
W29
V29
U29
P29
L29
H29
G29
F29
E29
D29
A29
AC28
AB28
AA28
W28
E28
AN27
AL27
AJ27
AG27
AF27
AB27
AA27
W27
G27
E27
AJ24
AG24
J24
F24
D24
B24
2
100/F_4
100/F_4
R376
R376
100/F_4
100/F_4
R379
R379
3
HXRCOMP
R380
R380
24.9/F_4
24.9/F_4
+1.05V
R381
R381
54.9/F_4
54.9/F_4
HXSCOMP
+1.05V
R378
R378
221/F_4
221/F_4
HXSWING
C549
C549
.1U/10V_4
.1U/10V_4
HYRCOMP
R375
R375
24.9/F_4
24.9/F_4
+1.05V
R382
R382
54.9/F_4
54.9/F_4
HYSCOMP
+1.05V
R377
R377
221/F_4
221/F_4
HYSWING
C548
C548
.1U/10V_4
.1U/10V_4
3
4
HD#[0..63] {2}
4
HD#[0..63]
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
W6
W8
W7
W1
W3
W2
E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
U3
V5
U2
U1
Y5
Y2
V4
Y7
Y3
Y6
C1
C2
D1
T1
L1
P1
5
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
5
U21A
U21A
ALVISO_PM
ALVISO_PM
HADSTB0#
HADSTB1#
HCPURST#
HOST
HOST
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HCPUSLP#
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HADS#
HVREF
HBNR#
HBPRI#
BREQ0#
HCLKINN
HCLKINP
HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HTRDY#
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
F8
B9
E13
J11
A5
D5
E7
H10
AB1
AB2
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5
6
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HCPUSLP#_GMCH
HA#[3..31]
HA#[3..31] {2}
ADS# {2}
HADSTB0# {2}
HADSTB1# {2}
BNR# {2}
BPRI# {2}
HBREQ0# {2}
CPURST# {2}
HCLK_MCH# {4}
HCLK_MCH {4}
DBSY# {2}
DEFER# {2}
HDBI0# {2}
HDBI1# {2}
HDBI2# {2}
HDBI3# {2}
DPWR# {2}
DRDY# {2}
HDSTBN0# {2}
HDSTBN1# {2}
HDSTBN2# {2}
HDSTBN3# {2}
HDSTBP0# {2}
HDSTBP1# {2}
HDSTBP2# {2}
HDSTBP3# {2}
HIT# {2}
HITM# {2}
HLOCK# {2}
HREQ#0 {2}
HREQ#1 {2}
HREQ#2 {2}
HREQ#3 {2}
HREQ#4 {2}
RS#0 {2}
RS#1 {2}
RS#2 {2}
HTRDY# {2}
7
HVREF
T41T41
T112T112
R372 0_4 R372 0_4
+1.05V
R110
R110
100/F_4
100/F_4
DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALVISO - HOST
ALVISO - HOST
ALVISO - HOST
Date: Sheet
Date: Sheet
6
Date: Sheet
7
C238
R111
R111
200/F_4
200/F_4
C238
.1U/10V_4
.1U/10V_4
CPUSLP# {2,11}
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Quanta Computer Inc.
8
3A
3A
3A
of
of
of
53 2 Monday, December 19, 2005
53 2 Monday, December 19, 2005
53 2 Monday, December 19, 2005
8
1
2
3
4
5
6
7
8
U21F
T19T19
CLK_MCH_3GPLL# {4}
CLK_MCH_3GPLL {4}
A A
T17T17
R105 *0_4 R105 *0_4
R99 *0_4 R99 *0_4
R97 *0_4 R97 *0_4
R95 *0_4 R95 *0_4
For UMA
DDCCLK {14,19}
DDCDAT {14,19}
VGA_BLU {14,19}
VGA_GRN {14,19}
VGA_RED {14,19}
VSYNC {14,19}
HSYNC {14,19}
R324 0_4@UMA R324 0_4@UMA
R327 0_4@UMA R327 0_4@UMA
R328 0_4@UMA R328 0_4@UMA
R356 150_4@UMA R356 150_4@UMA
R329 0_4@UMA R329 0_4@UMA
R361 150_4@UMA R361 150_4@UMA
R337 0_4@UMA R337 0_4@UMA
R364 150_4@UMA R364 150_4@UMA
R330 0_4@UMA R330 0_4@UMA
R338 0_4@UMA R338 0_4@UMA
R93 255/F_4 R93 255/F_4
DDCDAT_NB
VGA_BLU_NB
VGA_GRN_NB
VGA_RED_NB
VSYNC_NB
HSYNC_NB
2A for sparete UMA and VGA display-on
T18T18
B B
PHL_CLK {14,19}
PHL_DATA {14,19}
LCD_POWER_ON {14,19}
C C
BLON {14,19}
TXLCLKOUT+ {14,19}
TXLCLKOUT- {14,19}
TXLOUT0- {14,19}
TXLOUT0+ {14,19}
TXLOUT1+ {14,19}
TXLOUT1- {14,19}
TXLOUT2+ {14,19}
TXLOUT2- {14,19}
R460 *0_4@UMA R460 *0_4@UMA
R315 *0_4@UMA R315 *0_4@UMA
R312 *0_4@UMA R312 *0_4@UMA
R317 *0_4@UMA R317 *0_4@UMA
R78 1.5K/F_6 R78 1.5K/F_6
T20T20
T21T21
T8T8
T9T9
T10T10
TXLCLKOUT-_NB
TXLCLKOUT+_NB
TXLOUT0-_NB
TXLOUT1-_NB
TXLOUT2-_NB
TXLOUT0+_NB
TXLOUT1+_NB
TXLOUT2+_NB
4
2
4
2
4
2
4
2
BLON_915
LDDC_CLK
LDDC_DATA
LVDD_EN
RP3
RP3
3
1
*4P2R-0404_2@UMA
*4P2R-0404_2@UMA
RP7
RP7
3
1
*4P2R-0404_2@UMA
*4P2R-0404_2@UMA
RP9
RP9
3
1
*4P2R-0404_2@UMA
*4P2R-0404_2@UMA
RP5
RP5
3
1
*4P2R-0404_2@UMA
*4P2R-0404_2@UMA
H24
H25
AB29
AC29
A15
C16
A17
J18
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
REFSET
J20
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
TXLCLKOUT+_NB
TXLCLKOUT-_NB
TXLOUT0-_NB
TXLOUT0+_NB
TXLOUT1+_NB
TXLOUT1-_NB
TXLOUT2+_NB
TXLOUT2-_NB
U21F
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CTRL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LBCLKN
LBCLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
ALVISO_PM
ALVISO_PM
MISC
MISC
TV VGA LVDS
TV VGA LVDS
EXP_COMPI
EXP_ICOMPO
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
R76 24.9/F_4 R76 24.9/F_4
D36
D34
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
CGMCHEXP_TXN0
E32
CGMCHEXP_TXN1
F36
CGMCHEXP_TXN2
G32
CGMCHEXP_TXN3
H36
CGMCHEXP_TXN4
J32
CGMCHEXP_TXN5
K36
CGMCHEXP_TXN6
L32
CGMCHEXP_TXN7
M36
CGMCHEXP_TXN8
N32
CGMCHEXP_TXN9
P36
CGMCHEXP_TXN10
R32
CGMCHEXP_TXN11
T36
CGMCHEXP_TXN12
U32
CGMCHEXP_TXN13
V36
CGMCHEXP_TXN14
W32
CGMCHEXP_TXN15
Y36
CGMCHEXP_TXP0
D32
CGMCHEXP_TXP1
E36
CGMCHEXP_TXP2
F32
CGMCHEXP_TXP3
G36
CGMCHEXP_TXP4
H32
CGMCHEXP_TXP5
J36
CGMCHEXP_TXP6
K32
CGMCHEXP_TXP7
L36
CGMCHEXP_TXP8
M32
CGMCHEXP_TXP9
N36
CGMCHEXP_TXP10
P32
CGMCHEXP_TXP11
R36
CGMCHEXP_TXP12
T32
CGMCHEXP_TXP13
U36
CGMCHEXP_TXP14
V32
CGMCHEXP_TXP15
W36
VCC3G_PCIE
GMCHEXP_RXN0
GMCHEXP_RXN1
GMCHEXP_RXN2
GMCHEXP_RXN3
GMCHEXP_RXN4
GMCHEXP_RXN5
GMCHEXP_RXN6
GMCHEXP_RXN7
GMCHEXP_RXN8
GMCHEXP_RXN9
GMCHEXP_RXN10
GMCHEXP_RXN11
GMCHEXP_RXN12
GMCHEXP_RXN13
GMCHEXP_RXN14
GMCHEXP_RXN15 DDCCLK_NB
GMCHEXP_RXP0
GMCHEXP_RXP1
GMCHEXP_RXP2
GMCHEXP_RXP3
GMCHEXP_RXP4
GMCHEXP_RXP5
GMCHEXP_RXP6
GMCHEXP_RXP7
GMCHEXP_RXP8
GMCHEXP_RXP9
GMCHEXP_RXP10
GMCHEXP_RXP11
GMCHEXP_RXP12
GMCHEXP_RXP13
GMCHEXP_RXP14
GMCHEXP_RXP15
GMCHEXP_TXN0
.1U_4 C494 .1U_4 C494
GMCHEXP_TXN1
.1U_4 C513 .1U_4 C513
GMCHEXP_TXN2
.1U_4 C492 .1U_4 C492
GMCHEXP_TXN3
.1U_4 C511 .1U_4 C511
GMCHEXP_TXN4
.1U_4 C490 .1U_4 C490
GMCHEXP_TXN5
.1U_4 C509 .1U_4 C509
GMCHEXP_TXN6
.1U_4 C488 .1U_4 C488
GMCHEXP_TXN7
.1U_4 C507 .1U_4 C507
GMCHEXP_TXN8
.1U_4 C486 .1U_4 C486
GMCHEXP_TXN9
.1U_4 C505 .1U_4 C505
GMCHEXP_TXN10
.1U_4 C484 .1U_4 C484
GMCHEXP_TXN11
.1U_4 C503 .1U_4 C503
GMCHEXP_TXN12
.1U_4 C482 .1U_4 C482
GMCHEXP_TXN13
.1U_4 C501 .1U_4 C501
GMCHEXP_TXN14
.1U_4 C480 .1U_4 C480
GMCHEXP_TXN15
.1U_4 C499 .1U_4 C499
GMCHEXP_TXP0
.1U_4 C495 .1U_4 C495
GMCHEXP_TXP1
.1U_4 C514 .1U_4 C514
GMCHEXP_TXP2
.1U_4 C493 .1U_4 C493
GMCHEXP_TXP3
.1U_4 C512 .1U_4 C512
GMCHEXP_TXP4
.1U_4 C491 .1U_4 C491
GMCHEXP_TXP5
.1U_4 C510 .1U_4 C510
GMCHEXP_TXP6
.1U_4 C489 .1U_4 C489
GMCHEXP_TXP7
.1U_4 C508 .1U_4 C508
GMCHEXP_TXP8
.1U_4 C487 .1U_4 C487
GMCHEXP_TXP9
.1U_4 C506 .1U_4 C506
GMCHEXP_TXP10
.1U_4 C485 .1U_4 C485
GMCHEXP_TXP11
.1U_4 C504 .1U_4 C504
GMCHEXP_TXP12
.1U_4 C483 .1U_4 C483
GMCHEXP_TXP13
.1U_4 C502 .1U_4 C502
GMCHEXP_TXP14
.1U_4 C481 .1U_4 C481
GMCHEXP_TXP15
.1U_4 C500 .1U_4 C500
0.1u Capacitors place at
first 1/3 of trace
GMCHEXP_RXN[0..15] {14}
GMCHEXP_RXP[0..15] {14}
GMCHEXP_TXN[0..15] {14}
GMCHEXP_TXP[0..15] {14}
CLK_SDRAM0 {10}
CLK_SDRAM1 {10}
CLK_SDRAM3 {10}
CLK_SDRAM4 {10}
CLK_SDRAM0# {10}
CLK_SDRAM1# {10}
CLK_SDRAM3# {10}
CLK_SDRAM4# {10}
R88 *40.2/F_4 R88 *40.2/F_4
R96 *40.2/F_4 R96 *40.2/F_4
+1.8VSUS
For DDR2
It's point to point,
55ohm trace, keep as
short as possible.
DMI_TXN0 {12}
DMI_TXN1 {12}
DMI_TXN2 {12}
DMI_TXN3 {12}
DMI_TXP0 {12}
DMI_TXP1 {12}
DMI_TXP2 {12}
DMI_TXP3 {12}
DMI_RXN0 {12}
DMI_RXN1 {12}
DMI_RXN2 {12}
DMI_RXN3 {12}
DMI_RXP0 {12}
DMI_RXP1 {12}
DMI_RXP2 {12}
DMI_RXP3 {12}
T36T36
T38T38
T39T39
T34T34
CKE0 {9,10}
CKE1 {9,10}
CKE2 {9,10}
CKE3 {9,10}
SM_CS0# {9,10}
SM_CS1# {9,10}
SM_CS2# {9,10}
SM_CS3# {9,10}
M_ODT0 {9,10}
M_ODT1 {9,10}
M_ODT2 {9,10}
M_ODT3 {9,10}
R108 80.6/F_4 R108 80.6/F_4
R109 80.6/F_4 R109 80.6/F_4
+0.9VSUS
CLK_SDRAM2
CLK_SDRAM5
CLK_SDRAM2#
CLK_SDRAM5#
CKE0
CKE1
CKE2
CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_OCDCOMP0
M_OCDCOMP1
M_RCOMPN
M_RCOMPP
SMXSLEW
SMYSLEW
AA31
AB35
AC31
AD35
AA35
AB31
AC35
AA33
AB37
AC33
AD37
AA37
AB33
AC37
AM33
AE11
AJ34
AF6
AC10
AN33
AK1
AE10
AJ33
AF5
AD10
AP21
AM21
AH21
AK21
AN16
AM14
AH15
AG16
AF22
AF16
AP14
AL15
AM11
AN10
AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10
Y31
Y33
AL1
U21C
U21C
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMITXP0
DMITXP1
DMITXP2
DMITXP3
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
DMI DDR MUXING
DMI DDR MUXING
CFG/RSVD PM LCK NC
CFG/RSVD PM LCK NC
ALVISO_PM
ALVISO_PM
CFG[0:2]=100 FOR FSB 533
CFG[0:2]=101 FOR FSB 400
CFG0
G16
CFG0
H13
CFG1
G14
CFG2
F16
CFG3
F15
CFG4
G15
CFG5
E16
CFG6
D17
CFG7
J16
CFG8
D15
CFG9
E15
CFG10
D14
CFG11
E14
CFG12
H12
CFG13
C14
CFG14
H15
CFG15
J15
CFG16
H14
CFG17
G22
CFG18
G23
CFG19
D23
CFG20
G25
RSVD21
G24
RSVD22
J17
RSVD23
A31
RSVD24
A30
RSVD25
D26
RSVD26
D25
RSVD27
CFG[17:3] have internal pullup resistors.
CFG[19:18] have internal pulldown resistors
J23
BM_BUSY#
J21
EXT_TS0#
H22
EXT_TS1#
F5
THRMTRIP#
AD30
PWROK
AE29
RSTIN#
A24
DREF_CLKN
A23
DREF_CLKP
NC10
NC11
C37
D37
AP37
NC1
AN37
NC2
AP36
NC3
AP2
NC4
AP1
NC5
AN1
NC6
B1
NC7
A2
NC8
B37
NC9
A36
A37
DREF_SSCLKN
DREF_SSCLKP
R101 4.7K_4 R101 4.7K_4
CFG1
R368 0_4 R368 0_4
CFG2
R366 0_4 R366 0_4
CFG3
R100 *1K_4 R100 *1K_4
CFG4
CFG5
R103 *1K_4 R103 *1K_4
CFG6
R98 1K_4 R98 1K_4
CFG7
CFG8
CFG9
R102 *1K_4 R102 *1K_4
CFG10
CFG11
R107 1K_4 R107 1K_4
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_EXTTS#0
PM_EXTTS#1
R374 0_4 R374 0_4
R347 100_4 R347 100_4
DOT96#
DOT96
DREFSSCLK#
DREFSSCLK
TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
T33T33
T40T40
T111T111
T27T27
T37T37
T35T35
T24T24
T22T22
T23T23
T13T13
T14T14
T30T30
T105T105
T107T107
T12T12
T11T11
R87 10K_4 R87 10K_4
R90 10K_4 R90 10K_4
T98T98
T97T97
T100T100
T114T114
T115T115
T117T117
T116T116
T113T113
T99T99
+1.05V
SELPSB1_CLK {3,4}
SELPSB2_CLK {3,4}
T29T29
T25T25
T26T26
T28T28
CFG5 Low=DMIx2
High=DMIx4
CFG6 Low=DDR2
High=DDR
CFG9 Low=REVERSE LANE
High=NORMAL
CFG11 FOR CPU533
PM_BMBUSY# {12}
+2.5V
THERMTRIP# {2,11}
IMVP_PWRGD {12,26,28}
PLTRST# {11,14,20}
DOT96# {4}
DOT96 {4}
DREFSSCLK# {4}
DREFSSCLK {4}
D D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALVISO - DMI / VGA
ALVISO - DMI / VGA
ALVISO - DMI / VGA
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
63 2 Monday, December 19, 2005
63 2 Monday, December 19, 2005
63 2 Monday, December 19, 2005
8
3A
3A
3A
1
R_A_MD[0..63] {10}
A A
B B
C C
D D
1
R_A_MD0
R_A_MD1
R_A_MD2
R_A_MD3
R_A_MD4
R_A_MD5
R_A_MD6
R_A_MD7
R_A_MD8
R_A_MD9
R_A_MD10
R_A_MD11
R_A_MD12
R_A_MD13
R_A_MD14
R_A_MD15
R_A_MD16
R_A_MD17
R_A_MD18
R_A_MD19
R_A_MD20
R_A_MD21
R_A_MD22
R_A_MD23
R_A_MD24
R_A_MD25
R_A_MD26
R_A_MD27
R_A_MD28
R_A_MD29
R_A_MD30
R_A_MD31
R_A_MD32
R_A_MD33
R_A_MD34
R_A_MD35
R_A_MD36
R_A_MD37
R_A_MD38
R_A_MD39
R_A_MD40
R_A_MD41
R_A_MD42
R_A_MD43
R_A_MD44
R_A_MD45
R_A_MD46
R_A_MD47
R_A_MD48
R_A_MD49
R_A_MD50
R_A_MD51
R_A_MD52
R_A_MD53
R_A_MD54
R_A_MD55
R_A_MD56
R_A_MD57
R_A_MD58
R_A_MD59
R_A_MD60
R_A_MD61
R_A_MD62
R_A_MD63
2
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
2
U21B
U21B
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
3
R_A_BS0#
SA_BS0#
SA_BS1#
SA_BS2#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
ALVISO_PM
ALVISO_PM
3
AK15
AK16
AL21
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
AN15
AP16
AF29
AF28
AP15
R_A_BS1#
R_A_BS2#
R_A_DM0
R_A_DM1
R_A_DM2
R_A_DM3
R_A_DM4
R_A_DM5
R_A_DM6
R_A_DM7
R_A_DQS0
R_A_DQS1
R_A_DQS2
R_A_DQS3
R_A_DQS4
R_A_DQS5
R_A_DQS6
R_A_DQS7
R_A_DQS#0
R_A_DQS#1
R_A_DQS#2
R_A_DQS#3
R_A_DQS#4
R_A_DQS#5
R_A_DQS#6
R_A_DQS#7
R_A_MA0
R_A_MA1
R_A_MA2
R_A_MA3
R_A_MA4
R_A_MA5
R_A_MA6
R_A_MA7
R_A_MA8
R_A_MA9
R_A_MA10
R_A_MA11
R_A_MA12
R_A_MA13
R_A_SCASA#
R_A_SRASA#
SA_RCVENIN#
SA_RCVENOUT#
R_A_BMWEA#
4
T15T15
T16T16
4
R_B_MD[0..63] {10}
R_A_BS0# {9,10}
R_A_BS1# {9,10}
R_A_BS2# {9,10}
R_A_DM[0..7] {10}
R_A_DQS[0..7] {10}
R_A_DQS#[0..7] {10}
R_A_MA[0..13] {9,10}
R_A_SCASA# {9,10}
R_A_SRASA# {9,10}
R_A_BMWEA# {9,10}
5
5
R_B_MD0
R_B_MD1
R_B_MD2
R_B_MD3
R_B_MD4
R_B_MD5
R_B_MD6
R_B_MD7
R_B_MD8
R_B_MD9
R_B_MD10
R_B_MD11
R_B_MD12
R_B_MD13
R_B_MD14
R_B_MD15
R_B_MD16
R_B_MD17
R_B_MD18
R_B_MD19
R_B_MD20
R_B_MD21
R_B_MD22
R_B_MD23
R_B_MD24
R_B_MD25
R_B_MD26
R_B_MD27
R_B_MD28
R_B_MD29
R_B_MD30
R_B_MD31
R_B_MD32
R_B_MD33
R_B_MD34
R_B_MD35
R_B_MD36
R_B_MD37
R_B_MD38
R_B_MD39
R_B_MD40
R_B_MD41
R_B_MD42
R_B_MD43
R_B_MD44
R_B_MD45
R_B_MD46
R_B_MD47
R_B_MD48
R_B_MD49
R_B_MD50
R_B_MD51
R_B_MD52
R_B_MD53
R_B_MD54
R_B_MD55
R_B_MD56
R_B_MD57
R_B_MD58
R_B_MD59
R_B_MD60
R_B_MD61
R_B_MD62
R_B_MD63
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
U21G
U21G
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
6
SB_BS0#
SB_BS1#
SB_BS2#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
ALVISO_PM
ALVISO_PM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALVISO - DDRII
ALVISO - DDRII
ALVISO - DDRII
Date: Sheet
Date: Sheet
Date: Sheet
6
7
R_B_BS0#
AJ15
R_B_BS1#
AG17
R_B_BS2#
AG21
R_B_DM0
AF32
R_B_DM1
AK34
R_B_DM2
AK27
R_B_DM3
AK24
R_B_DM4
AJ10
R_B_DM5
AK5
R_B_DM6
AE7
R_B_DM7
AB7
R_B_DQS0
AF34
R_B_DQS1
AK32
R_B_DQS2
AJ28
R_B_DQS3
AK23
R_B_DQS4
AM10
R_B_DQS5
AH6
R_B_DQS6
AF8
R_B_DQS7
AB4
R_B_DQS#0
AF35
R_B_DQS#1
AK33
R_B_DQS#2
AK28
R_B_DQS#3
AJ23
R_B_DQS#4
AL10
R_B_DQS#5
AH7
R_B_DQS#6
AF7
R_B_DQS#7
AB5
R_B_MA0
AH17
R_B_MA1
AK17
R_B_MA2
AH18
R_B_MA3
AJ18
R_B_MA4
AK18
R_B_MA5
AJ19
R_B_MA6
AK19
R_B_MA7
AH19
R_B_MA8
AJ20
R_B_MA9
AH20
R_B_MA10
AJ16
R_B_MA11
AG18
R_B_MA12
AG20
R_B_MA13
AG15
R_B_SCASA#
AH14
R_B_SRASA#
AK14
SB_RCVENIN#
AF15
SB_RCVENOUT#
AF14
R_B_BMWEA#
AH16
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Quanta Computer Inc.
7
R_B_BS0# {9,10}
R_B_BS1# {9,10}
R_B_BS2# {9,10}
R_B_DM[0..7] {10}
R_B_DQS[0..7] {10}
R_B_DQS#[0..7] {10}
R_B_MA[0..13] {9,10}
R_B_SCASA# {9,10}
R_B_SRASA# {9,10}
R_B_BMWEA# {9,10}
73 2 Monday, December 19, 2005
73 2 Monday, December 19, 2005
73 2 Monday, December 19, 2005
T31T31
T32T32
8
3A
3A
3A
of
of
of
8
5
+1.05V
3900mA
C207
C251
C251
.1U/10V_4
.1U/10V_4
VCCA_DPLLA
C202
C202
.1U/10V_4
.1U/10V_4
VCCA_DPLLB
C169
C169
.1U/10V_4
.1U/10V_4
C254
C254
+
+
470U/2.5V_7343
470U/2.5V_7343
C207
10U/6.3V_8
10U/6.3V_8
+
+
470U/2.5V_7343
470U/2.5V_7343
+
+
470U/2.5V_7343
470U/2.5V_7343
+2.5V
C288
C288
.1U_4
.1U_4
+1.05V
10U/6.3V_8
10U/6.3V_8
C191
C191
C161
C161
C226
C226
10U/6.3V_8
10U/6.3V_8
R92 0_6 R92 0_6
1 2
1 2
C286
C286
10U/6.3V_8
10U/6.3V_8
915GM link +2.5V
915PM link GND
C206
C206
2.2U/6.3V_6
2.2U/6.3V_6
C248
C248
+1.5V
VCCA_CRTDAC
C200
C200
4.7U/10V_8
4.7U/10V_8
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
R91
R91
*0_4
*0_4
C224
C224
C190
C190
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
D D
+1.5V
+1.05V
C184
C184
2.2U/6.3V_6
2.2U/6.3V_6
L25 10UH L25 10UH
C237
C237
4.7U/10V_8
4.7U/10V_8
60mA
C C
+1.5V
60mA
B B
L24 10UH L24 10UH
+1.5V
L52 1UH_1206 L52 1UH_1206
L33 1UH_1206 L33 1UH_1206
+1.5V
60mA
C545
C545
.1U/10V_4
.1U/10V_4
C554
C554
+
+
470U/2.5V_7343
470U/2.5V_7343
C250
C250
.1U/10V_4
.1U/10V_4
810mA
C544
C544
C553 .47U/25V_8 C553 .47U/25V_8
A A
5
C546 .22U/10V_6 C546 .22U/10V_6
C550 .22U/10V_6 C550 .22U/10V_6
VCCP_GMCH_CAP1
.47U/25V_8
.47U/25V_8
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
AC2
AC1
B23
C35
AA1
AA2
F19
E19
G19
H20
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
4
U21H
U21H
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC0
VCCA_CRTDAC1
VVSSA_CRTDAC
VCC_SYNC
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
ALVISO_PM
ALVISO_PM
4
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
POWER
POWER
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCA_TVBG
VSSA_TVBG
VCCA_LVDS
VCCHV0
VCCHV1
VCCHV2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GBG
VSSA_3GBG
F17
E17
D18
C18
F18
E18
H18
G18
D19
H17
B26
B25
A25
A35
B22
B21
A21
AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1
B28
A28
A27
AF20
AP19
AF19
AF18
AE37
W37
U37
R37
N37
L37
J37
Y29
Y28
Y27
F37
G37
V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4
C182
C182
.1U/10V_4
.1U/10V_4
VCC_DDRDLL
VCC3G_PCIE
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
C537
C537
10U/6.3V_8
10U/6.3V_8
+2.5V
C518
C518
4.7U/10V_8
4.7U/10V_8
220U/2.5V_7343
220U/2.5V_7343
+2.5V
C181
C181
.1U/10V_4
.1U/10V_4
3
C523
C523
.1U/10V_4
.1U/10V_4
+1.8VSUS
C236
C236
10U/6.3V_8
10U/6.3V_8
330U/6.3V_7343
330U/6.3V_7343
R89
R89
*10_6
*10_6
L28 BLM18PG181SN1/0_6 L28 BLM18PG181SN1/0_6
68mA
C247 .1U/10V_4 C247 .1U/10V_4
C253 .1U/10V_4 C253 .1U/10V_4
C547 .1U/10V_4 C547 .1U/10V_4
+2.5V
C496
C496
C498
C498
+
+
10U/6.3V_8
10U/6.3V_8
C189
C189
.1U/10V_4
.1U/10V_4
150mA
3
+2.5V
C522
C522
2mA
10U/6.3V_8
10U/6.3V_8
C159
C159
.1U/10V_4
.1U/10V_4
C166
C166
.1U/10V_4
.1U/10V_4
C517
C517
.1U/10V_4
.1U/10V_4
For DDR2
1 2
C192
C192
+
+
VCCGFOLLOW
C223
C223
.022U/16V_4
.022U/16V_4
60mA
VCC3G_PCIE
C497
C497
10U/6.3V_8
10U/6.3V_8
R72 0.5/F_6 R72 0.5/F_6
C147
C147
10U/6.3V_8
10U/6.3V_8
C515
C515
.1U/10V_4
.1U/10V_4
D3
*CH551D3*CH551
VCCA_CRTDAC
C222
C222
.1U/10V_4
.1U/10V_4
C234
C234
+
+
470U/10V_7343
470U/10V_7343
L49
L49
C156
C156
.1U/10V_4
.1U/10V_4
VCCA_3GPLL_1 VCCA_3GPLL
+2.5V
C516
C516
10mA
.01U/16V_4
.01U/16V_4
2 1
+1.05V
L29
L29
*BLM18PG181SN1/0_6
*BLM18PG181SN1/0_6
L27
L27
C220
C220
.1U/10V_4
.1U/10V_4
+1.5V
BLM18PG181SN1_6
BLM18PG181SN1_6
1A
L22
L22
C520
C520
.1U/10V_4
.1U/10V_4
+1.5V
BLM18PG181SN1_6
BLM18PG181SN1_6
BLM18PG181SN1_6
BLM18PG181SN1_6
C521
C521
10U/6.3V_8
10U/6.3V_8
30mA
+1.5V
+1.5V
2
U21D
U21D
60mA
+1.05V
2
W13
VTT_NCTF0
V13
VTT_NCTF1
U13
VTT_NCTF2
T13
VTT_NCTF3
R13
VTT_NCTF4
P13
VTT_NCTF5
N13
VTT_NCTF6
M13
VTT_NCTF7
L13
VTT_NCTF8
W12
VTT_NCTF9
V12
VTT_NCTF10
U12
VTT_NCTF11
T12
VTT_NCTF12
R12
VTT_NCTF13
P12
VTT_NCTF14
N12
VTT_NCTF15
M12
VTT_NCTF16
L12
VTT_NCTF17
AB26
VSS_NCTF0
AA26
VSS_NCTF1
Y26
VSS_NCTF2
AB25
VSS_NCTF3
AA25
VSS_NCTF4
Y25
VSS_NCTF5
AB24
VSS_NCTF6
AA24
VSS_NCTF7
Y24
VSS_NCTF8
AB23
VSS_NCTF9
AA23
VSS_NCTF10
Y23
VSS_NCTF11
AB22
VSS_NCTF12
AA22
VSS_NCTF13
Y22
VSS_NCTF14
AB21
VSS_NCTF15
AA21
VSS_NCTF16
Y21
VSS_NCTF17
R21
VSS_NCTF18
AB20
VSS_NCTF19
AA20
VSS_NCTF20
AB19
VSS_NCTF21
AA19
VSS_NCTF22
AB18
VSS_NCTF23
AA18
VSS_NCTF24
AB17
VSS_NCTF25
AA17
VSS_NCTF26
Y17
VSS_NCTF27
R17
VSS_NCTF28
AB16
VSS_NCTF29
AA16
VSS_NCTF30
Y16
VSS_NCTF31
W16
VSS_NCTF32
V16
VSS_NCTF33
U16
VSS_NCTF34
T16
VSS_NCTF35
R16
VSS_NCTF36
P16
VSS_NCTF37
N16
VSS_NCTF38
M16
VSS_NCTF39
L16
VSS_NCTF40
AB15
VSS_NCTF41
AA15
VSS_NCTF42
Y15
VSS_NCTF43
W15
VSS_NCTF44
V15
VSS_NCTF45
U15
VSS_NCTF46
T15
VSS_NCTF47
R15
VSS_NCTF48
P15
VSS_NCTF49
N15
VSS_NCTF50
M15
VSS_NCTF51
L15
VSS_NCTF52
AB14
VSS_NCTF53
AA14
VSS_NCTF54
Y14
VSS_NCTF55
W14
VSS_NCTF56
V14
VSS_NCTF57
U14
VSS_NCTF58
T14
VSS_NCTF59
R14
VSS_NCTF60
P14
VSS_NCTF61
N14
VSS_NCTF62
M14
VSS_NCTF63
L14
VSS_NCTF64
AA13
VSS_NCTF65
Y13
VSS_NCTF66
AA12
VSS_NCTF67
Y12
VSS_NCTF68
ALVISO_PM
ALVISO_PM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALVISO - POWER
ALVISO - POWER
ALVISO - POWER
Date: Sheet
Date: Sheet
Date: Sheet
1
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
1
AD26
AC26
AD25
AC25
AD24
AC24
AD23
AC23
AD22
AC22
AD21
AC21
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AC17
AD16
AC16
AD15
AC15
AD14
AC14
AD13
AC13
AB13
AD12
AC12
AB12
W26
V26
U26
T26
R26
P26
N26
M26
L26
W25
V25
U25
T25
R25
P25
N25
M25
L25
W24
V24
U24
T24
R24
P24
N24
M24
L24
W23
V23
U23
T23
R23
P23
N23
M23
L23
W22
V22
U22
T22
R22
P22
N22
M22
L22
W21
V21
U21
T21
P21
N21
M21
L21
Y20
R20
P20
N20
M20
L20
Y19
R19
P19
N19
M19
L19
Y18
R18
P18
N18
M18
L18
W17
V17
U17
T17
P17
N17
M17
L17
83 2 Monday, December 19, 2005
83 2 Monday, December 19, 2005
83 2 Monday, December 19, 2005
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
NCTF
NCTF
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Quanta Computer Inc.
+1.8VSUS
+1.05V
of
of
of
3A
3A
3A
1
2
3
4
5
6
7
8
A A
+0.9V
+
C152
+
C152
*470U/10V_7343
*470U/10V_7343
C178
C178
.1U/10V_4
.1U/10V_4
C155
C155
.1U/10V_4
.1U/10V_4
C170
C170
.1U/10V_4
.1U/10V_4
C149
C149
.1U/10V_4
.1U/10V_4
C196
C196
.1U/10V_4
.1U/10V_4
C153
C153
.1U/10V_4
.1U/10V_4
C151
C151
.1U/10V_4
.1U/10V_4
C217
C217
.1U/10V_4
.1U/10V_4
C219
C219
.1U/10V_4
.1U/10V_4
C218
C218
.1U/10V_4
.1U/10V_4
C185
C185
.1U/10V_4
.1U/10V_4
C163
C163
.1U/10V_4
.1U/10V_4
C194
C194
.1U/10V_4
.1U/10V_4
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V
+0.9V
C148
C205
C205
C164
C195
R_A_MA[0..13] {7,10}
R_B_MA[0..13] {7,10}
B B
R_B_BS1# {7,10}
R_A_BS2# {7,10} M_ODT3 {6,10}
CKE0 {6,10}
R_B_SRASA# {7,10}
SM_CS2# {6,10}
M_ODT1 {6,10}
SM_CS1# {6,10}
R_A_BS0# {7,10}
M_ODT2 {6,10}
CKE1 {6,10}
C C
R_B_MA0
R_B_BS1#
R_A_BS2#
CKE0
R_A_MA4
R_A_MA2
R_B_SRASA#
SM_CS2#
M_ODT1
SM_CS1#
R_A_MA10
R_A_BS0#
R_B_MA13
M_ODT2
CKE1
R_A_MA7
R_B_MA11
R_B_MA6
R_B_MA3
R_B_MA8
R_B_MA2
R_B_MA4
R_B_MA12
R_B_MA9
RP27 56_4P2R_S RP27 56_4P2R_S
RP12 56_4P2R_S RP12 56_4P2R_S
RP21 56_4P2R_S RP21 56_4P2R_S
RP30 56_4P2R_S RP30 56_4P2R_S
RP35 56_4P2R_S RP35 56_4P2R_S
RP26 56_4P2R_S RP26 56_4P2R_S
RP33 56_4P2R_S RP33 56_4P2R_S
RP13 56_4P2R_S RP13 56_4P2R_S
RP16 56_4P2R_S RP16 56_4P2R_S
RP18 56_4P2R_S RP18 56_4P2R_S
RP20 56_4P2R_S RP20 56_4P2R_S
RP14 56_4P2R_S RP14 56_4P2R_S
2
1
4
3
4
3
2
1
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
C195
.1U/10V_4
.1U/10V_4
C164
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
Layout note: Place one cap close to every 2 pullup resistors terminated to +0.9V
+0.9V
+0.9V
+0.9V
C154
C154
.1U/10V_4
.1U/10V_4
C216
C216
.1U/10V_4
.1U/10V_4
C157
C157
.1U/10V_4
.1U/10V_4
C150
C150
.1U/10V_4
.1U/10V_4
C148
.1U/10V_4
.1U/10V_4
R_B_SCASA# {7,10}
R_B_BMWEA# {7,10}
R_B_BS2# {7,10}
R_A_BMWEA# {7,10}
R_A_SCASA# {7,10}
R_B_BS0# {7,10}
C197
C197
C160
C188
C188
.1U/10V_4
.1U/10V_4
SM_CS3# {6,10}
CKE3 {6,10}
CKE2 {6,10}
C201
C201
.1U/10V_4
.1U/10V_4
R_A_MA12
R_A_MA9
M_ODT3
SM_CS3#
R_B_SCASA#
R_B_BMWEA#
CKE3
R_B_MA7
CKE2
R_B_BS2#
R_A_MA1
R_A_MA8
R_A_MA11
R_A_MA6
R_A_BMWEA#
R_A_SCASA#
R_B_MA1
R_B_MA5
R_B_MA10
R_B_BS0#
C168
C168
.1U/10V_4
.1U/10V_4
C160
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
2
RP15 56_4P2R_S RP15 56_4P2R_S
RP34 56_4P2R_S RP34 56_4P2R_S
RP29 56_4P2R_S RP29 56_4P2R_S
RP10 56_4P2R_S RP10 56_4P2R_S
RP11 56_4P2R_S RP11 56_4P2R_S
RP19 56_4P2R_S RP19 56_4P2R_S
RP17 56_4P2R_S RP17 56_4P2R_S
RP31 56_4P2R_S RP31 56_4P2R_S
RP22 56_4P2R_S RP22 56_4P2R_S
RP25 56_4P2R_S RP25 56_4P2R_S
1
4
3
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
+0.9V
+0.9V
+0.9V
R_A_MA3
R_A_MA5
R_A_SRASA# {7,10}
SM_CS0# {6,10}
M_ODT0 {6,10}
R_A_BS1# {7,10}
D D
1
2
R_A_SRASA#
R_A_MA13
SM_CS0#
M_ODT0
R_A_BS1#
R_A_MA0
2
RP23 56_4P2R_S RP23 56_4P2R_S
RP28 56_4P2R_S RP28 56_4P2R_S
RP32 56_4P2R_S RP32 56_4P2R_S
RP24 56_4P2R_S RP24 56_4P2R_S
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
3
+0.9V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 TERMINATION
DDR2 TERMINATION
DDR2 TERMINATION
Date: Sheet
Date: Sheet
4
5
6
Date: Sheet
7
PROJECT : ZL9
PROJECT : ZL9
Quanta Computer Inc.
Quanta Computer Inc.
93 2 Monday, December 19, 2005
93 2 Monday, December 19, 2005
93 2 Monday, December 19, 2005
of
of
of
8
3A
3A
3A