Acer 4339, 4739, 4739Z Schematic

5

4

3

2

1

VER :

D D

C C

B B

BOM P/N

1A

Ca

Description

X'

14.318MHz

rdreader

TAL

P31

DDRIII-SO

DIMM1

DDRIII-SODIMM2

SLG8LV595

CL

OCK

GENERATOR

SAT

SATA -

USB Po

rt

USB/B Co

n.

(USB Port x2)

B

luetooth Con.

U6437-GBL

A

ardreader control

C

P14,15

A - HDD

ODD

P33

P33

P33

P31

=4+6<67(0%/2&.',$*5$0

Dual Channel DDR I
800/1066 M

P3

P28

P28

U

SB-1

U

SB-3/9/11

U

SB-4

SB-12

U

P9

BAT

Az

alia

HZ

SATA 0

SATA 1

TERY

C

hannel B

A

rrandale

r

PGA 989

II

CL

SAT

USB

P4, 5, 6, 7

FDI

FDI

K

A

Ibex Peak-M

DM

DMI

I

MI(x4)

D

PC

D

GFXIMC

isplay

I-E x1

PCI

INT_CRT
I

NT_LVDS

NT_HDMI

I

-E x16

A

TI-Park

V

RAM DDRIII

512MB

P16, 17, 18, 21, 22, 23

PCIE-6

SB-13

U

T_HDMI

EX

EXT_CRT
EX

T_LVDS

M

INI CARD

WLAN

PCH

RTC

IHDA

P8, 9, 10, 11, 12, 13

LPC

LPC

SPI

X'

TAL

32.768KHz

TAL 25MHz

X'

SPI ROM

P9

PC

IE-1

B

RM 57780

GI

GA LAN

ISL88731A

Ba

X'TAL
25MHz

tery Charger

64Mb *

P

S8101

LS

P27

P26

16 *4 pc

P36

P22

P24

EX

P6111AQDD

U

+1.05V

U

SB-8

I

nt. MIC

T_HDMI

45

RJ

CRT

Con.

L

VDS/CCD/MIC

Con.

I Con.

HDM

P26

P39

P23

P23

P24

ISL62881H

+V

GFX_AXG

RZ-T

P41

nt. MIC

I

OM Option Table

B

A A

erence

Ref

IV@

EV@

VRA

M@

*

Description

for UMA only SKU

or Discrete Graphic only SKU

f

for different VRAM parts
do not stuff

5

IC JACK

M

ALC272X

AUDIO CODEC

P30

HP

P30

GMT 1453L am

P29

peaker

S

P30

P30

p

K/B Co

P34

4

NPCE7

81

P35

P37

uch Pad

To
Board Con.

3

P34

river

Fan D

PWM Type)

(

EC

25X40BVSSIG

W

SPI FLASH

n.

P34

X'

TAL

32.768KHz

R

T8206B

/5V

3V

DP3212

A

CPU core

R

T9018A

+1V

2

R

T8207A

1.5V_SUS

+

P37

AX8792ETD+T

M

+VGPU_CORE

P38

P44

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

H

PA00835RTER

+1.8V

P40

Di

P42

Ther

Quant

Quant

Quant

a Computer Inc.

a Computer Inc.

a Computer Inc.

PROJECT :

PROJECT :

PROJECT :

lock Diagram

lock Diagram

lock Diagram

B

B

B

1

scharger

P43

P43

mal Protection

ZQH

ZQH

ZQH

P44

135Monday, March 14, 2011

135Monday, March 14, 2011

135Monday, March 14, 2011

1A

1A

1A

1

WWW.AliSaler.Com

GP

U PWR CTRL Option 1 (Defaul t/ VDDR3 before VDDC)

+3.3

V

2

VIN

VIN

3

+1.5

4

V

.5V_SUS

+1

5

V

+1.8

6

7

8

+5V

O3413)

P22

+3V_

U_VRON

dGP

A A

VDDR3

MOS (A

+3_D (0.5A)

VDDC

ISL6264

+V

GPU_CORE (20A)

D

GPUIO_EN

PG_

P44

+VGP

VDDCI

SL62872

I

U_IO (4.5A)

1V_EN

PG_

P45

+1V

G9334A

+1V

(D

P PLL PWR)

DJ & MOS

(3A)

1.5V_EN

PG_

P47

VDDR1

OS (A

M

+1.5

V_GPU (10A)

O4710)

1.5V_EN

PG_

P43

VDDR4

OS (A

M

+1.8

V_GPU (3A)

O6402)

_1.5V_EN

PG

P43

BJT

U_PWROK

dGP

P22

U_PWR_EN#

dGP

MOS

AO3413

+

P22

5_GPU

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

VIN

PG_

GPUIO_EN

P44

VOLTAGE

+10V~+19V
+3V~+3.3V
+3.3V
+5V
+15V

V

+3.3
+5V
+5V
+3.3V
+1.5V
+0.75V

riation

va
+1.8V
+1.5V

+1.05V or +1.1V

+1.05V
variation
+3.3V
+5V Di

+V

GPU_CORE (20A)

er States

VDDC

ISL6264

dGP

U_VRON

Po

w

POWER PLANE

B B

C C

VIN
+VCCRTC
+3VPCU
+5VPCU
+15V
+3V_S5
+5V_S5
+5V

+1

.5VSUS
+0.75V_DDR_VTT
+VGFX_AXG S0GFX_ONInternal GPU POWER
+1.8V

V

+1.5
+1

.1V_VTT
+1.05V
+VCC_CORE
LCDVCC
+5V_GPU
+GP

U_CORE

+GPU_IO PG_GPUIO_EN+0.9V~+1.1V

VIN

PG

_1V_EN

P45

+VGP

VDDCI

ISL62872

U_IO (4.5A)

DESCRIPTION

RTC POWER
EC POWER
CHARGE POWER
CHARGE PUMP POWER
LAN/BT/CIR POWER
USB POWER
HDD/ODD/Codec/TP/CRT/HDMI POWER
P

CH/GPU/Peripheral component POWER+3V
CPU/SODIMM CORE POWER
SODIMM Termination POWER

CPU/PCH/Braidwood POWER
MINI CARD/NEW CARD POWER

PCH CORE POWER MAINON
CPU CORE POWER
LCD POWER

+1V

G9334A

+1V

+1.5

V

(D

P PLL PWR)

DJ & MOS

(3A)

CONTROL
SIGNAL

ALWAYSMAIN POWER
ALWAYS
ALW
ALWAYS

S5_
S5_O
MAINON
MAINON
SUSO
MAINON

MAINON
MAINON
MAINONCPU VTT POWER

VRON
LVDS_VDDEN

dGP

PG_1.5V_EN+1.5V+1.5V_GPU
+1.5
PG_1V_EN+1V+1V Discrete enableDP/PEG POWER

PG_

P47

AYS

ON

N

N

U_PWR_EN#

V_GPU+1.8V+1.8V_GPU

1.5V_EN

+1

.5V_SUS

VDDR1

MOS (A

+1.5

V_GPU (10A)

ACTIVE IN

ALWAYS
ALWAYS
ALWAYS
ALWAYS
ALWAYSALWAYS
S0-S5
S0-S5
S0
S0
S0-S3
S0

S0
S0
S0
S0
S0
S0

screte enableSWITCHABLE PWM IC POWER
Discrete enable+3V_DGPU CORE POWER+0.9V~+1.1V
Discrete enableGPU I/O POWER
Discrete enableVRAM CORE POWER
Discrete enableGPU_CRE/LVDS/PLL POWER

O4710)

P43

+1.5V_

GPU

Therma

+3.3

V

VDDR3

MOS (AO3413)

P22

+3_D (0.5A)

l Follow Chart

CPU

RE PWR

CO

+3V_

H_ORI

D

CHOT#

+1.8

H/W Thrott

+1.8

V

VDDR4

MOS (A

O6402)

V_GPU (3A)

NTC
The
Protection

ling

SM-Bu

P43

CPU

PCH

EC

rmal

s

PG

_1.5V_EN

PM_

THRMTRIP#

SM

CPUFAN#

BJT

P22

L1ALERT#

WIRE-

dGP

AND

U_PWROK

SYS_

SHDN#

dGP

3V/5 V
SYS PW

r

U_PWR_EN#

R

FANFAN Drive

+5V

MOS

AO3413

+

P22

5_GPU

D D

Q

Q

Q

anta Computer Inc.

anta Computer Inc.

anta Computer Inc.

u

u

u

1

2

PROJECT :

PROJECT :

Si

Si

Si

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

PW

PW

PW

Date: Sheet

onday, March 14, 2011

Date: Sheet

onday, March 14, 2011

Date: Sheet

3

4

5

6

7

onday, March 14, 2011

PROJECT :

R Status & GPU PWR CRL & THRM

R Status & GPU PWR CRL & THRM

R Status & GPU PWR CRL & THRM

ZQH

ZQH

ZQH

1A

1A

1A

of

of

of

245M

245M

245M

8

5

4

3

2

1

D D

*PBY160808T-181Y-N/2A/180ohm_6

L50

L50

+1.

5V

BLM18AG601SN1D/200mA/600ohm_6

L23

L23

+3V

C C

B B

BLM18AG601SN1D/200mA/600ohm_6

*PBY160808T-181Y-N/2A/180ohm_6

20mil

C267

+1.

C267

.1u/16V_4

.1u/16V_4

05V

R4

R4

51

51

*10K_4

*10K_4

R4

R4

46

46

10K_4

10K_4

CP

C238

C238

4.7u/10V_8

4.7u/10V_8

150mA(30mil)

C2

C2

C6

C6

43

43

.1u/16V_4

.1u/16V_4

.1u/16V_4

.1u/16V_4

_CLK

+3V

C251

C251

.1u/16V_4

.1u/16V_4

CL

K_ICH_14M<10>

I

DT: AL003197001 (ICS9LVS3197AKLFT)

+1.

5V_CLK

C

C

246

246

27

27

.1u/16V_4

.1u/16V_4

C

C

614 33p/50V_4

614 33p/50V_4

C

C

612 33p/50V_4

612 33p/50V_4

Realtek: AL000890000 (RTM890N-632-GRT)
Silego: AL000595000 (SLG8LV595VTR)

BusCPU_CLK select

SM

CH_SMBDATA<10>

U_SEL

C

C

617

617

*10p/50V/COG_4

*10p/50V/COG_4

I

565

565

R

R

0_6

0_6

R

R

455 33_4

455 33_4

Y6

Y6

14.

14.

318MHz

318MHz

C

LK_SDATA

C

LK_SCLK

U_SEL

CP

AL_IN

XT
XT

AL_OUT

3

+3V

2

+3V

U20

U20

1

DD_DOT

V

17

V

DD_SRC

24

V

DD_CPU

5

V

DD_27

29

DD_REF

V

31

SD

A

32

SC

L

30

REF_0/CPU_SEL

28

AL_IN

XT

27

XT

AL_OUT

2

VSS_

DOT

8

VSS_27

9

VSS_

SATA

12

VSS_

SRC

21

VSS_

CPU

26

VSS_

REF

33

GN

D

ICS9LRS3197AKLFT

ICS9LRS3197AKLFT

1

Q18

Q18

7002K

7002K

2N

2N

543

543

R

R

2.2K_4

2.2K_4

C

LK_SDATA

V

DD_SRC_I/O

V

DD_CPU_I/O

SRC_1/SATA

SR

C_1#/SATA#

*

CPU_STOP#

CK

PWRGD/PD#

D

DO

27M

S

CPU_1#
CP

15
18

3

OT_96

4

T_96#

6

27M

7

_SS

10
11
13

S

RC_2

14

RC_2#

16
20

CP

U_1

19
23

CP

U_0

22

U_0#

25

C

LK_SDATA <14,15,19>

+

VDDIO_CLK

CL

K_BUF_DREFCLK <10>

CL

K_BUF_DREFCLK# <10>

C

LK_BUF_DREFSSCLK <10>
LK_BUF_DREFSSCLK# <10>

C
C

LK_BUF_PCIE_3GPLL <10>

C

LK_BUF_PCIE_3GPLL# <10>

130 10K_4

130 10K_4

R

R

TP23TP
TP24TP

LK_BUF_BCLK <10>

C

LK_BUF_BCLK# <10>

C

C

K_PWRGD_R

80mA(20mil)

C6

C6

13

13

.1u/16V_4

.1u/16V_4

Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.

+3V

23
24

CLK Enabl

R_PWRGD_CK505#<30>

V

C

C

244

244

.1u/16V_4

.1u/16V_4

e

C

C

607

607

10u/Y5V_8

10u/Y5V_8

L48

L48

2

C

C

609

609

10u/Y5V_8

10u/Y5V_8

+3V

3

Q19

Q19
2N

2N

45

45

R5

R5
1K/F_4

1K/F_4

7002K

7002K

PBY160808T/2A/180ohm_6

PBY160808T/2A/180ohm_6

CK

_PWRGD_R

44

44

R5

R5
100K/F_4

100K/F_4

05V

+1.

542

542

R

1

7002K

7002K

3

R

2.2K_4

2.2K_4

C

LK_SCLK

C

LK_SCLK <14,15,19>

ize Document Number Rev

S

S

S

ize Document Number Rev

ize Document Number Rev

Cloc

Cloc

Cloc

Date: Sheet

Date: Sheet

2

Date: Sheet

01

A A

CPU_

SEL

CPU0/1=133MHz
(default)

5

CPU0/1=100MHz

CH_SMBCLK<10>

I

4

2

3

Q17

Q17
2N

2N

1

Quanta Com

Quanta Com

Quanta Com

PROJECT :

PROJECT :

PROJECT :

k Generator

k Generator

k Generator

puter Inc.

puter Inc.

puter Inc.

ZQH

ZQH

ZQH

34

34

34

1

1A

1A

1A

5Monday, March 14, 2011

5Monday, March 14, 2011

5Monday, March 14, 2011

of

of

of

5

WWW.AliSaler.Com

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)

U22A

U22A

DMI_T

XN0<8>

T

XN1<8>

DMI_

XN2<8>

DMI_T

XN3<8>

DMI_T

D D

C C

B B

>

I_TXP0<8 >

DM
DM

I_TXP1<8 >

DM

I_TXP2<8 >

DM

I_TXP3<8 >

DMI_RX
DMI_RX
DMI_
DMI_RX

DMI_RX
DMI_RX
DMI_RX
DMI_RX

FDI_T
FDI_T
FDI_T
FDI_T
FDI_T
FDI_T
FDI_T
FDI_T

FD

I_TXP0<8>

FD

I_TXP1<8>

FD

I_TXP2<8>

FD

I_TXP3<8>
I_TXP4<8>

FD

I_TXP5<8>

FD
FD

I_TXP6<8>
I_TXP7<8>

FD
FDI_FS

FDI_FS

FD

I_LSYNC0<8>
I_LSYNC1<8>

FD

N0<8>
N1<8>

RX

N2<8>
N3<8>

P0<8>
P1<8>
P2<8>
P3<8>

XN0<8>
XN1<8>
XN2<8>
XN3<8>
XN4<8>
XN5<8>
XN6<8>
XN7<8>

YNC0<8>
YNC1<8>

FDI_INT<8

A24

DMI

C23

DMI

B22

DM

A21

DMI

B24

DMI

D23

DMI

B23

DMI

A22

DMI

D24

DMI

G24

DMI

F23

DMI

H23

DM

D25

DMI

F24

DMI

E23

DMI

G23

DMI

E22

FDI

D21

FDI

D19

FDI

D18

FDI

G21

FDI

E19

FDI

F21

FDI

G18

FDI

D22

FDI

C21

FDI

D20

FDI

C18

FDI

G22

FDI

E20

FDI

F20

FDI

G19

FDI

F17

FDI

E17

FDI

C17

F

F18

FD

D17

FD

larksfield/Auburndale

larksfield/Auburndale

C

C

_RX#[0]
_RX#[1]
I

_RX#[2]
_RX#[3]

_RX[0]
_RX[1]
_RX[2]
_RX[3]

_TX#[0]
_TX#[1]
_TX#[2]
I

_TX#[3]
_TX[0]

_TX[1]
_TX[2]
_TX[3]

_TX#[0]
_TX#[1]
_TX#[2]
_TX#[3]
_TX#[4]
_TX#[5]
_TX#[6]
_TX#[7]

_TX[0]
_TX[1]
_TX[2]
_TX[3]
_TX[4]
_TX[5]
_TX[6]
_TX[7]

_FSYNC[0]
_FSYNC[1]

I_INT

D

I_LSYNC[0]
I_LSYNC[1]

DMI Intel(R) FDI

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_

PEG_

PEG_

PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_

PEG_
PEG
PEG
PEG_
PEG_
PEG_
PEG_

PEG_

PEG_

PEG_

PEG_

PEG_

PEG_

PEG_
PEG_
PEG_
PEG_
PEG_
PEG_

PEG_

PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG
PEG_

PEG_
PEG_
PEG_
PEG_
PEG_
PEG_

PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_

PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_
PEG_

ICOMPI

ICOMPO

RCOMPO

RBIAS
RX#[0]

RX#[1]
RX#[2]
RX#[3]
RX#[4]
RX#[5]
RX#[6]
RX#[7]
RX#[8]
RX#[9]

_

RX#[10]

_

RX#[11]
RX#[12]
RX#[13]
RX#[14]
RX#[15]

RX[0]
RX[1]
RX[2]
RX[3]
RX[4]
RX[5]
RX[6]
RX[7]
RX[8]

RX[9]
RX[10]
RX[11]
RX[12]
RX[13]
RX[14]
RX[15]

TX#[0]
TX#[1]
TX#[2]
TX#[3]
TX#[4]
TX#[5]
TX#[6]
TX#[7]
TX#[8]

_

TX#[9]

TX#[10]
TX#[11]
TX#[12]
TX#[13]
TX#[14]
TX#[15]

TX[0]

TX[1]

TX[2]

TX[3]

TX[4]

TX[5]

TX[6]

TX[7]

TX[8]

TX[9]
TX[10]
TX[11]
TX[12]
TX[13]
TX[14]
TX[15]

B26
A26
B27
A25

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

R436

R436

R437

R437

4

49.9/F_4

49.9/F_4

750/F_4

750/F_4

3

Processor Compensation Signals

20/F_4

20/F_4

R444

R444

20/F_4

20/F_4

R442

R442
R17

R17

3 49.9/F_4

3 49.9/F_4

R44

R44

0 49.9/F_4

0 49.9/F_4

PECI<11>

H_

H_P

ROCHOT#<27,30>

PM

_THRMTRIP#<11>

PM_SY

NC<8>

H_

PWRGOOD<11,27>

PM

_DRAM_PWRGD<8>

R193

R193

1.5K/F_4

PLTR

ST#<10,18,19,23,27>

1.5K/F_4

2

AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Arrandale
directly if motherboard only supports discrete graphics. If motherboard supports
integrated graphics but without eDP, these pins can also be connected to GND directly.

B

H_CP

H_V

T14T14

H_CA

H_P

ROCHOT#

URST#

TTPWRGD

CPU_

H_CO
H_CO
H_CO
H_CO

0

T10T1

TERR#

PLTRST#

R196

R196
750/

750/

MP3
MP2
MP1
MP0

F_4

F_4

U22

U22

AT23

COM

AT24

COM

G16

CO

AT26

COM

AH24

SKTO

AK14

CAT

AT

15

PEC

AN26

PRO

AK15

TH

AP26

RESET

AL15

PM_

AN14

VC

AN27

VC

AK13

SM

AM15

VT

AM26

TAPPW

AL14

RST

Clarksfield/Auburndale

Clarksfield/Auburndale

B

P3
P2

M

P1
P0

CC#

ERR#

I

CHOT#

ERMTRIP#

_OBS#

SYNC

CPWRGOOD_1

CPWRGOOD_0

_DRAMPWROK

TPWRGOOD

RGOOD

IN#

MISC THERMAL

MISC THERMAL

DPLL_RE

CLOCKS

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

DPLL_RE

SM

SM
SM
SM

PM_
PM_

C

B

BCL

PE

PEG_

F_SSCLK

F_SSCLK#

_

DRAMRST#
_RCOMP[0]

_RCOMP[1]
_RCOMP[2]

EXT_TS#[0]
EXT_TS#[1]

TDO

BP
BP
BP
BP
BP
B
BP
BP

BCL

BCL
LK_ITP

K_ITP#
G_CLK

CLK#

PRDY
PREQ

TRS

TDI

DBR#

M#[0]
M#[1]
M#[2]
M#[3]
M#[4]
M#[5]

P

M#[6]
M#[7]

K

K#

#
#

TCK
TMS

T#

TDI

TDO

_M
_M

A16
B16

AR30
AT30

E16
D16

A18
A17

F6
AL1

AM1
AN1

AN15
AP15

AT28
AP27

AN
AP2
AT27

AT
AR
AR29
AP29

AN

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

DP
D

28

8

29
27

25

T62T62
T67T67

LL_REF_SSCLK_R

P

LL_REF_SSCLK#_R

SM

_RCOMP_0

SM

_RCOMP_1

SM

_RCOMP_2

XDP_PR
XDP_T

CLK

XDP_T

MS

XDP_T

RST#
DI_R

XDP_T

DO_R

XDP_T

DI_M

XDP_T

DO_M

XDP_T
H_DB

R#_R

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

EQ#

R254

R254
R253

R253
R252

R252

R18

R18

7 10K_4

7 10K_4
3 10K_4

3 10K_4

R18

R18

R149

R149

T20T20

CLK

_CPU_BCLK <11>

K

_CPU_BCLK# <11>

CL

T21T21

CLK_PC
CLK_PC

R465

R465
R471

R471
R472

R472
R463

R463

DRAMRST# <14,15>

DDR3_

100/F_4

100/F_4

24.9/F_4

24.9/F_4
130/F_4

130/F_4

T68T68
T69T69

T8T8
T9T9
T71T71

T70T70
T66T66
T65T65
T64T64

*Short_4

*Short_4

T19T19
T18T18
T17T17
T13T13
T11T11
T15T15
T16T16
T12T12

IE_3GPLL <10>
IE_3GPLL# <10>

*0_4

*0_4
*0_4

*0_4
0_4

0_4
0_4

0_4

+1.

05V

1

Layout Note: Place
these resistors
near Processor

PM_EXT

TS#0 <14>

PM_EXT

TS#1 <15>

BRST# <8>

XDP_D

DP

LL_REF_SSCLK <10>

DP

LL_REF_SSCLK# <10>

Pro

Ther

maltrip prot e c t

05V

+1.

3

Q16

Q16

_THRMTRIP#

PM

2

1 3

FD

FD

V301N

V301N

1

R209

R209
1K_4

1K_4

2

Q15

Q15
MMBT3904

MMBT3904

SY

S_SHDN# <29,34>

4

_VR_PWRGOOD<8,30>

DELAY

A A

PM

_THRMTRIP#<11>

5

VTT P

WR_Good

ROK<27>

MPW

+3V

C30

C30

9

9

0.1u/10V_4

0.1u/10V_4

6

6

R17

2
1

R17

VTTPW RGD

2K/F_4

2K/F_4

H_

R17

R17

9

9

1K_4

1K_4

3

4

U5

U5

3 5

TC7

TC7

SH08FU

SH08FU

cessor pull-up

+1

R20

R20

5

5

1.1K/F_4

1.1K/F_4

9

9

R19

R19
3K/F_4

3K/F_4

DO

XDP_T

TERR#

H_CA

ROCHOT#

H_P

URST#

H_CP

MS

XDP_T

DI_R

XDP_T
XDP_PR
XDP_T

CLK

XDP_T

RST#

.5VSUS

_DRAM_PWRGD

PM

51/F_4

51/F_4

R420

R420

49.9/F_4

49.9/F_4

R192

R192

68_4

68_4

R137

R137

*68_4

*68_4

R438

R438

*51_4

*51_4

R135

R135

*51_4

*51_4

R435

R435
R434

R434

EQ#

*51_4

*51_4

R133

R133

*51_4

*51_4

R439 51/F_4R439 51/F_4

Use a voltage divider with VDDQ
(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.

2

05V

+1.

JTAG MAPPING

XDP_TDI_R XDP_TDI
XDP_TDO_M

XDP_T

DI_M

XDP_T

DO_R

Scan Chain
(Default)

CPU Only

GMCH Only

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

Si

Si

Si

Date: Sheet

Date: Sheet

Date: Sheet

0_4

0_4

R433

R433

*0_4

*0_4

R429

R429

1

1

R43

R43
0_4

0_4

R432

R432

*0_4

*0_4

R430

R430

0_4

0_4

STUFF -> R469, R491, R507
NO STUFF -> R489, R490

STUFF -> R490, R491
NO STUFF -> R469, R489, R507

STUFF -> R489, R507
NO STUFF -> R491, R490, R469

Quan

Quan

Quan

PROJECT :

PROJECT :

PROJECT :

BURNDA 1/4

BURNDA 1/4

BURNDA 1/4

AU

AU

AU

1

XDP_TDO

ta Computer Inc.

ta Computer Inc.

ta Computer Inc.

ZQH

ZQH

ZQH

1A

1A

445Monday, March 14, 2011

445Monday, March 14, 2011

445Monday, March 14, 2011

1A

of

of

of

5

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U2

U2

2C

2C

_A_DQ[63:0]<14>

M

D D

C C

B B

_A_BS#0<14>

M

_A_BS#1<14>

M

_A_BS#2<14>

M

M

_A_CAS#<14>
_A_RAS#<14>

M
M_

A_WE#<14>

M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_

A_DQ0
A_DQ1
A_DQ2
A_DQ3
A_DQ4
A_DQ5
A_DQ6
A_DQ7
A_DQ8
A_DQ9
A_DQ10
A_DQ11
A_DQ12
A_DQ13
A_DQ14
A_DQ15
A_DQ16
A_DQ17
A_DQ18
A_DQ19
A_DQ20
A_DQ21
A_DQ22
A_DQ23
A_DQ24
A_DQ25
A_DQ26
A_DQ27
A_DQ28
A_DQ29
A_DQ30
A_DQ31
A_DQ32
A_DQ33
A_DQ34
A_DQ35
A_DQ36
A_DQ37
A_DQ38
A_DQ39
A_DQ40
A_DQ41
A_DQ42
A_DQ43
A_DQ44
A_DQ45
A_DQ46
A_DQ47
A_DQ48
A_DQ49
A_DQ50
A_DQ51
A_DQ52
A_DQ53
A_DQ54
A_DQ55
A_DQ56
A_DQ57
A_DQ58
A_DQ59
A_DQ60
A_DQ61
A_DQ62
A_DQ63

C10

D10

H10

G10

AH5
AF5
AK6
AK7
AF6
AG5

AJ10
AL10

AK12

AK8

AK11

AN8
AM10
AR11

AL11

AM9

AN9

AT11

AP12
AM12
AN12
AM13

AT14

AT12

AL13
AR14

AP14

AC3
AB2

AE1
AB3
AE9

A10

DQ[0]

SA_

DQ[1]

SA_

C7

SA_

DQ[2]

A7

DQ[3]

SA_

B10

DQ[4]

SA_
SA_

DQ[5]

E10

SA_

DQ[6]

A8

SA_

DQ[7]

D8

DQ[8]

SA_

F10

DQ[9]

SA_

E6

SA_

DQ[10]

F7

SA_

DQ[11]

E9

DQ[12]

SA_

B7

DQ[13]

SA_

E7

SA_

DQ[14]

C6

DQ[15]

SA_
SA_

DQ[16]

G8

DQ[17]

SA_

K7

DQ[18]

SA_

J8

SA_

DQ[19]

G7

DQ[20]

SA_

DQ[21]

SA_

J7

DQ[22]

SA_

J10

SA_

DQ[23]

L7

DQ[24]

SA_

M6

DQ[25]

SA_

M8

DQ[26]

SA_

L9

DQ[27]

SA_

L6

SA_

DQ[28]

K8

DQ[29]

SA_

N8

SA_

DQ[30]

P9

DQ[31]

SA_
SA_

DQ[32]
DQ[33]

SA_

DQ[34]

SA_
SA_

DQ[35]
DQ[36]

SA_
SA_

DQ[37]

AJ7

DQ[38]

SA_

AJ6

SA_

DQ[39]

SA_

DQ[40]

AJ9

SA_

DQ[41]
DQ[42]

SA_

DQ[43]

SA_
SA_

DQ[44]

AL7

DQ[45]

SA_
SA_

DQ[46]

AL8

DQ[47]

SA_
SA_

DQ[48]

SA_

DQ[49]
DQ[50]

SA_

DQ[51]

SA_

DQ[52]

SA_
SA_

DQ[53]
DQ[54]

SA_
SA_

DQ[55]
DQ[56]

SA_
SA_

DQ[57]

SA_

DQ[58]
DQ[59]

SA_
SA_

DQ[60]
DQ[61]

SA_
SA_

DQ[62]
DQ[63]

SA_

SA_

BS[0]
BS[1]

SA_

U7

SA_

BS[2]

SA_

CAS#
RAS#

SA_
SA_

WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

4

AA6

SA_

CK[0]

AA7

SA_

CK#[0]

P7

CKE[0]

SA_

Y6

CK[1]

SA_

Y5

CK#[1]

SA_

P6

SA_

CKE[1]

AE2

CS#[0]

SA_

AE8

SA_

CS#[1]

AD8

SA_

ODT[0]

AF9

ODT[1]

SA_

A_DM0

M_

B9

DM[0]

SA_
SA_

DM[1]
DM[2]

SA_

DM[3]

SA_

DM[4]

SA_

DM[5]

SA_
SA_

DM[6]
DM[7]

SA_

DQS#[0]

SA_
SA_

DQS#[1]
DQS#[2]

SA_
SA_

DQS#[3]
DQS#[4]

SA_
SA_

DQS#[5]

SA_

DQS#[6]

SA_

DQS#[7]

SA_

DQS[0]
DQS[1]

SA_
SA_

DQS[2]

SA_

DQS[3]
DQS[4]

SA_

DQS[5]

SA_

DQS[6]

SA_
SA_

DQS[7]

SA_

MA[0]
MA[1]

SA_
SA_

MA[2]
MA[3]

SA_
SA_

MA[4]
MA[5]

SA_
SA_

MA[6]

SA_

MA[7]

SA_

MA[8]

SA_

MA[9]

MA[10]

SA_
SA_

MA[11]
MA[12]

SA_
SA_

MA[13]
MA[14]

SA_
SA_

MA[15]

D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_

A_DM1

M_

A_DM2
A_DM3

M_

A_DM4

M_

A_DM5

M_
M_

A_DM6
A_DM7

M_

_A_DQS#0

M
M

_A_DQS#1
_A_DQS#2

M
M

_A_DQS#3
_A_DQS#4

M
M

_A_DQS#5

M

_A_DQS#6

M

_A_DQS#7

M

_A_DQS0
_A_DQS1

M
M

_A_DQS2

M

_A_DQS3
_A_DQS4

M
M

_A_DQS5
_A_DQS6

M
M

_A_DQS7

M

_A_A0
_A_A1

M

_A_A2

M

_A_A3

M
M

_A_A4
_A_A5

M

_A_A6

M
M

_A_A7

M

_A_A8

M

_A_A9
_A_A10

M

_A_A11

M
M

_A_A12

M

_A_A13
_A_A14

M
M

_A_A15

_A_CLK0 <14>

M
M

_A_CLK0# <14>
_A_CKE0 <14>

M

M

_A_CLK1 <14>
_A_CLK1# <14>

M
M

_A_CKE1 <14>

_A_CS#0 <14>

M
M

_A_CS#1 <14>

M_

A_ODT0 <14>

M_

A_ODT1 <14>

M

_A_DQS#[7:0] <14>

M

_A_DQS[7:0] <14>

M

M

_A_DM[7:0] <14>

_A_A[15:0] <14>

3

M

_B_DQ[63:0]<15>

_B_BS#0<15>

M

_B_BS#1<15>

M
M

_B_BS#2<15>

_B_CAS#<15>

M

_B_RAS#<15>

M
M_

B_WE#<15>

M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_

B_DQ0
B_DQ1
B_DQ2
B_DQ3
B_DQ4
B_DQ5
B_DQ6
B_DQ7
B_DQ8
B_DQ9
B_DQ10
B_DQ11
B_DQ12
B_DQ13
B_DQ14
B_DQ15
B_DQ16
B_DQ17
B_DQ18
B_DQ19
B_DQ20
B_DQ21
B_DQ22
B_DQ23
B_DQ24
B_DQ25
B_DQ26
B_DQ27
B_DQ28
B_DQ29
B_DQ30
B_DQ31
B_DQ32
B_DQ33
B_DQ34
B_DQ35
B_DQ36
B_DQ37
B_DQ38
B_DQ39
B_DQ40
B_DQ41
B_DQ42
B_DQ43
B_DQ44
B_DQ45
B_DQ46
B_DQ47
B_DQ48
B_DQ49
B_DQ50
B_DQ51
B_DQ52
B_DQ53
B_DQ54
B_DQ55
B_DQ56
B_DQ57
B_DQ58
B_DQ59
B_DQ60
B_DQ61
B_DQ62
B_DQ63

AG1

AG4
AG3

AH4

AM6
AN2

AM4
AM3

AN5
AN6

AN4
AN3

AN7

AR10
AT10

AC5
AC6

AF3

AJ3

AK1

AJ4

AK3
AK4

AK5
AK2

AP3
AT4

AT5
AT6

AP6
AP8
AT9
AT7
AP9

AB1

2

2D

2D

U2

U2

W8

SB_

CK[0]

W9

S

B_CK#[0]

SB_
SB_
SB_
SB_
SB_
SB_
SB_
SB_

SB_
SB_
SB_
SB_
SB_
SB_
SB_
SB_

SB_
SB_
SB_
SB_
SB_
SB_

SB_

SB_
B_CK#[1]

S
SB_

S

B_CS#[0]

S

B_CS#[1]

SB_
SB_

SB_
SB_
SB_
SB_
SB_
SB_
SB_
SB_

DQS#[0]
DQS#[1]
DQS#[2]
DQS#[3]
DQS#[4]
DQS#[5]
DQS#[6]
DQS#[7]

SB_
SB_
SB_
SB_
SB_
SB_
SB_
SB_
SB_
SB_

CKE[0]

CK[1]

CKE[1]

ODT[0]
ODT[1]

DM[0]
DM[1]
DM[2]
DM[3]
DM[4]
DM[5]
DM[6]
DM[7]

DQS[0]
DQS[1]
DQS[2]
DQS[3]
DQS[4]
DQS[5]
DQS[6]
DQS[7]

MA[0]
MA[1]
MA[2]
MA[3]
MA[4]
MA[5]
MA[6]
MA[7]
MA[8]

MA[9]
MA[10]
MA[11]
MA[12]
MA[13]
MA[14]
MA[15]

M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_
M_
M_
M_
M_
M_
M_
M_

_B_DQS#0

M
M

_B_DQS#1
_B_DQS#2

M
M

_B_DQS#3

M

_B_DQS#4
_B_DQS#5

M
M

_B_DQS#6
_B_DQS#7

M

_B_DQS0

M
M

_B_DQS1
_B_DQS2

M
M

_B_DQS3
_B_DQS4

M
M

_B_DQS5

M

_B_DQS6
_B_DQS7

M

M

_B_A0
_B_A1

M

_B_A2

M

_B_A3

M
M

_B_A4
_B_A5

M

_B_A6

M
M

_B_A7

M

_B_A8

M

_B_A9
_B_A10

M

_B_A11

M
M

_B_A12

M

_B_A13
_B_A14

M
M

_B_A15

B5

DQ[0]

SB_

A5

DQ[1]

SB_

C3

SB_

DQ[2]

B3

SB_

DQ[3]

E4

DQ[4]

SB_

A6

DQ[5]

SB_

A4

DQ[6]

SB_

C4

SB_

DQ[7]

D1

DQ[8]

SB_

D2

DQ[9]

SB_

F2

SB_

DQ[10]

F1

SB_

DQ[11]

C2

SB_

DQ[12]

F5

DQ[13]

SB_

F3

DQ[14]

SB_

G4

SB_

DQ[15]

H6

SB_

DQ[16]

G2

DQ[17]

SB_

J6

DQ[18]

SB_

J3

SB_

DQ[19]

G1

DQ[20]

SB_

G5

SB_

DQ[21]

J2

DQ[22]

SB_

J1

DQ[23]

SB_

J5

SB_

DQ[24]

K2

DQ[25]

SB_

L3

DQ[26]

SB_

M1

DQ[27]

SB_

K5

SB_

DQ[28]

K4

DQ[29]

SB_

M4

DQ[30]

SB_

N5

DQ[31]

SB_

DQ[32]

SB_
SB_

DQ[33]
DQ[34]

SB_
SB_

DQ[35]
DQ[36]

SB_
SB_

DQ[37]
DQ[38]

SB_

DQ[39]

SB_
SB_

DQ[40]
DQ[41]

SB_
SB_

DQ[42]
DQ[43]

SB_
SB_

DQ[44]

SB_

DQ[45]

SB_

DQ[46]
DQ[47]

SB_

DQ[48]

SB_
SB_

DQ[49]
DQ[50]

SB_
SB_

DQ[51]
DQ[52]

SB_
SB_

DQ[53]

SB_

DQ[54]
DQ[55]

SB_

DQ[56]

SB_

DQ[57]

SB_
SB_

DQ[58]
DQ[59]

SB_
SB_

DQ[60]
DQ[61]

SB_
SB_

DQ[62]

SB_

DQ[63]

BS[0]

SB_

W5

SB_

BS[1]

R7

SB_

BS[2]

CAS#

SB_

Y7

SB_

RAS#
WE#

SB_

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

B_DM0
B_DM1
B_DM2
B_DM3
B_DM4
B_DM5
B_DM6
B_DM7

1

_B_CLK0 <15>

M
M

_B_CLK0# <15>
_B_CKE0 <15>

M

M

_B_CLK1 <15>
_B_CLK1# <15>

M

_B_CKE1 <15>

M

M_

B_CS#0 <15>
B_CS#1 <15>

M_

M

_B_ODT0 <15>
_B_ODT1 <15>

M

M

_B_DM[7:0] <15>

_B_DQS#[7:0] <15>

M

_B_DQS[7:0] <15>

M

_B_A[15:0] <15>

M

Clarksfield/Auburndale

Clarksfield/Auburndale

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.

A A

5

4

3

Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.

Clarksfield/Auburndale

2

Q

Q

Q

uanta Computer Inc.

uanta Computer Inc.

uanta Computer Inc.

PROJECT :

PROJECT :

Si

Si

Si

ze Document Number Re v

ze Document Number Re v

ze Document Number Re v

AUBURNDA 2/4

AUBURNDA 2/4

AUBURNDA 2/4

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

ZQH

ZQH

ZQH

54

54

54

1

of

of

of

1A

1A

1A

5Monday, March 14, 2011

5Monday, March 14, 2011

5Monday, March 14, 2011

5

WWW.AliSaler.Com

U22

U22

F

35

AG
AG

34
33

AG
AG

32

AG

31
30

AG

29

AG
AG

28
27

AG
AG

26

AF

35
34

AF
AF

33
32

AF

31

AF
AF

30

AF

29
28

AF
AF

27
26

AF
AD

35

AD

34
33

AD
AD

32

AD

31
30

AD
AD

29

AD

28

AD

27

AD

26
35

AC

34

AC
AC

33
32

AC

31

AC
AC

30
29

AC
AC

28
27

AC

26

AC
AA3

5

AA3

4
3

AA3
AA3

2
1

AA3
AA3

0

AA2

9
8

AA2
AA2

7

AA2

6
5

Y3

4

Y3
Y3

3
2

Y3
Y3

1
0

Y3

9

Y2
Y2

8
7

Y2

6

Y2
V3

5
4

V3
V3

3
2

V3

1

V3
V3

0

V2

9
8

V2
V2

7

V2

6
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26

5

P3
P34
P3

3

2

P3
P31
P3

0

9

P2
P2

8
P2

7

6

P2

Clarksfield/Auburndale

Clarksfield/Auburndale

F

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10

CC11

V
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27

CC28

V
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
V

CC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
V

CC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CPU Core Power

ARD:

48A

CC_CORE

10U/6.3V_8

10U/6.3V_8
22U/6.3V_8

22U/6.3V_8
10U/6.3V_8

10U/6.3V_8
22U/6.3V_8

22U/6.3V_8
22U/6.3V_8

22U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
22U/6.3V_8

22U/6.3V_8
22U/6.3V_8

22U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
22U/6.3V_8

22U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

+

+

330u/2V_7343

330u/2V_7343

+

+

330u/2V_7343

330u/2V_7343

+V

CFD:52A

C568

C568
C626

C626
C234

C234
C589

D D

C C

B B

A A

C589
C623

C623
C643

C643
C

C
C

C
C567

C567
C640

C640
C230

C230
C588

C588
C235

C235
C569

C569
C297

C297
C624

C624
C621

C621
C638

C638
C625

C625
C566

C566
C622

C622
C266

C266
C265

C265
C236

C236
C641

C641
C287

C287
C232

C232
C633

C633
C275

C275
C271

C271
C284

C284
C285

C285

642

642
590

590

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5

4

1.1V RAIL POWER

1.1V RAIL POWER

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

C_DPRSLPVR

PRO

CPU VIDS

CPU VIDS

VTT

VSS_SEN

SENSE LINES

SENSE LINES

4

VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0

VT

T0_10

T

T0_11

V

T0_12

VT
VT

T0_13
T0_14

VT

T0_15

VT
VT

T0_16

VT

T0_17
T0_18

VT
VT

T0_19
T0_20

VT
VT

T0_21

VT

T0_22
T0_23

VT
VT

T0_24

VT

T0_25
T0_26

VT
VT

T0_27

T

T0_28

V
VT

T0_29

VT

T0_30
T0_31

VT

T0_32

VT

VT

T0_33
T0_34

VT
VT

T0_35
T0_36

VT

T0_37

VT
VT

T0_38

VT

T0_39
T0_40

VT
VT

T0_41

V

T0_42

T

VT

T0_43

VT

T0_44

VID
VID
VID
VID
VID
VID
VID

_SELECT

ISEN

_SENSE

VCC
VSS_SENSE

VTT_SENSE

SE_VTT

AH14

_1

AH12

_2

AH11

_3

AH10

_4

J14

_5

J13

_6

H14

_7

H12

_8

G14

_9

G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

H_

PSI#

AN

33

PSI#

H_V

AK35

[0]

H_V

AK33

[1]

H_V

AK34

[2]

H_V

AL35

[3]

H_

V

AL33

[4]

H_V

AM33

[5]

H_V

AM35

[6]

H_DP

AM34

G15

H_VTTVID1=Low, 1.1V
H_VTTVID1=High, 1.05V

AN35

SE

AJ34
AJ35

VTT_SENSE

B15

VSS_SENSE_VT

A15

ID0
ID1
ID2
ID3
ID4
ID5
ID6

RSLPVR

R104

R104

R103

R103

C658

C658
C657

C657
C634

C634
C

C
C

C
C649

C649
C644

C644
C659

C659
C652

C652
C331

C331

C313

C313
C326

C326

327

327
648

648

10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8

C31

C31

6

6

+

+

330u/2V_7343

330u/2V_7343

22U/6.3V_8

22U/6.3V_8
22U/6.3V_8

22U/6.3V_8

100/F_4

100/F_4

100/F_4

100/F_4

T

VTT Rail Values are
Auburndal VTT=1.05V
Clarksfield VTT=1.1V

H_PSI

H_
H_V
H_V
H_V
H_V
H_V
H_V
H_DP

CC_CORE

+V

T75T75
T74T74

18A

V

05V

+1.

# <30>

ID0 <30>
ID1 <30>
ID2 <30>
ID3 <30>
ID4 <30>
ID5 <30>
ID6 <30>

RSLPVR <30>

I_MO

VCCSENSE <30>
VSSSENSE

+1.

N <30>

05V

<30>

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

U22

U22

G

*1K/F_4

*1K/F_4
1K_4

1K_4
1K_4

1K_4
*1K/F_4

*1K/F_4
1K_4

1K_4
*1K/F_4

*1K/F_4
1K_4

1K_4
1K_4

1K_4
*1K/F_4

*1K/F_4
*1K/F_4

*1K/F_4
1K_4

1K_4
*1K/F_4

*1K/F_4
*1K/F_4

*1K/F_4

AR
AR
AR
AR
AP2
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16

AH21
AH19
AH18
AH16

21

AT
AT

19

AT

18
16

AT

21
19
18
16

AJ21
AJ19
AJ18
AJ16

J24
J23

H25

K26

J27
J26

J25
H27
G28
G27
G26
F26
E26
E25

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8

1

VAXG
VAXG1
VAXG1
VAXG1
VAXG1
VAXG1
VAXG1
VAXG1
VAXG1
VAXG1
VAXG1
VAXG2
VAXG2
VAXG2
VAXG2
VAXG2
VAXG2
VAXG
VAXG2
VAXG2
VAXG2
VAXG3
VAXG3
VAXG3
VAXG3
VAXG3
VAXG3
VAXG3

VTT
VT
VTT

VTT
VTT
VTT
VTT
VT
VTT
VTT
VTT
VTT
VTT
VTT

Clarksfield/Auburndale

Clarksfield/Auburndale

G

9

0
1
2

GRAPHICS

GRAPHICS

3
4
5
6
7
8
9
0
1
2
3
4
5

2

6
7
8
9
0
1
2
3
4
5
6

FDI PEG & DMI

FDI PEG & DMI

1_45
1_46

T

1_47

1_48
1_49
1_50
1_51
1_52

T

1_53
1_54
1_55
1_56
1_57
1_58

+1.

05V

HFM_VID : Max 1.4V
LFM_VID : Min 0.65V

2

VAXG_

VSSAXG_

SENSE

LINES

SENSE

LINES

GF

F

G
GF
GF
GF
GF
GF

GF

X_VR_EN

X_DPRSLPVR

GF

GFX_

GRAPHICS VIDs

GRAPHICS VIDs

POWER

POWER

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

VTT0
VTT0
VTT0
VTT0

VTT1
VTT1
VTT1

1.1V1.8V

1.1V1.8V

VTT1
VTT1
V

VCCP
VCCP
VCCP

SENSE
SENSE

X_VID[0]
X_VID[1]
X_VID[2]
X_VID[3]
X_VID[4]
X_VID[5]
X_VID[6]

IMON

VDDQ

DDQ

V
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

TT1

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

AJ1

1

AF1

2

AE7

3

AE4

4

AC1

5

AB7

6

AB4

7

Y1

8

W7

9

W4

10

U1

11

T7

12

T4

13

P1

14

N7

15

N4

16

L1

17

H1

18

P10

_59

N10

_60
_61
_62

_63
_64
_65
_66
_67
_68

LL1
LL2
LL3

C660

C660

L10

C654

C654

K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

Si

Si

Si

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

22A

VGF

X_AXG

+

+

+

C635

C635

330U/2V_7343

330U/2V_7343

*

*

+

+

C651

C651

330U/2V_7343

330U/2V_7343

*

*

+1.

05V

C332

C332

0U/6.3V_8

0U/6.3V_8

1

1

3

22u/6.3V_8

22u/6.3V_8

10u/6.3V_8

10u/6.3V_8

C31

C31

1

1

10U/6.3V_8

10U/6.3V_8

6

6

C65

C65
10U/6.3V_8

10U/6.3V_8

1

1

1

0

0

1

0

1

0

Note:
For Validating IMVP VR R6451 should be STUFF
and R2N1 NO_STUFF

0

0

1

1

C28

C28

C28

C28

22u/6.3V_8

22u/6.3V_8

9

C655

C655
22u/

22u/

C312

C312
22u/

22u/

PSI#

ID0
ID1
ID2

ID4
ID5

6.3V_8

6.3V_8

6.3V_8

6.3V_8

RSLPVR

9

C29

C29

10u/6.3V_8

10u/6.3V_8

0

0

C33

C33
22u/6.3V_8

22u/6.3V_8

R388 1K_4R388 1K_4
R395

R395
R387

R387
R394 *1K/F_4R394 *1K/F_4
R389

R389
R396

R396
R400 *1K/F_4R400 *1K/F_4
R409

R409
R401

R401
R410

R410
R404

R404
R413

R413
R402

R402
R411

R411
R403 1K_4R403 1K_4
R412

R412
R419

R419
R418 1K_4R418 1K_4

8

8

C29

C29

H_V
H_V
H_V
H_VID3
H_V
H_V
H_VID6
H_DP
H_

T72T72

T73T7

8

8

C35

C35

C35

C35

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

1U/6.3V_4

C36

C36

C41

C41

7

7

22U/6.3V_8

22U/6.3V_8

1U/6.3V_4

1U/6.3V_4

10U/6.3V_8

10U/6.3V_8
10U/6.3V_8

10U/6.3V_8

0.6A

AUBURNDA 3/

AUBURNDA 3/

AUBURNDA 3/

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

VCC

_AXG_SENSE <33>

VSS_AXG_SENSE

3

GFX_VI

D0 <33>

GFX_VI

D1 <33>

GFX_VI

D2 <33>
D3 <33>

GFX_VI

D4 <33>

GFX_VI
GFX_VI

D5 <33>

GFX_VI

D6 <33>

GFX_ON

<33>

PRSLPVR <33>

GFX_D

MON <33>

GFX_I

6

6

5

5

C35

C35
1U/6.3V_4

1U/6.3V_4

C35

C35

0

0

22U/6.3V_8

22U/6.3V_8

+1.

05V

C61

C61

810U/6.3V_8

810U/6.3V_8

C63

C63

010U/6.3V_8

010U/6.3V_8

8V

+1.

822U/6.3V_8

822U/6.3V_8

C25

C25
C27

C27

44.7U/6.3V_6

44.7U/6.3V_6

C23

C23

12.2U/6.3V_6

12.2U/6.3V_6
31U/6.3V_4

31U/6.3V_4

C23

C23

91U/6.3V_4

91U/6.3V_4

C23

C23

Quanta

Quanta

Quanta

PROJECT :

PROJECT :

PROJECT :

4 (PWR)

4 (PWR)

4 (PWR)

1

<33>

3A

ARD:
CFD:6A

+1

.5VSUS

2

2

C35

C35
1U/6.3V_4

1U/6.3V_4

+

+

C36

C36

7

7

3

3

330U/2V_7343

330U/2V_7343

Computer Inc.

Computer Inc.

Computer Inc.

ZQH

ZQH

ZQH

645M

645M

645M

of

of

of

1A

1A

1A

5

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

22H

22H

U

U

0

AT2

VSS1

AT1

7

VSS2

AR3

1

VSS3

AR2

8

VSS4

AR2

6

VSS5

4

AR2

VSS6

AR2

3

VSS7

0

AR2

VSS8

7

AR1

VSS9

AR15

0

VSS1

D D

C C

B B

AR12

VSS1

AR9

VSS1

AR6

VSS1

AR3

VSS1

AP20

VSS1

AP17

VSS1

AP13

VSS1

AP10

VSS1

AP7

VSS1

AP4

VSS2

AP2

VSS2

AN34

VSS2

AN31

VSS2

AN23

VSS2

AN20

VSS2

AN17

VSS26

AM29

VSS2

AM27

VSS2

AM25

VSS2

AM20

VSS30

AM17

VSS3

AM14

VSS32

AM11

VSS3

AM8

VSS3

AM5

VSS3

AM2

VSS3

AL34

VSS3

AL31

VSS3

AL23

VSS3

AL20

VSS4

AL17

VSS4

AL12

VSS4

AL9

VSS4

AL6

VSS4

AL3

VSS4

AK29

VSS4

AK27

VSS4

AK25

VSS4

AK20

VSS4

AK17

VSS5

AJ31

VSS5

AJ23

VSS5

AJ20

VSS5

AJ17

VSS5

AJ14

VSS5

AJ11

VSS5

AJ8

VSS5

AJ5

VSS5

AJ2

VSS5

AH35

VSS6

AH34

VSS6

AH33

VSS6

AH32

VSS6

AH31

VSS6

AH30

VSS6

AH29

VSS6

AH28

VSS6

AH27

VSS6

AH26

VSS6

AH20

VSS7

AH17

VSS7

AH13

VSS7

AH9

VSS7

AH6

VSS7

AH3

VSS7

AG10

VSS7

AF8

VSS7

AF4

VSS7

AF2

VSS7

AE35

VSS8

Clarksfield/Auburndale

Clarksfield/Auburndale

1
2
3
4
5
6
7
8
9
0
1
2
3
4
5

7
8
9

1
3

4
5
6
7

VSS

VSS

8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0

VSS8
VSS8
VSS8
VSS8
VSS8
VSS8
VSS8
VSS8
VSS8
VSS9
VSS9
VSS9
VSS9
VSS9
VSS9
VSS9
VSS9
VSS9

VSS9
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS106
VSS1
VSS1
VSS1
VSS110
VSS1
VSS112
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1

AE34

1

AE33

2

AE32

3

AE31

4

AE30

5

AE29

6

AE28

7

AE27

8

AE26

9

AE6

0

AD10

1

AC8

2

AC4

3

AC2

4

AB35

5

AB34

6

AB33

7

AB32

8

AB31

9

AB30

00

AB29

01

AB28

02

AB27

03

AB26

04

AB6

05

AA10
Y8

07

Y4

08

Y2

09

W35
W34

11

W33
W32

13

W31

14

W30

15

W29

16

W28

17

W27

18

W26

19

W6

20

V10

21

U8

22

U4

23

U2

24

T35

25

T34

26

T33

27

T32

28

T31

29

T30

30

T29

31

T28

32

T27

33

T26

34

T6

35

R10

36

P8

37

P4

38

P2

39

N35

40

N34

41

N33

42

N32

43

N31

44

N30

45

N29

46

N28

47

N27

48

N26

49

N6

50

M10

51

L35

52

L32

53

L29

54

L8

55

L5

56

L2

57

K34

58

K33

59

K30

60

22I

22I

U

U

K27

VSS1

K9

VSS1

K6

VSS1

K3

VSS1

J32

VSS1

J30

VSS1

J21

VSS1

J19

VSS1

H35

VSS1

H32

VSS1

H28

VSS1

H26

VSS1

H24

VSS1

H22

VSS1

H18

VSS1

H15

VSS1

H13

VSS1

H11

VSS1

H8

VSS1

H5

VSS1

H2

VSS1

G34

VSS1

G31

VSS1

G20

VSS184

G9

VSS1

G6

VSS1

G3

VSS1

F30

VSS188

F27

VSS1

F25

VSS190

F22

VSS1

F19

VSS1

F16

VSS1

E35

VSS1

E32

VSS1

E29

VSS1

E24

VSS1

E21

VSS1

E18

VSS1

E13

VSS2

E11

VSS2

E8

VSS2

E5

VSS2

E2

VSS2

D33

VSS2

D30

VSS2

D26

VSS2

D9

VSS2

D6

VSS2

D3

VSS2

C34

VSS2

C32

VSS2

C29

VSS2

C28

VSS2

C24

VSS2

C22

VSS2

C20

VSS2

C19

VSS2

C16

VSS2

B31

VSS2

B25

VSS2

B21

VSS2

B18

VSS2

B17

VSS2

B13

VSS2

B11

VSS2

B8

VSS2

B6

VSS2

B4

VSS2

A29

VSS2

A27

VSS2

A23

VSS2

A9

VSS2

Clarksfield/Auburndale

Clarksfield/Auburndale

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

2E

2E

U2

U2

61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83

85
86
87

89
91

92
93
94
95

VSS

VSS

96
97
98
99
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33

NCTF

NCTF

VSS_
VSS_
VSS_
VSS_
VSS_
VSS_
VSS_

NCTF1
NCTF2
NCTF3
NCTF4
NCTF5
NCTF6
NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

TP20TP20
TP22TP22
TP34TP34

VREF_
VREF_

DQ_DIMM0<14>
DQ_DIMM1<15>

TP25TP25
TP26TP26

AP2

5

RSVD1

A

L25

RSVD2

L24

A

RSVD3

A

L22

RSVD4

33

AJ

RSVD5

9

AG

RSVD6

7

M2

RSVD7

L28

RSVD8

J17

DIMM_VREF

SA_

H17

SB_

DIMM_VREF

G25

1

RSVD1

G17

RSVD1

2

E31

RSVD1

3

E30

RSVD1

4

CF

G0

AM30

G[0]

CF

AM28

CFG[1]

AP31

G[2]

CF

G3
G4

CF

G7

CF

CF

AL32

CF

AL30

CF

AM31

CFG[5]

AN29

CF

AM32

CFG[7]

AK32

CF

AK31

CF

AK28

CF

AJ28

CF

AN30

CF

AN32

CF

AJ32

CF

AJ29

CF

AJ30

CF

AK30

CF

H16

RSVD_

B19

RSVD1

A19

RSVD1

A20

RSVD1

B20

RSVD1

U9

RSVD1

T9

RSVD2

AC9

RSVD2

AB9

RSVD2

C1

RSVD_

A3

RSVD_

J29

RSVD2

J28

RSVD2

A34

RSVD_

A33

RSVD_

C35

RSVD_

B35

RSVD_

Clarksfield/Auburndale

Clarksfield/Auburndale

G[3]
G[4]

G[6]
G[8]

G[9]
G[10]
G[11]
G[12]
G[13]
G[14]
G[15]
G[16]
G[17]

TP_86

5
6

7
8

9
0

1
2

NCTF_23
NCTF_24

6
7

NCTF_28
NCTF_29

NCTF_30
NCTF_31

RSVD_

RSVD_
RSVD_

RSVD_
RSVD_

RSVD_
RSVD_
RSVD_
RSVD_

RSVD_
RSVD_

RESERVED

RESERVED

RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_

RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_
RSVD_

RSVD3
RSVD3

RSVD3
RSVD3

RSVD3

NCTF_37

RSVD3
RSVD3

NCTF_40
NCTF_41

NCTF_42
NCTF_43

RSVD4
RSVD4
RSVD47
RSVD4
RSVD4
RSVD5
RSVD51
RSVD5

RSVD53
NCTF_54
NCTF_55
NCTF_56
NCTF_57

RSVD5

TP_59
TP_60

KEY
RSVD6
RSVD6
RSVD6
RSVD6

TP_66
TP_67
TP_68
TP_69
TP_70
TP_71
TP_72
TP_73
TP_74
TP_75

TP_76
TP_77
TP_78
TP_79
TP_80
TP_81
TP_82
TP_83
TP_84
TP_85

VSS

AJ13

2

AJ12

3

AH25

4

AK26

5

AL26

6

AR2
AJ26

8

AJ27

9

AP1
AT2

AT3
AR1

AL28

5

AL29

6

AP30
AP32

8

AL27

9

AT31

0

AT32
AP33

2

AR33
AT33
AT34
AP35
AR35
AR32

8

E15
F15
A2
D15

2

C15

3

AJ15

4
5

TP8TP8

AH15

TP9TP9

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP3

4

TP19TP19

P34 can be NC on CRB; EDS/DG suggestion to GND

A

Processor Strapping

CFG0

10

(PCI-Epress
Configuration Select)

CFG3
(PCI-Epress Static
Lane Reversal)

A A

5

CFG4
(Embended
Display Port Presence)

7
V

K
,

S

H
D

Q

H


F

Q

W

F

&
R

G

H

L

O
P



O

I

D
S

%



L

U
R

*

U

F

N

Single PEG

Bifurcation enabled

Normal Operation Lane Numbers Reversed

Enabl

sabled; No Physical Display Port

Di
attached to Embedded Diplay Port

4

ed; An external Display port
device is connected to the Embedded
Display port

3

DEFAULT

1

1

1

CF

G0

128 *3.01K_NC

128 *3.01K_NC

R

R

CF

G3

125 3.01K/F_4

125 3.01K/F_4

R

R

CFG4

R

R

127 *3.01K

127 *3.01K

G7

CF

R126 *3.01K/F_4R126 *3.01K/F_4

puter Inc.

puter Inc.

Quanta Com

Quanta Com

Quanta Com

PROJECT :

PROJECT :

Si

Si

Si

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

AUBURNDA 4/4

AUBURNDA 4/4

AUBURNDA 4/4

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

1

puter Inc.

ZQH

ZQH

ZQH

745Monday, March 14, 2011

745Monday, March 14, 2011

745Monday, March 14, 2011

1A

1A

1A

5

WWW.AliSaler.Com

IBEX PEAK-M (DMI,FDI,GPIO)

4

3

2

1

AC-coupling CAP place close to PCH

C

C

U21

U21

DBRST#

PWR_ACK_R

ACI

PM_

BATLOW#

PM_

RI#

BC24

DMI0

RXN

BJ22

RXN

DMI1

AW20

DMI2

RXN

BJ20

RXN

DMI3

BD24

RXP

DMI0

BG22

I1

RXP

DM

BA20

RXP

DMI2

BG20

DMI3

RXP

BE22

DMI0

TXN

BF21

DMI1

TXN

BD20

DMI2

TXN

BE18

TXN

DMI3

BD22

TXP

DMI0

BH21

TXP

DMI1

BC20

TXP

DMI2

BD18

DMI3

TXP

BH25

DMI_

ZCOMP

BF25

DMI_

IRCOMP

T6

RESET#

SYS_

M6

PWROK

SYS_

B17

PWRO

K

K5

MEPW

ROK

A10

N_RST#

LA

D9

DRAMP

WROK

C16

R

ST#

RSM

M1

SUS_PW

R_DN_ACK / GPIO30

P5

N#

PWRBT

N_R

P7

ACPRESENT

A6

BA

TLOW# / GPIO72

F14

RI#

IbexPeak-M_R1P0

IbexPeak-M_R1P0

DMI

FDI

DMI

FDI

CLKRUN#

SUS_ST

AT# / GPIO61

SCLK / GPIO62

SU

SL

P_S5# / GPIO63

/

GPIO31

System Power Management

System Power Management

SL

P_LAN# / GPIO29

RXN0<4>

DMI_
DMI_

D D

C C

DBRST#<4>

XDP_

SYS_PW

PM_

DRAM_PWRGD<4>

ICH_RS

B B

RXN1<4>

DMI_

RXN2<4>

DMI_

RXN3<4>
RXP0<4>

DMI_

RXP1<4>

DMI_

RXP2<4>

DMI_
DMI_

RXP3<4>

DMI_

TXN0<4>
TXN1<4>

DMI_

TXN2<4>

DMI_

TXN3<4>

DMI_
DM

I_TXP0<4>

DM

I_TXP1<4>

DM

I_TXP2<4>
I_TXP3<4>

DM

1 49.9/F _4

1 49.9/F _4

R44

R44

+1.0

5V

XDP_

ROK

RSV

_ICH_LAN_RST#

MRST#<27>

SUS_

BSWON#<27>

DN

R24

R24

6 *0_4

PCH_

ACIN<27>

6 *0_4

FD
FD
FD
FD
FD
FD
FD
F

FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_
FDI_

FDI_
FDI_

I_LSYNC0

FD

I_LSYNC1

FD

PMSY

I_RXN0
I_RXN1
I_RXN2
I_RXN3
I_RXN4
I_RXN5
I_RXN6

D

I_RXN7

RXP0
RXP1
RXP2
RXP3
RXP4
RXP5
RXP6
RXP7

FD

I_INT
FSYNC0
FSYNC1

WAKE#

/ GPIO32

P_

SL

SLP_

SLP_

TP

NCH

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14
BF13
BH13
BJ12
BG14

2

J1

Y1

P8

R2

R2

34 *Short_4

34 *Short_4

F3

E4

H7

S4#

P12

S3#

R225

R225

SLP_

M#

K8

M#

N2

2

3

BJ10

PM

_SLP_LAN#

F6

_TXN0 <4>

FDI

_TXN1 <4>

FDI
FDI

_TXN2 <4>

FDI

_TXN3 <4>

FDI

_TXN4 <4>

FDI

_TXN5 <4>
_TXN6 <4>

FDI

_TXN7 <4>

FDI
FD

I_TXP0 <4>

FD

I_TXP1 <4>

FD

I_TXP2 <4>
I_TXP3 <4>

FD

I_TXP4 <4>

FD

I_TXP5 <4>

FD

I_TXP6 <4>

FD
FD

I_TXP7 <4>

*0_4

*0_4

TP32TP3

TP18TP1

H_SUSCLK <27>

IC

2

8

I_INT <4>

FD

I_FSYNC0 <4>

FD
FD

I_FSYNC1 <4>

FD

I_LSYNC0 <4>
I_LSYNC1 <4>

FD

E_WAKE# <18,19>

PCI

CLK

RUN# <27>

# <27>

SUSC

SUSB#

<27>

PM_

SYNC <4>

INT_
INT_

INT

_LVDS_BLON<16>

INT

_LVDS_DIGON<16>

INT

_LVDS_BRIGHT<16>

LVDS_EDIDCLK<16>

INT_

LVDS_EDIDDATA<16>

INT_

IN

IN

T_TXLCLKOUT+<16>

IN

IN

IN

INT_

CRT_BLU<16>

INT_

CRT_GRN<16>

INT_

CRT_RED<16>

CRT_DDCCLK<16>
CRT_DDCDAT<16>

IN

T_HSYNC<16>
T_VSYNC<16>

IN

+3V

T_TXLCLKOUT-<16>

T_TXLOUT0-<16>

T_TXLOUT1-<16>

T_TXLOUT2-<16>

IN

IN

IN

T_TXLOUT0+<16>

T_TXLOUT1+<16>

T_TXLOUT2+<16>

R119 10K

R119 10K
R120 10K

R120 10K

R144

R144

2.37K/F_4

2.37K/F_4

0_4

0_4

R111

R111

0_4

0_4

R112

R112

IN

T_TXLCLKOUT-

IN

T_TXLCLKOUT+
T_TXLOUT0-

IN

T_TXLOUT1-

IN
IN

T_TXLOUT2-

IN

T_TXLOUT0+
T_TXLOUT1+

IN

T_TXLOUT2+

IN

T_CRT_BLU

IN

CRT_GRN

INT_

CRT_RED

INT_

DAC_

R134

R134

/F_4

/F_4

1K

1K

IBEX PEAK-M (LVDS,DDI)

U21

U21

D

D

T48

BKLTEN

IREF

L_

T47

L_

VDD_EN

Y48

BKLTCTL

L_

AB48

_

DDC_CLK

L

Y45

DDC_DATA

AB46

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53
AT49
AU52
AT53

AY51
AT48
AU50
AT51

AA52
AB53
AD53

AD4
AB51

V48

V51
V53

Y53
Y51

8

L_
L_CT

RL_CLK

L_

CTRL_DATA

LVD

_IBG

D_VBG

LV

D_VREFH

LV

D_VREFL

LV

LV

DSA_CLK#

LV

DSA_CLK

LVD

SA_DATA#0

LVD

SA_DATA#1
SA_DATA#2

LVD

SA_DATA#3

LVD

DSA_DATA0

LV
L

DSA_DATA1

V

LV

DSA_DATA2

LV

DSA_DATA3

LV

DSB_CLK#
DSB_CLK

LV

SB_DATA#0

LVD

SB_DATA#1

LVD

SB_DATA#2

LVD
LVD

SB_DATA#3

LV

DSB_DATA0

LV

DSB_DATA1

LV

DSB_DATA2

LVDSB_DATA3

BLUE

CRT_
CRT_

GREEN
RED

CRT_

CRT_

DDC_CLK
DDC_DATA

CRT_

CRT_

HSYNC
VSYNC

CRT_

IREF

DAC_

IRTN

CRT_

IbexPeak-M_R1P0

IbexPeak-M_R1P0

LVDS

LVDS

CRT

CRT

_4

_4
_4

_4

SDVO_
SDVO_

SDVO_

SDVO_

DDPC_CT

DDPC_CT

Digital Display Interface

Digital Display Interface

DDPD_CT

DDPD_CT

TVCLKINN
TVCLKINP

VO_STALLN

SD

SDVO_

SDVO_
SDVO_

CTRLCLK

CTRLDATA

DDPB_AUX
DDPB_AUX

DDPB_HPD

DDPB_0
DD
DDPB_1
DD
DDPB_2
DD
DDPB_3
DD

DDPC_AUX
DDPC_AUXP

DDPC_HPD

DDPC_0

DDPC_0

DDPC_1

DDPC_1

DDPC_2

DDPC_2

DDPC_3N

DDPC_3

DDPD_
DDPD_AUX

DDPD_HPD

DDPD_0

DDPD_0

DDPD_1

DDPD_1

DDPD_2

DDPD_

DDPD_3

DDPD_3

STALLP

INTN

PB_0P
PB_1P
PB_2P
PB_3P

RLCLK

RLDATA

RLCLK

RLDATA

AUX

INTP

BJ46
BG46

BJ48
BG48

BF45
BH45

T51
T53

BG44

N

BJ44

P

AU3

8

IN

T_HDMITX2N_R

BD42

N
N
N
N

N

N
P
N
P
N
P

P

N
P

N
P
N
P
N

2

P
N
P

BC42
BJ42
BG42
BB40
BA40
AW38
BA38

Y49
AB49

BE44
BD44
AV4

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

38

0

HDMITX2P_R

INT_

T_HDMITX1N_R

IN

HDMITX1P_R

INT_
IN

T_HDMITX0N_R

INT_

HDMITX0P_R

INT_

HDMICLK-_R

INT_

HDMICLK+_R

VO_CTRLCLK <17>

SD

_CTRLDAT <17>

SDVO

C249

C249

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C247

C247

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C242

C242

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C245

C245

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C253

C253
C250

C250

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C237

C237

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C241

C241

0.1u/10V_4_X7R

0.1u/10V_4_X7R

R pl

ace close to PCH

R425 150_4R425 150_4
R426 150_4R426 150_4
R427 150_4R427 150_4

INT_
INT_
INT_

INT_

CRT_BLU
CRT_GRN
CRT_RED

HDMI_HPD <17>

HDMITX2N <17>

INT_
INT_

HDMITX2P <17>

INT_

HDMITX1N <17>

INT_

HDMITX1P <17>

INT_

HDMITX0N <17>
HDMITX0P <17>

INT_

T_HDMICLK- <17>

IN

HDMICLK+ <17>

INT_

PCH Pull

A A

-high/low System PWR_OK

CLK

RUN#

DBRST#

XDP_

ICH_RSMRST#
RSV

_ICH_LAN_RST#

ROK

SYS_PW

R523 8.2K_4R523 8.2K_4
R226 1K

R226 1K

R482 10K

R482 10K
R499 10K_4R499 10K_4
R477 10K

R477 10K

5

_4

_4

+3V

_4

_4

_4

_4

PM_RI#
PM_

BATLOW#

E_WAKE#

PCI
PM_SLP_LAN#
SUS_

PWR_ACK_R

N_R

ACI

R184 10K_4R184 10K_4
R514 10K

R514 10K
R230 10K

R230 10K
R248 *

R248 *
R530 10K_4R530 10K_4
R227 10K

R227 10K

10K_4

10K_4

V_S5

+3

_4

_4
_4

_4

_4

_4

4

3

C636

C636

SYS_PWROK

TC

TC

*.1u_4

*.1u_4

U24

U24

7SH08FU

7SH08FU

+3

V_S5

'(/$<B95B3:5*22'QHHG38.WR9
38DWSRZHUVLGH

53

1

4

2

100K_4

100K_4

R538

R538

LAY_VR_PWRGOOD <4,30>

DE

OK_EC <27>

PWR

2

er Inc.

er Inc.

ZQH

ZQH

ZQH

845Monday, March 14, 2011

845Monday, March 14, 2011

845Monday, March 14, 2011

er Inc.

of

of

of

Quanta Comput

Quanta Comput

Quanta Comput

PROJECT :

PROJECT :

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

Si

Si

Si

IB

IB

IB

EX PEAK-M 1/6

EX PEAK-M 1/6

EX PEAK-M 1/6

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

1

1A

1A

1A

5

C Circuitry

RT

VCCRTC

+

CR1

+

3VPCU

CCRTC_1

V

73

73

R4

R4
1K_4

1K_4

18608864

N

D D

12

1

1

BT

BT
RTC_CONN

RTC_CONN

CR1

R

R

483 20K/F_4

483 20K/F_4

BAT

BAT

54C

54C

474 20K/F_4

474 20K/F_4

R

R

63

63

C6

C6
1u/10V_4

1u/10V_4

62

62

C6

C6
1u/10V_4

1u/10V_4

50

50

C6

C6
1u/10V_4

1u/10V_4

12

SR

12

RTC_

J2

J2
*S

*S

TC_RST#

J1

J1
*S

*S

RST#

HORT_ PAD1

HORT_ PAD1

HORT_ PAD1

HORT_ PAD1

HDA Bus

R

R

453 33_4

C C

PC

H_AZ_CODEC_SYNC<21>

PC

H_AZ_CODEC_RST#<21>

P

CH_AZ_CODEC_SDOUT<21>

PC

H_AZ_CODEC_BITCLK<21>

453 33_4

449 33_4

449 33_4

R

R

456 33_4

456 33_4

R

R

450 33_4

450 33_4

R

R

C6

C6

28

28

*27p_4

*27p_4

AC

Z_SYNCACZ_SYNC

AC

Z_RST#

AC

Z_SDOUTACZ_SDOUT

AC

Z_BIT_CLKACZ_BIT_CLK

4

HDA

_SYNC (PCH strap pin)

Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

+

3V_S5

HDMI_

VCCRTC

+

CH_AZ_CODEC_SDIN0<21>

P

1>

HPD_PCH#<17>

35

35

C3

C3

15p/50V_4

15p/50V_4

23

4 1

28

28

C3

C3

15p/50V_4

15p/50V_4

R

R

479 1M_4

479 1M_4

SPKR<2

R

R

460 *10K_4

460 *10K_4

R

R

525 *10K_4

525 *10K_4

+

3VPCU

Y1

Y1

32.

32.

AC
AC

CZ_RST#

A

3

768KHZ

768KHZ

Z_BIT_CLK
Z_SYNC

95

95

R1

R1
10M_4

10M_4

P

AC

Z_SDOUT

P

CH_GPIO33

X1

RTC_

X2

RTC_

RST#

RTC_

TC_RST#

SR

M_INTRUDER#

S

CH_INVRMEN

SPKR

CH_GPIO13

P

_CLK_R

SPI

SPI

_CS0#_R

_CS1#

SPI

SPI

_SI_R

_SO_R

SPI

B13
D13

C14
D17
A16
A14

A30
D29

P1

C30

G30
F30
E32
F32

B29

H32
J30

M3
K3
K1
J2
J4

BA2
AV3
AY3

AY1
AV1

IbexPeak-M_R1P0

IbexPeak-M_R1P0

U2

U2

RT
RT

RT
S

NTRUDER#

I
IN

HDA
HDA
SPKR
HDA

HDA
HDA
HDA
HDA

HDA

HDA
HDA

JT
JT
JT
JT
TR

SPI
SPI
SPI

SPI
SPI

1A

1A

CX1
CX2

CRST#

RTCRST#

TVRMEN

_BCLK
_SYNC

_RST#

_SDIN0
_SDIN1
_SDIN2
_SDIN3

_SDO

_DOCK_EN# / GPIO33
_DOCK_RST# / GPIO13

AG_TCK
AG_TMS
AG_TDI
AG_TDO

ST#

_CLK
_CS0#
_CS1#

_MOSI
_MISO

RTCIHDA

RTCIHDA

SPI JTAG

SPI JTAG

LPC

LPC

SATA

SATA

SAT
SAT

F

LDRQ

WH0 / LAD0

F
F

WH1 / LAD1
WH2 / LAD2

F
F

WH3 / LAD3

WH4 / LFRAME#

LDRQ

1# / GPIO23

SER

SAT

A0RXN

SAT

A0RXP
A0TXN

SAT
SAT

A0TXP

SAT

A1RXN
A1RXP

SAT
SAT

A1TXN

SAT

A1TXP

SAT

A2RXN
A2RXP

SAT
SAT

A2TXN

SAT

A2TXP
A3RXN

SAT
SAT

A3RXP
A3TXN

SAT

A3TXP

SAT

A4RXN

SAT
SAT

A4RXP
A4TXN

SAT

A4TXP

SAT
SAT

A5RXN
A5RXP

SAT
SAT

A5TXN

SAT

A5TXP

AICOMPO

SAT

SAT

AICOMPI

SAT

ALED#

A0GP / GPIO21
A1GP / GPIO19

2

D33
B33
C32
A32

C34
A34

0#

F34
AB9

IRQ

SAT

A_RXN0_C

AK7

A_RXP0_C

SAT

AK6
AK11
AK9

A_RXN1_C

SAT

AH6

SAT

A_RXP1_C

AH5
AH9
AH8

AF11
AF9
AF7

No

AF6

te:

SATA port2/3 may not be available on all PCH sku

AH3

(HM55 support 3 port only)

AH1
AF3
AF1

AD9
AD8
AD6
AD5

AD3
AD1
AB3
AB1

AF16

R1

R1

82 37.4/F_4

82 37.4/F_4

AF15

T3

Y9
V1

R

R

TP13TP

13

240 43K/F_4

240 43K/F_4

R

R
R

R

521 43K/F_4

521 43K/F_4

222 10K_4

222 10K_4

1.05V

+

+3

V

+3

V

LPC

_LAD0 <19,27>
_LAD1 <19,27>

LPC
LPC

_LAD2 <19,27>
_LAD3 <19,27>

LPC
LPC

_LFRAME# <19,27>

+3

V

IRQ

_SERIRQ <27>

SAT

A_RXN0_C <20>
A_RXP0_C <20>

SAT

A_TXN0 <20>

SAT
SAT

A_TXP0 <20>

A_RXN1_C <20>

SAT

A_RXP1_C <20>

SAT
SAT

A_TXN1 <20>
A_TXP1 <20>

SAT

1

3&+6WUDS3LQ&RQILJXUDWLRQ7DEOH

I

IN

SPI

PC

H SPI

B B

539 3.3K/F_4

539 3.3K/F_4

+3V

71

71

C6

C6
.1u/10V_4

.1u/10V_4

SPI
SPI

SPI

SPI

_CS0#_R
_CLK_R

_SI_R

_SO_R

R

R

V

+3

541 3.3K/F_4

541 3.3K/F_4

U2

U2

5

5

1

#

CE

6

SCK

5

SI

2

SO

3

WP

W25Q32BVSSIG

W25Q32BVSSIG

8

D

VD

R

R

7

LD#

HO

4

VSS

#

SPK

HDA_
#/GPIO33

GN
GNT1#

GN
GPIO53

GN
GPIO55

NV
NV

Disable

TPM

_MOSI

T0#,

T2#/

T3#/

_ALE
_CLE

Functionality

Disable

R

eboot option at power-up 0 = Default Mode (Internal weak Pull-down)

R

Fl

DOCK_EN

ash Descriptor

Security Override

BIOS Strap

Boot

Strap

ESI
(Server Only)

Block

Top­Swap Override

telR Anti-Theft Technology

In
HDD Data Protection
(Intel AT-d) Enable

D

MI Termination

Voltage

ntegrated 1.05V VRM Enable /

TVRMEN

1 = Integrated VRM is enabled
0 = I

ntegrated VRM is disabled

1 = Enabl

ed

0 = Disable

1 = No Reboot Mode with TCO Disabled

= Flash Descriptor Security will be overridden

0
1 = Security measure defined in the Flash
Descriptor will be enabled.

,0) = LPC (0,1) = Reserved NAND

(0
(1,0) = PCI (1,1) = SPI

ESI compatible mode is for server
platforms only

0 = Top Block Swap Mode
1 = Default Mode (Internal pull-up)

1 = Enabled
0 = Disabled (Default)

DMI termination voltage. Weak
internal pull-up. Do not pull low.



PC
PCI_GNT1#<10>

PCH_GPIO33

I_GNT0#<10>

PW

PC

+

VCCRTC

M_SELECT#<10>

I_GNT3#<10>

+3

+3V

N

NV

V

V_ALE<10>

_CLE<10>

489 330K_6

489 330K_6

R

R

R5

R5

40 *1K_4

40 *1K_4

32 *1K/F_4

32 *1K/F_4

R5

R5

R

R

164 *1K/F_4

164 *1K/F_4
145 *10K_4

145 *10K_4

R

R

129 1K_4

129 1K_4

R

R
R122 1K_4R122 1K_4
R1

R1
R1

R1

R

R

421 *10K/F_4

421 *10K/F_4

R202 *1K/F_4R202 *1K/F_4

R

R

206 *1K/F_4

206 *1K/F_4

CH_INVRMEN

P

SPI

SPKR

23 *1K_4

23 *1K_4
31 *1K_4

31 *1K_4

R158 *1K/F_4R158 *1K/F_4

_SI_R

V

+3

+3V

+1

.8V

.8V

+1

R

IO8

GP

GP

A A

5

4

IO15

IO27

GP

eserved This signal has a weak internal pull up.

served

Re

On-Die PLL Voltage
Regulator
<internal weak pull-up>

NOTE: This signal should not be pulled low

0 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with no confidentiality
1 = Intel ME Crypto Transport Layer Security
(TLS) cipher suite with confidentiality

0 = Disables the VccVRM.
1 = Enables the internal VccVRM to have
a clean supply for analog rails.

3

R

R

204 10K_4

SV_GPIO8<11>

R

C

R_WAKE#<11>

PCH_GPIO27<11>

204 10K_4

R203 *1K_4R203 *1K_4

244 1K_4

244 1K_4

R

R

221 *10K_4

221 *10K_4

R

R

3V_S5

+

+

3V_S5

Quant

Quant

Quant

a Computer Inc.

a Computer Inc.

a Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

IB

IB

IB

EX PEAK-M 2/6

EX PEAK-M 2/6

EX PEAK-M 2/6

Date: Sheet

Date: Sheet

2

Date: Sheet

PROJECT :

ZQH

ZQH

ZQH

94

94

1

94

1A

1A

1A

5Monday, March 14, 2011

5Monday, March 14, 2011

5Monday, March 14, 2011

of

of

of

5

WWW.AliSaler.Com

U21

U21

E

E

H4

0

AD0

N3

4

AD1

C4

4

AD2

A38

AD3

6

C3

AD4

4

J3

AD5

A40

AD6

D4

5

7

D D

_PIRQA #

PCI

_PIRQB #

PCI
PCI

_PIRQC #

PCI

_PIRQD #

PCI

C C

CLK

_LPC_DEBUG<19>

B B

CLK_P

CI_775<27>

TP1TP1
TP3TP3

PCI

_GNT0#<9>
_GNT1#<9>

PCI

M_SELECT#<9>

PW

_GNT3#<9>

PCI

_RST#<19>

PCI

R423

R423
R105

R105

CLK_PCI_FB CLK_PCI_FB_C

R117

R117

_REQ0#
_REQ1#

PCI

_SELECT#

dGPU

_REQ3#

PCI

_GNT0#

PCI
PCI

_GNT1#

PW

M_SELECT#

PCI

_GNT3#

_PIRQE #

PCI

_PIRQF #

PCI

_PIRQG #

PCI

_PIRQH#

PCI
PCI

_RST#

PC

I_SERR#

PCI

_PERR#

I_IRDY#

PC

_DEVSEL #

PCI
PC

I_FRAME#

PCI

_PLOCK#
_STOP#

PCI

I_TRDY#

PC

PME#

ICH_

TP15TP1

5

PCI

_PLTRST#

CLK

_LPC_DEBUG_C

22_4

22_4

CLK

_PCI_PCCARD

1

TP21TP2

CI_775_CCLK_PCI_775_C

CLK_P

22_4

22_4
22_4

22_4

AD

E36

AD8

H4

8

AD9

E40

AD10

C4

0

AD11

8

M4

AD12

5

M4

AD13

3

F5

AD14

0

M4

AD15

M4

3

AD

J3

6

AD17

K48

AD18

F4

0

AD19

C4

2

AD20

K46

AD21

1

M5

AD22

2

J5

AD23

K51

AD24

L34

AD25

F4

2

AD26

J4

0

AD27

G46

AD28

F4

4

AD29

7

M4

AD30

6

H3

AD31

J50

C/

G42

C/

H47

C/

G34

C/

G38

PIR

H51

PIR

B37

PIRQ

A44

PIRQ

F51

REQ

A46

REQ1# /

B45

REQ2# /

M53

REQ3# /

F48

GNT

K45

GNT

F36

GNT

H53

GNT

B41

PIRQ

K53

PIRQ

A36

PI

A48

PIRQ

K6

PCI

E44

SE

E50

PE

A42

IRDY#

H4

4

PAR

F46

DEV

C46

FR

D49

PLO

D41

STOP

C48

TRDY

M7

PME

D5

PLT

N52

CLKOUT_PCI0

P53

CLK

P46

CLK

P51

CLK

P48

CLKOUT_PCI4

IbexPeak-M_R1P0

IbexPeak-M_R1P0

16

BE0#
BE1#
BE2#
BE3#

QA#
QB#

C#
D#

0#

GPIO50
GPIO52
GPIO54

0#
1# / GPIO51
2# / GPIO53
3# / GPIO55

E# / GPIO2
F# / GPIO3

RQG# / GPIO4

H# / GPIO5

RST#

RR#
RR#

SEL#

AME#

CK#

#
#

#

RST#

OUT_PCI1
OUT_PCI2
OUT_PCI3

PCI

PCI

NV_

DQ0 / NV_IO0

NV_

DQ1 / NV_IO1

NV_

DQ2 / NV_IO2

NV_

DQ3 / NV_IO3
DQ4 / NV_IO4

NV_

DQ5 / NV_IO5

NV_

DQ6 / NV_IO6

NV_

DQ7 / NV_IO7

NV_

_

DQ8 / NV_IO8

NV
NV_

DQ9 / NV_IO9

NV

_DQ10 / NV_IO10

NV

_DQ11 / NV_IO11

NVRAM

NVRAM

NV

_DQ12 / NV_IO12
_DQ13 / NV_IO13

NV

_DQ14 / NV_IO14

NV

_DQ15 / NV_IO15

NV

NV
NV

NV
NV

USB

USB

OC0# /
OC1# /
OC2# /
OC3# / GPIO42
OC4# /

OC5# /
OC6# /
OC7# / GPIO14

NV_

CE#0

NV_

CE#1

NV_

CE#2
CE#3

NV_

DQS0

NV_

DQS1

NV_

NV

_ALE

NV

_CLE

NV

_RCOMP

NV_

_WR#0_RE#
_WR#1_RE#

_WE#_CK0
_WE#_CK1

USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP

USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP
USBP

USBR

BIAS#

USBR

GPIO59

GPIO40

GPIO41

GPIO43

GPIO9

GPIO10

4

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV

_ALE

BD3

CLE

NV_

AY6

_RCOMP

NV

AU2
AV7

RB#

AY8
AY5

AV11
BF5

H18

0N

J18

0P

A18

1N

C18

1P

N20

2N

P20

2P

J20

3N

L20

3P

F20

4N

G20

4P

A20

5N
5P
6N
6P
7N
7P
8N
8P
9N
9P

10N

10P

11N

11P

12N

12P

13N

13P

BIAS

TP29TP2

C20

TP30TP3

M22
N22
B21
D21
H22
J22
E22
F22
A22

TP28TP2

C22

TP27TP2

G24
H24
L24
M24
A24
C24

USB_BI

AS

B25
D25

0#

USB_OC

N16

USB_OC

1#

J16

USB_OC

2#

F16

USB_OC

3#

L16

USB_OC

4_5#

E14
G16

USB_OC6#

F12

USB_OC

7#

T15

NV

ALE <9>

_

NV

_CLE <9>

*32.4/F_4

*32.4/F_4

R508

R508

Po

rt1 and port9 can be used on debug mode

1- <25>

USBP

MB USB

U

1+ <25>

SBP

USBP

4- <25>

BLUETOOT

4+ <25>

USBP

9
0

USB port

6/7 may not be available on all PCH sku

(HM55 support 12port only)

USBP

8- <16>

Camera

USBP

8+ <16>
9- <25>

USBP

USB/B-USB1-2

9+ <25>

USBP

8
7

USBP

11- <25>

USB/B-USB1-1

USBP

11+ <25>

USBP

12- <23>

Card Rea

USBP

12+ <23>

USBP

13- <19>

Mini Card (WLAN )

13+ <19>

USBP

R466

R466

22.6/F_4

22.6/F_4

TP4TP4

TP5TP5

1

TP11TP1
TP10TP10

TP6TP6
TP7TP7

USB_OC

USB_OC

der

0# <25>

4_5# <25>

H 3.0

EHCI1

EHCI

LAN

Wireless

2

3

PCI

E_RX1-<18>

PCI

E_RX1+<18>

PCI

E_TX1-<18>

PCI

E_TX1+<18>

PC

E_RX6-<19>

I

PCI

E_RX6+<19>

PCI

E_TX6-<19>

PCI

E_TX6+<19>

CLK

_PCH_SRC2#<19>

CLK

_PCH_SRC2<19>
PC

IE_CLK_REQ2#<19>

CIE_LOM#<18>

CLK_P
CLK_P

CIE_LOM<18>

_PCIE_LAN_REQ#<18>

CLK

C615

C615

616

616

C

C

C259

C259
C268

C268

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

R531

R531

R233

R233

*Short_4

*Short_4

*Short_4

*Short_4

CLK_P

CLK_P

CLK_P

CLK_P

CLK_P

CLK_P

IE_CLK_REQB#

PC

IE_TXN1_C

PC

E_TXP1_C

PCI

IE_TXN6_C

PC

E_TXP6_C

PCI

CIE_REQ0#

CIE_REQ1#_R

CIE_REQ2#_R

CIE_REQ3#

CIE_REQ4#

CIE_REQ5#

BG30
BF29

BH29

AW30

BA30
BC30
BD30

AU30
AT30
AU32
AV32

BA32
BB32
BD32
BE32

BF33
BH33
BG32

BA34

AW34

BC34
BD34

AT34
AU34
AU36
AV36

BG34
BG36

AK48
AK47

AM43
AM45

AM47
AM48

AH42
AH41

AM51
AM53

AK53
AK51

BJ30

BJ32

BJ34
BJ36

P9

U4

N4

A8

M9

AJ50
AJ52

H6

P13

U21

U21

B

B

PER

N1

PER

P1

PET

N1
P1

PET

N2

PER

P2

PER

T

N2

PE
PET

P2

PER

N3

PER

P3
N3

PET

P3

PET

N4

PER

R

P4

PE
PET

N4

PET

P4

PER

N5
P5

PER

N5

PET

P5

PET
PER

N6

PER

P6

PET

N6

PET

P6
N7

PER

P7

PER

N7

PET

P7

PET
PER

N8

PER

P8

PET

N8

PET

P8

OUT_PCIE0N

CLK

OUT_PCIE0P

CLK
PCIE

CLKRQ0# / GPIO73

CLK

OUT_PCIE1N
OUT_PCIE1P

CLK

CLKRQ1# / GPIO18

PCIE

CLK

OUT_PCIE2N

CLK

OUT_PCIE2P

PCIE

CLKRQ2# / GPIO20

OUT_PCIE3N

CLK

OUT_PCIE3P

CLK
PCIE

CLKRQ3# / GPIO25

CLK

OUT_PCIE4N
OUT_PCIE4P

CLK

CLKRQ4# / GPIO26

PCIE

CLK

OUT_PCIE5N

CLK

OUT_PCIE5P

PCIE

CLKRQ5# / GPIO44

T_PEG_B_N

CLKOU
CLKOUT_PEG_B_P

PEG_B_C

LKRQ# / GPIO56

IbexPeak-M_R1P0

IbexPeak-M_R1P0

2

SMBus

SMBus

PCI-E*

PCI-E*

Link

Link

Controller

Controller

PEG

PEG

KOUT_DP_N / CLKO UT_ B C LK1_N

CL

T_DP_P / CLKOUT_BCLK1_P

CLKOU

From CLK BUFFER

From CLK BUFFER

CLKI
CLKI

Clock Flex

Clock Flex

SMBALER

T# / GPIO11

SMBC

SMBD

L0ALER

T# / GPIO60

SM

SML0C

SML0D

T# / GPIO74

SML1ALER

L1C

LK / GPIO58

SM

SML1D

ATA / GPIO75

CL_C

CL_D

CL_R

PEG_A_C

LKRQ# / GPIO47

T_PEG_A_N

CLKOU

T_PEG_A_P

CLKOU

CLKOU

T_DMI_N

CLKOU

T_DMI_P

CLK

IN_DMI_N

CLK

IN_DMI_P

CLKI

N_BCLK_N
N_BCLK_P

CLKI

IN_DOT_96N

CLK
CLK

IN_DOT_96P

N_SATA_N / CKSSCD_N
N_SATA_P / CKSSCD_P

CLK14IN

REF

CLKI

N_PCILOOPBACK

XT

AL25_OUT

XT

LK_RCOMP

XC

CLK

OUTFLEX0 / GPIO64

CLK

OUTFLEX1 / GPIO65

OUTFLEX2 / GPIO66

CLK

CLK

OUTFLEX3 / GPIO67

_SMBALERT#

RSV

B9

H_SMBCLK

IC

H14

LK

C

H_SMBDATA

I

C8

ATA

RSV

_SML0ALERT#

J14

LK_ME0

SMB_C

C6

ATA1
ST1#

AL25_IN

LK

ATA

LK1

G8

M14
E10
G12

T13
T11
T9

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

J42

AH51
AH53

AF38

T45

P43

T42

N50

SMB_D

RSV
SMB_C
SMB_D

CL_C
CL_D
CL_R

XC

LK_RCOMP

R76

R76

ATA_ME0

_SML1ALERT#

LK_ME1
ATA_ME1

LK1
ATA1
ST1#

LKREQ#_R

PEG_C

_PCI_FB

CLK

AL25_IN

XT

AL25_OUT

XT

R14

R14

BOARD

BOARD

BOARD

0 *0_4

0 *0_4

1 90.9/F_4

1 90.9/F_4

_ID1

_ID2

_ID3

48MHz output for cardreader

R242

R242

IC

H_SMBCLK <3>
H_SMBDATA <3>

IC

*0_4

*0_4

CL_C

LK1 <19>
ATA1 <19>

CL_D
C

ST1# <19>

L_R

CLK_P

CIE_3GPLL# <4>

CLK_P

CIE_3GPLL <4>

DP

LL_REF_SSCLK# <4>

DP

LL_REF_SSCLK <4>

C

F_PCIE_3GPLL# <3>

LK_BU

CLK_BU

F_PCIE_3GPLL <3>

CLK_BU

F_BCLK# <3>

CLK_BU

F_BCLK <3>

_BUF_DREFCLK# <3>

CLK

K

_BUF_DREFCLK <3>

CL

CLK_BU

F_DREFSSCLK# <3>

CLK_BU

F_DREFSSCLK <3>

CH_14M <3>

CLK_I

48MHZ <23>

EXT

1

+1.

SML1ALER

05V

T# <11,26,27>

8

8

R42

R42
1M_4

1M_4

C600

C600

27p/50V_4

27p/50V_4

12

Y5

Y5
25M

25M

z

z

H

H

C599

C599

27p/50V_4

27p/50V_4

_S5

+3V

RP2

USB_OC
USB_OC

+3V_S5

C353

C353

1u/10V_4

1u/10V_4

.

.

PCI

_PLTRST#

2

4

A A

1

U7

U7

3 5

7SH08FU

7SH08FU

TC

TC

R249

R249

*0_4

*0_4

5

R251

R251
100K_4

100K_4

PLT

RST# <4,18,19,23,27>

USB_OC

+3V

_S5

PCI

_PIRQD #
PCI_REQ1#
PC

I_FRAME#
I_TRDY#

PC

+3V

PCI

_PIRQC #

_PIRQA #

PCI
PCI

_STOP#

I_IRDY#

PC

+3V

RP2

3#

6

2#
4_5#

5

7

4

8

3

9

2

10

1

2K_10P8R

2K_10P8R

8.

8.

RP4

RP4

6

5
7
8
9

10

8.

8.

2K_10P8R

2K_10P8R

RP1

RP1

6
7
8
9

10

2K_10P8R

2K_10P8R

8.

8.

4

PCI_REQ3#

4

PCI

3

PCI

2

PCI

1

5

PCI

4

PCI

3

PCI

2

PCI_SERR#

1

USB_OC
USB_OC
USB_OC6#
USB_OC

_PIRQB #
_REQ0#
_PIRQH#

_DEVSEL #
_PLOCK#
_PERR#

_S5

1#
0#

7#

+3V

+3V

+3V

R245

R245
R513 10K_4R513 10K_4 R180
R229

R229
R247

R247
R232

R232
R517 10K_4R517 10K_4

+3V

R534

R534

+3V

R138

R138
R139

R139
R422

R422
R143

R143
R518 10K_4R518 10K_4

10K_4

10K_4
10K_4

10K_4
10K_4

10K_4
10K_4

10K_4

10K_4

10K_4

10K_4

10K_4

8.2K_4

8.2K_4

8.2K_4

8.2K_4

8.2K_4

8.2K_4

CLK_PCIE_REQ0#
CLK_P

CIE_REQ3#
CIE_REQ4#

CLK_P
CLK_P

CIE_REQ5#

PCIE_CLK_REQB#

PEG_C

LKREQ#_R

CLK_PCIE_REQ1#_R

_SELECT#

dGPU
PCI

_PIRQE #
_PIRQF #

PCI
PCI_PIRQG#
CLK_P

3

CIE_REQ2#_R

+3V

R40

R40

6 *10K_4

6 *10K_4

R407 10K_4R407 10K_4

8 *10K_4

8 *10K_4

R40

R40

BOARD_ID1

High = 80port output to LPC

BOARD_ID2

Low = 80port output to PCI
High = Reserved

BOARD_ID3

Low = Reserved (Default)

_S5

+3V

BOARD
BOARD
BOARD

Not Defined

R504

R504
R211 10K_4R211 10K_4
R243

R243
R512

R512
R511

R511
R214 2.2K_4R214 2.2K_4
R212

R212

2

_ID1

R132

R132

_ID2

R136 *10K_4R136 *10K_4

_ID3

R414

R414

10K_4

10K_4
10K_4

10K_4

2.2K_4

2.2K_4

2.2K_4

2.2K_4

2.2K_4

2.2K_4

10K_4

10K_4

10K_4

10K_4

RSV_SMBALERT#

RSV

_SML0ALERT#
_SML1ALERT#

RSV
IC

H_SMBCLK
ICH_SMBDATA
SMB_C

LK_ME0
ATA_ME0

SMB_D

2ND_MBCLK<27>

2ND_MBDATA<27>

+3V_S5

R180

2

2.2K_4

2.2K_4

SMB_C

LK_ME1

3

1

Q4
2N7002KQ42N7002K

_S5

+3V

R181

R181

2

2.2K_4

2.2K_4

SMB_DATA_ME1

3

1

Q5
2N7002KQ52N7002K

Qu

Qu

Qu

anta Computer Inc.

anta Computer Inc.

anta Computer Inc.

PROJECT :

PROJECT :

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

Si

Si

Si

IBEX PEA

IBEX PEA

IBEX PEA

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

K-M 3/6

K-M 3/6

K-M 3/6

1

ZQH

ZQH

ZQH

10 45Monday, March 14, 2011

10 45Monday, March 14, 2011

10 45Monday, March 14, 2011

of

of

of

1A

1A

1A

5

4

3

2

G

PU RST#

1

D D

BM

TP31TP

31

O_EXT_SMI#<27>

SI

O_EXT_SCI#<27>

SI

2

TP2TP

RSV_GPI

O8<9>

TP14TP

14

CR_W

AKE#<9>

PCH_GPI

O27<9>

C C

TP17TP

17
12

R524

R524

TP33TP

*Short_4

*Short_4

TP12TP

33

dGPU_PW

R_EN# should be stable

before dGPU_VRON enable

SM

L1ALERT#<10,26,27>

EC suggestion use GPIO49 for FAN control

SATA5GP / GPIO49 / TEMP_ALERT# is used to
alert for EC when CPU or Graph/Memory
controllers' temperature go out of limit.

B B

So connecting GPIO49 to EC and avoid this
pin to be used for other purpose

A A

BUSY#

SI

O_EXT_SMI#

SI

O_EXT_SCI#

RD_ID0

BOA

O8

RSV_GPI

LA

N_DISABLE#

CR_W

AKE#

dGPU_HOLD_RST

GPI

O22

O27

PCH_GPI

P_PCH_GPIO28

T
ST

P_PCI#

dGPU_PW

dGPU_PRSNT

#

GPI

O38

VE_LED#

SA

O45

GPI

_GATE#

RST

_UP

SV_SET

SA

GPI

O57

R_EN#dGPU_PWR_EN#

TA5GP

C38

F10

#

AA2

AB12

M11

AB7

AB13

AB6

BE1

BE53
BF53

BH1

BH2
BH52
BH53

BJ49
BJ50

BJ52
BJ53

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U21F

U21F

Y3

BUSY# / GPIO0

BM

ACH1 / GPIO1

T

D37

ACH2 / GPIO6

T

J32

T

ACH3 / GPIO7

GPI

O8

K9

LA

N_PHY_PWR_CTRL / GPIO12

T7

GPI

O15

TA4GP / GPIO16

SA

F38

ACH0 / GPIO17

T

Y7

SCLOCK / GPI

H10

GPI

O24

GPI

O27

V13

GPI

O28

ST

P_PCI# / GPIO34

V6

SA

TACLKREQ# / GPIO35
TA2GP / GPIO36

SA

TA3GP / GPIO37

SA

V3

SLOA

D / GPIO38

P3

S

DATAOUT0 / GPIO39

H3

PCI

ECLKRQ6# / GPIO45

F1

PCI

ECLKRQ7# / GPIO46

S

DATAOUT1 / GPIO48

AA4

TA5GP / GPIO49

SA

F8

O57

GPI

A4

VSS_NCT

A49

A5
A50
A52
A53

B2

B4
B52
B53

BF1

BJ1
BJ2
BJ4

BJ5

D1

D2
D53

E1
E53

F_1

VSS_NCT

F_2

VSS_NCT

F_3

VSS_NCT

F_4

VSS_NCT

F_5

VSS_NCT

F_6

VSS_NCT

F_7

VSS_NCT

F_8

VSS_NCT

F_9
F_10

VSS_NCT

F_11

VSS_NCT

F_12

VSS_NCT

F_13

VSS_NCT

F_14

VSS_NCT

F_15

VSS_NCT
VSS_NCT

F_16

VSS_NCT

F_17

VSS_NCT

F_18
F_19

VSS_NCT

F_20

VSS_NCT
VSS_NCTF_21
VSS_NCT

F_22
VSS_NCTF_23
VSS_NCT

F_24
VSS_NCT

F_25

F_26

VSS_NCT

F_27

VSS_NCT

F_28

VSS_NCT

F_29

VSS_NCT
VSS_NCTF_30
VSS_NCT

F_31

bexPeak-M_R1P0

bexPeak-M_R1P0

I

I

O22

GPIO

GPIO

NCTF

NCTF

MISC

MISC

RSVD

RSVD

CLKOUT
CLKOUT

CPU

CPU

CLKOUT
CLKOUT

CLKOUT
CLKOUT

_BCLK0_N / CLKOUT_PCIE8N
_BCLK0_P / CLKOUT_PCIE8P

PROCPW

TH

_PCIE6N
_PCIE6P

_PCIE7N
_PCIE7P

A2

0GATE

PECI

RCI

RGD

RMTRIP#

TP
TP
TP
TP
TP
TP
TP
TP
TP

TP
NC_1
NC_2
NC_3
NC_4
NC_5

INIT3_3V#

TP

AH45
AH46

AF48
AF47

U2

AM3
AM1
BG10
T1

N#

BE10
BD10

BA22

1

TP

AW22

2

TP

BB22

TP

3

AY45

TP

4

AY46

TP

5

AV43

TP

6

AV45

TP

7

AF13

8

TP

M18

9

TP

N18

10

AJ24

11

AK41

12

AK42

13

M32

14

N32

15

M30

16

N30

17

H12

18

AA23

19

45

AB
AB38
AB42
AB

41

9

T3

P6
C10

24

PCH_T

HRMTRIP#_R

R197

R197

56/F_4

56/F_4

S

IO_A20GATE <27>

CLK_CPU_BCLK#
CLK_CPU_BCLK
H_PECI
SI

O_RCIN# <27>

H_PW

R200

R200

<4>

<4>

RGOOD <4,27>

56/F_4

56/F_4

<4>

PM

_THRMTRIP# <4>

+1.05V

GPIO Pull-

+3V

up/Pull-down

+3V_S5

TP

_PCH_GPIO28

GPI

O45

R

ST_GATE#

GPI

O57

LA

N_DISABLE#

O_EXT_SMI#

SI

O_EXT_SCI#

SI
dGPU_PW

SI

O_RCIN#

SI

O_A20GATE
dGPU_HOLD_RST
SA

TA5GP

GPI

O22

VE_LED#

SA

P_PCI#

ST

O38

GPI

BUSY#

BM

_UP

SV_SET

SV_SET_UP

GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1

GPI

R148 *10K_4R148 *10K_4
R238 10K_4R238 10K_4

BOARD_ID0

RSV_GPIO8

R239

R239

10K_4

10K_4
10K_4

10K_4

R516

R516
R515

R515

10K_4

10K_4

R208

R208

*10K_4

*10K_4

R231

R231

10K_4

10K_4

R146

R146

10K_4

10K_4

R445

R445

10K_4

R223

R223

R533

R533
R520

R520
R536

R536
R537

R537
R224

R224
R519

R519
R228

R228
R535

R535
R522

R522
R241

R241

10K_4
10K_4

10K_4

10K_4

10K_4
10K_4

10K_4
*10K_4

*10K_4
10K_4

10K_4
10K_4

10K_4
10K_4

10K_4
10K_4

10K_4
10K_4

10K_4

8.2K_4

8.2K_4
10K_4

10K_4

R_EN#

#

1-X High = Strong (Default)

O57

R207

R207

BOARD_ID0

#

dGPU_PRSNT

dGPU always exist

R155 10K_4R155 10K_4

R220 *10K_4R220 *10K_4

High = 15"
Low = 14"
High = Disable
Low = Enable

10K_4

10K_4

+3V

+3V

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Si

Si

Size Document Number Rev

ze Document Number Rev

ze Document Number Rev

IBEX PEAK-

IBEX PEAK-

IBEX PEAK-

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

M 4/6

M 4/6

M 4/6

ZQH

ZQH

ZQH

1A

1A

11

11

11

1

1A

45Monday, March 14, 2011

45Monday, March 14, 2011

45Monday, March 14, 2011

of

of

of

IBEX PEAK-M (POWER)

WWW.AliSaler.Com

D D

40mA(15mils)

C C

37mA(15mils)

B B

VRM enable by strap pin GPIO27
which supply clean 1.05V for
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]

A A

5

05V

+1.

VCCCORE(+1.05V) = 1.432A(80mils)

R17

R17

4 *SHORT0603

4 *SHORT0603

+1.

05V

L49 *

L49 *

+1.

05V

VCCIO = 3.062A(150mils)

+1.

05V

3 *SHORT0603

3 *SHORT0603

R11

R11

+3V

R185

1.5S_1.8S

05V

R185

L51 *

L51 *

1uH_6

1uH_6

9 *SHORT0603

9 *SHORT0603

R16

R16

+V

+1.

05V

+1.

C629

C629

*SHORT0603

*SHORT0603

C28

C28

C29

C29

1

1

1u/6.3V_4

1u/6.3V_4

10u/6.3V_8

10u/6.3V_8

+1

.05V_PCH_VCCDPLL_EXP

+V1.

1uh_6

1uh_6

*10u/6.3V_6

*10u/6.3V_6

C289

C289
C292

C292
C305

C305
C294

C294
C282

C282

+V

5

5

C64

C64
*10u/6.3V_6

*10u/6.3V_6

C34

C34

3

3

0

0

.1u/16V_4

.1u/16V_4

1LAN_VCCAPLL_EXP

10U/6.3V_8

10U/6.3V_8
1U/6.3V_4

1U/6.3V_4
1U/6.3V_4

1U/6.3V_4
1U/6.3V_4

1U/6.3V_4
1U/6.3V_4

1U/6.3V_4

V_VCCA3GBG

+3

CCAFDI_VRM

+V

1.1LAN_VCCAPLL_FDI
+1

.05V_VCCDPLL_FDI

+1.

+1.

G

G

U21

U21

AB24

VCCCO

AB26

VCCCO

AB28

VCCCO

AD26

VCCCO

AD28

VCCCO

AF26

VCCCO

AF28

VCCCO

AF30

VCCCO

AF31

VCCCO

AH26

VCCCO

AH28

VCCCO

AH30

VCCCO

AH31

VCCCO

AJ30

VCCCO

AJ31

VCCCO

AK24

O[24]

VCCI

BJ24

APLLEXP

VCC

AN20

O[25]

VCCI

AN22

VCCI

O[26]

AN23

O[27]

VCCI

AN24

VCCI

O[28]

AN26

VCCI

O[29]

AN28

O[30]

VCCI

BJ26

VCCI

O[31]

BJ28

VCCI

O[32]

AT26

O[33]

VCCI

AT28

VCCI

O[34]

AU26

CCI

O[35]

V

AU28

VCCI

O[36]

AV26

VCCI

O[37]

AV28

O[38]

VCCI

AW26

O[39]

VCCI

AW28

VCCI

O[40]

BA26

O[41]

VCCI

BA28

O[42]

VCCI

BB26

VCCI

O[43]

BB28

O[44]

VCCI

BC26

VCCI

O[45]

BC28

O[46]

VCCI

BD26

O[47]

VCCI

BD28

VCCI

O[48]

BE26

VCCI

O[49]

BE28

O[50]

VCCI

BG26

VCCI

O[51]

BG28

V

O[52]

CCI

BH27

VCCI

O[53]

AN30

O[54]

VCCI

AN31

VCCI

O[55]

35

AN

VCC3_3[1]

AT22

VCCV

RM[1]

BJ18

DIPLL

VCCF

AM23

O[1]

VCCI

IbexPeak-M_R1P0

IbexPeak-M_R1P0

VCCVRM=196mA(15mils)

R21

R21

3 *SHORT0603

3 *SHORT0603

8V

L45 *10uh_8L45 *10uh_8

05V

L46 10uh_8L46 10uh_8

RE[1]
RE[2]
RE[3]
RE[4]
RE[5]
RE[6]
RE[7]
RE[8]
RE[9]
RE[10]
RE[11]
RE[12]
RE[13]
RE[14]
RE[15]

POWER

POWER

VCC CORE

VCC CORE

PCI E*

PCI E*

4

4

C34

C34
.1u/16V_4

.1u/16V_4

2

2

C59

C59
*220u_3528

*220u_3528

C60

C60
220u_3528

220u_3528

4

CRTLVDS

CRTLVDS

HVCMOS

HVCMOS

DMI

DMI

NAND / SPI

NAND / SPI

FDI

FDI

5

5

C34

C34
.1u/16V_4

.1u/16V_4

+

+

+

+

1

1

VCCT
VCCT
V
VCCT

+V

CCT

VCCP
VCCP
VCCP
V
VCCP
VCCP
VCCP
VCCP
VCCP

1.5S_1.8S

VCCA

VCCA
VSSA_D
VSSA_D

VCCA

VSSA_L

VCCV

CCP

VCCM
VCCM
VCCM
VCCM

DAC[1]
DAC[2]

X_LVDS[1]
X_LVDS[2]
X_LVDS[3]
X_LVDS[4]

VCC3_3[
VCC3_3[
VCC3_3[

VCCDM
VCCDM

NAND[1]
NAND[2]
NAND[3]
NAND[4]
NAND[5]
NAND[6]
NAND[7]
NAND[8]
NAND[9]

E3_3[1]
E3_3[2]
E3_3[3]
E3_3[4]

AC[1]
AC[2]

LVDS

VDS

2]
3]
4]

RM[2]

I[1]
I[2]

1.1LAN_VCCA_A_DPL

+V

R424

R424
*SHORT0805

*SHORT0805

+V1.1LAN_VCCA_B_DPL

+V

CCA_DAC_1_2

AE50
AE52

C604.

C604.

01u/25V_4

01u/25V_4

AF53
AF51

AH38
AH39

AP43
AP45
AT46
AT45

AB34
AB35
AD35

AT24

AT16
AU16

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

AM8
AM9
AP11
AP9

A_SYNC (PCH strap pin)

HD

Internal weak pull-down
VCCVRM=>+1.8V (default)
external pull-up
VCCVRM=>+1.5V

8

8

C59

C59

0.1u/10V_4_X7R

0.1u/10V_4_X7R

VCCALVDS= 1mA

LVDS

VCCA

C25

C25

6

6

.01u/25V_4

.01u/25V_4

+3

V_VCC_GIO

9

9

9

9

C27

C27

C33

C33

.1u/16V_4

.1u/16V_4

.1u/16V_4

.1u/16V_4

VCCVRM= 196mA(15mils)

+V

CCVRM

V

CCDMI

+

4

4

C32

C32
1u/10V_4

1u/10V_4

VCCPNAND= 156mA(15mils)

VCCP

R21

R21

NAND

9

9

C31

C31
.1u/16V_4

.1u/16V_4

VCCME3_3= 85mA(15mils)

V_VCCME_SPI

+3

9

9

C32

C32
.1u/16V_4

.1u/16V_4

VCCADAC= 69mA(15mils)

L44

L44
PBY160808T/

PBY160808T/

2A/180ohm_6

C57

C57

4

4

2

2

22u/6.3V_8

22u/6.3V_8

*Short_4

*Short_4

_LVDS

VCCTX

5

5

7 *SHORT0603

7 *SHORT0603

*Short_4

*Short_4

1 *SHORT0603

1 *SHORT0603

2A/180ohm_6

+3V

L24 0.

L24 0.

C24

C24

8

8

22u/6.3V_8

22u/6.3V_8

+1.

+1.

C57

C57
22u/6.3V_8

22u/6.3V_8

R114

R114

C25

C25
.01u/25V_4

.01u/25V_4

VCC3_3 = 357mA(30mils)

R41

R41

8 *SHORT0603

8 *SHORT0603

R17

R17

R194

R194

0 *SHORT0805

0 *SHORT0805

R20

R20

3

3.3 V. This rail should be powered up during S0 system state.
Note that Thermal Sensor shares the same power supply rail with DAC.
The external filters on this pin are not needed in case internal graphic is
disabled so only 3.3-V connection is required.

+3V

VCCLAN = 320mA(30mils)

VCCTX_LVDS= 59mA(15mils)

1UH_8/250mA

1UH_8/250mA

+1.

+3V

1.5S_1.8S

+V

VCCDMI= 61mA(15mils)

05V

8V

+3V

VCCME(+1.05V) = 1.849A(100mils)

05V

+1.

VCCSUS3_3 = 163mA(20mils)

VCC3_3 = 0.357A(30mils)

V_CPU_IO >1mA(15mils)

VCCACLK= 52mA(15mils)

+1.

05V

R175

R175

+1.

05V

8V

C482 change to 0 ohm resistor.

0 *SHORT0805

0 *SHORT0805

R14

R14
R15

R15

0 0_8

0 0_8

68mA(15mils)

69mA(15mils)

VCCIO = 3.062A(150mils)

+3

V_S5

+3V

+1.05V

VCCRTC= 2mA(15mils)

L47 *

L47 *

*0_6

*0_6

R198

R198

+V

CCRTC

C597

C597
C603

C603

.05V_VCCAUX

+1

300

300

C

C
1

1

U/6.3V_4

U/6.3V_4

1.5S_1.8S

+V

+1.

05V

C325

C325

C306

C306

8 *SHORT0603

8 *SHORT0603

R16

R16

R186

R186

0_6

0_6

+V

1.1LAN_VCCA_CLK

10uh_8

10uh_8

*10u/6.3V_6

*10u/6.3V_6
*1u/6.3V_4

*1u/6.3V_4

_PCH_VCCDSW

TP

C30

C30
1u/6.3V_4

1u/6.3V_4

05V_VCCEPW

+1.

C257

C257
C269

C269
C277

C277
C278

C278

C334

C334

1.1LAN_VCCA_A_DPL

+V

1.1LAN_VCCA_B_DPL

+V

C288

C288
C286

C286
C273

C273

0.1u/10V_4_X7R

0.1u/10V_4_X7R

.1LAN_INT_VCCSUS

+V1

0.1u/10V_4_X7R

0.1u/10V_4_X7R

+3V_S5_VC

C314

C314

*SHORT0603

*SHORT0603

+3

C318

C318

TT_VCCPCPU

+V

C342

C342

4.7U/6.3V_6

4.7U/6.3V_6

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C338

C338
C336 0.1u/10V_4_X7RC336 0.1u/10V_4_X7R

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C664

C664
C665

C665

0.1u/10V_4_X7R

0.1u/10V_4_X7R

7

7

22U/6.3V_8

22U/6.3V_8
22U/6.3V_8

22U/6.3V_8
1U/6.3V_4

1U/6.3V_4
1U/6.3V_4

1U/6.3V_4

+VCCRT

0.1u/10V_4_X7R

0.1u/10V_4_X7R

1U/6.3V_4

1U/6.3V_4
1U/6.3V_4

1U/6.3V_4
1U/6.3V_4

1U/6.3V_4

+VC

CSST

CPSUS

0.1u/10V_4_X7R

0.1u/10V_4_X7R

V_VCCPCORE

0.1u/10V_4_X7R

0.1u/10V_4_X7R

CEXT

AP51
AP53

AD38
AD39
AD41

AU24

BB51
BB53

BD51
BD53

AH23
AH35

AH34

AT18

AU18

AF23
AF24

AF43
AF41
AF42

AJ35

AF34

AF32

2

Y20

V39
V41
V42
Y39
Y41
Y42

V9

V12

Y22

P18
U19
U20
U22

V1
V1
Y1

A12

U21J

U21J

VCC
VCC

VCCLA
VCCLA

PSUSBYP

DC

VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM
VCCM

CCM

V
VCCM
VCCM
VCCM

DCPRT

VCCV

V

CCA

VCCA

VCCA
VCCA

VCCI
VCCI
VCCI

VCCI
VCCI
VCCI
D

PSST

C

DC

PSUS

VCCS
VCCS
VCCS
VCCS

5

VCC3_3[5]

6

VCC3_3[6]

6

VCC3_3[7]

CPU_IO[1]

V_

CPU_IO[2]

V_

VCCRTC

bexPeak-M_R1P0

bexPeak-M_R1P0

I

I

POWER

POWER

ACLK[1]
ACLK[2]

N[1]
N[2]

E[1]
E[2]
E[3]
E[4]
E[5]
E[6]
E[7]
E[8]
E[9]
E[10]
E[11]
E[12]

C

RM[3]

DPLLA[1]
DPLLA[2]

DPLLB[1]
DPLLB[2]

O[21]
O[22]
O[23]

O[2]
O[3]
O[4]

US3_3[29]
US3_3[30]
US3_3[31]
US3_3[32]

USB

USB

Clock and Miscellaneous

Clock and Miscellaneous

PCI/GPIO/LPC

PCI/GPIO/LPC

SATA

SATA

PCI/GPIO/LPC

PCI/GPIO/LPC

CPU

CPU

RTC

RTC

HDA

HDA

VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS

CCS

V

VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS
VCCS

CCS

V
VCCS
VCCS

VCCS

V5R

VCC3_3[
VCC3_3[
VCC3_3[
VCC3_3[

VCC3_3[

VCC

SATAPLL[1]

VC

SATAPLL[2]

C

VCC

VCCME[13]
VCCM
VCCM
VCCME[16]

VCCSUSHDA

VCCI
VCCI
VCCI
VCCI

US3_3[1]
US3_3[2]
US3_3[3]
US3_3[4]
US3_3[5]
US3_3[6]
US3_3[7]
US3_3[8]

US3_3[9]
US3_3[10]
US3_3[11]
US3_3[12]
US3_3[13]
US3_3[14]
US3_3[15]
US3_3[16]
US3_3[17]
US3_3[18]
US3_3[19]
US3_3[20]
US3_3[21]
US3_3[22]
US3_3[23]
US3_3[24]
US3_3[25]
US3_3[26]
US3_3[27]

US3_3[28]

VCCI

EF_SUS

V5R

VCC3_3[
VCC3_3[

VCCI

VRM[4]

VCCI
VCCI
VCCI
VCCI

VCCI
VCCI
VCCI

VCCI
VCCI
VCCI
VCCI

O[56]

O[10]
O[11]
O[12]
O[13]

O[14]
O[15]
O[16]

O[17]
O[18]
O[19]
O[20]

E[14]
E[15]

O[5]
O[6]
O[7]
O[8]

O[9]

EF

8]

9]
10]
11]
12]
13]

14]

1

VCCIO = 3.208A(150mils)

V24
V26

C295

C295

1U/6.3V_4

Y24
Y26

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23
V23
F24

K49

J38
L38
M36
N36
P36
U35

AD13

AK3
AK1

AH22

AT20

AH19
AD20
AF22
AD19

AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

1U/6.3V_4

V_S5_VCCPUSB

+3

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C303

C303

290

290

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C

C

302

302

0.022U/16V_4

0.022U/16V_4

C

C

VCCSUS3_3 = 0.163A(20mils)

R172

R172

V5REF

_SUS

V5REF

+3

V_VCCPPCI

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C261

C261

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C260

C260

+V1.

1LAN_VCCAPLL

C66

C66

8

8

*1u/6.3V_4

*1u/6.3V_4

+V1.

1LAN_VCC_SATA

1.5S_1.8S

+V

.05V_VCCEPW

+1

+V3.3A_1.5A_HDA_IO

C27

C27

6

6

1u/10V_4

1u/10V_4

+1.

05V

R16

R16

2 *SHORT0805

2 *SHORT0805

*SHORT0603

*SHORT0603

V5REF_SUS< 1mA

R468

R468
D17

D17
C639

C639

V5REF< 1mA

R115

R115

D4
C240

C240

2 *SHORT0603

2 *SHORT0603

R14

R14

VCC3_3 = 0.357A(30mils)

31mA(15mils)

L28 *

L28 *

C35

C35

1

1

*10u/6.3V_6

*10u/6.3V_6

VCCIO = 3.062A(150mils)

C32

C32

0

0

1u/10V_4

1u/10V_4

VCCME = 1.849A(100mils)

R163 *Short_4R163 *Short_4

VCCSUSHDA= 6mA(15mils)

05V

+1.

100/F_4

100/F_4
RB500V-40

RB500V-40

1U/6.3V_4

1U/6.3V_4

100/F_4

100/F_4
RB500V-40D4RB500V-40

1U/6.3V_4

1U/6.3V_4

+3V

10uh_8

10uh_8

+3

V_S5

V_S5

+5
+3

V_S5

+5V
+3V

+1.

05V

05V

+1.

+3

V_S5

5

Quanta

Quanta

Quanta

Computer Inc.

Computer Inc.

Computer Inc.

PROJECT :

PROJECT :

Si

Si

Si

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

IBEX PEA

IBEX PEA

IBEX PEA

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

Date: Sheet

Date: Sheet

4

3

2

Date: Sheet

PROJECT :

K-M 5/6

K-M 5/6

K-M 5/6

1

ZQH

ZQH

ZQH

1A

1A

12 45M

12 45M

12 45M

1A

of

of

of

5

IBEX PEAK-M (GND)

D D

U2

U2

1H

1H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49

AF12
AH49
AF35

AP13
AN34
AF45
AF46
AF49

AG52

AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47

AJ19
AJ20

AJ22
AJ23
AJ26
AJ28
AJ32
AJ34

AK12

AM41

AN19
AK26
AK22
AK23
AK28

AB5
AB8
AC2

AD7
AE2
AE4

AU4

AF5
AF8
AG2

AH7

AT5

Y13

AJ2

AJ4

VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

IbexPeak-M_R1P0

IbexPeak-M_R1P0

C C

B B

A A

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

4

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49

BC10
BC14
BC18

BC2
BC22
BC32
BC36
BC40
BC44
BC52

BH9
BD48
BD49

BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50

BF49
BF51
BG18
BG24

BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47

BH7

AF39

3

U2

U2

1I

1I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

B7

VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]

BB5

VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251]
VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

2

1

IbexPeak-M_R1P0

IbexPeak-M_R1P0

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

IBEX PEAK-M

IBEX PEAK-M

IBEX PEAK-M

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Qua

Qua

Qua

nta Computer Inc.

nta Computer Inc.

nta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

6/6

6/6

6/6

ZQH

ZQH

ZQH

1

1A

1A

13 45Monday, March 14, 2011

13 45Monday, March 14, 2011

13 45Monday, March 14, 2011

1A

5

WWW.AliSaler.Com

M_

A_A[15:0]<5>

D D

M_

A_BS#0<5>

M_

A_BS#1<5>

M_

A_BS#2<5>

M_A

_CS#0<5>

M_A

_CS#1<5>

M_

A_CLK0<5>

M_

A_CLK0#<5>

M_

A_CLK1<5>

M_

A_CLK1#<5>

M_

A_CKE0<5>

M_

A_CKE1<5>

M_

A_CAS#<5>

M_

A_RAS#<5>

M_A

R270 10K

R270 10K
R269 10K

R269 10K

C C

B B

Place these C

+1

.5VSUS

C366

C365

C365

10

10

u/6.3V_6

u/6.3V_6

C366
10

10

u/6.3V_6

u/6.3V_6

C391

C391
10u/6.3V_6

10u/6.3V_6

C381

C381
10u/

10u/

_WE#<5>

_4

_4
_4

_4

CL

K_SCLK<3,15,19>

CL

K_SDATA<3,15,19>

M_A

_ODT0<5>

M_A

_ODT1<5>

M_

A_DM[7:0]<5>

M_

A_DQS[7:0]<5>

M_

A_DQS#[7:0]<5>

aps near So-Dimm0.

C369

C369
10u/

10u/

6.3V_6

C372

C372
10u/6.3V_6

10u/6.3V_6

6.3V_6

C370
.1u/16V_4

.1u/16V_4

6.3V_6

6.3V_6

C377

C377
.1u

.1u

/16V_4

/16V_4

M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_

DI
DI
CL
CL

M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A

M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_

C371

C371
.1u/16V_4

.1u/16V_4

A_A0
A_A1
A_A2
A_A3
A_A4
A_A5
A_A6
A_A7
A_A8
A_A9
A_A10
A_A11
A_A12
A_A13
A_A14
A_A15

MM0_SA0
MM0_SA1

K_SCLK
K_SDATA

_DM0
_DM1
_DM2
_DM3
_DM4
_DM5
_DM6
_DM7

A_DQS0
A_DQS1
A_DQS2
A_DQS3
A_DQS4
A_DQS5
A_DQS6
A_DQS7
A_DQS#0
A_DQS#1
A_DQS#2
A_DQS#3
A_DQS#4
A_DQS#5
A_DQS#6
A_DQS#7

C387

C387
.1u

.1u

/16V_4

/16V_4

C376

C376
.1u/16V_4

.1u/16V_4

107

119

109
108

114
121
101
103
102
104

115
110
113
197
201
202
200

116
120

136
153
170
187

137
154
171
188

135
152
169
186

98
97
96
95
92
91
90
86
89
85

84
83

80
78

79

73
74

11
28
46
63

12
29
47
64

10
27
45
62

+

+

C367

C367
*330u

*330u

4

JDIM

JDIM

1A

1A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

AP

A10/
A11

BC#

A12/
A13
A14
A15

BA0
BA1
BA2
S0#

#

S1
CK0
CK0

#
CK1
CK1

#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT

0

OD

1

T

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM

7

DQS

0
1

DQS
DQS

2
3

DQS
DQS

4
5

DQS
DQS

6

DQS

7
#0

DQS
DQS

#1
#2

DQS
DQS

#3
#4

DQS
DQS

#5

DQ

#6

S

DQS#7

DDR3-DIMM1_H=8.0_Reverse

DDR3-DIMM1_H=8.0_Reverse

+S

C379

C379

/2V_7343

/2V_7343

.1u

.1u

/16V_4

/16V_4

DQ1
DQ1
DQ1
DQ1
DQ1
DQ1
DQ1
DQ1
DQ1
DQ1
DQ2
DQ
DQ22
DQ2
DQ2
DQ2
DQ2
DQ2
DQ2
DQ2
DQ3
DQ3
DQ3
DQ3
DQ3
DQ3
DQ3
DQ
DQ3
DQ3
DQ4
DQ4
DQ4
DQ4
DQ4
DQ4
DQ

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DQ4
DQ4
DQ4
DQ5
DQ5
DQ5
DQ5
DQ5
DQ5
DQ5
DQ5
DQ5
DQ5
DQ6
DQ6
DQ
DQ63

MDDR_VREF_DIMM

C378

C378

2.2u

2.2u

/6.3V_6

/6.3V_6C370

DQ0
DQ1
DQ2
DQ3
DQ4
DQ
DQ6
DQ7
DQ8
DQ9

2

3

4

6

5
7
15
17
4
6

5

16
18
21
23
33

0

35

1

22

2

24

3

34

4

36

5

39

6

41

7

51

8

53

9

40

0

42

1

50
52

3

57

4

59

5

67

6

69

7

56

8

58

9

68

0

70

1

129

2

131

3

141

4

143

5

130

6

132

7

140

8

142

9

147

0

149

1

157

2

159

3

146

4

148

5

158

6

160

7

163

8

165

9

175

0

177

1

164

2

166

3

174

4

176

5

181

6

183

7

191

8

193

9

180

0

182

1

192

2

194

C385

C385

.1u

.1u

+S

MDDR_VREF_DQ0

/16V_4

/16V_4

2.2u

2.2u

M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A
M_A

C383

C383

/6.3V_6

/6.3V_6

_DQ4
_DQ0
_DQ2
_DQ3
_DQ1
_DQ5
_DQ6
_DQ7
_DQ12
_DQ13
_DQ11
_DQ10
_DQ8
_DQ9
_DQ14
_DQ15
_DQ17
_DQ20
_DQ18
_DQ19
_DQ16
_DQ21
_DQ22
_DQ23
_DQ24
_DQ28
_DQ25
_DQ26
_DQ27
_DQ29
_DQ31
_DQ30
_DQ36
_DQ33
_DQ35
_DQ34
_DQ32
_DQ37
_DQ38
_DQ39
_DQ45
_DQ44
_DQ47
_DQ42
_DQ41
_DQ40
_DQ46
_DQ43
_DQ48
_DQ49
_DQ50
_DQ51
_DQ52
_DQ53
_DQ54
_DQ55
_DQ56
_DQ57
_DQ62
_DQ59
_DQ60
_DQ61
_DQ63
_DQ58

3

M_A

_DQ[63:0] <5>

M3 solution

VREF

_DQ_DIMM0<7>

+S

MDDR_VREF

M1 solution

+S

MDDR_VREF

R275 *

R275 *

R268 *

R268 *

R266 *

R266 *

+S

MDDR_VREF_DIMM

+1

.5VSUS

SHORT0603

SHORT0603

+1

.5VSUS

SHORT0603

SHORT0603

PM_

EXTTS#0<4>

DDR3_DRAM

M3@0_6

M3@0_6

R276

R276
*10K

*10K

_4

_4

+S

MDDR_VREF_DIMM

R264

R264
*10K

*10K

_4

_4

R259

R259
*10

*10

K/F_4

K/F_4

+S

R260

R260
*10

*10

K/F_4

K/F_4

2.48A

+3V

RST#<4,15>

+S

MDDR_VREF_DIMM

C403

C403
470p/X

470p/X

7R_4

7R_4

MDDR_VREF_DQ0

C380

C380
470p/X

470p/X

7R_4

7R_4

2

+1

.5VSUS

+S

MDDR_VREF_DQ0

JDIM

JDIM

1B

1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

V

DD7

94

VDD8

99

VDD9

100

0

VDD1

105

VDD1

1

106

2

VDD1

111

VDD1

3

112

4

VDD1

117

VDD1

5

118

VDD1

6

123

7

VDD1

124

VDD1

8

199

VDD

SPD

77

NC1

122

NC2

125

NCTEST

198

126

#

EVENT

30

RESET

#

1

_DQ

VREF

_CA

VREF

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS1

5

DDR3-DIMM1_H=8.0_Reverse

DDR3-DIMM1_H=8.0_Reverse

-DIMM

-DIMM

(204P)

(204P)

PC2100 DDR3 SDRAM SO

PC2100 DDR3 SDRAM SO

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS2
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS3
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

GND
GND

1

44
48
49
54
55
60
61

2

65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156

8

161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

205
206

+0

.75V_DDR_VTT

A A

+3V

C397

C397

2.2u/6.3V_6

2.2u/6.3V_6

C394

C394
.1u/16V_4

.1u/16V_4

5

+0.75V_DDR_VTT

C393

C393
1U/6.3V_4

1U/6.3V_4

C375

C375
1U/6.3V_4

1U/6.3V_4

C374

C374
1U/6.3V_4

1U/6.3V_4

C389

C389
1U/6.3V_4

1U/6.3V_4

4.7U/6.3V_6

4.7U/6.3V_6

4

C373

C373

C396

C396

4.7U/6.3V_6

4.7U/6.3V_6

C412

C412

4.7U/6.3V_6

4.7U/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDRIII SO-

DDRIII SO-

DDRIII SO-

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

DIMM-0

DIMM-0

DIMM-0

ZQH

ZQH

ZQH

1A

1A

1A

14 45Monday, March 14, 2011

14 45Monday, March 14, 2011

14 45Monday, March 14, 2011

1

5

M

_B_A[15:0]<5>

D D

M

_B_BS#0<5>

M

_B_BS#1<5>

M

_B_BS#2<5>

M_

B_CS#0<5>

M_

B_CS#1<5>

M

_B_CLK0<5>

M

_B_CLK0#<5>

M

_B_CLK1<5>

M

_B_CLK1#<5>

M

_B_CKE0<5>

M

_B_CKE1<5>

M

_B_CAS#<5>

M

_B_RAS#<5>

M_

R295

R295
R298

R298

+3V

C C

B B

10K_4

10K_4
10K_4

10K_4

B_WE#<5>

C

LK_SCLK<3,14,19>

C

LK_SDATA<3,14,19>
M_

B_ODT0<5>

M_

B_ODT1<5>

M

_B_DM[7:0]<5>

M

_B_DQS[7:0]<5>

M

_B_DQS#[7:0]<5>

M

_B_A0

M

_B_A1

M

_B_A2

M

_B_A3

M

_B_A4

M

_B_A5

M

_B_A6

M

_B_A7

M

_B_A8

M

_B_A9

M

_B_A10

M

_B_A11

M

_B_A12

M

_B_A13

M

_B_A14

M

_B_A15

D

IMM1_SA0

D

IMM1_SA1

M_

B_DM0

M_

B_DM1

M_

B_DM2

M_

B_DM3

M_

B_DM4

M_

B_DM5

M_

B_DM6

M_

B_DM7

M

_B_DQS0

M

_B_DQS1

M

_B_DQS2

M

_B_DQS3

M

_B_DQS4

M

_B_DQS5

M

_B_DQS6

M

_B_DQS7

M

_B_DQS#0

M

_B_DQS#1

M

_B_DQS#2

M

_B_DQS#3

M

_B_DQS#4

M

_B_DQS#5

M

_B_DQS#6

M

_B_DQS#7

107

119

109
108

114
121
101
103
102
104

115
110
113
197
201
202
200

116
120

136
153
170
187

137
154
171
188

135
152
169
186

98
97
96
95
92
91
90
86
89
85

84
83

80
78

79

73
74

11
28
46
63

12
29
47
64

10
27
45
62

4

JDI

JDI

M2A

M2A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

10/AP

A
A1

1

12/BC#

A
A1

3

A1

4
5

A1
BA0

BA1
BA2
S0

#
#

S1
CK0
CK

0#
1

CK
CK

1#

KE0

C
C

KE1
AS#

C

AS#

R
WE

#
SA0
SA1

L

SC
SD

A

OD

T0

OD

T1

DM

0
1

DM
DM

2
3

DM
DM

4
5

DM
DM

6

DM

7

DQ

S0
S1

DQ
DQ

S2
S3

DQ
DQ

S4
S5

DQ
DQ

S6

DQ

S7
S#0

DQ
DQ

S#1
S#2

DQ
DQ

S#3
S#4

DQ
DQ

S#5

DQ

S#6

DQS#7

DDR3-DIMM1_H=4.0_Reverse

DDR3-DIMM1_H=4.0_Reverse

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ22
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

)

)

DQ
DQ
DQ
DQ
DQ
DQ

(204P

(204P

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ63

3

M

M_

5

DQ

0

7

1

DQ

15

DQ

2

17

3

DQ

4

DQ

4

6

DQ

5

16

6

DQ

18

DQ

7

21

8

DQ

23

DQ

9

33

10

35

11

22

12

24

13

34

14

36

15

39

16

41

17

51

18

53

19

40

20

42

21

50
52

23

57

24

59

25

67

26

69

27

56

28

58

29

68

30

70

31

129

32

131

33

141

34

143

35

130

36

132

37

140

38

142

39

147

40

149

41

157

42

159

43

146

44

148

45

158

46

160

47

163

48

165

49

175

50

177

51

164

52

166

53

174

54

176

55

181

56

183

57

191

58

193

59

180

60

182

61

192

62

194

M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_
M_

B_DQ5
B_DQ1
B_DQ2
B_DQ3
B_DQ0
B_DQ4
B_DQ6
B_DQ7
B_DQ8
B_DQ9
B_DQ10
B_DQ11
B_DQ12
B_DQ13
B_DQ14
B_DQ15
B_DQ18
B_DQ17
B_DQ16
B_DQ19
B_DQ20
B_DQ21
B_DQ22
B_DQ23
B_DQ26
B_DQ25
B_DQ30
B_DQ27
B_DQ29
B_DQ24
B_DQ28
B_DQ31
B_DQ32
B_DQ33
B_DQ34
B_DQ35
B_DQ36
B_DQ37
B_DQ38
B_DQ39
B_DQ40
B_DQ45
B_DQ47
B_DQ43
B_DQ44
B_DQ41
B_DQ46
B_DQ42
B_DQ48
B_DQ53
B_DQ50
B_DQ54
B_DQ52
B_DQ49
B_DQ51
B_DQ55
B_DQ60
B_DQ57
B_DQ63
B_DQ58
B_DQ59
B_DQ56
B_DQ62
B_DQ61

_B_DQ[63:0] <5>

M3 solution

VR

M1 solution

+

SMDDR_VREF

PM

_EXTTS#1<4>

DDR3_DRA

R302

R302

*M3@0_6

EF_DQ_DIMM1<7>

+

1.5VSUS

R299

R299

*SHORT0603

*SHORT0603

*M3@0_6

+

SMDDR_VREF_DIMM

R301

R301
*

*

10K/F_4

10K/F_4

+

SMDDR_VREF_DQ1

R304

R304
*

*

10K/F_4

10K/F_4

C452

C452
470p/

470p/

2.48A

MRST#<4,14>

+

SMDDR_VREF_DQ1

X7R_4

X7R_4

2

+

1.5VSUS

+3V

JDI

JDI

M2B

M2B

75

V

DD1

76

DD2

V

81

V

DD3

82

DD4

V

87

V

DD5

88

V

DD6

93

DD7

V

94

V

DD8

99

DD9

V

100

V

DD10

105

DD11

V

106

V

DD12

111

DD13

V

112

V

DD14

117

V

DD15

118

DD16

V

123

V

DD17

124

DD18

V

199

DSPD

VD

77

NC1

122

NC2

125

NCT

EST

198

EVEN

T#

30

ESET#

R

1

EF_DQ

VR

126

VR

EF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

0

VSS1

31

VSS1

1

32

2

VSS1

37

VSS1

3

38

VSS1

4

43

5

VSS1

DDR3-DIMM1_H=4.0_Reverse

DDR3-DIMM1_H=4.0_Reverse

VSS1
VSS1
VSS1
VSS1
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3

SO-DIMM

SO-DIMM

VSS3
VSS3
VSS38
VSS3
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS5
VSS5
VSS5

(204P)

(204P)

PC2100 DDR3 SDRAM

PC2100 DDR3 SDRAM

1

44

6

48

7

49

8

54

9

55

0

60

1

61

2

65

3

66

4

71

5

72

6

127

7

128

8

133

9

134

0

138

1

139

2

144

3

145

4

150

5

151

6

155

7

156
161

9

162

0

167

1

168

2

172

3

173

4

178

5

179

6

184

7

185

8

189

9

190

0

195

1

196

2

203

T1

VT

204

VT

T2

205

GN

D

206

GN

D

+

0.75V_DDR_VTT

lace these Caps near So-Dimm1.

C438

C438
1

1

0u/6.3V_6

0u/6.3V_6

C443

C443

2.2u/6.3V_6

2.2u/6.3V_6

P

C436

C436
1

1

0u/6.3V_6

0u/6.3V_6

C435

C435
10u

10u

/6.3V_6

/6.3V_6

C427

C427
.1u/16V_4

.1u/16V_4

C408

C408
1

1

0u/6.3V_6

0u/6.3V_6

+0.75V_DDR_VTT

5

C437

C437
10u

10u

/6.3V_6

/6.3V_6

C407

C407
.1

.1

C425

C425
1U/6.3V_4

1U/6.3V_4

u/16V_4

u/16V_4

C434

C434
.

.

1u/16V_4

1u/16V_4

C414

C414
1U/6.3V_4

1U/6.3V_4

C406

C406
.

.

1u/16V_4

1u/16V_4

C405

C405
.1

.1

u/16V_4

u/16V_4

C433

C433
.1

.1

u/16V_4

u/16V_4

C424

C424
1U/6.3V_4

1U/6.3V_4

+

+

C450

C450
330u

330u

/2V_7343

/2V_7343

C415

C415
1U/6.3V_4

1U/6.3V_4

+

SMDDR_VREF_DIMM

C413

C413

.

.

1u/16V_4

1u/16V_4

C411

C411

4.7U/6.3V_6

4.7U/6.3V_6

4

C416

C416

2

2

.2u/6.3V_6

.2u/6.3V_6

C421

C421

4.7U/6.3V_6

4.7U/6.3V_6

+

SMDDR_VREF_DQ1

C440

C440

.1

.1

u/16V_4

u/16V_4

C402

C402

4.7U/6.3V_6

4.7U/6.3V_6

C444

C444

2.

2.

2u/6.3V_6

2u/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDRIII SO

DDRIII SO

DDRIII SO

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

-DIMM-1

-DIMM-1

-DIMM-1

ZQH

ZQH

ZQH

1A

1A

1A

15 35Monday, March 14, 2011

15 35Monday, March 14, 2011

15 35Monday, March 14, 2011

1

+

1.5VSUS

C439

C439
1

1

0u/6.3V_6

0u/6.3V_6

+3V

A A

1

WWW.AliSaler.Com

CRT Sw

itch

0_ohm Resistor place close to Joint-Point

INT_CRT_

RED<8>

INT_CRT_

GRN<8>

INT_CRT_
INT_CRT_

BLU<8>

T_VSYNC<8>

IN

T_HSYNC<8>

IN

A A

INT_CRT_
INT_CRT_

DDCDAT<8>
DDCCLK<8>

INT_CRT_
INT_CRT_

INT_CRT_
INT_CRT_

T_VSYNC

IN

T_HSYNC

IN

DDCDAT
DDCCLK

RED
GRN
BLU

2

3

4

CRT

RED

INT_CRT_
INT_CRT_

GRN
BLU

INT_CRT_

8

8

9

9

R1

R1
150/F_4

150/F_4

+3V

+3V

177

177

R

R
150/

150/

F_4

F_4

C301

C301

0.

0.

1u/10V_4_X7R

1u/10V_4_X7R

C315

C315

0.

0.

1u/10V_4_X7R

1u/10V_4_X7R

C632

C632

5

R

R
150/

150/

165

165

F_4

F_4

.22u/25V_6

.22u/25V_6

+5V

2

2

2

2

C3

C3
10p/50V_4

10p/50V_4

CRTVDD5

CRT_B

CRT_
CRT_G
CRT_B

SMD

SMD

308

308

C

C
10p/

10p/

50V_4

50V_4

YP

R1

1
1

F2

F2

12

1206P110TFT

1206P110TFT

L27 BLM

L27 BLM
L26 BLM

L26 BLM
L25 BLM

L25 BLM

293

293

C

C
10p/

10p/

50V_4

50V_4

U23

U23

1

_SYNC

VCC

7

CC_DDC

V

8

BYP

2

IDEO

VCC_V

3

EO_1

VID

4

EO_2

VID

5

VID

EO_3

6

GND

C

C

M2009-02QR

M2009-02QR

SY
SY

DDC_OU
DDC_OU

D16

D16

NC_OUT2
NC_OUT1

SY

NC_IN2
NC_IN1

SY

DDC_IN
DDC_IN

6

SSM22LLPT

SSM22LLPT

18BA750SN1D/0.3A/75ohm_6

18BA750SN1D/0.3A/75ohm_6
18BA750SN1D/0.3A/75ohm_6

18BA750SN1D/0.3A/75ohm_6
18BA750SN1D/0.3A/75ohm_6

18BA750SN1D/0.3A/75ohm_6

3

3

7

7

C6

C6
10p/50V_4

10p/50V_4

SYNC2

CRT_V

16

YNC2

CRT_HS

14

T_VSYNC

IN

15

IN

T_HSYNC

13

CRT_

INT_

10

1

INT_CRT_

11

2

DDCCLK

9

T1

DDCDAT_

12

T2

C272

C272

CRTVDD5

4

4

7

7

C6

C6
10p/50V_4

10p/50V_4

DDCCLK
DDCDAT

_1

1

0.1u/10V_4_X7R

0.1u/10V_4_X7R

CRT_R1
CRT_G

1

1

CRT_B

5

5

3

3

C6

C6
10p/50V_4

10p/50V_4

R458

R458

0_4

0_4
0_4

0_4

R457

R457

R462

R462
R469

R469

2.7K_4

2.7K_4

2.7K_4

2.7K_4

6
7

2
8
3
9
4

10

5

TVSYNC

CR

CRTHSY

7

1617

CN8

CN8

NN

NN

CRT-CO

CRT-CO

T_11

CR

111
12
13
14
15

NC

CRTVDD5

+3V

R45

R45

2

2

2.7K_4

2.7K_4

DDCDAT_

THSYNC

CR

R

TVSYNC

C
DDCCLK

R47

R47

6

6

2.7K_4

2.7K_4

T22T22

1

_1

C661

C661
C620

C620
C619

C619
C631

C631
C646

C646

.1u/10V_4

.1u/10V_4
10p/50V_4

10p/50V_4
10p/50V_4

10p/50V_4
*10p/50V_4

*10p/50V_4
*10p/50V_4

*10p/50V_4

8

CRTVDD5
CR

TVSYNC
CRTHSY
DDCCLK

DDCDA

NC
_1

T_

1

B B

INT_L
INT_L

_R

_R

591#

VDS_EDIDDATA
VDS_EDIDCLK

0.5A/120ohm_4

0.5A/120ohm_4

INVCC0

VIN+3V

C3

C2

C2

1000p/50V_4C31000p/50V_4

25V_8

25V_8

4.7u/

4.7u/

CN5

CN5

G_5

40
39
38
37
36
35
34
33
32

G_4

31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

G_1
9
8
7
6
5
4
3
2
1

G_0

_CONN

_CONN

LVDS

LVDS

5

LVDS

C8

C8

C7

10V_4_X7R

10V_4_X7R

0.1u/

0.1u/
1000p/50V_4C71000p/50V_4

2.2K_4

2.2K_4

R10

+3

DS_BRIGHT

LV
BL_ON

0_ohm Resistor place close to Joint-Point

CCD-USB

C C

D D

INT_L

1

INT_L

IN

VDS_EDIDDATA<8>

IN

IN

INT_TX
INT_TX

INT_TX
INT_TX
INT_TX
INT_TX
INT_TX
INT_TXLOUT2-<8>

T_LVDS_BRIGHT<8>

VDS_EDIDCLK<8>

T_LVDS_DIGON<8>
T_LVDS_BLON<8>

LCLKOUT+<8>
LCLKOUT-<8>

LOUT0+<8>
LOUT0-<8>
LOUT1+<8>
LOUT1-<8>
LOUT2+<8>

CONTRA

ST<27>

INT_L
INT_LVDS_EDIDDATA

IN
IN

R7 *0_

R7 *0_

R13 0_4R13 0_4

VDS_EDIDCLK

T_LVDS_DIGON
T_LVDS_BLON

T_TXLCLKOUT+

IN
INT_TXLCLKOUT-

LOUT0+

INT_TX

LOUT0-

INT_TX
INT_TX

LOUT1+
LOUT1-

INT_TX

LOUT2+

INT_TX
INT_TX

LOUT2-

4

4

+3V

LCDVCC

IGHT

LVDS_BR

2

3

CCD +3V-current budget 0.2A

C12

C12

1u/6.3V_4

1u/6.3V_4

*

*

R5

R5

*SHORT0603

*SHORT0603

C14

C11

C11

1u/6.3V_4

1u/6.3V_4

*

*

R11

R11

+3

VPCU

PT3661-BB : AL003661003
EM-6781-T3 : AL006781000

Lid Switch

C14

*1u/6.3V_4

*1u/6.3V_4

*SHORT0603

*SHORT0603

0>

USBP8-<1

0>

10V_4_X7RC491

10V_4_X7RC491

0.1u/

0.1u/

(Hall sensor)

C13

C13

1u/6.3V_4

1u/6.3V_4

*

*

1/10 delete R8

VIN

USBP8+<1

1

3

R10

V

R9

R14 *

R14 *
R16 *

R16 *

R2 *0_4R2 *0

L1

L1

2

2

3

RFCMF1632100M3T/200mA/90ohm

RFCMF1632100M3T/200mA/90ohm

R3 *0_4R3 *0

2

HE1

HE1
PT3661-BB

PT3661-BB

4

0.8A

_4

1
443

_4

21

CCD_P

1

D13

D13

VPORT_6

VPORT_6

*

*

2.2K_4R92.2K_4
R6

R6
BLM15AG121SS1/

BLM15AG121SS1/

INT_TX
INT_TX

INT_TX
INT_TX

INT_TX
INT_TX

INT_TXLOUT2+
INT_TX

WR

USBP8-_R
USBP8+

+3V

SHORT0805

SHORT0805
SHORT0805

SHORT0805

USBP8+
USBP8-_R

LID

LCLKOUT+
LCLKOUT-

LOUT0+
LOUT0-

LOUT1+
LOUT1-

LOUT2-

LCD P

ower

+3V

C1

C1

1U

1U

/6.3V_4

/6.3V_4

IN

T_LVDS_DIGON

R4

100K_4R4100K_4

Backlight Control

T_LVDS_BLON

IN

6

6
4
3

U1

IN
IN
ON/

OFF

AAT4280-4U1AAT4280-4

8

8

R37

R37
100K_4

100K_4

2

Q11

Q11
2N7002K

2N7002K

LCD

1

OUT

2

GND
GND

+3V

R377

R377
10K_4

10K_4

BL#

3

Q10

Q10
2N7002K

2N7002K

1

C6

C6

5

*

*

1u/10V_4

1u/10V_4

.

.

C5

C5
*

*

2.

2.

2u/10V_8

2u/10V_8

+3

VPCU

5

5

R37

R37
*100K_4

*100K_4

C9

C9

0.

0.

1u/

1u/

10V_4_X7R

10V_4_X7R

LID591#,EC intrnal PU

D14

D14
BAS316

BL_ON

2

Q9
DTC144EUAQ9DTC144EUA

BAS316

2 1

Quanta C

Quanta C

Quanta C

PROJECT :

PROJECT :

PROJECT :

CRT/L

CRT/L

CRT/L

VDS/CAMERA/LID

VDS/CAMERA/LID

VDS/CAMERA/LID

R37

R37

6

6

10K_4

10K_4

3

2

1 3

1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

Date: Sheet

Date: Sheet

Date: Sheet

7

VCC

C4

C4

C10

C10
01u/25V_4

01u/25V_4

22u/

22u/

.

.

omputer Inc.

omputer Inc.

omputer Inc.

591# <27>

LID

EC_FPBACK# <27>

ZQH

ZQH

ZQH

16 35M

16 35M

16 35M

of

of

of

8

3V_8

3V_8

6.

6.

1A

1A

1A

5

HDMI

LEVEL SHIFTER

+3V

C349

46

46

C3

C3

2.2u/6.3V_6

D D

+3V

C C

2.2u/6.3V_6

+3V

C341

C341

1u/10V_4

1u/10V_4

.

.

47 4.7K_4

47 4.7K_4

R5

R5

48 *4.7K_4

48 *4.7K_4

R5

R5

49 *4.7K_4

49 *4.7K_4

R5

R5
R5

R5

10 *4.7K_4

10 *4.7K_4

R2

R2

17 *4.7K_4

17 *4.7K_4
09 *4.7K_4

09 *4.7K_4

R5

R5

18 *4.7K_4

18 *4.7K_4

R2

R2

Equalization Control
PC

PC

1

0

EQ Control

PIN4

PIN3

LL

H

L
HL

H

H

C667

C667

.

.

close to pin2/11/15/21/26/33/40/46

C321

C321

.1u/10V_4

.1u/10V_4

*

*

PC0 internal PD
PC1 internal PD
DDCBUF_EN internal PD

8dB

CFG internal PD

4dB

DDC_EN internal PU

12dB
0dB

1u/10V_4

1u/10V_4

PC

PC
DDCB

CF

C349

.

.

0

1

UF_EN

G

C350

C350

1u/10V_4

1u/10V_4

.

.

1/7 swap 1/7 swap

1u/10V_4

1u/10V_4

C666

C666

u/10V_4

u/10V_4

.1

.1

fr

om PCH

INT
INT

INT
INT

INT
INT

INT
INT

fr

om PCH

_HDMITX0N<8>
_HDMITX0P<8>

_HDMITX2P<8>
_HDMITX2N<8>

_HDMITX1P<8>
_HDMITX1N<8>

_HDMICLK+<8>
_HDMICLK-<8>

Control by pin4 HPDEN_R

_HDMI_HPD<8>

INT

SD

VO_CTRLDAT<8>
DVO_CTRLCLK<8>

S

+3V

4

86 2.2K_4

86 2.2K_4

R4

R4

85 2.2K_4

85 2.2K_4

R4

R4

3

HDM

I_HPD_PCH#<9>

HDM

I_MB_HP

HDM

I_DDCDATA_MB
I_DDCCLK_MB

HDM

+3V

+3V

+3V

ctive Buffer

A

U6

U6

DDCB
CF

G

37

GND

38

N_D1-

I

39

N_D1+

I

40

VCC

41

I

N_D2-

42

I

N_D2+

43

GND

44

I

N_D3-

45

I

N_D3+

46

VCC

47

N_D4-

I

48

N_D4+

I

49

GND

PC
PC

R

R

188 499/F_4

188 499/F_4

UF_EN

0
1

1
CCT

IM

+3V

25

27

31

32

28

29

30

VCC

HPDEN4GN

EN

DDC_

D

5

D
GN

REXT6HPD_

S_REXT
L

7

SINK

HPD_

S

8

SINK

SDA_

S

SDA_

CL_SINK
S

CL_S
S

9

26

D

VCC

GN

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

NC10VCC11GN

+3V

#
OE

GND

_D1-

_D1+

VCC

_D2­_D2+
GND

_D3­_D3+

VCC

_D4­_D4+

D

12

P

P

S8101

S8101

33

+3V

36

34

35

2

D
GN

CCT

D
GN

VCC2TR

1

3

+3V

19 *4.7K_4

19 *4.7K_4

R2

R2

I_HPD_EC#

HDM

24
23
22
21
20
19
18
17
16
15
14
13

B_HDMITX0N

M

B_HDMITX0P

M

+3V

M

B_HDMITX2P

M

B_HDMITX2N
B_HDMITX1P

M

B_HDMITX1N

M

+3V

M

B_HDMICLK+

M

B_HDMICLK-

HDM

I2

C

I_HPD_EC#<27>

HDMI

2

-detect

HDM

+5V

+5V

282 *0_4

282 *0_4

R

R

HDM

I_HPD_EC#

I_MB_HP

+5V

R2

R2

83

83

*10K_4

*10K_4

D

D

D

D

+3V

78

78

R2

R2
10K_4

10K_4

3

2

Q20

Q20
2N

2N

7002D

7002D

1

19 RB501V-40

19 RB501V-40

2 1

18 RB501V-40

18 RB501V-40

2 1

R

R

528

528

1.5K_4

1.5K_4

I_DDCCLK_MB

HDM

27

27

R5

R5

1.5K_4

1.5K_4

HDM

I_DDCDATA_MB

1

B B

A A

5

4

3

502 *100/F_4

502 *100/F_4

R

R

496 *100/F_4

496 *100/F_4

R

R

507 *100/F_4

507 *100/F_4

R

R

490 *100/F_4

490 *100/F_4

R

R

EMI

B_HDMITX2P

M

M

B_HDMITX2N
B_HDMITX1P

M

MB_HDMITX1N

B_HDMITX0P

M

MB_HDMITX0N
M

B_HDMICLK+

MB_HDMICLK-

2

+5V

F1

F1

D1206P110TFT

D1206P110TFT

SM

SM

C7

C7
470p/X7R_4

470p/X7R_4

connector

HDMI

1

1

CN1

MB_HDMITX2P
M

B_HDMITX2N

M

B_HDMITX1P
B_HDMITX1N

M

B_HDMITX0P

M
MB_HDMITX0N

M

B_HDMICLK+
B_HDMICLK-

M

HDMI_DDCCLK_MB

D20

D20

HDM

N

126408677

12

21

21

HDM

I_DDCDATA_MB

SSM22LLPT

SSM22LLPT

56126873

N

271 *Short_4

271 *Short_4

R

R

I_MB_HP

R546

R546
100K_4

100K_4

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

S

S

S

Date: Sheet of

Date: Sheet of

Date: Sheet of

137984458

N

CN1

1

+

D2

2

D2

Shield

3

D2-

4

+

D1

5

D1

Shield

6

D1

-

7

D0+

8

Shield

D0

9

D0

-

10

CK+

11

CK Sh

12

CK-

13

CE Re

14

NC

15

DDC CL

16

DDC DATA

17

GND

18

+5V

19

HP DET

HDMI

HDMI

a Computer Inc.

a Computer Inc.

a Computer Inc.

Quant

Quant

Quant

PROJECT :

PROJECT :

PROJECT :

I (PS8101)

I (PS8101)

I (PS8101)

HDM

HDM

HDM

1

ield
mote

SHEL

K

SHEL

ZQH

ZQH

ZQH

GND
GND

20

L1

23
22

21

L2

1A

1A

1A

35Monday, March 14, 2011

35Monday, March 14, 2011

35Monday, March 14, 2011

17

17

17

5

WWW.AliSaler.Com

LAN (LA

<BOM note>
If center tap power come from internal switch
regulator
=>Stuff 52SWR@ (Default)
If center tap power come from internal LDO
=>Stuff 52LDO@

D D

C C

1/7 change solution for surge

X-TX1

N
P

X-TX1
X-

N

TX0

P

X-TX0

B B

C47

C47

0.1U

0.1U

25MH

25MH

33P/

33P/

33P/

33P/

/16V_4

/16V_4

50V_4C44

50V_4C44

Y2

Y2

z-LAN

z-LAN

50V_4C49

50V_4C49

N)

2 1

1

1

2

2

3

3
445

*UCL

*UCL

AMP2512T.TCT

AMP2512T.TCT

<Layout note>
Close to Pin1

L3 4.

L3 4.

DCR:0.15ohm

C43

C43
10U

10U

/10V_8

/10V_8

U4

U4

8

8

7

7

6

6

5

XT
XT

7uH/1A

7uH/1A

LO_LAN
LI_LAN

TX1N
TX1P
TX0N
TX0P

VDDCT

TX0P
TX0N
TX1P
TX1N

LX

6.8P

6.8P

6.8P

6.8P

6.8P

6.8P

6.8P

6.8P

1
2
3

*U

*U

CLAMP2512T.TCT

CLAMP2512T.TCT

F/50V_4C48

F/50V_4C48
F/50V_4C46

F/50V_4C46
F/50V_4C51

F/50V_4C51
F/50V_4C52

F/50V_4C52

1
2
3
445

4

S5

R36

R36

1/10 change to 2.2 ohm

C39

C39

0.1U

0.1U

/16V_4

/16V_4

20mil

AVDDH

12

C3

C3

3

3
/10V_4

/10V_4

1U

1U

U2

U2

8

8

7

7

6

6

5

76.1mA ; 30mil

2.2_6

2.2_6

*

Int. PU in SB

C34

C34

/16V_4

/16V_4

0.1U

0.1U

RN2

RN2

F_4P2R

F_4P2R

49.9/

49.9/

C32

C32

/16V_4

/16V_4

0.1U

0.1U

+3V_LAN+3V_

C69

C69
10U

10U

43

1 2

1000P/50V_4

1000P/50V_4

*

*

<Layout note>
Close to Pin2

12

C45

C45

/10V_4

/10V_4

/10V_8

/10V_8

1U

1U

EG

VDDCT_R

VDDCT

C40

C40

/16V_4

/16V_4

0.1U

0.1U

<Lay

note>

out
Close to LAN Chip
1nF reserved for EMI

F_4P2R

F_4P2R

49.9/

49.9/

C35

C35

0.1U

0.1U

3

* Why does Pin17 CLKREQn connect to Pin16(LED2) and Pin30(DVDDL)?

Power Sequence:

U8

U8

VDD33 to PERSTn >= 100ms

40mil

C37

C37

0.1U

0.1U

/16V_4

/16V_4

10,19,23,27>

PLTRST#<4,

PCIE

_WAKE#<8,19>

20mil

AVDDL

12

C41

C41

/10V_4

/10V_4

1U

1U

R2

R2

9 2.37K/F_4

9 2.37K/F_4

1/7 swap the pin define for layout

43

RN1

RN1

1 2

C16

C16

C38

C38

1000P/50V_4

1000P/50V_4

/16V_4

/16V_4

*

*

+

+1

.1V analog power

.7V analog power +1.7V Switching regulator (For VDDCT when sw itching mode)

+1

3

LX

TP36TP36

TP37TP37

C42

C42

0.1U

0.1U

/16V_4

/16V_4

TX0P
TX0N
TX1P
TX1N

V_S5 +1.1V regulator output (For al l the analog 1.1V supply pins)

XTLO
XT

20mil

_LAN

LI_LAN

RBIA

TP16TP16

2

6

1

LX

2

VDD33

3

PERSTn

4

WAKEn

5

VDDCT_R

EG

6

VDDCT

7

AVDDL_

REG

8

XTLO

9

XTLI

10

AVDDH_REG

S

11

S

RBIA

12

TRXP0

13

TRXN0

14

TRXP1

15

TRXN1

16

LED

[2]

A

A

8158-BL1A-RL

8158-BL1A-RL

R

R

VDD33

ATHEROS

AR8158

AR

AR

32Pin

32Pin

8158

8158

4X4mm

4X4mm

QFN

QFN

AVDDL_REG
AVDDH_REGAVDDL
DVDDL_REG
VDDCT_REG

VDDCT

2

1

PU in CLK Gen.

TP35TP35

R23

R23

6 0/J_4

TP39TP39

SMBUS for debug only

TP38TP38

CLK
CLK_

PCIE

PCI

N_ACTLED

_LINKLED#

6 0/J_4

.1U/10V_4

.1U/10V_4

C20

C20

22

22

.1U/10V_4

.1U/10V_4

C

C

_PCIE_LOM# <10>

PCIE_LOM <10>

_TX1+ <10>

_TX1- <10>

E

C30

C30
*0

*0

1U/16V_4

1U/16V_4

.

.

C28

C28

0.1U

0.1U

DVDDL

12

C29

C29

0.1U

0.1U

C27

C27
1U

1U

/16V_4

/16V_4

/16V_4

/16V_4

/10V_4

/10V_4

PCIE_LAN_REQ# <10>

CLK_

_RX1- <10>

PCIE

_RX1+ <10>

PCIE

AVDDL

20mil

C17

C17

0.

0.

/16V_4

/16V_4

1U

1U

17

CLKREQ

n

18

K

SMCL

19

SMDATA

20

DE

TESTMO

21

NC

IE_RXN0_LAN

PC

22

TX_N

PCIE

_RXP0_LAN

23

TX_P

24

AVDDL

25

REFC

LK_N

26

REFCLK

_P

27

AVDDL

28

RX_P

29

RX_N

30

REG

DVDDL_

LED

0

GND1

42

41

LED

GND1

GND335GND436GND537GND638GND739GND840GND9

GND2

34

LA

31

[0]

LAN

32

[1]

33

7
1024/27

+2.7V regulator output

30

+1

.1V regulator output (For al l the digital 1.1V supply pins)

5

.8V regulator output (For VDDCT when LDO mode)

LX

+1

1

*

NSFORMER (LAN) RJ45 Connector (LAN)

TRA

CN9

CN9

9

LLOW_N

LA

5.1K/J_8

5.1K/J_8

R25

U26

U26

N

TX1N

8

TD-

7

TD+

6

CT

5

NC

4

NC

3

CT

2

RD­RD+1RX+

N

N

S0014 LF_Bothhand

S0014 LF_Bothhand

4

TX-

TX+

CT
NC
NC

CT

RX-

L2 0_6L2 0_6

CX8EG601000: 0.5A/600ohm_6

*1U/6.3V_4

*1U/6.3V_4

0.1U

AVDD_CENVDDCT

C31

C31

0.1U
*1000P/50V_4C26 *1000P/50V_4C26

0.1U

0.1U
*1000P

*1000P

TX1P

/16V_4C24

/16V_4C24

/16V_4C23

/16V_4C23

TX0N

/50V_4C25

/50V_4C25

TX0P

1nF reserved for EMI

A A

1/7 change to 10/100 type

5

9
10
11
12
13
14
15
16

R21

R21
*1

*1

M_8

M_8

*B88069X9231T203

*B88069X9231T203

X-TX1
X-TX1P

TERM0

TERM1

X-TX0

N
P

X-TX0

R19

R19

R18

R18

F_8

F_8

F_8

F_8

75/

75/

75/

75/

TERM9

C18

C18
220P

220P

/3KV_1808

D2

D2

1 2

/3KV_1808

1/11 change to 220p by EMI's request

R25

*0.1U/50V_8

*0.1U/50V_8

C19

C19

Active LED Pin:
Non-overclocking=>active high

R30

R30

*5.1K/J_8

*5.1K/J_8

*0.1U/50V_8

*0.1U/50V_8

C54

C54

LINK LED Pin:
SWR mode=>active low
LDO mode=>active high

3

N_ACTLED

LA

N_LINKLED#

LA

LAN_LINKLED#

+3V_

S5

2

N_ACTLED

R12

R12

510/J_6

510/J_6

*

*

R20

R20

*510/J_6

*510/J_6

R15

R15

*0_8

*0_8

Siz

Siz

Siz

e Document Number Rev

e Document Number Rev

e Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

P

X-TX0
X-TX0N

P

X-TX1

TERM9

N

X-TX1

TERM9

LAN AR8158L

LAN AR8158L

LAN AR8158L

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

YE

N27354430

10

YE

LLOW_P

1

0+

2

0-

3

1+

4

2+

5

2-

6

1-

7

3+

8

3-

11

GREEN_N

12

GR

EEN_P

5

5

RJ4

RJ4

Quanta Computer

Quanta Computer

Quanta Computer

PROJECT :

PROJECT :

PROJECT :

GND2
GND1

1

14
13

ZQH

ZQH

ZQH

R265

R265

R23

R23

18 35M

18 35M

18 35M

*0_6

*0_6
*0_6

*0_6

5

5

Inc.

Inc.

Inc.

1A

1A

1A

of

of

of

1

M

INI-CARD WLAN(MPC)

1000mA

+3.3V:
+3.3Vaux:330mA
+1.5V:500mA

A A

PC

B B

K_LPC_DEBUG<10>

CL

IE_WAKE#<8,18>

De

I_RST#<10>

PC

L_RST1#<10>

C

L_DATA1<10>

C

L_CLK1<10>

C

IE_TX6+<10>

PC

IE_TX6-<10>

PC

IE_RX6+<10>

PC

IE_RX6-<10>

PC

K_PCH_SRC2<10>

CL

K_PCH_SRC2#<10>

CL

CIE_CLK_REQ2#<10>

P

L_VDD

+W

2

bug

13

R

R

556 0_4

556 0_4

R

R

306 0_4

306 0_4

Q6

Q6
*

*

DTC144EUA

DTC144EUA

2

R5

R5

61 *0_4

61 *0_4

R5

R5

55 *0_4

55 *0_4

R3

R3

07 *0_4

07 *0_4

R

R

574 0_4

574 0_4

R

R

314 0_4

314 0_4

PC

L_VDD

+W

PC

IE_WAKE#_R

IE_WAKE#_R

C

L_DATA1_WLAN

C

L_CLK1_WLAN

C

L_RST1#_WLAN

C

L_DATA1_WLAN

C

L_CLK1_WLAN

CL

K_PCH_WIFI

CL

K_PCH_WIFI#

3

4

Check LED signal. (active high or low)

H=7.

0mm

LTS_AAA-PCI-046-K01

LTS_AAA-PCI-046-K01

CN1

CN1

3

3

51

served

Re

49

served

Re

47

served

Re

45

served

Re

43

served

Re

41

served

Re

39

served

Re

37

served

Re

35

GN

33

PET

31

PET

29

GN

27

GN

25

PER

23

PER

21

GN

19

UIM

17

UIM

15

GN

13

FCLK+

RE

11

FCLK-

RE

9

GN

7

LKREQ#

C

5

served

Re

3

served

Re

1

AKE#

W

L

D

p0

n0
D
D

p0

n0
D

_C4
_C8

D

D

D
GN

53

ED_WPAN#

L

D_WLAN#

LE
ED_WWAN#

SB_D+

U

SB_D-

U

B_DATA

SM

B_CLK

SM

+3.

PER

_DISABLE#

W

IM_VPP

U
UIM
UIM

_DATA

UIM

_PWR

UIM

D
GN

54

+3.

GN

+1.

GN

GN

+1.

GN

3Vaux

GN

_RST
_CLK

+1.

GN

+3.

ST#

3V

D

5V

D

D

5V

D

D

5V

D

3V

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

16
14
12
10
8
6
4
2

modify 10/19

L_VDD

+W

5V

+1.

5V

+1.

L_VDD

+W

A

_LFRAME#_R

A

_LAD3_R

A

_LAD2_R

A

_LAD1_R

A

_LAD0_R

5V

+1.

L_VDD

+W

PL

R

R
R

R
R

R
R

R
R

R

SBP13+ <10>

U

SBP13- <10>

U

TRST#

293 0_4

293 0_4
288 0_4

288 0_4
285 0_4

285 0_4
281 0_4

281 0_4
280 0_4

280 0_4

LK_SDATA <3,14,15>

C

LK_SCLK <3,14,15>

C

LTRST# <4,10,18,23,27>

P

F_EN <27>

R

C_LFRAME# <9,27>

LP

C_LAD3 <9,27>

LP

C_LAD2 <9,27>

LP

C_LAD1 <9,27>

LP

C_LAD0 <9,27>

LP

5

+3V

R3

R3

03 *SHORT0805

03 *SHORT0805

De

bug

6

+W

L_VDD

C4

C4

57

57

10u/6.3V_8

10u/6.3V_8

C6

C6

95

95

1000p/50V_4

1000p/50V_4

C4

C4

58

58

0.1u/10V_4

0.1u/10V_4

C

C

684

684

0.1u/10V_4

0.1u/10V_4

C

C

697

697

*0.1u/10V_4

*0.1u/10V_4

+1.

5V

C6

C6
10u/6.3V_8

10u/6.3V_8

7

L_VDD

+W

C4

C4

32

32

*0.1u/10V_4

*0.1u/10V_4

88

88

8

C C

D D

Quant

Quant

Quant

a Computer Inc.

a Computer Inc.

a Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

INI PCI-E card/TV

INI PCI-E card/TV

INI PCI-E card/TV

M

M

M

ZQH

ZQH

ZQH

8

1A

1A

19 45Monday, March 14, 2011

19 45Monday, March 14, 2011

19 45Monday, March 14, 2011

1A

1

WWW.AliSaler.Com

2

3

4

MA

IN SATA HDD

CN12

CN12

23

GND23

1

GND1

A A

B B

AIN_SATA

AIN_SATA

M

M

RXP
RXN

GND2

TX

TXP

GND3

3.3V

3.3V

3.3V
GND
GND
GND

GND

RSVD

GND

12V
12V
12V

GND24

2
3
4
5

N

6
7

8
9
10
11
12
13
14

5V

15

5V

16

5V

17
18
19
20
21
22

24

SATA_T
SAT

A_T

SATA_R
SATA_R

+5

XP0_C
XN0_C

XN0
XP0

V_HDD

+5V

C461

C461
C459

C459

6 .01u/25V_4

6 .01u/25V_4

C45

C45
C453

C453

0 *SHORT0805

0 *SHORT0805

R55

R55

.01u/25V_4

.01u/25V_4
.01u/25V_4

.01u/25V_4

.01u/25V_4

.01u/25V_4

6

6

C67

C67

+

+

*100u/6.3V_3528

*100u/6.3V_3528

+5

V_HDD

SATA_T
SATA_T

SATA_R
SATA_R

C386

C386

6.3V_6

6.3V_6

10u/

10u/

XP0 <9>
XN0 <9>

XN0_C <9>
XP0_C <9>

C400

C400

1u/16V_4

1u/16V_4

*.

*.

C398

C398

1u/16V_4

1u/16V_4

*.

*.

C395

C395
.01u/

.01u/

25V_4

25V_4

C392

C392
.01

.01u/

u/25V_4

25V_4

6$7$+''

CN20

CN20

26
25

C C

D D

SATA_CONN

SATA_CONN

*

*

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

XP0_C

SATA_T
SATA_T

XN0_C

SATA_R

XN0
XP0

SATA_R

0.94A(80mils)

C401

C401
*.

*.

1u/16V_4

1u/16V_4

1

C399

C399
*1

*1

0u/6.3V_6

0u/6.3V_6

+5V

2

OD

EE

RETURN-PATH CAPACITORS

+3V

C507

C507

C361

C361

C

C

483

483

C506

C506

C359

C359

C462

C462

C489

C489

C723

C723

C

C
C493

C493
C

C

1/11 add by EMI's request

D (SATA)

CN7

CN7

G

ND14

GND

A+

A-

GND

B-

B+

GND

DP

5V
5V

MD
GND
GND

GND15

SATA_OD

SATA_OD

D_H=7.7

D_H=7.7

.1u/10V_4

.1u/10V_4

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

+3V

490

490

494

494

14
1

2
3
4
5
6
7

8
9
10
11
12
13

15

.1u/10V_4

.1u/10V_4

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

470p/X7R_4

470p/X7R_4

2200p/50V_4

2200p/50V_4
2200p/50V_4

2200p/50V_4
2200p/50V_4

2200p/50V_4

SATA_T
SATA_T

SATA_R
SAT

A_R

SAT

A_D

3

XP1_C
XN1_C

XN1
XP1

P

R1

R1

9 *1K_4

9 *1K_4

5

5

C263

C263
.01u/

.01u/

C471

C471

C470

C470

C474

C474

C323

C323

C672

C672

C333

C333

C673

C673

C460

C460

C430

C430

C426

C426

C224

C224

C669

C669
C480

C480

C

C

337

337

C674

C674

VIN

1/10 add for plane

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

0.1u/25V_4_X5R

.01u/25V_4

.01u/25V_4

C317

C317
C310

C310

.01u/25V_4

.01u/25V_4

C304

C304

.01u/25V_4

.01u/25V_4
.01u/25V_4

.01u/25V_4

C296

C296

25V_4

25V_4

VIN

C495

C495

50V_4

50V_4

2200p/

2200p/

1/11 add by EMI's request

+VGFX_AXG

C497

C497

50V_4

50V_4

220p/

220p/

+1.

05V

.1u/10V_4

C553

C553

C496 2200p/

C496 2200p/

1/11 add by EMI's request

1/11 add for plane

SATA_T
SATA_T

SATA_R
SATA_R

C262

C262

25V_4

25V_4

.01u/

.01u/

Si

Si

Si

Date: Sheet

Date: Sheet

Date: Sheet

C254

C254

1u/16V_4

1u/16V_4

*.

*.

ze Docume n t Nu mb e r Rev

ze Docume n t Nu mb e r Rev

ze Docume n t Nu mb e r Rev

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

.1u/10V_4

50V_4

50V_4

C

C

220p/50V_4

220p/50V_4

498

498

220p/50V_4

220p/50V_4

C499

C499
C

C

220p/50V_4

220p/50V_4

500

500

XP1 <9>
XN1 <9>

XN1_C <9>
XP1_C <9>

+5V_ODD

C252

C264

C264

1u/16V_4

1u/16V_4

*.

*.

SATA-HDD/ODD/USB-ESATA

SATA-HDD/ODD/USB-ESATA

SATA-HDD/ODD/USB-ESATA

C252
10u/

10u/

6.3V_6

6.3V_6

Quanta Comp

Quanta Comp

Quanta Comp

PROJECT :

PROJECT :

PROJECT :

4

+5V

C711

C711

C670

C670

C718

C718

C

C

719

719

C720

C720

C722

C722

+5V_S5

C704

C704
C479

C479

+V

CC_CORE

C508

C508

R44

R44

3 *SHORT0805

3 *SHORT0805

+

+

C611

C611
*

*

100u/6.3V_3528

100u/6.3V_3528

uter Inc.

uter Inc.

uter Inc.

ZQH

ZQH

ZQH

20 35M

20 35M

20 35M

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

*.1u/10V_4

.1u/10V_4

.1u/10V_4

.1u/10V_4

.1u/10V_4

.1u/10V_4

.1u/10V_4

470p/X7R_4

470p/X7R_4

*.1u/10V_4

*.1u/10V_4
.1u/10V_4

.1u/10V_4

*.1u/10V_4

*.1u/10V_4

+5V

of

of

of

1A

1A

1A

5

HP

HP

D D

C

odec(ADO)

+5

VA

66

C7

C7

79

79

0.1u/10V_4

0.1u/10V_4

C7

C7

89

89

0.1u/10V_4

0.1u/10V_4

66

C4

C4

0.1u/10V_4

0.1u/10V_4

Spilt by AGND

L_SPK+<2

2>

L_SPK-<2

2>

R
R

_SPK-<22>
_SPK+<22>

68

68

C4

C4
10u/6.3V_6

10u/6.3V_6

AD

OGND

Place next to pin 38

+

C7

C7

83

83

10u/6.3V_6

10u/6.3V_6

+

5VPVDD2

C7

C7

90

90

10u/6.3V_6

10u/6.3V_6

5VPVDD1

81 *SHORT0603

81 *SHORT0603

R5

+5

V

C C

+5

R5

C7

C7

C7

C7

80

80

84

84

0.1u/10V_4

0.1u/10V_4

10u/6.3V_6

10u/6.3V_6

87 *SHORT0603

87 *SHORT0603

R5

R5

V

C7

C7

C7

C7

93

93

92

92

0.1u/10V_4

0.1u/10V_4

10u/6.3V_6

10u/6.3V_6

Place next to pin 46

B B

-L<22 >

HP

-R<22>

C

C

+

+

2.2u/6.3V_6

2.2u/6.3V_6

U1

U1

AD

L_SPK+
L_SPK-

_SPK-

R
R

_SPK+

EAPD

#

OGND

37

AVSS2

38

A

39

P

40

SPK-

41

SPK-

42

PVSS1

43

PVSS2

44

SPK-

45

SPK-

46

P

47

SPD

48

SPD

49

PGN

ANALOG

Spilt by DGND

V

+3

447

447

C

C

0.1u/10V_4

0.1u/10V_4

Place next to pin 1

0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer

PD

4

R

R
R

R

AD

OGND

478

478

C

C

+

+

2.2u/6.3V_6

2.2u/6.3V_6

477

477

35

36

0

0

P

N

CB

CB

VDD2
VDD1

L+
L-

(Vista Premium Version)

R­R+

VDD2

IFO2/EAPD
IFO
D

DD1

PIO0/DMIC-DATA

DV

G

1

2

448

448

C

C
10u/6.3V_6

10u/6.3V_6

#

30

31

32

33

34

PVEE

-OUT-L

C

-OUT-R

-VREFO-L

HP

-VREFO-R

HP

MIC1

MIC1

#

ATA-OUT

T-CLK

PIO1/DMIC-CLK
G

3

VSS2

PD

SD

BI

D

4

5

6

7

585 *0_4

585 *0_4
551 0_4

551 0_4

MIC2

-VREFO

760 10u/6.3V_6

760 10u/6.3V_6

C

C

28

29

O-CAP

-VREFO
LD

MIC2

ATA-IN

DD-IO

SD

DV

8

9

Z_SDIN0_R

AC

445 *22p/50V_4

445 *22p/50V_4

C

C

reverse R441

AD

OGND

MIC1
MIC1

R5

R5

84 *0_4

84 *0_4

1/7 by FAE's recommend

AD

OGND

26

25

27

EF
VR

VDD1

AVSS1

A

LI
LI

MIC1

MIC1

NO-OUT

MO

JDRE

Se

MIC2

MIC2
LI
LI
Se

C

BEEP

ESET#

SYN

R

PC

ALC271X-VB3-GR

ALC271X-VB3-GR

10

11

12

DIGITAL

PC

586 22_4

586 22_4

R

R

-VREFO-L

-VREFO-R

-VREFO-L

MIC1

AD

OGND

Place next to pin 27

C

C

C

C

476

476

0.1u/10V_4

0.1u/10V_4

2.2u/6.3V_6

2.2u/6.3V_6

24

NE1-R

23

NE1-L

22

-R

21

-L

20
19

F

18

nse-B

MIC2

17

-R

MIC2

16

-L

15

NE2-R

14

NE2-L
nse A

SEN

13

ANALOG

PCBEEP dont coupling any signals if possible
8/17 separate PCBEEP to Digital from Realtek suggestion

1.

6Vrms

BEEP

C

C

451 1u/10V_6

451 1u/10V_6

-VREFO-L <22>

MIC1

-VREFO-R <22>

MIC1

473

473

R

R

582 20K/F_4

582 20K/F_4

_INT_R

C

C

469 1u/10V_6

469 1u/10V_6

_INT_L

463 1u/10V_6

463 1u/10V_6

C

C

R

R

SEA

305 20K/F_4

305 20K/F_4

R

R

313 39.2K/F_4

313 39.2K/F_4

BEEP_1

C

C

428

428

100p/50V_4

100p/50V_4

H_AZ_CODEC_SYNC <9>

PC

CH_AZ_CODEC_SDIN0 <9>

P

P

CH_AZ_CODEC_SDOUT <9>

PC

H_AZ_CODEC_BITCLK <9>

R

R

296

296

4.7K_4

4.7K_4

MIC1
MIC1

AD

3

-R

-L

OGND

R2

R2

97 47K/F_4

97 47K/F_4

Place next to pin 25

9

T29T2
T28T2

8

M

IC1-R <22>

M

IC1-L <22>

R

R

308 1K_4

308 1K_4
309 1K_4

309 1K_4

R

R

M

IC1_JD

PC

C

C

429

429

*100p/50V_4

*100p/50V_4

C

MI

IC1_JD <22>

M

HP

OUT_JD <22>

D

D

10 BAS316

10 BAS316

11 BAS316

11 BAS316

D

D

2/17 change

H_AZ_CODEC_RST# <9>

ute(ADO)

M

PD

+5

VA

72

72

C4

C4

C4

C4

10u/6.3V_6

10u/6.3V_6

0.1u/10V_4

0.1u/10V_4

AD

OGND

IC2_INTL1

M

SPKR

PC

BEEP_EC <27>

C4

C4

31

31

0.1u/10V_4

0.1u/10V_4

Place next to pin 9

#

75

75

<9>

R5

R5

88 *SHORT0603

88 *SHORT0603

C4

C4

41

41

10u/6.3V_6

10u/6.3V_6

2

+3

+5

V

VA

99

99

15

15

R5

R5

R6

R6

10K_4

10K_4

*10K_4

*10K_4

AM

P_MUTE#<27>

+3

V

EAPD

D2

2*BAS316D22*BAS316

D2

3BAS316D23BAS316

4BAS316D24BAS316

D2

EAPD

#

P_MUTE# <27>

AM

H_AZ_CODEC_RST#

PC

+

5V_S5

53

U2

U2

9

9

1

#

4

2

TC7SH0 8FU

TC7SH0 8FU

23

23

R3

R3
0_4

0_4

C485

C485

*

*

4.7u/10V_6

4.7u/10V_6

1

HP

_MUTE# <22>

Po

wer (ADO)

VA

+5

710

710

C

C
*0.1u/10V_4

*0.1u/10V_4

OGND

AD

4

553 0_4

553 0_4

R

R

R

R

564 0_4

564 0_4

R

R

563 0_4

563 0_4

R

R

571 0_4

571 0_4

R

R

311 *0_4

311 *0_4
464 *1000p/50V_4

464 *1000p/50V_4

C

C

689 *1000p/50V_4

689 *1000p/50V_4

C

C

OGND

AD

Tied at one point only under
the codec or near the codec

V

+5

A A

08

08

07

07

C7

C7

C7

C7

*0.1u/10V_4

*0.1u/10V_4

+

+

R331 *0_4R331 *0_4

*10u/10V_3216

*10u/10V_3216

C730, C787 close U37 pin3 and L65

5

L58

L58

0

0

U3

U3

3

IN

2

D

GN

1

S

HDN

*G923-330T1UF

*G923-330T1UF

OU

SET

ANALOGDIGITAL

UPB201209T-310Y-N/6A/31ohm_8

UPB201209T-310Y-N/6A/31ohm_8

4

T

R

R

569 *29.4K/F_4

569 *29.4K/F_4

5

66

66

R5

R5
*10K/F_4

*10K/F_4

AD

OGND

C

C

+

+

*10u/10V_3216

*10u/10V_3216

709

709

INT MIC array

CN4

CN4

INT

INT

AD

OGND

cap place close to MIC-connector

3

MIC2_INTL1 MIC2-VREFO

1

1

2

2

C492

C492

_MIC

_MIC

*22P_4

*22P_4

OGND

AD

67 .1U_4C467 .1U_4

C4

37

37

R3

R3

2.2K_4

2.2K_4

1/7 by FAE's recommend

anta Computer Inc.

anta Computer Inc.

anta Computer Inc.

Qu

Qu

Qu

PROJECT :

PROJECT :

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

S

S

S

Date: Sheet

Date: Sheet

2

Date: Sheet

PROJECT :

EALTEK ALC663&888/MDC

EALTEK ALC663&888/MDC

EALTEK ALC663&888/MDC

R

R

R

1

ZQH

ZQH

ZQH

1A

1A

1A

35Monday, March 14, 2011

35Monday, March 14, 2011

35Monday, March 14, 2011

of

21

of

21

of

21

5

WWW.AliSaler.Com

4

3

2

1

MIC

D D

C C

HP/SPDI

B B

1-L<21>

MIC
MIC

1-R<21>

F

HP

MUTE#<21>

_

C482

C482
C481

C481

Max. 100mVrms input for Mic-IN

HP-L<21>

HP-R<21>

MI
MI

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

HP_

C1-VREFO-R<21>
C1-VREFO-L<21>

MIC
MI

C1_R2

MIC

1_JD

3

Q23

Q23
FD

FD

V301N

V301N

R322

R322

MUTE#

3

Q24

Q24
FD

FD

V301N

V301N

21 *0_6

21 *0_6

R3

R3

1_L2

2

2

Int

OPEN Jack

R32

R32

R32

R32

5

5

4

4.7K/F_4

4.7K/F_4

R318

R318

1K/F_4

1K/F_4
1K/F_4

1K/F_4

R317

R317

12

D21

D21

VPORT_6

VPORT_6

*

*

AD

OGND

HP-L-2

1

*0_6

*0_6

HP-R-2

1

4

4.7K/F_4

4.7K/F_4

C1_L3

MI

L35

L35
BLM

BLM

15AG121SS1/0.5A/120ohm_4

MIC

C1_JD<21>

MI

HP-L-2
HP-R-2

15AG121SS1/0.5A/120ohm_4

1_R3

L34

L34

15AG121SS1/0.5A/120ohm_4

15AG121SS1/0.5A/120ohm_4

BLM

BLM

R328

R328
R327

R327

AD

OGND

56/F_4

56/F_4
56/F_4

56/F_4

6

6

C48

C48
470p/50V_4

470p/50V_4

HPL-1
HPR-1

R32

R32

6

6

*1K_4

*1K_4

C484

C484
470p/

470p/

L37 B

L37 B
L36 B

L36 B

R329

R329
*1K

*1K

_4

_4

Normal

C1_L

MI
MI

C1_R

MI

C1_JD

50V_4

50V_4

1
2
6
3
4

5

C

C

MI

MI

A

OGND

D

LM15AG121SS1/0.5A/120ohm_4

LM15AG121SS1/0.5A/120ohm_4
LM15AG121SS1/0.5A/120ohm_4

LM15AG121SS1/0.5A/120ohm_4

C48

C48

7

7

2200p/50V_4

2200p/50V_4

CN18

CN18

AD

BLACK

C48

C48

8

8

2200p/50V_4

2200p/50V_4

OGND

7

8

ernal Speaker

1/7 swap

SPK+<21>

L_
L_

SPK-<21>

R_

SPK-<21>

R_

SPK+<21>

HPL_SYS
HPR_

SYS

HPO

UT_JD<21>

CN16

22u/25V_6

22u/25V_6

CN16

1
2

5

3

6

4

SPEAKER

SPEAKER

-CONN

-CONN

SPK+

L_

R572

R572

L_

SPK-

R570

R570

R_

SPK-

R215

R215

R_

SPK+

R216

R216

AD

OGND

0_6

0_6
0_6

0_6
0_6

0_6
0_6

0_6

C384

C384

*0.

*0.

22u/25V_6

22u/25V_6

CN17

CN17

1
2
6
3
4

5

J

J

A6331-0230T3B-8H

A6331-0230T3B-8H

BLACK

7

8

C388

C388

*0.

*0.

22u/25V_6

22u/25V_6

SPK+_1

L_
L_

SPK-_1

R_

SPK-_1

R_

SPK+_1

C38

C382

2

*0.

*0.22u/25V_6

22u/25V_6

*0.

*0.

C390

C390

HPOUT_JD

12

D12

D12

A A

5

4

3

*

*

VPORT_6

VPORT_6

OGND

AD

Si

Si

Si

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

Date: Sheet

onday, March 14, 2011

Date: Sheet

onday, March 14, 2011

Date: Sheet

2

onday, March 14, 2011

Quanta Com

Quanta Com

Quanta Com

PROJECT :

PROJECT :

PROJECT :

AMP /AUDIO

AMP /AUDIO

AMP /AUDIO

ZQH

ZQH

ZQH

JACK CONN

JACK CONN

JACK CONN

1

uter Inc.

uter Inc.

uter Inc.

p

p

p

of

22 35M

of

22 35M

of

22 35M

1A

1A

1A

A

B

C

D

E

RD READER Controller

CA
AU6435-GDL

2 IN 1 CA

Main DFHS11FR011

Second DFHS11FR033

4 4

PIN45=Clock input selection
'1' for 48MHz input [Default,Internal PU]
'0' for 12MHz input

TA0
DA

RL4
CT

38

TA7
DA

C1

DCDN
X

23

37

1_VSSHM

_VDDHM

C

XD

XDCEN

EEPD

EEPC

WPEN
SD

24

X

+1

.8V_VDD

DA

TA6

CT

RL0

DA

TA5

CT

RL2

DA

TA4
TA3

DA

TA2

DA

WPN

ATA

D_CD#

LK

X

TALSEL

36
35
34
33
32
31
30
29
28
27
26
25

R

552*0_4R552*0_4

R

R

554 *Short_4

554 *Short_4

PIN43=Power saving mode enable.

47

D

GN
DDHM
V

_V33

_IOP
C1

C1

14

SEL

XTAL

44

45

46

D

HID

VD

ALSEL
XT

AU6435-GDL

AU6435-GDL

3

VDD5V

GND5V

V3

A

A

17

15

16

T95T9

RL1

NBMDHID

CT

43

MD
NB

DDHM
V

18

C691

C691

1u/16V_4

1u/16V_4

0.

0.

'1' for enable [Default]
'0' for disable

5

A1

RL3
CT

DATA0DAT

39

40

42

41

RL1

RL3

TA1

CT

CT

DA

SYN

D

D

GN

VSSA_

VD

20

19

22

21

+3V

XT48MHZ<10>

E

R

R

560 330_4

560 330_4

.8V_VDD

7u/10V_6

7u/10V_6

4.

4.

_IOP

C1

+3V
+3V

C743 close PIN46, 47

C708 close PIN48, 47

C694

C694

0.

0.

U2

U2

8

8

1

LE

2

EXT

3

RS

4

R

5

VD

6

DP

7

DM

8

S33P

V

9

XI

10

XO

11

VD

12

V1

VCC_

XD

0.

1u/16V_4C7250.1u/16V_4C725

270 2.2u/6.3V_6

270 2.2u/6.3V_6

4.

7u/10V_6C6904.7u/10V_6C690

C696

C696

C692

C692

1u/16V_4

1u/16V_4

0.

0.

XI
XO

C

C

1u/16V_4

1u/16V_4

D

48IN

TN

EXT

33P

D
8

48

13

+1

.8V_VDD

+3V

3 3

R

R

559 *100K_4

R

R

580 0_4

PL

TRST#<4,10,18,19,27>

+3V

2+<10>

USBP1

USBP1

2-<10>

2 2

580 0_4

557 *SHORT0603

557 *SHORT0603

R

R

C698

C698
*

*

5p/50V_4

5p/50V_4

559 *100K_4

0.47u/10V_6C700*0.47u/10V_6C700

*

C701

C701

4.

4.

7u/10V_6

7u/10V_6

C699

C699
*

*

5p/50V_4

5p/50V_4

crystal trace width needs at least 10 mils.

702 18p/50V_4

702 18p/50V_4

C

C

C

C

703 18p/50V_4

703 18p/50V_4

Y7

Y7
12M

12M

XI

558

558

R

R
270K_4

270K_4

Hz

Hz

XO

+3V

V_VDD

+3

+1

pin13 output 20mils

RD READER (SD/MMC)

CTRL0, CRTL 1 trace length shorter ,
and surround with GND.

4.7u/10V_6C726*4.7u/10V_6C726

*

1u/16V_4C7240.1u/16V_4C724

0.

C1

CT

RL0
RL2

CT
DAT

DAT

XD

_WP#

XD

_CE#

EEPDAT

A

K

EEPCL

SD write protect
1:decided by SDWP[Default]

6

T96T9

0:letting SD always
write-able

_IOP

A3
A2

T92T9

2

T94T9

4

1

T91T9

3

T93T9

WP

SD_
SD_

CD#

DAT1

VCC_

SD_
SD_

DAT0

D_CLK

S

XD

CMD

SD_

DAT3

SD_

DAT2

SD_

VCC_

XD

Cl

ose to CN14 pin 14 & pin23

442

442

C

C

4.7u/10V_6

4.7u/10V_6

10

9
8
7
6
5
3
2
1

SD-CARD

SD-CARD

C454

C454

0.

0.

1u/16V_4

1u/16V_4

4.7u CAP close to pin23

The trace length difference for each card interfaces should be
smaller than 500 mil

DAT

DAT

DAT

DAT

A0

A1

A2

A3

562 33_4

562 33_4

R

R

577 33_4

577 33_4

R

R

R

R

578 33_4

578 33_4

R

R

579 33_4

579 33_4

SD_

SD_

SD_

SD_

DAT0

DAT1

DAT2

DAT3

Close to connector

CLK length should be as short as possible. Shorter than
1200 mil is good.

RL0

529 33_4

CT

CT

CT

529 33_4

R

R

RL2

R

R

573 33_4

573 33_4

1/12 add by FAE's request

RL3 SD_CD#

SD_

SD_

SD_

CLK

WPCTRL1

CMD

CN3

CN3

DA
DA
VSS2
CL
VD
VSS1
CM
DA
DA

11

12

4

W

/SW

TA1

COM

TA0

CD/S

WP

D
D

TA3
TA2

SW

D

ND1

GN

G

13

14

449

449

C

C
*10p/50V_4

*10p/50V_4

K

1 1

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Si

ze Document Number Rev

A

A

A

U6433 CardReader

U6433 CardReader

U6433 CardReader

Date: Sheet

Date: Sheet

A

B

C

D

Date: Sheet

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

E

1A

1A

1A

23M

23M

23M

of

43

of

43

of

43

5

WWW.AliSaler.Com

4

3

2

1

LED

D D

+3V_

POWER

PWR

Amber

R342

LED#<27>

R342

100/F

100/F

LE

LE

_4

_4

D3 B

D3 B

ule

ule

S5

U

LED5

LED5

Blue

Amb

1
4

er

LE

LE

D_B/R

D_B/R

+3VPC

U

2
3

C C

R339 *1M_4R339 *1M_4
R336 *1M_4R336 *1M_4

+3VPC

Battery

_4

BATL
BATL

R338 300/F

ED0#<27>
ED1#<27>

R338 300/F
R335

R335

100/F

100/F

_4
_4

_4

Blue

B B

A A

5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

ze Document Number Rev

ze Document Number Rev

Si

Si

Date: Sheet

Date: Sheet

4

3

Date: Sheet

2

, March 14, 2011

, March 14, 2011

, March 14, 2011

PROJECT :

POWER/M

POWER/M

POWER/M

ZQH

ZQH

ZQH

MB/LAUNCH/LED

MB/LAUNCH/LED

MB/LAUNCH/LED

24 35Monday

24 35Monday

24 35Monday

of

of

1

of

1A

1A

1A

5

4

3

2

1

USB

D D

C C

U

SBON#<27>

U

SB_OC0#<10>

USB/

B B

C4

C4
1U/6.3V_4

1U/6.3V_4

U

SBP1-<10>

U

B

5V_S5

+

55

55

SBP1+<10>

U9

U9

2

IN

1

3

IN

2

4

#

EN

1

GN

D

G547F

G547F

310 *0_4

310 *0_4

R

R

L33

L33

2
3

D

D

LW21HN900SQ2L/300mA/90ohm

LW21HN900SQ2L/300mA/90ohm

R

R

312 *0_4

312 *0_4

2P81U

2P81U

2
3

8

OU

T3

7

OU

T2

6

T1

OU

5

OC

#

1

1

4

4

U

SBPWR1

C693

C693

+

+

330u/6.3V_6X5.7

330u/6.3V_6X5.7

U

SBP1+_R

U

SBP1-_R

U

SBP9-<10>

U

U

C465

C465

1000p/50V_4

1000p/50V_4

CN1

CN1

4

4

SBP1-_R

U
U

SBP1+_R

12

SBP9+<10>

SBP11+<10>

U

SBP11-<10>

RV

RV

2

2

*EGA-0402

*EGA-0402

12

RV

RV

1

1

*EGA-0402

*EGA-0402

R

R

261 *0_4

261 *0_4

L29

L29

2

1

2

3

4

3

D

D

LW21HN900SQ2L/300mA/90ohm

LW21HN900SQ2L/300mA/90ohm

R

R

262 *0_4

262 *0_4

R

R

274 *0_4

274 *0_4

L31

L31

2

1

2

3

4

3

D

D

LW21HN900SQ2L/300mA/90ohm

LW21HN900SQ2L/300mA/90ohm

R

R

273 *0_4

273 *0_4

1
2
3

1
4

1
4

8

1

8

7

2

7

6

3

6

5

445

USB_MB_Turbo

USB_MB_Turbo

SBP9+_R

U
U

SBP9-_R

U

SBP11+_R

U

SBP11-_R

BLUE

TOOTH CONNECTOR for 3.0

BT

_POWERON#<27>

C4

C4

46

46

*1u/6.3V_4

*1u/6.3V_4

09

09

C4

C4

*1u/6.3V_4

*1u/6.3V_4

SB_OC4_5#<10>

U

SBON#<27>

U

+

3V_S5

SBP11-_R

U
U

SBP11+_R

SBP9-_R

U

SBP9+_R

U

CN1

CN1

5

BT

_POWER

C7

C7

06

06

*1000p/50V_4

*1000p/50V_4

R

R

567 *0_4

567 *0_4

L57

L57

3
2

*R

*R

R

R

568 *0_4

568 *0_4

4

4

3

1

1

2

FCMF1632100M3T/200mA/90ohm

FCMF1632100M3T/200mA/90ohm

U

SBP4+_R

U

SBP4-_R

U

SBP4+_R
SBP4-_R

U

T_LED

T

101T101

B

2

+

Q22

Q22
*A

*A

5V_S5

3

O3413

O3413

USBP4+<10>

U

79

79

R2

R2

*SHORT1206

*SHORT1206

+

+

C7

C7
*2.2u/6.3V_6

*2.2u/6.3V_6

SBP4-<10>

USB_DB FFC CONN

USB_DB FFC CONN

16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
11718

CN1

CN1

05

05

0

0

1

5
4
3
2
1

*BT_CONN

*BT_CONN

C7

C7

12

12

*.01u/16V_4

*.01u/16V_4

5

7
6

A A

Quanta Com

Quanta Com

Quanta Com

PROJECT :

PROJECT :

S

S

S

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

US

US

US

B/ BT

B/ BT

B/ BT

ZQH

ZQH

ZQH

1

puter Inc.

puter Inc.

puter Inc.

35Monday, March 14, 2011

35Monday, March 14, 2011

35Monday, March 14, 2011

of

25

of

25

of

25

1A

1A

1A

5

WWW.AliSaler.Com

K/B

7 8
5
3
1

6 *100p/50Vx4

6 *100p/50Vx4

CP

CP

7 8

D D

C C

5
3
1

5 *100p/50Vx4

5 *100p/50Vx4

CP

CP

7 8
5
3
1

4 *100p/50Vx4

4 *100p/50Vx4

CP

CP

7 8
5
3
1

3 *100p/50Vx4

3 *100p/50Vx4

CP

CP

7 8
5
3
1

CP2 *100p/50Vx4CP2 *100p/50Vx4

7 8
5
3
1

CP

CP

1 *100p/50Vx4

1 *100p/50Vx4

*100p/50V_4

*100p/50V_4

C222

C222

C221

C221

*100p/50V_4

*100p/50V_4

MX3
MX2

6

MX4

4

MX5

2

MX6
MX7

6

MY17

4

MY16

2

MY3
MY2

6

MY1

4

MY0

2

MY7
MY6

6

MY5

4

MY4

2

MY11
MY10

6

MY9

4

MY8

2

MY15
MY14

6

MY13

4

MY12

2

MX1
MX0

HOLE

HOL

HOL

HOL

E2

E2

*hg-c315d110p2

*hg-c315d110p2

8
9

B B

*hg-c315d118p2

*hg-c315d118p2

8
9

*hg-c315d118p2

*hg-c315d118p2

8
9

HOL

HO

HOL

HOL

123

E13

LE13

123

E6

E6

123

67
5
4

HO

HO

LE14

LE14

*hg-c315d118p2

*hg-c315d118p2

67
5

8

4

9

123

HO

HO

LE17

LE17

*hg-c315d118p2

*hg-c315d118p2

67
5

8

4

9

123

HOL

HOL

*hg-c315d118p2

*hg-c315d118p2

67

8

5

9

4

123

HOL

HOL

*hg-c315d118p2

*hg-c315d118p2

67

8

5

9

4

123

E15

E15

E10

E10

67
5
4

HO

HO

LE16

LE16

*hg-c315d118p2

*hg-c315d118p2

67
5

8

4

9

123

HOL

HOL
*H-C197D87P2

*H-C197D87P2

HOL

HOL

*hg-c315d118p2

*hg-c315d118p2

8
9

123

HOL

HOL

*hg-c315d118p2

*hg-c315d118p2

67

8

5

9

4

123

E21

E21

1

E9

E9

E7

E7

67
5
4

67
5
4

HOL
*H-C94D94N

*H-C94D94N

HOL

HOL
*H-TC256BC165D165P2

*H-TC256BC165D165P2

4

MY0<27>
MY1<27>
MY2<27>
MY3<27>
MY4<27>
MY5<27>
MY6<27>
MY7<27>
MY8<27>
MY9<27>
MY10<27>
MY11<27>
MY12<27>
MY13<27>
MY1

4<27>
MY15<27>
MY16<27>
MY17<27>
MX7<27>

6<27>

MX
MX5<27>
MX4<27>
MX3<27>
MX

2<27>

MX

1<27>

MX0<27>

+3

VPCU

3 10K_10P8R

3 10K_10P8R

RP

RP

10

MX4 MX2

9

MX5

8

MX6

7 4

MX7

E3

E3

1

E8

E8

1

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9

10

MY10

11

MY11

12

MY12

13

MY13

14

MY14

15

MY15

16

MY16

17

MY17

18

MX7

19

MX6

20

MX5

21

MX4

22

MX3

23

MX2

24

MX1

25

MX0

26

MX3

1
2

MX1

3

MX0

56

HO

HO

LE11

LE11

*H-TC256BC165D165P2

*H-TC256BC165D165P2

1

CN2KBCN2

1
2
3
4
5
6
7
8
9

27
28

KB

HO

HO

LE22

LE22

*H-O95X134D95X134N

*H-O95X134D95X134N

1

HOL

HOL

E12

E12

*H-TC256BC165D165P2

*H-TC256BC165D165P2

1

3

CPU FAN

C549

C549

2.2U_6

2.2U_6

SML

1ALERT#<10,11,27>

AN#<27>

CPUF

TO

UCHPAD & Switch CONN.

+5V +5V

R86

R86
10K

10K

TPD

ATA<27>

LK<27>

TPC

SW3

G

HT#

RI

SW3

+5V

U17

1
4

_4

_4

SHORT0603

SHORT0603

SHORT0603

SHORT0603

U17

G995P

G995P

2

1 2

NPWR = 1.6*VSET

FA

R87

R87
10K

10K

_4

_4

L18 *

L18 *

L19 *

L19 *

3
1 4

WITCH_1.5

WITCH_1.5

S

S

2

VIN2VO

GND

N

/FO

GND
GND

VSET

GND

1U

1U

L20

L20

C219

C219

*.

*.

01u/25V_4

01u/25V_4

3
5
6
7
8

HORT0603

HORT0603

*S

*S

C22

C22

0

0

*.01u/25V_4

*.01u/25V_4

FAN

SIG<27>

TH

TH

C547

C547

2.

2.

1 2

_FAN_POWER

_FAN_POWER

C54

C54
.01U_4

.01U_4

2U_6

2U_6

C223

C223

0.1u/

0.1u/

10V_4_X7R

10V_4_X7R

F

T#

LE

1

+3V

5

5

R38

R38
10K_4

10K_4

CN6

CN6

1
2

1
2
3
4
5
6
7
8

9
10
11
12

es 88501-120N

es 88501-120N

Ac

Ac

WITCH_1.5

WITCH_1.5

CN1

CN1

3

FA

FA

13
14

N_CONN

N_CONN

2

C54

C54

8

8

6

6

*.01U_4

*.01U_4

PVDD

+T

ATA_R

TPD
TPC

LK_R

RI

HT#

G

F

T#

LE

SW2

SW2

3
1 4

S

S

A A

Quanta Com

Quanta Com

Quanta Com

PROJECT :

PROJECT :

Si

Si

Si

ze Document Number Rev

ze Document Number Rev

ze Document Number Rev

Date: Sheet

onday, March 14, 2011

Date: Sheet

onday, March 14, 2011

Date: Sheet

5

4

3

2

onday, March 14, 2011

PROJECT :

KB/FAN/TP+FP

KB/FAN/TP+FP

KB/FAN/TP+FP

1

uter Inc.

uter Inc.

uter Inc.

p

p

p

ZQH

ZQH

ZQH

26 35M

26 35M

26 35M

1A

1A

1A

of

of

of

5

22 PBY160808T-250Y-N/3A/25ohm_6

22 PBY160808T-250Y-N/3A/25ohm_6

L

EC(

KBC)

3VPCU

+

108 2.2_6

108 2.2_6

R

R

1 2

D D

LK_PCI_775

C

R1

R1

06

06

*22_4

*22_4

C2

C2

28

28

*10p/50V_4

*10p/50V_4

C C

B B

L

30m

il

775AGND

3VPCU_EC

+

C573

C573
4

4

.7U/6.3V_6

.7U/6.3V_6

ICH_SUSCLK<8>

0.03A(30mils)

C593

C593

C538

C538

*

*

0.

0.

.1u/16V_4

.1u/16V_4

1u/10V_4_X7R

1u/10V_4_X7R

LP

C_LFRAME#<9,19>

C_LAD0<9,19>

LP

C_LAD1<9,19>

LP

C_LAD2<9,19>

LP

C_LAD3<9,19>

LP

C

LK_PCI_775<10>

CL

KRUN#<8>

O_A20GATE<11>

SI

S

IO_RCIN#<11>

SI

O_EXT_SCI#<11>

EC

_FPBACK#<16>

PL

TRST#<4,10,18,19,23>

U

SBON#<25>

Q_SERIRQ<9>

IR
O_EXT_SMI#<11>

SI

2

ND_MBDATA<10>

2

BT

_POWERON#<25>

R

R

390 *Short_4

390 *Short_4

R392 *20M_6R392 *20M_6

C550

C550
*

*

15p/50V_4

15p/50V_4

E7

75AGND

ND_MBCLK<10>

P

CH_ACIN<8>

C551

C551

MA

1 4

0.

0.

1u/10V_4_X7R

1u/10V_4_X7R

MX

0<26>

MX

1<26>
2<26>

MX

3<26>

MX

4<26>

MX
MX

5<26>

MX

6<26>

MX

7<26>
0<26>

MY

1<26>

MY

2<26>

MY

3<26>

MY
MY

4<26>

MY

5<26>

MY

6<26>
7<26>

MY
MY

8<26>
9<26>

MY

10<26>

MY
MY

11<26>

MY

12<26>

MY

13<26>
14<26>

MY
MY

15<26>
16<26>

MY

17<26>

MY

MB

CLK<28>

DATA<28>

MB

TP

CLK<26>

TP

DATA<26>

INON<31,32,34>

5

T55T5

Y4

Y4

*

*

32.768KHz

32.768KHz

C229

C229

*

*

.1u/16V_4

.1u/16V_4

LK_PCI_775

C

3 BAS316

3 BAS316

D

D

EC

_FPBACK#

T60T6

0

TRST#

PL

SBON#

U
IR

Q_SERIRQ

R398

R398
*33K/F_4

*33K/F_4

C552

C552
*

*

E

C225

C225

0

MX
MX

1

MX

2

MX

3

MX

4

MX

5
6

MX

7

MX
MY

0

MY

1

MY

2

MY

3
4

MY

5

MY

6

MY
MY

7

MY

8

MY

9

MY

10
11

MY

12

MY

13

MY

14

MY
MY

15

MY

16

MY

17

CLK

MB

DATA

MB
2

ND_MBCLK

2

ND_MBDATA

TP

CLK
DATA

TP

CH_ACIN

P

MA

INOND

E

775_32KX1

775_32KX2

E

15p/50V_4

15p/50V_4

0.

0.

1u/10V_4_X7R

1u/10V_4_X7R

NO

CIR#

4

A3VPCU

+

C227

C227

C226

C226

10u/

10u/

0.

0.

126
127
128

121
122

29

124

123
125

54
55
56
57
58
59
60
61

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

70
69
67
68

72
71
10
11
12
13

77

79

6.3V_6

6.3V_6

1u/10V_4_X7R

1u/10V_4_X7R

19

46

76

88

115

U1

U1

8

8

3

RAME

LF
LA

D0

LA

D1

LA

D2

1

LA

D3

2

LK

LC

8

GP
GP
KBR

SCI/GPIO54

EC

6

GP
GP

7

REST

L
GP
SER

9

GP

KBSI
KBSI
KBSI
KBSI
KBSI
KBSI
KBSI
KBSI

KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO
KBSO

PIO60/KBSOUT16

G

PIO57/KBSOUT17

G

GP
GP
GP
GP

GP
G

PIO35/PSDAT1

GP

PIO27PSDAT2

G
GP
G

PIO12/PSDAT3

GP

GP

NPCE781

NPCE781

102

CC1

CC2

CC3

CC4

CC5

V

V

V

V

V

IO11/CLKRUN
IO85/GA20

ST/GPIO86

IO24/LDRQ
IO10/LPCPD

IO67/PWUREQ

IRQ

IO65/SMI

N0
N1
N2
N3
N4
N5
N6
N7

UT0/JENK
UT1/TCK
UT2/TMS
UT3/TDI
UT4/JEN0
UT5/TDO
UT6/RDY
UT7
UT8
UT9/SDP_VIS
UT10/P80_CLK
UT11/P80_DAT
UT12/GPIO64
UT13/GPIO63
UT14/GPIO62
UT15/GPIO61/XOR_OUT

IO17/SCL1
IO22/SDA1
IO73/SCL2
IO74/SDA2

IO37/PSCLK1
IO26/PSCLK2
IO25/PSCLK3

IO00/32KCLKIN

IO02

5

21 PBY160808T-250Y-N/3A/25ohm_6

21 PBY160808T-250Y-N/3A/25ohm_6

L

L

C
AVC

ND1

ND2

G

G

18

E

775AGND

3

+3V

C571

C570

C570

7U/6.3V_6

7U/6.3V_6

4.

4.

E

W

AC
3G_S

H_

DDLED

O

SH

R

SMRST#_uR

PW

SAVE_LED#

P_

SPI

PI_SDO_uR_R

S

PI_CS0#_uR

S
S

PI_SCK_uR_R

E

CDB_CLOCK

V

CC_POR#

VR

C571

0.

0.

775AGND

L_SW

_OFF

W

PROCHOT_EC

BM_R

ROK_EC_uR

T53T5

_SDI_uR

EF_uR

1u/10V_4_X7R

1u/10V_4_X7R

C

C

595 10u/6.3V_8

595 10u/6.3V_8

605 0.01u/16V_4

605 0.01u/16V_4

C

C

N

BSWON#

T54T5

4
1

T51T5

3

HW

PG

R107 *Short_4R107 *Short_4

8

T58T5

T6T6
T7T7

T61T6

1

T52T5

2

T49T4

9

T48T4

8

T47T4

7
6

T46T4

0

T50T5

T45T4

5

T5T5

R9

R9

0 *Short_4

0 *Short_4

386 *Short_4

386 *Short_4

R

R

T59T5

9

97 22_4

97 22_4

R

R
R

R

102 22_4

102 22_4

3

T43T4
R415 47K/F_4R415 47K/F_4

MNT

IC

T

EMP_MBAT <28>
ML1ALERT# <10,11,26>

S

CMNT <28>

I

UFAN# <26>

CP

AC

IN <28>

D591# <16>

LI

SB# <8>

SU

BAT

LED0# <24>

BAT

LED1# <24>

RON <30>

V

AM

P_MUTE# <21>

C# <28>

D/

5_ON <29,34>

S

HDM
D

NBSWON# <8>

SU

SON <32>

FA

NSIG <26>

CO

NTRAST <16>
BEEP_EC <21>

PC

RLED# <24>

PW

I

CH_RSMRST# <8>

SU

SC# <8>
PW
R

F_EN <19>

_SDO_uR

SPI
S

PI_SCK_uR

3VPCU

+

A3VPCU

+

SM

BUS ARRANGEMENT TABLE

SM

Bus 1

Bus 2

SM

SM Bus 3

Bus 4

SM

2/17 add for throttling function

I_HPD_EC# <17>

ROK_EC <8>

Battery

PCH

GPU-I2C

N/A

2

5

5

D1

D1

BAS316

BAS316

4

D
VD

97

IO90/AD0

GP

98

GP

IO91/AD1

99

GP

IO92/AD2

A/

A/

D

D

D/A

D/A

LPC

LPC

GP

IO06/IOX_DOUT

GP

GP
GP

GP

GPIO

GPIO

G

PIO45/E_PWM

G

PIO46/CIRRXM/TRST

IO52/CIRTX2/RDY

GP

KB

KB

SMB

SMB

PS/2

PS/2

ND3

ND4

G

G

45

78

89

TIM

TIM

SPI

SPI

IR

IR

FIU

FIU

ND5

ND6

G

G

116

GP

IO20/TA2/IOX_DIN

ER

ER

PIO15/A_PWM

G

PIO21/B_PWM

G
GP
GP

GP

PO76/SPI_DO/SHBM

G

IO75/SPI_SCK

GP

G

PIO72/IRRX1/SIN2

GP

IO70/IRRX2_IRSL0

IO71/IRTX/SOUT2

GP

PIO87/CIRRXM/SIN_CR

G

PIO34/CIRRXL

G

G

G

PO83/SOUT_CR/XORTR

IO55/CLKOUT/IOX_DIN

GP

ND

ORF
VC

AG

44

103

CORF_uR
V

C539

C539
1u/6.3V_4

1u/6.3V_4

GP

IO93/AD3

GP

IO05
IO04

GP

GP

IO94/DA0

GP

I95/DA1

GP

I96/DA2

GP

IO01/TB2

GP

GP

IO03

GP

IO07

IO23/SCL3

GP

IO30/CIRTX2

PIO31/SDA3

G

IO32/D_PWM
IO33/H_PWM

GP

IO36

IO40/F_PWM

IO42/TCK

GP

IO43/TMS

GP

IO44/TDI

GP

GP

O47/SCL4

IO50/TDO

GP

IO51

GP

PIO53/SDA4

G

GP

IO81

GP

O82/TEST

GP

O84/TRIST

IO41

GP

GP

IO56/TA1

GP

IO14/TB1

IO13/C_PWM

IO66/G_PWM

IO77/SPI_DI

PIO16/CIRTX

F_

SDO

F_

F_
F_

CC_POR

V

VR

100
108
96

101
105
106
107

I97

64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112
80

31
117
63

32
118
62
81

84
83
82

75
73
74
113
14
114
111

86

SDI

87
90

CS0

92

SCK

30
85
104

EF

2

I/O ADDRESS SET

TING(KBC)

SHBM

=0: Enable shared memory with hos t BIOS

SH

SHBM

13 Comfirm by vendor mai l :

1/
Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BI O S and EC fi r mware

BM_R

SM BUS PU(KBC)

MB

CLK

MB

DATA

2

ND_MBCLK
ND_MBDATA

2

1

Q12

Q12
*

*

DMN601K-7

DMN601K-7

3

PROCHOT#<4,30>

H_

R/B

PW

SPI

FLASH(KBC)

R

R

S

PI_SDI_uR

R

R

96 *100K_4

96 *100K_4

7/24 modify

R

R

101 10K_4

101 10K_4

3VPCU

+

1/

13 Comfirm by vendor mai l :
If the Southbridge enables 'Long Wait Abort' by
default, the flash device should be 50MHz (or faster)

N

BSWON#

C3

C3

0.1U/10V/X5R_4

0.1U/10V/X5R_4

99 22_4

99 22_4

+

6

6

3VPCU

S
S
SPI
SPI

HWPG(KBC)

D

D

9 BAS316

HWPG_1.8V<34>
HWPG_1.05V<31>
HWPG_1.5V<32>
SYS_
HW

HWPG<29>

PG_GFX<33>

9 BAS316
7 BAS316

7 BAS316

D

D
D8 BAS316D8 BAS316
D6 BAS316D6 BAS316
D5 BAS316D5 BAS316

R

R

92 10K_4

92 10K_4

R

R

91 10K_4

91 10K_4

R

R

88 10K_4

88 10K_4
89 10K_4

89 10K_4

R

R

6

6

R2

R2
10K_4

10K_4

*1000P/16V/X7R_4

*1000P/16V/X7R_4

PI_SDI_uR_R
PI_SDO_uR

_SCK_uR
_CS0#_uR

1

R4

R4

05 10K_4

05 10K_4

3VPCU

+

+3V

1/10 change P/N & footprint

0

0

C5

C5

U1

U1

9

9

2

SO

5

SI

HO

6

K

SC

1

CE

W25X40BVSSIG

W25X40BVSSIG

+3V

R110

R110
10K_4

10K_4

1

1

CN2

CN2

1
2

SPEAKER-CONN

SPEAKER-CONN

8

D

VD

7

LD

3

WP

4

VSS

HW

R1

R1

09

09

*Short_4

*Short_4

1
2

+

3VPCU

PG

MPWROK <4>

C591

C591

0.

0.

1u/10V_4

1u/10V_4

CN19

Power sequence

+

+VCC_CORE

_PWRGOOD<4,11>

H

3V_S5

+3V

D

NBSWON#

SB#

SU

PWROK_EC

TRST#

PL

A A

N

BSWON#

5

CN19

12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930

*CON30_DEBUG

*CON30_DEBUG

4

S5_ON
I

CH_RSMRST#

SUSC#SUSON

HWPG

AINON <31,32,34>

M
VR

ON <30>

PO

WER-ON Switch(KBC)

NBSWON#

3

1

1

SW

SW

*DIP:TME-533B-Q-T/R

*DIP:TME-533B-Q-T/R

1
3

I

NTERNAL KEYBOARD STRIP SET(KBC)

ZQH

ZQH

ZQH

27

27

27

+3VPCU

1A

1A

1A

35Monday, March 14, 2011

35Monday, March 14, 2011

35Monday, March 14, 2011

of

of

of

2
4
5
6

2

MY0

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

S

S

S

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

W

W

W

PCE781 & FLASH

PCE781 & FLASH

PCE781 & FLASH

1

393 10K_4

393 10K_4

R

R

5

WWW.AliSaler.Com

PL2

PL2

I0805R800R-00_8

I0805R800R-00_8

H

PR15

PR15
100_4

100_4

MBC

MBD

H

H

H

3

3

LK <27>

ATA <27>

PL

PL

1

1

I0805R800R-00_8

I0805R800R-00_8

+3VPCU

PR7

PR7
100K_4

100K_4

PL4

PL4

I0805R800R-00_8

I0805R800R-00_8

H

H

PL3

PL3

I0805R800R-00_8

I0805R800R-00_8

H

H

TEMP

_MBAT

PR

PR
100K_4

100K_4

PJ1

PJ1

1
2
3

10

PJ2

PJ2

4

1
2
3
4
5
6
7
89

PR

PR

*SHORT_PAD_4

*SHORT_PAD_4

PU6

PU6
CM1293A-04SO

CM1293A-04SO

1

CH1

2

VN
CH23CH3

PC78

PC78

1u/50V_6

1u/50V_6

0.

0.

MBAT+

154

154

CH4

PR150

PR150
100_4

100_4

MBDATA

6
5

VP

MBCLKTEMP_MBAT

4

5

PC5

PC5

47p/50V_6

47p/50V_6

+3VPCU

2200p

2200p

PC79

PC79

PC3

PC3

0.1u/

0.1u/

PC2

PC2

100p/

100p/

PR151

PR151
100_4

100_4

/50V_6

/50V_6

50V_6

50V_6

50V_6

50V_6

ACIN<27>

12

PC4

PC4
47p/50V_6

47p/50V_6

WER_JACK

WER_JACK

PO

PO

D D

C C

B B

114F3-108A1-L_Batt_Conn

114F3-108A1-L_Batt_Conn

C

C

A A

Add ESD diode base on EC FAE suggestion

4

VA1

PC81

PC81

0.

0.

1u/50V_6

1u/50V_6

PD1

PD1
SW

SW

1010CPT

1010CPT

MBD

MBC

BAT-V

TEM

152

152

+3VPCU

4

ATA<27>

LK<27>

PR5

PR5

.9/F_6

.9/F_6

49

49

PR11

PR11

82.

82.

5K/F_4

5K/F_4

PR12

PR12
22K

22K

_MBAT <27>

P

/F_4

/F_4

PD6

PD6

SBR10

SBR10

45SP5-13

45SP5-13

1
2

PC15

PC15

1u/16V_6

1u/16V_6

*

*

DCIN

DCIN

88731AC

3

+3VPCU

PC12

PC12

1u/50V_6

1u/50V_6

0.

0.

SET88731ACSET88731ACSET88731ACSET

PC16

PC16

01u/50V_6

01u/50V_6

0.

0.

VA2VA2VA2VA2

VA2VA2VA

PC82

PC82

0.

0.

1u/50V_6

20A

20A

PC9

PC9

50V_6

50V_6

0.01u/50V_6

0.01u/50V_6

1u/50V_6

CSIN

CSIP

11

9

10

13

22

2

3

4

5

6

PR10

PR10

21K/F_4

21K/F_4

2.

2.

PC13

PC13

0.

0.

01u/50V_6

01u/50V_6

_1

_1

1

NC

VDDSM

SDA

SCL

ACOK

DCIN

ACIN

VREF

ICO

NC

VCOM

PR9

PR9
10/F_4

10/F_4

MP

PD5

PD5
SMAJ

SMAJ

2 1

0.1u/

0.1u/

PC17

PC17
*

*

GND33GND32GND31GND

B

P

30

7

PR14

PR14
220K_4

220K_4

PR14

PR14
220K_4

220K_4

0.

0.

CSIP

28

NC

PC14

PC14

1u/50V_6

1u/50V_6

CSSP

3

7

7

8

8

PU1

PU1

S

S

L88731C

L88731C

I

I

8

3

ICM

ICM

1 6
2
3

PQ2

PQ2

8

8

IMD2AT108

IMD2AT108

PR8

PR8
10/F

10/F

_4

_4

CSIN

27

26

VCC

CSSN

NC

14

NT

7

7

PQ2

PQ2
FDD6685_G

FDD6685_G

43

1 2

1

PR14

PR14

6

6

0_4

0_4

5
4

PC11

PC11

1u/

1u/

16V_6

16V_6

PR15

PR15

9

9

4.7_6

4.7_6

L88731_VDDP

IS

21

PR6

PR6

VDDP

2.7_6

2.7_6

88731B_2

IS

L88731_UGATE

L88731_PHASE

IS

L88731_LGATEISL88731_LGATEISL88731_LGATEISL88731_LGATE

IS

CSOP

CSON

PR4

PR4
*S

*S

HORT0402

HORT0402

PC8

PC8

0.1u/

0.1u/

88731B_1

PR3

PR3
10/F

10/F

50V_6

50V_6

PR1

PR1
10/F

10/F

_4

_4

_4

_4

B

OOT

UGATE

PHASE

LGA

PGND

CSOP

CSON

GND
GND

12

VBF

25

24

23

20

TE

19

18

17

16

NC

15
29

ISL88731 thermal pad
tie to Pin12

ICM

NT <27>

5

5

PR14

PR14

0.01_0612

0.01_0612

PC7

PC7
1u/

1u/

16V

16V

PD7

PD7
*R

*R

B500V-40

B500V-40
PC10

PC10

1u/50V_8

1u/50V_8

0.

0.

_6

_6

CSOP

PR2

PR2
100_4

100_4

BAT-V

2

VIN

PC6

D/C#

155

155

PC6

0.1u/

0.1u/

50V_6

50V_6

<27>

VIN

PC84

PC84

10u/

10u/

25V_1206

25V_1206

PL5

PL5

8uH

8uH

6.

6.

_1

CSOP
BAT-V

Siz

Siz

Siz

e Document Number Rev

e Document Number Rev

e Document Number Rev

Charger(IS

Charger(IS

Charger(IS

Date: Sheet

Date: Sheet

Date: Sheet

PC1

PC1

2200p/

2200p/

PR15

PR15

8

8

0.01_0612

0.01_0612

1 2

L88731A)

L88731A)

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

L88731A)

PR

PR

144

144

0_4

0_4

CSIN

_1
_1

CSIP

PR

PR

149

149

0_4

0_4

52

PC83

PC83

2200p

2200p

/50V_6

4

3

4

3

_1

BAT-

2

/50V_6

PQ3

PQ3

1

1

AON7410

AON7410

1

52

PR

PR
*4.7_6

*4.7_6

0

0

PQ3

PQ3
AON7410

AON7410

1

V

PC88

PC88
*

*

680p/50V_6

680p/50V_6

1

PR

PR

156

156

33K/F_4

33K/F_4

50V_6

50V_6

2

PQ3

PQ3

2

2

DMN601K-7

DMN601K-7

PC87

/50V_6

/50V_6

PC87

10u/

10u/

25V_1206

25V_1206

ZQH

ZQH

ZQH

1

PC85

PC85

2200p

2200p

Quanta Comp

Quanta Comp

Quanta Comp

PROJECT :

PROJECT :

PROJECT :

PQ2

PQ2

9

9

FDD6685_G

FDD6685_G

43

1

PR15

PR15

7

7

10K_4

10K_4

3

1

uter Inc.

uter Inc.

uter Inc.

28 35M

28 35M

28 35M

10u/

10u/

of

of

of

BAT-V

BAT-V

PC86

PC86

25V_1206

25V_1206

1A

1A

1A

5

4

3

2

1

MAIN

D

AIND <32,34>

M

SY

S_SHDN#

S_SHDN# <4,34>

SY

Ven=7.23V

SY

S_HWPG<27>

N

D D

VI

12

+

+

PC63

PC63
2200p/50V_6

2200p/50V_6

PR245

PR245
0_4

0_4

52

+

5VPCU

100u

100u

PC173

PC173

/25V_6X5.8

/25V_6X5.8

PC170

PC170

4.7u

4.7u

/25V_8

/25V_8

5 Volt +/- 5%
TDC : 5A
PEAK : 6.5A

+5VPCU

C C

B B

OCP : 8A
Width : 200mil

PR125

PR125

15.4K/F_4

PC177

PC177

0.1u

0.1u

/50V_6

/50V_6

15.4K/F_4

PR117

PR117
10K/F_4

10K/F_4

+

+

PC174

PC174

330u

330u

/6.3V_6X5.7

/6.3V_6X5.7

OCP:

8A

ripple current)

L(
=(9-5)*5/(2.2u*0.4M*9)
=2.525A

I

ocp=8-(2.525/2)=6.74A
Vth=6.74A*14mOhm=94.32mV
R(Ilim)=(94.32mV*10)/10uA
~94.32K

PL13

PL13

2.2u

2.2u

H

H

PR97

PR97
*4.7_6

*4.7_6

PC58

PC58
*680p/50V_6

*680p/50V_6

+15V

PC187

PC187

0.1u

0.1u

/50V_6

/50V_6

PR256

PR256
22_8

22_8

PQ13

PQ13

A

A

ON7410

ON7410

PQ11

PQ11

A

A

ON7702

ON7702

+15V_A

LWP

1

52

1

PD9

PD9
CHN217

CHN217

PD10

PD10
CHN217

CHN217

3

3

2

1

2

1

PC189

PC189

0.1u

0.1u

4

4

/50V_6

/50V_6

PC66

PC66

0.1u

0.1u

/50V_6

/50V_6

PC186

PC186

0.1u

0.1u

/50V_6

/50V_6

3

3

+3VPCU

PR244

PR244
*100K/F_4

*100K/F_4

PC188

PC188

0.1u

0.1u

PR107

PR107
1/F_6

1/F_6

/50V_6

/50V_6

VI

N

PR239

PR239
665K/F_4

665K/F_4

8223_EN

PR249

PR249
100K/F_4

100K/F_4

SY

S_SHDN#

+5V_FB

PC181

PC181

0.1u

0.1u

PR246

PR246
330K/F_4

330K/F_4

+3V_PG
+5V_DH

+5V_B
+5V_LX
+5V_DL

1 2

PR252

PR252
*0_6

*0_6

PR254

PR254
0_6

0_6

/25V_4

/25V_4

13
23
21
22
20
19
24

2

PR248

PR248
0_4

0_4

PC185

PC185

0.1u

0.1u

N

EN
PGOOD
UGATE1
BOOT1
PHASE1
LGATE1
VOUT1
FB1

/10V_4

/10V_4

+5V_DL

+3V_DL

PR240

PR240
10_8

10_8

8223_VIN

16

VIN

ENC

18

PR250

PR250

97.6K/F_4

97.6K/F_4

8223_EN

8

VREG3

ENTRIP1

1

PU5

PU5

8223M

8223M

RT

RT

PR251

PR251

71.5K/F_4

71.5K/F_4

4.7u/6.3V_6

4.7u/6.3V_6

PC184

PC184

17

VREG5

ENTRIP2

6

VL

25

4.7u/6.3V_6

4.7u/6.3V_6

PC182

PC182

SKI
TONSEL
UGATE2

PHASE2
LGATE2

GND

15

3

REF

PSEL

BOOT2

OUT2

FB2

GND

8223REF +3VPCUVI

N

VI

PR241

/6.3V_4

/6.3V_4

PR247

PR247
0_4

0_4

+3V_SKI
+3V_T

+3V_DH
+3V_B
+3V_LX
+3V_DL

+3V_FB

PR253

PR253

PR255

PR255

PR241
*0_4

*0_4

PR243

PR243

PR242

PR242

0_4

0_4

*0_4

*0_4

P

ON

PR106

PR106
1/F_6

1/F_6

0_6

0_6

0_6

0_6

0.1u

0.1u

PC65

PC65

AO

AO

/50V_6

/50V_6

PQ12

PQ12

N7702

N7702

52

PQ14

PQ14

N7410

N7410

AO

4

4

AO

3

1

52

3

1

OCP:

6A

L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)
~1.9A

cp=6-(1.9/2)=5.05A

Io
Vth=5.05A*14mOhm=70.7mV
R(Ilim)=(70.7mV*10)/10uA
=70.7K

PL14

PL14

2.2u

2.2u

PR98

PR98
*4.7_6

*4.7_6

PC59

PC59
*680p/50V_6

*680p/50V_6

PC165

PC165
2200p/50V_6

2200p/50V_6

H

H

PC171

PC171

4.7u

4.7u

/25V_8

/25V_8

+3VPCU
3 Volt +/- 5%
TDC : 3.7A
PEAK : 5A
OCP : 6A
Width : 120mil

PR126

PR126

6.81K/F_4

6.81K/F_4

PR131

PR131
10K/F_4

10K/F_4

PC178

PC178

0.1u

0.1u

/50V_6

/50V_6

+3VPCU

+

+

PC175

PC175
330u

330u

/6.3V_6X5.7

/6.3V_6X5.7

PC183

PC183
1u

1u

14
4
10
9
11
12
7
5

N

PR140

PR140

_6

_6

1M

1M

A A

S5_ON<27,34>

2

PQ16

PQ16

DTC144EU

DTC144EU

PR141

1 3

5

PR141
1M

1M

_6

_6

PR138

PR138
22_8

22_8

3

2

1

PQ17

PQ17
DM

DM

N601K-7

N601K-7

+5V_S5+3V_S5

PR139

PR139
22_8

22_8

3

2

PQ18

PQ18
DM

DM

1

N601K-7

N601K-7

+15VVI

2

N

VI

PR142

PR142

PR143

PR143

_6

_6

1M

1M

3

PQ19

PQ19

1

N601K-7

N601K-7

DM

DM

_6

_6

*1M

PC75

PC75
*2.2n

*2.2n

*1M

578

S5D MAIN

PQ15

PQ15

O4468

O4468

A

A

3 6

241

+5V_S5

/50V_4

/50V_4

+5V_S5
TDC : 2.85A
PEAK : 3.8A
Width : 120mil

4

+5VPCU

578

D

PQ56

PQ56

O4468

O4468

A

A

3 6

241

+5V

+5V
TDC : 2.17A
PEAK : 2.9A
Width : 90mil

3

MAIN

+3VPCU

578

D

PQ58

PQ58

O4468

O4468

A

A

3 6

241

+3V

+3V
TDC : 2.66A
PEAK : 3.6A
Width : 120mil

S5D

+3VPCU+5VPCU

3

2

PQ57

PQ57
A

A

O3404

O3404

1

2

+3V_S5
TDC : 0.23
PEAK : 0.3A
Width : 20mil

+3V_S5

Quanta Computer

Quanta Computer

Quanta Computer

PROJECT :

PROJECT :

Si

ze Document Number Rev

Size Document Number Rev

Size Document Number Rev

SYSTEM 5V/3V (

SYSTEM 5V/3V (

SYSTEM 5V/3V (

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

RT8206)

RT8206)

RT8206)

ZQH

ZQH

ZQH

29

29

29

1

of

of

of

Inc.

Inc.

Inc.

35Monday, March 14, 2011

35Monday, March 14, 2011

35Monday, March 14, 2011

1A

1A

1A

5

WWW.AliSaler.Com

4

3

2

1

VID 1.2875V

H_VI

199 *0_4

199 *0_4

PR

+3V

PCU

PCU

+3V

D D

H_PR

OCHOT#<4,27>

C C

VRO

B B

A A

PR

PR

PR

PR

PR

PR

PR

PR

PR

PR

PR

PR

PR

Panasonic
ERT-J0EV474J

N<27>

6

6

PR3

PR3
100K/F_4

100K/F_4

1 2

200 *0_4

200 *0_4

198 *0_4

198 *0_4

197 *0_4

197 *0_4

196 *0_4

196 *0_4

195 *0_4

195 *0_4

193 *0_4

193 *0_4

+1.

05V

PR5

PR5
*499/F_4

*499/F_4

3

PQ9

PQ9
*DMN601K

*DMN601K

This NTC Close to Phase 1 Inductor

1

H_DPRS

VR

_PWRGD_CK505#<3>

5

D0

D1

H_VI

H_VI

D2

H_VI

D3

D4

H_VI

H_VI

D5

D6

H_VI

PR

PR

236 *SHORT_PAD_4

236 *SHORT_PAD_4

PR2

PR2

03

03

*SHORT_PAD_8

*SHORT_PAD_8

0

0

H_

PSI#<6>

-7

-7

2

191

191

PR

PR

*220K_6 NTC

*220K_6 NTC

PC1

PC1

29

29

1 2

*0.01u/16V_4

*0.01u/16V_4

H_VI

D0<6>

H_VI

D1<6>
D2<6>

H_VI
H_VI

D3<6>

H_VI

D4<6>

H_VI

D5<6>

H_VI

D6<6>

LPVR<6>

+3V

PC27

PC27

150p/50V_4

150p/50V_4

PR46

PR46

1.65K/F_4

1.65K/F_4

PR206

PR206
*27.4_4

*27.4_4

PR42

PR42
0_4

0_4

PR41

PR41
0_4

0_4
PR40

PR40
*27.4_4

*27.4_4

PR

PR

37 0_4

37 0_4

PR

PR

32 499/F_4

32 499/F_4

PR

PR

PC28

PC28
150p/50V_4

150p/50V_4

3212_FBRTN

I_MON<6>

2/16 change for leakage

+5V

PR3

PR3

4

4

10_6

10_6

PC2

PC2

3

3

2.2u/6.3V_6

2.2u/6.3V_6

PR3

PR3

1

1

0_4

0_4

PR2

PR2

07

07

7.32K/F_4

7.32K/F_4

PR

PR

+5V

_S5

ID0

CPU_V
CPU_V

ID1
ID2

CPU_V
CPU_V

ID3

CPU_V

ID4
ID5

CPU_V
CPU_V

ID6

43 1.91K/F_4

43 1.91K/F_4

12

PR45

PR45

39.2K/F_4

39.2K/F_4

PC127 1000p/50V_4PC127 1000p/50V_4

PR204

PR204

4.99K/F_4

4.99K/F_4

1 2

PC126

PC126

0.082u/16V_4

0.082u/16V_4

VSSSENSE <6>

VCCSENSE <6>

+VCC_CORE

_S5

3212_VCC

_1

PSI#

+5V

_S5

47 5.1K/F_4

47 5.1K/F_4

ON

VR_

DPRS

LPVR_R

3212_FB

PC26

PC26
12p/50V_4

12p/50V_4

3212_COMP

+1.05V

Connect to input caps

5

5

PR5

PR5
1K/F_4

1K/F_4

PC1

PC1
1000p/50V_4

1000p/50V_4

PR5

PR5

2

2

649K/F_4

649K/F_4

P

3212_RAM

16

37

P

VCC

RAM

12

D

AGN

49

AGN

D

41

PSI#

10

TT

VR_

11

S

PR202

PR202
*0_4

*0_4

8

9
48
47
46
45
44
43
42

1
40

4

22
23
24

6

7

5

3

PR210

PR210

80.6K/F_4

80.6K/F_4

TTSN
TRD

VARF
VID
VID
VID
VID
VID
VID
VID
EN
DPRS
CL

OD3
PWM3
SWFB3

FB

COMP

FBRTN

IMON

ET#

0
1
2
3
4
5
6

K_EN#

#

IREF

13

R

LPVR

PR209

PR209

69.8K/F_4

69.8K/F_4

4

PU2

PU2

DP3212

DP3212

A

A

RPM

RT

14

15

PR208

PR208
162K/F_4

162K/F_4

DE

LAY_VR_PWRGOOD <4,8>

12

PC1

PC1

0.1u/50V_6

0.1u/50V_6

8

8

6

6

4

18

18

4

12

PC1

PC1

4.7u/25V_8

4.7u/25V_8

5

213

5

213

21

21

PC

PC

4.7u/25V_8

4.7u/25V_8

PR3

PR3
*2.2/F_6

*2.2/F_6

PC2

PC2
*1000p/50V_6

*1000p/50V_6

+

+

PQ4

PQ4

1

1

5

AOL1448

AOL1448

2/16 change for leakage

+3V

+5V

_S5

30

30

PR3

PR3

9

9

1.91K/F_4

1.91K/F_4

2

39

38

0

D
G

PH

PH1

PWR

3212_DH1

35

DRVH1

3212_BO

OT1

36

BST1

SW1

DRVL1

PVC

DRVH2
BOOT

SW2

DRVL2

PGN

SWF

SWFB1

CSSUM

CSCOMP

LLINE

ILIM

F

CSRE

18

3212_CSREF CSREF

PC131

PC131
1u/6.3V_4

1u/6.3V_4

34

31

32

C

26
25

2

27

29

30

D

28

B2

33

19

20
17

21

38 2.2_6

38 2.2_6

PR

PR

PC2

PC2

0.22u/25V_6

0.22u/25V_6

3212_SW

1

3212_DL1

9

9

PC2

PC2

1 2

4.7u/6.3V_6

4.7u/6.3V_6

OT2

3212_BO

48 100/F_4

48 100/F_4

PR

PR

PR44 100/F_4PR44 100/F_4

PC34

PC34
1000p/50V_4

1000p/50V_4

12

PC33

PC33
1000p/50V_4

1000p/50V_4

3212_CSCOMP

3212_ILIM

PR53

PR53
0_4

0_4

5

5

+5V

PR4

PR4

9

9

2.2_6

2.2_6

PR57

PR57

73.2K/F_4

73.2K/F_4

PR51

PR51

1.69K/F_4

1.69K/F_4

_S5

0.22u/25V_6

0.22u/25V_6

4

3

3

PQ4

PQ4
AOL1718

AOL1718

4

3212_DH2

1

1

PC3

PC3

3212_SW

3212_DL2

3212_CS_P

H2

3212_CS_PH1

3212_CSSUM

PR58

PR58
165K/F_4

165K/F_4

PR190

PR190
220K_6 NTC

220K_6 NTC

Close to Phase 1 Inductor

Peak :40A ; OCP:53A (1.69K/F_4)

PC1

PC1

79

79

100u/25V_6X5.8

100u/25V_6X5.8

213

5

213

PQ4

PQ4
AOL1448

AOL1448

2

PQ4

PQ4
AOL1718

AOL1718

PR61

PR61
150K/F_6

150K/F_6
PR56

PR56
150K/F_6

150K/F_6

Short the net trace

12

120

120

5

5

4

4

12

PC

PC

135

135

0.1u/50V_6

0.1u/50V_6

12

PC

PC

122

122

4.7u/25V_8

4.7u/25V_8

PC

PC

4.7u/25V_8

4.7u/25V_8

100u/25V_6X5.8

100u/25V_6X5.8

12

133

133

+

+

PC1

PC1

24

24

PC1

PC1

4.7u/25V_8

4.7u/25V_8

PR5

PR5
*2.2/F_6

*2.2/F_6

PC3

PC3
*1000p/50V_6

*1000p/50V_6

VIN

PL8

PL8

36uH

36uH

0.

0.

1 2

3

4

12

0.1u/50V_6

0.1u/50V_6

PR3

0

0

12

32

32

PL9

PL9

0.

0.

36uH

36uH

1 2

3

PR5

PR5

9

9

0_6

0_6

PR3

3

3

10/F_6

10/F_6

+

+

PC

PC

137

137

100u/25V_6X5.8

100u/25V_6X5.8

4

PR6

PR6

0

0

10/F_6

10/F_6

VIN

12

0.1u/50V_6

0.1u/50V_6

PR3

PR3
0_6

0_6

12

PC1

PC1

34

34

4.7u/25V_8

4.7u/25V_8

4

4

2

2

Peak :48A ; OCP:55A (1.74K/F_4)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

+VCC_CORE
Countinue current:36A
Peak current:48A
OCP minimum 55A
Loadline=1.9mV/A (IMVP 6.5)
Rilm=1.69K

+VCC_CO

RE

+

+

+

+

PC

PC

136

136

PC

PC

123

123

*330u/2V_7343

*330u/2V_7343

1/12 stuff

+

+

PC

PC

117

117

PC3

PC3

0

0

330u/2V_7343

330u/2V_7343

1/12 unstuff

CC_CORE ADP3212

CC_CORE ADP3212

CC_CORE ADP3212

+V

+V

+V

PC2

PC2

2

2

330u/2V_7343

330u/2V_7343

+VCC_CO

RE

+

+

PC1

PC1

28

28

*330u/2V_7343

*330u/2V_7343

Quan

Quan

Quan

ta Computer Inc.

ta Computer Inc.

ta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZQH

ZQH

ZQH

1A

1A

30 35Monday, March 14, 2011

30 35Monday, March 14, 2011

30 35Monday, March 14, 2011

1A

5

4

3

2

1

[PWM]

5V_S5

PR

PR
0_6

0_6

PC

PC
1u/16V_6

1u/16V_6

R1

+

95

95

55

55

2

2

PD

PD
RB500V-40

RB500V-40

PC

PC

54

54

0.1u/50V_6

0.1u/50V_6

GATE-1.05V

U
PH

LG

PR

PR

75

75

4.02K/F_4

4.02K/F_4

PC

PC

4.7u/6.3V_6

4.7u/6.3V_6

ASE-1.05V

PR

PR

94

94

3.4K/F_4

3.4K/F_4

ATE-1.05V

56

56

PC

PC

41

41

*33p/50V_6

*33p/50V_6

55

55

PQ

PQ
AOL1448

AOL1448

4

4

PQ

PQ

54

54

AOL1718

AOL1718

5

213

5

213

C164

C164

P

P

2.2n/50V_4

2.2n/50V_4

PR

PR

2.2_6

2.2_6

PC

PC
2200p/50V_6

2200p/50V_6

4.7u/25V_8

4.7u/25V_8

86

86

47

47

PC

PC

PL

PL
1uH

1uH

+

+

+

+

C163

C163

57

57

P

P
*4.7u/25V_8

*4.7u/25V_8

P

P

C168

C168

100u/25V_6X5.8

100u/25V_6X5.8

12

12

+

+

P

P

C153

C153

560u/2.5V

560u/2.5V

180

180

PC

PC
100u/25V_6X5.8

100u/25V_6X5.8

+

+

P

P

C144

C144

*560u/2.5V

*560u/2.5V

D D

PR

PR

71

71

10_6

10_6

PR

PR

79

79

1M/F_4

1M/F_4

PU

PU

4

91

91

PR

PR
0_4

PR

PR

74

74

*10K/F_4

*10K/F_4

+3V

0_4

PC

PC

48

48

*0.1u/50V_6

*0.1u/50V_6

PC

PC

42

42

1u/16V_6

1u/16V_6

PC

PC

46

46

*1000p/50V_6

*1000p/50V_6

INON<27,32,34>

MA

C C

HW

PG_1.05V<27>

B B

4

G5602

G5602

15

/DEM

EN

16

TON

1

UT

VO

2

VD

D

3

FB

4

PGOOD

6

GN

D

5

NC

14

NC

1.05V

_FB

OOT

B

UG

ATE

ASE

PH

V

DDP

LGATE

PG

PAD

T

96

96

PR

PR

2.2/F_6

2.2/F_6

13
12
11
10

OC

9
8
7

ND

17

+1.05V

N

VI

1.05 V
TDC : 11A
PEAK : 15A
OCP : 18A
Width : 1320mil

PC

PC

145

145

0.1u/50V_6

0.1u/50V_6

olt +/- 5%

+1.05V

PR

PR

73

73

10K/F_4

10K/F_4

R2

P

P

R237 0_6

TON=3.85p*RTON*Vout/(Vin-0.5)

Frequency=Vout/(Vin*TON)

AO1718 Rdson=3~4.3mOhm

L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)

R237 0_6

P

P

R222 0_6

R222 0_6

~3.647A

A A

TON=3.85p*1M*1/(Vin-0.5)

Frequency=1/(0.0036767)=272K

5

RILIM=4.3mohm*18-1.823/20uA=3.477Kohm
I(choke)peak=21.647A

4

3

Qua

Qua

Qua

nta Computer Inc.

nta Computer Inc.

nta Computer Inc.

ZQH

ZQH

1

ZQH

1A

1A

1A

of

of

of

35Monday, March 14, 2011

35Monday, March 14, 2011

31

31

31

35Monday, March 14, 2011

PROJECT :

PROJECT :

S

S

S

ize Document Number Rev

ize Document Number Rev

ize Document Number Rev

+VTT (G

+VTT (G

+VTT (G

Date: Sheet

Date: Sheet

2

Date: Sheet

PROJECT :

5602R41U)

5602R41U)

5602R41U)

[PWM]

WWW.AliSaler.Com

5

4

3

2

1

D D

.75V_DDR_VTT

+0

C

2

2

033u/50V_6

033u/50V_6

C

166

166

P

P
10u/6.3V_8

10u/6.3V_8

5VSUS

+1.

+5V_

S5

*33p/50V_6

*33p/50V_6

PC

PC

6

6

7

7

PC1

+S

MDDR_VREF

0.15A

PR

PR

238 0_6

238 0_6

PR

PR

101 0_6

101 0_6

PC1
10u/6.3V_8

10u/6.3V_8

PC6

PC6

0.

0.

25A

2.

C C

B B

1

VTTGN

2

VTTSNS

3

GND

4

MOD

5

VTTREF

6

COM

FOR DDR III

172

172

C

C

162

162

P

P
10u/6.3V_8

10u/6.3V_8

25

24

VTT

GND

D

E

P

NC7VDDQSNS8VDDQ

PR

PR

226

226

10K/F_4

10K/F_4

8207A_S

227

227

PR

PR

10K/F_4

10K/F_4

PC16

18

17

16

15

14

13

225

225

PR

PR
620K/F_4

620K/F_4

S5

PC16

1

1

0.1u/50V_6

0.1u/50V_6

8207A_D
8207A_LX
8207A_D

PR9

PR9

9

9

15K/F_4

15K/F_4

7.

7.

0

0

PR10

PR10

5.1/F_6

5.1/F_6

PC6

PC6

1

1

10V_4

10V_4

1u/

1u/

2

2

PR10

PR10
100K/F_4

100K/F_4

(For RT8207A 400KHZ ) close to pc2008

VIN

SUSON

MA

INON <27,31,34>

<27>

+3V

HW

PG_1.5V <27>

PC6

PC6
1u/

1u/

H

L

+5V_

0

0

10V_4

10V_4

VIN

5

4

213

5

S5

4

213

PQ

PQ

3

3

5

5

AOL1448

AOL1448

1

1

PQ5

PQ5
AOL1718

AOL1718

PC15

PC15

9

9

2200p/50V_6

2200p/50V_6

PR84

PR84
*4

*4

PC4

PC4
*6

*6

.7_6

.7_6

80p/50V_6

80p/50V_6

PC49

PC49

4.

4.

7u/25V_8

7u/25V_8

1

1

PL1

PL1
1uH

1uH

5

5

PC15

PC15

560u/2.5V

560u/2.5V

PC15

PC15

4.7u/25V_8

4.7u/25V_8

+

+

0

0

8

8

+

+

PC16

PC16

0

0

100u/25V_6X5.8

100u/25V_6X5.8

+1.

5VSUS

+1.

5V_SUS
1 Volt +/- 5%
TDC : 12A
PEAK : 16A
OCP : 18A
Width : 480mil

PR22

PR22

3

3

0_6

20

19

LL

DRVH

CS_G

S310S511NC

12

S5_1.

8V

8V

S3_1.

8

8

PR22

PR22
*0_4

*0_4

0_6

DRVL

PGND

V5I

V5FI

PGOOD

ND

CS

N

LT

+5V_

82

07A_VBST

22

23

21

DOIN

VBST

VL

PU1

PU1

1

1

T8207L

T8207L

R

R

SET

9

Vout = (PR150/PR149) X 0.75 + 0.75

ET

S5_1.

8V

PR

PR
*0_4

*0_4

S3_1.

8V

224

224

+1.

5VSUS

AO1718 Rdson=3.8~4.3mOhm

L(ripple current)
=(19-1.5)*1.5/(1u*400k*19)
~3.454A

Vtrip= (18-3.454/2)*4.3mohm=0.0699V
RILIM=Vtrip/10u=6.997K

578

MAI

MAI

ND<29,34>

A A

5

4

ND

PQ59

PQ59
AO4468

AO4468

3 6

241

+1.5

V

2.03A

S0

S3

S4/S5

3

2

S3 S5

11

10

00

Siz

Siz

Siz

e Document Number Rev

e Document Number Rev

e Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

ON ON

ON ON

OFF

DDR 1.

DDR 1.

DDR 1.

5V

5V

5V

onday, March 14, 2011

onday, March 14, 2011

onday, March 14, 2011

Quanta Computer

Quanta Computer

Quanta Computer

PROJECT :

PROJECT :

PROJECT :

(RT8207A)

(RT8207A)

(RT8207A)

1

ZQH

ZQH

ZQH

VTTREF+1.5VSUS

ON

OFF

OFFOFF

Inc.

Inc.

Inc.

1A

1A

32 35M

32 35M

32 35M

1A

of

of

of

62881_GN

PR

PR

820K/F_4

820K/F_4

A

92

92

[PWM]

62881_GN

HW

PG_GFX<27>

D

100P/50V_4

100P/50V_4

PR

PR

93

93

17.8K/F_4

17.8K/F_4

*150K/F_4

*150K/F_4

PC

PC

D

PR

PR

51

51

PR

PR

221

221

0_6

0_6

62881_GN

218

218

PC

PC

150p/50V_4

150p/50V_4

GF
GF
GF
GF
GF
GF
GF

PR

PR

90

90

0_4

0_4

PR

PR

D

PR

PR

PC

PC

50

50

22p/50V_4

22p/50V_4

52

52

330p/50V_4

330p/50V_4

62881_GN

Int_VGA

1 1

2 2

3 3

B

X_VID0<6>
X_VID1<6>
X_VID2<6>
X_VID3<6>
X_VID4<6>
X_VID5<6>
X_VID6<6>

GF

X_ON<6>

GF

X_DPRSLPVR<6 >

219 47K/F_4

219 47K/F_4

87 8.06K/F_4

87 8.06K/F_4

PC

PC

53

53

1000p/50V_4

1000p/50V_4

PR

PR

8.87K/F_4

8.87K/F_4

Rdroop

PC

PC

PC

PC

330p/50V_4

330p/50V_4

156

156

PC

PC

D

1000p/50V_4

1000p/50V_4

62881_GN

C

149

149

PC

PC

*0.01u/25V_4

*0.01u/25V_4

62881R

PR

PR

PR

PR

PR

PR

1
2

3

4

5

6

7

12

215 100K_4

215 100K_4

217 0_4

217 0_4

81 0_4

81 0_4

D

62881_GN

29

30

31

D

D

D

GN

GN

GN

LK_EN#

C

GOOD

P

RB

IAS

VW

CO

MP

FB

VSEN

N
RT

8

TN

_ON

PRSLPVR

62881D

62881VR

28

27

_ON
VR

RSLPVR
DP

PU

PU

ISL62881HRTZ-T

ISL62881HRTZ-T

UM-

UM+

IS

IS

9

10

SUM-

SUM+

62881I

62881I

X_VID6
GF

26

3

3

D6
VI

D
VD

11

D

62881VD

X_VID5
GF

25

D5
VI

PC152

PC152
1u/6.3V_4

1u/6.3V_4

62881_GN

X_VID4GFX_VID3
GF

N
VI

12

N

62881VI

24

D4
VI

PR

PR

214

214

148

148

PC

PC

0.22u/25V_6

0.22u/25V_6

62881_GN

PR

PR

212

212

10_6

10_6

D

23

D3
VI

ON
IM

13

GF

X_IMON

77

77

PR

PR
*10K/F_4

*10K/F_4

*SHORT_PAD_4

*SHORT_PAD_4

D

+

X_VID2
GF

22

D2
VI

PH

UG

OOT
B

14

62881BOOT

5V_S5

21

D1

VI

20

VI

D0

19

V

CCP

62881LGAT

18

ATE

LG

17

VSSP

62881PH

16

ASE

62881U

15

ATE

1 2

D

62881_GN

+3

V

PR

PR

89

89

*100K_4

*100K_4

62881PGOOD

BIAS

62881R

62881VW

62881C

OMP

B

62881F

88

88

62881VSEN

157

157

155

155

D

GFX_VID1

1 2

44

44

PC

PC
*0.22u/10V_4

*0.22u/10V_4

N

VI

GATE

D

PR

PR

78

78

*0_4

*0_4

X_VID6

GF

X_VID0

5V_S5

+

GF

PC

PC

37

37

1 2

4.7u/6.3V_6

4.7u/6.3V_6

E

ASE

38

63

63

PR

PR
1_6

1_6

38

PC

PC

0.22u/25V_6

0.22u/25V_6

X_IMON <6>

GF

VSS_AXG_SEN

SE <6>

X_VID5

GF

PQ49

PQ49
AOL1718

AOL1718

E

+1

.05V

PR

X_VID4

PQ50

PQ50
AOL1448

AOL1448

PR

70

70

*0_4

*0_4

X_VID3

GF

12

0.1u/50V_6

0.1u/50V_6

PR

PR

*2.2/F_4

*2.2/F_4

*2.2n/50V_4

*2.2n/50V_4

PR

PR
*0_4

*0_4

PC

PC

139

139

62

62

35

35

PC

PC

PR

PR

76

76

*0_4

*0_4

GF

5

4

213

5

4

213

F

PR

X_VID1

PL10

PL10

0.

0.

PR

PR

PC

PC

PC147

PC147

56uH

56uH

3

68

68

40

40

12

PC

PC

140

140

4.7u/25V_8

4.7u/25V_8

4

PR

PR

211

211

10K_6_NTC

10K_6_NTC

PR

65

65

*0_4

*0_4

X_VID0

GF

Close to Phase
Inductor

62881_GND

PR

PR

67

12

PC

PC

4.7u/25V_8

4.7u/25V_8

138

138

2.61K/F_4

2.61K/F_4

67

*0_4

*0_4

PR

PR

213

213

3.65K/F_4

3.65K/F_4

PR

PR

66

66

0.15U/10V_4

0.15U/10V_4

*0.1u/10V_4

*0.1u/10V_4

GF

1 2

11K/F_4

11K/F_4

69

69

X_VID2

GF

Ri

216

216

PR

PR

2.49K/F_4

2.49K/F_4

12

PC

PC

PR

PR

43

43

72

72

0.01u/25V_4

0.01u/25V_4

82.5/F_4

82.5/F_4

Close to Pin9 and Pin10

+1

.05V

PC

PC

141

141

2.2n/50V_4

2.2n/50V_4

151

151

PC

PC

0.1u/10V_4

0.1u/10V_4

154

154

PC

PC
*180P/50V_4

*180P/50V_4

PR

PR

220

220

*100/F_4

*100/F_4

PR

PR
*0_4

*0_4

64

64

+

+

PC

PC
560u/2.5V

560u/2.5V

G

OCP:25A
Ri=2.49K
Change Ri can adjust OCP point
LL=7.03mv/A
Rdroop=8.87K
Change Rdroop can adjust loadline

VI

N

+

+

PC

PC

142

142

143

143

560u/2.5V

560u/2.5V

PC

PC

36

36

10u/6.3V_8

10u/6.3V_8

H

5/26 modify power budget

OCP:25A
22A

+

VGFX_AXG

Parallel

80

80

PR

PR
0_4

4 4

A

B

0_4

83

83

PR

PR
0_4

0_4

C

82 10/F_4

82 10/F_4

PR

PR

PR85 10/F_4PR85 10/F_4

SE <6>

VSS_AXG_SEN

VCC_AXG_SENSE <6>

Qu

Qu

Qu

anta Computer Inc.

anta Computer Inc.

anta Computer Inc.

ZQH

ZQH

H

ZQH

1A

1A

1A

of

of

of

35Monday, March 14, 2011

35Monday, March 14, 2011

35Monday, March 14, 2011

33

33

33

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

+VG

+VG

1.Level 1 Environment-related Substances Should NEVER be Used.

D

2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

E

F

G

+VG

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

FX_AXG (ISL62881)

FX_AXG (ISL62881)

FX_AXG (ISL62881)

5

WWW.AliSaler.Com

4

3

2

1

+1.8V

1.8 Volt +/-

5%
TDC : 0.76A
PEAK : 1.01A
Width : 40mil

D D

C C

Thermal protection

B B

Need fine tune
for thermal protect point

S5_ON

2

A A

1.76A

V

+1.8

PC19

PC19

10u/6.3V_8

10u/6.3V_8

PR187

PR187

10K_6_NTC

10K_6_NTC

3

Note placement position

PQ40

PQ40
DMN601K-7

DMN601K-7

1

S5_

2

2

ON<27,29>

PR188

PR188

1.54K/F_4

1.54K/F_4

PR

PR
261/F_4

261/F_4

3

3

PC19

PC19

10u/6.3V_8

10u/6.3V_8

PR

PR
100/F_4

100/F_4

t1 = (1+Rg/Rh)*0.5

Vou

S5_O

N

PQ4

PQ4

DTC144EU

DTC144EU

VLVL

PR18

PR18

9

9

200K/F_4

200K/F_4

2.469V

2

2

PR19

PR19
200K/F_4

200K/F_4

258

258

Rg

259

259

Rh

2

4

4

3

+

+

2

-

-

PQ6

PQ6

0

0

AO4468

AO4468

1
2
3 6

4

VIN

PD8

PD8

1010CPT

1010CPT

SW

SW

P

P

205

205

R

R

1M_6

1M_6

2

1 3

PC12

PC12

0.1u/50V_6

0.1u/50V_6

84

1

PU10

PU10

A

A

LM393

LM393

S5

+3V_

8
7

5

260

260

PR

PR
47/F_6

47/F_6
PC

PC

195

195

33n/50V_6

33n/50V_6

5

3

10u/6.3V_8

10u/6.3V_8

PU12

PU12

9334

9334

G

G

DRV

FB

PC19

PC19

0

0

PGD

EN

VCC

GND

2

PC19

PC19

1 2

0.1u/25V_6

0.1u/25V_6

4

1

6

1

1

+5VPCU

1 2

+3V_

INON

MA

4

4

PC19

PC19

0.1u/25V_6

0.1u/25V_6

S5

PR25

PR25
100K_4

100K_4

7

7

PR

PR
*100K_4

*100K_4

261

261

HW

PG_1.8V <27>

MA

INON <27,31,32>

For EC control thermal protection (output 3.3V)

PU

PU

10B

10B

LM393

LM393

5

+

+

7

6

-

-

1

PQ4

PQ4

5

5

AO3409

AO3409

3

MA

PR

PR

201

201

SHORT0603

SHORT0603

5

5

194

194

PR

PR
200K_6

200K_6

PC119

PC119

0.1u/50V_6

0.1u/50V_6

SYS_

SHDN# <4,29>

3

2

PQ39

PQ39
DMN601K-7

DMN601K-7

1

INON<27,31,32>

2

PR12

PR12
*100K/F_6

*100K/F_6

VIN

PR12

PR12

8

8

1M_4

1M_4

INON_ON_G

MA

6

6

PR13

PR13

6

6

PQ2

PQ2
DTC144EU

DTC144EU

1 3

7

7

1M_4

1M_4

PR

PR

118

118

22_8

22_8

3

2

PQ2

PQ2
DMN601K-7

DMN601K-7

1

3

2

0

0

1

PR

PR

119

119

22_8

22_8

1

1

PQ2

PQ2
DMN601K-7

DMN601K-7

2

+0

.75V_DDR_VTT

3

1

PR

PR

121

121

22_8

22_8

3

3

PQ2

PQ2
DMN601K-7

DMN601K-7

+1.5

V

3

2

DMN601K-7

DMN601K-7

1

PR12

PR12
22_8

22_8

PQ2

PQ2

+1.8

V

+15V+5V+3V

PR

PR

122

0

0

2

2

122

*22_8

*22_8

3

2

PQ2

PQ2

*DMN601K-7

*DMN601K-7

1

PR12

PR12

3

3

1M_4

1M_4

ND

MAI

3

2

4

4

1

5

5

PQ2

PQ2
DMN601K-7

DMN601K-7

PC68

PC68
*

*

2.2n/50V_4

2.2n/50V_4

MA

IND <29,32>

5

uter Inc.

uter Inc.

Quanta Comp

Quanta Comp

Quanta Comp

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Di

Di

Di

scharge/1.8V)

scharge/1.8V)

scharge/1.8V)

Date: Sheet

Date: Sheet

Date: Sheet

onday, March 14, 2011

onday, March 14, 2011

4

3

2

onday, March 14, 2011

PROJECT :

7/7 modify

1

uter Inc.

ZQH

ZQH

ZQH

34 35M

34 35M

34 35M

1A

1A

1A

of

of

of

5

4

3

2

1

DEL

MO

9

CH

V

del

RE

Mo

1A

1/7 page.24 U6 HDMI pin 19,20 & pin 41,42 swap for layout

ZQ

H

page.30 CN16 speaker conn. pin1,2,3,4 swap for layout
page.25 U26 transformer change to 10/100 type
page.25 U2, U4 change type, add D2, R21 for surge solution.
page.25 RN1, RN2 swap the pin define for layout
page.29 R337 change to 2.2K, R476 change to 10u by FAE's recommend

1/10 page.16 delete R8
page.20 add C323, C333, C470, C471, C474, C672, C673 for Vin plane
page.27 change CN21 PWR/B connector P/N & footprint
page.18 change R36 to 2.2 ohm
1/11 page.20 add C480, C337, C674 for Vin plane
page.34 delete +1V LDO power circuit
page.20 add C490, C493, C494, C495, C496 by EMI's request
page.18 change C18 to 220P by EMI's request
1/10 page.30 stuff PC123, unstuff PC30
page.23 add R573 for FAE's request

2/14 Test-Point change footprint.

2A

TP3075 change to TP2675
TP3050 change to TP2650

2/14 page.21 Add R574 & R575

page.21 R599 chane to 10K ohm resistor.

D D

2/14 page.30 PC123 unstuff , PC30 stuff.
page.27 unstuff SW1 & CN19
page.25 unstuff Bluetooth group.
page.26 EMI CP1, CP2, CP3, CP4, CP5, CP6 stuff 100pF cap array
page.20 EMI stuff C553 , ADD C361/C483/C507,C497,C498,C499,C500.
page.16 EMI stuff C619/C620

2/14 page20 Reserve C508
2/14 page19 LED5 , PIN1 connect to<BATLED0#>& PIN4 connect to<BATLED1#>

2/14 page16 add R16

C671 & C40 change to TOP side.
2/14 FDI :: delete R152/R161/R157/R171/R167 , R454/R470/R481/R487/R464/R480/R500/R495/R459/R475/R478/R491/R461/R484/R498/R493
Change to 0402short :: R149/R234/R233/R531/R524/R114/R163/R194/R271/R554/R107/R109/R386/R390/R90
2/14 Change to 0603short :: R113/R142/R168/R186/R169/R172/R174/R178/R185/R201/R213/R417/R268/R275/R299/R5/R11/R581/R587/R588/R557/L18/L19/L20
2/14 page.18 Add C46/C48/C51/C52
2/15 POWER cahnge to shortpad
2/15 page12 delete R116 & R124. Add C574.
C598 & C604 change to TOP
Add C339 , C340
page16 stuff C661

2/16 page.30 change +5V_PCU power to +5V_S5 for leak

2/17 page.21 remove R574, R575 & add D10, D11
2/17 page.27 add Q12 and use GPIO53 for throttling function for 40W adaptor
2/17 page.21 change U10 P/N
2/17 page.16 change R14, R16 to 0805 shortpad
page.18 change R15 to 0805 shortpad
page.12 change R140, R162, R210,R424 to 0805 shortpad
page.19 change R303 to 0805 shortpad
page.20 change R443, R550 to 0805 shortpad
2/17 page.25 change R279 to 1206 shortpad
2/17 page.18 unstuff C30

3C

3/10 page.27 Unstuff Q12

3/14 page25. L33 exchange order for USB signal rout

3/14 page.18 R12 & R20 unstuff , R15 change to 0805 resistor and unstuff.
3/10 page.19 Add R314 & R574 , 0 ohm or CAP depend on result.
3/10 page.32 delete shortpad , PR229 & PR230

C C

4A

ANGE LIST

age

ing.

ZQ

FR

OM To

XX1A

X1

1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A

1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A

1A
1A
1A
1A
1A
1A
1A
1A
1A
1A

1A
1A
1A
1A
1A
1A

1A
1A
1A

B2A
B2A
B2A
B2A C3A
B2A
B2A
B2A
B2A C3A
B2

A
B2A
B2A

A C3A

B2

B2A
B2A
B2A

A C3A

B2

B2A
B2A
B2A

A C3A

B2

B2A
B2A
B2A

A C3A

B2

B2A
B2A
B2A

A C3A

B2

B2A
B2A
B2A

A C3A

B2

B2A
B2A
B2A

A

B2A C3A

1A
A

A

B2
B2A
B2A
B2A
B2A
B2A
B2A
B2A
B2A
B2A
B2

A
B2A
B2A
B2A
B2A
B2A
B2A
B2A
B2A
B2A

A

B2
B2A
B2A
B2A
B2A

B2A
B2A
B2A
B2A

A

B2
B2A
B2A
B2A
B2A
B2A
B2A
B2A
B2A
B2A

A

B2
B2A
B2A
B2A

B2A
B2A
B2A
B2A
B2A

A

B2
B2A
B2A
B2A
B2A

B2A
B2A
B2A
B2A
B2

A
B2A

B2A
B2A
B2A

C3A
C3A
C3A

C3A
C3A
C3A

C3A
C3A
C3A

C3AB2A
C3A
C3A
C3A

C3AB2A
C3A
C3A
C3A

C3AB2A
C3A
C3A
C3A

C3AB2A
C3A
C3A
C3A

C3AB2A
C3A
C3A
C3A

AB2A

C3
C3AB2A
C3A
C3A
C3A
C3AB2
C3AB2A

anta Computer Inc.

anta Computer Inc.

anta Computer Inc.

Qu

Qu

Qu

PROJECT :

PROJECT :

PROJECT :

ize Docume nt Number Rev

ize Docume nt Number Rev

ize Docume nt Number Rev

S

S

S

Change list2

Change list2

Change list2

Date: Sheet

Date: Sheet

Date: Sheet

B B

A A

5

P

ROJECT MODEL : ZQH APPROVED BY:

DOC NO.

ZQH

ZQH

ZQH

1A

1A

1A

P

ART NUMBER: DRAWI NG BY: REVISON:

35Monday, March 14, 2011

35Monday, March 14, 2011

35Monday, March 14, 2011

of

35

of

35

of

35

4

3

DA

TE:

2

1