0 °
P
RELIMINARY
FEATURES
ROM
Device
Z90365 32 640 8 4.5 to 5.5V
Note: *General-Purpose
■
42-Pin SDIP
■
C to +70 ° C Temperature Range
■
Fully Customized Character Set
(KW)
RAM*
(Words)
PWM
(8-Bit)
Voltage
Range
C
USTOMER
P
ROCUREMENT
Z90365
D
IGITAL
■
■
■
■
■
■
T
ELEVISION
Character-Control and Closed-Caption Modes
Keypad User Control
TV Tuner Serial Interface
Direct Video Signals
Supports Violence Blocking
Speed: 12 MHz
C
ONTROLLER
S
PECIFICATION
1
GENERAL DESCRIPTION
The Z90365 Digital Television Controller is designed to
provide complete audio and video control of television receivers, video recorders, and advanced on-screen display
facilities. The television controller features a Z89C00 RISC
processor core that controls the on-board peripheral functions and registers using the standard processor instruction set.
Character attributes can be controlled through two modes:
the on-screen display Character-Control Mode and the
Closed-Caption Mode. The Character-Control Mode provides access to the full set of attribute controls, allowing the
modification of attributes on a character-by-character basis. The insertion of control characters permits direction of
other character attributes. Closed-caption text can be decoded directly from the composite video signal and displayed on-screen with the assistance of the processor's
digital signal processing (DSP) capabilities.
The fully customized 512 character set, formatted in two
256 character banks, can be displayed with a host of display attributes that include underlining, italics, blinking,
eight foreground/background colors, character position offset delay, and background transparency.
Serial interfacing with the television tuner is provided
through the tuner serial port. Other serial devices, such as
digital channel tuning adjustments, may be accessed
through the industry-standard I
User control can be monitored through the keypad scanning port, or the 16-bit remote control capture register. Receiver functions such as color and volume can be directly
controlled by eight 8-bit pulse width modulated ports.
Notes: All Signals with a preceding front slash, "/", are
active Low. For example, B//W (WORD is active Low);
/B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power V
Ground GND V
CC
2
C port.
V
DD
SS
CP97TEL2800
P R E L I M I N A R Y
1
2
Z90365
Digital Television Controller Zilog
GENERAL DESCRIPTION (Continued)
Port 17
Port 00
Capture
IRIN
ADC
ADC0
ADC1
ADC2
ADC3
ADC4
Port 0
Port 00
Port 01
Port 02
Port 03
Port 04
Port 05
Port 06
Port 07
Port 08
Port 09
Port 0F
PWM
PWM1
PWM2
PWM3
PWM4
PWM5
PWM9
PWM10
Port1
Port 10
Port 11
Port 12
Port 13
Port 14
Port 15
Port 16
Port 17
Port 18
RAM
640 x 16
Address
Data
Control
XTAL1
XTAL2
LPF
HSYNC
VSYNC
/Reset
CPU
Register Addr/Data
HALFBLNK
ROM Addr
ROM Data
Figure 1. Functional Block Diagram
OSD
V1
V2
V3
VBLANK
Port0F
ROM
32K x 16
P R E L I M I N A R Y
CP97TEL2800
Z90365
Zilog Digital Television Controller
PIN DESCRIPTION
PWM10
PWM9
PWM5
PWM4
PWM3
PWM2
PWM1
Port03
Port04/ADC4
Port05/ADC3
Port00/ADC2
Port17/ADC1
GND
Port10/R<0>
Port06/Counter
Port18/G<0>
Port13/G<1> HSync
1
2
3
4
5
6
7
8
9
10
11
12
13
15
16
17
Z90365
Shrink
DIP
42
41
40
39
38
37
36
35
34
33
32
31
30
2914
28
27
26
Port12/I2MSD
P11/I2MSC
Port02/I2SSD
Port01/I2SSC
Port09
Port08/R<1>
IRIN
Port07/CSync
Vcc
/Reset
XTAL2
XTAL1
ANGND
LPF
CVI/ADC0
VSync
Port14/B<0>
Port15/B<1>
Port16/SCLK
18
19
20
21Port0F/Half Blank
25
24
23
22
Figure 2. 42-Pin Shrink DIP
VBlank
V1
V2
V3
CP97TEL2800
P R E L I M I N A R Y
3