ZILOG Z89328 Datasheet

FEATURES

Z89319/Z89328

Z89319/328

DIGITAL TELEVISION CONTROLLER
IN-CIRCUIT EMULATOR (ICE) DEVICE

■ Part ROM RAM Speed

Number (Word) (Word) (MHz)

Z89319 0 0 12
Z89328 0 0 12

■ 124-Pin Grid Array (PGA) Package (Z89319)

100-Pin Quad Flat Pack (QFP) Package (Z89328)

■ 4.5- to 5.5-Volt Operating Range

■ Z89C00 RISC Processor Core

GENERAL DESCRIPTION

The Z89319 and Z89328 are ROMless versions of the
Z89300 family of Zilog's Digital Television Controllers
designed for use in emulators and development boards to
provide complete audio and video control of television
receivers, video recorders, and advanced on-screen
display facilities.

The powerful Z89C00 RISC processor core allows users to
control on-board peripheral functions and registers using
the standard processor instruction set.

In closed caption mode, text can be decoded directly from
the composite video signal and displayed on the screen
with assistance from the processor's digital signal
processing capabilities. The character representation in
this mode allows for a simple attribute control through the
insertion of control characters.

The character control mode provides access to the full set
of attribute controls. The modification of attributes is allowed
on a character-by-character basis. The insertion of control
characters permits direction of other character attributes.

Display attributes, including underlining, italics, blinking,
eight foreground/background colors, character position
offset delay, and background transparency, are made
possible through a fully customized 512 character set,
formatted in two 256 character banks.

■ 0°C to +70°C Temperature Range

■ Direct Closed Caption Decoding

■ TV Tuner Serial Interface

■ Customized Character Set

■ Character Control Mode

■ Directly Controlled Receiver Functions

Serial interfacing with the television tuner is provided
through the tuner serial port. Digital channel tuning
adjustments may be accessed through the industry­standard I2C port.

Additional hardware provides the capability to display two
to three times normal size characters. The smoothing logic
contained in the on-screen display circuit improves the
appearance of larger fonts. Special circuitry can be
activated to improve the visibiity of text by adding a right­sided shadow effect to the characters.

Receiver functions such as color and volume can be
directly controlled by six 8-bit pulse width modulated
ports.

Notes:

All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).

Power connections follow conventional descriptions below:

Connection Circuit Device

Power V

Ground GND V

CC

V

DD
SS

235

GENERAL DESCRIPTION (Continued)

Z89319/Z89328

CVI

PWM6

Port 17
Port 00
Port 05

Port 04

Capture
IRIN

ADC

ADC0
ADC1
ADC2
ADC3
ADC4
ADC5

Port 0

Port 00
Port 01
Port 02

Port 03
Port 04

Port 05
Port 06
Port 07
Port 08
Port 09
Port 0A
Port 0B
Port 0C

Port 0D
Port 0E

Port 0F

Control
XTAL1
XTAL2
LPF
HSYNC
HSYNC2

VSYNC
/Reset

Register Addr/Data

PWM

PWM1
PWM2
PWM3
PWM4
PWM5
PWM6

Port1

Port 10
Port 11
Port 12
Port 13
Port 14
Port 15
Port 16
Port 17

Port 18

I2C

SCL/MSCL2

SCD/MSCD2

MSCL1

MSCD1

OSD

V1(R)

Port 01/11

Port 02/12

236

RAM

1K x 16

Address

Data

CPU

ROM Addr

ROM Data

Functional Block Diagram

V2(G)
V3(B)

ROM

32K x 16