Zilog EZ80L92 User Manual
eZ80L92 Development Kit
User Manual
UM012913-0407
Copyright ©2007 by ZiLOG, Inc. All rights reserved.
www.zilog.com
eZ80L92 Development Kit
User Manual
Safeguards
The following precaution must be taken care while working with the
devices mentioned in this document.
Caution:
Always use a grounding strap to prevent damage resulting from
electrostatic discharge (ESD).
UM012913-0407
Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Key Features of the development kit . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Hardware Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
eZ80L92 Development Board Revision History . . . . . . . . . . . . . . . .2
eZ80Acclaim!
®
eZ80
Development Platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
eZ80L92 Module Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Application Module Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
I/O Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Embedded Modem Socket Interface . . . . . . . . . . . . . . . . . . . . . . . .27
eZ80
LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Push Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Console . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Modem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
2
I
C Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
eZ80L92 Module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Ethernet Media Access Controller . . . . . . . . . . . . . . . . . . . . . . . . . .46
eZ80L92 Module Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
Reset Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
®
Development Platform Overview . . . . . . . . . . . . . . . . .3
®
Development Platform Memory . . . . . . . . . . . . . . . . . . . . . .30
eZ80L92 Development Kit
User Manual
iii
UM012913-0407 Table of Contents
iv
eZ80L92 Development Kit
User Manual
IrDA Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Flash Loader Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Mounting the Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Changing the Power Supply Plug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
ZPAK II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
ZDI Target Interface Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Application Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
ZDS II. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Cannot Download Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
No Output on Console Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
IrDA Port Not Working . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Difference Between EMAC and IP Address . . . . . . . . . . . . . . . . . . . . . 58
Media Access Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
IP Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
eZ80Acclaim
®
Development Platform . . . . . . . . . . . . . . . . . . . . . . 61
eZ80L92 Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
General Array Logic Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
U10 Address Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
U15 Address Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table of Contents UM012913-0407
eZ80L92 Development Kit
Introduction
The eZ80L92 Development Kit, PSI #eZ80L920210ZCO, provides a gen-
eral-purpose platform for evaluating the capabilities and operation of
ZiLOG’s eZ80L92 microprocessor. The eZ80L92 Development Kit fea-
tures two primary boards: the eZ80Acclaim!
the eZ80L92 Module. This arrangement provides a complete develop-
ment platform while using both the boards. It also provides a smaller-
sized reference platform with the eZ80L92 Module as a stand-alone
development tool.
Key Features of the Development Kit
The key features of the eZ80L92 Development Kit are:
User Manual
®
Development Platform and
1
•
eZ80Acclaim!® Development Platform:
– Up to 2 MB fast SRAM (12 ns access time).
– Embedded Modem Socket with a U.S. Telephone Line Interface.
2
C EEPROM.
–I
2
C Configuration Register.
–I
– General-Purpose Port and Memory Headers.
– Supported by ZiLOG Developer Studio II and the eZ80
C-Compiler.
– LEDs, including a 7 x 5 LED matrix..
– Jumpers.
– Two RS232 connectors—Console, Modem.
– RS485 connector.
– ZiLOG Debug Interface (ZDI).
– JTAG Debug Interface.
– 9 V DC Power Connector.
– Telephone Jack.
UM012913-0407 Introduction
®
eZ80L92 Development Kit
User Manual
2
•
eZ80L92 Module:
– eZ80L92 microprocessor operating at 48 MHz
– 1 MB Flash Memory
– 512 KB SRAM
– 10 BaseT Ethernet Interface
– Real time clock with battery back-up
•
ZPAK II Debug Interface.
•
4-port 10 BaseT Ethernet hub.
•
eZ80L92 Development Kit Software and Documentation CD-ROM.
Hardware Specifications
Table 1 lists the specifications of the eZ80Acclaim!® Development Plat-
form.
Table 1. eZ80® Development Platform Hardware Specifications
Operating Temperature 20 ºC ±5 ºC
Operating Voltage 9 V DC
eZ80L92 Development Board Revision History
99C0858-001 Rev C or later:
10/20/03 - Updated layout and added reset fix.
05/30/06 - The following components are not populated on the board:
– U11: Triac, SCR Phone Line D0-214
– U26 and U27: IC RS485, XCVR, Low PWR, 8-SOIC
– C3 and C4: CAP 1000pF Ceramic Disc 1KV
– D1 and D3: Diode LED Amber 0805 SMT
– T1: Inductor Ferrite Bead, 2x15 Turns
Key Features of the Development Kit UM012913-0407
eZ80L92 Development Kit
User Manual
– J1: Conn HDR/Pin 1x32 2mm socket
– J5: Conn HDR/Pin 1x2 2mm socket
– J9: Conn HDR/Pin 1x9 2mm socket
– P4: Conn RJ14 Jack 6-Pos 4-CKT
– P5: Conn 9-CKT Cir rt-angl PC Mount
eZ80Acclaim!® Development Platform Overview
3
The purpose of the eZ80L92 Development Kit is to provide the developer
®
with a set of tools for evaluating the features of the eZ80
family of
devices and to develop a new application before building application
hardware. The eZ80Acclaim!
accept a number of application-specific modules and Z8
®
Development Platform is designed to
®
and eZ80®
based add-on modules, including the eZ80L92 Module, which features an
EMAC, an IrDA transceiver, and the eZ80L92 microprocessor.
The eZ80L92 Development Kit features two primary boards: the
eZ80Acclaim!
®
Development Platform and the eZ80L92 Module. This
arrangement provides a complete development platform while using both
boards. It can also provide a smaller-sized reference platform with the
eZ80L92 Module as a stand-alone development tool.
The eZ80Acclaim!
®
Development Platform can operate in stand-alone
mode with Flash memory, or interface via the ZPAK II emulator to a host
PC running ZiLOG Developer Studio II Integrated Development
Environment (ZDS II IDE) software. If the eZ80Acclaim!
demands Internet connectivity or a network connection, the eZ80
®
application
®
can
serve web pages over a TCP/IP network allowing easy system monitoring
and control, and effortless processor code updates.
The address bus, data bus, and all eZ80L92 Module control signals are
buffered on the eZ80Acclaim!
cient drive capability. A block diagram of the eZ80Acclaim!
®
Development Platform to provide suffi-
®
Develop-
ment Platform and the eZ80L92 Module is shown in Figure 1.
UM012913-0407 eZ80Acclaim!® Development Platform Overview
eZ80L92 Development Kit
User Manual
4
Ethernet
eZ80F92
eZ80L92
EMAC
Flash
(1 MB)
SRAM
(512 KB)
Battery &
Oscillator
for RTC
IrDA
Transceiver
Peripheral Device Signals
Address Bus
Data Bus
E-NET
Module
Interface
Peripheral Device Signals
Address Bus
Data Bus
SRAM
(512 KB
up to 2 MB)
GPIO
and
Address
Decoder
Application Module Headers
RS232-0
(Console)
RS485
RS232-1
(Modem)
Embedded
Modem
LED
(7x5 matrix)
Push-
buttons
2
I C
EEPROM
2
I C
Register
Figure 1. eZ80Acclaim!® Development Platform Block Diagram with eZ80L92
Module
eZ80Acclaim!® Development Platform Overview UM012913-0407
eZ80L92 Development Kit
User Manual
Figure 2 is a photographic representation of the eZ80Acclaim!® Develop-
ment Platform segmented into its key blocks.
C
5
Note: Key blocks A–E
A. Power and serial communications.
B.
eZ80L92 Module interface.
C. Debug interface.
Figure 2. The eZ80Acclaim!® Development Platform
A
B
D
E
D. Application Module Interfaces.
E. General-Purpose Port and LED with Address
Decoder.
UM012913-0407 eZ80Acclaim!® Development Platform Overview
eZ80L92 Development Kit
User Manual
6
Figure 3 is a photographic representation of the eZ80L92 Module
segmented into its key blocks.
Note: Key blocks A–C.
A. eZ80L92 Module interfaces.
B. CPU and memory.
C. Ethernet connection.
D. IrDA transceiver.
Figure 3. The eZ80L92 Module
®
The structures of the eZ80Acclaim!
Development Platform and the
eZ80L92 Module are illustrated in the Schematic Diagrams from page 61.
eZ80Acclaim!® Development Platform Overview UM012913-0407
eZ80L92 Development Kit
eZ80® Development Platform
This chapter describes the eZ80Acclaim!® Development Platform hardware, its key components and the interfaces, including detailed programmer interface information like memory maps, register definitions, and
interrupt usage.
Functional Description
The eZ80Acclaim!® Development Platform consists of seven major hardware blocks. These blocks, listed below, are illustrated in Figure 4.
•
eZ80L92 Module interface (2 female headers).
•
Power supply for the eZ80Acclaim!® Development Platform, the
eZ80L92 Module, and application modules.
User Manual
7
•
Application module interface (2 male headers).
•
General-Purpose Port and LED matrix.
•
RS232 serial communications ports.
•
Embedded modem interface.
•
I2C devices.
UM012913-0407 eZ80® Development Platform
eZ80L92 Development Kit
User Manual
8
Peripheral Device Signals
E-NET
Module
Interface
Address Bus
Data Bus
SRAM
(512 KB
up to 2 MB)
GPIO
and
Address
Decoder
RS232-0
(Console)
RS232-1
(Modem)
Embedded
Modem
LED
(7x5 matrix)
Push-
buttons
2
I C
EEPROM
2
I C
Register
Application Module Headers
Figure 4. Basic eZ80Acclaim!® Development Platform Block Diagram
Functional Description UM012913-0407
Physical Dimensions
The dimension of the eZ80Acclaim!® Development Platform PCB is
177.8 mm x 182.9 mm. The overall height is 38.1 mm. See Figure 5.
43.2 mm
96.5 mm 55.9 mm
eZ80L92 Development Kit
User Manual
9
175.3 mm
114.3 mm
157.5 mm
167.6 mm
5.1 mm
165.1 mm
5.1 mm
Figure 5. Physical Dimensions of eZ80Acclaim!® Development Platform
UM012913-0407 Functional Description
eZ80L92 Development Kit
User Manual
10
Operational Description
The eZ80Acclaim!® Development Platform can accept any eZ80® corebased modules, provided that the module interfaces correctly to the
eZ80Acclaim!
eZ80Acclaim!
developer with a tool to evaluate the features of the eZ80L92 device and
to develop an application without building additional hardware.
eZ80L92 Module Interface
®
Development Platform. The purpose of the
®
Development Platform is to provide the application
The eZ80L92 Module interface provides easy connection of the eZ80L92
Module. It also provides easy connection for any eZ80
designed to this interface. This includes modules using future eZ80
devices and user-developed modules using current eZ80
®
based module
®
devices.
®
The eZ80L92 Module interface consists of two 50-pin receptacles, JP1
and JP2.
Peripheral Bus Connector
Figure 6 illustrates the pin layout of the Peripheral Bus Connector in the
®
50-pin header located at position JP1 on the eZ80Acclaim!
Develop-
ment Platform. Table 2 describes the pins and their functions.
Operational Description UM012913-0407
eZ80L92 Development Kit
User Manual
11
A6
A10
GND_EXT
A8
A13
A15
A18 A1 6
A19
A2
A11
A4
A5
DIS_ETH
A21
A22
CS0
CS2
D1
D3
D5
D7
MREQ
GND_EXT
WR
BUSACK
JP1
12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
HEADER 25X2
IDC50
A0
A3
V3.3_EXT
A7
A9
A14
GND_EXT
A1
A12
A20
A17
DIS_FLASH
V3.3_EXT
A23
CS1
D0
D2
D4
GND_EXT
D6
IOREQ
RD
INSTRD
BUSREQ
Figure 6. eZ80Acclaim!® Development Platform Peripheral Bus Connector Pin
Configuration—JP1
UM012913-0407 Operational Description
eZ80L92 Development Kit
User Manual
12
Table 2. eZ80Acclaim!® Development Platform Peripheral Bus Connector
Identification—JP1
1
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal
1 A6 Bidirectional Yes
2 A0 Bidirectional Yes
3 A10 Bidirectional Yes
4 A3 Bidirectional Yes
5GND
6V
DD
7 A8 Bidirectional Yes
8 A7 Bidirectional Yes
9 A13 Bidirectional Yes
10 A9 Bidirectional Yes
11 A15 Bidirectional Yes
12 A14 Bidirectional Yes
13 A18 Bidirectional Yes
14 A16 Bidirectional Yes
2
15 A19 Bidirectional Yes
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80L92 Module Schematics. see
eZ80L92 Module.
2. The Power and Ground nets are connected directly to the eZ80L92 device.
Additional note: external capacitive loads on RD
below 10 pF to satisfy the timing requirements for the eZ80
pulled to either V
to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80L92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and
DD
Operational Description UM012913-0407
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be
®
CPU. All unused inputs should be
eZ80L92 Development Kit
User Manual
13
Table 2. eZ80Acclaim!
Identification—JP1
®
Development Platform Peripheral Bus Connector
1
(Continued)
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal
16 GND
17 A2 Bidirectional Yes
18 A1 Bidirectional Yes
19 A11 Bidirectional Yes
20 A12 Bidirectional Yes
21 A4 Bidirectional Yes
22 A20 Bidirectional Yes
23 A5 Bidirectional Yes
24 A17 Bidirectional Yes
25 DIS_ETH
26 EN_FLASH
Output Low No
Output Low No
27 A21 Bidirectional Yes
28 V
DD
29 A22 Bidirectional Yes
2
30 A23 Bidirectional Yes
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80L92 Module Schematics. see
eZ80L92 Module.
2. The Power and Ground nets are connected directly to the eZ80L92 device.
Additional note: external capacitive loads on RD
below 10 pF to satisfy the timing requirements for the eZ80
pulled to either V
to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80L92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and
DD
UM012913-0407 Operational Description
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be
®
CPU. All unused inputs should be
eZ80L92 Development Kit
User Manual
14
Table 2. eZ80Acclaim!
Identification—JP1
®
Development Platform Peripheral Bus Connector
1
(Continued)
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal
31 CS0 Input Low Yes
32 CS1 Input Low Yes
33 CS2 Input Low Yes
34 D0 Bidirectional Yes
35 D1 Bidirectional Yes
36 D2 Bidirectional No
37 D3 Bidirectional Yes
38 D4 Bidirectional Yes
39 D5 Bidirectional Yes
40 GND
41 D7 Bidirectional Yes
42 D6 Bidirectional Yes
43 MREQ
Bidirectional Low Yes
2
44 IORQ
Bidirectional Low Yes
45 GND
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80L92 Module Schematics. see
eZ80L92 Module.
2. The Power and Ground nets are connected directly to the eZ80L92 device.
Additional note: external capacitive loads on RD
below 10 pF to satisfy the timing requirements for the eZ80
pulled to either V
to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80L92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and
DD
Operational Description UM012913-0407
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be
®
CPU. All unused inputs should be
Table 2. eZ80Acclaim!
Identification—JP1
eZ80L92 Development Kit
User Manual
®
Development Platform Peripheral Bus Connector
1
(Continued)
15
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal
2
46 RD Bidirectional Low Yes
47 WR
48 INSTRD
49 BUSACK
50 BUSREQ
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80L92 Module Schematics. see
Bidirectional Low Yes
Input Low Yes
Input Pull-Up 10 KΩ; Low Yes
Output Pull-Up 10 KΩ; Low Yes
eZ80L92 Module.
2. The Power and Ground nets are connected directly to the eZ80L92 device.
Additional note: external capacitive loads on RD
below 10 pF to satisfy the timing requirements for the eZ80
pulled to either V
to reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80L92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and
DD
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be
®
CPU. All unused inputs should be
UM012913-0407 Operational Description
eZ80L92 Development Kit
User Manual
16
I/O Connector
Figure 7 illustrates the pin layout of the I/O Connector in the 50-pin
header located at position JP2 of the eZ80Acclaim!
form. Table 3 describes the pins and their functions.
®
Development Plat-
PB7
PB5
PB3
PB1
GND_EXT
PC6
PC4
PC2
PC0
PD6
PD5
PD3
PD1
GND_EXT
TCK TMS
RTC_VDD
IICSCL
IICSDA
FLASHWE
CS3
RESET
V3.3_EXT
HALT_SLP
V3.3_EXT
JP2
12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
HEADER 25X2
IDC50
PB6
PB4
PB2
PB0
PC7
PC5
PC3
PC1
PD7
GND_EXT
PD4
PD2
PD0
TDITDO
TRIGOUT
EZ80CLK
GND_EXT
DIS_IRDA
WAIT
GND_EXT
NMI
Figure 7. eZ80Acclaim!® Development Platform I/O Connector Pin Configuration—
JP2
Operational Description UM012913-0407
eZ80L92 Development Kit
User Manual
Table 3. eZ80Acclaim!® Development Platform I/O Connector Identification—JP21
17
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal
1 PB7 Bidirectional Yes
2 PB6 Bidirectional Yes
3 PB5 Bidirectional Yes
4 PB4 Bidirectional Yes
5 PB3 Bidirectional Yes
6 PB2 Bidirectional Yes
7 PB1 Bidirectional Yes
8 PB0 Bidirectional Yes
9GND
10 PC7 Bidirectional Yes
11 PC6 Bidirectional Yes
12 PC5 Bidirectional Yes
13 PC4 Bidirectional Yes
14 PC3 Bidirectional Yes
15 PC2 Bidirectional Yes
2
16 PC1 Bidirectional Yes
17 PC0 Bidirectional Yes
18 PD7 Bidirectional Yes
19 PD6 Bidirectional
20 GND
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The interface is represented in the eZ80L92 Module Schematics.
2. The Power and Ground nets are connected directly to the eZ80L92 device.
UM012913-0407 Operational Description
eZ80L92 Development Kit
User Manual
18
Table 3. eZ80Acclaim!
®
Development Platform I/O Connector Identification—JP21
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal
21 PD5 Bidirectional Yes
22 PD4 Bidirectional Yes
23 PD3 Bidirectional Yes
24 PD2 Bidirectional Yes
25 PD1 Bidirectional Yes
26 PD0 Bidirectional Yes
27 TDO Input Yes
28 TDI/ZDA Output Yes
29 GND
30 TRIGOUT Input High
31 TCK/ZCL Output Yes
32 TMS Output High Yes
33 RTC_V
DD
34 EZ80CLK Input Yes
2
35 SCL Bidirectional Yes
36 GND
37 SDA Bidirectional Yes
38 GND
39 FlashWE
Output Low No
40 GND
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The interface is represented in the eZ80L92 Module Schematics.
2. The Power and Ground nets are connected directly to the eZ80L92 device.
Operational Description UM012913-0407
Table 3. eZ80Acclaim!
eZ80L92 Development Kit
User Manual
®
Development Platform I/O Connector Identification—JP21
19
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal
41 CS3 Input Low Yes
42 DIS_IrDA
43 RESET
44 WAIT
45 V
46 GND
47 HALT_SLP
48
49 V
50 Reserved
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The interface is represented in the eZ80L92 Module Schematics.
2. The Power and Ground nets are connected directly to the eZ80L92 device.
DD
NMI
DD
Output Low No
Bidirectional Low Yes
Output Pull-Up 10 KΩ; Low Yes
Input Low Yes
Output Low Yes
2
Almost all the connectors’ signals are received directly from the CPU.
Four input signals, in particular, offer options to the application developer
by disabling certain functions of the eZ80L92 Module.
These four inputs signals are:
•
Disable Ethernet (DIS_ETH)
•
Enable Flash (EN_FLASH)
•
Flash Write Enable (FlashWE)
•
Disable IrDA (DIS_IrDA)
UM012913-0407 Operational Description
eZ80L92 Development Kit
User Manual
20
These four inputs are described below.
Disable Ethernet
When active Low, the DIS_ETH
responding to CPU requests. As a result, additional inputs, outputs, or
memory devices can be used in the CS3 address space. The logic that disables the Ethernet signal is listed in Appendix A on page 75.
Enable Flash
When active Low, the EN_FLASH
the eZ80L92 Module.
Flash Write Enable
When active Low, the FlashWE
the Flash boot block of the eZ80L92 Module.
output signal disables the EMAC from
input signal disables the Flash chip on
input signal enables Write operations on
Disable IrDA
When the DIS_IrDA
input signal is pulled Low, the IrDA transceiver,
located on the eZ80L92 Module is disabled. As a result, UART0 can be
used with the RS232 or the RS485 interfaces on the eZ80Acclaim!
®
Development Platform.
Application Module Interface
An application module interface is provided to allow you to add an
application-specific module to the
ZiLOG’s Thermostat Application Module (not provided in the kit) is an
example application-specific module that demonstrates an HVAC control
system. Implementing an application module with the application module
interface requires that the
eZ80L92 Module
eZ80Acclaim!® Development Platform, as the
the eZ80L92 microprocessor. To mount an application module, use the two
male headers J6 and J8.
Operational Description UM012913-0407
eZ80Acclaim!® Development Platform.
also be mounted on the
eZ80L92 Module
contains
eZ80L92 Development Kit
Jumper J6 carries the general-purpose port and jumper J8 carries memory
and control signals. To design an application module, you must be
familiar with the architecture and features of the installed eZ80L92
Module. Table 4 and Table 5 list the signals and functions related to each
of these jumpers by pin. Power and ground signals are omitted for the
sake of simplicity.
Table 4. General-Purpose Port Connector J6*
Signal Pin No. Function Direction Notes
SCL 5 I
SDA 7 I
2
C Clock Bidirectional
2
C Data Bidirectional
User Manual
21
MOD_DIS
MWAIT
EM_D0 15 GPIO, Bit 0 Bidirectional
CS3
EM_D[7:1] 21,23,25,
Reserved 35
PC[7:0] 39,41,43,
Note: All signals are driven directly by the CPU.
9 Modem Disable Input If a shunt is installed between
13 WAIT signal for
the CPU
17 Chip Select 3 of
the CPU
GPIO, Bit [7:1] Bidirectional
27,29,31,
33
Port C, Bit [7:0] Bidirectional
45,47,49,
51,53
Input
Output This signal is also present on
pins 6 and 9, the modem
function on the eZ80Acclaim!
Development Platform is
disabled.
the J8.
®
UM012913-0407 Operational Description
eZ80L92 Development Kit
User Manual
22
Table 4. General-Purpose Port Connector J6* (Continued)
Signal Pin No. Function Direction Notes
ID_[2:0] 6,8,10 eZ80Acclaim!®
Output
Development
Platform ID
CON_DIS
12 Console Disable Input If a shunt is installed between
pins 12 and 14, the Console
function on the eZ80Acclaim!
Development Platform is
disabled.
Reserved 16,18
PD[7:0] 22,24,26,
Port D, Bit[7:0] Bidirectional
28,30,32,
34,36
PB[7:0] 40,42,44,
Port B, Bit[7:0] Bidirectional
46,48,50,
52,54
Note: All signals are driven directly by the CPU.
Table 5. CPU Bus Connector J8*
Signal Pin No. Function Direction
A[0:7] 3–10 Address Bus, Low Byte Output
®
A[8:15] 13–20 Address Bus, High Byte Output
A[16:23] 23–30 Address Bus, Upper Byte Output
RD
RESET
Note: All the signals except BUSACK and INSTRD are driven by low-voltage CMOS technology
(LVC) drivers.
33 READ Signal Output
35 Push Button Reset Output
Operational Description UM012913-0407
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