UDPSDR-HF2 Receiver Front-end
Version 3.5 – 3 October 2013
© Copyright 2013 Zephyr Engineering, Inc
User’s Manual
© Copyright 2013 Zephyr Engineering, Inc
1 HARDWARE DESCRIPTION 1
1.1 UDPSDR-HF2 CONNECTORS, HEADERS AND JUMPERS 1
1.1.1 UDPSDR-HF2 CONNECTORS 1
1.1.2 UDPSDR-HF2 HEADERS AND JUMPERS 3
1.2 BEMICROSDK CONNECTORS, SWITCHES AND LEDS 4
1.2.1 BEMICROSDK CONNECTORS 4
1.2.2 BEMICROSDK LEDS 5
1.2.3 BEMICROSDK SWITCHES 7
2 QUICK START GUIDE 9
3 DETAILED OPERATION 9
3.1 STEP QS1 – DOWNLOAD AND INSTALL PROGRAMMING SOFTWARE 10
3.1.1 HOW TO DETERMINE WHAT PROGRAMMING SOFTWARE YOU NEED 10
3.1.2 DOWNLOAD AND INSTALL SOFTWARE 11
3.2 STEP QS2 – INSTALL USB BLASTER DRIVER 12
3.3 STEP QS3 – PROGRAM BEMICROSDK 13
3.3.1 SIDEBAR: BEMICROSDK CONFIGURATION FLASH ROM AND THE UFB 13
3.3.2 QS3A – CREATING A USER FLASH BLOCK FILE 14
3.3.3 QS3B – PROGRAMMING THE BEMICROSDK CONFIGURATION FLASH ROM 14
3.3.4 SIDEBAR: HOW THE BEMICROSDK GETS ITS MAC AND IP ADDRESSES 14
3.4 STEP QS4 – MAKE EXTERNAL CONNECTIONS 15
3.4.1 QS4B – ANTENNA 15
3.4.2 QS4C – ETHERNET DATA CONNECTION 15
3.4.3 QS4D – POWER 15
3.5 STEP QS5 – INSTALL AND RUN GUI SOFTWARE 16
3.5.1 HDSDR 16
3.5.2 SDR# 17
3.5.3 POWERSDR 18
3.5.4 GNURADIO 18
4 TROUBLESHOOTING 19
4.1 PATH VARIABLE INCORRECTLY SET 19
4.2 JAVA NOT INSTALLED 19
4.3 NETWORK CABLE NOT PLUGGED IN 20
4.4 INCORRECT NETWORK ADDRESS ASSIGNMENTS 20
4.5 EXTIO.DLL NOT IN CORRECT DIRECTORY 20
5 THEORY OF OPERATION 20
5.1 UDPSDR-HF2 FRONT-END HARDWARE 20
5.2 UPDSDR-HF2 FPGA CODE 21
6 SPECIFICATIONS 22
7 APPENDIX A – UDPSDR-HF2 J1/J2 PIN DEFINITIONS 23
UDPSDR-HF2 User’s Manual i Version 3.5 – 3 October 2013
© Copyright 2013 Zephyr Engineering, Inc
J3- Power In
J1 – (top)
J2 – (bottom)
BeMicro SDK
P1- OPT Power In
J6- Phones Out
J5- RF Input
JP1- TERM Header
J4- Ref Clk Input
P3- OPT Filter
P4- OPT Filter
1 Hardware Description
The following sections will help familiarize you with the setup and connections to your
SDRstickTM HF2 SDR receiver.
1.1 UDPSDR-HF2 Connectors, Headers and Jumpers
See Figure 1 for UDPSDR-HF2 connector and jumper locations.
Figure 1 UDPSDR-HF2 Topside Connectors and Jumpers
1.1.1 UDPSDR-HF2 Connectors
1.1.1.1 J1 and J2 – BeMicroSDK connector
The J1 and J2 80-pin dual-sided MEC-style edge connectors plug onto the gold-finger
edge connector on the end of the BeMicroSDK. Either J1 or J2 connect digital data and
power between the HF2 and the BeMicroSDK. Either connector may be used; all J1 and
J2 pins are connected in parallel.
UDPSDR-HF2 User’s Manual 1 Version 3.5 – 3 October 2013
© Copyright 2013 Zephyr Engineering, Inc
J1 Pin 1
J2 Pin 1
Note that the HF2 uses the BeMicroSDK pin assignments, not the MEC connector pin
assignments from the Samtec data sheet. Pin 1 is marked on HF2 by a white dot. The
pin 1 ends of J1 and J2 are closest to the JP1 header. The BeMicroSDK pin 1 is clearly
marked with a “1”. The two correct HF2-to-BeMicroSDK pairings are shown in Figure 2.
Keep in mind that the configuration on the right may introduce some digital noise into
the HF2 front end due to the proximity of the BeMicroSDK digital circuits positioned
directly above the sensitive HF2 front-end circuitry.
Figure 2 - The two correct HF2-BeMicroSDK pairings
1.1.1.2 J3 and P1 - Power In
Power is supplied to the receiver in one of three ways (listed in most-to-least desirable
order): J3, P1 or USB. The combination SDRstickTM HF2 requires 5VDC at about
950mA.
J3 and P1 are equivalent, since they are in parallel. J3 mates with a 2.35mm x .0.7mm
barrel plug (CUI part #PP-012, Digi-Key part#CP-012-ND). P1 is provided for either a
two-pin SMT header (TE part #3-647166-2, Digi-Key part #A113590-ND) or just pads
for soldering wire leads. The center pin of J3 is positive. P1 pin 1 is positive and is
marked with a white dot adjacent to the pad. See Figure 3 for details.
USB 1.1 and most USB 2.0 ports cannot power the SDRstickTM HF2. Some USB 2.0
ports have been observed to work, even though the 950mA supply current greatly
exceeds the USB 2.0 maximum. USB 3.0 can supply enough current, and may work.
NOTE: In order to use the USB port for power, the Altera USB Blaster driver must be
loaded onto the PC. The BeMicroSDK will not even turn on until this driver is properly
installed. No driver is required to power the receiver from J3 or P1. See the Quick Start
Guide.
WARNING: NEVER APPLY EXTERNAL POWER TO J3/P1 WHILE PLUGGED INTO
ANY USB PORT! THIS CAN DAMAGE YOUR USB PORT!
UDPSDR-HF2 User’s Manual 2 Version 3.5 – 3 October 2013
© Copyright 2013 Zephyr Engineering, Inc
+5VDC - Pin 1
GND - Pin 2
Center Pin +5VDC@950mA
2.35mm x 0.70mm
Figure 3 - Power Connector Detail
1.1.1.3 J4 – Reference Clock Input (optional)
J4 can be used as an optional reference clock input. You may apply a 2V peak-to-peak
10MHz sine-wave input from a GPS-disciplined oscillator to this standard SMA jack.
This signal is squared and applied to an FPGA input. FPGA code can phase-lock the
on-board 122.88MHz VCXO sampling clock to this signal for precise frequency control
of the ADC sampling clock.
Note: The current FPGA code implementations do not use the J4 input. It is available as
an option for the user.
1.1.1.4 J5 – RF Input
The receiver RF input is connected to J5, a standard SMA jack. J5 may be connected
directly to a 50-ohm antenna or to the receive port of the UDPSDR-TX2 transmitter.
1.1.1.5 J6 – Phones Out (optional)
Plug headphones into J6, a 3.5mm stereo jack, which connects to the on-board
CODEC/headphone amplifier.
Note: The current FPGA code implementations send receive audio to the PC sound
system rather than to J6. It is available as an option for the user.
1.1.2 UDPSDR-HF2 Headers and Jumpers
1.1.2.1 JP1 – TERM Header
Placing a 2mm jumper on JP1 pins 2-3 adds a 50-ohm termination to the Reference
Clock Input from J4. JP1 pin 1 is connected to system ground for use while probing the
J4 input signal on pin 2. Placing a jumper on JP1 pins 1-2 will place an AC ground
across the J4 input, and is not recommended while driving a signal into J4. (Factory
default is no jumper installed.)
UDPSDR-HF2 User’s Manual 3 Version 3.5 – 3 October 2013
© Copyright 2013 Zephyr Engineering, Inc
P3/P4 pin number
P3 function
P4 function
1
+3.3V
+3.3V
2
+3.3V
+3.3V
3
on-board FL1 LPF input
RF to LNA input
4
RF from attenuator output
on-board FL1 LPF output
5
GND
GND
6
GND
GND
X602 - Ethernet
X201 - USB
S502-S504 – User Buttons
SW1 – User Switches
V701, V703, V704 – Status LEDs
X701 – MEC Connector
LED1-8 – User LEDs
Pin 1
1.1.2.2 P3 and P4 – Optional Filter Headers
Optional headers P3 and P4 can be used to replace FL1 with a daughter card
containing user-defined mixing, filtering and/or amplification. The user must remove R21
and R22 and install headers at P3 and P4 (Molex part #87759-0664, Digi-Key part
#0877590674-ND). The anti-aliasing filter between the LNA and the ADC will also have
to be modified in order to pass higher frequencies, if this is required. Please consult the
factory for customization options.
Headers P3 and P4 are available as a user option. See Table 1 for P3 and P4 pin
connections.
Table 1 - P3 and P4 Header Pin Connections
1.2 BeMicroSDK Connectors, Switches and LEDs
See Figure 4 for BeMicroSDK connector, switch and LED locations.
Figure 4 - BeMicroSDK Connectors, Switches and LEDs
1.2.1 BeMicroSDK Connectors
There are three connectors on the BeMicroSDK: one USB type A, one Ethernet RJ-45
and one 80-contact MEC edge connector.
UDPSDR-HF2 User’s Manual 4 Version 3.5 – 3 October 2013
© Copyright 2013 Zephyr Engineering, Inc
1.2.1.1 USB Connector (X201)
The USB connector is used to program both the FPGA configuration RAM and the
BeMicroSDK configuration flash memory. The BeMicroSDK appears to the host PC as
an Altera Byte Blaster.
The USB connector can also be used to power the SDRstickTM HF2 when it is
connected to a port that can supply sufficient power. USB 3.0 ports and some USB 2.0
powered hubs can power this 950mA load, however it is highly recommended to use a
5V well regulated power supply on J3 (or P1) rather than the SDRstickTM USB
connector.
WARNING: NEVER APPLY EXTERNAL POWER TO J3/P1 WHILE PLUGGED INTO
ANY USB PORT! THIS CAN DAMAGE YOUR USB PORT!
Note: In order to get the SDRstickTM HF2 to power up from a Windows PC USB port, the
Altera Byte Blaster driver must be installed. A Byte Blaster driver is not needed for PCs
running Linux in order to power up the SDRstickTM HF2.
1.2.1.2 Ethernet Connector (X602)
The Ethernet connector (X602) is a standard RJ-45 connector. The BeMicroSDK
supports 10/100Mbps Ethernet, but 100Mbps is required for SDRstickTM HF2. This
connection is used for the receive data stream to a host PC or network switch.
1.2.1.3 MEC Edge connector (X701)
The 80-contact MEC-style edge connector plugs into the UDPSDR-HF2 front-end
board. All of the digital signals between the HF2 and the BeMicroSDK use this
connector. Pin 1 is clearly marked on both the BeMicroSDK and the HF2 board.
Note: The pin numbering is different than that shown on the Samtec connector data
sheet. Be sure to only plug the boards together in one of the two configurations shown
in Figure 2.
1.2.2 BeMicroSDK LEDs
There are two groups of LEDs on the BeMicroSDK: a group of 3 status LEDs below the
RJ-45 connector and a group of 8 user LEDs alongside the MEC connector.
1.2.2.1 Status LEDs (V701, V703, V704)
The leftmost status LED (V701) is the green power indicator LED. The middle status
LED (V703) is yellow, and is lit when the FPGA CONF_DONE pin goes high. The
rightmost status LED (V704) is red and lights when pin 4 of the MEC connector is pulled
low (PWREN2# asserted). Since HF2 never drives this pin low, this LED should never
be lit. See Figure 5 for the status LED locations.
UDPSDR-HF2 User’s Manual 5 Version 3.5 – 3 October 2013
© Copyright 2013 Zephyr Engineering, Inc
LED
Function
LED8 (top)
lit on A/D converter overload condition
LED7
lit on FIFO overflow (internal error condition)
LED6
off
LED5
off
LED4
off
LED3
off
LED2
Heartbeat: flashes ~ 1Hz from HF2 122.88MHz clock
LED1 (bottom)
Heartbeat: flashes ~ 1Hz from BeMicroSDK 50MHz clock
V701 – Power
V703 – CONF_DONE
V704 – PWREN2#
Figure 5 - BeMicroSDK Status LEDs
1.2.2.2 User LEDs (LED1 – LED8)
The eight user LEDs (LED1 – LED8) are under FPGA firmware control. Since the
function of these LEDs is defined by the FPGA firmware, they can have any desired
meaning. Some of the user LEDs are used to indicate some common conditions by the
SDRstickTM firmware, shown in Table 2. See Figure 6 for user LED locations.
Table 2- UDPSDR-HF2 Firmware User LED Indicators
UDPSDR-HF2 User’s Manual 6 Version 3.5 – 3 October 2013
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